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authorSuman Anna <s-anna@ti.com>2020-10-02 18:42:34 -0500
committerBjorn Andersson <bjorn.andersson@linaro.org>2020-10-13 18:34:40 -0500
commitea47c6887b6d99e99e2cf8602384b6b7a17eaa23 (patch)
tree37e8c34fca63fd538be1998369582b3404438a69 /drivers/remoteproc/remoteproc_coredump.c
parentremoteproc: k3-r5: Initialize TCM memories for ECC (diff)
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remoteproc: k3-r5: Add loading support for on-chip SRAM regions
The K3 SoCs has various internal on-chip SRAM memories like the SRAM within the MCU domain or the shared MSMC RAM within NavSS that can be used for multiple purposes. One such purpose is to have the R5F cores use a portion of such on-chip SRAM for fast-access data or to directly execute code. Add support to the K3 R5 remoteproc driver to parse and support loading into such memories. The SRAM regions need to be mapped as normal non-cacheable memory to avoid kernel crashes when the remoteproc loader code uses the Arm64 memset library function (the "DC ZVA" instruction throws a alignment fault on device type memory). These SRAM regions are completely optional as not all firmware images require these memories, and any such memory has to be reserved as such in the DTS files. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201002234234.20704-5-s-anna@ti.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'drivers/remoteproc/remoteproc_coredump.c')
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