aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/rtc/rtc-zynqmp.c
diff options
context:
space:
mode:
authorAnurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>2016-04-12 17:45:44 +0530
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>2016-05-20 12:33:51 +0200
commit9092984f1a8440ea52bf53c2d53bf8f5953a5126 (patch)
treee6c747cc4b024f260de453af6b123aa3d3d3b4d9 /drivers/rtc/rtc-zynqmp.c
parentrtc: ds1685: actually spin forever in poweroff path (diff)
downloadlinux-dev-9092984f1a8440ea52bf53c2d53bf8f5953a5126.tar.xz
linux-dev-9092984f1a8440ea52bf53c2d53bf8f5953a5126.zip
rtc: zynqmp: Enable RTC switching to battery power when VCC_PSAUX is N/A
In order to conserve battery energy, during the PS operation, it is expected that the supply for the battery-powered domain to be switched from the battery (VCC_PSBATT) to (VCC_PSAUX) and automatically be switched back to battery when VCC_PSAUX voltage drops below a limit, doing so prevents the logic within the battery-powered domain from functioning incorrectly. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'drivers/rtc/rtc-zynqmp.c')
-rw-r--r--drivers/rtc/rtc-zynqmp.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index 8b28762f06df..6adb603f29bc 100644
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -45,6 +45,7 @@
#define RTC_INT_SEC BIT(0)
#define RTC_INT_ALRM BIT(1)
#define RTC_OSC_EN BIT(24)
+#define RTC_BATT_EN BIT(31)
#define RTC_CALIB_DEF 0x198233
#define RTC_CALIB_MASK 0x1FFFFF
@@ -122,6 +123,13 @@ static int xlnx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
static void xlnx_init_rtc(struct xlnx_rtc_dev *xrtcdev, u32 calibval)
{
+ u32 rtc_ctrl;
+
+ /* Enable RTC switch to battery when VCC_PSAUX is not available */
+ rtc_ctrl = readl(xrtcdev->reg_base + RTC_CTRL);
+ rtc_ctrl |= RTC_BATT_EN;
+ writel(rtc_ctrl, xrtcdev->reg_base + RTC_CTRL);
+
/*
* Based on crystal freq of 33.330 KHz
* set the seconds counter and enable, set fractions counter