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| author |   Chandrakanth Patil <chandrakanth.patil@broadcom.com> | 2019-06-25 16:34:31 +0530 |
|---|---|---|
| committer |   Martin K. Petersen <martin.petersen@oracle.com> | 2019-06-27 00:07:35 -0400 |
| commit | 132147d7f620eed4a7bee815eba03561258fc21e (patch) | |
| tree | 98a5c222f35079fbce83e7518fc4a6c1ec36da4b /drivers/scsi/megaraid/megaraid_sas.h | |
| parent | scsi: megaraid_sas: Add support for MPI toolbox commands (diff) | |
| download | linux-dev-132147d7f620eed4a7bee815eba03561258fc21e.tar.xz linux-dev-132147d7f620eed4a7bee815eba03561258fc21e.zip | |
scsi: megaraid_sas: Add support for High IOPS queues
Aero controllers support balanced performance mode through the ability to
configure queues with different properties.
Reply queues with interrupt coalescing enabled are called "high iops reply
queues" and reply queues with interrupt coalescing disabled are called "low
latency reply queues".
The driver configures a combination of high iops and low latency reply
queues if:
- HBA is an AERO controller;
- MSI-X vectors supported by the HBA is 128;
- Total CPU count in the system more than high iops queue count;
- Driver is loaded with default max_msix_vectors module parameter; and
- System booted in non-kdump mode.
Signed-off-by: Kashyap Desai <kashyap.desai@broadcom.com>
Signed-off-by: Chandrakanth Patil <chandrakanth.patil@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi/megaraid/megaraid_sas.h')
| -rw-r--r-- | drivers/scsi/megaraid/megaraid_sas.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h index 83baac3b8a8e..5b17d0fa162b 100644 --- a/drivers/scsi/megaraid/megaraid_sas.h +++ b/drivers/scsi/megaraid/megaraid_sas.h @@ -1640,6 +1640,7 @@ enum FW_BOOT_CONTEXT { #define MR_ATOMIC_DESCRIPTOR_SUPPORT_OFFSET (1 << 24) #define MR_CAN_HANDLE_64_BIT_DMA_OFFSET (1 << 25) +#define MR_INTR_COALESCING_SUPPORT_OFFSET (1 << 26) #define MEGASAS_WATCHDOG_THREAD_INTERVAL 1000 #define MEGASAS_WAIT_FOR_NEXT_DMA_MSECS 20 @@ -2250,6 +2251,9 @@ enum MR_PD_TYPE { #define MR_DEFAULT_NVME_MDTS_KB 128 #define MR_NVME_PAGE_SIZE_MASK 0x000000FF +/*Aero performance parameters*/ +#define MR_HIGH_IOPS_QUEUE_COUNT 8 + struct megasas_instance { unsigned int *reply_map; @@ -2433,6 +2437,8 @@ struct megasas_instance { bool atomic_desc_support; bool support_seqnum_jbod_fp; bool support_pci_lane_margining; + u8 low_latency_index_start; + bool balanced_mode; }; struct MR_LD_VF_MAP { |