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| author |   Arnd Bergmann <arnd@arndb.de> | 2021-10-21 21:34:20 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2021-10-21 21:34:21 +0200 |
| commit | bccb5d53e259c56a2c7277441f2aa54cacc4267e (patch) | |
| tree | f152cb50cd4b646a4f1dc7702f7d69a01c174697 /drivers/soc | |
| parent | Merge tag 'reset-for-v5.16' of git://git.pengutronix.de/pza/linux into arm/drivers (diff) | |
| parent | memory: tegra20-emc: Add runtime dependency on devfreq governor module (diff) | |
| download | linux-dev-bccb5d53e259c56a2c7277441f2aa54cacc4267e.tar.xz linux-dev-bccb5d53e259c56a2c7277441f2aa54cacc4267e.zip | |
Merge tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.16, part two
1. Convert LPDDR2 bindings to dtschema and extend them with new
properties.
2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from
devicetree.
* tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
memory: tegra20-emc: Add runtime dependency on devfreq governor module
memory: tegra20-emc: Support matching timings by LPDDR2 configuration
memory: Add LPDDR2-info helpers
dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
dt-bindings: Add vendor prefix for Elpida Memory
dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
dt-bindings: memory: lpddr2: Add revision-id properties
dt-bindings: memory: lpddr2: Convert to schema
dt-bindings: Relocate DDR bindings
Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/soc')
0 files changed, 0 insertions, 0 deletions