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authorLinus Torvalds <torvalds@linux-foundation.org>2018-12-25 14:43:54 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2018-12-25 14:43:54 -0800
commit0051db82182bfd80d6c76982bcb36b09eb338a89 (patch)
tree5e58aa94cd1f77ef7a4e7b15cfbfac49760ff4a9 /drivers/spi/spi-gpio.c
parentMerge tag 'regulator-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator (diff)
parentMerge remote-tracking branches 'spi/topic/mem' and 'spi/topic/mtd' into spi-next (diff)
downloadlinux-dev-0051db82182bfd80d6c76982bcb36b09eb338a89.tar.xz
linux-dev-0051db82182bfd80d6c76982bcb36b09eb338a89.zip
Merge tag 'spi-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "The main thing this release has been a lot of work on the integration with SPI NOR flashes, there's been some specific support for a while for controller features designed to make them perform better but it's not worked out as well as hoped so the interface has been redesigned in a way that will hopefully do better - it's already been adopted by a number of additional controllers so things are looking good. Otherwise most of the work has been driver specific: - Support for better integration with NOR flashes from Boris Brezillon and Yogesh Narayan Gaur plus usage of it in several drivers. - A big cleanup of the Rockchip driver from Emil Renner Berthing. - Lots of performance improvements for bcm2835 from Lukas Wunner. - Slave mode support for pxa2xx from Lubomir Rintel. - Support for Macronix MXIC, Mediatek MT7629 and MT8183, NPCM PSPI, and Renesas r8a77470" * tag 'spi-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (90 commits) spi: sh-msiof: Reduce the number of times write to and perform the transmission from FIFO spi: sh-msiof: Add r8a774c0 support doc: lpspi: Document DT bindings for LPSPI slave mode spi: lpspi: Let watermark change with send data length spi: lpspi: Add slave mode support spi: lpspi: Replace all "master" with "controller" spi: imx: drop useless member speed_hz from driver data struct spi: imx: rename config callback and add useful parameters spi: imx: style fixes spi: imx: mx51-ecspi: Move some initialisation to prepare_message hook. spi: imx: add a device specific prepare_message callback mtd: atmel-quadspi: disallow building on ebsa110 spi: Update NPCM PSPI controller documentation spi: npcm: Modify pspi send function spi: Use of_node_name_eq for node name comparisons spi: dw-mmio: add ACPI support spi: bcm2835: Synchronize with callback on DMA termination spi: bcm2835: Speed up FIFO access if fill level is known spi: bcm2835: Polish transfer of DMA prologue spi: spi-mem: add support for octal mode I/O data transfer ...
Diffstat (limited to 'drivers/spi/spi-gpio.c')
-rw-r--r--drivers/spi/spi-gpio.c24
1 files changed, 21 insertions, 3 deletions
diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c
index 45973ee3ae11..a4aee26028cd 100644
--- a/drivers/spi/spi-gpio.c
+++ b/drivers/spi/spi-gpio.c
@@ -256,11 +256,29 @@ static int spi_gpio_setup(struct spi_device *spi)
static int spi_gpio_set_direction(struct spi_device *spi, bool output)
{
struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
+ int ret;
if (output)
return gpiod_direction_output(spi_gpio->mosi, 1);
- else
- return gpiod_direction_input(spi_gpio->mosi);
+
+ ret = gpiod_direction_input(spi_gpio->mosi);
+ if (ret)
+ return ret;
+ /*
+ * Send a turnaround high impedance cycle when switching
+ * from output to input. Theoretically there should be
+ * a clock delay here, but as has been noted above, the
+ * nsec delay function for bit-banged GPIO is simply
+ * {} because bit-banging just doesn't get fast enough
+ * anyway.
+ */
+ if (spi->mode & SPI_3WIRE_HIZ) {
+ gpiod_set_value_cansleep(spi_gpio->sck,
+ !(spi->mode & SPI_CPOL));
+ gpiod_set_value_cansleep(spi_gpio->sck,
+ !!(spi->mode & SPI_CPOL));
+ }
+ return 0;
}
static void spi_gpio_cleanup(struct spi_device *spi)
@@ -410,7 +428,7 @@ static int spi_gpio_probe(struct platform_device *pdev)
return status;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
- master->mode_bits = SPI_3WIRE | SPI_CPHA | SPI_CPOL;
+ master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL;
master->flags = master_flags;
master->bus_num = pdev->id;
/* The master needs to think there is a chipselect even if not connected */