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authorLinus Torvalds <torvalds@linux-foundation.org>2015-02-09 13:36:20 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2015-02-09 13:36:20 -0800
commitb0c1936c4497d7f06b143241614d85a41fec12cd (patch)
tree82a527fc80f35ff3e110145a233e2d437734a71a /drivers/spi/spi-pxa2xx-dma.c
parentMerge tag 'regmap-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap (diff)
parentMerge remote-tracking branch 'spi/topic/xilinx' into spi-next (diff)
downloadlinux-dev-b0c1936c4497d7f06b143241614d85a41fec12cd.tar.xz
linux-dev-b0c1936c4497d7f06b143241614d85a41fec12cd.zip
Merge tag 'spi-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "The major highlight this release is a refactoring of the core to allow us to run synchronous transfers in the context of the caller when there is no contention for the bus. This improves performance in the very common case by eliminating context switches and reducing the number of hardware setup and teardown operations we need to perform. Other changes: - New drivers for DLN-2 USB-SPI adapter and ST SPI controllers. - A big round of cleanups, performance and feature improvements for the xilinx driver from Ricardo Ribalda Delgado. - A wide range of smaller cleanups, fixes and feature improvements throughout the subsystem" * tag 'spi-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (68 commits) spi: mxs: cleanup wait_for_completion return handling spi: ti-qspi: cleanup wait_for_completion return handling spi: spi-imx: cleanup wait_for_completion handling spi: sh-msiof: cleanup wait_for_completion return handling spi: match var type to return type of wait_for_completion spi: spi-pxa2xx: only include mach/dma.h for legacy DMA spi: atmel: cleanup wait_for_completion return handling spi: fsl-dspi: Remove possible memory leak of 'chip' spi: sh-msiof: Update calculation of frequency dividing spi: spidev: Convert buf pointers for 32-bit compat SPI_IOC_MESSAGE(n) spi/xilinx: Fix access invalid memory on xilinx_spi_tx spi: Revert "spi/xilinx: Remove iowrite/ioread wrappers" spi/xilinx: Check number of slaves range spi/xilinx: Use polling mode on small transfers spi/xilinx: Remove remaining_words driver data variable spi/xilinx: Remove iowrite/ioread wrappers spi/xilinx: Convert bits_per_word in bytes_per_word spi/xilinx: Convert remainding_bytes in remaining words spi/xilinx: Make spi_tx and spi_rx simmetric spi/xilinx: Remove rx_fn and tx_fn pointer ...
Diffstat (limited to 'drivers/spi/spi-pxa2xx-dma.c')
-rw-r--r--drivers/spi/spi-pxa2xx-dma.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/spi/spi-pxa2xx-dma.c b/drivers/spi/spi-pxa2xx-dma.c
index 62a9297e96ac..66a173939be8 100644
--- a/drivers/spi/spi-pxa2xx-dma.c
+++ b/drivers/spi/spi-pxa2xx-dma.c
@@ -111,23 +111,24 @@ static void pxa2xx_spi_dma_transfer_complete(struct driver_data *drv_data,
* by using ->dma_running.
*/
if (atomic_dec_and_test(&drv_data->dma_running)) {
- void __iomem *reg = drv_data->ioaddr;
-
/*
* If the other CPU is still handling the ROR interrupt we
* might not know about the error yet. So we re-check the
* ROR bit here before we clear the status register.
*/
if (!error) {
- u32 status = read_SSSR(reg) & drv_data->mask_sr;
+ u32 status = pxa2xx_spi_read(drv_data, SSSR)
+ & drv_data->mask_sr;
error = status & SSSR_ROR;
}
/* Clear status & disable interrupts */
- write_SSCR1(read_SSCR1(reg) & ~drv_data->dma_cr1, reg);
+ pxa2xx_spi_write(drv_data, SSCR1,
+ pxa2xx_spi_read(drv_data, SSCR1)
+ & ~drv_data->dma_cr1);
write_SSSR_CS(drv_data, drv_data->clear_sr);
if (!pxa25x_ssp_comp(drv_data))
- write_SSTO(0, reg);
+ pxa2xx_spi_write(drv_data, SSTO, 0);
if (!error) {
pxa2xx_spi_unmap_dma_buffers(drv_data);
@@ -139,7 +140,9 @@ static void pxa2xx_spi_dma_transfer_complete(struct driver_data *drv_data,
msg->state = pxa2xx_spi_next_transfer(drv_data);
} else {
/* In case we got an error we disable the SSP now */
- write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg);
+ pxa2xx_spi_write(drv_data, SSCR0,
+ pxa2xx_spi_read(drv_data, SSCR0)
+ & ~SSCR0_SSE);
msg->state = ERROR_STATE;
}
@@ -247,7 +250,7 @@ irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data)
{
u32 status;
- status = read_SSSR(drv_data->ioaddr) & drv_data->mask_sr;
+ status = pxa2xx_spi_read(drv_data, SSSR) & drv_data->mask_sr;
if (status & SSSR_ROR) {
dev_err(&drv_data->pdev->dev, "FIFO overrun\n");