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| author |   Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2020-02-27 18:25:56 +0200 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2020-02-28 18:21:05 +0000 |
| commit | 41c9884170c54013edd2481978cae917f94d40b4 (patch) | |
| tree | d2992bb2bd9e603a80cef83f1811e135df05970c /drivers/spi/spi-pxa2xx.c | |
| parent | Merge series "spi/HiSilicon v3xx: Support dual and quad mode through DMI quirks" from John Garry <john.garry@huawei.com>: (diff) | |
| download | linux-dev-41c9884170c54013edd2481978cae917f94d40b4.tar.xz linux-dev-41c9884170c54013edd2481978cae917f94d40b4.zip | |
spi: pxa2xx: Introduce is_mmp2_ssp() helper
Introduce is_mmp2_ssp() helper to be consistent with the rest
helper function to distinguish SSP type.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200227162556.3152-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-pxa2xx.c')
| -rw-r--r-- | drivers/spi/spi-pxa2xx.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 8e8e18023ded..aa93bbf0e1d4 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -185,6 +185,11 @@ static bool is_quark_x1000_ssp(const struct driver_data *drv_data) return drv_data->ssp_type == QUARK_X1000_SSP; } +static bool is_mmp2_ssp(const struct driver_data *drv_data) +{ + return drv_data->ssp_type == MMP2_SSP; +} + static u32 pxa2xx_spi_get_ssrc1_change_mask(const struct driver_data *drv_data) { switch (drv_data->ssp_type) { @@ -463,8 +468,8 @@ int pxa2xx_spi_flush(struct driver_data *drv_data) static void pxa2xx_spi_off(struct driver_data *drv_data) { - /* On MMP, disabling SSE seems to corrupt the rx fifo */ - if (drv_data->ssp_type == MMP2_SSP) + /* On MMP, disabling SSE seems to corrupt the Rx FIFO */ + if (is_mmp2_ssp(drv_data)) return; pxa2xx_spi_write(drv_data, SSCR0, @@ -1070,7 +1075,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller, || (pxa2xx_spi_read(drv_data, SSCR1) & change_mask) != (cr1 & change_mask)) { /* stop the SSP, and update the other bits */ - if (drv_data->ssp_type != MMP2_SSP) + if (!is_mmp2_ssp(drv_data)) pxa2xx_spi_write(drv_data, SSCR0, cr0 & ~SSCR0_SSE); if (!pxa25x_ssp_comp(drv_data)) pxa2xx_spi_write(drv_data, SSTO, chip->timeout); @@ -1084,7 +1089,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller, pxa2xx_spi_write(drv_data, SSTO, chip->timeout); } - if (drv_data->ssp_type == MMP2_SSP) { + if (is_mmp2_ssp(drv_data)) { u8 tx_level = (pxa2xx_spi_read(drv_data, SSSR) & SSSR_TFL_MASK) >> 8; |