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| author |   Łukasz Stelmach <l.stelmach@samsung.com> | 2020-10-02 14:22:41 +0200 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2020-10-02 21:54:22 +0100 |
| commit | 20b4016a3bea0ce0a94bf4f20f2a9670ea1dfaa3 (patch) | |
| tree | bbb6ae320f7945bb200ff55f90efd6642e8c6382 /drivers/spi | |
| parent | spi: spi-s3c64xx: Fix doc comment for struct s3c64xx_spi_driver_data (diff) | |
| download | linux-dev-20b4016a3bea0ce0a94bf4f20f2a9670ea1dfaa3.tar.xz linux-dev-20b4016a3bea0ce0a94bf4f20f2a9670ea1dfaa3.zip | |
spi: spi-s3c64xx: Ensure cur_speed holds actual clock value
Make sure the cur_speed value used in s3c64xx_enable_datapath()
to configure DMA channel and in s3c64xx_wait_for_*() to calculate the
transfer timeout is set to the actual value of (half) the clock speed.
Don't change non-CMU case, because no frequency calculation errors have
been reported.
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Suggested-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Link: https://lore.kernel.org/r/20201002122243.26849-8-l.stelmach@samsung.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-s3c64xx.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index f85f40fd608c..0bd3e230350c 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -626,6 +626,7 @@ static int s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) ret = clk_set_rate(sdd->src_clk, sdd->cur_speed * 2); if (ret) return ret; + sdd->cur_speed = clk_get_rate(sdd->src_clk) / 2; } else { /* Configure Clock */ val = readl(regs + S3C64XX_SPI_CLK_CFG); |