diff options
| author |   Jon Lin <jon.lin@rock-chips.com> | 2021-06-21 18:47:58 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2021-06-23 12:35:42 +0100 |
| commit | 2758bd093ac35ca5b62dbecfd30dab60e8b59790 (patch) | |
| tree | cc0fd2fb5ad78580d8884f5a4067dcd48e32ce20 /drivers/spi | |
| parent | spi: rockchip: Set rx_fifo interrupt waterline base on transfer item (diff) | |
| download | linux-dev-2758bd093ac35ca5b62dbecfd30dab60e8b59790.tar.xz linux-dev-2758bd093ac35ca5b62dbecfd30dab60e8b59790.zip | |
spi: rockchip: Wait for STB status in slave mode tx_xfer
After ROCKCHIP_SPI_VER2_TYPE2, SR->STB is a more accurate judgment
bit for spi slave transmition.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-5-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-rockchip.c | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 0887b19ef3ad..950d3bce443b 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -116,13 +116,14 @@ #define BAUDR_SCKDV_MIN 2 #define BAUDR_SCKDV_MAX 65534 -/* Bit fields in SR, 5bit */ -#define SR_MASK 0x1f +/* Bit fields in SR, 6bit */ +#define SR_MASK 0x3f #define SR_BUSY (1 << 0) #define SR_TF_FULL (1 << 1) #define SR_TF_EMPTY (1 << 2) #define SR_RF_EMPTY (1 << 3) #define SR_RF_FULL (1 << 4) +#define SR_SLAVE_TX_BUSY (1 << 5) /* Bit fields in ISR, IMR, ISR, RISR, 5bit */ #define INT_MASK 0x1f @@ -197,13 +198,19 @@ static inline void spi_enable_chip(struct rockchip_spi *rs, bool enable) writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR); } -static inline void wait_for_idle(struct rockchip_spi *rs) +static inline void wait_for_tx_idle(struct rockchip_spi *rs, bool slave_mode) { unsigned long timeout = jiffies + msecs_to_jiffies(5); do { - if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)) - return; + if (slave_mode) { + if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_SLAVE_TX_BUSY) && + !((readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY))) + return; + } else { + if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)) + return; + } } while (!time_after(jiffies, timeout)); dev_warn(rs->dev, "spi controller is in busy state!\n"); @@ -383,7 +390,7 @@ static void rockchip_spi_dma_txcb(void *data) return; /* Wait until the FIFO data completely. */ - wait_for_idle(rs); + wait_for_tx_idle(rs, ctlr->slave); spi_enable_chip(rs, false); spi_finalize_current_transfer(ctlr); @@ -545,7 +552,7 @@ static int rockchip_spi_config(struct rockchip_spi *rs, else writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); - writel_relaxed(rs->fifo_len / 2, rs->regs + ROCKCHIP_SPI_DMATDLR); + writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_DMATDLR); writel_relaxed(rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes) - 1, rs->regs + ROCKCHIP_SPI_DMARDLR); writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); |