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authorPratyush Yadav <p.yadav@ti.com>2020-12-23 00:14:20 +0530
committerMark Brown <broonie@kernel.org>2021-01-06 13:08:42 +0000
commitceeda328edeeeeac7579e9dbf0610785a3b83d39 (patch)
tree84b62a0f2ff34f7c28fc65b63d31ed43afcee59f /drivers/spi
parentspi: cadence-quadspi: Set master max_speed_hz (diff)
downloadlinux-dev-ceeda328edeeeeac7579e9dbf0610785a3b83d39.tar.xz
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spi: cadence-quadspi: Abort read if dummy cycles required are too many
The controller can only support up to 31 dummy cycles. If the command requires more it falls back to using 31. This command is likely to fail because the correct number of cycles are not waited upon. Rather than silently issuing an incorrect command, fail loudly so the caller can get a chance to find out the command can't be supported by the controller. Fixes: 140623410536 ("mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller") Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20201222184425.7028-3-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-cadence-quadspi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index ea3890c7d9ff..5efb1f929be0 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -461,7 +461,7 @@ static int cqspi_read_setup(struct cqspi_flash_pdata *f_pdata,
/* Setup dummy clock cycles */
dummy_clk = op->dummy.nbytes * 8;
if (dummy_clk > CQSPI_DUMMY_CLKS_MAX)
- dummy_clk = CQSPI_DUMMY_CLKS_MAX;
+ return -EOPNOTSUPP;
if (dummy_clk)
reg |= (dummy_clk & CQSPI_REG_RD_INSTR_DUMMY_MASK)