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| author |   Erik Andrén <erik.andren@gmail.com> | 2009-03-14 22:39:32 +0100 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@suse.de> | 2009-04-03 14:53:26 -0700 |
| commit | 20da58ccfd95941988733c7d72113435188696dc (patch) | |
| tree | 48a943897d1969e5d490c02470b7d7876a817461 /drivers/staging/agnx | |
| parent | Staging: agnx: Fixup phy.c checkpatch warnings (diff) | |
| download | linux-dev-20da58ccfd95941988733c7d72113435188696dc.tar.xz linux-dev-20da58ccfd95941988733c7d72113435188696dc.zip | |
Staging: agnx: Fixup rf.c checkpatch warnings
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/agnx')
| -rw-r--r-- | drivers/staging/agnx/rf.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/drivers/staging/agnx/rf.c b/drivers/staging/agnx/rf.c index 9e1e9d5ccf9b..42e457a1844f 100644 --- a/drivers/staging/agnx/rf.c +++ b/drivers/staging/agnx/rf.c @@ -109,12 +109,12 @@ void rf_chips_init(struct agnx_priv *priv) } /* Set SPI clock speed to 200NS */ - reg = agnx_read32(ctl, AGNX_SPI_CFG); - reg &= ~0xF; - reg |= 0x3; - agnx_write32(ctl, AGNX_SPI_CFG, reg); + reg = agnx_read32(ctl, AGNX_SPI_CFG); + reg &= ~0xF; + reg |= 0x3; + agnx_write32(ctl, AGNX_SPI_CFG, reg); - /* Set SPI clock speed to 50NS */ + /* Set SPI clock speed to 50NS */ reg = agnx_read32(ctl, AGNX_SPI_CFG); reg &= ~0xF; reg |= 0x1; @@ -256,7 +256,7 @@ static void antenna_init(struct agnx_priv *priv, int num_antenna) agnx_write32(ctl, AGNX_GCR_THD0BTFEST, 70); agnx_write32(ctl, AGNX_GCR_SIGHTH, 100); agnx_write32(ctl, AGNX_GCR_SIGLTH, 48); -// agnx_write32(ctl, AGNX_GCR_SIGLTH, 16); +/* agnx_write32(ctl, AGNX_GCR_SIGLTH, 16); */ break; default: printk(KERN_WARNING PFX "Unknow antenna number\n"); @@ -275,8 +275,8 @@ static void chain_update(struct agnx_priv *priv, u32 chain) if (reg == 0x4) spi_rf_write(ctl, RF_CHIP0|RF_CHIP1, reg|0x1000); else if (reg != 0x0) - spi_rf_write(ctl, RF_CHIP0|RF_CHIP1|RF_CHIP2, reg|0x1000); - else { + spi_rf_write(ctl, RF_CHIP0|RF_CHIP1|RF_CHIP2, reg|0x1000); + else { if (chain == 3 || chain == 6) { spi_rf_write(ctl, RF_CHIP0|RF_CHIP1|RF_CHIP2, reg|0x1000); agnx_write32(ctl, AGNX_GCR_RXOVERIDE, 0x0); @@ -634,8 +634,7 @@ static void chain_calibrate(struct agnx_priv *priv, struct chains *chains, } } /* chain_calibrate */ - -static void inline get_calibrete_value(struct agnx_priv *priv, struct chains *chains, +static inline void get_calibrete_value(struct agnx_priv *priv, struct chains *chains, unsigned int num) { void __iomem *ctl = priv->ctl; @@ -652,7 +651,7 @@ static void inline get_calibrete_value(struct agnx_priv *priv, struct chains *ch } if (num == 0 || num == 1 || num == 2) { - if ( 0 == chains[num].cali) + if (0 == chains[num].cali) chains[num].cali = 0xff; else chains[num].cali--; |