diff options
| author |   sayli karnik <karniksayli1995@gmail.com> | 2016-09-16 02:27:05 +0530 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-09-16 10:27:52 +0200 |
| commit | e28c631770f7d9f23da832e9fcc930a2bb59ad48 (patch) | |
| tree | 58cf2b15b48dec690fdd97ddf7b0fb94bfe48d17 /drivers/staging/comedi | |
| parent | staging: xgifb: fix alignment for if arguments (diff) | |
| download | linux-dev-e28c631770f7d9f23da832e9fcc930a2bb59ad48.tar.xz linux-dev-e28c631770f7d9f23da832e9fcc930a2bb59ad48.zip | |
staging: comedi: Use the BIT() macro instead of left shifting 1
This patch replaces left shifts on 1 with the BIT(x) macro, as suggested
by checkpatch.pl.
Signed-off-by: sayli karnik <karniksayli1995@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/comedi')
| -rw-r--r-- | drivers/staging/comedi/drivers/ni_pcidio.c | 76 |
1 files changed, 38 insertions, 38 deletions
diff --git a/drivers/staging/comedi/drivers/ni_pcidio.c b/drivers/staging/comedi/drivers/ni_pcidio.c index deaa7f2d0b7c..daeb4ad7a75f 100644 --- a/drivers/staging/comedi/drivers/ni_pcidio.c +++ b/drivers/staging/comedi/drivers/ni_pcidio.c @@ -60,36 +60,36 @@ #define Window_Address 4 /* W */ #define Interrupt_And_Window_Status 4 /* R */ -#define IntStatus1 (1<<0) -#define IntStatus2 (1<<1) +#define IntStatus1 BIT(0) +#define IntStatus2 BIT(1) #define WindowAddressStatus_mask 0x7c #define Master_DMA_And_Interrupt_Control 5 /* W */ #define InterruptLine(x) ((x)&3) -#define OpenInt (1<<2) +#define OpenInt BIT(2) #define Group_Status 5 /* R */ -#define DataLeft (1<<0) -#define Req (1<<2) -#define StopTrig (1<<3) +#define DataLeft BIT(0) +#define Req BIT(2) +#define StopTrig BIT(3) #define Group_1_Flags 6 /* R */ #define Group_2_Flags 7 /* R */ -#define TransferReady (1<<0) -#define CountExpired (1<<1) -#define Waited (1<<5) -#define PrimaryTC (1<<6) -#define SecondaryTC (1<<7) +#define TransferReady BIT(0) +#define CountExpired BIT(1) +#define Waited BIT(5) +#define PrimaryTC BIT(6) +#define SecondaryTC BIT(7) /* #define SerialRose */ /* #define ReqRose */ /* #define Paused */ #define Group_1_First_Clear 6 /* W */ #define Group_2_First_Clear 7 /* W */ -#define ClearWaited (1<<3) -#define ClearPrimaryTC (1<<4) -#define ClearSecondaryTC (1<<5) -#define DMAReset (1<<6) -#define FIFOReset (1<<7) +#define ClearWaited BIT(3) +#define ClearPrimaryTC BIT(4) +#define ClearSecondaryTC BIT(5) +#define DMAReset BIT(6) +#define FIFOReset BIT(7) #define ClearAll 0xf8 #define Group_1_FIFO 8 /* W */ @@ -110,27 +110,27 @@ #define Group_1_Second_Clear 46 /* W */ #define Group_2_Second_Clear 47 /* W */ -#define ClearExpired (1<<0) +#define ClearExpired BIT(0) #define Port_Pattern(x) (48+(x)) #define Data_Path 64 -#define FIFOEnableA (1<<0) -#define FIFOEnableB (1<<1) -#define FIFOEnableC (1<<2) -#define FIFOEnableD (1<<3) +#define FIFOEnableA BIT(0) +#define FIFOEnableB BIT(1) +#define FIFOEnableC BIT(2) +#define FIFOEnableD BIT(3) #define Funneling(x) (((x)&3)<<4) -#define GroupDirection (1<<7) +#define GroupDirection BIT(7) #define Protocol_Register_1 65 #define OpMode Protocol_Register_1 #define RunMode(x) ((x)&7) -#define Numbered (1<<3) +#define Numbered BIT(3) #define Protocol_Register_2 66 #define ClockReg Protocol_Register_2 #define ClockLine(x) (((x)&3)<<5) -#define InvertStopTrig (1<<7) +#define InvertStopTrig BIT(7) #define DataLatching(x) (((x)&3)<<5) #define Protocol_Register_3 67 @@ -151,17 +151,17 @@ #define Protocol_Register_6 73 #define LinePolarities Protocol_Register_6 -#define InvertAck (1<<0) -#define InvertReq (1<<1) -#define InvertClock (1<<2) -#define InvertSerial (1<<3) -#define OpenAck (1<<4) -#define OpenClock (1<<5) +#define InvertAck BIT(0) +#define InvertReq BIT(1) +#define InvertClock BIT(2) +#define InvertSerial BIT(3) +#define OpenAck BIT(4) +#define OpenClock BIT(5) #define Protocol_Register_7 74 #define AckSer Protocol_Register_7 #define AckLine(x) (((x)&3)<<2) -#define ExchangePins (1<<7) +#define ExchangePins BIT(7) #define Interrupt_Control 75 /* bits same as flags */ @@ -182,20 +182,20 @@ static inline unsigned int secondary_DMAChannel_bits(unsigned int channel) #define Transfer_Size_Control 77 #define TransferWidth(x) ((x)&3) #define TransferLength(x) (((x)&3)<<3) -#define RequireRLevel (1<<5) +#define RequireRLevel BIT(5) #define Protocol_Register_15 79 #define DAQOptions Protocol_Register_15 #define StartSource(x) ((x)&0x3) -#define InvertStart (1<<2) +#define InvertStart BIT(2) #define StopSource(x) (((x)&0x3)<<3) -#define ReqStart (1<<6) -#define PreStart (1<<7) +#define ReqStart BIT(6) +#define PreStart BIT(7) #define Pattern_Detection 81 -#define DetectionMethod (1<<0) -#define InvertMatch (1<<1) -#define IE_Pattern_Detection (1<<2) +#define DetectionMethod BIT(0) +#define InvertMatch BIT(1) +#define IE_Pattern_Detection BIT(2) #define Protocol_Register_9 82 #define ReqDelay Protocol_Register_9 |