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| author |   Sergio Paracuellos <sergio.paracuellos@gmail.com> | 2018-11-24 18:54:51 +0100 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-11-26 20:59:05 +0100 |
| commit | ce0c99e22e458ac5ef7bdb14c143894146c8f4f8 (patch) | |
| tree | d239b71f9cc7bd56efdd1b1e2451de4e7d9d6ac1 /drivers/staging/mt7621-pci/pci-mt7621.c | |
| parent | staging: pi433: fix potential null dereference (diff) | |
| download | linux-dev-ce0c99e22e458ac5ef7bdb14c143894146c8f4f8.tar.xz linux-dev-ce0c99e22e458ac5ef7bdb14c143894146c8f4f8.zip | |
staging: mt7621-pci: avoid mapping sysctls registers
The sysctl register are already claimed by palmbus, so
pci fails to claim it. The best way to access the sysc registers
is to use rt_sysc_[rwm]32().
Fixes: 89e9f6e6adfc: staging: mt7621-pci: remap and use sysctl from device tree
Reported-by: NeilBrown <neil@brown.name>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Tested-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/mt7621-pci/pci-mt7621.c')
| -rw-r--r-- | drivers/staging/mt7621-pci/pci-mt7621.c | 15 |
1 files changed, 1 insertions, 14 deletions
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c index 14cec231946c..ba81b34dc1b7 100644 --- a/drivers/staging/mt7621-pci/pci-mt7621.c +++ b/drivers/staging/mt7621-pci/pci-mt7621.c @@ -185,7 +185,6 @@ struct mt7621_pcie_port { /** * struct mt7621_pcie - PCIe host information * @base: IO Mapped Register Base - * @sysctl: system control mapped register base * @io: IO resource * @mem: non-prefetchable memory resource * @busn: bus range @@ -195,7 +194,6 @@ struct mt7621_pcie_port { */ struct mt7621_pcie { void __iomem *base; - void __iomem *sysctl; struct device *dev; struct resource io; struct resource mem; @@ -407,8 +405,7 @@ static void set_phy_for_ssc(struct mt7621_pcie_port *port) static void mt7621_enable_phy(struct mt7621_pcie_port *port) { - struct mt7621_pcie *pcie = port->pcie; - u32 chip_rev_id = ioread32(pcie->sysctl + MT7621_CHIP_REV_ID); + u32 chip_rev_id = rt_sysc_r32(MT7621_CHIP_REV_ID); if ((chip_rev_id & 0xFFFF) == CHIP_REV_MT7621_E2) bypass_pipe_rst(port); @@ -548,16 +545,6 @@ static int mt7621_pcie_parse_dt(struct mt7621_pcie *pcie) if (IS_ERR(pcie->base)) return PTR_ERR(pcie->base); - err = of_address_to_resource(node, 4, ®s); - if (err) { - dev_err(dev, "missing \"reg\" property\n"); - return err; - } - - pcie->sysctl = devm_ioremap_resource(dev, ®s); - if (IS_ERR(pcie->sysctl)) - return PTR_ERR(pcie->sysctl); - for_each_available_child_of_node(node, child) { int slot; |