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authorRene Sapiens <rene.sapiens@ti.com>2010-07-09 21:24:09 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2010-07-22 10:45:37 -0700
commitc8c1ad8ce317c1e213db47f094d6eee8dec7d280 (patch)
tree823b8d5384e1d5297af53f568f6a588cecd040a6 /drivers/staging/tidspbridge/core
parentstaging: ti dspbridge: Rename words with camel case (diff)
downloadlinux-dev-c8c1ad8ce317c1e213db47f094d6eee8dec7d280.tar.xz
linux-dev-c8c1ad8ce317c1e213db47f094d6eee8dec7d280.zip
staging: ti dspbridge: make variables in prototypes match within functions definitions
This patch renames the variables in the parameter lists and in the function definitions to make them match. Signed-off-by: Rene Sapiens <rene.sapiens@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/tidspbridge/core')
-rw-r--r--drivers/staging/tidspbridge/core/chnl_sm.c2
-rw-r--r--drivers/staging/tidspbridge/core/io_sm.c20
-rw-r--r--drivers/staging/tidspbridge/core/tiomap3430.c18
-rw-r--r--drivers/staging/tidspbridge/core/tiomap_io.c8
-rw-r--r--drivers/staging/tidspbridge/core/tiomap_io.h2
5 files changed, 25 insertions, 25 deletions
diff --git a/drivers/staging/tidspbridge/core/chnl_sm.c b/drivers/staging/tidspbridge/core/chnl_sm.c
index ac393b894cf6..813ea35eddc8 100644
--- a/drivers/staging/tidspbridge/core/chnl_sm.c
+++ b/drivers/staging/tidspbridge/core/chnl_sm.c
@@ -75,7 +75,7 @@
/* ----------------------------------- Function Prototypes */
static struct lst_list *create_chirp_list(u32 chirps);
-static void free_chirp_list(struct lst_list *lst);
+static void free_chirp_list(struct lst_list *chirp_list);
static struct chnl_irp *make_new_chirp(void);
diff --git a/drivers/staging/tidspbridge/core/io_sm.c b/drivers/staging/tidspbridge/core/io_sm.c
index 0292881ddd36..74835c5cb3ad 100644
--- a/drivers/staging/tidspbridge/core/io_sm.c
+++ b/drivers/staging/tidspbridge/core/io_sm.c
@@ -1013,7 +1013,7 @@ void io_mbox_msg(u32 msg)
* Request chanenel I/O from the DSP. Sets flags in shared memory, then
* interrupts the DSP.
*/
-void io_request_chnl(struct io_mgr *pio_mgr, struct chnl_object *pchnl,
+void io_request_chnl(struct io_mgr *io_manager, struct chnl_object *pchnl,
u8 io_mode, OUT u16 *mbx_val)
{
struct chnl_mgr *chnl_mgr_obj;
@@ -1021,8 +1021,8 @@ void io_request_chnl(struct io_mgr *pio_mgr, struct chnl_object *pchnl,
if (!pchnl || !mbx_val)
goto func_end;
- chnl_mgr_obj = pio_mgr->hchnl_mgr;
- sm = pio_mgr->shared_mem;
+ chnl_mgr_obj = io_manager->hchnl_mgr;
+ sm = io_manager->shared_mem;
if (io_mode == IO_INPUT) {
/*
* Assertion fires if CHNL_AddIOReq() called on a stream
@@ -1031,7 +1031,7 @@ void io_request_chnl(struct io_mgr *pio_mgr, struct chnl_object *pchnl,
DBC_ASSERT((pchnl->dw_state == CHNL_STATEREADY) ||
(pchnl->dw_state == CHNL_STATEEOS));
/* Indicate to the DSP we have a buffer available for input */
- IO_OR_VALUE(pio_mgr->hbridge_context, struct shm, sm,
+ IO_OR_VALUE(io_manager->hbridge_context, struct shm, sm,
host_free_mask, (1 << pchnl->chnl_id));
*mbx_val = MBX_PCPY_CLASS;
} else if (io_mode == IO_OUTPUT) {
@@ -1057,20 +1057,20 @@ func_end:
* ======== iosm_schedule ========
* Schedule DPC for IO.
*/
-void iosm_schedule(struct io_mgr *pio_mgr)
+void iosm_schedule(struct io_mgr *io_manager)
{
unsigned long flags;
- if (!pio_mgr)
+ if (!io_manager)
return;
/* Increment count of DPC's pending. */
- spin_lock_irqsave(&pio_mgr->dpc_lock, flags);
- pio_mgr->dpc_req++;
- spin_unlock_irqrestore(&pio_mgr->dpc_lock, flags);
+ spin_lock_irqsave(&io_manager->dpc_lock, flags);
+ io_manager->dpc_req++;
+ spin_unlock_irqrestore(&io_manager->dpc_lock, flags);
/* Schedule DPC */
- tasklet_schedule(&pio_mgr->dpc_tasklet);
+ tasklet_schedule(&io_manager->dpc_tasklet);
}
/*
diff --git a/drivers/staging/tidspbridge/core/tiomap3430.c b/drivers/staging/tidspbridge/core/tiomap3430.c
index 8e3d92a38eb7..cf65af4099e2 100644
--- a/drivers/staging/tidspbridge/core/tiomap3430.c
+++ b/drivers/staging/tidspbridge/core/tiomap3430.c
@@ -74,17 +74,17 @@
#define PHYS_TO_PAGE(phys) pfn_to_page((phys) >> PAGE_SHIFT)
/* Forward Declarations: */
-static int bridge_brd_monitor(struct bridge_dev_context *dev_context);
-static int bridge_brd_read(struct bridge_dev_context *dev_context,
+static int bridge_brd_monitor(struct bridge_dev_context *dev_ctxt);
+static int bridge_brd_read(struct bridge_dev_context *dev_ctxt,
OUT u8 *host_buff,
u32 dsp_addr, u32 ul_num_bytes,
u32 mem_type);
-static int bridge_brd_start(struct bridge_dev_context *dev_context,
+static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
u32 dsp_addr);
-static int bridge_brd_status(struct bridge_dev_context *dev_context,
+static int bridge_brd_status(struct bridge_dev_context *dev_ctxt,
int *board_state);
-static int bridge_brd_stop(struct bridge_dev_context *dev_context);
-static int bridge_brd_write(struct bridge_dev_context *dev_context,
+static int bridge_brd_stop(struct bridge_dev_context *dev_ctxt);
+static int bridge_brd_write(struct bridge_dev_context *dev_ctxt,
IN u8 *host_buff,
u32 dsp_addr, u32 ul_num_bytes,
u32 mem_type);
@@ -93,7 +93,7 @@ static int bridge_brd_set_state(struct bridge_dev_context *dev_ctxt,
static int bridge_brd_mem_copy(struct bridge_dev_context *dev_ctxt,
u32 dsp_dest_addr, u32 dsp_src_addr,
u32 ul_num_bytes, u32 mem_type);
-static int bridge_brd_mem_write(struct bridge_dev_context *dev_context,
+static int bridge_brd_mem_write(struct bridge_dev_context *dev_ctxt,
IN u8 *host_buff, u32 dsp_addr,
u32 ul_num_bytes, u32 mem_type);
static int bridge_brd_mem_map(struct bridge_dev_context *dev_ctxt,
@@ -108,14 +108,14 @@ static int bridge_dev_create(OUT struct bridge_dev_context
IN struct cfg_hostres *config_param);
static int bridge_dev_ctrl(struct bridge_dev_context *dev_context,
u32 dw_cmd, IN OUT void *pargs);
-static int bridge_dev_destroy(struct bridge_dev_context *dev_context);
+static int bridge_dev_destroy(struct bridge_dev_context *dev_ctxt);
static u32 user_va2_pa(struct mm_struct *mm, u32 address);
static int pte_update(struct bridge_dev_context *dev_ctxt, u32 pa,
u32 va, u32 size,
struct hw_mmu_map_attrs_t *map_attrs);
static int pte_set(struct pg_table_attrs *pt, u32 pa, u32 va,
u32 size, struct hw_mmu_map_attrs_t *attrs);
-static int mem_map_vmalloc(struct bridge_dev_context *dev_ctxt,
+static int mem_map_vmalloc(struct bridge_dev_context *dev_context,
u32 ul_mpu_addr, u32 virt_addr,
u32 ul_num_bytes,
struct hw_mmu_map_attrs_t *hw_attrs);
diff --git a/drivers/staging/tidspbridge/core/tiomap_io.c b/drivers/staging/tidspbridge/core/tiomap_io.c
index a3fcb029b91d..3f6d084ca503 100644
--- a/drivers/staging/tidspbridge/core/tiomap_io.c
+++ b/drivers/staging/tidspbridge/core/tiomap_io.c
@@ -178,13 +178,13 @@ int read_ext_dsp_data(struct bridge_dev_context *dev_ctxt,
* purpose:
* Copies buffers to the DSP internal/external memory.
*/
-int write_dsp_data(struct bridge_dev_context *dev_ctxt,
+int write_dsp_data(struct bridge_dev_context *dev_context,
IN u8 *host_buff, u32 dsp_addr, u32 ul_num_bytes,
u32 mem_type)
{
u32 offset;
- u32 dw_base_addr = dev_ctxt->dw_dsp_base_addr;
- struct cfg_hostres *resources = dev_ctxt->resources;
+ u32 dw_base_addr = dev_context->dw_dsp_base_addr;
+ struct cfg_hostres *resources = dev_context->resources;
int status = 0;
u32 base1, base2, base3;
base1 = OMAP_DSP_MEM1_SIZE;
@@ -194,7 +194,7 @@ int write_dsp_data(struct bridge_dev_context *dev_ctxt,
if (!resources)
return -EPERM;
- offset = dsp_addr - dev_ctxt->dw_dsp_start_add;
+ offset = dsp_addr - dev_context->dw_dsp_start_add;
if (offset < base1) {
dw_base_addr = MEM_LINEAR_ADDRESS(resources->dw_mem_base[2],
resources->dw_mem_length[2]);
diff --git a/drivers/staging/tidspbridge/core/tiomap_io.h b/drivers/staging/tidspbridge/core/tiomap_io.h
index 8f9d07202169..5a26ea04e8c1 100644
--- a/drivers/staging/tidspbridge/core/tiomap_io.h
+++ b/drivers/staging/tidspbridge/core/tiomap_io.h
@@ -47,7 +47,7 @@
* Reads it from DSP External memory. The external memory for the DSP
* is configured by the combination of DSP MMU and shm Memory manager in the CDB
*/
-extern int read_ext_dsp_data(struct bridge_dev_context *dev_context,
+extern int read_ext_dsp_data(struct bridge_dev_context *dev_ctxt,
OUT u8 *host_buff, u32 dsp_addr,
u32 ul_num_bytes, u32 mem_type);