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| author |   Nicolas Saenz Julienne <nsaenzjulienne@suse.de> | 2018-11-20 15:53:42 +0100 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-11-27 10:13:36 +0100 |
| commit | 14f4d72fb799a9b3170a45ab80d4a3ddad541960 (patch) | |
| tree | 29a8232ebb1cadfb2ef7cdebbd1279ffa99b2e4d /drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h | |
| parent | staging: vchiq_arm: rework vchiq_ioc_copy_element_data (diff) | |
| download | linux-dev-14f4d72fb799a9b3170a45ab80d4a3ddad541960.tar.xz linux-dev-14f4d72fb799a9b3170a45ab80d4a3ddad541960.zip | |
staging: vchiq-core: get rid of is_master distinction
VCHIQ bulk transfers are what most people call DMA transfers. The CPU
sends a list of physical addresses to the VideoCore which then access
the memory directly without the need for CPU interaction. With this
setup we call the CPU the "slave" and the VideoCore the "master".
There seems to be an option to switch roles in vchiq. Which nobody is
using nor is properly implemented. So we get rid of the "is_master == 1"
option, and all the related code.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h')
| -rw-r--r-- | drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h index daada568f400..5b1696422e21 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h @@ -400,7 +400,6 @@ struct vchiq_state_struct { int id; int initialised; VCHIQ_CONNSTATE_T conn_state; - int is_master; short version_common; VCHIQ_SHARED_STATE_T *local; @@ -489,10 +488,6 @@ struct vchiq_state_struct { /* Signalled when a free data slot becomes available. */ struct semaphore data_quota_event; - /* Incremented when there are bulk transfers which cannot be processed - * whilst paused and must be processed on resume */ - int deferred_bulks; - struct state_stats_struct { int slot_stalls; int data_stalls; @@ -529,8 +524,7 @@ extern VCHIQ_SLOT_ZERO_T * vchiq_init_slots(void *mem_base, int mem_size); extern VCHIQ_STATUS_T -vchiq_init_state(VCHIQ_STATE_T *state, VCHIQ_SLOT_ZERO_T *slot_zero, - int is_master); +vchiq_init_state(VCHIQ_STATE_T *state, VCHIQ_SLOT_ZERO_T *slot_zero); extern VCHIQ_STATUS_T vchiq_connect_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance); @@ -626,9 +620,6 @@ extern VCHIQ_STATUS_T vchiq_prepare_bulk_data(VCHIQ_BULK_T *bulk, void *offset, int size, int dir); extern void -vchiq_transfer_bulk(VCHIQ_BULK_T *bulk); - -extern void vchiq_complete_bulk(VCHIQ_BULK_T *bulk); extern void |