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| author |   Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2019-07-10 23:24:10 -0700 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2019-07-10 23:24:10 -0700 |
| commit | 597473720f4dc69749542bfcfed4a927a43d935e (patch) | |
| tree | 711bf773910fb93d1dd9120c633adc807685e0d8 /drivers/staging | |
| parent | Input: atmel_mxt_ts - fix leak in mxt_update_cfg() (diff) | |
| parent | Input: gpio_keys_polled - allow specifying name of input device (diff) | |
| download | linux-dev-597473720f4dc69749542bfcfed4a927a43d935e.tar.xz linux-dev-597473720f4dc69749542bfcfed4a927a43d935e.zip | |
Merge branch 'next' into for-linus
Prepare input updates for 5.3 merge window.
Diffstat (limited to 'drivers/staging')
627 files changed, 47644 insertions, 35833 deletions
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 7c015536360d..62951e836cbc 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -56,8 +56,6 @@ source "drivers/staging/iio/Kconfig" source "drivers/staging/sm750fb/Kconfig" -source "drivers/staging/xgifb/Kconfig" - source "drivers/staging/emxx_udc/Kconfig" source "drivers/staging/speakup/Kconfig" @@ -78,8 +76,6 @@ source "drivers/staging/goldfish/Kconfig" source "drivers/staging/netlogic/Kconfig" -source "drivers/staging/mt29f_spinand/Kconfig" - source "drivers/staging/gs_fpgaboot/Kconfig" source "drivers/staging/unisys/Kconfig" @@ -106,15 +102,17 @@ source "drivers/staging/pi433/Kconfig" source "drivers/staging/mt7621-pci/Kconfig" +source "drivers/staging/mt7621-pci-phy/Kconfig" + source "drivers/staging/mt7621-pinctrl/Kconfig" source "drivers/staging/mt7621-spi/Kconfig" source "drivers/staging/mt7621-dma/Kconfig" -source "drivers/staging/mt7621-mmc/Kconfig" +source "drivers/staging/ralink-gdma/Kconfig" -source "drivers/staging/mt7621-eth/Kconfig" +source "drivers/staging/mt7621-mmc/Kconfig" source "drivers/staging/mt7621-dts/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index a79b3fe20cf0..d1b17ddcd354 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -20,7 +20,6 @@ obj-$(CONFIG_VT6656) += vt6656/ obj-$(CONFIG_VME_BUS) += vme/ obj-$(CONFIG_IIO) += iio/ obj-$(CONFIG_FB_SM750) += sm750fb/ -obj-$(CONFIG_FB_XGI) += xgifb/ obj-$(CONFIG_USB_EMXX) += emxx_udc/ obj-$(CONFIG_SPEAKUP) += speakup/ obj-$(CONFIG_MFD_NVEC) += nvec/ @@ -29,7 +28,6 @@ obj-$(CONFIG_STAGING_BOARD) += board/ obj-$(CONFIG_LTE_GDM724X) += gdm724x/ obj-$(CONFIG_FIREWIRE_SERIAL) += fwserial/ obj-$(CONFIG_GOLDFISH) += goldfish/ -obj-$(CONFIG_MTD_SPINAND_MT29F) += mt29f_spinand/ obj-$(CONFIG_GS_FPGABOOT) += gs_fpgaboot/ obj-$(CONFIG_UNISYSSPAR) += unisys/ obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/ @@ -42,12 +40,13 @@ obj-$(CONFIG_GREYBUS) += greybus/ obj-$(CONFIG_BCM2835_VCHIQ) += vc04_services/ obj-$(CONFIG_DRM_VBOXVIDEO) += vboxvideo/ obj-$(CONFIG_PI433) += pi433/ -obj-$(CONFIG_SOC_MT7621) += mt7621-pci/ -obj-$(CONFIG_SOC_MT7621) += mt7621-pinctrl/ -obj-$(CONFIG_SOC_MT7621) += mt7621-spi/ +obj-$(CONFIG_PCI_MT7621) += mt7621-pci/ +obj-$(CONFIG_PCI_MT7621_PHY) += mt7621-pci-phy/ +obj-$(CONFIG_PINCTRL_RT2880) += mt7621-pinctrl/ +obj-$(CONFIG_SPI_MT7621) += mt7621-spi/ obj-$(CONFIG_SOC_MT7621) += mt7621-dma/ -obj-$(CONFIG_SOC_MT7621) += mt7621-mmc/ -obj-$(CONFIG_SOC_MT7621) += mt7621-eth/ +obj-$(CONFIG_DMA_RALINK) += ralink-gdma/ +obj-$(CONFIG_MTK_MMC) += mt7621-mmc/ obj-$(CONFIG_SOC_MT7621) += mt7621-dts/ obj-$(CONFIG_STAGING_GASKET_FRAMEWORK) += gasket/ obj-$(CONFIG_XIL_AXIS_FIFO) += axis-fifo/ diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c index a880b5c6c6c3..74d497d39c5a 100644 --- a/drivers/staging/android/ashmem.c +++ b/drivers/staging/android/ashmem.c @@ -75,6 +75,9 @@ struct ashmem_range { /* LRU list of unpinned pages, protected by ashmem_mutex */ static LIST_HEAD(ashmem_lru_list); +static atomic_t ashmem_shrink_inflight = ATOMIC_INIT(0); +static DECLARE_WAIT_QUEUE_HEAD(ashmem_shrink_wait); + /* * long lru_count - The count of pages on our LRU list. * @@ -126,7 +129,8 @@ static inline bool page_range_in_range(struct ashmem_range *range, page_range_subsumes_range(range, start, end); } -static inline bool range_before_page(struct ashmem_range *range, size_t page) +static inline bool range_before_page(struct ashmem_range *range, + size_t page) { return range->pgend < page; } @@ -168,19 +172,15 @@ static inline void lru_del(struct ashmem_range *range) * @end: The ending page (inclusive) * * This function is protected by ashmem_mutex. - * - * Return: 0 if successful, or -ENOMEM if there is an error */ -static int range_alloc(struct ashmem_area *asma, - struct ashmem_range *prev_range, unsigned int purged, - size_t start, size_t end) +static void range_alloc(struct ashmem_area *asma, + struct ashmem_range *prev_range, unsigned int purged, + size_t start, size_t end, + struct ashmem_range **new_range) { - struct ashmem_range *range; - - range = kmem_cache_zalloc(ashmem_range_cachep, GFP_KERNEL); - if (!range) - return -ENOMEM; + struct ashmem_range *range = *new_range; + *new_range = NULL; range->asma = asma; range->pgstart = start; range->pgend = end; @@ -190,12 +190,10 @@ static int range_alloc(struct ashmem_area *asma, if (range_on_lru(range)) lru_add(range); - - return 0; } /** - * range_del() - Deletes and dealloctes an ashmem_range structure + * range_del() - Deletes and deallocates an ashmem_range structure * @range: The associated ashmem_range that has previously been allocated */ static void range_del(struct ashmem_range *range) @@ -438,7 +436,6 @@ out: static unsigned long ashmem_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) { - struct ashmem_range *range, *next; unsigned long freed = 0; /* We might recurse into filesystem code, so bail out if necessary */ @@ -448,21 +445,33 @@ ashmem_shrink_scan(struct shrinker *shrink, struct shrink_control *sc) if (!mutex_trylock(&ashmem_mutex)) return -1; - list_for_each_entry_safe(range, next, &ashmem_lru_list, lru) { + while (!list_empty(&ashmem_lru_list)) { + struct ashmem_range *range = + list_first_entry(&ashmem_lru_list, typeof(*range), lru); loff_t start = range->pgstart * PAGE_SIZE; loff_t end = (range->pgend + 1) * PAGE_SIZE; + struct file *f = range->asma->file; - range->asma->file->f_op->fallocate(range->asma->file, - FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE, - start, end - start); + get_file(f); + atomic_inc(&ashmem_shrink_inflight); range->purged = ASHMEM_WAS_PURGED; lru_del(range); freed += range_size(range); + mutex_unlock(&ashmem_mutex); + f->f_op->fallocate(f, + FALLOC_FL_PUNCH_HOLE | FALLOC_FL_KEEP_SIZE, + start, end - start); + fput(f); + if (atomic_dec_and_test(&ashmem_shrink_inflight)) + wake_up_all(&ashmem_shrink_wait); + if (!mutex_trylock(&ashmem_mutex)) + goto out; if (--sc->nr_to_scan <= 0) break; } mutex_unlock(&ashmem_mutex); +out: return freed; } @@ -521,7 +530,7 @@ static int set_name(struct ashmem_area *asma, void __user *name) * an data abort which would try to access mmap_sem. If another * thread has invoked ashmem_mmap then it will be holding the * semaphore and will be waiting for ashmem_mutex, there by leading to - * deadlock. We'll release the mutex and take the name to a local + * deadlock. We'll release the mutex and take the name to a local * variable that does not need protection and later copy the local * variable to the structure member with lock held. */ @@ -582,7 +591,8 @@ static int get_name(struct ashmem_area *asma, void __user *name) * * Caller must hold ashmem_mutex. */ -static int ashmem_pin(struct ashmem_area *asma, size_t pgstart, size_t pgend) +static int ashmem_pin(struct ashmem_area *asma, size_t pgstart, size_t pgend, + struct ashmem_range **new_range) { struct ashmem_range *range, *next; int ret = ASHMEM_NOT_PURGED; @@ -635,7 +645,7 @@ static int ashmem_pin(struct ashmem_area *asma, size_t pgstart, size_t pgend) * second half and adjust the first chunk's endpoint. */ range_alloc(asma, range, range->purged, - pgend + 1, range->pgend); + pgend + 1, range->pgend, new_range); range_shrink(range, range->pgstart, pgstart - 1); break; } @@ -649,7 +659,8 @@ static int ashmem_pin(struct ashmem_area *asma, size_t pgstart, size_t pgend) * * Caller must hold ashmem_mutex. */ -static int ashmem_unpin(struct ashmem_area *asma, size_t pgstart, size_t pgend) +static int ashmem_unpin(struct ashmem_area *asma, size_t pgstart, size_t pgend, + struct ashmem_range **new_range) { struct ashmem_range *range, *next; unsigned int purged = ASHMEM_NOT_PURGED; @@ -675,7 +686,8 @@ restart: } } - return range_alloc(asma, range, purged, pgstart, pgend); + range_alloc(asma, range, purged, pgstart, pgend, new_range); + return 0; } /* @@ -708,11 +720,19 @@ static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd, struct ashmem_pin pin; size_t pgstart, pgend; int ret = -EINVAL; + struct ashmem_range *range = NULL; if (copy_from_user(&pin, p, sizeof(pin))) return -EFAULT; + if (cmd == ASHMEM_PIN || cmd == ASHMEM_UNPIN) { + range = kmem_cache_zalloc(ashmem_range_cachep, GFP_KERNEL); + if (!range) + return -ENOMEM; + } + mutex_lock(&ashmem_mutex); + wait_event(ashmem_shrink_wait, !atomic_read(&ashmem_shrink_inflight)); if (!asma->file) goto out_unlock; @@ -735,10 +755,10 @@ static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd, switch (cmd) { case ASHMEM_PIN: - ret = ashmem_pin(asma, pgstart, pgend); + ret = ashmem_pin(asma, pgstart, pgend, &range); break; case ASHMEM_UNPIN: - ret = ashmem_unpin(asma, pgstart, pgend); + ret = ashmem_unpin(asma, pgstart, pgend, &range); break; case ASHMEM_GET_PIN_STATUS: ret = ashmem_get_pin_status(asma, pgstart, pgend); @@ -747,6 +767,8 @@ static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd, out_unlock: mutex_unlock(&ashmem_mutex); + if (range) + kmem_cache_free(ashmem_range_cachep, range); return ret; } diff --git a/drivers/staging/android/ion/Makefile b/drivers/staging/android/ion/Makefile index bb30bf8774a0..17f3a7569e3d 100644 --- a/drivers/staging/android/ion/Makefile +++ b/drivers/staging/android/ion/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_ION) += ion.o ion-ioctl.o ion_heap.o +obj-$(CONFIG_ION) += ion.o ion_heap.o obj-$(CONFIG_ION_SYSTEM_HEAP) += ion_system_heap.o ion_page_pool.o obj-$(CONFIG_ION_CARVEOUT_HEAP) += ion_carveout_heap.o obj-$(CONFIG_ION_CHUNK_HEAP) += ion_chunk_heap.o diff --git a/drivers/staging/android/ion/ion-ioctl.c b/drivers/staging/android/ion/ion-ioctl.c deleted file mode 100644 index a8d3cc412fb9..000000000000 --- a/drivers/staging/android/ion/ion-ioctl.c +++ /dev/null @@ -1,98 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2011 Google, Inc. - */ - -#include <linux/kernel.h> -#include <linux/file.h> -#include <linux/fs.h> -#include <linux/uaccess.h> - -#include "ion.h" - -union ion_ioctl_arg { - struct ion_allocation_data allocation; - struct ion_heap_query query; -}; - -static int validate_ioctl_arg(unsigned int cmd, union ion_ioctl_arg *arg) -{ - switch (cmd) { - case ION_IOC_HEAP_QUERY: - if (arg->query.reserved0 || - arg->query.reserved1 || - arg->query.reserved2) - return -EINVAL; - break; - default: - break; - } - - return 0; -} - -/* fix up the cases where the ioctl direction bits are incorrect */ -static unsigned int ion_ioctl_dir(unsigned int cmd) -{ - switch (cmd) { - default: - return _IOC_DIR(cmd); - } -} - -long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) -{ - int ret = 0; - unsigned int dir; - union ion_ioctl_arg data; - - dir = ion_ioctl_dir(cmd); - - if (_IOC_SIZE(cmd) > sizeof(data)) - return -EINVAL; - - /* - * The copy_from_user is unconditional here for both read and write - * to do the validate. If there is no write for the ioctl, the - * buffer is cleared - */ - if (copy_from_user(&data, (void __user *)arg, _IOC_SIZE(cmd))) - return -EFAULT; - - ret = validate_ioctl_arg(cmd, &data); - if (ret) { - pr_warn_once("%s: ioctl validate failed\n", __func__); - return ret; - } - - if (!(dir & _IOC_WRITE)) - memset(&data, 0, sizeof(data)); - - switch (cmd) { - case ION_IOC_ALLOC: - { - int fd; - - fd = ion_alloc(data.allocation.len, - data.allocation.heap_id_mask, - data.allocation.flags); - if (fd < 0) - return fd; - - data.allocation.fd = fd; - - break; - } - case ION_IOC_HEAP_QUERY: - ret = ion_query_heaps(&data.query); - break; - default: - return -ENOTTY; - } - - if (dir & _IOC_READ) { - if (copy_to_user((void __user *)arg, &data, _IOC_SIZE(cmd))) - return -EFAULT; - } - return ret; -} diff --git a/drivers/staging/android/ion/ion.c b/drivers/staging/android/ion/ion.c index 99073325b0c0..92c2914239e3 100644 --- a/drivers/staging/android/ion/ion.c +++ b/drivers/staging/android/ion/ion.c @@ -1,11 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 /* - * drivers/staging/android/ion/ion.c + * ION Memory Allocator * * Copyright (C) 2011 Google, Inc. */ -#include <linux/anon_inodes.h> #include <linux/debugfs.h> #include <linux/device.h> #include <linux/dma-buf.h> @@ -14,16 +13,13 @@ #include <linux/file.h> #include <linux/freezer.h> #include <linux/fs.h> -#include <linux/idr.h> #include <linux/kthread.h> #include <linux/list.h> -#include <linux/memblock.h> #include <linux/miscdevice.h> #include <linux/mm.h> #include <linux/mm_types.h> #include <linux/rbtree.h> #include <linux/sched/task.h> -#include <linux/seq_file.h> #include <linux/slab.h> #include <linux/uaccess.h> #include <linux/vmalloc.h> @@ -95,6 +91,13 @@ static struct ion_buffer *ion_buffer_create(struct ion_heap *heap, goto err1; } + spin_lock(&heap->stat_lock); + heap->num_of_buffers++; + heap->num_of_alloc_bytes += len; + if (heap->num_of_alloc_bytes > heap->alloc_bytes_wm) + heap->alloc_bytes_wm = heap->num_of_alloc_bytes; + spin_unlock(&heap->stat_lock); + INIT_LIST_HEAD(&buffer->attachments); mutex_init(&buffer->lock); mutex_lock(&dev->buffer_lock); @@ -117,6 +120,11 @@ void ion_buffer_destroy(struct ion_buffer *buffer) buffer->heap->ops->unmap_kernel(buffer->heap, buffer); } buffer->heap->ops->free(buffer); + spin_lock(&buffer->heap->stat_lock); + buffer->heap->num_of_buffers--; + buffer->heap->num_of_alloc_bytes -= buffer->size; + spin_unlock(&buffer->heap->stat_lock); + kfree(buffer); } @@ -237,10 +245,10 @@ static void ion_dma_buf_detatch(struct dma_buf *dmabuf, struct ion_dma_buf_attachment *a = attachment->priv; struct ion_buffer *buffer = dmabuf->priv; - free_duped_table(a->table); mutex_lock(&buffer->lock); list_del(&a->list); mutex_unlock(&buffer->lock); + free_duped_table(a->table); kfree(a); } @@ -379,7 +387,7 @@ static const struct dma_buf_ops dma_buf_ops = { .unmap = ion_dma_buf_kunmap, }; -int ion_alloc(size_t len, unsigned int heap_id_mask, unsigned int flags) +static int ion_alloc(size_t len, unsigned int heap_id_mask, unsigned int flags) { struct ion_device *dev = internal_dev; struct ion_buffer *buffer = NULL; @@ -436,7 +444,7 @@ int ion_alloc(size_t len, unsigned int heap_id_mask, unsigned int flags) return fd; } -int ion_query_heaps(struct ion_heap_query *query) +static int ion_query_heaps(struct ion_heap_query *query) { struct ion_device *dev = internal_dev; struct ion_heap_data __user *buffer = u64_to_user_ptr(query->heaps); @@ -481,6 +489,81 @@ out: return ret; } +union ion_ioctl_arg { + struct ion_allocation_data allocation; + struct ion_heap_query query; +}; + +static int validate_ioctl_arg(unsigned int cmd, union ion_ioctl_arg *arg) +{ + switch (cmd) { + case ION_IOC_HEAP_QUERY: + if (arg->query.reserved0 || + arg->query.reserved1 || + arg->query.reserved2) + return -EINVAL; + break; + default: + break; + } + + return 0; +} + +static long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) +{ + int ret = 0; + union ion_ioctl_arg data; + + if (_IOC_SIZE(cmd) > sizeof(data)) + return -EINVAL; + + /* + * The copy_from_user is unconditional here for both read and write + * to do the validate. If there is no write for the ioctl, the + * buffer is cleared + */ + if (copy_from_user(&data, (void __user *)arg, _IOC_SIZE(cmd))) + return -EFAULT; + + ret = validate_ioctl_arg(cmd, &data); + if (ret) { + pr_warn_once("%s: ioctl validate failed\n", __func__); + return ret; + } + + if (!(_IOC_DIR(cmd) & _IOC_WRITE)) + memset(&data, 0, sizeof(data)); + + switch (cmd) { + case ION_IOC_ALLOC: + { + int fd; + + fd = ion_alloc(data.allocation.len, + data.allocation.heap_id_mask, + data.allocation.flags); + if (fd < 0) + return fd; + + data.allocation.fd = fd; + + break; + } + case ION_IOC_HEAP_QUERY: + ret = ion_query_heaps(&data.query); + break; + default: + return -ENOTTY; + } + + if (_IOC_DIR(cmd) & _IOC_READ) { + if (copy_to_user((void __user *)arg, &data, _IOC_SIZE(cmd))) + return -EFAULT; + } + return ret; +} + static const struct file_operations ion_fops = { .owner = THIS_MODULE, .unlocked_ioctl = ion_ioctl, @@ -528,12 +611,15 @@ void ion_device_add_heap(struct ion_heap *heap) { struct ion_device *dev = internal_dev; int ret; + struct dentry *heap_root; + char debug_name[64]; if (!heap->ops->allocate || !heap->ops->free) pr_err("%s: can not add heap with invalid ops struct.\n", __func__); spin_lock_init(&heap->free_lock); + spin_lock_init(&heap->stat_lock); heap->free_list_size = 0; if (heap->flags & ION_HEAP_FLAG_DEFER_FREE) @@ -546,6 +632,33 @@ void ion_device_add_heap(struct ion_heap *heap) } heap->dev = dev; + heap->num_of_buffers = 0; + heap->num_of_alloc_bytes = 0; + heap->alloc_bytes_wm = 0; + + heap_root = debugfs_create_dir(heap->name, dev->debug_root); + debugfs_create_u64("num_of_buffers", + 0444, heap_root, + &heap->num_of_buffers); + debugfs_create_u64("num_of_alloc_bytes", + 0444, + heap_root, + &heap->num_of_alloc_bytes); + debugfs_create_u64("alloc_bytes_wm", + 0444, + heap_root, + &heap->alloc_bytes_wm); + + if (heap->shrinker.count_objects && + heap->shrinker.scan_objects) { + snprintf(debug_name, 64, "%s_shrink", heap->name); + debugfs_create_file(debug_name, + 0644, + heap_root, + heap, + &debug_shrink_fops); + } + down_write(&dev->lock); heap->id = heap_id++; /* @@ -555,14 +668,6 @@ void ion_device_add_heap(struct ion_heap *heap) plist_node_init(&heap->node, -heap->id); plist_add(&heap->node, &dev->heaps); - if (heap->shrinker.count_objects && heap->shrinker.scan_objects) { - char debug_name[64]; - - snprintf(debug_name, 64, "%s_shrink", heap->name); - debugfs_create_file(debug_name, 0644, dev->debug_root, - heap, &debug_shrink_fops); - } - dev->heap_cnt++; up_write(&dev->lock); } diff --git a/drivers/staging/android/ion/ion.h b/drivers/staging/android/ion/ion.h index c006fc1e5a16..e291299fd35f 100644 --- a/drivers/staging/android/ion/ion.h +++ b/drivers/staging/android/ion/ion.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * drivers/staging/android/ion/ion.h + * ION Memory Allocator kernel interface header * * Copyright (C) 2011 Google, Inc. */ @@ -22,32 +22,9 @@ #include "../uapi/ion.h" /** - * struct ion_platform_heap - defines a heap in the given platform - * @type: type of the heap from ion_heap_type enum - * @id: unique identifier for heap. When allocating higher numb ers - * will be allocated from first. At allocation these are passed - * as a bit mask and therefore can not exceed ION_NUM_HEAP_IDS. - * @name: used for debug purposes - * @base: base address of heap in physical memory if applicable - * @size: size of the heap in bytes if applicable - * @priv: private info passed from the board file - * - * Provided by the board file. - */ -struct ion_platform_heap { - enum ion_heap_type type; - unsigned int id; - const char *name; - phys_addr_t base; - size_t size; - phys_addr_t align; - void *priv; -}; - -/** * struct ion_buffer - metadata for a particular buffer - * @ref: reference count * @node: node in the ion_device buffers tree + * @list: element in list of deferred freeable buffers * @dev: back pointer to the ion_device * @heap: back pointer to the heap the buffer came from * @flags: buffer specific flags @@ -58,7 +35,8 @@ struct ion_platform_heap { * @lock: protects the buffers cnt fields * @kmap_cnt: number of times the buffer is mapped to the kernel * @vaddr: the kernel mapping if kmap_cnt is not zero - * @sg_table: the sg table for the buffer if dmap_cnt is not zero + * @sg_table: the sg table for the buffer + * @attachments: list of devices attached to this buffer */ struct ion_buffer { union { @@ -157,6 +135,9 @@ struct ion_heap_ops { * @lock: protects the free list * @waitqueue: queue to wait on from deferred free thread * @task: task struct of deferred free thread + * @num_of_buffers the number of currently allocated buffers + * @num_of_alloc_bytes the number of allocated bytes + * @alloc_bytes_wm the number of allocated bytes watermark * * Represents a pool of memory from which buffers can be made. In some * systems the only heap is regular system memory allocated via vmalloc. @@ -171,12 +152,22 @@ struct ion_heap { unsigned long flags; unsigned int id; const char *name; + + /* deferred free support */ struct shrinker shrinker; struct list_head free_list; size_t free_list_size; spinlock_t free_lock; wait_queue_head_t waitqueue; struct task_struct *task; + + /* heap statistics */ + u64 num_of_buffers; + u64 num_of_alloc_bytes; + u64 alloc_bytes_wm; + + /* protect heap statistics */ + spinlock_t stat_lock; }; /** @@ -196,10 +187,6 @@ int ion_heap_map_user(struct ion_heap *heap, struct ion_buffer *buffer, int ion_heap_buffer_zero(struct ion_buffer *buffer); int ion_heap_pages_zero(struct page *page, size_t size, pgprot_t pgprot); -int ion_alloc(size_t len, - unsigned int heap_id_mask, - unsigned int flags); - /** * ion_heap_init_shrinker * @heap: the heap @@ -321,8 +308,4 @@ void ion_page_pool_free(struct ion_page_pool *pool, struct page *page); int ion_page_pool_shrink(struct ion_page_pool *pool, gfp_t gfp_mask, int nr_to_scan); -long ion_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); - -int ion_query_heaps(struct ion_heap_query *query); - #endif /* _ION_H */ diff --git a/drivers/staging/android/ion/ion_carveout_heap.c b/drivers/staging/android/ion/ion_carveout_heap.c index e129237a0417..bb9d614767a2 100644 --- a/drivers/staging/android/ion/ion_carveout_heap.c +++ b/drivers/staging/android/ion/ion_carveout_heap.c @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 /* - * drivers/staging/android/ion/ion_carveout_heap.c + * ION Memory Allocator carveout heap helper * * Copyright (C) 2011 Google, Inc. */ -#include <linux/spinlock.h> + #include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/genalloc.h> @@ -12,7 +12,7 @@ #include <linux/mm.h> #include <linux/scatterlist.h> #include <linux/slab.h> -#include <linux/vmalloc.h> + #include "ion.h" #define ION_CARVEOUT_ALLOCATE_FAIL -1 @@ -20,7 +20,6 @@ struct ion_carveout_heap { struct ion_heap heap; struct gen_pool *pool; - phys_addr_t base; }; static phys_addr_t ion_carveout_allocate(struct ion_heap *heap, @@ -44,6 +43,7 @@ static void ion_carveout_free(struct ion_heap *heap, phys_addr_t addr, if (addr == ION_CARVEOUT_ALLOCATE_FAIL) return; + gen_pool_free(carveout_heap->pool, addr, size); } @@ -103,17 +103,14 @@ static struct ion_heap_ops carveout_heap_ops = { .unmap_kernel = ion_heap_unmap_kernel, }; -struct ion_heap *ion_carveout_heap_create(struct ion_platform_heap *heap_data) +struct ion_heap *ion_carveout_heap_create(phys_addr_t base, size_t size) { struct ion_carveout_heap *carveout_heap; int ret; struct page *page; - size_t size; - - page = pfn_to_page(PFN_DOWN(heap_data->base)); - size = heap_data->size; + page = pfn_to_page(PFN_DOWN(base)); ret = ion_heap_pages_zero(page, size, pgprot_writecombine(PAGE_KERNEL)); if (ret) return ERR_PTR(ret); @@ -127,9 +124,7 @@ struct ion_heap *ion_carveout_heap_create(struct ion_platform_heap *heap_data) kfree(carveout_heap); return ERR_PTR(-ENOMEM); } - carveout_heap->base = heap_data->base; - gen_pool_add(carveout_heap->pool, carveout_heap->base, heap_data->size, - -1); + gen_pool_add(carveout_heap->pool, base, size, -1); carveout_heap->heap.ops = &carveout_heap_ops; carveout_heap->heap.type = ION_HEAP_TYPE_CARVEOUT; carveout_heap->heap.flags = ION_HEAP_FLAG_DEFER_FREE; diff --git a/drivers/staging/android/ion/ion_chunk_heap.c b/drivers/staging/android/ion/ion_chunk_heap.c index 159d72f5bc42..3cdde9c1a717 100644 --- a/drivers/staging/android/ion/ion_chunk_heap.c +++ b/drivers/staging/android/ion/ion_chunk_heap.c @@ -1,23 +1,22 @@ // SPDX-License-Identifier: GPL-2.0 /* - * drivers/staging/android/ion/ion_chunk_heap.c + * ION memory allocator chunk heap helper * * Copyright (C) 2012 Google, Inc. */ + #include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/genalloc.h> -#include <linux/io.h> #include <linux/mm.h> #include <linux/scatterlist.h> #include <linux/slab.h> -#include <linux/vmalloc.h> + #include "ion.h" struct ion_chunk_heap { struct ion_heap heap; struct gen_pool *pool; - phys_addr_t base; unsigned long chunk_size; unsigned long size; unsigned long allocated; @@ -108,16 +107,13 @@ static struct ion_heap_ops chunk_heap_ops = { .unmap_kernel = ion_heap_unmap_kernel, }; -struct ion_heap *ion_chunk_heap_create(struct ion_platform_heap *heap_data) +struct ion_heap *ion_chunk_heap_create(phys_addr_t base, size_t size, size_t chunk_size) { struct ion_chunk_heap *chunk_heap; int ret; struct page *page; - size_t size; - - page = pfn_to_page(PFN_DOWN(heap_data->base)); - size = heap_data->size; + page = pfn_to_page(PFN_DOWN(base)); ret = ion_heap_pages_zero(page, size, pgprot_writecombine(PAGE_KERNEL)); if (ret) return ERR_PTR(ret); @@ -126,23 +122,21 @@ struct ion_heap *ion_chunk_heap_create(struct ion_platform_heap *heap_data) if (!chunk_heap) return ERR_PTR(-ENOMEM); - chunk_heap->chunk_size = (unsigned long)heap_data->priv; + chunk_heap->chunk_size = chunk_size; chunk_heap->pool = gen_pool_create(get_order(chunk_heap->chunk_size) + PAGE_SHIFT, -1); if (!chunk_heap->pool) { ret = -ENOMEM; goto error_gen_pool_create; } - chunk_heap->base = heap_data->base; - chunk_heap->size = heap_data->size; + chunk_heap->size = size; chunk_heap->allocated = 0; - gen_pool_add(chunk_heap->pool, chunk_heap->base, heap_data->size, -1); + gen_pool_add(chunk_heap->pool, base, size, -1); chunk_heap->heap.ops = &chunk_heap_ops; chunk_heap->heap.type = ION_HEAP_TYPE_CHUNK; chunk_heap->heap.flags = ION_HEAP_FLAG_DEFER_FREE; - pr_debug("%s: base %pa size %zu\n", __func__, - &chunk_heap->base, heap_data->size); + pr_debug("%s: base %pa size %zu\n", __func__, &base, size); return &chunk_heap->heap; @@ -150,4 +144,3 @@ error_gen_pool_create: kfree(chunk_heap); return ERR_PTR(ret); } - diff --git a/drivers/staging/android/ion/ion_cma_heap.c b/drivers/staging/android/ion/ion_cma_heap.c index 3fafd013d80a..bf65e67ef9d8 100644 --- a/drivers/staging/android/ion/ion_cma_heap.c +++ b/drivers/staging/android/ion/ion_cma_heap.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * drivers/staging/android/ion/ion_cma_heap.c + * ION Memory Allocator CMA heap exporter * * Copyright (C) Linaro 2012 * Author: <benjamin.gaignard@linaro.org> for ST-Ericsson. @@ -111,10 +111,6 @@ static struct ion_heap *__ion_cma_heap_create(struct cma *cma) return ERR_PTR(-ENOMEM); cma_heap->heap.ops = &ion_cma_ops; - /* - * get device from private heaps data, later it will be - * used to make the link with reserved CMA memory - */ cma_heap->cma = cma; cma_heap->heap.type = ION_HEAP_TYPE_DMA; return &cma_heap->heap; diff --git a/drivers/staging/android/ion/ion_heap.c b/drivers/staging/android/ion/ion_heap.c index 31db510018a9..473b465724f1 100644 --- a/drivers/staging/android/ion/ion_heap.c +++ b/drivers/staging/android/ion/ion_heap.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * drivers/staging/android/ion/ion_heap.c + * ION Memory Allocator generic heap helpers * * Copyright (C) 2011 Google, Inc. */ @@ -14,6 +14,7 @@ #include <uapi/linux/sched/types.h> #include <linux/scatterlist.h> #include <linux/vmalloc.h> + #include "ion.h" void *ion_heap_map_kernel(struct ion_heap *heap, @@ -92,6 +93,7 @@ int ion_heap_map_user(struct ion_heap *heap, struct ion_buffer *buffer, if (addr >= vma->vm_end) return 0; } + return 0; } @@ -254,6 +256,7 @@ int ion_heap_init_deferred_free(struct ion_heap *heap) return PTR_ERR_OR_ZERO(heap->task); } sched_setscheduler(heap->task, SCHED_IDLE, ¶m); + return 0; } @@ -265,8 +268,10 @@ static unsigned long ion_heap_shrink_count(struct shrinker *shrinker, int total = 0; total = ion_heap_freelist_size(heap) / PAGE_SIZE; + if (heap->ops->shrink) total += heap->ops->shrink(heap, sc->gfp_mask, 0); + return total; } @@ -295,6 +300,7 @@ static unsigned long ion_heap_shrink_scan(struct shrinker *shrinker, if (heap->ops->shrink) freed += heap->ops->shrink(heap, sc->gfp_mask, to_scan); + return freed; } diff --git a/drivers/staging/android/ion/ion_page_pool.c b/drivers/staging/android/ion/ion_page_pool.c index 0d2a95957ee8..fd4995fb676e 100644 --- a/drivers/staging/android/ion/ion_page_pool.c +++ b/drivers/staging/android/ion/ion_page_pool.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * drivers/staging/android/ion/ion_mem_pool.c + * ION Memory Allocator page pool helpers * * Copyright (C) 2011 Google, Inc. */ diff --git a/drivers/staging/android/ion/ion_system_heap.c b/drivers/staging/android/ion/ion_system_heap.c index 548bb02c0ca6..aa8d8425be25 100644 --- a/drivers/staging/android/ion/ion_system_heap.c +++ b/drivers/staging/android/ion/ion_system_heap.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * drivers/staging/android/ion/ion_system_heap.c + * ION Memory Allocator system heap exporter * * Copyright (C) 2011 Google, Inc. */ @@ -11,9 +11,9 @@ #include <linux/highmem.h> #include <linux/mm.h> #include <linux/scatterlist.h> -#include <linux/seq_file.h> #include <linux/slab.h> #include <linux/vmalloc.h> + #include "ion.h" #define NUM_ORDERS ARRAY_SIZE(orders) @@ -110,7 +110,7 @@ static int ion_system_heap_allocate(struct ion_heap *heap, unsigned long size_remaining = PAGE_ALIGN(size); unsigned int max_order = orders[0]; - if (size / PAGE_SIZE > totalram_pages / 2) + if (size / PAGE_SIZE > totalram_pages() / 2) return -ENOMEM; INIT_LIST_HEAD(&pages); @@ -224,10 +224,10 @@ static void ion_system_heap_destroy_pools(struct ion_page_pool **pools) static int ion_system_heap_create_pools(struct ion_page_pool **pools) { int i; - gfp_t gfp_flags = low_order_gfp_flags; for (i = 0; i < NUM_ORDERS; i++) { struct ion_page_pool *pool; + gfp_t gfp_flags = low_order_gfp_flags; if (orders[i] > 4) gfp_flags = high_order_gfp_flags; @@ -237,6 +237,7 @@ static int ion_system_heap_create_pools(struct ion_page_pool **pools) goto err_create_pool; pools[i] = pool; } + return 0; err_create_pool: @@ -275,6 +276,7 @@ static int ion_system_heap_create(void) heap->name = "ion_system_heap"; ion_device_add_heap(heap); + return 0; } device_initcall(ion_system_heap_create); @@ -356,6 +358,7 @@ static struct ion_heap *__ion_system_contig_heap_create(void) heap->ops = &kmalloc_ops; heap->type = ION_HEAP_TYPE_SYSTEM_CONTIG; heap->name = "ion_system_contig_heap"; + return heap; } @@ -368,7 +371,7 @@ static int ion_system_contig_heap_create(void) return PTR_ERR(heap); ion_device_add_heap(heap); + return 0; } device_initcall(ion_system_contig_heap_create); - diff --git a/drivers/staging/android/uapi/ion.h b/drivers/staging/android/uapi/ion.h index 5d7009884c13..46c93fcb46d6 100644 --- a/drivers/staging/android/uapi/ion.h +++ b/drivers/staging/android/uapi/ion.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * drivers/staging/android/uapi/ion.h * diff --git a/drivers/staging/android/vsoc.c b/drivers/staging/android/vsoc.c index 22571abcaa4e..8a75bd27c413 100644 --- a/drivers/staging/android/vsoc.c +++ b/drivers/staging/android/vsoc.c @@ -29,7 +29,6 @@ #include <linux/syscalls.h> #include <linux/uaccess.h> #include <linux/interrupt.h> -#include <linux/mutex.h> #include <linux/cdev.h> #include <linux/file.h> #include "uapi/vsoc_shm.h" diff --git a/drivers/staging/axis-fifo/Kconfig b/drivers/staging/axis-fifo/Kconfig index 687537203d9c..d9725888af6f 100644 --- a/drivers/staging/axis-fifo/Kconfig +++ b/drivers/staging/axis-fifo/Kconfig @@ -3,6 +3,7 @@ # config XIL_AXIS_FIFO tristate "Xilinx AXI-Stream FIFO IP core driver" + depends on OF default n help This adds support for the Xilinx AXI-Stream diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c index c18bf31f55b6..805437fa249a 100644 --- a/drivers/staging/axis-fifo/axis-fifo.c +++ b/drivers/staging/axis-fifo/axis-fifo.c @@ -485,7 +485,8 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf, ioread32(fifo->base_addr + XLLF_TDFV_OFFSET) >= words_to_write, fifo->write_queue_lock, - (write_timeout >= 0) ? msecs_to_jiffies(write_timeout) : + (write_timeout >= 0) ? + msecs_to_jiffies(write_timeout) : MAX_SCHEDULE_TIMEOUT); spin_unlock_irq(&fifo->write_queue_lock); diff --git a/drivers/staging/comedi/comedi_compat32.c b/drivers/staging/comedi/comedi_compat32.c index fa9d239474ee..36a3564ba1fb 100644 --- a/drivers/staging/comedi/comedi_compat32.c +++ b/drivers/staging/comedi/comedi_compat32.c @@ -102,8 +102,8 @@ static int compat_chaninfo(struct file *file, unsigned long arg) chaninfo = compat_alloc_user_space(sizeof(*chaninfo)); /* Copy chaninfo structure. Ignore unused members. */ - if (!access_ok(VERIFY_READ, chaninfo32, sizeof(*chaninfo32)) || - !access_ok(VERIFY_WRITE, chaninfo, sizeof(*chaninfo))) + if (!access_ok(chaninfo32, sizeof(*chaninfo32)) || + !access_ok(chaninfo, sizeof(*chaninfo))) return -EFAULT; err = 0; @@ -136,8 +136,8 @@ static int compat_rangeinfo(struct file *file, unsigned long arg) rangeinfo = compat_alloc_user_space(sizeof(*rangeinfo)); /* Copy rangeinfo structure. */ - if (!access_ok(VERIFY_READ, rangeinfo32, sizeof(*rangeinfo32)) || - !access_ok(VERIFY_WRITE, rangeinfo, sizeof(*rangeinfo))) + if (!access_ok(rangeinfo32, sizeof(*rangeinfo32)) || + !access_ok(rangeinfo, sizeof(*rangeinfo))) return -EFAULT; err = 0; @@ -163,8 +163,8 @@ static int get_compat_cmd(struct comedi_cmd __user *cmd, } temp; /* Copy cmd structure. */ - if (!access_ok(VERIFY_READ, cmd32, sizeof(*cmd32)) || - !access_ok(VERIFY_WRITE, cmd, sizeof(*cmd))) + if (!access_ok(cmd32, sizeof(*cmd32)) || + !access_ok(cmd, sizeof(*cmd))) return -EFAULT; err = 0; @@ -217,8 +217,8 @@ static int put_compat_cmd(struct comedi32_cmd_struct __user *cmd32, * Assume the pointer values are already valid. * (Could use ptr_to_compat() to set them.) */ - if (!access_ok(VERIFY_READ, cmd, sizeof(*cmd)) || - !access_ok(VERIFY_WRITE, cmd32, sizeof(*cmd32))) + if (!access_ok(cmd, sizeof(*cmd)) || + !access_ok(cmd32, sizeof(*cmd32))) return -EFAULT; err = 0; @@ -317,8 +317,8 @@ static int get_compat_insn(struct comedi_insn __user *insn, /* Copy insn structure. Ignore the unused members. */ err = 0; - if (!access_ok(VERIFY_READ, insn32, sizeof(*insn32)) || - !access_ok(VERIFY_WRITE, insn, sizeof(*insn))) + if (!access_ok(insn32, sizeof(*insn32)) || + !access_ok(insn, sizeof(*insn))) return -EFAULT; err |= __get_user(temp.uint, &insn32->insn); @@ -350,7 +350,7 @@ static int compat_insnlist(struct file *file, unsigned long arg) insnlist32 = compat_ptr(arg); /* Get 32-bit insnlist structure. */ - if (!access_ok(VERIFY_READ, insnlist32, sizeof(*insnlist32))) + if (!access_ok(insnlist32, sizeof(*insnlist32))) return -EFAULT; err = 0; @@ -365,7 +365,7 @@ static int compat_insnlist(struct file *file, unsigned long arg) insn[n_insns])); /* Set native insnlist structure. */ - if (!access_ok(VERIFY_WRITE, &s->insnlist, sizeof(s->insnlist))) + if (!access_ok(&s->insnlist, sizeof(s->insnlist))) return -EFAULT; err |= __put_user(n_insns, &s->insnlist.n_insns); diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c index c1c6b2b4ab91..0caae4a5c471 100644 --- a/drivers/staging/comedi/comedi_fops.c +++ b/drivers/staging/comedi/comedi_fops.c @@ -1209,6 +1209,7 @@ static int check_insn_config_length(struct comedi_insn *insn, break; case INSN_CONFIG_PWM_OUTPUT: case INSN_CONFIG_ANALOG_TRIG: + case INSN_CONFIG_TIMER_1: if (insn->n == 5) return 0; break; @@ -1500,25 +1501,21 @@ out: * data (for reads) to insns[].data pointers */ /* arbitrary limits */ -#define MAX_SAMPLES 256 +#define MIN_SAMPLES 16 +#define MAX_SAMPLES 65536 static int do_insnlist_ioctl(struct comedi_device *dev, struct comedi_insnlist __user *arg, void *file) { struct comedi_insnlist insnlist; struct comedi_insn *insns = NULL; unsigned int *data = NULL; + unsigned int max_n_data_required = MIN_SAMPLES; int i = 0; int ret = 0; if (copy_from_user(&insnlist, arg, sizeof(insnlist))) return -EFAULT; - data = kmalloc_array(MAX_SAMPLES, sizeof(unsigned int), GFP_KERNEL); - if (!data) { - ret = -ENOMEM; - goto error; - } - insns = kcalloc(insnlist.n_insns, sizeof(*insns), GFP_KERNEL); if (!insns) { ret = -ENOMEM; @@ -1532,13 +1529,26 @@ static int do_insnlist_ioctl(struct comedi_device *dev, goto error; } - for (i = 0; i < insnlist.n_insns; i++) { + /* Determine maximum memory needed for all instructions. */ + for (i = 0; i < insnlist.n_insns; ++i) { if (insns[i].n > MAX_SAMPLES) { dev_dbg(dev->class_dev, "number of samples too large\n"); ret = -EINVAL; goto error; } + max_n_data_required = max(max_n_data_required, insns[i].n); + } + + /* Allocate scratch space for all instruction data. */ + data = kmalloc_array(max_n_data_required, sizeof(unsigned int), + GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto error; + } + + for (i = 0; i < insnlist.n_insns; ++i) { if (insns[i].insn & INSN_MASK_WRITE) { if (copy_from_user(data, insns[i].data, insns[i].n * sizeof(unsigned int))) { @@ -1592,22 +1602,26 @@ static int do_insn_ioctl(struct comedi_device *dev, { struct comedi_insn insn; unsigned int *data = NULL; + unsigned int n_data = MIN_SAMPLES; int ret = 0; - data = kmalloc_array(MAX_SAMPLES, sizeof(unsigned int), GFP_KERNEL); - if (!data) { - ret = -ENOMEM; - goto error; + if (copy_from_user(&insn, arg, sizeof(insn))) + return -EFAULT; + + n_data = max(n_data, insn.n); + + /* This is where the behavior of insn and insnlist deviate. */ + if (insn.n > MAX_SAMPLES) { + insn.n = MAX_SAMPLES; + n_data = MAX_SAMPLES; } - if (copy_from_user(&insn, arg, sizeof(insn))) { - ret = -EFAULT; + data = kmalloc_array(n_data, sizeof(unsigned int), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; goto error; } - /* This is where the behavior of insn and insnlist deviate. */ - if (insn.n > MAX_SAMPLES) - insn.n = MAX_SAMPLES; if (insn.insn & INSN_MASK_WRITE) { if (copy_from_user(data, insn.data, diff --git a/drivers/staging/comedi/comedidev.h b/drivers/staging/comedi/comedidev.h index a7d569cfca5d..0dff1ac057cd 100644 --- a/drivers/staging/comedi/comedidev.h +++ b/drivers/staging/comedi/comedidev.h @@ -1001,6 +1001,8 @@ int comedi_dio_insn_config(struct comedi_device *dev, unsigned int mask); unsigned int comedi_dio_update_state(struct comedi_subdevice *s, unsigned int *data); +unsigned int comedi_bytes_per_scan_cmd(struct comedi_subdevice *s, + struct comedi_cmd *cmd); unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s); unsigned int comedi_nscans_left(struct comedi_subdevice *s, unsigned int nscans); diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c index eefa62f42c0f..5a32b8fc000e 100644 --- a/drivers/staging/comedi/drivers.c +++ b/drivers/staging/comedi/drivers.c @@ -394,11 +394,13 @@ unsigned int comedi_dio_update_state(struct comedi_subdevice *s, EXPORT_SYMBOL_GPL(comedi_dio_update_state); /** - * comedi_bytes_per_scan() - Get length of asynchronous command "scan" in bytes + * comedi_bytes_per_scan_cmd() - Get length of asynchronous command "scan" in + * bytes * @s: COMEDI subdevice. + * @cmd: COMEDI command. * * Determines the overall scan length according to the subdevice type and the - * number of channels in the scan. + * number of channels in the scan for the specified command. * * For digital input, output or input/output subdevices, samples for * multiple channels are assumed to be packed into one or more unsigned @@ -408,9 +410,9 @@ EXPORT_SYMBOL_GPL(comedi_dio_update_state); * * Returns the overall scan length in bytes. */ -unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s) +unsigned int comedi_bytes_per_scan_cmd(struct comedi_subdevice *s, + struct comedi_cmd *cmd) { - struct comedi_cmd *cmd = &s->async->cmd; unsigned int num_samples; unsigned int bits_per_sample; @@ -427,6 +429,29 @@ unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s) } return comedi_samples_to_bytes(s, num_samples); } +EXPORT_SYMBOL_GPL(comedi_bytes_per_scan_cmd); + +/** + * comedi_bytes_per_scan() - Get length of asynchronous command "scan" in bytes + * @s: COMEDI subdevice. + * + * Determines the overall scan length according to the subdevice type and the + * number of channels in the scan for the current command. + * + * For digital input, output or input/output subdevices, samples for + * multiple channels are assumed to be packed into one or more unsigned + * short or unsigned int values according to the subdevice's %SDF_LSAMPL + * flag. For other types of subdevice, samples are assumed to occupy a + * whole unsigned short or unsigned int according to the %SDF_LSAMPL flag. + * + * Returns the overall scan length in bytes. + */ +unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s) +{ + struct comedi_cmd *cmd = &s->async->cmd; + + return comedi_bytes_per_scan_cmd(s, cmd); +} EXPORT_SYMBOL_GPL(comedi_bytes_per_scan); static unsigned int __comedi_nscans_left(struct comedi_subdevice *s, diff --git a/drivers/staging/comedi/drivers/8255.h b/drivers/staging/comedi/drivers/8255.h index 6cd1339ab83e..ceae3ca52e60 100644 --- a/drivers/staging/comedi/drivers/8255.h +++ b/drivers/staging/comedi/drivers/8255.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * module/8255.h * Header file for 8255 diff --git a/drivers/staging/comedi/drivers/addi_apci_3501.c b/drivers/staging/comedi/drivers/addi_apci_3501.c index a38267928e5e..b4aa588975df 100644 --- a/drivers/staging/comedi/drivers/addi_apci_3501.c +++ b/drivers/staging/comedi/drivers/addi_apci_3501.c @@ -258,8 +258,15 @@ static int apci3501_eeprom_insn_read(struct comedi_device *dev, { struct apci3501_private *devpriv = dev->private; unsigned short addr = CR_CHAN(insn->chanspec); + unsigned int val; + unsigned int i; - data[0] = apci3501_eeprom_readw(devpriv->amcc, 2 * addr); + if (insn->n) { + /* No point reading the same EEPROM location more than once. */ + val = apci3501_eeprom_readw(devpriv->amcc, 2 * addr); + for (i = 0; i < insn->n; i++) + data[i] = val; + } return insn->n; } diff --git a/drivers/staging/comedi/drivers/amplc_dio200.h b/drivers/staging/comedi/drivers/amplc_dio200.h index 4c3e4c37c4c5..1d81393be6df 100644 --- a/drivers/staging/comedi/drivers/amplc_dio200.h +++ b/drivers/staging/comedi/drivers/amplc_dio200.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * comedi/drivers/amplc_dio.h * diff --git a/drivers/staging/comedi/drivers/amplc_pc236.h b/drivers/staging/comedi/drivers/amplc_pc236.h index 4b67090aab54..45e933ee8735 100644 --- a/drivers/staging/comedi/drivers/amplc_pc236.h +++ b/drivers/staging/comedi/drivers/amplc_pc236.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * comedi/drivers/amplc_pc236.h * Header for "amplc_pc236", "amplc_pci236" and "amplc_pc236_common". diff --git a/drivers/staging/comedi/drivers/cb_pcidas.c b/drivers/staging/comedi/drivers/cb_pcidas.c index 8429d57087fd..02ae00c95313 100644 --- a/drivers/staging/comedi/drivers/cb_pcidas.c +++ b/drivers/staging/comedi/drivers/cb_pcidas.c @@ -116,7 +116,7 @@ #define PCIDAS_TRIG_SEL_ANALOG PCIDAS_TRIG_SEL(3) /* ext. analog trigger */ #define PCIDAS_TRIG_SEL_MASK PCIDAS_TRIG_SEL(3) /* start trigger mask */ #define PCIDAS_TRIG_POL BIT(2) /* invert trigger (1602 only) */ -#define PCIDAS_TRIG_MODE BIT(3) /* edge/level trigerred (1602 only) */ +#define PCIDAS_TRIG_MODE BIT(3) /* edge/level triggered (1602 only) */ #define PCIDAS_TRIG_EN BIT(4) /* enable external start trigger */ #define PCIDAS_TRIG_BURSTE BIT(5) /* burst mode enable */ #define PCIDAS_TRIG_CLR BIT(7) /* clear external trigger */ diff --git a/drivers/staging/comedi/drivers/cb_pcidas64.c b/drivers/staging/comedi/drivers/cb_pcidas64.c index 631a703b345d..e1774e09a320 100644 --- a/drivers/staging/comedi/drivers/cb_pcidas64.c +++ b/drivers/staging/comedi/drivers/cb_pcidas64.c @@ -3097,8 +3097,10 @@ static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, { const struct pcidas64_board *board = dev->board_ptr; struct pcidas64_private *devpriv = dev->private; - int chan = CR_CHAN(insn->chanspec); - int range = CR_RANGE(insn->chanspec); + unsigned int chan = CR_CHAN(insn->chanspec); + unsigned int range = CR_RANGE(insn->chanspec); + unsigned int val = s->readback[chan]; + unsigned int i; /* do some initializing */ writew(0, devpriv->main_iobase + DAC_CONTROL0_REG); @@ -3108,20 +3110,24 @@ static int ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s, writew(devpriv->dac_control1_bits, devpriv->main_iobase + DAC_CONTROL1_REG); - /* write to channel */ - if (board->layout == LAYOUT_4020) { - writew(data[0] & 0xff, - devpriv->main_iobase + dac_lsb_4020_reg(chan)); - writew((data[0] >> 8) & 0xf, - devpriv->main_iobase + dac_msb_4020_reg(chan)); - } else { - writew(data[0], devpriv->main_iobase + dac_convert_reg(chan)); + for (i = 0; i < insn->n; i++) { + /* write to channel */ + val = data[i]; + if (board->layout == LAYOUT_4020) { + writew(val & 0xff, + devpriv->main_iobase + dac_lsb_4020_reg(chan)); + writew((val >> 8) & 0xf, + devpriv->main_iobase + dac_msb_4020_reg(chan)); + } else { + writew(val, + devpriv->main_iobase + dac_convert_reg(chan)); + } } - /* remember output value */ - s->readback[chan] = data[0]; + /* remember last output value */ + s->readback[chan] = val; - return 1; + return insn->n; } static void set_dac_control0_reg(struct comedi_device *dev, @@ -3762,9 +3768,17 @@ static int eeprom_read_insn(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { - data[0] = read_eeprom(dev, CR_CHAN(insn->chanspec)); + unsigned int val; + unsigned int i; - return 1; + if (insn->n) { + /* No point reading the same EEPROM location more than once. */ + val = read_eeprom(dev, CR_CHAN(insn->chanspec)); + for (i = 0; i < insn->n; i++) + data[i] = val; + } + + return insn->n; } /* Allocate and initialize the subdevice structures. */ diff --git a/drivers/staging/comedi/drivers/cb_pcidda.c b/drivers/staging/comedi/drivers/cb_pcidda.c index 807a31e75883..1d09dd265ab7 100644 --- a/drivers/staging/comedi/drivers/cb_pcidda.c +++ b/drivers/staging/comedi/drivers/cb_pcidda.c @@ -291,6 +291,7 @@ static int cb_pcidda_ao_insn_write(struct comedi_device *dev, unsigned int channel = CR_CHAN(insn->chanspec); unsigned int range = CR_RANGE(insn->chanspec); unsigned int ctrl; + unsigned int i; if (range != devpriv->ao_range[channel]) cb_pcidda_calibrate(dev, channel, range); @@ -317,7 +318,8 @@ static int cb_pcidda_ao_insn_write(struct comedi_device *dev, outw(ctrl, devpriv->daqio + CB_DDA_DA_CTRL_REG); - outw(data[0], devpriv->daqio + CB_DDA_DA_DATA_REG(channel)); + for (i = 0; i < insn->n; i++) + outw(data[i], devpriv->daqio + CB_DDA_DA_DATA_REG(channel)); return insn->n; } diff --git a/drivers/staging/comedi/drivers/cb_pcimdas.c b/drivers/staging/comedi/drivers/cb_pcimdas.c index 4e72a0778086..a9d052bfda38 100644 --- a/drivers/staging/comedi/drivers/cb_pcimdas.c +++ b/drivers/staging/comedi/drivers/cb_pcimdas.c @@ -252,9 +252,9 @@ static int cb_pcimdas_di_insn_bits(struct comedi_device *dev, } static int cb_pcimdas_do_insn_bits(struct comedi_device *dev, - struct comedi_subdevice *s, - struct comedi_insn *insn, - unsigned int *data) + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) { struct cb_pcimdas_private *devpriv = dev->private; diff --git a/drivers/staging/comedi/drivers/comedi_8254.h b/drivers/staging/comedi/drivers/comedi_8254.h index 7faa2185282e..d8264417e53c 100644 --- a/drivers/staging/comedi/drivers/comedi_8254.h +++ b/drivers/staging/comedi/drivers/comedi_8254.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * comedi_8254.h * Generic 8254 timer/counter support diff --git a/drivers/staging/comedi/drivers/comedi_isadma.h b/drivers/staging/comedi/drivers/comedi_isadma.h index ccef7c9c0a4d..2bd1329d727f 100644 --- a/drivers/staging/comedi/drivers/comedi_isadma.h +++ b/drivers/staging/comedi/drivers/comedi_isadma.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * COMEDI ISA DMA support functions * Copyright (c) 2014 H Hartley Sweeten <hsweeten@visionengravers.com> diff --git a/drivers/staging/comedi/drivers/das08.h b/drivers/staging/comedi/drivers/das08.h index 235d32f7c817..ef65a7e504ee 100644 --- a/drivers/staging/comedi/drivers/das08.h +++ b/drivers/staging/comedi/drivers/das08.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * das08.h * diff --git a/drivers/staging/comedi/drivers/dt9812.c b/drivers/staging/comedi/drivers/dt9812.c index 75cc9e8e5b94..9f165f1cefa5 100644 --- a/drivers/staging/comedi/drivers/dt9812.c +++ b/drivers/staging/comedi/drivers/dt9812.c @@ -40,7 +40,7 @@ #define DT9812_MAX_WRITE_CMD_PIPE_SIZE 32 #define DT9812_MAX_READ_CMD_PIPE_SIZE 32 -/* usb_bulk_msg() timout in milliseconds */ +/* usb_bulk_msg() timeout in milliseconds */ #define DT9812_USB_TIMEOUT 1000 /* diff --git a/drivers/staging/comedi/drivers/mite.h b/drivers/staging/comedi/drivers/mite.h index d5e27ac25df8..c6c056069bb7 100644 --- a/drivers/staging/comedi/drivers/mite.h +++ b/drivers/staging/comedi/drivers/mite.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * module/mite.h * Hardware driver for NI Mite PCI interface chip diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c index e70a461e723f..405573e927cf 100644 --- a/drivers/staging/comedi/drivers/ni_660x.c +++ b/drivers/staging/comedi/drivers/ni_660x.c @@ -656,6 +656,7 @@ static int ni_660x_set_pfi_routing(struct comedi_device *dev, case NI_660X_PFI_OUTPUT_DIO: if (chan > 31) return -EINVAL; + break; default: return -EINVAL; } diff --git a/drivers/staging/comedi/drivers/ni_labpc.h b/drivers/staging/comedi/drivers/ni_labpc.h index f685047efb67..728e901f53cd 100644 --- a/drivers/staging/comedi/drivers/ni_labpc.h +++ b/drivers/staging/comedi/drivers/ni_labpc.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Header for ni_labpc ISA/PCMCIA/PCI drivers * diff --git a/drivers/staging/comedi/drivers/ni_labpc_common.c b/drivers/staging/comedi/drivers/ni_labpc_common.c index 7fa2d39562db..406952f5521d 100644 --- a/drivers/staging/comedi/drivers/ni_labpc_common.c +++ b/drivers/staging/comedi/drivers/ni_labpc_common.c @@ -906,7 +906,9 @@ static int labpc_ao_insn_write(struct comedi_device *dev, { const struct labpc_boardinfo *board = dev->board_ptr; struct labpc_private *devpriv = dev->private; - int channel, range; + unsigned int channel; + unsigned int range; + unsigned int i; unsigned long flags; channel = CR_CHAN(insn->chanspec); @@ -932,9 +934,10 @@ static int labpc_ao_insn_write(struct comedi_device *dev, devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG); } /* send data */ - labpc_ao_write(dev, s, channel, data[0]); + for (i = 0; i < insn->n; i++) + labpc_ao_write(dev, s, channel, data[i]); - return 1; + return insn->n; } /* lowlevel write to eeprom/dac */ diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c index 5edf59ac6706..b04dad8c7092 100644 --- a/drivers/staging/comedi/drivers/ni_mio_common.c +++ b/drivers/staging/comedi/drivers/ni_mio_common.c @@ -3545,6 +3545,7 @@ static int ni_cdio_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_cmd *cmd) { struct ni_private *devpriv = dev->private; + unsigned int bytes_per_scan; int err = 0; /* Step 1 : check if triggers are trivially valid */ @@ -3579,9 +3580,12 @@ static int ni_cdio_cmdtest(struct comedi_device *dev, err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len); - err |= comedi_check_trigger_arg_max(&cmd->stop_arg, - s->async->prealloc_bufsz / - comedi_bytes_per_scan(s)); + bytes_per_scan = comedi_bytes_per_scan_cmd(s, cmd); + if (bytes_per_scan) { + err |= comedi_check_trigger_arg_max(&cmd->stop_arg, + s->async->prealloc_bufsz / + bytes_per_scan); + } if (err) return 3; diff --git a/drivers/staging/comedi/drivers/ni_pcidio.c b/drivers/staging/comedi/drivers/ni_pcidio.c index b9a0dc6eac44..4bdef87d5dd7 100644 --- a/drivers/staging/comedi/drivers/ni_pcidio.c +++ b/drivers/staging/comedi/drivers/ni_pcidio.c @@ -49,116 +49,117 @@ /* defines for the PCI-DIO-32HS */ -#define Window_Address 4 /* W */ -#define Interrupt_And_Window_Status 4 /* R */ -#define IntStatus1 BIT(0) -#define IntStatus2 BIT(1) -#define WindowAddressStatus_mask 0x7c - -#define Master_DMA_And_Interrupt_Control 5 /* W */ -#define InterruptLine(x) ((x) & 3) -#define OpenInt BIT(2) -#define Group_Status 5 /* R */ -#define DataLeft BIT(0) -#define Req BIT(2) -#define StopTrig BIT(3) - -#define Group_1_Flags 6 /* R */ -#define Group_2_Flags 7 /* R */ -#define TransferReady BIT(0) -#define CountExpired BIT(1) -#define Waited BIT(5) -#define PrimaryTC BIT(6) -#define SecondaryTC BIT(7) +#define WINDOW_ADDRESS 4 /* W */ +#define INTERRUPT_AND_WINDOW_STATUS 4 /* R */ +#define INT_STATUS_1 BIT(0) +#define INT_STATUS_2 BIT(1) +#define WINDOW_ADDRESS_STATUS_MASK 0x7c + +#define MASTER_DMA_AND_INTERRUPT_CONTROL 5 /* W */ +#define INTERRUPT_LINE(x) ((x) & 3) +#define OPEN_INT BIT(2) +#define GROUP_STATUS 5 /* R */ +#define DATA_LEFT BIT(0) +#define REQ BIT(2) +#define STOP_TRIG BIT(3) + +#define GROUP_1_FLAGS 6 /* R */ +#define GROUP_2_FLAGS 7 /* R */ +#define TRANSFER_READY BIT(0) +#define COUNT_EXPIRED BIT(1) +#define WAITED BIT(5) +#define PRIMARY_TC BIT(6) +#define SECONDARY_TC BIT(7) /* #define SerialRose */ /* #define ReqRose */ /* #define Paused */ -#define Group_1_First_Clear 6 /* W */ -#define Group_2_First_Clear 7 /* W */ -#define ClearWaited BIT(3) -#define ClearPrimaryTC BIT(4) -#define ClearSecondaryTC BIT(5) -#define DMAReset BIT(6) -#define FIFOReset BIT(7) -#define ClearAll 0xf8 - -#define Group_1_FIFO 8 /* W */ -#define Group_2_FIFO 12 /* W */ - -#define Transfer_Count 20 -#define Chip_ID_D 24 -#define Chip_ID_I 25 -#define Chip_ID_O 26 -#define Chip_Version 27 -#define Port_IO(x) (28 + (x)) -#define Port_Pin_Directions(x) (32 + (x)) -#define Port_Pin_Mask(x) (36 + (x)) -#define Port_Pin_Polarities(x) (40 + (x)) - -#define Master_Clock_Routing 45 -#define RTSIClocking(x) (((x) & 3) << 4) - -#define Group_1_Second_Clear 46 /* W */ -#define Group_2_Second_Clear 47 /* W */ -#define ClearExpired BIT(0) - -#define Port_Pattern(x) (48 + (x)) - -#define Data_Path 64 -#define FIFOEnableA BIT(0) -#define FIFOEnableB BIT(1) -#define FIFOEnableC BIT(2) -#define FIFOEnableD BIT(3) -#define Funneling(x) (((x) & 3) << 4) -#define GroupDirection BIT(7) - -#define Protocol_Register_1 65 -#define OpMode Protocol_Register_1 -#define RunMode(x) ((x) & 7) -#define Numbered BIT(3) - -#define Protocol_Register_2 66 -#define ClockReg Protocol_Register_2 -#define ClockLine(x) (((x) & 3) << 5) -#define InvertStopTrig BIT(7) -#define DataLatching(x) (((x) & 3) << 5) - -#define Protocol_Register_3 67 -#define Sequence Protocol_Register_3 - -#define Protocol_Register_14 68 /* 16 bit */ -#define ClockSpeed Protocol_Register_14 - -#define Protocol_Register_4 70 -#define ReqReg Protocol_Register_4 -#define ReqConditioning(x) (((x) & 7) << 3) - -#define Protocol_Register_5 71 -#define BlockMode Protocol_Register_5 +#define GROUP_1_FIRST_CLEAR 6 /* W */ +#define GROUP_2_FIRST_CLEAR 7 /* W */ +#define CLEAR_WAITED BIT(3) +#define CLEAR_PRIMARY_TC BIT(4) +#define CLEAR_SECONDARY_TC BIT(5) +#define DMA_RESET BIT(6) +#define FIFO_RESET BIT(7) +#define CLEAR_ALL 0xf8 + +#define GROUP_1_FIFO 8 /* W */ +#define GROUP_2_FIFO 12 /* W */ + +#define TRANSFER_COUNT 20 +#define CHIP_ID_D 24 +#define CHIP_ID_I 25 +#define CHIP_ID_O 26 +#define CHIP_VERSION 27 +#define PORT_IO(x) (28 + (x)) +#define PORT_PIN_DIRECTIONS(x) (32 + (x)) +#define PORT_PIN_MASK(x) (36 + (x)) +#define PORT_PIN_POLARITIES(x) (40 + (x)) + +#define MASTER_CLOCK_ROUTING 45 +#define RTSI_CLOCKING(x) (((x) & 3) << 4) + +#define GROUP_1_SECOND_CLEAR 46 /* W */ +#define GROUP_2_SECOND_CLEAR 47 /* W */ +#define CLEAR_EXPIRED BIT(0) + +#define PORT_PATTERN(x) (48 + (x)) + +#define DATA_PATH 64 +#define FIFO_ENABLE_A BIT(0) +#define FIFO_ENABLE_B BIT(1) +#define FIFO_ENABLE_C BIT(2) +#define FIFO_ENABLE_D BIT(3) +#define FUNNELING(x) (((x) & 3) << 4) +#define GROUP_DIRECTION BIT(7) + +#define PROTOCOL_REGISTER_1 65 +#define OP_MODE PROTOCOL_REGISTER_1 +#define RUN_MODE(x) ((x) & 7) +#define NUMBERED BIT(3) + +#define PROTOCOL_REGISTER_2 66 +#define CLOCK_REG PROTOCOL_REGISTER_2 +#define CLOCK_LINE(x) (((x) & 3) << 5) +#define INVERT_STOP_TRIG BIT(7) +#define DATA_LATCHING(x) (((x) & 3) << 5) + +#define PROTOCOL_REGISTER_3 67 +#define SEQUENCE PROTOCOL_REGISTER_3 + +#define PROTOCOL_REGISTER_14 68 /* 16 bit */ +#define CLOCK_SPEED PROTOCOL_REGISTER_14 + +#define PROTOCOL_REGISTER_4 70 +#define REQ_REG PROTOCOL_REGISTER_4 +#define REQ_CONDITIONING(x) (((x) & 7) << 3) + +#define PROTOCOL_REGISTER_5 71 +#define BLOCK_MODE PROTOCOL_REGISTER_5 #define FIFO_Control 72 -#define ReadyLevel(x) ((x) & 7) - -#define Protocol_Register_6 73 -#define LinePolarities Protocol_Register_6 -#define InvertAck BIT(0) -#define InvertReq BIT(1) -#define InvertClock BIT(2) -#define InvertSerial BIT(3) -#define OpenAck BIT(4) -#define OpenClock BIT(5) - -#define Protocol_Register_7 74 -#define AckSer Protocol_Register_7 -#define AckLine(x) (((x) & 3) << 2) -#define ExchangePins BIT(7) - -#define Interrupt_Control 75 - /* bits same as flags */ - -#define DMA_Line_Control_Group1 76 -#define DMA_Line_Control_Group2 108 +#define READY_LEVEL(x) ((x) & 7) + +#define PROTOCOL_REGISTER_6 73 +#define LINE_POLARITIES PROTOCOL_REGISTER_6 +#define INVERT_ACK BIT(0) +#define INVERT_REQ BIT(1) +#define INVERT_CLOCK BIT(2) +#define INVERT_SERIAL BIT(3) +#define OPEN_ACK BIT(4) +#define OPEN_CLOCK BIT(5) + +#define PROTOCOL_REGISTER_7 74 +#define ACK_SER PROTOCOL_REGISTER_7 +#define ACK_LINE(x) (((x) & 3) << 2) +#define EXCHANGE_PINS BIT(7) + +#define INTERRUPT_CONTROL 75 +/* bits same as flags */ + +#define DMA_LINE_CONTROL_GROUP1 76 +#define DMA_LINE_CONTROL_GROUP2 108 + /* channel zero is none */ static inline unsigned int primary_DMAChannel_bits(unsigned int channel) { @@ -170,41 +171,41 @@ static inline unsigned int secondary_DMAChannel_bits(unsigned int channel) return (channel << 2) & 0xc; } -#define Transfer_Size_Control 77 -#define TransferWidth(x) ((x) & 3) -#define TransferLength(x) (((x) & 3) << 3) -#define RequireRLevel BIT(5) +#define TRANSFER_SIZE_CONTROL 77 +#define TRANSFER_WIDTH(x) ((x) & 3) +#define TRANSFER_LENGTH(x) (((x) & 3) << 3) +#define REQUIRE_R_LEVEL BIT(5) -#define Protocol_Register_15 79 -#define DAQOptions Protocol_Register_15 -#define StartSource(x) ((x) & 0x3) -#define InvertStart BIT(2) -#define StopSource(x) (((x) & 0x3) << 3) -#define ReqStart BIT(6) -#define PreStart BIT(7) +#define PROTOCOL_REGISTER_15 79 +#define DAQ_OPTIONS PROTOCOL_REGISTER_15 +#define START_SOURCE(x) ((x) & 0x3) +#define INVERT_START BIT(2) +#define STOP_SOURCE(x) (((x) & 0x3) << 3) +#define REQ_START BIT(6) +#define PRE_START BIT(7) -#define Pattern_Detection 81 -#define DetectionMethod BIT(0) -#define InvertMatch BIT(1) -#define IE_Pattern_Detection BIT(2) +#define PATTERN_DETECTION 81 +#define DETECTION_METHOD BIT(0) +#define INVERT_MATCH BIT(1) +#define IE_PATTERN_DETECTION BIT(2) -#define Protocol_Register_9 82 -#define ReqDelay Protocol_Register_9 +#define PROTOCOL_REGISTER_9 82 +#define REQ_DELAY PROTOCOL_REGISTER_9 -#define Protocol_Register_10 83 -#define ReqNotDelay Protocol_Register_10 +#define PROTOCOL_REGISTER_10 83 +#define REQ_NOT_DELAY PROTOCOL_REGISTER_10 -#define Protocol_Register_11 84 -#define AckDelay Protocol_Register_11 +#define PROTOCOL_REGISTER_11 84 +#define ACK_DELAY PROTOCOL_REGISTER_11 -#define Protocol_Register_12 85 -#define AckNotDelay Protocol_Register_12 +#define PROTOCOL_REGISTER_12 85 +#define ACK_NOT_DELAY PROTOCOL_REGISTER_12 -#define Protocol_Register_13 86 -#define Data1Delay Protocol_Register_13 +#define PROTOCOL_REGISTER_13 86 +#define DATA_1_DELAY PROTOCOL_REGISTER_13 -#define Protocol_Register_8 88 /* 32 bit */ -#define StartDelay Protocol_Register_8 +#define PROTOCOL_REGISTER_8 88 /* 32 bit */ +#define START_DELAY PROTOCOL_REGISTER_8 /* Firmware files for PCI-6524 */ #define FW_PCI_6534_MAIN "ni6534a.bin" @@ -246,9 +247,10 @@ enum FPGA_Control_Bits { #define TIMER_BASE 50 /* nanoseconds */ #ifdef USE_DMA -#define IntEn (CountExpired | Waited | PrimaryTC | SecondaryTC) +#define INT_EN (COUNT_EXPIRED | WAITED | PRIMARY_TC | SECONDARY_TC) #else -#define IntEn (TransferReady | CountExpired | Waited | PrimaryTC | SecondaryTC) +#define INT_EN (TRANSFER_READY | COUNT_EXPIRED | WAITED \ + | PRIMARY_TC | SECONDARY_TC) #endif enum nidio_boardid { @@ -283,7 +285,7 @@ struct nidio96_private { struct mite *mite; int boardtype; int dio; - unsigned short OpModeBits; + unsigned short OP_MODEBits; struct mite_channel *di_mite_chan; struct mite_ring *di_mite_ring; spinlock_t mite_channel_lock; @@ -307,7 +309,7 @@ static int ni_pcidio_request_di_mite_channel(struct comedi_device *dev) devpriv->di_mite_chan->dir = COMEDI_INPUT; writeb(primary_DMAChannel_bits(devpriv->di_mite_chan->channel) | secondary_DMAChannel_bits(devpriv->di_mite_chan->channel), - dev->mmio + DMA_Line_Control_Group1); + dev->mmio + DMA_LINE_CONTROL_GROUP1); mmiowb(); spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); return 0; @@ -324,7 +326,7 @@ static void ni_pcidio_release_di_mite_channel(struct comedi_device *dev) devpriv->di_mite_chan = NULL; writeb(primary_DMAChannel_bits(0) | secondary_DMAChannel_bits(0), - dev->mmio + DMA_Line_Control_Group1); + dev->mmio + DMA_LINE_CONTROL_GROUP1); mmiowb(); } spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); @@ -391,8 +393,8 @@ static irqreturn_t nidio_interrupt(int irq, void *d) /* Lock to avoid race with comedi_poll */ spin_lock(&dev->spinlock); - status = readb(dev->mmio + Interrupt_And_Window_Status); - flags = readb(dev->mmio + Group_1_Flags); + status = readb(dev->mmio + INTERRUPT_AND_WINDOW_STATUS); + flags = readb(dev->mmio + GROUP_1_FLAGS); spin_lock(&devpriv->mite_channel_lock); if (devpriv->di_mite_chan) { @@ -401,63 +403,63 @@ static irqreturn_t nidio_interrupt(int irq, void *d) } spin_unlock(&devpriv->mite_channel_lock); - while (status & DataLeft) { + while (status & DATA_LEFT) { work++; if (work > 20) { dev_dbg(dev->class_dev, "too much work in interrupt\n"); writeb(0x00, - dev->mmio + Master_DMA_And_Interrupt_Control); + dev->mmio + MASTER_DMA_AND_INTERRUPT_CONTROL); break; } - flags &= IntEn; + flags &= INT_EN; - if (flags & TransferReady) { - while (flags & TransferReady) { + if (flags & TRANSFER_READY) { + while (flags & TRANSFER_READY) { work++; if (work > 100) { dev_dbg(dev->class_dev, "too much work in interrupt\n"); writeb(0x00, dev->mmio + - Master_DMA_And_Interrupt_Control + MASTER_DMA_AND_INTERRUPT_CONTROL ); goto out; } - auxdata = readl(dev->mmio + Group_1_FIFO); + auxdata = readl(dev->mmio + GROUP_1_FIFO); comedi_buf_write_samples(s, &auxdata, 1); - flags = readb(dev->mmio + Group_1_Flags); + flags = readb(dev->mmio + GROUP_1_FLAGS); } } - if (flags & CountExpired) { - writeb(ClearExpired, dev->mmio + Group_1_Second_Clear); + if (flags & COUNT_EXPIRED) { + writeb(CLEAR_EXPIRED, dev->mmio + GROUP_1_SECOND_CLEAR); async->events |= COMEDI_CB_EOA; - writeb(0x00, dev->mmio + OpMode); + writeb(0x00, dev->mmio + OP_MODE); break; - } else if (flags & Waited) { - writeb(ClearWaited, dev->mmio + Group_1_First_Clear); + } else if (flags & WAITED) { + writeb(CLEAR_WAITED, dev->mmio + GROUP_1_FIRST_CLEAR); async->events |= COMEDI_CB_ERROR; break; - } else if (flags & PrimaryTC) { - writeb(ClearPrimaryTC, - dev->mmio + Group_1_First_Clear); + } else if (flags & PRIMARY_TC) { + writeb(CLEAR_PRIMARY_TC, + dev->mmio + GROUP_1_FIRST_CLEAR); async->events |= COMEDI_CB_EOA; - } else if (flags & SecondaryTC) { - writeb(ClearSecondaryTC, - dev->mmio + Group_1_First_Clear); + } else if (flags & SECONDARY_TC) { + writeb(CLEAR_SECONDARY_TC, + dev->mmio + GROUP_1_FIRST_CLEAR); async->events |= COMEDI_CB_EOA; } - flags = readb(dev->mmio + Group_1_Flags); - status = readb(dev->mmio + Interrupt_And_Window_Status); + flags = readb(dev->mmio + GROUP_1_FLAGS); + status = readb(dev->mmio + INTERRUPT_AND_WINDOW_STATUS); } out: comedi_handle_events(dev, s); #if 0 if (!tag) - writeb(0x03, dev->mmio + Master_DMA_And_Interrupt_Control); + writeb(0x03, dev->mmio + MASTER_DMA_AND_INTERRUPT_CONTROL); #endif spin_unlock(&dev->spinlock); @@ -484,7 +486,7 @@ static int ni_pcidio_insn_config(struct comedi_device *dev, if (ret) return ret; - writel(s->io_bits, dev->mmio + Port_Pin_Directions(0)); + writel(s->io_bits, dev->mmio + PORT_PIN_DIRECTIONS(0)); return insn->n; } @@ -495,9 +497,9 @@ static int ni_pcidio_insn_bits(struct comedi_device *dev, unsigned int *data) { if (comedi_dio_update_state(s, data)) - writel(s->state, dev->mmio + Port_IO(0)); + writel(s->state, dev->mmio + PORT_IO(0)); - data[1] = readl(dev->mmio + Port_IO(0)); + data[1] = readl(dev->mmio + PORT_IO(0)); return insn->n; } @@ -609,7 +611,7 @@ static int ni_pcidio_inttrig(struct comedi_device *dev, if (trig_num != cmd->start_arg) return -EINVAL; - writeb(devpriv->OpModeBits, dev->mmio + OpMode); + writeb(devpriv->OP_MODEBits, dev->mmio + OP_MODE); s->async->inttrig = NULL; return 1; @@ -621,78 +623,78 @@ static int ni_pcidio_cmd(struct comedi_device *dev, struct comedi_subdevice *s) struct comedi_cmd *cmd = &s->async->cmd; /* XXX configure ports for input */ - writel(0x0000, dev->mmio + Port_Pin_Directions(0)); + writel(0x0000, dev->mmio + PORT_PIN_DIRECTIONS(0)); if (1) { /* enable fifos A B C D */ - writeb(0x0f, dev->mmio + Data_Path); + writeb(0x0f, dev->mmio + DATA_PATH); /* set transfer width a 32 bits */ - writeb(TransferWidth(0) | TransferLength(0), - dev->mmio + Transfer_Size_Control); + writeb(TRANSFER_WIDTH(0) | TRANSFER_LENGTH(0), + dev->mmio + TRANSFER_SIZE_CONTROL); } else { - writeb(0x03, dev->mmio + Data_Path); - writeb(TransferWidth(3) | TransferLength(0), - dev->mmio + Transfer_Size_Control); + writeb(0x03, dev->mmio + DATA_PATH); + writeb(TRANSFER_WIDTH(3) | TRANSFER_LENGTH(0), + dev->mmio + TRANSFER_SIZE_CONTROL); } /* protocol configuration */ if (cmd->scan_begin_src == TRIG_TIMER) { /* page 4-5, "input with internal REQs" */ - writeb(0, dev->mmio + OpMode); - writeb(0x00, dev->mmio + ClockReg); - writeb(1, dev->mmio + Sequence); - writeb(0x04, dev->mmio + ReqReg); - writeb(4, dev->mmio + BlockMode); - writeb(3, dev->mmio + LinePolarities); - writeb(0xc0, dev->mmio + AckSer); + writeb(0, dev->mmio + OP_MODE); + writeb(0x00, dev->mmio + CLOCK_REG); + writeb(1, dev->mmio + SEQUENCE); + writeb(0x04, dev->mmio + REQ_REG); + writeb(4, dev->mmio + BLOCK_MODE); + writeb(3, dev->mmio + LINE_POLARITIES); + writeb(0xc0, dev->mmio + ACK_SER); writel(ni_pcidio_ns_to_timer(&cmd->scan_begin_arg, CMDF_ROUND_NEAREST), - dev->mmio + StartDelay); - writeb(1, dev->mmio + ReqDelay); - writeb(1, dev->mmio + ReqNotDelay); - writeb(1, dev->mmio + AckDelay); - writeb(0x0b, dev->mmio + AckNotDelay); - writeb(0x01, dev->mmio + Data1Delay); + dev->mmio + START_DELAY); + writeb(1, dev->mmio + REQ_DELAY); + writeb(1, dev->mmio + REQ_NOT_DELAY); + writeb(1, dev->mmio + ACK_DELAY); + writeb(0x0b, dev->mmio + ACK_NOT_DELAY); + writeb(0x01, dev->mmio + DATA_1_DELAY); /* * manual, page 4-5: - * ClockSpeed comment is incorrectly listed on DAQOptions + * CLOCK_SPEED comment is incorrectly listed on DAQ_OPTIONS */ - writew(0, dev->mmio + ClockSpeed); - writeb(0, dev->mmio + DAQOptions); + writew(0, dev->mmio + CLOCK_SPEED); + writeb(0, dev->mmio + DAQ_OPTIONS); } else { /* TRIG_EXT */ /* page 4-5, "input with external REQs" */ - writeb(0, dev->mmio + OpMode); - writeb(0x00, dev->mmio + ClockReg); - writeb(0, dev->mmio + Sequence); - writeb(0x00, dev->mmio + ReqReg); - writeb(4, dev->mmio + BlockMode); + writeb(0, dev->mmio + OP_MODE); + writeb(0x00, dev->mmio + CLOCK_REG); + writeb(0, dev->mmio + SEQUENCE); + writeb(0x00, dev->mmio + REQ_REG); + writeb(4, dev->mmio + BLOCK_MODE); if (!(cmd->scan_begin_arg & CR_INVERT)) /* Leading Edge */ - writeb(0, dev->mmio + LinePolarities); + writeb(0, dev->mmio + LINE_POLARITIES); else /* Trailing Edge */ - writeb(2, dev->mmio + LinePolarities); - writeb(0x00, dev->mmio + AckSer); - writel(1, dev->mmio + StartDelay); - writeb(1, dev->mmio + ReqDelay); - writeb(1, dev->mmio + ReqNotDelay); - writeb(1, dev->mmio + AckDelay); - writeb(0x0C, dev->mmio + AckNotDelay); - writeb(0x10, dev->mmio + Data1Delay); - writew(0, dev->mmio + ClockSpeed); - writeb(0x60, dev->mmio + DAQOptions); + writeb(2, dev->mmio + LINE_POLARITIES); + writeb(0x00, dev->mmio + ACK_SER); + writel(1, dev->mmio + START_DELAY); + writeb(1, dev->mmio + REQ_DELAY); + writeb(1, dev->mmio + REQ_NOT_DELAY); + writeb(1, dev->mmio + ACK_DELAY); + writeb(0x0C, dev->mmio + ACK_NOT_DELAY); + writeb(0x10, dev->mmio + DATA_1_DELAY); + writew(0, dev->mmio + CLOCK_SPEED); + writeb(0x60, dev->mmio + DAQ_OPTIONS); } if (cmd->stop_src == TRIG_COUNT) { writel(cmd->stop_arg, - dev->mmio + Transfer_Count); + dev->mmio + TRANSFER_COUNT); } else { /* XXX */ } #ifdef USE_DMA - writeb(ClearPrimaryTC | ClearSecondaryTC, - dev->mmio + Group_1_First_Clear); + writeb(CLEAR_PRIMARY_TC | CLEAR_SECONDARY_TC, + dev->mmio + GROUP_1_FIRST_CLEAR); { int retval = setup_mite_dma(dev, s); @@ -701,25 +703,25 @@ static int ni_pcidio_cmd(struct comedi_device *dev, struct comedi_subdevice *s) return retval; } #else - writeb(0x00, dev->mmio + DMA_Line_Control_Group1); + writeb(0x00, dev->mmio + DMA_LINE_CONTROL_GROUP1); #endif - writeb(0x00, dev->mmio + DMA_Line_Control_Group2); + writeb(0x00, dev->mmio + DMA_LINE_CONTROL_GROUP2); /* clear and enable interrupts */ - writeb(0xff, dev->mmio + Group_1_First_Clear); - /* writeb(ClearExpired, dev->mmio+Group_1_Second_Clear); */ + writeb(0xff, dev->mmio + GROUP_1_FIRST_CLEAR); + /* writeb(CLEAR_EXPIRED, dev->mmio+GROUP_1_SECOND_CLEAR); */ - writeb(IntEn, dev->mmio + Interrupt_Control); - writeb(0x03, dev->mmio + Master_DMA_And_Interrupt_Control); + writeb(INT_EN, dev->mmio + INTERRUPT_CONTROL); + writeb(0x03, dev->mmio + MASTER_DMA_AND_INTERRUPT_CONTROL); if (cmd->stop_src == TRIG_NONE) { - devpriv->OpModeBits = DataLatching(0) | RunMode(7); + devpriv->OP_MODEBits = DATA_LATCHING(0) | RUN_MODE(7); } else { /* TRIG_TIMER */ - devpriv->OpModeBits = Numbered | RunMode(7); + devpriv->OP_MODEBits = NUMBERED | RUN_MODE(7); } if (cmd->start_src == TRIG_NOW) { /* start */ - writeb(devpriv->OpModeBits, dev->mmio + OpMode); + writeb(devpriv->OP_MODEBits, dev->mmio + OP_MODE); s->async->inttrig = NULL; } else { /* TRIG_INT */ @@ -732,7 +734,7 @@ static int ni_pcidio_cmd(struct comedi_device *dev, struct comedi_subdevice *s) static int ni_pcidio_cancel(struct comedi_device *dev, struct comedi_subdevice *s) { - writeb(0x00, dev->mmio + Master_DMA_And_Interrupt_Control); + writeb(0x00, dev->mmio + MASTER_DMA_AND_INTERRUPT_CONTROL); ni_pcidio_release_di_mite_channel(dev); return 0; @@ -869,12 +871,12 @@ static int pci_6534_upload_firmware(struct comedi_device *dev) static void nidio_reset_board(struct comedi_device *dev) { - writel(0, dev->mmio + Port_IO(0)); - writel(0, dev->mmio + Port_Pin_Directions(0)); - writel(0, dev->mmio + Port_Pin_Mask(0)); + writel(0, dev->mmio + PORT_IO(0)); + writel(0, dev->mmio + PORT_PIN_DIRECTIONS(0)); + writel(0, dev->mmio + PORT_PIN_MASK(0)); /* disable interrupts on board */ - writeb(0, dev->mmio + Master_DMA_And_Interrupt_Control); + writeb(0, dev->mmio + MASTER_DMA_AND_INTERRUPT_CONTROL); } static int nidio_auto_attach(struct comedi_device *dev, @@ -925,7 +927,7 @@ static int nidio_auto_attach(struct comedi_device *dev, return ret; dev_info(dev->class_dev, "%s rev=%d\n", dev->board_name, - readb(dev->mmio + Chip_Version)); + readb(dev->mmio + CHIP_VERSION)); s = &dev->subdevices[0]; diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h index 6c023b40fb53..35427f8bf8f7 100644 --- a/drivers/staging/comedi/drivers/ni_stc.h +++ b/drivers/staging/comedi/drivers/ni_stc.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Register descriptions for NI DAQ-STC chip * diff --git a/drivers/staging/comedi/drivers/ni_tio.c b/drivers/staging/comedi/drivers/ni_tio.c index 0eb388c0e1f0..048cb35723ad 100644 --- a/drivers/staging/comedi/drivers/ni_tio.c +++ b/drivers/staging/comedi/drivers/ni_tio.c @@ -224,13 +224,16 @@ static void ni_tio_set_bits_transient(struct ni_gpct *counter, unsigned int transient) { struct ni_gpct_device *counter_dev = counter->counter_dev; + unsigned int chip = counter->chip_index; unsigned long flags; - if (reg < NITIO_NUM_REGS) { + if (reg < NITIO_NUM_REGS && chip < counter_dev->num_chips) { + unsigned int *regs = counter_dev->regs[chip]; + spin_lock_irqsave(&counter_dev->regs_lock, flags); - counter_dev->regs[reg] &= ~mask; - counter_dev->regs[reg] |= (value & mask); - ni_tio_write(counter, counter_dev->regs[reg] | transient, reg); + regs[reg] &= ~mask; + regs[reg] |= (value & mask); + ni_tio_write(counter, regs[reg] | transient, reg); mmiowb(); spin_unlock_irqrestore(&counter_dev->regs_lock, flags); } @@ -267,12 +270,13 @@ unsigned int ni_tio_get_soft_copy(const struct ni_gpct *counter, enum ni_gpct_register reg) { struct ni_gpct_device *counter_dev = counter->counter_dev; + unsigned int chip = counter->chip_index; unsigned int value = 0; unsigned long flags; - if (reg < NITIO_NUM_REGS) { + if (reg < NITIO_NUM_REGS && chip < counter_dev->num_chips) { spin_lock_irqsave(&counter_dev->regs_lock, flags); - value = counter_dev->regs[reg]; + value = counter_dev->regs[chip][reg]; spin_unlock_irqrestore(&counter_dev->regs_lock, flags); } return value; @@ -302,6 +306,7 @@ static int ni_m_series_clock_src_select(const struct ni_gpct *counter, { struct ni_gpct_device *counter_dev = counter->counter_dev; unsigned int cidx = counter->counter_index; + unsigned int chip = counter->chip_index; unsigned int second_gate_reg = NITIO_GATE2_REG(cidx); unsigned int clock_source = 0; unsigned int src; @@ -318,7 +323,7 @@ static int ni_m_series_clock_src_select(const struct ni_gpct *counter, clock_source = NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS; break; case NI_M_TIMEBASE_3_CLK: - if (counter_dev->regs[second_gate_reg] & GI_SRC_SUBSEL) + if (counter_dev->regs[chip][second_gate_reg] & GI_SRC_SUBSEL) clock_source = NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS; else @@ -328,7 +333,7 @@ static int ni_m_series_clock_src_select(const struct ni_gpct *counter, clock_source = NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS; break; case NI_M_NEXT_GATE_CLK: - if (counter_dev->regs[second_gate_reg] & GI_SRC_SUBSEL) + if (counter_dev->regs[chip][second_gate_reg] & GI_SRC_SUBSEL) clock_source = NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS; else clock_source = NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS; @@ -721,6 +726,7 @@ static void ni_tio_set_source_subselect(struct ni_gpct *counter, { struct ni_gpct_device *counter_dev = counter->counter_dev; unsigned int cidx = counter->counter_index; + unsigned int chip = counter->chip_index; unsigned int second_gate_reg = NITIO_GATE2_REG(cidx); if (counter_dev->variant != ni_gpct_variant_m_series) @@ -729,18 +735,18 @@ static void ni_tio_set_source_subselect(struct ni_gpct *counter, /* Gi_Source_Subselect is zero */ case NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS: case NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS: - counter_dev->regs[second_gate_reg] &= ~GI_SRC_SUBSEL; + counter_dev->regs[chip][second_gate_reg] &= ~GI_SRC_SUBSEL; break; /* Gi_Source_Subselect is one */ case NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS: case NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS: - counter_dev->regs[second_gate_reg] |= GI_SRC_SUBSEL; + counter_dev->regs[chip][second_gate_reg] |= GI_SRC_SUBSEL; break; /* Gi_Source_Subselect doesn't matter */ default: return; } - ni_tio_write(counter, counter_dev->regs[second_gate_reg], + ni_tio_write(counter, counter_dev->regs[chip][second_gate_reg], second_gate_reg); } @@ -1116,6 +1122,7 @@ static int ni_tio_set_other_src(struct ni_gpct *counter, unsigned int index, { struct ni_gpct_device *counter_dev = counter->counter_dev; unsigned int cidx = counter->counter_index; + unsigned int chip = counter->chip_index; unsigned int abz_reg, shift, mask; if (counter_dev->variant != ni_gpct_variant_m_series) @@ -1141,9 +1148,9 @@ static int ni_tio_set_other_src(struct ni_gpct *counter, unsigned int index, if (source > 0x1f) source = 0x1f; /* Disable gate */ - counter_dev->regs[abz_reg] &= ~mask; - counter_dev->regs[abz_reg] |= (source << shift) & mask; - ni_tio_write(counter, counter_dev->regs[abz_reg], abz_reg); + counter_dev->regs[chip][abz_reg] &= ~mask; + counter_dev->regs[chip][abz_reg] |= (source << shift) & mask; + ni_tio_write(counter, counter_dev->regs[chip][abz_reg], abz_reg); return 0; } @@ -1632,6 +1639,7 @@ int ni_tio_insn_read(struct comedi_device *dev, struct ni_gpct_device *counter_dev = counter->counter_dev; unsigned int channel = CR_CHAN(insn->chanspec); unsigned int cidx = counter->counter_index; + unsigned int chip = counter->chip_index; int i; for (i = 0; i < insn->n; i++) { @@ -1640,10 +1648,12 @@ int ni_tio_insn_read(struct comedi_device *dev, data[i] = ni_tio_read_sw_save_reg(dev, s); break; case 1: - data[i] = counter_dev->regs[NITIO_LOADA_REG(cidx)]; + data[i] = + counter_dev->regs[chip][NITIO_LOADA_REG(cidx)]; break; case 2: - data[i] = counter_dev->regs[NITIO_LOADB_REG(cidx)]; + data[i] = + counter_dev->regs[chip][NITIO_LOADB_REG(cidx)]; break; } } @@ -1670,6 +1680,7 @@ int ni_tio_insn_write(struct comedi_device *dev, struct ni_gpct_device *counter_dev = counter->counter_dev; unsigned int channel = CR_CHAN(insn->chanspec); unsigned int cidx = counter->counter_index; + unsigned int chip = counter->chip_index; unsigned int load_reg; if (insn->n < 1) @@ -1690,14 +1701,15 @@ int ni_tio_insn_write(struct comedi_device *dev, ni_tio_set_bits_transient(counter, NITIO_CMD_REG(cidx), 0, 0, GI_LOAD); /* restore load reg */ - ni_tio_write(counter, counter_dev->regs[load_reg], load_reg); + ni_tio_write(counter, counter_dev->regs[chip][load_reg], + load_reg); break; case 1: - counter_dev->regs[NITIO_LOADA_REG(cidx)] = data[0]; + counter_dev->regs[chip][NITIO_LOADA_REG(cidx)] = data[0]; ni_tio_write(counter, data[0], NITIO_LOADA_REG(cidx)); break; case 2: - counter_dev->regs[NITIO_LOADB_REG(cidx)] = data[0]; + counter_dev->regs[chip][NITIO_LOADB_REG(cidx)] = data[0]; ni_tio_write(counter, data[0], NITIO_LOADB_REG(cidx)); break; default: @@ -1711,11 +1723,12 @@ void ni_tio_init_counter(struct ni_gpct *counter) { struct ni_gpct_device *counter_dev = counter->counter_dev; unsigned int cidx = counter->counter_index; + unsigned int chip = counter->chip_index; ni_tio_reset_count_and_disarm(counter); /* initialize counter registers */ - counter_dev->regs[NITIO_AUTO_INC_REG(cidx)] = 0x0; + counter_dev->regs[chip][NITIO_AUTO_INC_REG(cidx)] = 0x0; ni_tio_write(counter, 0x0, NITIO_AUTO_INC_REG(cidx)); ni_tio_set_bits(counter, NITIO_CMD_REG(cidx), @@ -1723,10 +1736,10 @@ void ni_tio_init_counter(struct ni_gpct *counter) ni_tio_set_bits(counter, NITIO_MODE_REG(cidx), ~0, 0); - counter_dev->regs[NITIO_LOADA_REG(cidx)] = 0x0; + counter_dev->regs[chip][NITIO_LOADA_REG(cidx)] = 0x0; ni_tio_write(counter, 0x0, NITIO_LOADA_REG(cidx)); - counter_dev->regs[NITIO_LOADB_REG(cidx)] = 0x0; + counter_dev->regs[chip][NITIO_LOADB_REG(cidx)] = 0x0; ni_tio_write(counter, 0x0, NITIO_LOADB_REG(cidx)); ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), ~0, 0); @@ -1735,7 +1748,7 @@ void ni_tio_init_counter(struct ni_gpct *counter) ni_tio_set_bits(counter, NITIO_CNT_MODE_REG(cidx), ~0, 0); if (ni_tio_has_gate2_registers(counter_dev)) { - counter_dev->regs[NITIO_GATE2_REG(cidx)] = 0x0; + counter_dev->regs[chip][NITIO_GATE2_REG(cidx)] = 0x0; ni_tio_write(counter, 0x0, NITIO_GATE2_REG(cidx)); } @@ -1776,9 +1789,16 @@ ni_gpct_device_construct(struct comedi_device *dev, spin_lock_init(&counter_dev->regs_lock); + counter_dev->num_counters = num_counters; + counter_dev->num_chips = DIV_ROUND_UP(num_counters, counters_per_chip); + counter_dev->counters = kcalloc(num_counters, sizeof(*counter), GFP_KERNEL); - if (!counter_dev->counters) { + counter_dev->regs = kcalloc(counter_dev->num_chips, + sizeof(*counter_dev->regs), GFP_KERNEL); + if (!counter_dev->regs || !counter_dev->counters) { + kfree(counter_dev->regs); + kfree(counter_dev->counters); kfree(counter_dev); return NULL; } @@ -1790,8 +1810,6 @@ ni_gpct_device_construct(struct comedi_device *dev, counter->counter_index = i % counters_per_chip; spin_lock_init(&counter->lock); } - counter_dev->num_counters = num_counters; - counter_dev->counters_per_chip = counters_per_chip; return counter_dev; } @@ -1801,6 +1819,7 @@ void ni_gpct_device_destroy(struct ni_gpct_device *counter_dev) { if (!counter_dev) return; + kfree(counter_dev->regs); kfree(counter_dev->counters); kfree(counter_dev); } diff --git a/drivers/staging/comedi/drivers/ni_tio.h b/drivers/staging/comedi/drivers/ni_tio.h index 340d63c74467..e7b05718df9b 100644 --- a/drivers/staging/comedi/drivers/ni_tio.h +++ b/drivers/staging/comedi/drivers/ni_tio.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Header file for NI general purpose counter support code (ni_tio.c) * @@ -107,8 +107,8 @@ struct ni_gpct_device { enum ni_gpct_variant variant; struct ni_gpct *counters; unsigned int num_counters; - unsigned int counters_per_chip; - unsigned int regs[NITIO_NUM_REGS]; + unsigned int num_chips; + unsigned int (*regs)[NITIO_NUM_REGS]; /* [num_chips][NITIO_NUM_REGS] */ spinlock_t regs_lock; /* protects 'regs' */ const struct ni_route_tables *routing_tables; /* link to routes */ }; diff --git a/drivers/staging/comedi/drivers/ni_tio_internal.h b/drivers/staging/comedi/drivers/ni_tio_internal.h index 652a28990132..20fcd60038cd 100644 --- a/drivers/staging/comedi/drivers/ni_tio_internal.h +++ b/drivers/staging/comedi/drivers/ni_tio_internal.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Header file for NI general purpose counter support code (ni_tio.c and * ni_tiocmd.c) diff --git a/drivers/staging/comedi/drivers/ni_usb6501.c b/drivers/staging/comedi/drivers/ni_usb6501.c index 808ed92ed66f..1bb1cb651349 100644 --- a/drivers/staging/comedi/drivers/ni_usb6501.c +++ b/drivers/staging/comedi/drivers/ni_usb6501.c @@ -463,10 +463,8 @@ static int ni6501_alloc_usb_buffers(struct comedi_device *dev) size = usb_endpoint_maxp(devpriv->ep_tx); devpriv->usb_tx_buf = kzalloc(size, GFP_KERNEL); - if (!devpriv->usb_tx_buf) { - kfree(devpriv->usb_rx_buf); + if (!devpriv->usb_tx_buf) return -ENOMEM; - } return 0; } @@ -518,6 +516,9 @@ static int ni6501_auto_attach(struct comedi_device *dev, if (!devpriv) return -ENOMEM; + mutex_init(&devpriv->mut); + usb_set_intfdata(intf, devpriv); + ret = ni6501_find_endpoints(dev); if (ret) return ret; @@ -526,9 +527,6 @@ static int ni6501_auto_attach(struct comedi_device *dev, if (ret) return ret; - mutex_init(&devpriv->mut); - usb_set_intfdata(intf, devpriv); - ret = comedi_alloc_subdevices(dev, 2); if (ret) return ret; diff --git a/drivers/staging/comedi/drivers/plx9052.h b/drivers/staging/comedi/drivers/plx9052.h index 7950d1f57db6..8ec5a5f2837d 100644 --- a/drivers/staging/comedi/drivers/plx9052.h +++ b/drivers/staging/comedi/drivers/plx9052.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Definitions for the PLX-9052 PCI interface chip * diff --git a/drivers/staging/comedi/drivers/plx9080.h b/drivers/staging/comedi/drivers/plx9080.h index 469a9573acdc..aa0eda5a8093 100644 --- a/drivers/staging/comedi/drivers/plx9080.h +++ b/drivers/staging/comedi/drivers/plx9080.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * plx9080.h * diff --git a/drivers/staging/comedi/drivers/s626.h b/drivers/staging/comedi/drivers/s626.h index 4bdc4fba736f..749252b1d26b 100644 --- a/drivers/staging/comedi/drivers/s626.h +++ b/drivers/staging/comedi/drivers/s626.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * comedi/drivers/s626.h * Sensoray s626 Comedi driver, header file diff --git a/drivers/staging/comedi/drivers/tests/ni_routes_test.c b/drivers/staging/comedi/drivers/tests/ni_routes_test.c index a1eda035f270..c6dc18f346e8 100644 --- a/drivers/staging/comedi/drivers/tests/ni_routes_test.c +++ b/drivers/staging/comedi/drivers/tests/ni_routes_test.c @@ -372,7 +372,7 @@ void test_ni_lookup_route_register(void) unittest(ni_lookup_route_register(O(8), O(9), T) == 8, "validate last destination\n"); unittest(ni_lookup_route_register(O(10), O(9), T) == -EINVAL, - "lookup invalid desination\n"); + "lookup invalid destination\n"); unittest(ni_lookup_route_register(rgout0_src0, TRIGGER_LINE(0), T) == -EINVAL, diff --git a/drivers/staging/comedi/drivers/usbduxfast.c b/drivers/staging/comedi/drivers/usbduxfast.c index e18c0723b760..0d54f394dbd2 100644 --- a/drivers/staging/comedi/drivers/usbduxfast.c +++ b/drivers/staging/comedi/drivers/usbduxfast.c @@ -61,7 +61,7 @@ #define USBDUXFASTSUB_CPUCS 0xE600 /* - * max lenghth of the transfer-buffer for software upload + * max length of the transfer-buffer for software upload */ #define TB_LEN 0x2000 diff --git a/drivers/staging/comedi/drivers/vmk80xx.c b/drivers/staging/comedi/drivers/vmk80xx.c index 6234b649d887..65dc6c51037e 100644 --- a/drivers/staging/comedi/drivers/vmk80xx.c +++ b/drivers/staging/comedi/drivers/vmk80xx.c @@ -682,10 +682,8 @@ static int vmk80xx_alloc_usb_buffers(struct comedi_device *dev) size = usb_endpoint_maxp(devpriv->ep_tx); devpriv->usb_tx_buf = kzalloc(size, GFP_KERNEL); - if (!devpriv->usb_tx_buf) { - kfree(devpriv->usb_rx_buf); + if (!devpriv->usb_tx_buf) return -ENOMEM; - } return 0; } @@ -800,6 +798,8 @@ static int vmk80xx_auto_attach(struct comedi_device *dev, devpriv->model = board->model; + sema_init(&devpriv->limit_sem, 8); + ret = vmk80xx_find_usb_endpoints(dev); if (ret) return ret; @@ -808,8 +808,6 @@ static int vmk80xx_auto_attach(struct comedi_device *dev, if (ret) return ret; - sema_init(&devpriv->limit_sem, 8); - usb_set_intfdata(intf, devpriv); if (devpriv->model == VMK8055_MODEL) diff --git a/drivers/staging/emxx_udc/emxx_udc.c b/drivers/staging/emxx_udc/emxx_udc.c index 65cc3d9af972..a913d40f0801 100644 --- a/drivers/staging/emxx_udc/emxx_udc.c +++ b/drivers/staging/emxx_udc/emxx_udc.c @@ -27,7 +27,7 @@ #include <linux/usb/gadget.h> #include <linux/irq.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include "emxx_udc.h" @@ -56,25 +56,25 @@ static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *); /*===========================================================================*/ /* Global */ -struct nbu2ss_udc udc_controller; +static struct nbu2ss_udc udc_controller; /*-------------------------------------------------------------------------*/ /* Read */ -static inline u32 _nbu2ss_readl(void *address) +static inline u32 _nbu2ss_readl(void __iomem *address) { return __raw_readl(address); } /*-------------------------------------------------------------------------*/ /* Write */ -static inline void _nbu2ss_writel(void *address, u32 udata) +static inline void _nbu2ss_writel(void __iomem *address, u32 udata) { __raw_writel(udata, address); } /*-------------------------------------------------------------------------*/ /* Set Bit */ -static inline void _nbu2ss_bitset(void *address, u32 udata) +static inline void _nbu2ss_bitset(void __iomem *address, u32 udata) { u32 reg_dt = __raw_readl(address) | (udata); @@ -83,7 +83,7 @@ static inline void _nbu2ss_bitset(void *address, u32 udata) /*-------------------------------------------------------------------------*/ /* Clear Bit */ -static inline void _nbu2ss_bitclr(void *address, u32 udata) +static inline void _nbu2ss_bitclr(void __iomem *address, u32 udata) { u32 reg_dt = __raw_readl(address) & ~(udata); @@ -108,20 +108,16 @@ static void _nbu2ss_dump_register(struct nbu2ss_udc *udc) dev_dbg(&udc->dev, "\n-USB REG-\n"); for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) { - reg_data = _nbu2ss_readl( - (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i)); + reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i)); dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data); - reg_data = _nbu2ss_readl( - (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4)); + reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i + 4)); dev_dbg(&udc->dev, " %08x", (int)reg_data); - reg_data = _nbu2ss_readl( - (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8)); + reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i + 8)); dev_dbg(&udc->dev, " %08x", (int)reg_data); - reg_data = _nbu2ss_readl( - (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12)); + reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i + 12)); dev_dbg(&udc->dev, " %08x\n", (int)reg_data); } @@ -135,6 +131,7 @@ static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req) { u8 recipient; u16 selector; + u16 wIndex; u32 test_mode; struct usb_ctrlrequest *p_ctrl; struct nbu2ss_udc *udc; @@ -149,10 +146,11 @@ static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req) /*-------------------------------------------------*/ /* SET_FEATURE */ recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK); - selector = p_ctrl->wValue; + selector = le16_to_cpu(p_ctrl->wValue); if ((recipient == USB_RECIP_DEVICE) && (selector == USB_DEVICE_TEST_MODE)) { - test_mode = (u32)(p_ctrl->wIndex >> 8); + wIndex = le16_to_cpu(p_ctrl->wIndex); + test_mode = (u32)(wIndex >> 8); _nbu2ss_set_test_mode(udc, test_mode); } } @@ -161,11 +159,8 @@ static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req) /*-------------------------------------------------------------------------*/ /* Initialization usb_request */ -static void _nbu2ss_create_ep0_packet( - struct nbu2ss_udc *udc, - void *p_buf, - unsigned length -) +static void _nbu2ss_create_ep0_packet(struct nbu2ss_udc *udc, + void *p_buf, unsigned int length) { udc->ep0_req.req.buf = p_buf; udc->ep0_req.req.length = length; @@ -184,7 +179,7 @@ static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc) u32 num, buf_type; u32 data, last_ram_adr, use_ram_size; - struct ep_regs *p_ep_regs; + struct ep_regs __iomem *p_ep_regs; last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2; use_ram_size = 0; @@ -377,7 +372,7 @@ static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep) { u32 num; u32 data; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if (udc->vbus_active == 0) return; /* VBUS OFF */ @@ -408,7 +403,7 @@ static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep) /* Abort DMA */ static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep) { - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum - 1].EP_DCR1, DCR1_EPN_REQEN); mdelay(DMA_DISABLE_TIME); /* DCR1_EPN_REQEN Clear */ @@ -417,16 +412,12 @@ static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep) /*-------------------------------------------------------------------------*/ /* Start IN Transfer */ -static void _nbu2ss_ep_in_end( - struct nbu2ss_udc *udc, - u32 epnum, - u32 data32, - u32 length -) +static void _nbu2ss_ep_in_end(struct nbu2ss_udc *udc, + u32 epnum, u32 data32, u32 length) { u32 data; u32 num; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if (length >= sizeof(u32)) return; @@ -460,12 +451,9 @@ static void _nbu2ss_ep_in_end( #ifdef USE_DMA /*-------------------------------------------------------------------------*/ -static void _nbu2ss_dma_map_single( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req, - u8 direct -) +static void _nbu2ss_dma_map_single(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep, + struct nbu2ss_req *req, u8 direct) { if (req->req.dma == DMA_ADDR_INVALID) { if (req->unaligned) { @@ -493,12 +481,9 @@ static void _nbu2ss_dma_map_single( } /*-------------------------------------------------------------------------*/ -static void _nbu2ss_dma_unmap_single( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req, - u8 direct -) +static void _nbu2ss_dma_unmap_single(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep, + struct nbu2ss_req *req, u8 direct) { u8 data[4]; u8 *p; @@ -669,10 +654,8 @@ static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag) } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_ep0_in_transfer( - struct nbu2ss_udc *udc, - struct nbu2ss_req *req -) +static int _nbu2ss_ep0_in_transfer(struct nbu2ss_udc *udc, + struct nbu2ss_req *req) { u8 *p_buffer; /* IN Data Buffer */ u32 data; @@ -726,10 +709,8 @@ static int _nbu2ss_ep0_in_transfer( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_ep0_out_transfer( - struct nbu2ss_udc *udc, - struct nbu2ss_req *req -) +static int _nbu2ss_ep0_out_transfer(struct nbu2ss_udc *udc, + struct nbu2ss_req *req) { u8 *p_buffer; u32 i_remain_size; @@ -803,12 +784,8 @@ static int _nbu2ss_ep0_out_transfer( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_out_dma( - struct nbu2ss_udc *udc, - struct nbu2ss_req *req, - u32 num, - u32 length -) +static int _nbu2ss_out_dma(struct nbu2ss_udc *udc, struct nbu2ss_req *req, + u32 num, u32 length) { dma_addr_t p_buffer; u32 mpkt; @@ -817,7 +794,7 @@ static int _nbu2ss_out_dma( u32 burst = 1; u32 data; int result = -EINVAL; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if (req->dma_flag) return 1; /* DMA is forwarded */ @@ -866,12 +843,8 @@ static int _nbu2ss_out_dma( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_epn_out_pio( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req, - u32 length -) +static int _nbu2ss_epn_out_pio(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep, + struct nbu2ss_req *req, u32 length) { u8 *p_buffer; u32 i; @@ -880,7 +853,7 @@ static int _nbu2ss_epn_out_pio( union usb_reg_access temp_32; union usb_reg_access *p_buf_32; int result = 0; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if (req->dma_flag) return 1; /* DMA is forwarded */ @@ -925,12 +898,8 @@ static int _nbu2ss_epn_out_pio( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_epn_out_data( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req, - u32 data_size -) +static int _nbu2ss_epn_out_data(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep, + struct nbu2ss_req *req, u32 data_size) { u32 num; u32 i_buf_size; @@ -955,16 +924,14 @@ static int _nbu2ss_epn_out_data( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_epn_out_transfer( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req -) +static int _nbu2ss_epn_out_transfer(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep, + struct nbu2ss_req *req) { u32 num; u32 i_recv_length; int result = 1; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if (ep->epnum == 0) return -EINVAL; @@ -1011,13 +978,8 @@ static int _nbu2ss_epn_out_transfer( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_in_dma( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req, - u32 num, - u32 length -) +static int _nbu2ss_in_dma(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep, + struct nbu2ss_req *req, u32 num, u32 length) { dma_addr_t p_buffer; u32 mpkt; /* MaxPacketSize */ @@ -1026,7 +988,7 @@ static int _nbu2ss_in_dma( u32 i_write_length; u32 data; int result = -EINVAL; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if (req->dma_flag) return 1; /* DMA is forwarded */ @@ -1087,12 +1049,8 @@ static int _nbu2ss_in_dma( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_epn_in_pio( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req, - u32 length -) +static int _nbu2ss_epn_in_pio(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep, + struct nbu2ss_req *req, u32 length) { u8 *p_buffer; u32 i; @@ -1101,7 +1059,7 @@ static int _nbu2ss_epn_in_pio( union usb_reg_access temp_32; union usb_reg_access *p_buf_32 = NULL; int result = 0; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if (req->dma_flag) return 1; /* DMA is forwarded */ @@ -1140,12 +1098,8 @@ static int _nbu2ss_epn_in_pio( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_epn_in_data( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req, - u32 data_size -) +static int _nbu2ss_epn_in_data(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep, + struct nbu2ss_req *req, u32 data_size) { u32 num; int nret = 1; @@ -1167,11 +1121,8 @@ static int _nbu2ss_epn_in_data( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_epn_in_transfer( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req -) +static int _nbu2ss_epn_in_transfer(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep, struct nbu2ss_req *req) { u32 num; u32 i_buf_size; @@ -1208,11 +1159,10 @@ static int _nbu2ss_epn_in_transfer( } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_start_transfer( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req, - bool bflag) +static int _nbu2ss_start_transfer(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep, + struct nbu2ss_req *req, + bool bflag) { int nret = -EINVAL; @@ -1287,9 +1237,7 @@ static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep) /*-------------------------------------------------------------------------*/ /* Endpoint Toggle Reset */ -static void _nbu2ss_endpoint_toggle_reset( - struct nbu2ss_udc *udc, - u8 ep_adrs) +static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs) { u8 num; u32 data; @@ -1309,15 +1257,13 @@ static void _nbu2ss_endpoint_toggle_reset( /*-------------------------------------------------------------------------*/ /* Endpoint STALL set */ -static void _nbu2ss_set_endpoint_stall( - struct nbu2ss_udc *udc, - u8 ep_adrs, - bool bstall) +static void _nbu2ss_set_endpoint_stall(struct nbu2ss_udc *udc, + u8 ep_adrs, bool bstall) { u8 num, epnum; u32 data; struct nbu2ss_ep *ep; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if ((ep_adrs == 0) || (ep_adrs == 0x80)) { if (bstall) { @@ -1387,11 +1333,8 @@ static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode) } /*-------------------------------------------------------------------------*/ -static int _nbu2ss_set_feature_device( - struct nbu2ss_udc *udc, - u16 selector, - u16 wIndex -) +static int _nbu2ss_set_feature_device(struct nbu2ss_udc *udc, + u16 selector, u16 wIndex) { int result = -EOPNOTSUPP; @@ -1421,7 +1364,7 @@ static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs) { u8 epnum; u32 data = 0, bit_data; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK; if (epnum == 0) { @@ -1449,8 +1392,8 @@ static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset) { u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK); u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN); - u16 selector = udc->ctrl.wValue; - u16 wIndex = udc->ctrl.wIndex; + u16 selector = le16_to_cpu(udc->ctrl.wValue); + u16 wIndex = le16_to_cpu(udc->ctrl.wIndex); u8 ep_adrs; int result = -EOPNOTSUPP; @@ -1507,16 +1450,14 @@ static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc) } /*-------------------------------------------------------------------------*/ -static void _nbu2ss_epn_set_stall( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep -) +static void _nbu2ss_epn_set_stall(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep) { u8 ep_adrs; u32 regdata; int limit_cnt = 0; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if (ep->direct == USB_DIR_IN) { for (limit_cnt = 0 @@ -1549,8 +1490,8 @@ static int std_req_get_status(struct nbu2ss_udc *udc) if ((udc->ctrl.wValue != 0x0000) || (direction != USB_DIR_IN)) return result; - length = min_t(u16, udc->ctrl.wLength, sizeof(status_data)); - + length = + min_t(u16, le16_to_cpu(udc->ctrl.wLength), sizeof(status_data)); switch (recipient) { case USB_RECIP_DEVICE: if (udc->ctrl.wIndex == 0x0000) { @@ -1565,8 +1506,8 @@ static int std_req_get_status(struct nbu2ss_udc *udc) break; case USB_RECIP_ENDPOINT: - if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) { - ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF); + if (0x0000 == (le16_to_cpu(udc->ctrl.wIndex) & 0xFF70)) { + ep_adrs = (u8)(le16_to_cpu(udc->ctrl.wIndex) & 0xFF); result = _nbu2ss_get_ep_stall(udc, ep_adrs); if (result > 0) @@ -1606,7 +1547,7 @@ static int std_req_set_feature(struct nbu2ss_udc *udc) static int std_req_set_address(struct nbu2ss_udc *udc) { int result = 0; - u32 wValue = udc->ctrl.wValue; + u32 wValue = le16_to_cpu(udc->ctrl.wValue); if ((udc->ctrl.bRequestType != 0x00) || (udc->ctrl.wIndex != 0x0000) || @@ -1628,7 +1569,7 @@ static int std_req_set_address(struct nbu2ss_udc *udc) /*-------------------------------------------------------------------------*/ static int std_req_set_configuration(struct nbu2ss_udc *udc) { - u32 config_value = (u32)(udc->ctrl.wValue & 0x00ff); + u32 config_value = (u32)(le16_to_cpu(udc->ctrl.wValue) & 0x00ff); if ((udc->ctrl.wIndex != 0x0000) || (udc->ctrl.wLength != 0x0000) || @@ -1882,10 +1823,9 @@ static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc) } /*-------------------------------------------------------------------------*/ -static void _nbu2ss_ep_done( - struct nbu2ss_ep *ep, - struct nbu2ss_req *req, - int status) +static void _nbu2ss_ep_done(struct nbu2ss_ep *ep, + struct nbu2ss_req *req, + int status) { struct nbu2ss_udc *udc = ep->udc; @@ -1916,15 +1856,14 @@ static void _nbu2ss_ep_done( } /*-------------------------------------------------------------------------*/ -static inline void _nbu2ss_epn_in_int( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req) +static inline void _nbu2ss_epn_in_int(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep, + struct nbu2ss_req *req) { int result = 0; u32 status; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; if (req->dma_flag) return; /* DMA is forwarded */ @@ -1960,10 +1899,9 @@ static inline void _nbu2ss_epn_in_int( } /*-------------------------------------------------------------------------*/ -static inline void _nbu2ss_epn_out_int( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req) +static inline void _nbu2ss_epn_out_int(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep, + struct nbu2ss_req *req) { int result; @@ -1973,10 +1911,9 @@ static inline void _nbu2ss_epn_out_int( } /*-------------------------------------------------------------------------*/ -static inline void _nbu2ss_epn_in_dma_int( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req) +static inline void _nbu2ss_epn_in_dma_int(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep, + struct nbu2ss_req *req) { u32 mpkt; u32 size; @@ -2010,16 +1947,15 @@ static inline void _nbu2ss_epn_in_dma_int( } /*-------------------------------------------------------------------------*/ -static inline void _nbu2ss_epn_out_dma_int( - struct nbu2ss_udc *udc, - struct nbu2ss_ep *ep, - struct nbu2ss_req *req) +static inline void _nbu2ss_epn_out_dma_int(struct nbu2ss_udc *udc, + struct nbu2ss_ep *ep, + struct nbu2ss_req *req) { int i; u32 num; u32 dmacnt, ep_dmacnt; u32 mpkt; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; num = ep->epnum - 1; @@ -2195,7 +2131,7 @@ static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on) /*-------------------------------------------------------------------------*/ static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep) { - struct fc_regs *p = udc->p_regs; + struct fc_regs __iomem *p = udc->p_regs; if (udc->vbus_active == 0) return; @@ -2284,7 +2220,7 @@ static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc) mdelay(VBUS_CHATTERING_MDELAY); /* wait (ms) */ /* VBUS ON Check*/ - reg_dt = gpio_get_value(VBUS_VALUE); + reg_dt = gpiod_get_value(vbus_gpio); if (reg_dt == 0) { udc->linux_suspended = 0; @@ -2311,7 +2247,7 @@ static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc) } } else { mdelay(5); /* wait (5ms) */ - reg_dt = gpio_get_value(VBUS_VALUE); + reg_dt = gpiod_get_value(vbus_gpio); if (reg_dt == 0) return; @@ -2375,7 +2311,7 @@ static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc) u32 reg_dt; if (udc->usb_suspended == 0) { - reg_dt = gpio_get_value(VBUS_VALUE); + reg_dt = gpiod_get_value(vbus_gpio); if (reg_dt == 0) return; @@ -2413,9 +2349,9 @@ static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc) u32 epnum, int_bit; struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc; - struct fc_regs *preg = udc->p_regs; + struct fc_regs __iomem *preg = udc->p_regs; - if (gpio_get_value(VBUS_VALUE) == 0) { + if (gpiod_get_value(vbus_gpio) == 0) { _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW); _nbu2ss_writel(&preg->USB_INT_ENA, 0); return IRQ_HANDLED; @@ -2424,7 +2360,7 @@ static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc) spin_lock(&udc->lock); for (;;) { - if (gpio_get_value(VBUS_VALUE) == 0) { + if (gpiod_get_value(vbus_gpio) == 0) { _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW); _nbu2ss_writel(&preg->USB_INT_ENA, 0); status = 0; @@ -2478,9 +2414,8 @@ static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc) /*-------------------------------------------------------------------------*/ /* usb_ep_ops */ -static int nbu2ss_ep_enable( - struct usb_ep *_ep, - const struct usb_endpoint_descriptor *desc) +static int nbu2ss_ep_enable(struct usb_ep *_ep, + const struct usb_endpoint_descriptor *desc) { u8 ep_type; unsigned long flags; @@ -2568,9 +2503,8 @@ static int nbu2ss_ep_disable(struct usb_ep *_ep) } /*-------------------------------------------------------------------------*/ -static struct usb_request *nbu2ss_ep_alloc_request( - struct usb_ep *ep, - gfp_t gfp_flags) +static struct usb_request *nbu2ss_ep_alloc_request(struct usb_ep *ep, + gfp_t gfp_flags) { struct nbu2ss_req *req; @@ -2587,9 +2521,8 @@ static struct usb_request *nbu2ss_ep_alloc_request( } /*-------------------------------------------------------------------------*/ -static void nbu2ss_ep_free_request( - struct usb_ep *_ep, - struct usb_request *_req) +static void nbu2ss_ep_free_request(struct usb_ep *_ep, + struct usb_request *_req) { struct nbu2ss_req *req; @@ -2601,10 +2534,8 @@ static void nbu2ss_ep_free_request( } /*-------------------------------------------------------------------------*/ -static int nbu2ss_ep_queue( - struct usb_ep *_ep, - struct usb_request *_req, - gfp_t gfp_flags) +static int nbu2ss_ep_queue(struct usb_ep *_ep, + struct usb_request *_req, gfp_t gfp_flags) { struct nbu2ss_req *req; struct nbu2ss_ep *ep; @@ -2708,9 +2639,7 @@ static int nbu2ss_ep_queue( } /*-------------------------------------------------------------------------*/ -static int nbu2ss_ep_dequeue( - struct usb_ep *_ep, - struct usb_request *_req) +static int nbu2ss_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) { struct nbu2ss_req *req; struct nbu2ss_ep *ep; @@ -2804,7 +2733,7 @@ static int nbu2ss_ep_fifo_status(struct usb_ep *_ep) struct nbu2ss_ep *ep; struct nbu2ss_udc *udc; unsigned long flags; - struct fc_regs *preg; + struct fc_regs __iomem *preg; if (!_ep) { pr_err("%s, bad param\n", __func__); @@ -2821,7 +2750,7 @@ static int nbu2ss_ep_fifo_status(struct usb_ep *_ep) preg = udc->p_regs; - data = gpio_get_value(VBUS_VALUE); + data = gpiod_get_value(vbus_gpio); if (data == 0) return -EINVAL; @@ -2861,7 +2790,7 @@ static void nbu2ss_ep_fifo_flush(struct usb_ep *_ep) return; } - data = gpio_get_value(VBUS_VALUE); + data = gpiod_get_value(vbus_gpio); if (data == 0) return; @@ -2903,7 +2832,7 @@ static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget) } udc = container_of(pgadget, struct nbu2ss_udc, gadget); - data = gpio_get_value(VBUS_VALUE); + data = gpiod_get_value(vbus_gpio); if (data == 0) return -EINVAL; @@ -2925,7 +2854,7 @@ static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget) udc = container_of(pgadget, struct nbu2ss_udc, gadget); - data = gpio_get_value(VBUS_VALUE); + data = gpiod_get_value(vbus_gpio); if (data == 0) { dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data); return -EINVAL; @@ -3021,10 +2950,8 @@ static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on) } /*-------------------------------------------------------------------------*/ -static int nbu2ss_gad_ioctl( - struct usb_gadget *pgadget, - unsigned int code, - unsigned long param) +static int nbu2ss_gad_ioctl(struct usb_gadget *pgadget, + unsigned int code, unsigned long param) { return 0; } @@ -3113,9 +3040,8 @@ static void nbu2ss_drv_ep_init(struct nbu2ss_udc *udc) /*-------------------------------------------------------------------------*/ /* platform_driver */ -static int nbu2ss_drv_contest_init( - struct platform_device *pdev, - struct nbu2ss_udc *udc) +static int nbu2ss_drv_contest_init(struct platform_device *pdev, + struct nbu2ss_udc *udc) { spin_lock_init(&udc->lock); udc->dev = &pdev->dev; @@ -3177,7 +3103,7 @@ static int nbu2ss_drv_probe(struct platform_device *pdev) 0, driver_name, udc); /* IO Memory */ - udc->p_regs = (struct fc_regs *)mmio_base; + udc->p_regs = (struct fc_regs __iomem *)mmio_base; /* USB Function Controller Interrupt */ if (status != 0) { @@ -3193,12 +3119,13 @@ static int nbu2ss_drv_probe(struct platform_device *pdev) } /* VBUS Interrupt */ - irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH); - status = request_irq(INT_VBUS, + vbus_irq = gpiod_to_irq(vbus_gpio); + irq_set_irq_type(vbus_irq, IRQ_TYPE_EDGE_BOTH); + status = request_irq(vbus_irq, _nbu2ss_vbus_irq, IRQF_SHARED, driver_name, udc); if (status != 0) { - dev_err(udc->dev, "request_irq(INT_VBUS) failed\n"); + dev_err(udc->dev, "request_irq(vbus_irq) failed\n"); return status; } @@ -3234,7 +3161,7 @@ static int nbu2ss_drv_remove(struct platform_device *pdev) } /* Interrupt Handler - Release */ - free_irq(INT_VBUS, udc); + free_irq(vbus_irq, udc); return 0; } @@ -3275,7 +3202,7 @@ static int nbu2ss_drv_resume(struct platform_device *pdev) if (!udc) return 0; - data = gpio_get_value(VBUS_VALUE); + data = gpiod_get_value(vbus_gpio); if (data) { udc->vbus_active = 1; udc->devstate = USB_STATE_POWERED; diff --git a/drivers/staging/emxx_udc/emxx_udc.h b/drivers/staging/emxx_udc/emxx_udc.h index 8337e38c238a..b8c3dee5626c 100644 --- a/drivers/staging/emxx_udc/emxx_udc.h +++ b/drivers/staging/emxx_udc/emxx_udc.h @@ -30,6 +30,8 @@ /* below hacked up for staging integration */ #define GPIO_VBUS 0 /* GPIO_P153 on KZM9D */ #define INT_VBUS 0 /* IRQ for GPIO_P153 */ +struct gpio_desc *vbus_gpio; +int vbus_irq; /*------------ Board dependence(Wait) */ @@ -582,7 +584,7 @@ struct nbu2ss_udc { u32 curr_config; /* Current Configuration Number */ - struct fc_regs *p_regs; + struct fc_regs __iomem *p_regs; }; /* USB register access structure */ diff --git a/drivers/staging/erofs/Documentation/filesystems/erofs.txt b/drivers/staging/erofs/Documentation/filesystems/erofs.txt new file mode 100644 index 000000000000..961ec4da7705 --- /dev/null +++ b/drivers/staging/erofs/Documentation/filesystems/erofs.txt @@ -0,0 +1,208 @@ +Overview +======== + +EROFS file-system stands for Enhanced Read-Only File System. Different +from other read-only file systems, it aims to be designed for flexibility, +scalability, but be kept simple and high performance. + +It is designed as a better filesystem solution for the following scenarios: + - read-only storage media or + + - part of a fully trusted read-only solution, which means it needs to be + immutable and bit-for-bit identical to the official golden image for + their releases due to security and other considerations and + + - hope to save some extra storage space with guaranteed end-to-end performance + by using reduced metadata and transparent file compression, especially + for those embedded devices with limited memory (ex, smartphone); + +Here is the main features of EROFS: + - Little endian on-disk design; + + - Currently 4KB block size (nobh) and therefore maximum 16TB address space; + + - Metadata & data could be mixed by design; + + - 2 inode versions for different requirements: + v1 v2 + Inode metadata size: 32 bytes 64 bytes + Max file size: 4 GB 16 EB (also limited by max. vol size) + Max uids/gids: 65536 4294967296 + File creation time: no yes (64 + 32-bit timestamp) + Max hardlinks: 65536 4294967296 + Metadata reserved: 4 bytes 14 bytes + + - Support extended attributes (xattrs) as an option; + + - Support xattr inline and tail-end data inline for all files; + + - Support POSIX.1e ACLs by using xattrs; + + - Support transparent file compression as an option: + LZ4 algorithm with 4 KB fixed-output compression for high performance; + +The following git tree provides the file system user-space tools under +development (ex, formatting tool mkfs.erofs): +>> git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs-utils.git + +Bugs and patches are welcome, please kindly help us and send to the following +linux-erofs mailing list: +>> linux-erofs mailing list <linux-erofs@lists.ozlabs.org> + +Note that EROFS is still working in progress as a Linux staging driver, +Cc the staging mailing list as well is highly recommended: +>> Linux Driver Project Developer List <devel@driverdev.osuosl.org> + +Mount options +============= + +fault_injection=%d Enable fault injection in all supported types with + specified injection rate. Supported injection type: + Type_Name Type_Value + FAULT_KMALLOC 0x000000001 +(no)user_xattr Setup Extended User Attributes. Note: xattr is enabled + by default if CONFIG_EROFS_FS_XATTR is selected. +(no)acl Setup POSIX Access Control List. Note: acl is enabled + by default if CONFIG_EROFS_FS_POSIX_ACL is selected. + +On-disk details +=============== + +Summary +------- +Different from other read-only file systems, an EROFS volume is designed +to be as simple as possible: + + |-> aligned with the block size + ____________________________________________________________ + | |SB| | ... | Metadata | ... | Data | Metadata | ... | Data | + |_|__|_|_____|__________|_____|______|__________|_____|______| + 0 +1K + +All data areas should be aligned with the block size, but metadata areas +may not. All metadatas can be now observed in two different spaces (views): + 1. Inode metadata space + Each valid inode should be aligned with an inode slot, which is a fixed + value (32 bytes) and designed to be kept in line with v1 inode size. + + Each inode can be directly found with the following formula: + inode offset = meta_blkaddr * block_size + 32 * nid + + |-> aligned with 8B + |-> followed closely + + meta_blkaddr blocks |-> another slot + _____________________________________________________________________ + | ... | inode | xattrs | extents | data inline | ... | inode ... + |________|_______|(optional)|(optional)|__(optional)_|_____|__________ + |-> aligned with the inode slot size + . . + . . + . . + . . + . . + . . + .____________________________________________________|-> aligned with 4B + | xattr_ibody_header | shared xattrs | inline xattrs | + |____________________|_______________|_______________| + |-> 12 bytes <-|->x * 4 bytes<-| . + . . . + . . . + . . . + ._______________________________.______________________. + | id | id | id | id | ... | id | ent | ... | ent| ... | + |____|____|____|____|______|____|_____|_____|____|_____| + |-> aligned with 4B + |-> aligned with 4B + + Inode could be 32 or 64 bytes, which can be distinguished from a common + field which all inode versions have -- i_advise: + + __________________ __________________ + | i_advise | | i_advise | + |__________________| |__________________| + | ... | | ... | + | | | | + |__________________| 32 bytes | | + | | + |__________________| 64 bytes + + Xattrs, extents, data inline are followed by the corresponding inode with + proper alignes, and they could be optional for different data mappings, + _currently_ there are totally 3 valid data mappings supported: + + 1) flat file data without data inline (no extent); + 2) fixed-output size data compression (must have extents); + 3) flat file data with tail-end data inline (no extent); + + The size of the optional xattrs is indicated by i_xattr_count in inode + header. Large xattrs or xattrs shared by many different files can be + stored in shared xattrs metadata rather than inlined right after inode. + + 2. Shared xattrs metadata space + Shared xattrs space is similar to the above inode space, started with + a specific block indicated by xattr_blkaddr, organized one by one with + proper align. + + Each share xattr can also be directly found by the following formula: + xattr offset = xattr_blkaddr * block_size + 4 * xattr_id + + |-> aligned by 4 bytes + + xattr_blkaddr blocks |-> aligned with 4 bytes + _________________________________________________________________________ + | ... | xattr_entry | xattr data | ... | xattr_entry | xattr data ... + |________|_____________|_____________|_____|______________|_______________ + +Directories +----------- +All directories are now organized in a compact on-disk format. Note that +each directory block is divided into index and name areas in order to support +random file lookup, and all directory entries are _strictly_ recorded in +alphabetical order in order to support improved prefix binary search +algorithm (could refer to the related source code). + + ___________________________ + / | + / ______________|________________ + / / | nameoff1 | nameoffN-1 + ____________.______________._______________v________________v__________ +| dirent | dirent | ... | dirent | filename | filename | ... | filename | +|___.0___|____1___|_____|___N-1__|____0_____|____1_____|_____|___N-1____| + \ ^ + \ | * could have + \ | trailing '\0' + \________________________| nameoff0 + + Directory block + +Note that apart from the offset of the first filename, nameoff0 also indicates +the total number of directory entries in this block since it is no need to +introduce another on-disk field at all. + +Compression +----------- +Currently, EROFS supports 4KB fixed-output clustersize transparent file +compression, as illustrated below: + + |---- Variant-Length Extent ----|-------- VLE --------|----- VLE ----- + clusterofs clusterofs clusterofs + | | | logical data +_________v_______________________________v_____________________v_______________ +... | . | | . | | . | ... +____|____.________|_____________|________.____|_____________|__.__________|____ + |-> cluster <-|-> cluster <-|-> cluster <-|-> cluster <-|-> cluster <-| + size size size size size + . . . . + . . . . + . . . . + _______._____________._____________._____________._____________________ + ... | | | | ... physical data + _______|_____________|_____________|_____________|_____________________ + |-> cluster <-|-> cluster <-|-> cluster <-| + size size size + +Currently each on-disk physical cluster can contain 4KB (un)compressed data +at most. For each logical cluster, there is a corresponding on-disk index to +describe its cluster type, physical cluster address, etc. + +See "struct z_erofs_vle_decompressed_index" in erofs_fs.h for more details. + diff --git a/drivers/staging/erofs/Kconfig b/drivers/staging/erofs/Kconfig index c8521d71039b..d04b798a8efb 100644 --- a/drivers/staging/erofs/Kconfig +++ b/drivers/staging/erofs/Kconfig @@ -90,8 +90,9 @@ config EROFS_FS_IO_MAX_RETRIES config EROFS_FS_ZIP bool "EROFS Data Compresssion Support" depends on EROFS_FS + select LZ4_DECOMPRESS help - Currently we support VLE Compression only. + Currently we support LZ4 VLE Compression only. Play at your own risk. If you don't want to use compression feature, say N. diff --git a/drivers/staging/erofs/Makefile b/drivers/staging/erofs/Makefile index 9a766eb7ed75..38ab344a285e 100644 --- a/drivers/staging/erofs/Makefile +++ b/drivers/staging/erofs/Makefile @@ -6,8 +6,8 @@ ccflags-y += -Wall -DEROFS_VERSION=\"$(EROFS_VERSION)\" obj-$(CONFIG_EROFS_FS) += erofs.o # staging requirement: to be self-contained in its own directory -ccflags-y += -I$(src)/include +ccflags-y += -I $(srctree)/$(src)/include erofs-objs := super.o inode.o data.o namei.o dir.o utils.o erofs-$(CONFIG_EROFS_FS_XATTR) += xattr.o -erofs-$(CONFIG_EROFS_FS_ZIP) += unzip_vle.o unzip_lz4.o unzip_vle_lz4.o +erofs-$(CONFIG_EROFS_FS_ZIP) += unzip_vle.o unzip_vle_lz4.o diff --git a/drivers/staging/erofs/TODO b/drivers/staging/erofs/TODO index f99ddb842f99..a8608b2f72bd 100644 --- a/drivers/staging/erofs/TODO +++ b/drivers/staging/erofs/TODO @@ -23,13 +23,14 @@ TODO List: - data deduplication and other useful features. -erofs-mkfs (preview version) binaries for i386 / x86_64 are available at: - - https://github.com/hsiangkao/erofs_mkfs_binary - -It is still in progress opening mkfs source code to public, -in any case an open-source mkfs will be released in the near future. - +The following git tree provides the file system user-space +tools under development (ex, formatting tool mkfs.erofs): +>> git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs-utils.git + +The open-source development of erofs-utils is at the early stage. +Contact the original author Li Guifu <bluce.liguifu@huawei.com> and +the co-maintainer Fang Wei <fangwei1@huawei.com> for the latest news +and more details. Code, suggestions, etc, are welcome. Please feel free to ask and send patches, diff --git a/drivers/staging/erofs/data.c b/drivers/staging/erofs/data.c index 6384f73e5418..81af768e7248 100644 --- a/drivers/staging/erofs/data.c +++ b/drivers/staging/erofs/data.c @@ -20,8 +20,9 @@ static inline void read_endio(struct bio *bio) int i; struct bio_vec *bvec; const blk_status_t err = bio->bi_status; + struct bvec_iter_all iter_all; - bio_for_each_segment_all(bvec, bio, i) { + bio_for_each_segment_all(bvec, bio, i, iter_all) { struct page *page = bvec->bv_page; /* page is already locked */ @@ -40,7 +41,7 @@ static inline void read_endio(struct bio *bio) /* prio -- true is used for dir */ struct page *__erofs_get_meta_page(struct super_block *sb, - erofs_blk_t blkaddr, bool prio, bool nofail) + erofs_blk_t blkaddr, bool prio, bool nofail) { struct inode *const bd_inode = sb->s_bdev->bd_inode; struct address_space *const mapping = bd_inode->i_mapping; @@ -53,7 +54,7 @@ struct page *__erofs_get_meta_page(struct super_block *sb, repeat: page = find_or_create_page(mapping, blkaddr, gfp); - if (unlikely(page == NULL)) { + if (unlikely(!page)) { DBG_BUGON(nofail); return ERR_PTR(-ENOMEM); } @@ -76,7 +77,7 @@ repeat: } __submit_bio(bio, REQ_OP_READ, - REQ_META | (prio ? REQ_PRIO : 0)); + REQ_META | (prio ? REQ_PRIO : 0)); lock_page(page); @@ -107,8 +108,8 @@ err_out: } static int erofs_map_blocks_flatmode(struct inode *inode, - struct erofs_map_blocks *map, - int flags) + struct erofs_map_blocks *map, + int flags) { int err = 0; erofs_blk_t nblocks, lastblk; @@ -151,7 +152,7 @@ static int erofs_map_blocks_flatmode(struct inode *inode, map->m_flags |= EROFS_MAP_META; } else { errln("internal error @ nid: %llu (size %llu), m_la 0x%llx", - vi->nid, inode->i_size, map->m_la); + vi->nid, inode->i_size, map->m_la); DBG_BUGON(1); err = -EIO; goto err_out; @@ -165,54 +166,27 @@ err_out: return err; } -#ifdef CONFIG_EROFS_FS_ZIP -extern int z_erofs_map_blocks_iter(struct inode *, - struct erofs_map_blocks *, struct page **, int); -#endif - -int erofs_map_blocks_iter(struct inode *inode, - struct erofs_map_blocks *map, - struct page **mpage_ret, int flags) -{ - /* by default, reading raw data never use erofs_map_blocks_iter */ - if (unlikely(!is_inode_layout_compression(inode))) { - if (*mpage_ret != NULL) - put_page(*mpage_ret); - *mpage_ret = NULL; - - return erofs_map_blocks(inode, map, flags); - } - -#ifdef CONFIG_EROFS_FS_ZIP - return z_erofs_map_blocks_iter(inode, map, mpage_ret, flags); -#else - /* data compression is not available */ - return -ENOTSUPP; -#endif -} - int erofs_map_blocks(struct inode *inode, - struct erofs_map_blocks *map, int flags) + struct erofs_map_blocks *map, int flags) { if (unlikely(is_inode_layout_compression(inode))) { - struct page *mpage = NULL; - int err; + int err = z_erofs_map_blocks_iter(inode, map, flags); - err = erofs_map_blocks_iter(inode, map, &mpage, flags); - if (mpage != NULL) - put_page(mpage); + if (map->mpage) { + put_page(map->mpage); + map->mpage = NULL; + } return err; } return erofs_map_blocks_flatmode(inode, map, flags); } -static inline struct bio *erofs_read_raw_page( - struct bio *bio, - struct address_space *mapping, - struct page *page, - erofs_off_t *last_block, - unsigned int nblocks, - bool ra) +static inline struct bio *erofs_read_raw_page(struct bio *bio, + struct address_space *mapping, + struct page *page, + erofs_off_t *last_block, + unsigned int nblocks, + bool ra) { struct inode *inode = mapping->host; erofs_off_t current_block = (erofs_off_t)page->index; @@ -232,15 +206,15 @@ static inline struct bio *erofs_read_raw_page( } /* note that for readpage case, bio also equals to NULL */ - if (bio != NULL && - /* not continuous */ - *last_block + 1 != current_block) { + if (bio && + /* not continuous */ + *last_block + 1 != current_block) { submit_bio_retry: __submit_bio(bio, REQ_OP_READ, 0); bio = NULL; } - if (bio == NULL) { + if (!bio) { struct erofs_map_blocks map = { .m_la = blknr_to_addr(current_block), }; @@ -307,7 +281,7 @@ submit_bio_retry: nblocks = BIO_MAX_PAGES; bio = erofs_grab_bio(inode->i_sb, - blknr, nblocks, read_endio, false); + blknr, nblocks, read_endio, false); if (IS_ERR(bio)) { err = PTR_ERR(bio); @@ -324,7 +298,7 @@ submit_bio_retry: *last_block = current_block; /* shift in advance in case of it followed by too many gaps */ - if (unlikely(bio->bi_vcnt >= bio->bi_max_vecs)) { + if (bio->bi_iter.bi_size >= bio->bi_max_vecs * PAGE_SIZE) { /* err should reassign to 0 after submitting */ err = 0; goto submit_bio_out; @@ -342,7 +316,7 @@ has_updated: unlock_page(page); /* if updated manually, continuous pages has a gap */ - if (bio != NULL) + if (bio) submit_bio_out: __submit_bio(bio, REQ_OP_READ, 0); @@ -361,7 +335,7 @@ static int erofs_raw_access_readpage(struct file *file, struct page *page) trace_erofs_readpage(page, true); bio = erofs_read_raw_page(NULL, page->mapping, - page, &last_block, 1, false); + page, &last_block, 1, false); if (IS_ERR(bio)) return PTR_ERR(bio); @@ -371,8 +345,9 @@ static int erofs_raw_access_readpage(struct file *file, struct page *page) } static int erofs_raw_access_readpages(struct file *filp, - struct address_space *mapping, - struct list_head *pages, unsigned int nr_pages) + struct address_space *mapping, + struct list_head *pages, + unsigned int nr_pages) { erofs_off_t last_block; struct bio *bio = NULL; @@ -389,13 +364,13 @@ static int erofs_raw_access_readpages(struct file *filp, if (!add_to_page_cache_lru(page, mapping, page->index, gfp)) { bio = erofs_read_raw_page(bio, mapping, page, - &last_block, nr_pages, true); + &last_block, nr_pages, true); /* all the page errors are ignored when readahead */ if (IS_ERR(bio)) { pr_err("%s, readahead error at page %lu of nid %llu\n", - __func__, page->index, - EROFS_V(mapping->host)->nid); + __func__, page->index, + EROFS_V(mapping->host)->nid); bio = NULL; } @@ -407,7 +382,7 @@ static int erofs_raw_access_readpages(struct file *filp, DBG_BUGON(!list_empty(pages)); /* the rare case (end in gaps) */ - if (unlikely(bio != NULL)) + if (unlikely(bio)) __submit_bio(bio, REQ_OP_READ, 0); return 0; } diff --git a/drivers/staging/erofs/dir.c b/drivers/staging/erofs/dir.c index d1cb0d78ab84..9bbc68729c11 100644 --- a/drivers/staging/erofs/dir.c +++ b/drivers/staging/erofs/dir.c @@ -23,9 +23,24 @@ static const unsigned char erofs_filetype_table[EROFS_FT_MAX] = { [EROFS_FT_SYMLINK] = DT_LNK, }; +static void debug_one_dentry(unsigned char d_type, const char *de_name, + unsigned int de_namelen) +{ +#ifdef CONFIG_EROFS_FS_DEBUG + /* since the on-disk name could not have the trailing '\0' */ + unsigned char dbg_namebuf[EROFS_NAME_LEN + 1]; + + memcpy(dbg_namebuf, de_name, de_namelen); + dbg_namebuf[de_namelen] = '\0'; + + debugln("found dirent %s de_len %u d_type %d", dbg_namebuf, + de_namelen, d_type); +#endif +} + static int erofs_fill_dentries(struct dir_context *ctx, - void *dentry_blk, unsigned int *ofs, - unsigned int nameoff, unsigned int maxsize) + void *dentry_blk, unsigned int *ofs, + unsigned int nameoff, unsigned int maxsize) { struct erofs_dirent *de = dentry_blk; const struct erofs_dirent *end = dentry_blk + nameoff; @@ -33,14 +48,10 @@ static int erofs_fill_dentries(struct dir_context *ctx, de = dentry_blk + *ofs; while (de < end) { const char *de_name; - int de_namelen; + unsigned int de_namelen; unsigned char d_type; -#ifdef CONFIG_EROFS_FS_DEBUG - unsigned int dbg_namelen; - unsigned char dbg_namebuf[EROFS_NAME_LEN]; -#endif - if (unlikely(de->file_type < EROFS_FT_MAX)) + if (de->file_type < EROFS_FT_MAX) d_type = erofs_filetype_table[de->file_type]; else d_type = DT_UNKNOWN; @@ -48,26 +59,23 @@ static int erofs_fill_dentries(struct dir_context *ctx, nameoff = le16_to_cpu(de->nameoff); de_name = (char *)dentry_blk + nameoff; - de_namelen = unlikely(de + 1 >= end) ? - /* last directory entry */ - strnlen(de_name, maxsize - nameoff) : - le16_to_cpu(de[1].nameoff) - nameoff; - - /* the corrupted directory found */ - BUG_ON(de_namelen < 0); - -#ifdef CONFIG_EROFS_FS_DEBUG - dbg_namelen = min(EROFS_NAME_LEN - 1, de_namelen); - memcpy(dbg_namebuf, de_name, dbg_namelen); - dbg_namebuf[dbg_namelen] = '\0'; + /* the last dirent in the block? */ + if (de + 1 >= end) + de_namelen = strnlen(de_name, maxsize - nameoff); + else + de_namelen = le16_to_cpu(de[1].nameoff) - nameoff; - debugln("%s, found de_name %s de_len %d d_type %d", __func__, - dbg_namebuf, de_namelen, d_type); -#endif + /* a corrupted entry is found */ + if (unlikely(nameoff + de_namelen > maxsize || + de_namelen > EROFS_NAME_LEN)) { + DBG_BUGON(1); + return -EIO; + } + debug_one_dentry(d_type, de_name, de_namelen); if (!dir_emit(ctx, de_name, de_namelen, - le64_to_cpu(de->nid), d_type)) - /* stoped by some reason */ + le64_to_cpu(de->nid), d_type)) + /* stopped by some reason */ return 1; ++de; *ofs += sizeof(struct erofs_dirent); @@ -95,15 +103,14 @@ static int erofs_readdir(struct file *f, struct dir_context *ctx) if (IS_ERR(dentry_page)) continue; - lock_page(dentry_page); de = (struct erofs_dirent *)kmap(dentry_page); nameoff = le16_to_cpu(de->nameoff); if (unlikely(nameoff < sizeof(struct erofs_dirent) || - nameoff >= PAGE_SIZE)) { + nameoff >= PAGE_SIZE)) { errln("%s, invalid de[0].nameoff %u", - __func__, nameoff); + __func__, nameoff); err = -EIO; goto skip_this; @@ -125,7 +132,6 @@ static int erofs_readdir(struct file *f, struct dir_context *ctx) skip_this: kunmap(dentry_page); - unlock_page(dentry_page); put_page(dentry_page); ctx->pos = blknr_to_addr(i) + ofs; @@ -141,6 +147,6 @@ skip_this: const struct file_operations erofs_dir_fops = { .llseek = generic_file_llseek, .read = generic_read_dir, - .iterate = erofs_readdir, + .iterate_shared = erofs_readdir, }; diff --git a/drivers/staging/erofs/erofs_fs.h b/drivers/staging/erofs/erofs_fs.h index d4bffa2852b3..fa52898df006 100644 --- a/drivers/staging/erofs/erofs_fs.h +++ b/drivers/staging/erofs/erofs_fs.h @@ -38,10 +38,6 @@ struct erofs_super_block { /* 80 */__u8 reserved2[48]; /* 128 bytes */ } __packed; -#define __EROFS_BIT(_prefix, _cur, _pre) enum { \ - _prefix ## _cur ## _BIT = _prefix ## _pre ## _BIT + \ - _prefix ## _pre ## _BITS } - /* * erofs inode data mapping: * 0 - inode plain without inline data A: @@ -58,11 +54,13 @@ enum { EROFS_INODE_LAYOUT_INLINE, EROFS_INODE_LAYOUT_MAX }; + +/* bit definitions of inode i_advise */ #define EROFS_I_VERSION_BITS 1 #define EROFS_I_DATA_MAPPING_BITS 3 #define EROFS_I_VERSION_BIT 0 -__EROFS_BIT(EROFS_I_, DATA_MAPPING, VERSION); +#define EROFS_I_DATA_MAPPING_BIT 1 struct erofs_inode_v1 { /* 0 */__le16 i_advise; diff --git a/drivers/staging/erofs/inode.c b/drivers/staging/erofs/inode.c index 04c61a9d7b76..924b8dfc7a8f 100644 --- a/drivers/staging/erofs/inode.c +++ b/drivers/staging/erofs/inode.c @@ -133,7 +133,13 @@ static int fill_inline_data(struct inode *inode, void *data, return -ENOMEM; m_pofs += vi->inode_isize + vi->xattr_isize; - BUG_ON(m_pofs + inode->i_size > PAGE_SIZE); + + /* inline symlink data shouldn't across page boundary as well */ + if (unlikely(m_pofs + inode->i_size > PAGE_SIZE)) { + DBG_BUGON(1); + kfree(lnk); + return -EIO; + } /* get in-page inline data */ memcpy(lnk, data + m_pofs, inode->i_size); @@ -171,39 +177,25 @@ static int fill_inode(struct inode *inode, int isdir) return PTR_ERR(page); } - BUG_ON(!PageUptodate(page)); + DBG_BUGON(!PageUptodate(page)); data = page_address(page); err = read_inode(inode, data + ofs); if (!err) { /* setup the new inode */ if (S_ISREG(inode->i_mode)) { -#ifdef CONFIG_EROFS_FS_XATTR - if (vi->xattr_isize) - inode->i_op = &erofs_generic_xattr_iops; -#endif + inode->i_op = &erofs_generic_iops; inode->i_fop = &generic_ro_fops; } else if (S_ISDIR(inode->i_mode)) { - inode->i_op = -#ifdef CONFIG_EROFS_FS_XATTR - vi->xattr_isize ? &erofs_dir_xattr_iops : -#endif - &erofs_dir_iops; + inode->i_op = &erofs_dir_iops; inode->i_fop = &erofs_dir_fops; } else if (S_ISLNK(inode->i_mode)) { /* by default, page_get_link is used for symlink */ - inode->i_op = -#ifdef CONFIG_EROFS_FS_XATTR - &erofs_symlink_xattr_iops, -#else - &page_symlink_inode_operations; -#endif + inode->i_op = &erofs_symlink_iops; inode_nohighmem(inode); } else if (S_ISCHR(inode->i_mode) || S_ISBLK(inode->i_mode) || S_ISFIFO(inode->i_mode) || S_ISSOCK(inode->i_mode)) { -#ifdef CONFIG_EROFS_FS_XATTR - inode->i_op = &erofs_special_inode_operations; -#endif + inode->i_op = &erofs_generic_iops; init_special_inode(inode, inode->i_mode, inode->i_rdev); } else { err = -EIO; @@ -291,23 +283,26 @@ struct inode *erofs_iget(struct super_block *sb, return inode; } +const struct inode_operations erofs_generic_iops = { #ifdef CONFIG_EROFS_FS_XATTR -const struct inode_operations erofs_generic_xattr_iops = { .listxattr = erofs_listxattr, +#endif + .get_acl = erofs_get_acl, }; -const struct inode_operations erofs_symlink_xattr_iops = { +const struct inode_operations erofs_symlink_iops = { .get_link = page_get_link, +#ifdef CONFIG_EROFS_FS_XATTR .listxattr = erofs_listxattr, +#endif + .get_acl = erofs_get_acl, }; -const struct inode_operations erofs_special_inode_operations = { - .listxattr = erofs_listxattr, -}; - -const struct inode_operations erofs_fast_symlink_xattr_iops = { +const struct inode_operations erofs_fast_symlink_iops = { .get_link = simple_get_link, +#ifdef CONFIG_EROFS_FS_XATTR .listxattr = erofs_listxattr, -}; #endif + .get_acl = erofs_get_acl, +}; diff --git a/drivers/staging/erofs/internal.h b/drivers/staging/erofs/internal.h index 57575c7f5635..e3bfde00c7d2 100644 --- a/drivers/staging/erofs/internal.h +++ b/drivers/staging/erofs/internal.h @@ -39,7 +39,7 @@ #define debugln(x, ...) ((void)0) #define dbg_might_sleep() ((void)0) -#define DBG_BUGON(...) ((void)0) +#define DBG_BUGON(x) ((void)(x)) #endif enum { @@ -194,86 +194,82 @@ struct erofs_workgroup { #define EROFS_LOCKED_MAGIC (INT_MIN | 0xE0F510CCL) -static inline bool erofs_workgroup_try_to_freeze( - struct erofs_workgroup *grp, int v) +#if defined(CONFIG_SMP) +static inline bool erofs_workgroup_try_to_freeze(struct erofs_workgroup *grp, + int val) { -#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) - if (v != atomic_cmpxchg(&grp->refcount, - v, EROFS_LOCKED_MAGIC)) - return false; - preempt_disable(); -#else preempt_disable(); - if (atomic_read(&grp->refcount) != v) { + if (val != atomic_cmpxchg(&grp->refcount, val, EROFS_LOCKED_MAGIC)) { preempt_enable(); return false; } -#endif return true; } -static inline void erofs_workgroup_unfreeze( - struct erofs_workgroup *grp, int v) +static inline void erofs_workgroup_unfreeze(struct erofs_workgroup *grp, + int orig_val) { -#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) - atomic_set(&grp->refcount, v); -#endif + /* + * other observers should notice all modifications + * in the freezing period. + */ + smp_mb(); + atomic_set(&grp->refcount, orig_val); preempt_enable(); } -static inline bool erofs_workgroup_get(struct erofs_workgroup *grp, int *ocnt) +static inline int erofs_wait_on_workgroup_freezed(struct erofs_workgroup *grp) { - const int locked = (int)EROFS_LOCKED_MAGIC; - int o; - -repeat: - o = atomic_read(&grp->refcount); - - /* spin if it is temporarily locked at the reclaim path */ - if (unlikely(o == locked)) { -#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) - do - cpu_relax(); - while (atomic_read(&grp->refcount) == locked); -#endif - goto repeat; + return atomic_cond_read_relaxed(&grp->refcount, + VAL != EROFS_LOCKED_MAGIC); +} +#else +static inline bool erofs_workgroup_try_to_freeze(struct erofs_workgroup *grp, + int val) +{ + preempt_disable(); + /* no need to spin on UP platforms, let's just disable preemption. */ + if (val != atomic_read(&grp->refcount)) { + preempt_enable(); + return false; } - - if (unlikely(o <= 0)) - return -1; - - if (unlikely(atomic_cmpxchg(&grp->refcount, o, o + 1) != o)) - goto repeat; - - *ocnt = o; - return 0; + return true; } -#define __erofs_workgroup_get(grp) atomic_inc(&(grp)->refcount) - -extern int erofs_workgroup_put(struct erofs_workgroup *grp); - -extern struct erofs_workgroup *erofs_find_workgroup( - struct super_block *sb, pgoff_t index, bool *tag); - -extern int erofs_register_workgroup(struct super_block *sb, - struct erofs_workgroup *grp, bool tag); - -extern unsigned long erofs_shrink_workstation(struct erofs_sb_info *sbi, - unsigned long nr_shrink, bool cleanup); +static inline void erofs_workgroup_unfreeze(struct erofs_workgroup *grp, + int orig_val) +{ + preempt_enable(); +} -static inline void erofs_workstation_cleanup_all(struct super_block *sb) +static inline int erofs_wait_on_workgroup_freezed(struct erofs_workgroup *grp) { - erofs_shrink_workstation(EROFS_SB(sb), ~0UL, true); + int v = atomic_read(&grp->refcount); + + /* workgroup is never freezed on uniprocessor systems */ + DBG_BUGON(v == EROFS_LOCKED_MAGIC); + return v; } +#endif + +int erofs_workgroup_put(struct erofs_workgroup *grp); +struct erofs_workgroup *erofs_find_workgroup(struct super_block *sb, + pgoff_t index, bool *tag); +int erofs_register_workgroup(struct super_block *sb, + struct erofs_workgroup *grp, bool tag); +unsigned long erofs_shrink_workstation(struct erofs_sb_info *sbi, + unsigned long nr_shrink, bool cleanup); +void erofs_workgroup_free_rcu(struct erofs_workgroup *grp); #ifdef EROFS_FS_HAS_MANAGED_CACHE -#define EROFS_UNALLOCATED_CACHED_PAGE ((void *)0x5F0EF00D) +int erofs_try_to_free_all_cached_pages(struct erofs_sb_info *sbi, + struct erofs_workgroup *egrp); +int erofs_try_to_free_cached_page(struct address_space *mapping, + struct page *page); -extern int erofs_try_to_free_all_cached_pages(struct erofs_sb_info *sbi, - struct erofs_workgroup *egrp); -extern int erofs_try_to_free_cached_page(struct address_space *mapping, - struct page *page); +#define MNGD_MAPPING(sbi) ((sbi)->managed_cache->i_mapping) +#else +#define MNGD_MAPPING(sbi) (NULL) #endif #define DEFAULT_MAX_SYNC_DECOMPRESS_PAGES 3 @@ -331,12 +327,17 @@ static inline erofs_off_t iloc(struct erofs_sb_info *sbi, erofs_nid_t nid) return blknr_to_addr(sbi->meta_blkaddr) + (nid << sbi->islotbits); } -#define inode_set_inited_xattr(inode) (EROFS_V(inode)->flags |= 1) -#define inode_has_inited_xattr(inode) (EROFS_V(inode)->flags & 1) +/* atomic flag definitions */ +#define EROFS_V_EA_INITED_BIT 0 + +/* bitlock definitions (arranged in reverse order) */ +#define EROFS_V_BL_XATTR_BIT (BITS_PER_LONG - 1) struct erofs_vnode { erofs_nid_t nid; - unsigned int flags; + + /* atomic flags (including bitlocks) */ + unsigned long flags; unsigned char data_mapping_mode; /* inline size in bytes */ @@ -389,8 +390,6 @@ static inline bool is_inode_layout_inline(struct inode *inode) } extern const struct super_operations erofs_sops; -extern const struct inode_operations erofs_dir_iops; -extern const struct file_operations erofs_dir_fops; extern const struct address_space_operations erofs_raw_access_aops; #ifdef CONFIG_EROFS_FS_ZIP @@ -438,11 +437,26 @@ struct erofs_map_blocks { u64 m_plen, m_llen; unsigned int m_flags; + + struct page *mpage; }; /* Flags used by erofs_map_blocks() */ #define EROFS_GET_BLOCKS_RAW 0x0001 +#ifdef CONFIG_EROFS_FS_ZIP +int z_erofs_map_blocks_iter(struct inode *inode, + struct erofs_map_blocks *map, + int flags); +#else +static inline int z_erofs_map_blocks_iter(struct inode *inode, + struct erofs_map_blocks *map, + int flags) +{ + return -ENOTSUPP; +} +#endif + /* data.c */ static inline struct bio * erofs_grab_bio(struct super_block *sb, @@ -483,8 +497,8 @@ static inline void __submit_bio(struct bio *bio, unsigned op, unsigned op_flags) #define EROFS_IO_MAX_RETRIES_NOFAIL CONFIG_EROFS_FS_IO_MAX_RETRIES #endif -extern struct page *__erofs_get_meta_page(struct super_block *sb, - erofs_blk_t blkaddr, bool prio, bool nofail); +struct page *__erofs_get_meta_page(struct super_block *sb, erofs_blk_t blkaddr, + bool prio, bool nofail); static inline struct page *erofs_get_meta_page(struct super_block *sb, erofs_blk_t blkaddr, bool prio) @@ -498,15 +512,7 @@ static inline struct page *erofs_get_meta_page_nofail(struct super_block *sb, return __erofs_get_meta_page(sb, blkaddr, prio, true); } -extern int erofs_map_blocks(struct inode *, struct erofs_map_blocks *, int); -extern int erofs_map_blocks_iter(struct inode *, struct erofs_map_blocks *, - struct page **, int); - -struct erofs_map_blocks_iter { - struct erofs_map_blocks map; - struct page *mpage; -}; - +int erofs_map_blocks(struct inode *, struct erofs_map_blocks *, int); static inline struct page * erofs_get_inline_page(struct inode *inode, @@ -526,41 +532,31 @@ static inline unsigned long erofs_inode_hash(erofs_nid_t nid) #endif } -extern struct inode *erofs_iget(struct super_block *sb, - erofs_nid_t nid, bool dir); - -/* dir.c */ -int erofs_namei(struct inode *dir, struct qstr *name, - erofs_nid_t *nid, unsigned *d_type); - -#ifdef CONFIG_EROFS_FS_XATTR -/* xattr.c */ -extern const struct xattr_handler *erofs_xattr_handlers[]; - -/* symlink and special inode */ -extern const struct inode_operations erofs_symlink_xattr_iops; -extern const struct inode_operations erofs_fast_symlink_xattr_iops; -extern const struct inode_operations erofs_special_inode_operations; -#endif +extern const struct inode_operations erofs_generic_iops; +extern const struct inode_operations erofs_symlink_iops; +extern const struct inode_operations erofs_fast_symlink_iops; static inline void set_inode_fast_symlink(struct inode *inode) { -#ifdef CONFIG_EROFS_FS_XATTR - inode->i_op = &erofs_fast_symlink_xattr_iops; -#else - inode->i_op = &simple_symlink_inode_operations; -#endif + inode->i_op = &erofs_fast_symlink_iops; } static inline bool is_inode_fast_symlink(struct inode *inode) { -#ifdef CONFIG_EROFS_FS_XATTR - return inode->i_op == &erofs_fast_symlink_xattr_iops; -#else - return inode->i_op == &simple_symlink_inode_operations; -#endif + return inode->i_op == &erofs_fast_symlink_iops; } +struct inode *erofs_iget(struct super_block *sb, erofs_nid_t nid, bool dir); + +/* namei.c */ +extern const struct inode_operations erofs_dir_iops; + +int erofs_namei(struct inode *dir, struct qstr *name, + erofs_nid_t *nid, unsigned int *d_type); + +/* dir.c */ +extern const struct file_operations erofs_dir_fops; + static inline void *erofs_vmap(struct page **pages, unsigned int count) { #ifdef CONFIG_EROFS_FS_USE_VM_MAP_RAM @@ -589,15 +585,11 @@ static inline void erofs_vunmap(const void *mem, unsigned int count) } /* utils.c */ -extern struct page *erofs_allocpage(struct list_head *pool, gfp_t gfp); - -extern void erofs_register_super(struct super_block *sb); -extern void erofs_unregister_super(struct super_block *sb); +extern struct shrinker erofs_shrinker_info; -extern unsigned long erofs_shrink_count(struct shrinker *shrink, - struct shrink_control *sc); -extern unsigned long erofs_shrink_scan(struct shrinker *shrink, - struct shrink_control *sc); +struct page *erofs_allocpage(struct list_head *pool, gfp_t gfp); +void erofs_register_super(struct super_block *sb); +void erofs_unregister_super(struct super_block *sb); #ifndef lru_to_page #define lru_to_page(head) (list_entry((head)->prev, struct page, lru)) diff --git a/drivers/staging/erofs/lz4defs.h b/drivers/staging/erofs/lz4defs.h deleted file mode 100644 index 00a0b58a0871..000000000000 --- a/drivers/staging/erofs/lz4defs.h +++ /dev/null @@ -1,227 +0,0 @@ -#ifndef __LZ4DEFS_H__ -#define __LZ4DEFS_H__ - -/* - * lz4defs.h -- common and architecture specific defines for the kernel usage - - * LZ4 - Fast LZ compression algorithm - * Copyright (C) 2011-2016, Yann Collet. - * BSD 2-Clause License (http://www.opensource.org/licenses/bsd-license.php) - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following disclaimer - * in the documentation and/or other materials provided with the - * distribution. - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * You can contact the author at : - * - LZ4 homepage : http://www.lz4.org - * - LZ4 source repository : https://github.com/lz4/lz4 - * - * Changed for kernel usage by: - * Sven Schmidt <4sschmid@informatik.uni-hamburg.de> - */ - -#include <asm/unaligned.h> -#include <linux/string.h> /* memset, memcpy */ - -#define FORCE_INLINE __always_inline - -/*-************************************ - * Basic Types - **************************************/ -#include <linux/types.h> - -typedef uint8_t BYTE; -typedef uint16_t U16; -typedef uint32_t U32; -typedef int32_t S32; -typedef uint64_t U64; -typedef uintptr_t uptrval; - -/*-************************************ - * Architecture specifics - **************************************/ -#if defined(CONFIG_64BIT) -#define LZ4_ARCH64 1 -#else -#define LZ4_ARCH64 0 -#endif - -#if defined(__LITTLE_ENDIAN) -#define LZ4_LITTLE_ENDIAN 1 -#else -#define LZ4_LITTLE_ENDIAN 0 -#endif - -/*-************************************ - * Constants - **************************************/ -#define MINMATCH 4 - -#define WILDCOPYLENGTH 8 -#define LASTLITERALS 5 -#define MFLIMIT (WILDCOPYLENGTH + MINMATCH) - -/* Increase this value ==> compression run slower on incompressible data */ -#define LZ4_SKIPTRIGGER 6 - -#define HASH_UNIT sizeof(size_t) - -#define KB (1 << 10) -#define MB (1 << 20) -#define GB (1U << 30) - -#define MAXD_LOG 16 -#define MAX_DISTANCE ((1 << MAXD_LOG) - 1) -#define STEPSIZE sizeof(size_t) - -#define ML_BITS 4 -#define ML_MASK ((1U << ML_BITS) - 1) -#define RUN_BITS (8 - ML_BITS) -#define RUN_MASK ((1U << RUN_BITS) - 1) - -/*-************************************ - * Reading and writing into memory - **************************************/ -static FORCE_INLINE U16 LZ4_read16(const void *ptr) -{ - return get_unaligned((const U16 *)ptr); -} - -static FORCE_INLINE U32 LZ4_read32(const void *ptr) -{ - return get_unaligned((const U32 *)ptr); -} - -static FORCE_INLINE size_t LZ4_read_ARCH(const void *ptr) -{ - return get_unaligned((const size_t *)ptr); -} - -static FORCE_INLINE void LZ4_write16(void *memPtr, U16 value) -{ - put_unaligned(value, (U16 *)memPtr); -} - -static FORCE_INLINE void LZ4_write32(void *memPtr, U32 value) -{ - put_unaligned(value, (U32 *)memPtr); -} - -static FORCE_INLINE U16 LZ4_readLE16(const void *memPtr) -{ - return get_unaligned_le16(memPtr); -} - -static FORCE_INLINE void LZ4_writeLE16(void *memPtr, U16 value) -{ - return put_unaligned_le16(value, memPtr); -} - -static FORCE_INLINE void LZ4_copy8(void *dst, const void *src) -{ -#if LZ4_ARCH64 - U64 a = get_unaligned((const U64 *)src); - - put_unaligned(a, (U64 *)dst); -#else - U32 a = get_unaligned((const U32 *)src); - U32 b = get_unaligned((const U32 *)src + 1); - - put_unaligned(a, (U32 *)dst); - put_unaligned(b, (U32 *)dst + 1); -#endif -} - -/* - * customized variant of memcpy, - * which can overwrite up to 7 bytes beyond dstEnd - */ -static FORCE_INLINE void LZ4_wildCopy(void *dstPtr, - const void *srcPtr, void *dstEnd) -{ - BYTE *d = (BYTE *)dstPtr; - const BYTE *s = (const BYTE *)srcPtr; - BYTE *const e = (BYTE *)dstEnd; - - do { - LZ4_copy8(d, s); - d += 8; - s += 8; - } while (d < e); -} - -static FORCE_INLINE unsigned int LZ4_NbCommonBytes(register size_t val) -{ -#if LZ4_LITTLE_ENDIAN - return __ffs(val) >> 3; -#else - return (BITS_PER_LONG - 1 - __fls(val)) >> 3; -#endif -} - -static FORCE_INLINE unsigned int LZ4_count( - const BYTE *pIn, - const BYTE *pMatch, - const BYTE *pInLimit) -{ - const BYTE *const pStart = pIn; - - while (likely(pIn < pInLimit - (STEPSIZE - 1))) { - size_t const diff = LZ4_read_ARCH(pMatch) ^ LZ4_read_ARCH(pIn); - - if (!diff) { - pIn += STEPSIZE; - pMatch += STEPSIZE; - continue; - } - - pIn += LZ4_NbCommonBytes(diff); - - return (unsigned int)(pIn - pStart); - } - -#if LZ4_ARCH64 - if ((pIn < (pInLimit - 3)) - && (LZ4_read32(pMatch) == LZ4_read32(pIn))) { - pIn += 4; - pMatch += 4; - } -#endif - - if ((pIn < (pInLimit - 1)) - && (LZ4_read16(pMatch) == LZ4_read16(pIn))) { - pIn += 2; - pMatch += 2; - } - - if ((pIn < pInLimit) && (*pMatch == *pIn)) - pIn++; - - return (unsigned int)(pIn - pStart); -} - -typedef enum { noLimit = 0, limitedOutput = 1 } limitedOutput_directive; -typedef enum { byPtr, byU32, byU16 } tableType_t; - -typedef enum { noDict = 0, withPrefix64k, usingExtDict } dict_directive; -typedef enum { noDictIssue = 0, dictSmall } dictIssue_directive; - -typedef enum { endOnOutputSize = 0, endOnInputSize = 1 } endCondition_directive; -typedef enum { full = 0, partial = 1 } earlyEnd_directive; - -#endif diff --git a/drivers/staging/erofs/namei.c b/drivers/staging/erofs/namei.c index 5596c52e246d..3f4fa52c10fa 100644 --- a/drivers/staging/erofs/namei.c +++ b/drivers/staging/erofs/namei.c @@ -15,74 +15,77 @@ #include <trace/events/erofs.h> -/* based on the value of qn->len is accurate */ -static inline int dirnamecmp(struct qstr *qn, - struct qstr *qd, unsigned int *matched) +struct erofs_qstr { + const unsigned char *name; + const unsigned char *end; +}; + +/* based on the end of qn is accurate and it must have the trailing '\0' */ +static inline int dirnamecmp(const struct erofs_qstr *qn, + const struct erofs_qstr *qd, + unsigned int *matched) { - unsigned int i = *matched, len = min(qn->len, qd->len); -loop: - if (unlikely(i >= len)) { - *matched = i; - if (qn->len < qd->len) { - /* - * actually (qn->len == qd->len) - * when qd->name[i] == '\0' - */ - return qd->name[i] == '\0' ? 0 : -1; + unsigned int i = *matched; + + /* + * on-disk error, let's only BUG_ON in the debugging mode. + * otherwise, it will return 1 to just skip the invalid name + * and go on (in consideration of the lookup performance). + */ + DBG_BUGON(qd->name > qd->end); + + /* qd could not have trailing '\0' */ + /* However it is absolutely safe if < qd->end */ + while (qd->name + i < qd->end && qd->name[i] != '\0') { + if (qn->name[i] != qd->name[i]) { + *matched = i; + return qn->name[i] > qd->name[i] ? 1 : -1; } - return (qn->len > qd->len); - } - - if (qn->name[i] != qd->name[i]) { - *matched = i; - return qn->name[i] > qd->name[i] ? 1 : -1; + ++i; } - - ++i; - goto loop; + *matched = i; + /* See comments in __d_alloc on the terminating NUL character */ + return qn->name[i] == '\0' ? 0 : 1; } -static struct erofs_dirent *find_target_dirent( - struct qstr *name, - u8 *data, int maxsize) +#define nameoff_from_disk(off, sz) (le16_to_cpu(off) & ((sz) - 1)) + +static struct erofs_dirent *find_target_dirent(struct erofs_qstr *name, + u8 *data, + unsigned int dirblksize, + const int ndirents) { - unsigned int ndirents, head, back; + int head, back; unsigned int startprfx, endprfx; struct erofs_dirent *const de = (struct erofs_dirent *)data; - /* make sure that maxsize is valid */ - BUG_ON(maxsize < sizeof(struct erofs_dirent)); - - ndirents = le16_to_cpu(de->nameoff) / sizeof(*de); - - /* corrupted dir (may be unnecessary...) */ - BUG_ON(!ndirents); - - head = 0; + /* since the 1st dirent has been evaluated previously */ + head = 1; back = ndirents - 1; startprfx = endprfx = 0; while (head <= back) { - unsigned int mid = head + (back - head) / 2; - unsigned int nameoff = le16_to_cpu(de[mid].nameoff); + const int mid = head + (back - head) / 2; + const int nameoff = nameoff_from_disk(de[mid].nameoff, + dirblksize); unsigned int matched = min(startprfx, endprfx); - - struct qstr dname = QSTR_INIT(data + nameoff, - unlikely(mid >= ndirents - 1) ? - maxsize - nameoff : - le16_to_cpu(de[mid + 1].nameoff) - nameoff); + struct erofs_qstr dname = { + .name = data + nameoff, + .end = unlikely(mid >= ndirents - 1) ? + data + dirblksize : + data + nameoff_from_disk(de[mid + 1].nameoff, + dirblksize) + }; /* string comparison without already matched prefix */ int ret = dirnamecmp(name, &dname, &matched); - if (unlikely(!ret)) + if (unlikely(!ret)) { return de + mid; - else if (ret > 0) { + } else if (ret > 0) { head = mid + 1; startprfx = matched; - } else if (unlikely(mid < 1)) /* fix "mid" overflow */ - break; - else { + } else { back = mid - 1; endprfx = matched; } @@ -91,12 +94,12 @@ static struct erofs_dirent *find_target_dirent( return ERR_PTR(-ENOENT); } -static struct page *find_target_block_classic( - struct inode *dir, - struct qstr *name, int *_diff) +static struct page *find_target_block_classic(struct inode *dir, + struct erofs_qstr *name, + int *_ndirents) { unsigned int startprfx, endprfx; - unsigned int head, back; + int head, back; struct address_space *const mapping = dir->i_mapping; struct page *candidate = ERR_PTR(-ENOENT); @@ -105,89 +108,97 @@ static struct page *find_target_block_classic( back = inode_datablocks(dir) - 1; while (head <= back) { - unsigned int mid = head + (back - head) / 2; + const int mid = head + (back - head) / 2; struct page *page = read_mapping_page(mapping, mid, NULL); - if (IS_ERR(page)) { -exact_out: - if (!IS_ERR(candidate)) /* valid candidate */ - put_page(candidate); - return page; - } else { - int diff; - unsigned int ndirents, matched; - struct qstr dname; + if (!IS_ERR(page)) { struct erofs_dirent *de = kmap_atomic(page); - unsigned int nameoff = le16_to_cpu(de->nameoff); - - ndirents = nameoff / sizeof(*de); + const int nameoff = nameoff_from_disk(de->nameoff, + EROFS_BLKSIZ); + const int ndirents = nameoff / sizeof(*de); + int diff; + unsigned int matched; + struct erofs_qstr dname; - /* corrupted dir (should have one entry at least) */ - BUG_ON(!ndirents || nameoff > PAGE_SIZE); + if (unlikely(!ndirents)) { + DBG_BUGON(1); + kunmap_atomic(de); + put_page(page); + page = ERR_PTR(-EIO); + goto out; + } matched = min(startprfx, endprfx); dname.name = (u8 *)de + nameoff; - dname.len = ndirents == 1 ? - /* since the rest of the last page is 0 */ - EROFS_BLKSIZ - nameoff - : le16_to_cpu(de[1].nameoff) - nameoff; + if (ndirents == 1) + dname.end = (u8 *)de + EROFS_BLKSIZ; + else + dname.end = (u8 *)de + + nameoff_from_disk(de[1].nameoff, + EROFS_BLKSIZ); /* string comparison without already matched prefix */ diff = dirnamecmp(name, &dname, &matched); kunmap_atomic(de); if (unlikely(!diff)) { - *_diff = 0; - goto exact_out; + *_ndirents = 0; + goto out; } else if (diff > 0) { head = mid + 1; startprfx = matched; - if (likely(!IS_ERR(candidate))) + if (!IS_ERR(candidate)) put_page(candidate); candidate = page; + *_ndirents = ndirents; } else { put_page(page); - if (unlikely(mid < 1)) /* fix "mid" overflow */ - break; - back = mid - 1; endprfx = matched; } + continue; } +out: /* free if the candidate is valid */ + if (!IS_ERR(candidate)) + put_page(candidate); + return page; } - *_diff = 1; return candidate; } int erofs_namei(struct inode *dir, - struct qstr *name, - erofs_nid_t *nid, unsigned int *d_type) + struct qstr *name, + erofs_nid_t *nid, unsigned int *d_type) { - int diff; + int ndirents; struct page *page; - u8 *data; + void *data; struct erofs_dirent *de; + struct erofs_qstr qn; if (unlikely(!dir->i_size)) return -ENOENT; - diff = 1; - page = find_target_block_classic(dir, name, &diff); + qn.name = name->name; + qn.end = name->name + name->len; + + ndirents = 0; + page = find_target_block_classic(dir, &qn, &ndirents); - if (unlikely(IS_ERR(page))) + if (IS_ERR(page)) return PTR_ERR(page); data = kmap_atomic(page); /* the target page has been mapped */ - de = likely(diff) ? - /* since the rest of the last page is 0 */ - find_target_dirent(name, data, EROFS_BLKSIZ) : - (struct erofs_dirent *)data; + if (ndirents) + de = find_target_dirent(&qn, data, EROFS_BLKSIZ, ndirents); + else + de = (struct erofs_dirent *)data; - if (likely(!IS_ERR(de))) { + if (!IS_ERR(de)) { *nid = le64_to_cpu(de->nid); *d_type = de->file_type; } @@ -235,12 +246,9 @@ static struct dentry *erofs_lookup(struct inode *dir, const struct inode_operations erofs_dir_iops = { .lookup = erofs_lookup, -}; - -const struct inode_operations erofs_dir_xattr_iops = { - .lookup = erofs_lookup, #ifdef CONFIG_EROFS_FS_XATTR .listxattr = erofs_listxattr, #endif + .get_acl = erofs_get_acl, }; diff --git a/drivers/staging/erofs/super.c b/drivers/staging/erofs/super.c index f69e619807a1..15c784fba879 100644 --- a/drivers/staging/erofs/super.c +++ b/drivers/staging/erofs/super.c @@ -16,6 +16,7 @@ #include <linux/parser.h> #include <linux/seq_file.h> #include "internal.h" +#include "xattr.h" #define CREATE_TRACE_POINTS #include <trace/events/erofs.h> @@ -40,7 +41,6 @@ static int __init erofs_init_inode_cache(void) static void erofs_exit_inode_cache(void) { - BUG_ON(erofs_inode_cachep == NULL); kmem_cache_destroy(erofs_inode_cachep); } @@ -303,8 +303,8 @@ static int managed_cache_releasepage(struct page *page, gfp_t gfp_mask) int ret = 1; /* 0 - busy */ struct address_space *const mapping = page->mapping; - BUG_ON(!PageLocked(page)); - BUG_ON(mapping->a_ops != &managed_cache_aops); + DBG_BUGON(!PageLocked(page)); + DBG_BUGON(mapping->a_ops != &managed_cache_aops); if (PagePrivate(page)) ret = erofs_try_to_free_cached_page(mapping, page); @@ -317,10 +317,10 @@ static void managed_cache_invalidatepage(struct page *page, { const unsigned int stop = length + offset; - BUG_ON(!PageLocked(page)); + DBG_BUGON(!PageLocked(page)); - /* Check for overflow */ - BUG_ON(stop > PAGE_SIZE || stop < length); + /* Check for potential overflow in debug mode */ + DBG_BUGON(stop > PAGE_SIZE || stop < length); if (offset == 0 && stop == PAGE_SIZE) while (!managed_cache_releasepage(page, GFP_NOFS)) @@ -398,6 +398,11 @@ static int erofs_read_super(struct super_block *sb, if (!silent) infoln("root inode @ nid %llu", ROOT_NID(sbi)); + if (test_opt(sbi, POSIX_ACL)) + sb->s_flags |= SB_POSIXACL; + else + sb->s_flags &= ~SB_POSIXACL; + #ifdef CONFIG_EROFS_FS_ZIP INIT_RADIX_TREE(&sbi->workstn_tree, GFP_ATOMIC); #endif @@ -421,13 +426,14 @@ static int erofs_read_super(struct super_block *sb, errln("rootino(nid %llu) is not a directory(i_mode %o)", ROOT_NID(sbi), inode->i_mode); err = -EINVAL; - goto err_isdir; + iput(inode); + goto err_iget; } sb->s_root = d_make_root(inode); if (sb->s_root == NULL) { err = -ENOMEM; - goto err_makeroot; + goto err_iget; } /* save the device name to sbi */ @@ -442,12 +448,6 @@ static int erofs_read_super(struct super_block *sb, erofs_register_super(sb); - /* - * We already have a positive dentry, which was instantiated - * by d_make_root. Just need to d_rehash it. - */ - d_rehash(sb->s_root); - if (!silent) infoln("mounted on %s with opts: %s.", dev_name, (char *)data); @@ -459,10 +459,6 @@ static int erofs_read_super(struct super_block *sb, */ err_devname: dput(sb->s_root); -err_makeroot: -err_isdir: - if (sb->s_root == NULL) - iput(inode); err_iget: #ifdef EROFS_FS_HAS_MANAGED_CACHE iput(sbi->managed_cache); @@ -500,7 +496,8 @@ static void erofs_put_super(struct super_block *sb) mutex_lock(&sbi->umount_mutex); #ifdef CONFIG_EROFS_FS_ZIP - erofs_workstation_cleanup_all(sb); + /* clean up the compression space of this sb */ + erofs_shrink_workstation(EROFS_SB(sb), ~0UL, true); #endif erofs_unregister_super(sb); @@ -544,12 +541,6 @@ static void erofs_kill_sb(struct super_block *sb) kill_block_super(sb); } -static struct shrinker erofs_shrinker_info = { - .scan_objects = erofs_shrink_scan, - .count_objects = erofs_shrink_count, - .seeks = DEFAULT_SEEKS, -}; - static struct file_system_type erofs_fs_type = { .owner = THIS_MODULE, .name = "erofs", @@ -655,11 +646,16 @@ static int erofs_remount(struct super_block *sb, int *flags, char *data) unsigned int org_inject_rate = erofs_get_fault_rate(sbi); int err; - BUG_ON(!sb_rdonly(sb)); + DBG_BUGON(!sb_rdonly(sb)); err = parse_options(sb, data); if (err) goto out; + if (test_opt(sbi, POSIX_ACL)) + sb->s_flags |= SB_POSIXACL; + else + sb->s_flags &= ~SB_POSIXACL; + *flags |= SB_RDONLY; return 0; out: diff --git a/drivers/staging/erofs/unzip_lz4.c b/drivers/staging/erofs/unzip_lz4.c deleted file mode 100644 index b1ea23f66c4e..000000000000 --- a/drivers/staging/erofs/unzip_lz4.c +++ /dev/null @@ -1,251 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause -/* - * linux/drivers/staging/erofs/unzip_lz4.c - * - * Copyright (C) 2018 HUAWEI, Inc. - * http://www.huawei.com/ - * Created by Gao Xiang <gaoxiang25@huawei.com> - * - * Original code taken from 'linux/lib/lz4/lz4_decompress.c' - */ - -/* - * LZ4 - Fast LZ compression algorithm - * Copyright (C) 2011 - 2016, Yann Collet. - * BSD 2 - Clause License (http://www.opensource.org/licenses/bsd - license.php) - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following disclaimer - * in the documentation and/or other materials provided with the - * distribution. - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * You can contact the author at : - * - LZ4 homepage : http://www.lz4.org - * - LZ4 source repository : https://github.com/lz4/lz4 - * - * Changed for kernel usage by: - * Sven Schmidt <4sschmid@informatik.uni-hamburg.de> - */ -#include "internal.h" -#include <asm/unaligned.h> -#include "lz4defs.h" - -/* - * no public solution to solve our requirement yet. - * see: <required buffer size for LZ4_decompress_safe_partial> - * https://groups.google.com/forum/#!topic/lz4c/_3kkz5N6n00 - */ -static FORCE_INLINE int customized_lz4_decompress_safe_partial( - const void * const source, - void * const dest, - int inputSize, - int outputSize) -{ - /* Local Variables */ - const BYTE *ip = (const BYTE *) source; - const BYTE * const iend = ip + inputSize; - - BYTE *op = (BYTE *) dest; - BYTE * const oend = op + outputSize; - BYTE *cpy; - - static const unsigned int dec32table[] = { 0, 1, 2, 1, 4, 4, 4, 4 }; - static const int dec64table[] = { 0, 0, 0, -1, 0, 1, 2, 3 }; - - /* Empty output buffer */ - if (unlikely(outputSize == 0)) - return ((inputSize == 1) && (*ip == 0)) ? 0 : -1; - - /* Main Loop : decode sequences */ - while (1) { - size_t length; - const BYTE *match; - size_t offset; - - /* get literal length */ - unsigned int const token = *ip++; - - length = token>>ML_BITS; - - if (length == RUN_MASK) { - unsigned int s; - - do { - s = *ip++; - length += s; - } while ((ip < iend - RUN_MASK) & (s == 255)); - - if (unlikely((size_t)(op + length) < (size_t)(op))) { - /* overflow detection */ - goto _output_error; - } - if (unlikely((size_t)(ip + length) < (size_t)(ip))) { - /* overflow detection */ - goto _output_error; - } - } - - /* copy literals */ - cpy = op + length; - if ((cpy > oend - WILDCOPYLENGTH) || - (ip + length > iend - (2 + 1 + LASTLITERALS))) { - if (cpy > oend) { - memcpy(op, ip, length = oend - op); - op += length; - break; - } - - if (unlikely(ip + length > iend)) { - /* - * Error : - * read attempt beyond - * end of input buffer - */ - goto _output_error; - } - - memcpy(op, ip, length); - ip += length; - op += length; - - if (ip > iend - 2) - break; - /* Necessarily EOF, due to parsing restrictions */ - /* break; */ - } else { - LZ4_wildCopy(op, ip, cpy); - ip += length; - op = cpy; - } - - /* get offset */ - offset = LZ4_readLE16(ip); - ip += 2; - match = op - offset; - - if (unlikely(match < (const BYTE *)dest)) { - /* Error : offset outside buffers */ - goto _output_error; - } - - /* get matchlength */ - length = token & ML_MASK; - if (length == ML_MASK) { - unsigned int s; - - do { - s = *ip++; - - if (ip > iend - LASTLITERALS) - goto _output_error; - - length += s; - } while (s == 255); - - if (unlikely((size_t)(op + length) < (size_t)op)) { - /* overflow detection */ - goto _output_error; - } - } - - length += MINMATCH; - - /* copy match within block */ - cpy = op + length; - - if (unlikely(cpy >= oend - WILDCOPYLENGTH)) { - if (cpy >= oend) { - while (op < oend) - *op++ = *match++; - break; - } - goto __match; - } - - /* costs ~1%; silence an msan warning when offset == 0 */ - LZ4_write32(op, (U32)offset); - - if (unlikely(offset < 8)) { - const int dec64 = dec64table[offset]; - - op[0] = match[0]; - op[1] = match[1]; - op[2] = match[2]; - op[3] = match[3]; - match += dec32table[offset]; - memcpy(op + 4, match, 4); - match -= dec64; - } else { - LZ4_copy8(op, match); - match += 8; - } - - op += 8; - - if (unlikely(cpy > oend - 12)) { - BYTE * const oCopyLimit = oend - (WILDCOPYLENGTH - 1); - - if (op < oCopyLimit) { - LZ4_wildCopy(op, match, oCopyLimit); - match += oCopyLimit - op; - op = oCopyLimit; - } -__match: - while (op < cpy) - *op++ = *match++; - } else { - LZ4_copy8(op, match); - - if (length > 16) - LZ4_wildCopy(op + 8, match + 8, cpy); - } - - op = cpy; /* correction */ - } - DBG_BUGON((void *)ip - source > inputSize); - DBG_BUGON((void *)op - dest > outputSize); - - /* Nb of output bytes decoded */ - return (int) ((void *)op - dest); - - /* Overflow error detected */ -_output_error: - return -ERANGE; -} - -int z_erofs_unzip_lz4(void *in, void *out, size_t inlen, size_t outlen) -{ - int ret = customized_lz4_decompress_safe_partial(in, - out, inlen, outlen); - - if (ret >= 0) - return ret; - - /* - * LZ4_decompress_safe will return an error code - * (< 0) if decompression failed - */ - errln("%s, failed to decompress, in[%p, %zu] outlen[%p, %zu]", - __func__, in, inlen, out, outlen); - WARN_ON(1); - print_hex_dump(KERN_DEBUG, "raw data [in]: ", DUMP_PREFIX_OFFSET, - 16, 1, in, inlen, true); - print_hex_dump(KERN_DEBUG, "raw data [out]: ", DUMP_PREFIX_OFFSET, - 16, 1, out, outlen, true); - return -EIO; -} - diff --git a/drivers/staging/erofs/unzip_pagevec.h b/drivers/staging/erofs/unzip_pagevec.h index 0956615b86f7..23856ba2742d 100644 --- a/drivers/staging/erofs/unzip_pagevec.h +++ b/drivers/staging/erofs/unzip_pagevec.h @@ -150,7 +150,7 @@ z_erofs_pagevec_ctor_dequeue(struct z_erofs_pagevec_ctor *ctor, erofs_vtptr_t t; if (unlikely(ctor->index >= ctor->nr)) { - BUG_ON(ctor->next == NULL); + DBG_BUGON(!ctor->next); z_erofs_pagevec_ctor_pagedown(ctor, true); } diff --git a/drivers/staging/erofs/unzip_vle.c b/drivers/staging/erofs/unzip_vle.c index 79d3ba62b298..31eef8395774 100644 --- a/drivers/staging/erofs/unzip_vle.c +++ b/drivers/staging/erofs/unzip_vle.c @@ -15,14 +15,32 @@ #include <trace/events/erofs.h> +/* + * a compressed_pages[] placeholder in order to avoid + * being filled with file pages for in-place decompression. + */ +#define PAGE_UNALLOCATED ((void *)0x5F0E4B1D) + +/* how to allocate cached pages for a workgroup */ +enum z_erofs_cache_alloctype { + DONTALLOC, /* don't allocate any cached pages */ + DELAYEDALLOC, /* delayed allocation (at the time of submitting io) */ +}; + +/* + * tagged pointer with 1-bit tag for all compressed pages + * tag 0 - the page is just found with an extra page reference + */ +typedef tagptr1_t compressed_page_t; + +#define tag_compressed_page_justfound(page) \ + tagptr_fold(compressed_page_t, page, 1) + static struct workqueue_struct *z_erofs_workqueue __read_mostly; static struct kmem_cache *z_erofs_workgroup_cachep __read_mostly; void z_erofs_exit_zip_subsystem(void) { - BUG_ON(z_erofs_workqueue == NULL); - BUG_ON(z_erofs_workgroup_cachep == NULL); - destroy_workqueue(z_erofs_workqueue); kmem_cache_destroy(z_erofs_workgroup_cachep); } @@ -35,21 +53,48 @@ static inline int init_unzip_workqueue(void) * we don't need too many threads, limiting threads * could improve scheduling performance. */ - z_erofs_workqueue = alloc_workqueue("erofs_unzipd", - WQ_UNBOUND | WQ_HIGHPRI | WQ_CPU_INTENSIVE, - onlinecpus + onlinecpus / 4); + z_erofs_workqueue = + alloc_workqueue("erofs_unzipd", + WQ_UNBOUND | WQ_HIGHPRI | WQ_CPU_INTENSIVE, + onlinecpus + onlinecpus / 4); + + return z_erofs_workqueue ? 0 : -ENOMEM; +} - return z_erofs_workqueue != NULL ? 0 : -ENOMEM; +static void init_once(void *ptr) +{ + struct z_erofs_vle_workgroup *grp = ptr; + struct z_erofs_vle_work *const work = + z_erofs_vle_grab_primary_work(grp); + unsigned int i; + + mutex_init(&work->lock); + work->nr_pages = 0; + work->vcnt = 0; + for (i = 0; i < Z_EROFS_CLUSTER_MAX_PAGES; ++i) + grp->compressed_pages[i] = NULL; +} + +static void init_always(struct z_erofs_vle_workgroup *grp) +{ + struct z_erofs_vle_work *const work = + z_erofs_vle_grab_primary_work(grp); + + atomic_set(&grp->obj.refcount, 1); + grp->flags = 0; + + DBG_BUGON(work->nr_pages); + DBG_BUGON(work->vcnt); } int __init z_erofs_init_zip_subsystem(void) { z_erofs_workgroup_cachep = kmem_cache_create("erofs_compress", - Z_EROFS_WORKGROUP_SIZE, 0, - SLAB_RECLAIM_ACCOUNT, NULL); + Z_EROFS_WORKGROUP_SIZE, 0, + SLAB_RECLAIM_ACCOUNT, init_once); - if (z_erofs_workgroup_cachep != NULL) { + if (z_erofs_workgroup_cachep) { if (!init_unzip_workqueue()) return 0; @@ -62,15 +107,30 @@ enum z_erofs_vle_work_role { Z_EROFS_VLE_WORK_SECONDARY, Z_EROFS_VLE_WORK_PRIMARY, /* - * The current work has at least been linked with the following - * processed chained works, which means if the processing page - * is the tail partial page of the work, the current work can - * safely use the whole page, as illustrated below: - * +--------------+-------------------------------------------+ - * | tail page | head page (of the previous work) | - * +--------------+-------------------------------------------+ - * /\ which belongs to the current work - * [ (*) this page can be used for the current work itself. ] + * The current work was the tail of an exist chain, and the previous + * processed chained works are all decided to be hooked up to it. + * A new chain should be created for the remaining unprocessed works, + * therefore different from Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED, + * the next work cannot reuse the whole page in the following scenario: + * ________________________________________________________________ + * | tail (partial) page | head (partial) page | + * | (belongs to the next work) | (belongs to the current work) | + * |_______PRIMARY_FOLLOWED_______|________PRIMARY_HOOKED___________| + */ + Z_EROFS_VLE_WORK_PRIMARY_HOOKED, + /* + * The current work has been linked with the processed chained works, + * and could be also linked with the potential remaining works, which + * means if the processing page is the tail partial page of the work, + * the current work can safely use the whole page (since the next work + * is under control) for in-place decompression, as illustrated below: + * ________________________________________________________________ + * | tail (partial) page | head (partial) page | + * | (of the current work) | (of the previous work) | + * | PRIMARY_FOLLOWED or | | + * |_____PRIMARY_HOOKED____|____________PRIMARY_FOLLOWED____________| + * + * [ (*) the above page can be used for the current work itself. ] */ Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED, Z_EROFS_VLE_WORK_MAX @@ -98,38 +158,58 @@ struct z_erofs_vle_work_builder { { .work = NULL, .role = Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED } #ifdef EROFS_FS_HAS_MANAGED_CACHE - -static bool grab_managed_cache_pages(struct address_space *mapping, - erofs_blk_t start, - struct page **compressed_pages, - int clusterblks, - bool reserve_allocation) +static void preload_compressed_pages(struct z_erofs_vle_work_builder *bl, + struct address_space *mc, + pgoff_t index, + unsigned int clusterpages, + enum z_erofs_cache_alloctype type, + struct list_head *pagepool, + gfp_t gfp) { - bool noio = true; - unsigned int i; + struct page **const pages = bl->compressed_pages; + const unsigned int remaining = bl->compressed_deficit; + bool standalone = true; + unsigned int i, j = 0; + + if (bl->role < Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED) + return; + + gfp = mapping_gfp_constraint(mc, gfp) & ~__GFP_RECLAIM; - /* TODO: optimize by introducing find_get_pages_range */ - for (i = 0; i < clusterblks; ++i) { - struct page *page, *found; + index += clusterpages - remaining; - if (READ_ONCE(compressed_pages[i]) != NULL) + for (i = 0; i < remaining; ++i) { + struct page *page; + compressed_page_t t; + + /* the compressed page was loaded before */ + if (READ_ONCE(pages[i])) continue; - page = found = find_get_page(mapping, start + i); - if (found == NULL) { - noio = false; - if (!reserve_allocation) - continue; - page = EROFS_UNALLOCATED_CACHED_PAGE; + page = find_get_page(mc, index + i); + + if (page) { + t = tag_compressed_page_justfound(page); + } else if (type == DELAYEDALLOC) { + t = tagptr_init(compressed_page_t, PAGE_UNALLOCATED); + } else { /* DONTALLOC */ + if (standalone) + j = i; + standalone = false; + continue; } - if (NULL == cmpxchg(compressed_pages + i, NULL, page)) + if (!cmpxchg_relaxed(&pages[i], NULL, tagptr_cast_ptr(t))) continue; - if (found != NULL) - put_page(found); + if (page) + put_page(page); } - return noio; + bl->compressed_pages += j; + bl->compressed_deficit = remaining - j; + + if (standalone) + bl->role = Z_EROFS_VLE_WORK_PRIMARY; } /* called by erofs_shrinker to get rid of all compressed_pages */ @@ -138,7 +218,7 @@ int erofs_try_to_free_all_cached_pages(struct erofs_sb_info *sbi, { struct z_erofs_vle_workgroup *const grp = container_of(egrp, struct z_erofs_vle_workgroup, obj); - struct address_space *const mapping = sbi->managed_cache->i_mapping; + struct address_space *const mapping = MNGD_MAPPING(sbi); const int clusterpages = erofs_clusterpages(sbi); int i; @@ -149,7 +229,7 @@ int erofs_try_to_free_all_cached_pages(struct erofs_sb_info *sbi, for (i = 0; i < clusterpages; ++i) { struct page *page = grp->compressed_pages[i]; - if (page == NULL || page->mapping != mapping) + if (!page || page->mapping != mapping) continue; /* block other users from reclaiming or migrating the page */ @@ -173,14 +253,9 @@ int erofs_try_to_free_cached_page(struct address_space *mapping, { struct erofs_sb_info *const sbi = EROFS_SB(mapping->host->i_sb); const unsigned int clusterpages = erofs_clusterpages(sbi); - - struct z_erofs_vle_workgroup *grp; + struct z_erofs_vle_workgroup *const grp = (void *)page_private(page); int ret = 0; /* 0 - busy */ - /* prevent the workgroup from being freed */ - rcu_read_lock(); - grp = (void *)page_private(page); - if (erofs_workgroup_try_to_freeze(&grp->obj, 1)) { unsigned int i; @@ -192,15 +267,25 @@ int erofs_try_to_free_cached_page(struct address_space *mapping, } } erofs_workgroup_unfreeze(&grp->obj, 1); - } - rcu_read_unlock(); - if (ret) { - ClearPagePrivate(page); - put_page(page); + if (ret) { + ClearPagePrivate(page); + put_page(page); + } } return ret; } +#else +static void preload_compressed_pages(struct z_erofs_vle_work_builder *bl, + struct address_space *mc, + pgoff_t index, + unsigned int clusterpages, + enum z_erofs_cache_alloctype type, + struct list_head *pagepool, + gfp_t gfp) +{ + /* nowhere to load compressed pages from */ +} #endif /* page_type must be Z_EROFS_PAGE_TYPE_EXCLUSIVE */ @@ -210,7 +295,7 @@ static inline bool try_to_reuse_as_compressed_page( { while (b->compressed_deficit) { --b->compressed_deficit; - if (NULL == cmpxchg(b->compressed_pages++, NULL, page)) + if (!cmpxchg(b->compressed_pages++, NULL, page)) return true; } @@ -239,10 +324,10 @@ static int z_erofs_vle_work_add_page( return ret ? 0 : -EAGAIN; } -static inline bool try_to_claim_workgroup( - struct z_erofs_vle_workgroup *grp, - z_erofs_vle_owned_workgrp_t *owned_head, - bool *hosted) +static enum z_erofs_vle_work_role +try_to_claim_workgroup(struct z_erofs_vle_workgroup *grp, + z_erofs_vle_owned_workgrp_t *owned_head, + bool *hosted) { DBG_BUGON(*hosted == true); @@ -250,27 +335,29 @@ static inline bool try_to_claim_workgroup( retry: if (grp->next == Z_EROFS_VLE_WORKGRP_NIL) { /* type 1, nil workgroup */ - if (Z_EROFS_VLE_WORKGRP_NIL != cmpxchg(&grp->next, - Z_EROFS_VLE_WORKGRP_NIL, *owned_head)) + if (cmpxchg(&grp->next, Z_EROFS_VLE_WORKGRP_NIL, + *owned_head) != Z_EROFS_VLE_WORKGRP_NIL) goto retry; - *owned_head = grp; + *owned_head = &grp->next; *hosted = true; + /* lucky, I am the followee :) */ + return Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED; + } else if (grp->next == Z_EROFS_VLE_WORKGRP_TAIL) { /* * type 2, link to the end of a existing open chain, * be careful that its submission itself is governed * by the original owned chain. */ - if (Z_EROFS_VLE_WORKGRP_TAIL != cmpxchg(&grp->next, - Z_EROFS_VLE_WORKGRP_TAIL, *owned_head)) + if (cmpxchg(&grp->next, Z_EROFS_VLE_WORKGRP_TAIL, + *owned_head) != Z_EROFS_VLE_WORKGRP_TAIL) goto retry; - *owned_head = Z_EROFS_VLE_WORKGRP_TAIL; - } else - return false; /* :( better luck next time */ + return Z_EROFS_VLE_WORK_PRIMARY_HOOKED; + } - return true; /* lucky, I am the followee :) */ + return Z_EROFS_VLE_WORK_PRIMARY; /* :( better luck next time */ } struct z_erofs_vle_work_finder { @@ -293,7 +380,7 @@ z_erofs_vle_work_lookup(const struct z_erofs_vle_work_finder *f) struct z_erofs_vle_work *work; egrp = erofs_find_workgroup(f->sb, f->idx, &tag); - if (egrp == NULL) { + if (!egrp) { *f->grp_ret = NULL; return NULL; } @@ -348,12 +435,9 @@ z_erofs_vle_work_lookup(const struct z_erofs_vle_work_finder *f) *f->hosted = false; if (!primary) *f->role = Z_EROFS_VLE_WORK_SECONDARY; - /* claim the workgroup if possible */ - else if (try_to_claim_workgroup(grp, f->owned_head, f->hosted)) - *f->role = Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED; - else - *f->role = Z_EROFS_VLE_WORK_PRIMARY; - + else /* claim the workgroup if possible */ + *f->role = try_to_claim_workgroup(grp, f->owned_head, + f->hosted); return work; } @@ -366,13 +450,17 @@ z_erofs_vle_work_register(const struct z_erofs_vle_work_finder *f, struct z_erofs_vle_work *work; /* if multiref is disabled, grp should never be nullptr */ - BUG_ON(grp != NULL); + if (unlikely(grp)) { + DBG_BUGON(1); + return ERR_PTR(-EINVAL); + } /* no available workgroup, let's allocate one */ - grp = kmem_cache_zalloc(z_erofs_workgroup_cachep, GFP_NOFS); - if (unlikely(grp == NULL)) + grp = kmem_cache_alloc(z_erofs_workgroup_cachep, GFP_NOFS); + if (unlikely(!grp)) return ERR_PTR(-ENOMEM); + init_always(grp); grp->obj.index = f->idx; grp->llen = map->m_llen; @@ -380,7 +468,6 @@ z_erofs_vle_work_register(const struct z_erofs_vle_work_finder *f, (map->m_flags & EROFS_MAP_ZIPPED) ? Z_EROFS_VLE_WORKGRP_FMT_LZ4 : Z_EROFS_VLE_WORKGRP_FMT_PLAIN); - atomic_set(&grp->obj.refcount, 1); /* new workgrps have been claimed as type 1 */ WRITE_ONCE(grp->next, *f->owned_head); @@ -393,23 +480,30 @@ z_erofs_vle_work_register(const struct z_erofs_vle_work_finder *f, work = z_erofs_vle_grab_primary_work(grp); work->pageofs = f->pageofs; - mutex_init(&work->lock); + /* + * lock all primary followed works before visible to others + * and mutex_trylock *never* fails for a new workgroup. + */ + mutex_trylock(&work->lock); if (gnew) { int err = erofs_register_workgroup(f->sb, &grp->obj, 0); if (err) { + mutex_unlock(&work->lock); kmem_cache_free(z_erofs_workgroup_cachep, grp); return ERR_PTR(-EAGAIN); } } - *f->owned_head = *f->grp_ret = grp; - - mutex_lock(&work->lock); + *f->owned_head = &grp->next; + *f->grp_ret = grp; return work; } +#define builder_is_hooked(builder) \ + ((builder)->role >= Z_EROFS_VLE_WORK_PRIMARY_HOOKED) + #define builder_is_followed(builder) \ ((builder)->role >= Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED) @@ -431,7 +525,7 @@ static int z_erofs_vle_work_iter_begin(struct z_erofs_vle_work_builder *builder, }; struct z_erofs_vle_work *work; - DBG_BUGON(builder->work != NULL); + DBG_BUGON(builder->work); /* must be Z_EROFS_WORK_TAIL or the next chained work */ DBG_BUGON(*owned_head == Z_EROFS_VLE_WORKGRP_NIL); @@ -441,7 +535,7 @@ static int z_erofs_vle_work_iter_begin(struct z_erofs_vle_work_builder *builder, repeat: work = z_erofs_vle_work_lookup(&finder); - if (work != NULL) { + if (work) { unsigned int orig_llen; /* increase workgroup `llen' if needed */ @@ -456,7 +550,7 @@ repeat: if (unlikely(work == ERR_PTR(-EAGAIN))) goto repeat; - if (unlikely(IS_ERR(work))) + if (IS_ERR(work)) return PTR_ERR(work); got_it: z_erofs_pagevec_ctor_init(&builder->vector, @@ -506,7 +600,7 @@ static void __z_erofs_vle_work_release(struct z_erofs_vle_workgroup *grp, erofs_workgroup_put(&grp->obj); } -void z_erofs_vle_work_release(struct z_erofs_vle_work *work) +static void z_erofs_vle_work_release(struct z_erofs_vle_work *work) { struct z_erofs_vle_workgroup *grp = z_erofs_vle_work_workgroup(work, true); @@ -519,7 +613,7 @@ z_erofs_vle_work_iter_end(struct z_erofs_vle_work_builder *builder) { struct z_erofs_vle_work *work = builder->work; - if (work == NULL) + if (!work) return false; z_erofs_pagevec_ctor_exit(&builder->vector, false); @@ -542,7 +636,7 @@ static inline struct page *__stagingpage_alloc(struct list_head *pagepool, { struct page *page = erofs_allocpage(pagepool, gfp); - if (unlikely(page == NULL)) + if (unlikely(!page)) return NULL; page->mapping = Z_EROFS_MAPPING_STAGING; @@ -553,25 +647,45 @@ struct z_erofs_vle_frontend { struct inode *const inode; struct z_erofs_vle_work_builder builder; - struct erofs_map_blocks_iter m_iter; + struct erofs_map_blocks map; z_erofs_vle_owned_workgrp_t owned_head; - bool initial; -#if (EROFS_FS_ZIP_CACHE_LVL >= 2) - erofs_off_t cachedzone_la; -#endif + /* used for applying cache strategy on the fly */ + bool backmost; + erofs_off_t headoffset; }; #define VLE_FRONTEND_INIT(__i) { \ .inode = __i, \ - .m_iter = { \ - { .m_llen = 0, .m_plen = 0 }, \ + .map = { \ + .m_llen = 0, \ + .m_plen = 0, \ .mpage = NULL \ }, \ .builder = VLE_WORK_BUILDER_INIT(), \ .owned_head = Z_EROFS_VLE_WORKGRP_TAIL, \ - .initial = true, } + .backmost = true, } + +#ifdef EROFS_FS_HAS_MANAGED_CACHE +static inline bool +should_alloc_managed_pages(struct z_erofs_vle_frontend *fe, erofs_off_t la) +{ + if (fe->backmost) + return true; + + if (EROFS_FS_ZIP_CACHE_LVL >= 2) + return la < fe->headoffset; + + return false; +} +#else +static inline bool +should_alloc_managed_pages(struct z_erofs_vle_frontend *fe, erofs_off_t la) +{ + return false; +} +#endif static int z_erofs_do_read_page(struct z_erofs_vle_frontend *fe, struct page *page, @@ -579,26 +693,18 @@ static int z_erofs_do_read_page(struct z_erofs_vle_frontend *fe, { struct super_block *const sb = fe->inode->i_sb; struct erofs_sb_info *const sbi __maybe_unused = EROFS_SB(sb); - struct erofs_map_blocks_iter *const m = &fe->m_iter; - struct erofs_map_blocks *const map = &m->map; + struct erofs_map_blocks *const map = &fe->map; struct z_erofs_vle_work_builder *const builder = &fe->builder; const loff_t offset = page_offset(page); - bool tight = builder_is_followed(builder); + bool tight = builder_is_hooked(builder); struct z_erofs_vle_work *work = builder->work; -#ifdef EROFS_FS_HAS_MANAGED_CACHE - struct address_space *const mngda = sbi->managed_cache->i_mapping; - struct z_erofs_vle_workgroup *grp; - bool noio_outoforder; -#endif - + enum z_erofs_cache_alloctype cache_strategy; enum z_erofs_page_type page_type; unsigned int cur, end, spiltted, index; int err = 0; - trace_erofs_readpage(page, false); - /* register locked file pages as online pages in pack */ z_erofs_onlinepage_init(page); @@ -609,21 +715,26 @@ repeat: /* lucky, within the range of the current map_blocks */ if (offset + cur >= map->m_la && - offset + cur < map->m_la + map->m_llen) + offset + cur < map->m_la + map->m_llen) { + /* didn't get a valid unzip work previously (very rare) */ + if (!builder->work) + goto restart_now; goto hitted; + } /* go ahead the next map_blocks */ debugln("%s: [out-of-range] pos %llu", __func__, offset + cur); if (z_erofs_vle_work_iter_end(builder)) - fe->initial = false; + fe->backmost = false; map->m_la = offset + cur; map->m_llen = 0; - err = erofs_map_blocks_iter(fe->inode, map, &m->mpage, 0); + err = z_erofs_map_blocks_iter(fe->inode, map, 0); if (unlikely(err)) goto err_out; +restart_now: if (unlikely(!(map->m_flags & EROFS_MAP_MAPPED))) goto hitted; @@ -634,22 +745,18 @@ repeat: if (unlikely(err)) goto err_out; -#ifdef EROFS_FS_HAS_MANAGED_CACHE - grp = fe->builder.grp; - - /* let's do out-of-order decompression for noio */ - noio_outoforder = grab_managed_cache_pages(mngda, - erofs_blknr(map->m_pa), - grp->compressed_pages, erofs_blknr(map->m_plen), - /* compressed page caching selection strategy */ - fe->initial | (EROFS_FS_ZIP_CACHE_LVL >= 2 ? - map->m_la < fe->cachedzone_la : 0)); - - if (noio_outoforder && builder_is_followed(builder)) - builder->role = Z_EROFS_VLE_WORK_PRIMARY; -#endif + /* preload all compressed pages (maybe downgrade role if necessary) */ + if (should_alloc_managed_pages(fe, map->m_la)) + cache_strategy = DELAYEDALLOC; + else + cache_strategy = DONTALLOC; - tight &= builder_is_followed(builder); + preload_compressed_pages(builder, MNGD_MAPPING(sbi), + map->m_pa / PAGE_SIZE, + map->m_plen / PAGE_SIZE, + cache_strategy, page_pool, GFP_KERNEL); + + tight &= builder_is_hooked(builder); work = builder->work; hitted: cur = end - min_t(unsigned int, offset + end - map->m_la, end); @@ -664,6 +771,9 @@ hitted: (tight ? Z_EROFS_PAGE_TYPE_EXCLUSIVE : Z_EROFS_VLE_PAGE_TYPE_TAIL_SHARED)); + if (cur) + tight &= builder_is_followed(builder); + retry: err = z_erofs_vle_work_add_page(builder, page, page_type); /* should allocate an additional staging page for pagevec */ @@ -717,13 +827,18 @@ static void z_erofs_vle_unzip_kickoff(void *ptr, int bios) struct z_erofs_vle_unzip_io *io = tagptr_unfold_ptr(t); bool background = tagptr_unfold_tags(t); - if (atomic_add_return(bios, &io->pending_bios)) + if (!background) { + unsigned long flags; + + spin_lock_irqsave(&io->u.wait.lock, flags); + if (!atomic_add_return(bios, &io->pending_bios)) + wake_up_locked(&io->u.wait); + spin_unlock_irqrestore(&io->u.wait.lock, flags); return; + } - if (background) + if (!atomic_add_return(bios, &io->pending_bios)) queue_work(z_erofs_workqueue, &io->u.work); - else - wake_up(&io->u.wait); } static inline void z_erofs_vle_read_endio(struct bio *bio) @@ -732,29 +847,30 @@ static inline void z_erofs_vle_read_endio(struct bio *bio) unsigned int i; struct bio_vec *bvec; #ifdef EROFS_FS_HAS_MANAGED_CACHE - struct address_space *mngda = NULL; + struct address_space *mc = NULL; #endif + struct bvec_iter_all iter_all; - bio_for_each_segment_all(bvec, bio, i) { + bio_for_each_segment_all(bvec, bio, i, iter_all) { struct page *page = bvec->bv_page; bool cachemngd = false; DBG_BUGON(PageUptodate(page)); - BUG_ON(page->mapping == NULL); + DBG_BUGON(!page->mapping); #ifdef EROFS_FS_HAS_MANAGED_CACHE - if (unlikely(mngda == NULL && !z_erofs_is_stagingpage(page))) { + if (unlikely(!mc && !z_erofs_is_stagingpage(page))) { struct inode *const inode = page->mapping->host; struct super_block *const sb = inode->i_sb; - mngda = EROFS_SB(sb)->managed_cache->i_mapping; + mc = MNGD_MAPPING(EROFS_SB(sb)); } /* - * If mngda has not gotten, it equals NULL, + * If mc has not gotten, it equals NULL, * however, page->mapping never be NULL if working properly. */ - cachemngd = (page->mapping == mngda); + cachemngd = (page->mapping == mc); #endif if (unlikely(err)) @@ -778,9 +894,6 @@ static int z_erofs_vle_unzip(struct super_block *sb, struct list_head *page_pool) { struct erofs_sb_info *const sbi = EROFS_SB(sb); -#ifdef EROFS_FS_HAS_MANAGED_CACHE - struct address_space *const mngda = sbi->managed_cache->i_mapping; -#endif const unsigned int clusterpages = erofs_clusterpages(sbi); struct z_erofs_pagevec_ctor ctor; @@ -798,7 +911,7 @@ static int z_erofs_vle_unzip(struct super_block *sb, might_sleep(); work = z_erofs_vle_grab_primary_work(grp); - BUG_ON(!READ_ONCE(work->nr_pages)); + DBG_BUGON(!READ_ONCE(work->nr_pages)); mutex_lock(&work->lock); nr_pages = work->nr_pages; @@ -814,7 +927,7 @@ repeat: sizeof(struct page *), GFP_KERNEL); /* fallback to global pagemap for the lowmem scenario */ - if (unlikely(pages == NULL)) { + if (unlikely(!pages)) { if (nr_pages > Z_EROFS_VLE_VMAP_GLOBAL_PAGES) goto repeat; else { @@ -836,8 +949,8 @@ repeat: page = z_erofs_pagevec_ctor_dequeue(&ctor, &page_type); /* all pages in pagevec ought to be valid */ - DBG_BUGON(page == NULL); - DBG_BUGON(page->mapping == NULL); + DBG_BUGON(!page); + DBG_BUGON(!page->mapping); if (z_erofs_gather_if_stagingpage(page_pool, page)) continue; @@ -847,8 +960,8 @@ repeat: else pagenr = z_erofs_onlinepage_index(page); - BUG_ON(pagenr >= nr_pages); - BUG_ON(pages[pagenr] != NULL); + DBG_BUGON(pagenr >= nr_pages); + DBG_BUGON(pages[pagenr]); pages[pagenr] = page; } @@ -859,42 +972,52 @@ repeat: overlapped = false; compressed_pages = grp->compressed_pages; + err = 0; for (i = 0; i < clusterpages; ++i) { unsigned int pagenr; page = compressed_pages[i]; /* all compressed pages ought to be valid */ - DBG_BUGON(page == NULL); - DBG_BUGON(page->mapping == NULL); + DBG_BUGON(!page); + DBG_BUGON(!page->mapping); - if (z_erofs_is_stagingpage(page)) - continue; + if (!z_erofs_is_stagingpage(page)) { #ifdef EROFS_FS_HAS_MANAGED_CACHE - else if (page->mapping == mngda) { - BUG_ON(PageLocked(page)); - BUG_ON(!PageUptodate(page)); - continue; - } + if (page->mapping == MNGD_MAPPING(sbi)) { + if (unlikely(!PageUptodate(page))) + err = -EIO; + continue; + } #endif - /* only non-head page could be reused as a compressed page */ - pagenr = z_erofs_onlinepage_index(page); + /* + * only if non-head page can be selected + * for inplace decompression + */ + pagenr = z_erofs_onlinepage_index(page); - BUG_ON(pagenr >= nr_pages); - BUG_ON(pages[pagenr] != NULL); - ++sparsemem_pages; - pages[pagenr] = page; + DBG_BUGON(pagenr >= nr_pages); + DBG_BUGON(pages[pagenr]); + ++sparsemem_pages; + pages[pagenr] = page; + + overlapped = true; + } - overlapped = true; + /* PG_error needs checking for inplaced and staging pages */ + if (unlikely(PageError(page))) { + DBG_BUGON(PageUptodate(page)); + err = -EIO; + } } + if (unlikely(err)) + goto out; + llen = (nr_pages << PAGE_SHIFT) - work->pageofs; if (z_erofs_vle_workgrp_fmt(grp) == Z_EROFS_VLE_WORKGRP_FMT_PLAIN) { - /* FIXME! this should be fixed in the future */ - BUG_ON(grp->llen != llen); - err = z_erofs_vle_plain_copy(compressed_pages, clusterpages, pages, nr_pages, work->pageofs); goto out; @@ -903,19 +1026,16 @@ repeat: if (llen > grp->llen) llen = grp->llen; - err = z_erofs_vle_unzip_fast_percpu(compressed_pages, - clusterpages, pages, llen, work->pageofs, - z_erofs_onlinepage_endio); + err = z_erofs_vle_unzip_fast_percpu(compressed_pages, clusterpages, + pages, llen, work->pageofs); if (err != -ENOTSUPP) - goto out_percpu; + goto out; - if (sparsemem_pages >= nr_pages) { - BUG_ON(sparsemem_pages > nr_pages); + if (sparsemem_pages >= nr_pages) goto skip_allocpage; - } for (i = 0; i < nr_pages; ++i) { - if (pages[i] != NULL) + if (pages[i]) continue; pages[i] = __stagingpage_alloc(page_pool, GFP_NOFS); @@ -923,6 +1043,10 @@ repeat: skip_allocpage: vout = erofs_vmap(pages, nr_pages); + if (!vout) { + err = -ENOMEM; + goto out; + } err = z_erofs_vle_unzip_vmap(compressed_pages, clusterpages, vout, llen, work->pageofs, overlapped); @@ -930,9 +1054,26 @@ skip_allocpage: erofs_vunmap(vout, nr_pages); out: + /* must handle all compressed pages before endding pages */ + for (i = 0; i < clusterpages; ++i) { + page = compressed_pages[i]; + +#ifdef EROFS_FS_HAS_MANAGED_CACHE + if (page->mapping == MNGD_MAPPING(sbi)) + continue; +#endif + /* recycle all individual staging pages */ + (void)z_erofs_gather_if_stagingpage(page_pool, page); + + WRITE_ONCE(compressed_pages[i], NULL); + } + for (i = 0; i < nr_pages; ++i) { page = pages[i]; - DBG_BUGON(page->mapping == NULL); + if (!page) + continue; + + DBG_BUGON(!page->mapping); /* recycle all individual staging pages */ if (z_erofs_gather_if_stagingpage(page_pool, page)) @@ -944,20 +1085,6 @@ out: z_erofs_onlinepage_endio(page); } -out_percpu: - for (i = 0; i < clusterpages; ++i) { - page = compressed_pages[i]; - -#ifdef EROFS_FS_HAS_MANAGED_CACHE - if (page->mapping == mngda) - continue; -#endif - /* recycle all individual staging pages */ - (void)z_erofs_gather_if_stagingpage(page_pool, page); - - WRITE_ONCE(compressed_pages[i], NULL); - } - if (pages == z_pagemap_global) mutex_unlock(&z_pagemap_global_lock); else if (unlikely(pages != pages_onstack)) @@ -992,7 +1119,7 @@ static void z_erofs_vle_unzip_all(struct super_block *sb, /* no possible that 'owned' equals NULL */ DBG_BUGON(owned == Z_EROFS_VLE_WORKGRP_NIL); - grp = owned; + grp = container_of(owned, struct z_erofs_vle_workgroup, next); owned = READ_ONCE(grp->next); z_erofs_vle_unzip(sb, grp, page_pool); @@ -1005,40 +1132,160 @@ static void z_erofs_vle_unzip_wq(struct work_struct *work) struct z_erofs_vle_unzip_io_sb, io.u.work); LIST_HEAD(page_pool); - BUG_ON(iosb->io.head == Z_EROFS_VLE_WORKGRP_TAIL_CLOSED); + DBG_BUGON(iosb->io.head == Z_EROFS_VLE_WORKGRP_TAIL_CLOSED); z_erofs_vle_unzip_all(iosb->sb, &iosb->io, &page_pool); put_pages_list(&page_pool); kvfree(iosb); } -static inline struct z_erofs_vle_unzip_io * -prepare_io_handler(struct super_block *sb, - struct z_erofs_vle_unzip_io *io, - bool background) +static struct page * +pickup_page_for_submission(struct z_erofs_vle_workgroup *grp, + unsigned int nr, + struct list_head *pagepool, + struct address_space *mc, + gfp_t gfp) +{ + /* determined at compile time to avoid too many #ifdefs */ + const bool nocache = __builtin_constant_p(mc) ? !mc : false; + const pgoff_t index = grp->obj.index; + bool tocache = false; + + struct address_space *mapping; + struct page *oldpage, *page; + + compressed_page_t t; + int justfound; + +repeat: + page = READ_ONCE(grp->compressed_pages[nr]); + oldpage = page; + + if (!page) + goto out_allocpage; + + /* + * the cached page has not been allocated and + * an placeholder is out there, prepare it now. + */ + if (!nocache && page == PAGE_UNALLOCATED) { + tocache = true; + goto out_allocpage; + } + + /* process the target tagged pointer */ + t = tagptr_init(compressed_page_t, page); + justfound = tagptr_unfold_tags(t); + page = tagptr_unfold_ptr(t); + + mapping = READ_ONCE(page->mapping); + + /* + * if managed cache is disabled, it's no way to + * get such a cached-like page. + */ + if (nocache) { + /* if managed cache is disabled, it is impossible `justfound' */ + DBG_BUGON(justfound); + + /* and it should be locked, not uptodate, and not truncated */ + DBG_BUGON(!PageLocked(page)); + DBG_BUGON(PageUptodate(page)); + DBG_BUGON(!mapping); + goto out; + } + + /* + * unmanaged (file) pages are all locked solidly, + * therefore it is impossible for `mapping' to be NULL. + */ + if (mapping && mapping != mc) + /* ought to be unmanaged pages */ + goto out; + + lock_page(page); + + /* only true if page reclaim goes wrong, should never happen */ + DBG_BUGON(justfound && PagePrivate(page)); + + /* the page is still in manage cache */ + if (page->mapping == mc) { + WRITE_ONCE(grp->compressed_pages[nr], page); + + ClearPageError(page); + if (!PagePrivate(page)) { + /* + * impossible to be !PagePrivate(page) for + * the current restriction as well if + * the page is already in compressed_pages[]. + */ + DBG_BUGON(!justfound); + + justfound = 0; + set_page_private(page, (unsigned long)grp); + SetPagePrivate(page); + } + + /* no need to submit io if it is already up-to-date */ + if (PageUptodate(page)) { + unlock_page(page); + page = NULL; + } + goto out; + } + + /* + * the managed page has been truncated, it's unsafe to + * reuse this one, let's allocate a new cache-managed page. + */ + DBG_BUGON(page->mapping); + DBG_BUGON(!justfound); + + tocache = true; + unlock_page(page); + put_page(page); +out_allocpage: + page = __stagingpage_alloc(pagepool, gfp); + if (oldpage != cmpxchg(&grp->compressed_pages[nr], oldpage, page)) { + list_add(&page->lru, pagepool); + cpu_relax(); + goto repeat; + } + if (nocache || !tocache) + goto out; + if (add_to_page_cache_lru(page, mc, index + nr, gfp)) { + page->mapping = Z_EROFS_MAPPING_STAGING; + goto out; + } + + set_page_private(page, (unsigned long)grp); + SetPagePrivate(page); +out: /* the only exit (for tracing and debugging) */ + return page; +} + +static struct z_erofs_vle_unzip_io * +jobqueue_init(struct super_block *sb, + struct z_erofs_vle_unzip_io *io, + bool foreground) { struct z_erofs_vle_unzip_io_sb *iosb; - if (!background) { + if (foreground) { /* waitqueue available for foreground io */ - BUG_ON(io == NULL); + DBG_BUGON(!io); init_waitqueue_head(&io->u.wait); atomic_set(&io->pending_bios, 0); goto out; } - if (io != NULL) - BUG(); - else { - /* allocate extra io descriptor for background io */ - iosb = kvzalloc(sizeof(struct z_erofs_vle_unzip_io_sb), + iosb = kvzalloc(sizeof(struct z_erofs_vle_unzip_io_sb), GFP_KERNEL | __GFP_NOFAIL); - BUG_ON(iosb == NULL); - - io = &iosb->io; - } + DBG_BUGON(!iosb); + /* initialize fields in the allocated descriptor */ + io = &iosb->io; iosb->sb = sb; INIT_WORK(&io->u.work, z_erofs_vle_unzip_wq); out: @@ -1046,48 +1293,105 @@ out: return io; } +/* define workgroup jobqueue types */ +enum { #ifdef EROFS_FS_HAS_MANAGED_CACHE -/* true - unlocked (noio), false - locked (need submit io) */ -static inline bool recover_managed_page(struct z_erofs_vle_workgroup *grp, - struct page *page) + JQ_BYPASS, +#endif + JQ_SUBMIT, + NR_JOBQUEUES, +}; + +static void *jobqueueset_init(struct super_block *sb, + z_erofs_vle_owned_workgrp_t qtail[], + struct z_erofs_vle_unzip_io *q[], + struct z_erofs_vle_unzip_io *fgq, + bool forcefg) { - wait_on_page_locked(page); - if (PagePrivate(page) && PageUptodate(page)) - return true; +#ifdef EROFS_FS_HAS_MANAGED_CACHE + /* + * if managed cache is enabled, bypass jobqueue is needed, + * no need to read from device for all workgroups in this queue. + */ + q[JQ_BYPASS] = jobqueue_init(sb, fgq + JQ_BYPASS, true); + qtail[JQ_BYPASS] = &q[JQ_BYPASS]->head; +#endif - lock_page(page); - if (unlikely(!PagePrivate(page))) { - set_page_private(page, (unsigned long)grp); - SetPagePrivate(page); - } - if (unlikely(PageUptodate(page))) { - unlock_page(page); - return true; - } - return false; + q[JQ_SUBMIT] = jobqueue_init(sb, fgq + JQ_SUBMIT, forcefg); + qtail[JQ_SUBMIT] = &q[JQ_SUBMIT]->head; + + return tagptr_cast_ptr(tagptr_fold(tagptr1_t, q[JQ_SUBMIT], !forcefg)); +} + +#ifdef EROFS_FS_HAS_MANAGED_CACHE +static void move_to_bypass_jobqueue(struct z_erofs_vle_workgroup *grp, + z_erofs_vle_owned_workgrp_t qtail[], + z_erofs_vle_owned_workgrp_t owned_head) +{ + z_erofs_vle_owned_workgrp_t *const submit_qtail = qtail[JQ_SUBMIT]; + z_erofs_vle_owned_workgrp_t *const bypass_qtail = qtail[JQ_BYPASS]; + + DBG_BUGON(owned_head == Z_EROFS_VLE_WORKGRP_TAIL_CLOSED); + if (owned_head == Z_EROFS_VLE_WORKGRP_TAIL) + owned_head = Z_EROFS_VLE_WORKGRP_TAIL_CLOSED; + + WRITE_ONCE(grp->next, Z_EROFS_VLE_WORKGRP_TAIL_CLOSED); + + WRITE_ONCE(*submit_qtail, owned_head); + WRITE_ONCE(*bypass_qtail, &grp->next); + + qtail[JQ_BYPASS] = &grp->next; } -#define __FSIO_1 1 +static bool postsubmit_is_all_bypassed(struct z_erofs_vle_unzip_io *q[], + unsigned int nr_bios, + bool force_fg) +{ + /* + * although background is preferred, no one is pending for submission. + * don't issue workqueue for decompression but drop it directly instead. + */ + if (force_fg || nr_bios) + return false; + + kvfree(container_of(q[JQ_SUBMIT], + struct z_erofs_vle_unzip_io_sb, + io)); + return true; +} #else -#define __FSIO_1 0 +static void move_to_bypass_jobqueue(struct z_erofs_vle_workgroup *grp, + z_erofs_vle_owned_workgrp_t qtail[], + z_erofs_vle_owned_workgrp_t owned_head) +{ + /* impossible to bypass submission for managed cache disabled */ + DBG_BUGON(1); +} + +static bool postsubmit_is_all_bypassed(struct z_erofs_vle_unzip_io *q[], + unsigned int nr_bios, + bool force_fg) +{ + /* bios should be >0 if managed cache is disabled */ + DBG_BUGON(!nr_bios); + return false; +} #endif static bool z_erofs_vle_submit_all(struct super_block *sb, z_erofs_vle_owned_workgrp_t owned_head, struct list_head *pagepool, - struct z_erofs_vle_unzip_io *fg_io, + struct z_erofs_vle_unzip_io *fgq, bool force_fg) { struct erofs_sb_info *const sbi = EROFS_SB(sb); const unsigned int clusterpages = erofs_clusterpages(sbi); const gfp_t gfp = GFP_NOFS; -#ifdef EROFS_FS_HAS_MANAGED_CACHE - struct address_space *const mngda = sbi->managed_cache->i_mapping; - struct z_erofs_vle_workgroup *lstgrp_noio = NULL, *lstgrp_io = NULL; -#endif - struct z_erofs_vle_unzip_io *ios[1 + __FSIO_1]; + + z_erofs_vle_owned_workgrp_t qtail[NR_JOBQUEUES]; + struct z_erofs_vle_unzip_io *q[NR_JOBQUEUES]; struct bio *bio; - tagptr1_t bi_private; + void *bi_private; /* since bio will be NULL, no need to initialize last_index */ pgoff_t uninitialized_var(last_index); bool force_submit = false; @@ -1096,105 +1400,55 @@ static bool z_erofs_vle_submit_all(struct super_block *sb, if (unlikely(owned_head == Z_EROFS_VLE_WORKGRP_TAIL)) return false; - /* - * force_fg == 1, (io, fg_io[0]) no io, (io, fg_io[1]) need submit io - * force_fg == 0, (io, fg_io[0]) no io; (io[1], bg_io) need submit io - */ -#ifdef EROFS_FS_HAS_MANAGED_CACHE - ios[0] = prepare_io_handler(sb, fg_io + 0, false); -#endif - - if (force_fg) { - ios[__FSIO_1] = prepare_io_handler(sb, fg_io + __FSIO_1, false); - bi_private = tagptr_fold(tagptr1_t, ios[__FSIO_1], 0); - } else { - ios[__FSIO_1] = prepare_io_handler(sb, NULL, true); - bi_private = tagptr_fold(tagptr1_t, ios[__FSIO_1], 1); - } - - nr_bios = 0; force_submit = false; bio = NULL; + nr_bios = 0; + bi_private = jobqueueset_init(sb, qtail, q, fgq, force_fg); /* by default, all need io submission */ - ios[__FSIO_1]->head = owned_head; + q[JQ_SUBMIT]->head = owned_head; do { struct z_erofs_vle_workgroup *grp; - struct page **compressed_pages, *oldpage, *page; pgoff_t first_index; - unsigned int i = 0; -#ifdef EROFS_FS_HAS_MANAGED_CACHE - unsigned int noio = 0; - bool cachemngd; -#endif + struct page *page; + unsigned int i = 0, bypass = 0; int err; /* no possible 'owned_head' equals the following */ DBG_BUGON(owned_head == Z_EROFS_VLE_WORKGRP_TAIL_CLOSED); DBG_BUGON(owned_head == Z_EROFS_VLE_WORKGRP_NIL); - grp = owned_head; + grp = container_of(owned_head, + struct z_erofs_vle_workgroup, next); /* close the main owned chain at first */ owned_head = cmpxchg(&grp->next, Z_EROFS_VLE_WORKGRP_TAIL, - Z_EROFS_VLE_WORKGRP_TAIL_CLOSED); + Z_EROFS_VLE_WORKGRP_TAIL_CLOSED); first_index = grp->obj.index; - compressed_pages = grp->compressed_pages; - force_submit |= (first_index != last_index + 1); -repeat: - /* fulfill all compressed pages */ - oldpage = page = READ_ONCE(compressed_pages[i]); -#ifdef EROFS_FS_HAS_MANAGED_CACHE - cachemngd = false; - - if (page == EROFS_UNALLOCATED_CACHED_PAGE) { - cachemngd = true; - goto do_allocpage; - } else if (page != NULL) { - if (page->mapping != mngda) - BUG_ON(PageUptodate(page)); - else if (recover_managed_page(grp, page)) { - /* page is uptodate, skip io submission */ - force_submit = true; - ++noio; - goto skippage; - } - } else { -do_allocpage: -#else - if (page != NULL) - BUG_ON(PageUptodate(page)); - else { -#endif - page = __stagingpage_alloc(pagepool, gfp); - - if (oldpage != cmpxchg(compressed_pages + i, - oldpage, page)) { - list_add(&page->lru, pagepool); - goto repeat; -#ifdef EROFS_FS_HAS_MANAGED_CACHE - } else if (cachemngd && !add_to_page_cache_lru(page, - mngda, first_index + i, gfp)) { - set_page_private(page, (unsigned long)grp); - SetPagePrivate(page); -#endif - } +repeat: + page = pickup_page_for_submission(grp, i, pagepool, + MNGD_MAPPING(sbi), gfp); + if (!page) { + force_submit = true; + ++bypass; + goto skippage; } - if (bio != NULL && force_submit) { + if (bio && force_submit) { submit_bio_retry: __submit_bio(bio, REQ_OP_READ, 0); bio = NULL; } - if (bio == NULL) { + if (!bio) { bio = erofs_grab_bio(sb, first_index + i, - BIO_MAX_PAGES, z_erofs_vle_read_endio, true); - bio->bi_private = tagptr_cast_ptr(bi_private); + BIO_MAX_PAGES, + z_erofs_vle_read_endio, true); + bio->bi_private = bi_private; ++nr_bios; } @@ -1205,53 +1459,23 @@ submit_bio_retry: force_submit = false; last_index = first_index + i; -#ifdef EROFS_FS_HAS_MANAGED_CACHE skippage: -#endif if (++i < clusterpages) goto repeat; -#ifdef EROFS_FS_HAS_MANAGED_CACHE - if (noio < clusterpages) { - lstgrp_io = grp; - } else { - z_erofs_vle_owned_workgrp_t iogrp_next = - owned_head == Z_EROFS_VLE_WORKGRP_TAIL ? - Z_EROFS_VLE_WORKGRP_TAIL_CLOSED : - owned_head; - - if (lstgrp_io == NULL) - ios[1]->head = iogrp_next; - else - WRITE_ONCE(lstgrp_io->next, iogrp_next); - - if (lstgrp_noio == NULL) - ios[0]->head = grp; - else - WRITE_ONCE(lstgrp_noio->next, grp); - - lstgrp_noio = grp; - } -#endif + if (bypass < clusterpages) + qtail[JQ_SUBMIT] = &grp->next; + else + move_to_bypass_jobqueue(grp, qtail, owned_head); } while (owned_head != Z_EROFS_VLE_WORKGRP_TAIL); - if (bio != NULL) + if (bio) __submit_bio(bio, REQ_OP_READ, 0); -#ifndef EROFS_FS_HAS_MANAGED_CACHE - BUG_ON(!nr_bios); -#else - if (lstgrp_noio != NULL) - WRITE_ONCE(lstgrp_noio->next, Z_EROFS_VLE_WORKGRP_TAIL_CLOSED); - - if (!force_fg && !nr_bios) { - kvfree(container_of(ios[1], - struct z_erofs_vle_unzip_io_sb, io)); + if (postsubmit_is_all_bypassed(q, nr_bios, force_fg)) return true; - } -#endif - z_erofs_vle_unzip_kickoff(tagptr_cast_ptr(bi_private), nr_bios); + z_erofs_vle_unzip_kickoff(bi_private, nr_bios); return true; } @@ -1260,23 +1484,23 @@ static void z_erofs_submit_and_unzip(struct z_erofs_vle_frontend *f, bool force_fg) { struct super_block *sb = f->inode->i_sb; - struct z_erofs_vle_unzip_io io[1 + __FSIO_1]; + struct z_erofs_vle_unzip_io io[NR_JOBQUEUES]; if (!z_erofs_vle_submit_all(sb, f->owned_head, pagepool, io, force_fg)) return; #ifdef EROFS_FS_HAS_MANAGED_CACHE - z_erofs_vle_unzip_all(sb, &io[0], pagepool); + z_erofs_vle_unzip_all(sb, &io[JQ_BYPASS], pagepool); #endif if (!force_fg) return; /* wait until all bios are completed */ - wait_event(io[__FSIO_1].u.wait, - !atomic_read(&io[__FSIO_1].pending_bios)); + wait_event(io[JQ_SUBMIT].u.wait, + !atomic_read(&io[JQ_SUBMIT].pending_bios)); /* let's synchronous decompression */ - z_erofs_vle_unzip_all(sb, &io[__FSIO_1], pagepool); + z_erofs_vle_unzip_all(sb, &io[JQ_SUBMIT], pagepool); } static int z_erofs_vle_normalaccess_readpage(struct file *file, @@ -1287,9 +1511,10 @@ static int z_erofs_vle_normalaccess_readpage(struct file *file, int err; LIST_HEAD(pagepool); -#if (EROFS_FS_ZIP_CACHE_LVL >= 2) - f.cachedzone_la = (erofs_off_t)page->index << PAGE_SHIFT; -#endif + trace_erofs_readpage(page, false); + + f.headoffset = (erofs_off_t)page->index << PAGE_SHIFT; + err = z_erofs_do_read_page(&f, page, &pagepool); (void)z_erofs_vle_work_iter_end(&f.builder); @@ -1300,8 +1525,8 @@ static int z_erofs_vle_normalaccess_readpage(struct file *file, z_erofs_submit_and_unzip(&f, &pagepool, true); out: - if (f.m_iter.mpage != NULL) - put_page(f.m_iter.mpage); + if (f.map.mpage) + put_page(f.map.mpage); /* clean up the remaining free pages */ put_pages_list(&pagepool); @@ -1315,8 +1540,8 @@ static int z_erofs_vle_normalaccess_readpages(struct file *filp, { struct inode *const inode = mapping->host; struct erofs_sb_info *const sbi = EROFS_I_SB(inode); - const bool sync = __should_decompress_synchronously(sbi, nr_pages); + bool sync = __should_decompress_synchronously(sbi, nr_pages); struct z_erofs_vle_frontend f = VLE_FRONTEND_INIT(inode); gfp_t gfp = mapping_gfp_constraint(mapping, GFP_KERNEL); struct page *head = NULL; @@ -1325,26 +1550,31 @@ static int z_erofs_vle_normalaccess_readpages(struct file *filp, trace_erofs_readpages(mapping->host, lru_to_page(pages), nr_pages, false); -#if (EROFS_FS_ZIP_CACHE_LVL >= 2) - f.cachedzone_la = (erofs_off_t)lru_to_page(pages)->index << PAGE_SHIFT; -#endif + f.headoffset = (erofs_off_t)lru_to_page(pages)->index << PAGE_SHIFT; + for (; nr_pages; --nr_pages) { struct page *page = lru_to_page(pages); prefetchw(&page->flags); list_del(&page->lru); + /* + * A pure asynchronous readahead is indicated if + * a PG_readahead marked page is hitted at first. + * Let's also do asynchronous decompression for this case. + */ + sync &= !(PageReadahead(page) && !head); + if (add_to_page_cache_lru(page, mapping, page->index, gfp)) { list_add(&page->lru, &pagepool); continue; } - BUG_ON(PagePrivate(page)); set_page_private(page, (unsigned long)head); head = page; } - while (head != NULL) { + while (head) { struct page *page = head; int err; @@ -1366,8 +1596,8 @@ static int z_erofs_vle_normalaccess_readpages(struct file *filp, z_erofs_submit_and_unzip(&f, &pagepool, sync); - if (f.m_iter.mpage != NULL) - put_page(f.m_iter.mpage); + if (f.map.mpage) + put_page(f.map.mpage); /* clean up the remaining free pages */ put_pages_list(&pagepool); @@ -1512,14 +1742,14 @@ vle_get_logical_extent_head(const struct vle_map_blocks_iter_ctx *ctx, int z_erofs_map_blocks_iter(struct inode *inode, struct erofs_map_blocks *map, - struct page **mpage_ret, int flags) + int flags) { void *kaddr; const struct vle_map_blocks_iter_ctx ctx = { .inode = inode, .sb = inode->i_sb, .clusterbits = EROFS_I_SB(inode)->clusterbits, - .mpage_ret = mpage_ret, + .mpage_ret = &map->mpage, .kaddr_ret = &kaddr }; const unsigned int clustersize = 1 << ctx.clusterbits; @@ -1533,7 +1763,7 @@ int z_erofs_map_blocks_iter(struct inode *inode, /* initialize `pblk' to keep gcc from printing foolish warnings */ erofs_blk_t mblk, pblk = 0; - struct page *mpage = *mpage_ret; + struct page *mpage = map->mpage; struct z_erofs_vle_decompressed_index *di; unsigned int cluster_type, logical_cluster_ofs; int err = 0; @@ -1561,7 +1791,7 @@ int z_erofs_map_blocks_iter(struct inode *inode, mblk = vle_extent_blkaddr(inode, lcn); if (!mpage || mpage->index != mblk) { - if (mpage != NULL) + if (mpage) put_page(mpage); mpage = erofs_get_meta_page(ctx.sb, mblk, false); @@ -1569,7 +1799,7 @@ int z_erofs_map_blocks_iter(struct inode *inode, err = PTR_ERR(mpage); goto out; } - *mpage_ret = mpage; + map->mpage = mpage; } else { lock_page(mpage); DBG_BUGON(!PageUptodate(mpage)); @@ -1629,7 +1859,7 @@ int z_erofs_map_blocks_iter(struct inode *inode, /* get the correspoinding first chunk */ err = vle_get_logical_extent_head(&ctx, lcn, &ofs, &pblk, &map->m_flags); - mpage = *mpage_ret; + mpage = map->mpage; if (unlikely(err)) { if (mpage) diff --git a/drivers/staging/erofs/unzip_vle.h b/drivers/staging/erofs/unzip_vle.h index 3316bc36965d..517e5ce8c5e9 100644 --- a/drivers/staging/erofs/unzip_vle.h +++ b/drivers/staging/erofs/unzip_vle.h @@ -67,13 +67,13 @@ struct z_erofs_vle_work { #define Z_EROFS_VLE_WORKGRP_FMT_LZ4 1 #define Z_EROFS_VLE_WORKGRP_FMT_MASK 1 -typedef struct z_erofs_vle_workgroup *z_erofs_vle_owned_workgrp_t; +typedef void *z_erofs_vle_owned_workgrp_t; struct z_erofs_vle_workgroup { struct erofs_workgroup obj; struct z_erofs_vle_work work; - /* next owned workgroup */ + /* point to next owned_workgrp_t */ z_erofs_vle_owned_workgrp_t next; /* compressed pages (including multi-usage pages) */ @@ -212,18 +212,17 @@ static inline void z_erofs_onlinepage_endio(struct page *page) #define Z_EROFS_VLE_VMAP_GLOBAL_PAGES 2048 /* unzip_vle_lz4.c */ -extern int z_erofs_vle_plain_copy(struct page **compressed_pages, - unsigned clusterpages, struct page **pages, - unsigned nr_pages, unsigned short pageofs); - -extern int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, - unsigned clusterpages, struct page **pages, - unsigned outlen, unsigned short pageofs, - void (*endio)(struct page *)); - -extern int z_erofs_vle_unzip_vmap(struct page **compressed_pages, - unsigned clusterpages, void *vaddr, unsigned llen, - unsigned short pageofs, bool overlapped); +int z_erofs_vle_plain_copy(struct page **compressed_pages, + unsigned int clusterpages, struct page **pages, + unsigned int nr_pages, unsigned short pageofs); +int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, + unsigned int clusterpages, + struct page **pages, unsigned int outlen, + unsigned short pageofs); +int z_erofs_vle_unzip_vmap(struct page **compressed_pages, + unsigned int clusterpages, + void *vaddr, unsigned int llen, + unsigned short pageofs, bool overlapped); #endif diff --git a/drivers/staging/erofs/unzip_vle_lz4.c b/drivers/staging/erofs/unzip_vle_lz4.c index 1a428658cbea..0daac9b984a8 100644 --- a/drivers/staging/erofs/unzip_vle_lz4.c +++ b/drivers/staging/erofs/unzip_vle_lz4.c @@ -11,6 +11,28 @@ * distribution for more details. */ #include "unzip_vle.h" +#include <linux/lz4.h> + +static int z_erofs_unzip_lz4(void *in, void *out, size_t inlen, size_t outlen) +{ + int ret = LZ4_decompress_safe_partial(in, out, inlen, outlen, outlen); + + if (ret >= 0) + return ret; + + /* + * LZ4_decompress_safe_partial will return an error code + * (< 0) if decompression failed + */ + errln("%s, failed to decompress, in[%p, %zu] outlen[%p, %zu]", + __func__, in, inlen, out, outlen); + WARN_ON(1); + print_hex_dump(KERN_DEBUG, "raw data [in]: ", DUMP_PREFIX_OFFSET, + 16, 1, in, inlen, true); + print_hex_dump(KERN_DEBUG, "raw data [out]: ", DUMP_PREFIX_OFFSET, + 16, 1, out, outlen, true); + return -EIO; +} #if Z_EROFS_CLUSTER_MAX_PAGES > Z_EROFS_VLE_INLINE_PAGEVECS #define EROFS_PERCPU_NR_PAGES Z_EROFS_CLUSTER_MAX_PAGES @@ -57,7 +79,7 @@ int z_erofs_vle_plain_copy(struct page **compressed_pages, if (compressed_pages[j] != page) continue; - BUG_ON(mirrored[j]); + DBG_BUGON(mirrored[j]); memcpy(percpu_data + j * PAGE_SIZE, dst, PAGE_SIZE); mirrored[j] = true; break; @@ -99,14 +121,11 @@ int z_erofs_vle_plain_copy(struct page **compressed_pages, return 0; } -extern int z_erofs_unzip_lz4(void *in, void *out, size_t inlen, size_t outlen); - int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, unsigned int clusterpages, struct page **pages, unsigned int outlen, - unsigned short pageofs, - void (*endio)(struct page *)) + unsigned short pageofs) { void *vin, *vout; unsigned int nr_pages, i, j; @@ -117,10 +136,13 @@ int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, nr_pages = DIV_ROUND_UP(outlen + pageofs, PAGE_SIZE); - if (clusterpages == 1) + if (clusterpages == 1) { vin = kmap_atomic(compressed_pages[0]); - else + } else { vin = erofs_vmap(compressed_pages, clusterpages); + if (!vin) + return -ENOMEM; + } preempt_disable(); vout = erofs_pcpubuf[smp_processor_id()].data; @@ -128,19 +150,16 @@ int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, ret = z_erofs_unzip_lz4(vin, vout + pageofs, clusterpages * PAGE_SIZE, outlen); - if (ret >= 0) { - outlen = ret; - ret = 0; - } + if (ret < 0) + goto out; + ret = 0; for (i = 0; i < nr_pages; ++i) { j = min((unsigned int)PAGE_SIZE - pageofs, outlen); if (pages[i]) { - if (ret < 0) { - SetPageError(pages[i]); - } else if (clusterpages == 1 && - pages[i] == compressed_pages[0]) { + if (clusterpages == 1 && + pages[i] == compressed_pages[0]) { memcpy(vin + pageofs, vout + pageofs, j); } else { void *dst = kmap_atomic(pages[i]); @@ -148,12 +167,13 @@ int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, memcpy(dst + pageofs, vout + pageofs, j); kunmap_atomic(dst); } - endio(pages[i]); } vout += PAGE_SIZE; outlen -= j; pageofs = 0; } + +out: preempt_enable(); if (clusterpages == 1) @@ -206,3 +226,4 @@ int z_erofs_vle_unzip_vmap(struct page **compressed_pages, } return ret; } + diff --git a/drivers/staging/erofs/utils.c b/drivers/staging/erofs/utils.c index ea8a962e5c95..5f61f99f4c10 100644 --- a/drivers/staging/erofs/utils.c +++ b/drivers/staging/erofs/utils.c @@ -23,9 +23,6 @@ struct page *erofs_allocpage(struct list_head *pool, gfp_t gfp) list_del(&page->lru); } else { page = alloc_pages(gfp | __GFP_NOFAIL, 0); - - BUG_ON(page == NULL); - BUG_ON(page->mapping != NULL); } return page; } @@ -34,13 +31,32 @@ struct page *erofs_allocpage(struct list_head *pool, gfp_t gfp) static atomic_long_t erofs_global_shrink_cnt; #ifdef CONFIG_EROFS_FS_ZIP +#define __erofs_workgroup_get(grp) atomic_inc(&(grp)->refcount) +#define __erofs_workgroup_put(grp) atomic_dec(&(grp)->refcount) + +static int erofs_workgroup_get(struct erofs_workgroup *grp) +{ + int o; + +repeat: + o = erofs_wait_on_workgroup_freezed(grp); + if (unlikely(o <= 0)) + return -1; + + if (unlikely(atomic_cmpxchg(&grp->refcount, o, o + 1) != o)) + goto repeat; -struct erofs_workgroup *erofs_find_workgroup( - struct super_block *sb, pgoff_t index, bool *tag) + /* decrease refcount paired by erofs_workgroup_put */ + if (unlikely(o == 1)) + atomic_long_dec(&erofs_global_shrink_cnt); + return 0; +} + +struct erofs_workgroup *erofs_find_workgroup(struct super_block *sb, + pgoff_t index, bool *tag) { struct erofs_sb_info *sbi = EROFS_SB(sb); struct erofs_workgroup *grp; - int oldcount; repeat: rcu_read_lock(); @@ -49,16 +65,13 @@ repeat: *tag = xa_pointer_tag(grp); grp = xa_untag_pointer(grp); - if (erofs_workgroup_get(grp, &oldcount)) { + if (erofs_workgroup_get(grp)) { /* prefer to relax rcu read side */ rcu_read_unlock(); goto repeat; } - /* decrease refcount added by erofs_workgroup_put */ - if (unlikely(oldcount == 1)) - atomic_long_dec(&erofs_global_shrink_cnt); - BUG_ON(index != grp->index); + DBG_BUGON(index != grp->index); } rcu_read_unlock(); return grp; @@ -71,8 +84,11 @@ int erofs_register_workgroup(struct super_block *sb, struct erofs_sb_info *sbi; int err; - /* grp->refcount should not < 1 */ - BUG_ON(!atomic_read(&grp->refcount)); + /* grp shouldn't be broken or used before */ + if (unlikely(atomic_read(&grp->refcount) != 1)) { + DBG_BUGON(1); + return -EINVAL; + } err = radix_tree_preload(GFP_NOFS); if (err) @@ -83,19 +99,32 @@ int erofs_register_workgroup(struct super_block *sb, grp = xa_tag_pointer(grp, tag); - err = radix_tree_insert(&sbi->workstn_tree, - grp->index, grp); + /* + * Bump up reference count before making this workgroup + * visible to other users in order to avoid potential UAF + * without serialized by erofs_workstn_lock. + */ + __erofs_workgroup_get(grp); - if (!err) { - __erofs_workgroup_get(grp); - } + err = radix_tree_insert(&sbi->workstn_tree, + grp->index, grp); + if (unlikely(err)) + /* + * it's safe to decrease since the workgroup isn't visible + * and refcount >= 2 (cannot be freezed). + */ + __erofs_workgroup_put(grp); erofs_workstn_unlock(sbi); radix_tree_preload_end(); return err; } -extern void erofs_workgroup_free_rcu(struct erofs_workgroup *grp); +static void __erofs_workgroup_free(struct erofs_workgroup *grp) +{ + atomic_long_dec(&erofs_global_shrink_cnt); + erofs_workgroup_free_rcu(grp); +} int erofs_workgroup_put(struct erofs_workgroup *grp) { @@ -103,13 +132,82 @@ int erofs_workgroup_put(struct erofs_workgroup *grp) if (count == 1) atomic_long_inc(&erofs_global_shrink_cnt); - else if (!count) { - atomic_long_dec(&erofs_global_shrink_cnt); - erofs_workgroup_free_rcu(grp); - } + else if (!count) + __erofs_workgroup_free(grp); return count; } +#ifdef EROFS_FS_HAS_MANAGED_CACHE +/* for cache-managed case, customized reclaim paths exist */ +static void erofs_workgroup_unfreeze_final(struct erofs_workgroup *grp) +{ + erofs_workgroup_unfreeze(grp, 0); + __erofs_workgroup_free(grp); +} + +static bool erofs_try_to_release_workgroup(struct erofs_sb_info *sbi, + struct erofs_workgroup *grp, + bool cleanup) +{ + /* + * for managed cache enabled, the refcount of workgroups + * themselves could be < 0 (freezed). So there is no guarantee + * that all refcount > 0 if managed cache is enabled. + */ + if (!erofs_workgroup_try_to_freeze(grp, 1)) + return false; + + /* + * note that all cached pages should be unlinked + * before delete it from the radix tree. + * Otherwise some cached pages of an orphan old workgroup + * could be still linked after the new one is available. + */ + if (erofs_try_to_free_all_cached_pages(sbi, grp)) { + erofs_workgroup_unfreeze(grp, 1); + return false; + } + + /* + * it is impossible to fail after the workgroup is freezed, + * however in order to avoid some race conditions, add a + * DBG_BUGON to observe this in advance. + */ + DBG_BUGON(xa_untag_pointer(radix_tree_delete(&sbi->workstn_tree, + grp->index)) != grp); + + /* + * if managed cache is enable, the last refcount + * should indicate the related workstation. + */ + erofs_workgroup_unfreeze_final(grp); + return true; +} + +#else +/* for nocache case, no customized reclaim path at all */ +static bool erofs_try_to_release_workgroup(struct erofs_sb_info *sbi, + struct erofs_workgroup *grp, + bool cleanup) +{ + int cnt = atomic_read(&grp->refcount); + + DBG_BUGON(cnt <= 0); + DBG_BUGON(cleanup && cnt != 1); + + if (cnt > 1) + return false; + + DBG_BUGON(xa_untag_pointer(radix_tree_delete(&sbi->workstn_tree, + grp->index)) != grp); + + /* (rarely) could be grabbed again when freeing */ + erofs_workgroup_put(grp); + return true; +} + +#endif + unsigned long erofs_shrink_workstation(struct erofs_sb_info *sbi, unsigned long nr_shrink, bool cleanup) @@ -126,42 +224,14 @@ repeat: batch, first_index, PAGEVEC_SIZE); for (i = 0; i < found; ++i) { - int cnt; struct erofs_workgroup *grp = xa_untag_pointer(batch[i]); first_index = grp->index + 1; - cnt = atomic_read(&grp->refcount); - BUG_ON(cnt <= 0); - - if (cleanup) - BUG_ON(cnt != 1); - -#ifndef EROFS_FS_HAS_MANAGED_CACHE - else if (cnt > 1) -#else - if (!erofs_workgroup_try_to_freeze(grp, 1)) -#endif + /* try to shrink each valid workgroup */ + if (!erofs_try_to_release_workgroup(sbi, grp, cleanup)) continue; - if (xa_untag_pointer(radix_tree_delete(&sbi->workstn_tree, - grp->index)) != grp) { -#ifdef EROFS_FS_HAS_MANAGED_CACHE -skip: - erofs_workgroup_unfreeze(grp, 1); -#endif - continue; - } - -#ifdef EROFS_FS_HAS_MANAGED_CACHE - if (erofs_try_to_free_all_cached_pages(sbi, grp)) - goto skip; - - erofs_workgroup_unfreeze(grp, 1); -#endif - /* (rarely) grabbed again when freeing */ - erofs_workgroup_put(grp); - ++freed; if (unlikely(!--nr_shrink)) break; @@ -200,14 +270,14 @@ void erofs_unregister_super(struct super_block *sb) spin_unlock(&erofs_sb_list_lock); } -unsigned long erofs_shrink_count(struct shrinker *shrink, - struct shrink_control *sc) +static unsigned long erofs_shrink_count(struct shrinker *shrink, + struct shrink_control *sc) { return atomic_long_read(&erofs_global_shrink_cnt); } -unsigned long erofs_shrink_scan(struct shrinker *shrink, - struct shrink_control *sc) +static unsigned long erofs_shrink_scan(struct shrinker *shrink, + struct shrink_control *sc) { struct erofs_sb_info *sbi; struct list_head *p; @@ -263,3 +333,9 @@ unsigned long erofs_shrink_scan(struct shrinker *shrink, return freed; } +struct shrinker erofs_shrinker_info = { + .scan_objects = erofs_shrink_scan, + .count_objects = erofs_shrink_count, + .seeks = DEFAULT_SEEKS, +}; + diff --git a/drivers/staging/erofs/xattr.c b/drivers/staging/erofs/xattr.c index 80dca6a4adbe..f716ab0446e5 100644 --- a/drivers/staging/erofs/xattr.c +++ b/drivers/staging/erofs/xattr.c @@ -44,19 +44,48 @@ static inline void xattr_iter_end_final(struct xattr_iter *it) static int init_inode_xattrs(struct inode *inode) { + struct erofs_vnode *const vi = EROFS_V(inode); struct xattr_iter it; unsigned int i; struct erofs_xattr_ibody_header *ih; struct super_block *sb; struct erofs_sb_info *sbi; - struct erofs_vnode *vi; bool atomic_map; + int ret = 0; - if (likely(inode_has_inited_xattr(inode))) + /* the most case is that xattrs of this inode are initialized. */ + if (test_bit(EROFS_V_EA_INITED_BIT, &vi->flags)) return 0; - vi = EROFS_V(inode); - BUG_ON(!vi->xattr_isize); + if (wait_on_bit_lock(&vi->flags, EROFS_V_BL_XATTR_BIT, TASK_KILLABLE)) + return -ERESTARTSYS; + + /* someone has initialized xattrs for us? */ + if (test_bit(EROFS_V_EA_INITED_BIT, &vi->flags)) + goto out_unlock; + + /* + * bypass all xattr operations if ->xattr_isize is not greater than + * sizeof(struct erofs_xattr_ibody_header), in detail: + * 1) it is not enough to contain erofs_xattr_ibody_header then + * ->xattr_isize should be 0 (it means no xattr); + * 2) it is just to contain erofs_xattr_ibody_header, which is on-disk + * undefined right now (maybe use later with some new sb feature). + */ + if (vi->xattr_isize == sizeof(struct erofs_xattr_ibody_header)) { + errln("xattr_isize %d of nid %llu is not supported yet", + vi->xattr_isize, vi->nid); + ret = -ENOTSUPP; + goto out_unlock; + } else if (vi->xattr_isize < sizeof(struct erofs_xattr_ibody_header)) { + if (unlikely(vi->xattr_isize)) { + DBG_BUGON(1); + ret = -EIO; + goto out_unlock; /* xattr ondisk layout error */ + } + ret = -ENOATTR; + goto out_unlock; + } sb = inode->i_sb; sbi = EROFS_SB(sb); @@ -64,8 +93,10 @@ static int init_inode_xattrs(struct inode *inode) it.ofs = erofs_blkoff(iloc(sbi, vi->nid) + vi->inode_isize); it.page = erofs_get_inline_page(inode, it.blkaddr); - if (IS_ERR(it.page)) - return PTR_ERR(it.page); + if (IS_ERR(it.page)) { + ret = PTR_ERR(it.page); + goto out_unlock; + } /* read in shared xattr array (non-atomic, see kmalloc below) */ it.kaddr = kmap(it.page); @@ -78,7 +109,8 @@ static int init_inode_xattrs(struct inode *inode) sizeof(uint), GFP_KERNEL); if (vi->xattr_shared_xattrs == NULL) { xattr_iter_end(&it, atomic_map); - return -ENOMEM; + ret = -ENOMEM; + goto out_unlock; } /* let's skip ibody header */ @@ -92,8 +124,12 @@ static int init_inode_xattrs(struct inode *inode) it.page = erofs_get_meta_page(sb, ++it.blkaddr, S_ISDIR(inode->i_mode)); - if (IS_ERR(it.page)) - return PTR_ERR(it.page); + if (IS_ERR(it.page)) { + kfree(vi->xattr_shared_xattrs); + vi->xattr_shared_xattrs = NULL; + ret = PTR_ERR(it.page); + goto out_unlock; + } it.kaddr = kmap_atomic(it.page); atomic_map = true; @@ -105,8 +141,11 @@ static int init_inode_xattrs(struct inode *inode) } xattr_iter_end(&it, atomic_map); - inode_set_inited_xattr(inode); - return 0; + set_bit(EROFS_V_EA_INITED_BIT, &vi->flags); + +out_unlock: + clear_and_wake_up_bit(EROFS_V_BL_XATTR_BIT, &vi->flags); + return ret; } /* @@ -117,10 +156,12 @@ static int init_inode_xattrs(struct inode *inode) * and need to be handled */ struct xattr_iter_handlers { - int (*entry)(struct xattr_iter *, struct erofs_xattr_entry *); - int (*name)(struct xattr_iter *, unsigned int, char *, unsigned int); - int (*alloc_buffer)(struct xattr_iter *, unsigned int); - void (*value)(struct xattr_iter *, unsigned int, char *, unsigned int); + int (*entry)(struct xattr_iter *_it, struct erofs_xattr_entry *entry); + int (*name)(struct xattr_iter *_it, unsigned int processed, char *buf, + unsigned int len); + int (*alloc_buffer)(struct xattr_iter *_it, unsigned int value_sz); + void (*value)(struct xattr_iter *_it, unsigned int processed, char *buf, + unsigned int len); }; static inline int xattr_iter_fixup(struct xattr_iter *it) @@ -422,7 +463,6 @@ static int erofs_xattr_generic_get(const struct xattr_handler *handler, struct dentry *unused, struct inode *inode, const char *name, void *buffer, size_t size) { - struct erofs_vnode *const vi = EROFS_V(inode); struct erofs_sb_info *const sbi = EROFS_I_SB(inode); switch (handler->flags) { @@ -440,9 +480,6 @@ static int erofs_xattr_generic_get(const struct xattr_handler *handler, return -EINVAL; } - if (!vi->xattr_isize) - return -ENOATTR; - return erofs_getxattr(inode, handler->flags, name, buffer, size); } @@ -503,8 +540,7 @@ static int xattr_entrylist(struct xattr_iter *_it, if (h == NULL || (h->list != NULL && !h->list(it->dentry))) return 1; - /* Note that at least one of 'prefix' and 'name' should be non-NULL */ - prefix = h->prefix != NULL ? h->prefix : h->name; + prefix = xattr_prefix(h); prefix_len = strlen(prefix); if (it->buffer == NULL) { @@ -627,3 +663,40 @@ ssize_t erofs_listxattr(struct dentry *dentry, return shared_listxattr(&it); } +#ifdef CONFIG_EROFS_FS_POSIX_ACL +struct posix_acl *erofs_get_acl(struct inode *inode, int type) +{ + struct posix_acl *acl; + int prefix, rc; + char *value = NULL; + + switch (type) { + case ACL_TYPE_ACCESS: + prefix = EROFS_XATTR_INDEX_POSIX_ACL_ACCESS; + break; + case ACL_TYPE_DEFAULT: + prefix = EROFS_XATTR_INDEX_POSIX_ACL_DEFAULT; + break; + default: + return ERR_PTR(-EINVAL); + } + + rc = erofs_getxattr(inode, prefix, "", NULL, 0); + if (rc > 0) { + value = kmalloc(rc, GFP_KERNEL); + if (!value) + return ERR_PTR(-ENOMEM); + rc = erofs_getxattr(inode, prefix, "", value, rc); + } + + if (rc == -ENOATTR) + acl = NULL; + else if (rc < 0) + acl = ERR_PTR(rc); + else + acl = posix_acl_from_xattr(&init_user_ns, value, rc); + kfree(value); + return acl; +} +#endif + diff --git a/drivers/staging/erofs/xattr.h b/drivers/staging/erofs/xattr.h index 0c7379282fc5..35ba5ac2139a 100644 --- a/drivers/staging/erofs/xattr.h +++ b/drivers/staging/erofs/xattr.h @@ -68,9 +68,7 @@ static const struct xattr_handler *xattr_handler_map[] = { } #ifdef CONFIG_EROFS_FS_XATTR - -extern const struct inode_operations erofs_generic_xattr_iops; -extern const struct inode_operations erofs_dir_xattr_iops; +extern const struct xattr_handler *erofs_xattr_handlers[]; int erofs_getxattr(struct inode *, int, const char *, void *, size_t); ssize_t erofs_listxattr(struct dentry *, char *, size_t); @@ -89,5 +87,11 @@ static ssize_t __maybe_unused erofs_listxattr(struct dentry *dentry, } #endif +#ifdef CONFIG_EROFS_FS_POSIX_ACL +struct posix_acl *erofs_get_acl(struct inode *inode, int type); +#else +#define erofs_get_acl (NULL) +#endif + #endif diff --git a/drivers/staging/fbtft/fb_agm1264k-fl.c b/drivers/staging/fbtft/fb_agm1264k-fl.c index f6f30f5bf15a..8f27bd8da17d 100644 --- a/drivers/staging/fbtft/fb_agm1264k-fl.c +++ b/drivers/staging/fbtft/fb_agm1264k-fl.c @@ -8,7 +8,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include <linux/slab.h> @@ -79,14 +79,14 @@ static int init_display(struct fbtft_par *par) static void reset(struct fbtft_par *par) { - if (par->gpio.reset == -1) + if (!par->gpio.reset) return; dev_dbg(par->info->device, "%s()\n", __func__); - gpio_set_value(par->gpio.reset, 0); + gpiod_set_value(par->gpio.reset, 0); udelay(20); - gpio_set_value(par->gpio.reset, 1); + gpiod_set_value(par->gpio.reset, 1); mdelay(120); } @@ -98,30 +98,30 @@ static int verify_gpios(struct fbtft_par *par) dev_dbg(par->info->device, "%s()\n", __func__); - if (par->EPIN < 0) { + if (!par->EPIN) { dev_err(par->info->device, "Missing info about 'wr' (aka E) gpio. Aborting.\n"); return -EINVAL; } for (i = 0; i < 8; ++i) { - if (par->gpio.db[i] < 0) { + if (!par->gpio.db[i]) { dev_err(par->info->device, "Missing info about 'db[%i]' gpio. Aborting.\n", i); return -EINVAL; } } - if (par->CS0 < 0) { + if (!par->CS0) { dev_err(par->info->device, "Missing info about 'cs0' gpio. Aborting.\n"); return -EINVAL; } - if (par->CS1 < 0) { + if (!par->CS1) { dev_err(par->info->device, "Missing info about 'cs1' gpio. Aborting.\n"); return -EINVAL; } - if (par->RW < 0) { + if (!par->RW) { dev_err(par->info->device, "Missing info about 'rw' gpio. Aborting.\n"); return -EINVAL; @@ -139,22 +139,22 @@ request_gpios_match(struct fbtft_par *par, const struct fbtft_gpio *gpio) if (strcasecmp(gpio->name, "wr") == 0) { /* left ks0108 E pin */ par->EPIN = gpio->gpio; - return GPIOF_OUT_INIT_LOW; + return GPIOD_OUT_LOW; } else if (strcasecmp(gpio->name, "cs0") == 0) { /* left ks0108 controller pin */ par->CS0 = gpio->gpio; - return GPIOF_OUT_INIT_HIGH; + return GPIOD_OUT_HIGH; } else if (strcasecmp(gpio->name, "cs1") == 0) { /* right ks0108 controller pin */ par->CS1 = gpio->gpio; - return GPIOF_OUT_INIT_HIGH; + return GPIOD_OUT_HIGH; } /* if write (rw = 0) e(1->0) perform write */ /* if read (rw = 1) e(0->1) set data on D0-7*/ else if (strcasecmp(gpio->name, "rw") == 0) { par->RW = gpio->gpio; - return GPIOF_OUT_INIT_LOW; + return GPIOD_OUT_LOW; } return FBTFT_GPIO_NO_MATCH; @@ -194,15 +194,15 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) /* select chip */ if (*buf) { /* cs1 */ - gpio_set_value(par->CS0, 1); - gpio_set_value(par->CS1, 0); + gpiod_set_value(par->CS0, 1); + gpiod_set_value(par->CS1, 0); } else { /* cs0 */ - gpio_set_value(par->CS0, 0); - gpio_set_value(par->CS1, 1); + gpiod_set_value(par->CS0, 0); + gpiod_set_value(par->CS1, 1); } - gpio_set_value(par->RS, 0); /* RS->0 (command mode) */ + gpiod_set_value(par->RS, 0); /* RS->0 (command mode) */ len--; if (len) { @@ -364,7 +364,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) write_reg(par, 0x00, (0x17 << 3) | (u8)y); /* write bitmap */ - gpio_set_value(par->RS, 1); /* RS->1 (data mode) */ + gpiod_set_value(par->RS, 1); /* RS->1 (data mode) */ ret = par->fbtftops.write(par, buf, len); if (ret < 0) dev_err(par->info->device, @@ -387,7 +387,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) write_reg(par, 0x01, (0x17 << 3) | (u8)y); /* write bitmap */ - gpio_set_value(par->RS, 1); /* RS->1 (data mode) */ + gpiod_set_value(par->RS, 1); /* RS->1 (data mode) */ par->fbtftops.write(par, buf, len); if (ret < 0) dev_err(par->info->device, @@ -397,8 +397,8 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) } kfree(convert_buf); - gpio_set_value(par->CS0, 1); - gpio_set_value(par->CS1, 1); + gpiod_set_value(par->CS0, 1); + gpiod_set_value(par->CS1, 1); return ret; } @@ -408,7 +408,7 @@ static int write(struct fbtft_par *par, void *buf, size_t len) fbtft_par_dbg_hex(DEBUG_WRITE, par, par->info->device, u8, buf, len, "%s(len=%d): ", __func__, len); - gpio_set_value(par->RW, 0); /* set write mode */ + gpiod_set_value(par->RW, 0); /* set write mode */ while (len--) { u8 i, data; @@ -417,12 +417,12 @@ static int write(struct fbtft_par *par, void *buf, size_t len) /* set data bus */ for (i = 0; i < 8; ++i) - gpio_set_value(par->gpio.db[i], data & (1 << i)); + gpiod_set_value(par->gpio.db[i], data & (1 << i)); /* set E */ - gpio_set_value(par->EPIN, 1); + gpiod_set_value(par->EPIN, 1); udelay(5); /* unset E - write */ - gpio_set_value(par->EPIN, 0); + gpiod_set_value(par->EPIN, 0); udelay(1); } diff --git a/drivers/staging/fbtft/fb_bd663474.c b/drivers/staging/fbtft/fb_bd663474.c index a58c514f4721..b6c6d66e4eb1 100644 --- a/drivers/staging/fbtft/fb_bd663474.c +++ b/drivers/staging/fbtft/fb_bd663474.c @@ -12,7 +12,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include "fbtft.h" @@ -24,8 +24,8 @@ static int init_display(struct fbtft_par *par) { - if (par->gpio.cs != -1) - gpio_set_value(par->gpio.cs, 0); /* Activate chip */ + if (!par->gpio.cs) + gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ par->fbtftops.reset(par); diff --git a/drivers/staging/fbtft/fb_ili9163.c b/drivers/staging/fbtft/fb_ili9163.c index 86e140244aab..d609a2b67db9 100644 --- a/drivers/staging/fbtft/fb_ili9163.c +++ b/drivers/staging/fbtft/fb_ili9163.c @@ -11,7 +11,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include <video/mipi_display.h> @@ -77,8 +77,8 @@ static int init_display(struct fbtft_par *par) { par->fbtftops.reset(par); - if (par->gpio.cs != -1) - gpio_set_value(par->gpio.cs, 0); /* Activate chip */ + if (!par->gpio.cs) + gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ write_reg(par, MIPI_DCS_SOFT_RESET); /* software reset */ mdelay(500); diff --git a/drivers/staging/fbtft/fb_ili9320.c b/drivers/staging/fbtft/fb_ili9320.c index 740c0acbecd8..ea6e001288ce 100644 --- a/drivers/staging/fbtft/fb_ili9320.c +++ b/drivers/staging/fbtft/fb_ili9320.c @@ -8,7 +8,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <linux/delay.h> diff --git a/drivers/staging/fbtft/fb_ili9325.c b/drivers/staging/fbtft/fb_ili9325.c index 2cf75f2e03e2..b090e7ab6fdd 100644 --- a/drivers/staging/fbtft/fb_ili9325.c +++ b/drivers/staging/fbtft/fb_ili9325.c @@ -10,7 +10,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include "fbtft.h" @@ -85,8 +85,8 @@ static int init_display(struct fbtft_par *par) { par->fbtftops.reset(par); - if (par->gpio.cs != -1) - gpio_set_value(par->gpio.cs, 0); /* Activate chip */ + if (!par->gpio.cs) + gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ bt &= 0x07; vc &= 0x07; diff --git a/drivers/staging/fbtft/fb_ili9340.c b/drivers/staging/fbtft/fb_ili9340.c index 430f21e50f4d..415183c7054a 100644 --- a/drivers/staging/fbtft/fb_ili9340.c +++ b/drivers/staging/fbtft/fb_ili9340.c @@ -8,7 +8,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include <video/mipi_display.h> diff --git a/drivers/staging/fbtft/fb_pcd8544.c b/drivers/staging/fbtft/fb_pcd8544.c index 32172f8f79f0..ad49973ad594 100644 --- a/drivers/staging/fbtft/fb_pcd8544.c +++ b/drivers/staging/fbtft/fb_pcd8544.c @@ -11,7 +11,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <linux/delay.h> @@ -119,7 +119,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) } /* Write data */ - gpio_set_value(par->gpio.dc, 1); + gpiod_set_value(par->gpio.dc, 1); ret = par->fbtftops.write(par, par->txbuf.buf, 6 * 84); if (ret < 0) dev_err(par->info->device, "write failed and returned: %d\n", diff --git a/drivers/staging/fbtft/fb_ra8875.c b/drivers/staging/fbtft/fb_ra8875.c index 5d3b76ca74d8..70b37fc7fb66 100644 --- a/drivers/staging/fbtft/fb_ra8875.c +++ b/drivers/staging/fbtft/fb_ra8875.c @@ -9,7 +9,7 @@ #include <linux/init.h> #include <linux/delay.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include "fbtft.h" #define DRVNAME "fb_ra8875" @@ -39,7 +39,7 @@ static int write_spi(struct fbtft_par *par, void *buf, size_t len) static int init_display(struct fbtft_par *par) { - gpio_set_value(par->gpio.dc, 1); + gpiod_set_value(par->gpio.dc, 1); fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); diff --git a/drivers/staging/fbtft/fb_s6d1121.c b/drivers/staging/fbtft/fb_s6d1121.c index aa716f33420a..b3d0701880fe 100644 --- a/drivers/staging/fbtft/fb_s6d1121.c +++ b/drivers/staging/fbtft/fb_s6d1121.c @@ -12,7 +12,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include "fbtft.h" @@ -29,8 +29,8 @@ static int init_display(struct fbtft_par *par) { par->fbtftops.reset(par); - if (par->gpio.cs != -1) - gpio_set_value(par->gpio.cs, 0); /* Activate chip */ + if (!par->gpio.cs) + gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ /* Initialization sequence from Lib_UTFT */ diff --git a/drivers/staging/fbtft/fb_sh1106.c b/drivers/staging/fbtft/fb_sh1106.c index 00096f8d249a..6f7249493ea3 100644 --- a/drivers/staging/fbtft/fb_sh1106.c +++ b/drivers/staging/fbtft/fb_sh1106.c @@ -9,7 +9,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include "fbtft.h" diff --git a/drivers/staging/fbtft/fb_ssd1289.c b/drivers/staging/fbtft/fb_ssd1289.c index c9b18b3ba4ab..bbf75f795234 100644 --- a/drivers/staging/fbtft/fb_ssd1289.c +++ b/drivers/staging/fbtft/fb_ssd1289.c @@ -10,7 +10,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include "fbtft.h" @@ -28,8 +28,8 @@ static int init_display(struct fbtft_par *par) { par->fbtftops.reset(par); - if (par->gpio.cs != -1) - gpio_set_value(par->gpio.cs, 0); /* Activate chip */ + if (!par->gpio.cs) + gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ write_reg(par, 0x00, 0x0001); write_reg(par, 0x03, 0xA8A4); diff --git a/drivers/staging/fbtft/fb_ssd1305.c b/drivers/staging/fbtft/fb_ssd1305.c index 3515888d94c9..020fe48fed0b 100644 --- a/drivers/staging/fbtft/fb_ssd1305.c +++ b/drivers/staging/fbtft/fb_ssd1305.c @@ -8,7 +8,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include "fbtft.h" @@ -168,7 +168,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) } /* Write data */ - gpio_set_value(par->gpio.dc, 1); + gpiod_set_value(par->gpio.dc, 1); ret = par->fbtftops.write(par, par->txbuf.buf, par->info->var.xres * par->info->var.yres / 8); diff --git a/drivers/staging/fbtft/fb_ssd1306.c b/drivers/staging/fbtft/fb_ssd1306.c index 50172ddd94ae..d7c5e2e0eee9 100644 --- a/drivers/staging/fbtft/fb_ssd1306.c +++ b/drivers/staging/fbtft/fb_ssd1306.c @@ -8,7 +8,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include "fbtft.h" @@ -190,7 +190,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) } /* Write data */ - gpio_set_value(par->gpio.dc, 1); + gpiod_set_value(par->gpio.dc, 1); ret = par->fbtftops.write(par, par->txbuf.buf, xres * yres / 8); if (ret < 0) dev_err(par->info->device, "write failed and returned: %d\n", diff --git a/drivers/staging/fbtft/fb_ssd1325.c b/drivers/staging/fbtft/fb_ssd1325.c index f974f7fc4d79..8a3140d41d8b 100644 --- a/drivers/staging/fbtft/fb_ssd1325.c +++ b/drivers/staging/fbtft/fb_ssd1325.c @@ -6,7 +6,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include "fbtft.h" @@ -35,7 +35,7 @@ static int init_display(struct fbtft_par *par) { par->fbtftops.reset(par); - gpio_set_value(par->gpio.cs, 0); + gpiod_set_value(par->gpio.cs, 0); write_reg(par, 0xb3); write_reg(par, 0xf0); @@ -155,7 +155,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) } } - gpio_set_value(par->gpio.dc, 1); + gpiod_set_value(par->gpio.dc, 1); /* Write data */ ret = par->fbtftops.write(par, par->txbuf.buf, diff --git a/drivers/staging/fbtft/fb_ssd1331.c b/drivers/staging/fbtft/fb_ssd1331.c index 0b614c84822e..9f54fe28d511 100644 --- a/drivers/staging/fbtft/fb_ssd1331.c +++ b/drivers/staging/fbtft/fb_ssd1331.c @@ -2,7 +2,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <linux/delay.h> @@ -80,8 +80,8 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) va_start(args, len); *buf = (u8)va_arg(args, unsigned int); - if (par->gpio.dc != -1) - gpio_set_value(par->gpio.dc, 0); + if (!par->gpio.dc) + gpiod_set_value(par->gpio.dc, 0); ret = par->fbtftops.write(par, par->buf, sizeof(u8)); if (ret < 0) { va_end(args); @@ -103,8 +103,8 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) return; } } - if (par->gpio.dc != -1) - gpio_set_value(par->gpio.dc, 1); + if (!par->gpio.dc) + gpiod_set_value(par->gpio.dc, 1); va_end(args); } diff --git a/drivers/staging/fbtft/fb_ssd1351.c b/drivers/staging/fbtft/fb_ssd1351.c index 3da091b4d297..9ac78ce30619 100644 --- a/drivers/staging/fbtft/fb_ssd1351.c +++ b/drivers/staging/fbtft/fb_ssd1351.c @@ -2,7 +2,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <linux/delay.h> @@ -164,7 +164,7 @@ static int set_gamma(struct fbtft_par *par, u32 *curves) static int blank(struct fbtft_par *par, bool on) { fbtft_par_dbg(DEBUG_BLANK, par, "(%s=%s)\n", - __func__, on ? "true" : "false"); + __func__, on ? "true" : "false"); if (on) write_reg(par, 0xAE); else diff --git a/drivers/staging/fbtft/fb_tinylcd.c b/drivers/staging/fbtft/fb_tinylcd.c index e463b0ddf16d..9469248f2c50 100644 --- a/drivers/staging/fbtft/fb_tinylcd.c +++ b/drivers/staging/fbtft/fb_tinylcd.c @@ -38,7 +38,7 @@ static int init_display(struct fbtft_par *par) write_reg(par, 0xE5, 0x00); write_reg(par, 0xF0, 0x36, 0xA5, 0x53); write_reg(par, 0xE0, 0x00, 0x35, 0x33, 0x00, 0x00, 0x00, - 0x00, 0x35, 0x33, 0x00, 0x00, 0x00); + 0x00, 0x35, 0x33, 0x00, 0x00, 0x00); write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55); write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE); udelay(250); diff --git a/drivers/staging/fbtft/fb_tls8204.c b/drivers/staging/fbtft/fb_tls8204.c index 277b6ed9c725..bec6dd0ffb01 100644 --- a/drivers/staging/fbtft/fb_tls8204.c +++ b/drivers/staging/fbtft/fb_tls8204.c @@ -12,7 +12,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <linux/delay.h> @@ -94,7 +94,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) /* The display is 102x68 but the LCD is 84x48. * Set the write pointer at the start of each row. */ - gpio_set_value(par->gpio.dc, 0); + gpiod_set_value(par->gpio.dc, 0); write_reg(par, 0x80 | 0); write_reg(par, 0x40 | y); @@ -109,7 +109,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) *buf++ = ch; } /* Write the row */ - gpio_set_value(par->gpio.dc, 1); + gpiod_set_value(par->gpio.dc, 1); ret = par->fbtftops.write(par, par->txbuf.buf, WIDTH); if (ret < 0) { dev_err(par->info->device, diff --git a/drivers/staging/fbtft/fb_uc1611.c b/drivers/staging/fbtft/fb_uc1611.c index dfaf8bc70f73..65681d0fe200 100644 --- a/drivers/staging/fbtft/fb_uc1611.c +++ b/drivers/staging/fbtft/fb_uc1611.c @@ -10,7 +10,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <linux/delay.h> @@ -251,7 +251,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) } break; } - gpio_set_value(par->gpio.dc, 1); + gpiod_set_value(par->gpio.dc, 1); /* Write data */ ret = par->fbtftops.write(par, par->txbuf.buf, len / 2); diff --git a/drivers/staging/fbtft/fb_uc1701.c b/drivers/staging/fbtft/fb_uc1701.c index 0a3531d6eb39..e4ccc73868a7 100644 --- a/drivers/staging/fbtft/fb_uc1701.c +++ b/drivers/staging/fbtft/fb_uc1701.c @@ -11,7 +11,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <linux/delay.h> @@ -136,9 +136,9 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) write_reg(par, LCD_PAGE_ADDRESS | (u8)y); write_reg(par, 0x00); write_reg(par, LCD_COL_ADDRESS); - gpio_set_value(par->gpio.dc, 1); + gpiod_set_value(par->gpio.dc, 1); ret = par->fbtftops.write(par, par->txbuf.buf, WIDTH); - gpio_set_value(par->gpio.dc, 0); + gpiod_set_value(par->gpio.dc, 0); } if (ret < 0) diff --git a/drivers/staging/fbtft/fb_upd161704.c b/drivers/staging/fbtft/fb_upd161704.c index acc425fdf34e..564a38e34440 100644 --- a/drivers/staging/fbtft/fb_upd161704.c +++ b/drivers/staging/fbtft/fb_upd161704.c @@ -12,7 +12,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include "fbtft.h" @@ -26,8 +26,8 @@ static int init_display(struct fbtft_par *par) { par->fbtftops.reset(par); - if (par->gpio.cs != -1) - gpio_set_value(par->gpio.cs, 0); /* Activate chip */ + if (!par->gpio.cs) + gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ /* Initialization sequence from Lib_UTFT */ diff --git a/drivers/staging/fbtft/fb_watterott.c b/drivers/staging/fbtft/fb_watterott.c index e77178157f1b..0a5206d28da4 100644 --- a/drivers/staging/fbtft/fb_watterott.c +++ b/drivers/staging/fbtft/fb_watterott.c @@ -8,7 +8,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> #include "fbtft.h" @@ -213,7 +213,7 @@ static int set_var(struct fbtft_par *par) static int verify_gpios(struct fbtft_par *par) { - if (par->gpio.reset < 0) { + if (!par->gpio.reset) { dev_err(par->info->device, "Missing 'reset' gpio. Aborting.\n"); return -EINVAL; } diff --git a/drivers/staging/fbtft/fbtft-bus.c b/drivers/staging/fbtft/fbtft-bus.c index 8ce1ff9b6c2a..2ea814d0dca5 100644 --- a/drivers/staging/fbtft/fbtft-bus.c +++ b/drivers/staging/fbtft/fbtft-bus.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include <linux/export.h> #include <linux/errno.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include "fbtft.h" @@ -135,8 +135,8 @@ int fbtft_write_vmem16_bus8(struct fbtft_par *par, size_t offset, size_t len) remain = len / 2; vmem16 = (u16 *)(par->info->screen_buffer + offset); - if (par->gpio.dc != -1) - gpio_set_value(par->gpio.dc, 1); + if (!par->gpio.dc) + gpiod_set_value(par->gpio.dc, 1); /* non buffered write */ if (!par->txbuf.buf) diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c index a2df02d97a8e..9b07badf4c6c 100644 --- a/drivers/staging/fbtft/fbtft-core.c +++ b/drivers/staging/fbtft/fbtft-core.c @@ -16,7 +16,7 @@ #include <linux/slab.h> #include <linux/init.h> #include <linux/fb.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <linux/delay.h> #include <linux/uaccess.h> @@ -24,7 +24,6 @@ #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/of.h> -#include <linux/of_gpio.h> #include <video/mipi_display.h> #include "fbtft.h" @@ -38,8 +37,8 @@ int fbtft_write_buf_dc(struct fbtft_par *par, void *buf, size_t len, int dc) { int ret; - if (gpio_is_valid(par->gpio.dc)) - gpio_set_value(par->gpio.dc, dc); + if (par->gpio.dc) + gpiod_set_value(par->gpio.dc, dc); ret = par->fbtftops.write(par, buf, len); if (ret < 0) @@ -71,127 +70,26 @@ void fbtft_dbg_hex(const struct device *dev, int groupsize, } EXPORT_SYMBOL(fbtft_dbg_hex); -static unsigned long fbtft_request_gpios_match(struct fbtft_par *par, - const struct fbtft_gpio *gpio) -{ - int ret; - unsigned int val; - - fbtft_par_dbg(DEBUG_REQUEST_GPIOS_MATCH, par, "%s('%s')\n", - __func__, gpio->name); - - if (strcasecmp(gpio->name, "reset") == 0) { - par->gpio.reset = gpio->gpio; - return GPIOF_OUT_INIT_HIGH; - } else if (strcasecmp(gpio->name, "dc") == 0) { - par->gpio.dc = gpio->gpio; - return GPIOF_OUT_INIT_LOW; - } else if (strcasecmp(gpio->name, "cs") == 0) { - par->gpio.cs = gpio->gpio; - return GPIOF_OUT_INIT_HIGH; - } else if (strcasecmp(gpio->name, "wr") == 0) { - par->gpio.wr = gpio->gpio; - return GPIOF_OUT_INIT_HIGH; - } else if (strcasecmp(gpio->name, "rd") == 0) { - par->gpio.rd = gpio->gpio; - return GPIOF_OUT_INIT_HIGH; - } else if (strcasecmp(gpio->name, "latch") == 0) { - par->gpio.latch = gpio->gpio; - return GPIOF_OUT_INIT_LOW; - } else if (gpio->name[0] == 'd' && gpio->name[1] == 'b') { - ret = kstrtouint(&gpio->name[2], 10, &val); - if (ret == 0 && val < 16) { - par->gpio.db[val] = gpio->gpio; - return GPIOF_OUT_INIT_LOW; - } - } else if (strcasecmp(gpio->name, "led") == 0) { - par->gpio.led[0] = gpio->gpio; - return GPIOF_OUT_INIT_LOW; - } else if (strcasecmp(gpio->name, "led_") == 0) { - par->gpio.led[0] = gpio->gpio; - return GPIOF_OUT_INIT_HIGH; - } - - return FBTFT_GPIO_NO_MATCH; -} - -static int fbtft_request_gpios(struct fbtft_par *par) -{ - struct fbtft_platform_data *pdata = par->pdata; - const struct fbtft_gpio *gpio; - unsigned long flags; - int ret; - - if (!(pdata && pdata->gpios)) - return 0; - - gpio = pdata->gpios; - while (gpio->name[0]) { - flags = FBTFT_GPIO_NO_MATCH; - /* if driver provides match function, try it first, - * if no match use our own - */ - if (par->fbtftops.request_gpios_match) - flags = par->fbtftops.request_gpios_match(par, gpio); - if (flags == FBTFT_GPIO_NO_MATCH) - flags = fbtft_request_gpios_match(par, gpio); - if (flags != FBTFT_GPIO_NO_MATCH) { - ret = devm_gpio_request_one(par->info->device, - gpio->gpio, flags, - par->info->device->driver->name); - if (ret < 0) { - dev_err(par->info->device, - "%s: gpio_request_one('%s'=%d) failed with %d\n", - __func__, gpio->name, - gpio->gpio, ret); - return ret; - } - fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, - "%s: '%s' = GPIO%d\n", - __func__, gpio->name, gpio->gpio); - } - gpio++; - } - - return 0; -} - #ifdef CONFIG_OF static int fbtft_request_one_gpio(struct fbtft_par *par, - const char *name, int index, int *gpiop) + const char *name, int index, + struct gpio_desc **gpiop) { struct device *dev = par->info->device; struct device_node *node = dev->of_node; - int gpio, flags, ret = 0; - enum of_gpio_flags of_flags; + int ret = 0; if (of_find_property(node, name, NULL)) { - gpio = of_get_named_gpio_flags(node, name, index, &of_flags); - if (gpio == -ENOENT) - return 0; - if (gpio == -EPROBE_DEFER) - return gpio; - if (gpio < 0) { - dev_err(dev, - "failed to get '%s' from DT\n", name); - return gpio; - } - - /* active low translates to initially low */ - flags = (of_flags & OF_GPIO_ACTIVE_LOW) ? GPIOF_OUT_INIT_LOW : - GPIOF_OUT_INIT_HIGH; - ret = devm_gpio_request_one(dev, gpio, flags, - dev->driver->name); - if (ret) { + *gpiop = devm_gpiod_get_index(dev, dev->driver->name, index, + GPIOD_OUT_HIGH); + if (IS_ERR(*gpiop)) { + ret = PTR_ERR(*gpiop); dev_err(dev, - "gpio_request_one('%s'=%d) failed with %d\n", - name, gpio, ret); + "Failed to request %s GPIO:%d\n", name, ret); return ret; } - if (gpiop) - *gpiop = gpio; - fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' = GPIO%d\n", - __func__, name, gpio); + fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' GPIO\n", + __func__, name); } return ret; @@ -254,9 +152,9 @@ static int fbtft_backlight_update_status(struct backlight_device *bd) if ((bd->props.power == FB_BLANK_UNBLANK) && (bd->props.fb_blank == FB_BLANK_UNBLANK)) - gpio_set_value(par->gpio.led[0], polarity); + gpiod_set_value(par->gpio.led[0], polarity); else - gpio_set_value(par->gpio.led[0], !polarity); + gpiod_set_value(par->gpio.led[0], !polarity); return 0; } @@ -286,7 +184,7 @@ void fbtft_register_backlight(struct fbtft_par *par) struct backlight_device *bd; struct backlight_properties bl_props = { 0, }; - if (par->gpio.led[0] == -1) { + if (!par->gpio.led[0]) { fbtft_par_dbg(DEBUG_BACKLIGHT, par, "%s(): led pin not set, exiting.\n", __func__); return; @@ -295,7 +193,7 @@ void fbtft_register_backlight(struct fbtft_par *par) bl_props.type = BACKLIGHT_RAW; /* Assume backlight is off, get polarity from current state of pin */ bl_props.power = FB_BLANK_POWERDOWN; - if (!gpio_get_value(par->gpio.led[0])) + if (!gpiod_get_value(par->gpio.led[0])) par->polarity = true; bd = backlight_device_register(dev_driver_string(par->info->device), @@ -333,12 +231,12 @@ static void fbtft_set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, static void fbtft_reset(struct fbtft_par *par) { - if (par->gpio.reset == -1) + if (!par->gpio.reset) return; fbtft_par_dbg(DEBUG_RESET, par, "%s()\n", __func__); - gpio_set_value_cansleep(par->gpio.reset, 0); + gpiod_set_value_cansleep(par->gpio.reset, 0); usleep_range(20, 40); - gpio_set_value_cansleep(par->gpio.reset, 1); + gpiod_set_value_cansleep(par->gpio.reset, 1); msleep(120); } @@ -538,9 +436,9 @@ static unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf) return chan << bf->offset; } -static int fbtft_fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, - unsigned int blue, unsigned int transp, - struct fb_info *info) +static int fbtft_fb_setcolreg(unsigned int regno, unsigned int red, + unsigned int green, unsigned int blue, + unsigned int transp, struct fb_info *info) { unsigned int val; int ret = 1; @@ -663,7 +561,7 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display, int txbuflen = display->txbuflen; unsigned int bpp = display->bpp; unsigned int fps = display->fps; - int vmem_size, i; + int vmem_size; const s16 *init_sequence = display->init_sequence; char *gamma = display->gamma; u32 *gamma_curves = NULL; @@ -841,19 +739,6 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display, par->txbuf.len = txbuflen; } - /* Initialize gpios to disabled */ - par->gpio.reset = -1; - par->gpio.dc = -1; - par->gpio.rd = -1; - par->gpio.wr = -1; - par->gpio.cs = -1; - par->gpio.latch = -1; - for (i = 0; i < 16; i++) { - par->gpio.db[i] = -1; - par->gpio.led[i] = -1; - par->gpio.aux[i] = -1; - } - /* default fbtft operations */ par->fbtftops.write = fbtft_write_spi; par->fbtftops.read = fbtft_read_spi; @@ -863,7 +748,6 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display, par->fbtftops.reset = fbtft_reset; par->fbtftops.mkdirty = fbtft_mkdirty; par->fbtftops.update_display = fbtft_update_display; - par->fbtftops.request_gpios = fbtft_request_gpios; if (display->backlight) par->fbtftops.register_backlight = fbtft_register_backlight; @@ -1035,8 +919,8 @@ static int fbtft_init_display_dt(struct fbtft_par *par) return -EINVAL; par->fbtftops.reset(par); - if (par->gpio.cs != -1) - gpio_set_value(par->gpio.cs, 0); /* Activate chip */ + if (!par->gpio.cs) + gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ while (p) { if (val & FBTFT_OF_INIT_CMD) { @@ -1126,8 +1010,8 @@ int fbtft_init_display(struct fbtft_par *par) } par->fbtftops.reset(par); - if (par->gpio.cs != -1) - gpio_set_value(par->gpio.cs, 0); /* Activate chip */ + if (!par->gpio.cs) + gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ i = 0; while (i < FBTFT_MAX_INIT_SEQUENCE) { @@ -1227,7 +1111,7 @@ static int fbtft_verify_gpios(struct fbtft_par *par) fbtft_par_dbg(DEBUG_VERIFY_GPIOS, par, "%s()\n", __func__); if (pdata->display.buswidth != 9 && par->startbyte == 0 && - par->gpio.dc < 0) { + !par->gpio.dc) { dev_err(par->info->device, "Missing info about 'dc' gpio. Aborting.\n"); return -EINVAL; @@ -1236,12 +1120,12 @@ static int fbtft_verify_gpios(struct fbtft_par *par) if (!par->pdev) return 0; - if (par->gpio.wr < 0) { + if (!par->gpio.wr) { dev_err(par->info->device, "Missing 'wr' gpio. Aborting.\n"); return -EINVAL; } for (i = 0; i < pdata->display.buswidth; i++) { - if (par->gpio.db[i] < 0) { + if (!par->gpio.db[i]) { dev_err(par->info->device, "Missing 'db%02d' gpio. Aborting.\n", i); return -EINVAL; diff --git a/drivers/staging/fbtft/fbtft-io.c b/drivers/staging/fbtft/fbtft-io.c index b5051d3d46a6..38cdad6203ea 100644 --- a/drivers/staging/fbtft/fbtft-io.c +++ b/drivers/staging/fbtft/fbtft-io.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include <linux/export.h> #include <linux/errno.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include "fbtft.h" @@ -142,30 +142,30 @@ int fbtft_write_gpio8_wr(struct fbtft_par *par, void *buf, size_t len) data = *(u8 *)buf; /* Start writing by pulling down /WR */ - gpio_set_value(par->gpio.wr, 0); + gpiod_set_value(par->gpio.wr, 0); /* Set data */ #ifndef DO_NOT_OPTIMIZE_FBTFT_WRITE_GPIO if (data == prev_data) { - gpio_set_value(par->gpio.wr, 0); /* used as delay */ + gpiod_set_value(par->gpio.wr, 0); /* used as delay */ } else { for (i = 0; i < 8; i++) { if ((data & 1) != (prev_data & 1)) - gpio_set_value(par->gpio.db[i], - data & 1); + gpiod_set_value(par->gpio.db[i], + data & 1); data >>= 1; prev_data >>= 1; } } #else for (i = 0; i < 8; i++) { - gpio_set_value(par->gpio.db[i], data & 1); + gpiod_set_value(par->gpio.db[i], data & 1); data >>= 1; } #endif /* Pullup /WR */ - gpio_set_value(par->gpio.wr, 1); + gpiod_set_value(par->gpio.wr, 1); #ifndef DO_NOT_OPTIMIZE_FBTFT_WRITE_GPIO prev_data = *(u8 *)buf; @@ -192,30 +192,30 @@ int fbtft_write_gpio16_wr(struct fbtft_par *par, void *buf, size_t len) data = *(u16 *)buf; /* Start writing by pulling down /WR */ - gpio_set_value(par->gpio.wr, 0); + gpiod_set_value(par->gpio.wr, 0); /* Set data */ #ifndef DO_NOT_OPTIMIZE_FBTFT_WRITE_GPIO if (data == prev_data) { - gpio_set_value(par->gpio.wr, 0); /* used as delay */ + gpiod_set_value(par->gpio.wr, 0); /* used as delay */ } else { for (i = 0; i < 16; i++) { if ((data & 1) != (prev_data & 1)) - gpio_set_value(par->gpio.db[i], - data & 1); + gpiod_set_value(par->gpio.db[i], + data & 1); data >>= 1; prev_data >>= 1; } } #else for (i = 0; i < 16; i++) { - gpio_set_value(par->gpio.db[i], data & 1); + gpiod_set_value(par->gpio.db[i], data & 1); data >>= 1; } #endif /* Pullup /WR */ - gpio_set_value(par->gpio.wr, 1); + gpiod_set_value(par->gpio.wr, 1); #ifndef DO_NOT_OPTIMIZE_FBTFT_WRITE_GPIO prev_data = *(u16 *)buf; diff --git a/drivers/staging/fbtft/fbtft.h b/drivers/staging/fbtft/fbtft.h index ac427baa464a..7fdd3b0851ef 100644 --- a/drivers/staging/fbtft/fbtft.h +++ b/drivers/staging/fbtft/fbtft.h @@ -27,7 +27,7 @@ */ struct fbtft_gpio { char name[FBTFT_GPIO_NAME_SIZE]; - unsigned int gpio; + struct gpio_desc *gpio; }; struct fbtft_par; @@ -134,7 +134,6 @@ struct fbtft_display { */ struct fbtft_platform_data { struct fbtft_display display; - const struct fbtft_gpio *gpios; unsigned int rotate; bool bgr; unsigned int fps; @@ -207,15 +206,15 @@ struct fbtft_par { unsigned int dirty_lines_start; unsigned int dirty_lines_end; struct { - int reset; - int dc; - int rd; - int wr; - int latch; - int cs; - int db[16]; - int led[16]; - int aux[16]; + struct gpio_desc *reset; + struct gpio_desc *dc; + struct gpio_desc *rd; + struct gpio_desc *wr; + struct gpio_desc *latch; + struct gpio_desc *cs; + struct gpio_desc *db[16]; + struct gpio_desc *led[16]; + struct gpio_desc *aux[16]; } gpio; const s16 *init_sequence; struct { diff --git a/drivers/staging/fbtft/fbtft_device.c b/drivers/staging/fbtft/fbtft_device.c index 50e97da993e7..5f6cd0816d58 100644 --- a/drivers/staging/fbtft/fbtft_device.c +++ b/drivers/staging/fbtft/fbtft_device.c @@ -8,7 +8,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <video/mipi_display.h> @@ -45,11 +45,6 @@ static int mode = -1; module_param(mode, int, 0000); MODULE_PARM_DESC(mode, "SPI mode (override device default)"); -static char *gpios; -module_param(gpios, charp, 0000); -MODULE_PARM_DESC(gpios, - "List of gpios. Comma separated with the form: reset:23,dc:24 (when overriding the default, all gpios must be specified)"); - static unsigned int fps; module_param(fps, uint, 0000); MODULE_PARM_DESC(fps, "Frames per second (override driver default)"); @@ -101,7 +96,7 @@ MODULE_PARM_DESC(debug, static unsigned int verbose = 3; module_param(verbose, uint, 0000); MODULE_PARM_DESC(verbose, - "0 silent, >0 show gpios, >1 show devices, >2 show devices before (default=3)"); + "0 silent, >1 show devices, >2 show devices before (default=3)"); struct fbtft_device_display { char *name; @@ -279,12 +274,6 @@ static struct fbtft_device_display displays[] = { .buswidth = 8, .backlight = 1, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 18 }, - {}, - }, .gamma = ADAFRUIT18_GAMMA, } } @@ -302,12 +291,6 @@ static struct fbtft_device_display displays[] = { adafruit18_green_tab_set_addr_win, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 18 }, - {}, - }, .gamma = ADAFRUIT18_GAMMA, } } @@ -323,11 +306,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "led", 23 }, - {}, - }, } } }, { @@ -342,12 +320,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 18 }, - {}, - }, } } }, { @@ -362,12 +334,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 18 }, - {}, - }, } } }, { @@ -380,11 +346,6 @@ static struct fbtft_device_display displays[] = { .display = { .buswidth = 8, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - {}, - }, } } }, { @@ -399,12 +360,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, .init_sequence = cberry28_init_sequence, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 22 }, - { "led", 18 }, - {}, - }, .gamma = CBERRY28_GAMMA, } } @@ -420,9 +375,6 @@ static struct fbtft_device_display displays[] = { .buswidth = 8, .backlight = FBTFT_ONBOARD_BACKLIGHT, }, - .gpios = (const struct fbtft_gpio []) { - {}, - }, }, } } @@ -437,11 +389,6 @@ static struct fbtft_device_display displays[] = { .buswidth = 8, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 13 }, - { "dc", 6 }, - {}, - }, } } }, { @@ -458,11 +405,6 @@ static struct fbtft_device_display displays[] = { .height = 272, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - {}, - }, } } }, { @@ -479,11 +421,6 @@ static struct fbtft_device_display displays[] = { .height = 480, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - {}, - }, } } }, { @@ -496,10 +433,6 @@ static struct fbtft_device_display displays[] = { .display = { .buswidth = 8, }, - .gpios = (const struct fbtft_gpio []) { - { "dc", 24 }, - {}, - }, } } }, { @@ -512,9 +445,6 @@ static struct fbtft_device_display displays[] = { .display = { .buswidth = 9, }, - .gpios = (const struct fbtft_gpio []) { - {}, - }, } } }, { @@ -523,13 +453,6 @@ static struct fbtft_device_display displays[] = { .modalias = "flexfb", .max_speed_hz = 32000000, .mode = SPI_MODE_0, - .platform_data = &(struct fbtft_platform_data) { - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - {}, - }, - } } }, { .name = "flexpfb", @@ -538,24 +461,6 @@ static struct fbtft_device_display displays[] = { .id = 0, .dev = { .release = fbtft_device_pdev_release, - .platform_data = &(struct fbtft_platform_data) { - .gpios = (const struct fbtft_gpio []) { - { "reset", 17 }, - { "dc", 1 }, - { "wr", 0 }, - { "cs", 21 }, - { "db00", 9 }, - { "db01", 11 }, - { "db02", 18 }, - { "db03", 23 }, - { "db04", 24 }, - { "db05", 25 }, - { "db06", 8 }, - { "db07", 7 }, - { "led", 4 }, - {}, - }, - }, } } }, { @@ -570,11 +475,6 @@ static struct fbtft_device_display displays[] = { .backlight = FBTFT_ONBOARD_BACKLIGHT, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 24 }, - { "dc", 25 }, - {}, - }, } } }, { @@ -588,12 +488,6 @@ static struct fbtft_device_display displays[] = { .buswidth = 8, .backlight = 1, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 23 }, - {}, - }, } } }, { @@ -609,11 +503,6 @@ static struct fbtft_device_display displays[] = { }, .startbyte = 0x70, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "led", 18 }, - {}, - }, } } }, { @@ -631,11 +520,6 @@ static struct fbtft_device_display displays[] = { .startbyte = 0x70, .bgr = true, .fps = 50, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "led", 18 }, - {}, - }, .gamma = HY28B_GAMMA, } } @@ -652,12 +536,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 22 }, - {}, - }, } } }, { @@ -673,22 +551,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = false, - .gpios = (const struct fbtft_gpio []) { - /* Wiring for LCD adapter kit */ - { "reset", 7 }, - { "dc", 0 }, /* rev 2: 2 */ - { "wr", 1 }, /* rev 2: 3 */ - { "cs", 8 }, - { "db00", 17 }, - { "db01", 18 }, - { "db02", 21 }, /* rev 2: 27 */ - { "db03", 22 }, - { "db04", 23 }, - { "db05", 24 }, - { "db06", 25 }, - { "db07", 4 }, - {} - }, }, } } @@ -705,9 +567,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - {}, - }, }, } } @@ -723,11 +582,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - {}, - }, } } }, { @@ -743,12 +597,6 @@ static struct fbtft_device_display displays[] = { }, .startbyte = 0x70, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 18 }, - {}, - }, } } }, { @@ -763,11 +611,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "led", 18 }, - {}, - }, } } }, { @@ -777,10 +620,6 @@ static struct fbtft_device_display displays[] = { .max_speed_hz = 4000000, .mode = SPI_MODE_3, .platform_data = &(struct fbtft_platform_data) { - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - {}, - }, } } }, { @@ -793,12 +632,6 @@ static struct fbtft_device_display displays[] = { .display = { .buswidth = 8, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 23 }, - {}, - }, } } }, { @@ -811,12 +644,6 @@ static struct fbtft_device_display displays[] = { .display = { .buswidth = 8, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 23 }, - {}, - }, } } }, { @@ -831,9 +658,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - {}, - }, } } }, { @@ -849,12 +673,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 22 }, - {}, - }, } } }, { @@ -871,10 +689,6 @@ static struct fbtft_device_display displays[] = { .init_sequence = pitft_init_sequence, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "dc", 25 }, - {}, - }, } } }, { @@ -888,11 +702,6 @@ static struct fbtft_device_display displays[] = { .buswidth = 8, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 24 }, - { "dc", 25 }, - {}, - }, .gamma = PIOLED_GAMMA } } @@ -908,12 +717,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 23 }, - { "dc", 24 }, - { "led", 18 }, - {}, - }, } } }, { @@ -928,12 +731,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 23 }, - {}, - }, } } }, { @@ -946,11 +743,6 @@ static struct fbtft_device_display displays[] = { .display = { .buswidth = 8, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - {}, - }, } } }, { @@ -968,9 +760,6 @@ static struct fbtft_device_display displays[] = { .fbtftops.write = write_gpio16_wr_slow, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - {}, - }, }, }, } @@ -988,9 +777,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - {}, - }, }, }, } @@ -1010,9 +796,6 @@ static struct fbtft_device_display displays[] = { fbtft_write_gpio16_wr_latched, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - {}, - }, }, }, } @@ -1028,11 +811,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - {}, - }, } } }, { @@ -1044,9 +822,6 @@ static struct fbtft_device_display displays[] = { .chip_select = 0, .mode = SPI_MODE_0, .platform_data = &(struct fbtft_platform_data) { - .gpios = (const struct fbtft_gpio []) { - {}, - }, } } }, { @@ -1059,11 +834,6 @@ static struct fbtft_device_display displays[] = { .display = { .buswidth = 8, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 24 }, - { "dc", 25 }, - {}, - }, } } }, { @@ -1078,12 +848,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 18 }, - {}, - }, } } }, { @@ -1098,12 +862,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 25 }, - { "dc", 24 }, - { "led", 18 }, - {}, - }, } } }, { @@ -1118,12 +876,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 15 }, - { "dc", 25 }, - { "led_", 18 }, - {}, - }, } } }, { @@ -1138,12 +890,6 @@ static struct fbtft_device_display displays[] = { .backlight = 1, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 15 }, - { "dc", 25 }, - { "led_", 18 }, - {}, - }, } } }, { @@ -1156,11 +902,6 @@ static struct fbtft_device_display displays[] = { .display = { .buswidth = 8, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 24 }, - { "dc", 25 }, - {}, - }, } } }, { @@ -1177,11 +918,6 @@ static struct fbtft_device_display displays[] = { waveshare32b_init_sequence, }, .bgr = true, - .gpios = (const struct fbtft_gpio []) { - { "reset", 27 }, - { "dc", 22 }, - {}, - }, } } }, { @@ -1194,11 +930,6 @@ static struct fbtft_device_display displays[] = { .display = { .buswidth = 8, }, - .gpios = (const struct fbtft_gpio []) { - { "reset", 24 }, - { "dc", 25 }, - {}, - }, } } }, { @@ -1211,9 +942,6 @@ static struct fbtft_device_display displays[] = { .max_speed_hz = 0, .mode = SPI_MODE_0, .platform_data = &(struct fbtft_platform_data) { - .gpios = (const struct fbtft_gpio []) { - {}, - }, } }, .pdev = &(struct platform_device) { @@ -1222,9 +950,6 @@ static struct fbtft_device_display displays[] = { .dev = { .release = fbtft_device_pdev_release, .platform_data = &(struct fbtft_platform_data) { - .gpios = (const struct fbtft_gpio []) { - {}, - }, }, }, }, @@ -1246,30 +971,30 @@ static int write_gpio16_wr_slow(struct fbtft_par *par, void *buf, size_t len) data = *(u16 *)buf; /* Start writing by pulling down /WR */ - gpio_set_value(par->gpio.wr, 0); + gpiod_set_value(par->gpio.wr, 0); /* Set data */ #ifndef DO_NOT_OPTIMIZE_FBTFT_WRITE_GPIO if (data == prev_data) { - gpio_set_value(par->gpio.wr, 0); /* used as delay */ + gpiod_set_value(par->gpio.wr, 0); /* used as delay */ } else { for (i = 0; i < 16; i++) { if ((data & 1) != (prev_data & 1)) - gpio_set_value(par->gpio.db[i], - data & 1); + gpiod_set_value(par->gpio.db[i], + data & 1); data >>= 1; prev_data >>= 1; } } #else for (i = 0; i < 16; i++) { - gpio_set_value(par->gpio.db[i], data & 1); + gpiod_set_value(par->gpio.db[i], data & 1); data >>= 1; } #endif /* Pullup /WR */ - gpio_set_value(par->gpio.wr, 1); + gpiod_set_value(par->gpio.wr, 1); #ifndef DO_NOT_OPTIMIZE_FBTFT_WRITE_GPIO prev_data = *(u16 *)buf; @@ -1289,9 +1014,6 @@ static void adafruit18_green_tab_set_addr_win(struct fbtft_par *par, write_reg(par, 0x2C); } -/* used if gpios parameter is present */ -static struct fbtft_gpio fbtft_device_param_gpios[MAX_GPIOS + 1] = { }; - static void fbtft_device_pdev_release(struct device *dev) { /* Needed to silence this message: @@ -1382,11 +1104,8 @@ static int __init fbtft_device_init(void) { struct spi_board_info *spi = NULL; struct fbtft_platform_data *pdata; - const struct fbtft_gpio *gpio = NULL; - char *p_gpio, *p_name, *p_num; bool found = false; int i = 0; - long val; int ret = 0; if (!name) { @@ -1404,38 +1123,6 @@ static int __init fbtft_device_init(void) return -EINVAL; } - /* parse module parameter: gpios */ - while ((p_gpio = strsep(&gpios, ","))) { - if (!strchr(p_gpio, ':')) { - pr_err("error: missing ':' in gpios parameter: %s\n", - p_gpio); - return -EINVAL; - } - p_num = p_gpio; - p_name = strsep(&p_num, ":"); - if (!p_name || !p_num) { - pr_err("something bad happened parsing gpios parameter: %s\n", - p_gpio); - return -EINVAL; - } - ret = kstrtol(p_num, 10, &val); - if (ret) { - pr_err("could not parse number in gpios parameter: %s:%s\n", - p_name, p_num); - return -EINVAL; - } - strncpy(fbtft_device_param_gpios[i].name, p_name, - FBTFT_GPIO_NAME_SIZE - 1); - fbtft_device_param_gpios[i++].gpio = (int)val; - if (i == MAX_GPIOS) { - pr_err("gpios parameter: exceeded max array size: %d\n", - MAX_GPIOS); - return -EINVAL; - } - } - if (fbtft_device_param_gpios[0].name[0]) - gpio = fbtft_device_param_gpios; - if (verbose > 2) { pr_spi_devices(); /* print list of registered SPI devices */ pr_p_devices(); /* print list of 'fb' platform devices */ @@ -1455,7 +1142,7 @@ static int __init fbtft_device_init(void) } /* name=list lists all supported displays */ - if (strncmp(name, "list", FBTFT_GPIO_NAME_SIZE) == 0) { + if (strcmp(name, "list") == 0) { pr_info("Supported displays:\n"); for (i = 0; i < ARRAY_SIZE(displays); i++) @@ -1516,8 +1203,6 @@ static int __init fbtft_device_init(void) pdata->txbuflen = txbuflen; if (init_num) pdata->display.init_sequence = init; - if (gpio) - pdata->gpios = gpio; if (custom) { pdata->display.width = width; pdata->display.height = height; @@ -1549,19 +1234,6 @@ static int __init fbtft_device_init(void) return -EINVAL; } - if (verbose && pdata && pdata->gpios) { - gpio = pdata->gpios; - pr_info("GPIOS used by '%s':\n", name); - found = false; - while (verbose && gpio->name[0]) { - pr_info("'%s' = GPIO%d\n", gpio->name, gpio->gpio); - gpio++; - found = true; - } - if (!found) - pr_info("(none)\n"); - } - if (spi_device && (verbose > 1)) pr_spi_devices(); if (p_device && (verbose > 1)) diff --git a/drivers/staging/fbtft/flexfb.c b/drivers/staging/fbtft/flexfb.c index 2af474469e7d..c5fa59105a43 100644 --- a/drivers/staging/fbtft/flexfb.c +++ b/drivers/staging/fbtft/flexfb.c @@ -9,7 +9,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/vmalloc.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/spi/spi.h> #include <linux/delay.h> @@ -521,7 +521,7 @@ static int flexfb_verify_gpios_dc(struct fbtft_par *par) { fbtft_par_dbg(DEBUG_VERIFY_GPIOS, par, "%s()\n", __func__); - if (par->gpio.dc < 0) { + if (!par->gpio.dc) { dev_err(par->info->device, "Missing info about 'dc' gpio. Aborting.\n"); return -EINVAL; @@ -537,22 +537,22 @@ static int flexfb_verify_gpios_db(struct fbtft_par *par) fbtft_par_dbg(DEBUG_VERIFY_GPIOS, par, "%s()\n", __func__); - if (par->gpio.dc < 0) { + if (!par->gpio.dc) { dev_err(par->info->device, "Missing info about 'dc' gpio. Aborting.\n"); return -EINVAL; } - if (par->gpio.wr < 0) { + if (!par->gpio.wr) { dev_err(par->info->device, "Missing info about 'wr' gpio. Aborting.\n"); return -EINVAL; } - if (latched && (par->gpio.latch < 0)) { + if (latched && !par->gpio.latch) { dev_err(par->info->device, "Missing info about 'latch' gpio. Aborting.\n"); return -EINVAL; } if (latched) num_db = buswidth / 2; for (i = 0; i < num_db; i++) { - if (par->gpio.db[i] < 0) { + if (!par->gpio.db[i]) { dev_err(par->info->device, "Missing info about 'db%02d' gpio. Aborting.\n", i); diff --git a/drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h b/drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h index da744f2b0ee6..14b974defa3a 100644 --- a/drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h +++ b/drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright 2014-2016 Freescale Semiconductor Inc. * Copyright 2017-2018 NXP diff --git a/drivers/staging/fsl-dpaa2/ethsw/dpsw.h b/drivers/staging/fsl-dpaa2/ethsw/dpsw.h index db43fa3782b8..25635259ce44 100644 --- a/drivers/staging/fsl-dpaa2/ethsw/dpsw.h +++ b/drivers/staging/fsl-dpaa2/ethsw/dpsw.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright 2014-2016 Freescale Semiconductor Inc. * Copyright 2017-2018 NXP diff --git a/drivers/staging/fsl-dpaa2/ethsw/ethsw.c b/drivers/staging/fsl-dpaa2/ethsw/ethsw.c index 7a7ca67822c5..ad577beeb052 100644 --- a/drivers/staging/fsl-dpaa2/ethsw/ethsw.c +++ b/drivers/staging/fsl-dpaa2/ethsw/ethsw.c @@ -505,6 +505,17 @@ static netdev_tx_t port_dropframe(struct sk_buff *skb, return NETDEV_TX_OK; } +static int swdev_get_port_parent_id(struct net_device *dev, + struct netdev_phys_item_id *ppid) +{ + struct ethsw_port_priv *port_priv = netdev_priv(dev); + + ppid->id_len = 1; + ppid->id[0] = port_priv->ethsw_data->dev_id; + + return 0; +} + static const struct net_device_ops ethsw_port_ops = { .ndo_open = port_open, .ndo_stop = port_stop, @@ -515,6 +526,7 @@ static const struct net_device_ops ethsw_port_ops = { .ndo_get_offload_stats = port_get_offload_stats, .ndo_start_xmit = port_dropframe, + .ndo_get_port_parent_id = swdev_get_port_parent_id, }; static void ethsw_links_state_update(struct ethsw_core *ethsw) @@ -628,31 +640,6 @@ static void ethsw_teardown_irqs(struct fsl_mc_device *sw_dev) fsl_mc_free_irqs(sw_dev); } -static int swdev_port_attr_get(struct net_device *netdev, - struct switchdev_attr *attr) -{ - struct ethsw_port_priv *port_priv = netdev_priv(netdev); - - switch (attr->id) { - case SWITCHDEV_ATTR_ID_PORT_PARENT_ID: - attr->u.ppid.id_len = 1; - attr->u.ppid.id[0] = port_priv->ethsw_data->dev_id; - break; - case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS: - attr->u.brport_flags = - (port_priv->ethsw_data->learning ? BR_LEARNING : 0) | - (port_priv->flood ? BR_FLOOD : 0); - break; - case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS_SUPPORT: - attr->u.brport_flags_support = BR_LEARNING | BR_FLOOD; - break; - default: - return -EOPNOTSUPP; - } - - return 0; -} - static int port_attr_stp_state_set(struct net_device *netdev, struct switchdev_trans *trans, u8 state) @@ -665,6 +652,16 @@ static int port_attr_stp_state_set(struct net_device *netdev, return ethsw_port_set_stp_state(port_priv, state); } +static int port_attr_br_flags_pre_set(struct net_device *netdev, + struct switchdev_trans *trans, + unsigned long flags) +{ + if (flags & ~(BR_LEARNING | BR_FLOOD)) + return -EINVAL; + + return 0; +} + static int port_attr_br_flags_set(struct net_device *netdev, struct switchdev_trans *trans, unsigned long flags) @@ -697,6 +694,10 @@ static int swdev_port_attr_set(struct net_device *netdev, err = port_attr_stp_state_set(netdev, trans, attr->u.stp_state); break; + case SWITCHDEV_ATTR_ID_PORT_PRE_BRIDGE_FLAGS: + err = port_attr_br_flags_pre_set(netdev, trans, + attr->u.brport_flags); + break; case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS: err = port_attr_br_flags_set(netdev, trans, attr->u.brport_flags); @@ -719,9 +720,6 @@ static int port_vlans_add(struct net_device *netdev, struct ethsw_port_priv *port_priv = netdev_priv(netdev); int vid, err = 0; - if (netif_is_bridge_master(vlan->obj.orig_dev)) - return -EOPNOTSUPP; - if (switchdev_trans_ph_prepare(trans)) return 0; @@ -927,12 +925,18 @@ static int swdev_port_obj_del(struct net_device *netdev, return err; } -static const struct switchdev_ops ethsw_port_switchdev_ops = { - .switchdev_port_attr_get = swdev_port_attr_get, - .switchdev_port_attr_set = swdev_port_attr_set, - .switchdev_port_obj_add = swdev_port_obj_add, - .switchdev_port_obj_del = swdev_port_obj_del, -}; +static int +ethsw_switchdev_port_attr_set_event(struct net_device *netdev, + struct switchdev_notifier_port_attr_info *port_attr_info) +{ + int err; + + err = swdev_port_attr_set(netdev, port_attr_info->attr, + port_attr_info->trans); + + port_attr_info->handled = true; + return notifier_from_errno(err); +} /* For the moment, only flood setting needs to be updated */ static int port_bridge_join(struct net_device *netdev, @@ -972,6 +976,11 @@ static int port_bridge_leave(struct net_device *netdev) return err; } +static bool ethsw_port_dev_check(const struct net_device *netdev) +{ + return netdev->netdev_ops == ðsw_port_ops; +} + static int port_netdevice_event(struct notifier_block *unused, unsigned long event, void *ptr) { @@ -980,7 +989,7 @@ static int port_netdevice_event(struct notifier_block *unused, struct net_device *upper_dev; int err = 0; - if (netdev->netdev_ops != ðsw_port_ops) + if (!ethsw_port_dev_check(netdev)) return NOTIFY_DONE; /* Handle just upper dev link/unlink for the moment */ @@ -1047,6 +1056,12 @@ static int port_switchdev_event(struct notifier_block *unused, struct ethsw_switchdev_event_work *switchdev_work; struct switchdev_notifier_fdb_info *fdb_info = ptr; + if (!ethsw_port_dev_check(dev)) + return NOTIFY_DONE; + + if (event == SWITCHDEV_PORT_ATTR_SET) + return ethsw_switchdev_port_attr_set_event(dev, ptr); + switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC); if (!switchdev_work) return NOTIFY_BAD; @@ -1083,10 +1098,53 @@ err_addr_alloc: return NOTIFY_BAD; } +static int +ethsw_switchdev_port_obj_event(unsigned long event, struct net_device *netdev, + struct switchdev_notifier_port_obj_info *port_obj_info) +{ + int err = -EOPNOTSUPP; + + switch (event) { + case SWITCHDEV_PORT_OBJ_ADD: + err = swdev_port_obj_add(netdev, port_obj_info->obj, + port_obj_info->trans); + break; + case SWITCHDEV_PORT_OBJ_DEL: + err = swdev_port_obj_del(netdev, port_obj_info->obj); + break; + } + + port_obj_info->handled = true; + return notifier_from_errno(err); +} + +static int port_switchdev_blocking_event(struct notifier_block *unused, + unsigned long event, void *ptr) +{ + struct net_device *dev = switchdev_notifier_info_to_dev(ptr); + + if (!ethsw_port_dev_check(dev)) + return NOTIFY_DONE; + + switch (event) { + case SWITCHDEV_PORT_OBJ_ADD: /* fall through */ + case SWITCHDEV_PORT_OBJ_DEL: + return ethsw_switchdev_port_obj_event(event, dev, ptr); + case SWITCHDEV_PORT_ATTR_SET: + return ethsw_switchdev_port_attr_set_event(dev, ptr); + } + + return NOTIFY_DONE; +} + static struct notifier_block port_switchdev_nb = { .notifier_call = port_switchdev_event, }; +static struct notifier_block port_switchdev_blocking_nb = { + .notifier_call = port_switchdev_blocking_event, +}; + static int ethsw_register_notifier(struct device *dev) { int err; @@ -1103,8 +1161,16 @@ static int ethsw_register_notifier(struct device *dev) goto err_switchdev_nb; } + err = register_switchdev_blocking_notifier(&port_switchdev_blocking_nb); + if (err) { + dev_err(dev, "Failed to register switchdev blocking notifier\n"); + goto err_switchdev_blocking_nb; + } + return 0; +err_switchdev_blocking_nb: + unregister_switchdev_notifier(&port_switchdev_nb); err_switchdev_nb: unregister_netdevice_notifier(&port_nb); return err; @@ -1123,7 +1189,7 @@ static int ethsw_open(struct ethsw_core *ethsw) for (i = 0; i < ethsw->sw_attr.num_ifs; i++) { port_priv = ethsw->ports[i]; - err = dev_open(port_priv->netdev); + err = dev_open(port_priv->netdev, NULL); if (err) { netdev_err(port_priv->netdev, "dev_open err %d\n", err); return err; @@ -1291,8 +1357,15 @@ static int ethsw_port_init(struct ethsw_port_priv *port_priv, u16 port) static void ethsw_unregister_notifier(struct device *dev) { + struct notifier_block *nb; int err; + nb = &port_switchdev_blocking_nb; + err = unregister_switchdev_blocking_notifier(nb); + if (err) + dev_err(dev, + "Failed to unregister switchdev blocking notifier (%d)\n", err); + err = unregister_switchdev_notifier(&port_switchdev_nb); if (err) dev_err(dev, @@ -1378,7 +1451,6 @@ static int ethsw_probe_port(struct ethsw_core *ethsw, u16 port_idx) SET_NETDEV_DEV(port_netdev, dev); port_netdev->netdev_ops = ðsw_port_ops; port_netdev->ethtool_ops = ðsw_port_ethtool_ops; - port_netdev->switchdev_ops = ðsw_port_switchdev_ops; /* Set MTU limits */ port_netdev->min_mtu = ETH_MIN_MTU; diff --git a/drivers/staging/fsl-dpaa2/ethsw/ethsw.h b/drivers/staging/fsl-dpaa2/ethsw/ethsw.h index 069c99bfba74..c48783680a05 100644 --- a/drivers/staging/fsl-dpaa2/ethsw/ethsw.h +++ b/drivers/staging/fsl-dpaa2/ethsw/ethsw.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * DPAA2 Ethernet Switch declarations * diff --git a/drivers/staging/fwserial/fwserial.c b/drivers/staging/fwserial/fwserial.c index 173f451b86b7..a1b90ea7fcb8 100644 --- a/drivers/staging/fwserial/fwserial.c +++ b/drivers/staging/fwserial/fwserial.c @@ -1213,6 +1213,7 @@ static int get_serial_info(struct tty_struct *tty, struct serial_struct *ss) { struct fwtty_port *port = tty->driver_data; + mutex_lock(&port->port.mutex); ss->type = PORT_UNKNOWN; ss->line = port->port.tty->index; @@ -1458,7 +1459,7 @@ static int fwtty_proc_show(struct seq_file *m, void *v) return 0; } -static int fwtty_debugfs_stats_show(struct seq_file *m, void *v) +static int fwtty_stats_show(struct seq_file *m, void *v) { struct fw_serial *serial = m->private; struct fwtty_port *port; @@ -1476,8 +1477,9 @@ static int fwtty_debugfs_stats_show(struct seq_file *m, void *v) } return 0; } +DEFINE_SHOW_ATTRIBUTE(fwtty_stats); -static int fwtty_debugfs_peers_show(struct seq_file *m, void *v) +static int fwtty_peers_show(struct seq_file *m, void *v) { struct fw_serial *serial = m->private; struct fwtty_peer *peer; @@ -1491,32 +1493,7 @@ static int fwtty_debugfs_peers_show(struct seq_file *m, void *v) rcu_read_unlock(); return 0; } - -static int fwtty_stats_open(struct inode *inode, struct file *fp) -{ - return single_open(fp, fwtty_debugfs_stats_show, inode->i_private); -} - -static int fwtty_peers_open(struct inode *inode, struct file *fp) -{ - return single_open(fp, fwtty_debugfs_peers_show, inode->i_private); -} - -static const struct file_operations fwtty_stats_fops = { - .owner = THIS_MODULE, - .open = fwtty_stats_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations fwtty_peers_fops = { - .owner = THIS_MODULE, - .open = fwtty_peers_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; +DEFINE_SHOW_ATTRIBUTE(fwtty_peers); static const struct tty_port_operations fwtty_port_ops = { .dtr_rts = fwtty_port_dtr_rts, diff --git a/drivers/staging/gasket/gasket_interrupt.c b/drivers/staging/gasket/gasket_interrupt.c index 49d47afad64f..ff61b782df30 100644 --- a/drivers/staging/gasket/gasket_interrupt.c +++ b/drivers/staging/gasket/gasket_interrupt.c @@ -9,7 +9,6 @@ #include <linux/device.h> #include <linux/interrupt.h> #include <linux/printk.h> -#include <linux/version.h> #ifdef GASKET_KERNEL_TRACE_SUPPORT #define CREATE_TRACE_POINTS #include <trace/events/gasket_interrupt.h> @@ -184,7 +183,7 @@ gasket_interrupt_msix_init(struct gasket_interrupt_data *interrupt_data) interrupt_data->msix_entries = kcalloc(interrupt_data->num_interrupts, - sizeof(struct msix_entry), GFP_KERNEL); + sizeof(*interrupt_data->msix_entries), GFP_KERNEL); if (!interrupt_data->msix_entries) return -ENOMEM; @@ -322,8 +321,7 @@ int gasket_interrupt_init(struct gasket_dev *gasket_dev) const struct gasket_driver_desc *driver_desc = gasket_get_driver_desc(gasket_dev); - interrupt_data = kzalloc(sizeof(struct gasket_interrupt_data), - GFP_KERNEL); + interrupt_data = kzalloc(sizeof(*interrupt_data), GFP_KERNEL); if (!interrupt_data) return -ENOMEM; gasket_dev->interrupt_data = interrupt_data; @@ -336,17 +334,17 @@ int gasket_interrupt_init(struct gasket_dev *gasket_dev) interrupt_data->pack_width = driver_desc->interrupt_pack_width; interrupt_data->num_configured = 0; - interrupt_data->eventfd_ctxs = kcalloc(driver_desc->num_interrupts, - sizeof(struct eventfd_ctx *), - GFP_KERNEL); + interrupt_data->eventfd_ctxs = + kcalloc(driver_desc->num_interrupts, + sizeof(*interrupt_data->eventfd_ctxs), GFP_KERNEL); if (!interrupt_data->eventfd_ctxs) { kfree(interrupt_data); return -ENOMEM; } - interrupt_data->interrupt_counts = kcalloc(driver_desc->num_interrupts, - sizeof(ulong), - GFP_KERNEL); + interrupt_data->interrupt_counts = + kcalloc(driver_desc->num_interrupts, + sizeof(*interrupt_data->interrupt_counts), GFP_KERNEL); if (!interrupt_data->interrupt_counts) { kfree(interrupt_data->eventfd_ctxs); kfree(interrupt_data); diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index b7d460cf15fb..26755d9ca41d 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -1088,9 +1088,9 @@ void gasket_page_table_reset(struct gasket_page_table *pg_tbl) } /* See gasket_page_table.h for description. */ -int gasket_page_table_lookup_page( - struct gasket_page_table *pg_tbl, ulong dev_addr, struct page **ppage, - ulong *poffset) +int gasket_page_table_lookup_page(struct gasket_page_table *pg_tbl, + ulong dev_addr, struct page **ppage, + ulong *poffset) { uint page_num; struct gasket_page_table_entry *pte; @@ -1134,9 +1134,9 @@ fail: } /* See gasket_page_table.h for description. */ -bool gasket_page_table_are_addrs_bad( - struct gasket_page_table *pg_tbl, ulong host_addr, ulong dev_addr, - ulong bytes) +bool gasket_page_table_are_addrs_bad(struct gasket_page_table *pg_tbl, + ulong host_addr, ulong dev_addr, + ulong bytes) { if (host_addr & (PAGE_SIZE - 1)) { dev_err(pg_tbl->device, @@ -1150,8 +1150,8 @@ bool gasket_page_table_are_addrs_bad( EXPORT_SYMBOL(gasket_page_table_are_addrs_bad); /* See gasket_page_table.h for description. */ -bool gasket_page_table_is_dev_addr_bad( - struct gasket_page_table *pg_tbl, ulong dev_addr, ulong bytes) +bool gasket_page_table_is_dev_addr_bad(struct gasket_page_table *pg_tbl, + ulong dev_addr, ulong bytes) { uint num_pages = bytes / PAGE_SIZE; @@ -1226,9 +1226,8 @@ int gasket_page_table_system_status(struct gasket_page_table *page_table) } /* Record the host_addr to coherent dma memory mapping. */ -int gasket_set_user_virt( - struct gasket_dev *gasket_dev, u64 size, dma_addr_t dma_address, - ulong vma) +int gasket_set_user_virt(struct gasket_dev *gasket_dev, u64 size, + dma_addr_t dma_address, ulong vma) { int j; struct gasket_page_table *pg_tbl; @@ -1278,7 +1277,8 @@ int gasket_alloc_coherent_memory(struct gasket_dev *gasket_dev, u64 size, /* allocate the physical memory block */ gasket_dev->page_table[index]->coherent_pages = - kcalloc(num_pages, sizeof(struct gasket_coherent_page_entry), + kcalloc(num_pages, + sizeof(*gasket_dev->page_table[index]->coherent_pages), GFP_KERNEL); if (!gasket_dev->page_table[index]->coherent_pages) goto nomem; @@ -1345,8 +1345,7 @@ int gasket_free_coherent_memory(struct gasket_dev *gasket_dev, u64 size, } /* Release all coherent memory. */ -void gasket_free_coherent_memory_all( - struct gasket_dev *gasket_dev, u64 index) +void gasket_free_coherent_memory_all(struct gasket_dev *gasket_dev, u64 index) { if (!gasket_dev->page_table[index]) return; diff --git a/drivers/staging/goldfish/goldfish_audio.c b/drivers/staging/goldfish/goldfish_audio.c index 3a75df1d2a0a..24a738238f9f 100644 --- a/drivers/staging/goldfish/goldfish_audio.c +++ b/drivers/staging/goldfish/goldfish_audio.c @@ -1,18 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * drivers/misc/goldfish_audio.c * * Copyright (C) 2007 Google, Inc. * Copyright (C) 2012 Intel, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * */ #include <linux/module.h> diff --git a/drivers/staging/greybus/Kconfig b/drivers/staging/greybus/Kconfig index ab096bcef98c..b571e4e8060b 100644 --- a/drivers/staging/greybus/Kconfig +++ b/drivers/staging/greybus/Kconfig @@ -148,6 +148,7 @@ if GREYBUS_BRIDGED_PHY config GREYBUS_GPIO tristate "Greybus GPIO Bridged PHY driver" depends on GPIOLIB + select GPIOLIB_IRQCHIP ---help--- Select this option if you have a device that follows the Greybus GPIO Bridged PHY Class specification. diff --git a/drivers/staging/greybus/TODO b/drivers/staging/greybus/TODO index 3b90a5711998..31f1f2cb401c 100644 --- a/drivers/staging/greybus/TODO +++ b/drivers/staging/greybus/TODO @@ -1,5 +1,3 @@ * Convert all uses of the old GPIO API from <linux/gpio.h> to the GPIO descriptor API in <linux/gpio/consumer.h> and look up GPIO lines from device tree or ACPI. -* Convert the GPIO driver to use the GPIO irqchip library - GPIOLIB_IRQCHIP instead of reimplementing the same. diff --git a/drivers/staging/greybus/arche-apb-ctrl.c b/drivers/staging/greybus/arche-apb-ctrl.c index cc8d6fc831b4..bbf3ba744fc4 100644 --- a/drivers/staging/greybus/arche-apb-ctrl.c +++ b/drivers/staging/greybus/arche-apb-ctrl.c @@ -8,9 +8,8 @@ #include <linux/clk.h> #include <linux/delay.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/interrupt.h> -#include <linux/of_gpio.h> #include <linux/of_irq.h> #include <linux/module.h> #include <linux/pinctrl/consumer.h> @@ -20,17 +19,16 @@ #include <linux/spinlock.h> #include "arche_platform.h" - static void apb_bootret_deassert(struct device *dev); struct arche_apb_ctrl_drvdata { /* Control GPIO signals to and from AP <=> AP Bridges */ - int resetn_gpio; - int boot_ret_gpio; - int pwroff_gpio; - int wake_in_gpio; - int wake_out_gpio; - int pwrdn_gpio; + struct gpio_desc *resetn; + struct gpio_desc *boot_ret; + struct gpio_desc *pwroff; + struct gpio_desc *wake_in; + struct gpio_desc *wake_out; + struct gpio_desc *pwrdn; enum arche_platform_state state; bool init_disabled; @@ -38,28 +36,28 @@ struct arche_apb_ctrl_drvdata { struct regulator *vcore; struct regulator *vio; - int clk_en_gpio; + struct gpio_desc *clk_en; struct clk *clk; struct pinctrl *pinctrl; struct pinctrl_state *pin_default; /* V2: SPI Bus control */ - int spi_en_gpio; + struct gpio_desc *spi_en; bool spi_en_polarity_high; }; /* * Note that these low level api's are active high */ -static inline void deassert_reset(unsigned int gpio) +static inline void deassert_reset(struct gpio_desc *gpio) { - gpio_set_value(gpio, 1); + gpiod_set_raw_value(gpio, 1); } -static inline void assert_reset(unsigned int gpio) +static inline void assert_reset(struct gpio_desc *gpio) { - gpio_set_value(gpio, 0); + gpiod_set_raw_value(gpio, 0); } /* @@ -76,11 +74,10 @@ static int coldboot_seq(struct platform_device *pdev) return 0; /* Hold APB in reset state */ - assert_reset(apb->resetn_gpio); + assert_reset(apb->resetn); - if (apb->state == ARCHE_PLATFORM_STATE_FW_FLASHING && - gpio_is_valid(apb->spi_en_gpio)) - devm_gpio_free(dev, apb->spi_en_gpio); + if (apb->state == ARCHE_PLATFORM_STATE_FW_FLASHING && apb->spi_en) + devm_gpiod_put(dev, apb->spi_en); /* Enable power to APB */ if (!IS_ERR(apb->vcore)) { @@ -102,13 +99,13 @@ static int coldboot_seq(struct platform_device *pdev) apb_bootret_deassert(dev); /* On DB3 clock was not mandatory */ - if (gpio_is_valid(apb->clk_en_gpio)) - gpio_set_value(apb->clk_en_gpio, 1); + if (apb->clk_en) + gpiod_set_value(apb->clk_en, 1); usleep_range(100, 200); /* deassert reset to APB : Active-low signal */ - deassert_reset(apb->resetn_gpio); + deassert_reset(apb->resetn); apb->state = ARCHE_PLATFORM_STATE_ACTIVE; @@ -137,25 +134,25 @@ static int fw_flashing_seq(struct platform_device *pdev) return ret; } - if (gpio_is_valid(apb->spi_en_gpio)) { + if (apb->spi_en) { unsigned long flags; if (apb->spi_en_polarity_high) - flags = GPIOF_OUT_INIT_HIGH; + flags = GPIOD_OUT_HIGH; else - flags = GPIOF_OUT_INIT_LOW; + flags = GPIOD_OUT_LOW; - ret = devm_gpio_request_one(dev, apb->spi_en_gpio, - flags, "apb_spi_en"); - if (ret) { - dev_err(dev, "Failed requesting SPI bus en gpio %d\n", - apb->spi_en_gpio); + apb->spi_en = devm_gpiod_get(dev, "spi-en", flags); + if (IS_ERR(apb->spi_en)) { + ret = PTR_ERR(apb->spi_en); + dev_err(dev, "Failed requesting SPI bus en GPIO: %d\n", + ret); return ret; } } /* for flashing device should be in reset state */ - assert_reset(apb->resetn_gpio); + assert_reset(apb->resetn); apb->state = ARCHE_PLATFORM_STATE_FW_FLASHING; return 0; @@ -177,9 +174,8 @@ static int standby_boot_seq(struct platform_device *pdev) apb->state == ARCHE_PLATFORM_STATE_OFF) return 0; - if (apb->state == ARCHE_PLATFORM_STATE_FW_FLASHING && - gpio_is_valid(apb->spi_en_gpio)) - devm_gpio_free(dev, apb->spi_en_gpio); + if (apb->state == ARCHE_PLATFORM_STATE_FW_FLASHING && apb->spi_en) + devm_gpiod_put(dev, apb->spi_en); /* * As per WDM spec, do nothing @@ -202,13 +198,12 @@ static void poweroff_seq(struct platform_device *pdev) if (apb->init_disabled || apb->state == ARCHE_PLATFORM_STATE_OFF) return; - if (apb->state == ARCHE_PLATFORM_STATE_FW_FLASHING && - gpio_is_valid(apb->spi_en_gpio)) - devm_gpio_free(dev, apb->spi_en_gpio); + if (apb->state == ARCHE_PLATFORM_STATE_FW_FLASHING && apb->spi_en) + devm_gpiod_put(dev, apb->spi_en); /* disable the clock */ - if (gpio_is_valid(apb->clk_en_gpio)) - gpio_set_value(apb->clk_en_gpio, 0); + if (apb->clk_en) + gpiod_set_value(apb->clk_en, 0); if (!IS_ERR(apb->vcore) && regulator_is_enabled(apb->vcore) > 0) regulator_disable(apb->vcore); @@ -217,7 +212,7 @@ static void poweroff_seq(struct platform_device *pdev) regulator_disable(apb->vio); /* As part of exit, put APB back in reset state */ - assert_reset(apb->resetn_gpio); + assert_reset(apb->resetn); apb->state = ARCHE_PLATFORM_STATE_OFF; /* TODO: May have to send an event to SVC about this exit */ @@ -227,7 +222,7 @@ static void apb_bootret_deassert(struct device *dev) { struct arche_apb_ctrl_drvdata *apb = dev_get_drvdata(dev); - gpio_set_value(apb->boot_ret_gpio, 0); + gpiod_set_value(apb->boot_ret, 0); } int apb_ctrl_coldboot(struct device *dev) @@ -323,66 +318,44 @@ static int apb_ctrl_get_devtree_data(struct platform_device *pdev, struct arche_apb_ctrl_drvdata *apb) { struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; int ret; - apb->resetn_gpio = of_get_named_gpio(np, "reset-gpios", 0); - if (apb->resetn_gpio < 0) { - dev_err(dev, "failed to get reset gpio\n"); - return apb->resetn_gpio; - } - ret = devm_gpio_request_one(dev, apb->resetn_gpio, - GPIOF_OUT_INIT_LOW, "apb-reset"); - if (ret) { - dev_err(dev, "Failed requesting reset gpio %d\n", - apb->resetn_gpio); + apb->resetn = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(apb->resetn)) { + ret = PTR_ERR(apb->resetn); + dev_err(dev, "Failed requesting reset GPIO: %d\n", ret); return ret; } - apb->boot_ret_gpio = of_get_named_gpio(np, "boot-ret-gpios", 0); - if (apb->boot_ret_gpio < 0) { - dev_err(dev, "failed to get boot retention gpio\n"); - return apb->boot_ret_gpio; - } - ret = devm_gpio_request_one(dev, apb->boot_ret_gpio, - GPIOF_OUT_INIT_LOW, "boot retention"); - if (ret) { - dev_err(dev, "Failed requesting bootret gpio %d\n", - apb->boot_ret_gpio); + apb->boot_ret = devm_gpiod_get(dev, "boot-ret", GPIOD_OUT_LOW); + if (IS_ERR(apb->boot_ret)) { + ret = PTR_ERR(apb->boot_ret); + dev_err(dev, "Failed requesting bootret GPIO: %d\n", ret); return ret; } /* It's not mandatory to support power management interface */ - apb->pwroff_gpio = of_get_named_gpio(np, "pwr-off-gpios", 0); - if (apb->pwroff_gpio < 0) { - dev_err(dev, "failed to get power off gpio\n"); - return apb->pwroff_gpio; - } - ret = devm_gpio_request_one(dev, apb->pwroff_gpio, - GPIOF_IN, "pwroff_n"); - if (ret) { - dev_err(dev, "Failed requesting pwroff_n gpio %d\n", - apb->pwroff_gpio); + apb->pwroff = devm_gpiod_get_optional(dev, "pwr-off", GPIOD_IN); + if (IS_ERR(apb->pwroff)) { + ret = PTR_ERR(apb->pwroff); + dev_err(dev, "Failed requesting pwroff_n GPIO: %d\n", ret); return ret; } /* Do not make clock mandatory as of now (for DB3) */ - apb->clk_en_gpio = of_get_named_gpio(np, "clock-en-gpio", 0); - if (apb->clk_en_gpio < 0) { - dev_warn(dev, "failed to get clock en gpio\n"); - } else if (gpio_is_valid(apb->clk_en_gpio)) { - ret = devm_gpio_request_one(dev, apb->clk_en_gpio, - GPIOF_OUT_INIT_LOW, "apb_clk_en"); - if (ret) { - dev_warn(dev, "Failed requesting APB clock en gpio %d\n", - apb->clk_en_gpio); - return ret; - } + apb->clk_en = devm_gpiod_get_optional(dev, "clock-en", GPIOD_OUT_LOW); + if (IS_ERR(apb->clk_en)) { + ret = PTR_ERR(apb->clk_en); + dev_err(dev, "Failed requesting APB clock en GPIO: %d\n", ret); + return ret; } - apb->pwrdn_gpio = of_get_named_gpio(np, "pwr-down-gpios", 0); - if (apb->pwrdn_gpio < 0) - dev_warn(dev, "failed to get power down gpio\n"); + apb->pwrdn = devm_gpiod_get(dev, "pwr-down", GPIOD_OUT_LOW); + if (IS_ERR(apb->pwrdn)) { + ret = PTR_ERR(apb->pwrdn); + dev_warn(dev, "Failed requesting power down GPIO: %d\n", ret); + return ret; + } /* Regulators are optional, as we may have fixed supply coming in */ apb->vcore = devm_regulator_get(dev, "vcore"); @@ -405,12 +378,8 @@ static int apb_ctrl_get_devtree_data(struct platform_device *pdev, } /* Only applicable for platform >= V2 */ - apb->spi_en_gpio = of_get_named_gpio(np, "spi-en-gpio", 0); - if (apb->spi_en_gpio >= 0) { - if (of_property_read_bool(pdev->dev.of_node, - "spi-en-active-high")) - apb->spi_en_polarity_high = true; - } + if (of_property_read_bool(pdev->dev.of_node, "gb,spi-en-active-high")) + apb->spi_en_polarity_high = true; return 0; } diff --git a/drivers/staging/greybus/arche-platform.c b/drivers/staging/greybus/arche-platform.c index 4c36e88766e7..6eb842040c22 100644 --- a/drivers/staging/greybus/arche-platform.c +++ b/drivers/staging/greybus/arche-platform.c @@ -8,10 +8,9 @@ #include <linux/clk.h> #include <linux/delay.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/init.h> #include <linux/module.h> -#include <linux/of_gpio.h> #include <linux/of_platform.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> @@ -45,14 +44,14 @@ enum svc_wakedetect_state { struct arche_platform_drvdata { /* Control GPIO signals to and from AP <=> SVC */ - int svc_reset_gpio; + struct gpio_desc *svc_reset; bool is_reset_act_hi; - int svc_sysboot_gpio; - int wake_detect_gpio; /* bi-dir,maps to WAKE_MOD & WAKE_FRAME signals */ + struct gpio_desc *svc_sysboot; + struct gpio_desc *wake_detect; /* bi-dir,maps to WAKE_MOD & WAKE_FRAME signals */ enum arche_platform_state state; - int svc_refclk_req; + struct gpio_desc *svc_refclk_req; struct clk *svc_ref_clk; struct pinctrl *pinctrl; @@ -85,9 +84,9 @@ static void arche_platform_set_wake_detect_state( arche_pdata->wake_detect_state = state; } -static inline void svc_reset_onoff(unsigned int gpio, bool onoff) +static inline void svc_reset_onoff(struct gpio_desc *gpio, bool onoff) { - gpio_set_value(gpio, onoff); + gpiod_set_raw_value(gpio, onoff); } static int apb_cold_boot(struct device *dev, void *data) @@ -116,7 +115,6 @@ static int apb_poweroff(struct device *dev, void *data) static void arche_platform_wd_irq_en(struct arche_platform_drvdata *arche_pdata) { /* Enable interrupt here, to read event back from SVC */ - gpio_direction_input(arche_pdata->wake_detect_gpio); enable_irq(arche_pdata->wake_detect_irq); } @@ -160,7 +158,7 @@ static irqreturn_t arche_platform_wd_irq(int irq, void *devid) spin_lock_irqsave(&arche_pdata->wake_lock, flags); - if (gpio_get_value(arche_pdata->wake_detect_gpio)) { + if (gpiod_get_value(arche_pdata->wake_detect)) { /* wake/detect rising */ /* @@ -224,10 +222,9 @@ arche_platform_coldboot_seq(struct arche_platform_drvdata *arche_pdata) dev_info(arche_pdata->dev, "Booting from cold boot state\n"); - svc_reset_onoff(arche_pdata->svc_reset_gpio, - arche_pdata->is_reset_act_hi); + svc_reset_onoff(arche_pdata->svc_reset, arche_pdata->is_reset_act_hi); - gpio_set_value(arche_pdata->svc_sysboot_gpio, 0); + gpiod_set_value(arche_pdata->svc_sysboot, 0); usleep_range(100, 200); ret = clk_prepare_enable(arche_pdata->svc_ref_clk); @@ -238,8 +235,7 @@ arche_platform_coldboot_seq(struct arche_platform_drvdata *arche_pdata) } /* bring SVC out of reset */ - svc_reset_onoff(arche_pdata->svc_reset_gpio, - !arche_pdata->is_reset_act_hi); + svc_reset_onoff(arche_pdata->svc_reset, !arche_pdata->is_reset_act_hi); arche_platform_set_state(arche_pdata, ARCHE_PLATFORM_STATE_ACTIVE); @@ -259,10 +255,9 @@ arche_platform_fw_flashing_seq(struct arche_platform_drvdata *arche_pdata) dev_info(arche_pdata->dev, "Switching to FW flashing state\n"); - svc_reset_onoff(arche_pdata->svc_reset_gpio, - arche_pdata->is_reset_act_hi); + svc_reset_onoff(arche_pdata->svc_reset, arche_pdata->is_reset_act_hi); - gpio_set_value(arche_pdata->svc_sysboot_gpio, 1); + gpiod_set_value(arche_pdata->svc_sysboot, 1); usleep_range(100, 200); @@ -273,8 +268,7 @@ arche_platform_fw_flashing_seq(struct arche_platform_drvdata *arche_pdata) return ret; } - svc_reset_onoff(arche_pdata->svc_reset_gpio, - !arche_pdata->is_reset_act_hi); + svc_reset_onoff(arche_pdata->svc_reset, !arche_pdata->is_reset_act_hi); arche_platform_set_state(arche_pdata, ARCHE_PLATFORM_STATE_FW_FLASHING); @@ -305,8 +299,7 @@ arche_platform_poweroff_seq(struct arche_platform_drvdata *arche_pdata) clk_disable_unprepare(arche_pdata->svc_ref_clk); /* As part of exit, put APB back in reset state */ - svc_reset_onoff(arche_pdata->svc_reset_gpio, - arche_pdata->is_reset_act_hi); + svc_reset_onoff(arche_pdata->svc_reset, arche_pdata->is_reset_act_hi); arche_platform_set_state(arche_pdata, ARCHE_PLATFORM_STATE_OFF); } @@ -435,6 +428,7 @@ static int arche_platform_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; int ret; + unsigned int flags; arche_pdata = devm_kzalloc(&pdev->dev, sizeof(*arche_pdata), GFP_KERNEL); @@ -444,61 +438,33 @@ static int arche_platform_probe(struct platform_device *pdev) /* setup svc reset gpio */ arche_pdata->is_reset_act_hi = of_property_read_bool(np, "svc,reset-active-high"); - arche_pdata->svc_reset_gpio = of_get_named_gpio(np, - "svc,reset-gpio", - 0); - if (!gpio_is_valid(arche_pdata->svc_reset_gpio)) { - dev_err(dev, "failed to get reset-gpio\n"); - return arche_pdata->svc_reset_gpio; - } - ret = devm_gpio_request(dev, arche_pdata->svc_reset_gpio, "svc-reset"); - if (ret) { - dev_err(dev, "failed to request svc-reset gpio:%d\n", ret); - return ret; - } - ret = gpio_direction_output(arche_pdata->svc_reset_gpio, - arche_pdata->is_reset_act_hi); - if (ret) { - dev_err(dev, "failed to set svc-reset gpio dir:%d\n", ret); + if (arche_pdata->is_reset_act_hi) + flags = GPIOD_OUT_HIGH; + else + flags = GPIOD_OUT_LOW; + + arche_pdata->svc_reset = devm_gpiod_get(dev, "svc,reset", flags); + if (IS_ERR(arche_pdata->svc_reset)) { + ret = PTR_ERR(arche_pdata->svc_reset); + dev_err(dev, "failed to request svc-reset GPIO: %d\n", ret); return ret; } arche_platform_set_state(arche_pdata, ARCHE_PLATFORM_STATE_OFF); - arche_pdata->svc_sysboot_gpio = of_get_named_gpio(np, - "svc,sysboot-gpio", - 0); - if (!gpio_is_valid(arche_pdata->svc_sysboot_gpio)) { - dev_err(dev, "failed to get sysboot gpio\n"); - return arche_pdata->svc_sysboot_gpio; - } - ret = devm_gpio_request(dev, arche_pdata->svc_sysboot_gpio, "sysboot0"); - if (ret) { - dev_err(dev, "failed to request sysboot0 gpio:%d\n", ret); - return ret; - } - ret = gpio_direction_output(arche_pdata->svc_sysboot_gpio, 0); - if (ret) { - dev_err(dev, "failed to set svc-reset gpio dir:%d\n", ret); + arche_pdata->svc_sysboot = devm_gpiod_get(dev, "svc,sysboot", + GPIOD_OUT_LOW); + if (IS_ERR(arche_pdata->svc_sysboot)) { + ret = PTR_ERR(arche_pdata->svc_sysboot); + dev_err(dev, "failed to request sysboot0 GPIO: %d\n", ret); return ret; } /* setup the clock request gpio first */ - arche_pdata->svc_refclk_req = of_get_named_gpio(np, - "svc,refclk-req-gpio", - 0); - if (!gpio_is_valid(arche_pdata->svc_refclk_req)) { - dev_err(dev, "failed to get svc clock-req gpio\n"); - return arche_pdata->svc_refclk_req; - } - ret = devm_gpio_request(dev, arche_pdata->svc_refclk_req, - "svc-clk-req"); - if (ret) { - dev_err(dev, "failed to request svc-clk-req gpio: %d\n", ret); - return ret; - } - ret = gpio_direction_input(arche_pdata->svc_refclk_req); - if (ret) { - dev_err(dev, "failed to set svc-clk-req gpio dir :%d\n", ret); + arche_pdata->svc_refclk_req = devm_gpiod_get(dev, "svc,refclk-req", + GPIOD_IN); + if (IS_ERR(arche_pdata->svc_refclk_req)) { + ret = PTR_ERR(arche_pdata->svc_refclk_req); + dev_err(dev, "failed to request svc-clk-req GPIO: %d\n", ret); return ret; } @@ -515,19 +481,11 @@ static int arche_platform_probe(struct platform_device *pdev) arche_pdata->num_apbs = of_get_child_count(np); dev_dbg(dev, "Number of APB's available - %d\n", arche_pdata->num_apbs); - arche_pdata->wake_detect_gpio = of_get_named_gpio(np, - "svc,wake-detect-gpio", - 0); - if (arche_pdata->wake_detect_gpio < 0) { - dev_err(dev, "failed to get wake detect gpio\n"); - return arche_pdata->wake_detect_gpio; - } - - ret = devm_gpio_request(dev, arche_pdata->wake_detect_gpio, - "wake detect"); - if (ret) { - dev_err(dev, "Failed requesting wake_detect gpio %d\n", - arche_pdata->wake_detect_gpio); + arche_pdata->wake_detect = devm_gpiod_get(dev, "svc,wake-detect", + GPIOD_IN); + if (IS_ERR(arche_pdata->wake_detect)) { + ret = PTR_ERR(arche_pdata->wake_detect); + dev_err(dev, "Failed requesting wake_detect GPIO: %d\n", ret); return ret; } @@ -538,7 +496,7 @@ static int arche_platform_probe(struct platform_device *pdev) spin_lock_init(&arche_pdata->wake_lock); mutex_init(&arche_pdata->platform_state_mutex); arche_pdata->wake_detect_irq = - gpio_to_irq(arche_pdata->wake_detect_gpio); + gpiod_to_irq(arche_pdata->wake_detect); ret = devm_request_threaded_irq(dev, arche_pdata->wake_detect_irq, arche_platform_wd_irq, diff --git a/drivers/staging/greybus/arche_platform.h b/drivers/staging/greybus/arche_platform.h index 02056351d25a..9d997f2d6517 100644 --- a/drivers/staging/greybus/arche_platform.h +++ b/drivers/staging/greybus/arche_platform.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Arche Platform driver to enable Unipro link. * diff --git a/drivers/staging/greybus/arpc.h b/drivers/staging/greybus/arpc.h index 3534ba1a4e6c..3dab6375909c 100644 --- a/drivers/staging/greybus/arpc.h +++ b/drivers/staging/greybus/arpc.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ /* * This file is provided under a dual BSD/GPLv2 license. When using or * redistributing this file, you may do so under either license. diff --git a/drivers/staging/greybus/audio_apbridgea.h b/drivers/staging/greybus/audio_apbridgea.h index 42ac6059bfc7..330fc7a397eb 100644 --- a/drivers/staging/greybus/audio_apbridgea.h +++ b/drivers/staging/greybus/audio_apbridgea.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: BSD-3-Clause +/* SPDX-License-Identifier: BSD-3-Clause */ /** * Copyright (c) 2015-2016 Google Inc. * All rights reserved. diff --git a/drivers/staging/greybus/audio_codec.h b/drivers/staging/greybus/audio_codec.h index 4efd8b3ebe07..d36f8cd35e06 100644 --- a/drivers/staging/greybus/audio_codec.h +++ b/drivers/staging/greybus/audio_codec.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus audio driver * Copyright 2015 Google Inc. diff --git a/drivers/staging/greybus/audio_manager.h b/drivers/staging/greybus/audio_manager.h index dcb1a20f5ff1..be605485a8ce 100644 --- a/drivers/staging/greybus/audio_manager.h +++ b/drivers/staging/greybus/audio_manager.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus operations * diff --git a/drivers/staging/greybus/audio_manager_module.c b/drivers/staging/greybus/audio_manager_module.c index 52342e832e3b..2bfd804183c4 100644 --- a/drivers/staging/greybus/audio_manager_module.c +++ b/drivers/staging/greybus/audio_manager_module.c @@ -25,8 +25,8 @@ struct gb_audio_manager_module_attribute { const char *buf, size_t count); }; -static ssize_t gb_audio_module_attr_show( - struct kobject *kobj, struct attribute *attr, char *buf) +static ssize_t gb_audio_module_attr_show(struct kobject *kobj, + struct attribute *attr, char *buf) { struct gb_audio_manager_module_attribute *attribute; struct gb_audio_manager_module *module; diff --git a/drivers/staging/greybus/audio_manager_private.h b/drivers/staging/greybus/audio_manager_private.h index 9d9b58fc54c4..2b3a766c7de7 100644 --- a/drivers/staging/greybus/audio_manager_private.h +++ b/drivers/staging/greybus/audio_manager_private.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus operations * diff --git a/drivers/staging/greybus/audio_manager_sysfs.c b/drivers/staging/greybus/audio_manager_sysfs.c index 283fbed0c8ed..ab882cc49b41 100644 --- a/drivers/staging/greybus/audio_manager_sysfs.c +++ b/drivers/staging/greybus/audio_manager_sysfs.c @@ -11,9 +11,9 @@ #include "audio_manager.h" #include "audio_manager_private.h" -static ssize_t manager_sysfs_add_store( - struct kobject *kobj, struct kobj_attribute *attr, - const char *buf, size_t count) +static ssize_t manager_sysfs_add_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) { struct gb_audio_manager_module_descriptor desc = { {0} }; @@ -36,9 +36,9 @@ static ssize_t manager_sysfs_add_store( static struct kobj_attribute manager_add_attribute = __ATTR(add, 0664, NULL, manager_sysfs_add_store); -static ssize_t manager_sysfs_remove_store( - struct kobject *kobj, struct kobj_attribute *attr, - const char *buf, size_t count) +static ssize_t manager_sysfs_remove_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) { int id; @@ -57,9 +57,9 @@ static ssize_t manager_sysfs_remove_store( static struct kobj_attribute manager_remove_attribute = __ATTR(remove, 0664, NULL, manager_sysfs_remove_store); -static ssize_t manager_sysfs_dump_store( - struct kobject *kobj, struct kobj_attribute *attr, - const char *buf, size_t count) +static ssize_t manager_sysfs_dump_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) { int id; @@ -81,8 +81,8 @@ static ssize_t manager_sysfs_dump_store( static struct kobj_attribute manager_dump_attribute = __ATTR(dump, 0664, NULL, manager_sysfs_dump_store); -static void manager_sysfs_init_attribute( - struct kobject *kobj, struct kobj_attribute *kattr) +static void manager_sysfs_init_attribute(struct kobject *kobj, + struct kobj_attribute *kattr) { int err; diff --git a/drivers/staging/greybus/audio_module.c b/drivers/staging/greybus/audio_module.c index d065334efa23..300a2b4f3fc7 100644 --- a/drivers/staging/greybus/audio_module.c +++ b/drivers/staging/greybus/audio_module.c @@ -18,7 +18,7 @@ */ static int gbaudio_request_jack(struct gbaudio_module_info *module, - struct gb_audio_jack_event_request *req) + struct gb_audio_jack_event_request *req) { int report; struct snd_jack *jack = module->headset_jack.jack; @@ -26,8 +26,8 @@ static int gbaudio_request_jack(struct gbaudio_module_info *module, if (!jack) { dev_err_ratelimited(module->dev, - "Invalid jack event received:type: %u, event: %u\n", - req->jack_attribute, req->event); + "Invalid jack event received:type: %u, event: %u\n", + req->jack_attribute, req->event); return -EINVAL; } @@ -50,8 +50,8 @@ static int gbaudio_request_jack(struct gbaudio_module_info *module, report = req->jack_attribute & module->jack_mask; if (!report) { dev_err_ratelimited(module->dev, - "Invalid jack event received:type: %u, event: %u\n", - req->jack_attribute, req->event); + "Invalid jack event received:type: %u, event: %u\n", + req->jack_attribute, req->event); return -EINVAL; } @@ -74,8 +74,8 @@ static int gbaudio_request_button(struct gbaudio_module_info *module, if (!btn_jack) { dev_err_ratelimited(module->dev, - "Invalid button event received:type: %u, event: %u\n", - req->button_id, req->event); + "Invalid button event received:type: %u, event: %u\n", + req->button_id, req->event); return -EINVAL; } @@ -210,8 +210,8 @@ static int gb_audio_add_data_connection(struct gbaudio_module_info *gbmodule, return -ENOMEM; connection = gb_connection_create_offloaded(bundle, - le16_to_cpu(cport_desc->id), - GB_CONNECTION_FLAG_CSD); + le16_to_cpu(cport_desc->id), + GB_CONNECTION_FLAG_CSD); if (IS_ERR(connection)) { devm_kfree(gbmodule->dev, dai); return PTR_ERR(connection); @@ -317,7 +317,7 @@ static int gb_audio_probe(struct gb_bundle *bundle, ret = gbaudio_tplg_parse_data(gbmodule, topology); if (ret) { dev_err(dev, "%d:Error while parsing topology data\n", - ret); + ret); goto free_topology; } gbmodule->topology = topology; diff --git a/drivers/staging/greybus/audio_topology.c b/drivers/staging/greybus/audio_topology.c index b71078339e86..4ac30accf226 100644 --- a/drivers/staging/greybus/audio_topology.c +++ b/drivers/staging/greybus/audio_topology.c @@ -158,7 +158,7 @@ static const char **gb_generate_enum_strings(struct gbaudio_module_info *gb, } static int gbcodec_mixer_ctl_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) + struct snd_ctl_elem_info *uinfo) { unsigned int max; const char *name; @@ -209,7 +209,7 @@ static int gbcodec_mixer_ctl_info(struct snd_kcontrol *kcontrol, } static int gbcodec_mixer_ctl_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { int ret; struct gb_audio_ctl_elem_info *info; @@ -271,7 +271,7 @@ static int gbcodec_mixer_ctl_get(struct snd_kcontrol *kcontrol, } static int gbcodec_mixer_ctl_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { int ret = 0; struct gb_audio_ctl_elem_info *info; @@ -347,7 +347,7 @@ static int gbcodec_mixer_ctl_put(struct snd_kcontrol *kcontrol, * of DAPM related sequencing, etc. */ static int gbcodec_mixer_dapm_ctl_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) + struct snd_ctl_elem_info *uinfo) { int platform_max, platform_min; struct gbaudio_ctl_pvt *data; @@ -378,7 +378,7 @@ static int gbcodec_mixer_dapm_ctl_info(struct snd_kcontrol *kcontrol, } static int gbcodec_mixer_dapm_ctl_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { int ret; struct gb_audio_ctl_elem_info *info; @@ -427,7 +427,7 @@ static int gbcodec_mixer_dapm_ctl_get(struct snd_kcontrol *kcontrol, } static int gbcodec_mixer_dapm_ctl_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) + struct snd_ctl_elem_value *ucontrol) { int ret, wi, max, connect; unsigned int mask, val; @@ -501,7 +501,7 @@ static int gbcodec_mixer_dapm_ctl_put(struct snd_kcontrol *kcontrol, .private_value = (unsigned long)data} static int gbcodec_event_spk(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *k, int event) + struct snd_kcontrol *k, int event) { /* Ensure GB speaker is connected */ @@ -509,7 +509,7 @@ static int gbcodec_event_spk(struct snd_soc_dapm_widget *w, } static int gbcodec_event_hp(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *k, int event) + struct snd_kcontrol *k, int event) { /* Ensure GB module supports jack slot */ @@ -517,7 +517,7 @@ static int gbcodec_event_hp(struct snd_soc_dapm_widget *w, } static int gbcodec_event_int_mic(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *k, int event) + struct snd_kcontrol *k, int event) { /* Ensure GB module supports jack slot */ @@ -664,7 +664,7 @@ static int gbaudio_tplg_create_enum_kctl(struct gbaudio_module_info *gb, /* debug enum info */ dev_dbg(gb->dev, "Max:%d, name_length:%d\n", gbe->max, - le16_to_cpu(gb_enum->names_length)); + le16_to_cpu(gb_enum->names_length)); for (i = 0; i < gbe->max; i++) dev_dbg(gb->dev, "src[%d]: %s\n", i, gbe->texts[i]); @@ -873,7 +873,7 @@ static int gbaudio_tplg_create_enum_ctl(struct gbaudio_module_info *gb, /* debug enum info */ dev_dbg(gb->dev, "Max:%d, name_length:%d\n", gbe->max, - le16_to_cpu(gb_enum->names_length)); + le16_to_cpu(gb_enum->names_length)); for (i = 0; i < gbe->max; i++) dev_dbg(gb->dev, "src[%d]: %s\n", i, gbe->texts[i]); @@ -884,8 +884,8 @@ static int gbaudio_tplg_create_enum_ctl(struct gbaudio_module_info *gb, } static int gbaudio_tplg_create_mixer_ctl(struct gbaudio_module_info *gb, - struct snd_kcontrol_new *kctl, - struct gb_audio_control *ctl) + struct snd_kcontrol_new *kctl, + struct gb_audio_control *ctl) { struct gbaudio_ctl_pvt *ctldata; @@ -905,8 +905,8 @@ static int gbaudio_tplg_create_mixer_ctl(struct gbaudio_module_info *gb, } static int gbaudio_tplg_create_wcontrol(struct gbaudio_module_info *gb, - struct snd_kcontrol_new *kctl, - struct gb_audio_control *ctl) + struct snd_kcontrol_new *kctl, + struct gb_audio_control *ctl) { int ret; @@ -923,7 +923,6 @@ static int gbaudio_tplg_create_wcontrol(struct gbaudio_module_info *gb, break; default: return -EINVAL; - } dev_dbg(gb->dev, "%s:%d DAPM control created, ret:%d\n", ctl->name, @@ -1086,9 +1085,10 @@ static int gbaudio_tplg_create_widget(struct gbaudio_module_info *module, case snd_soc_dapm_switch: *dw = (struct snd_soc_dapm_widget) SND_SOC_DAPM_SWITCH_E(w->name, SND_SOC_NOPM, 0, 0, - widget_kctls, gbaudio_widget_event, - SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD); + widget_kctls, + gbaudio_widget_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD); break; case snd_soc_dapm_pga: *dw = (struct snd_soc_dapm_widget) @@ -1100,16 +1100,16 @@ static int gbaudio_tplg_create_widget(struct gbaudio_module_info *module, case snd_soc_dapm_mixer: *dw = (struct snd_soc_dapm_widget) SND_SOC_DAPM_MIXER_E(w->name, SND_SOC_NOPM, 0, 0, NULL, - 0, gbaudio_widget_event, - SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD); + 0, gbaudio_widget_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD); break; case snd_soc_dapm_mux: *dw = (struct snd_soc_dapm_widget) SND_SOC_DAPM_MUX_E(w->name, SND_SOC_NOPM, 0, 0, - widget_kctls, gbaudio_widget_event, - SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD); + widget_kctls, gbaudio_widget_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD); break; case snd_soc_dapm_aif_in: *dw = (struct snd_soc_dapm_widget) @@ -1145,7 +1145,7 @@ error: } static int gbaudio_tplg_process_kcontrols(struct gbaudio_module_info *module, - struct gb_audio_control *controls) + struct gb_audio_control *controls) { int i, csize, ret; struct snd_kcontrol_new *dapm_kctls; @@ -1215,7 +1215,7 @@ error: } static int gbaudio_tplg_process_widgets(struct gbaudio_module_info *module, - struct gb_audio_widget *widgets) + struct gb_audio_widget *widgets) { int i, ret, w_size; struct snd_soc_dapm_widget *dapm_widgets; @@ -1264,7 +1264,7 @@ error: } static int gbaudio_tplg_process_routes(struct gbaudio_module_info *module, - struct gb_audio_route *routes) + struct gb_audio_route *routes) { int i, ret; struct snd_soc_dapm_route *dapm_routes; @@ -1300,8 +1300,8 @@ static int gbaudio_tplg_process_routes(struct gbaudio_module_info *module, } dapm_routes->control = gbaudio_map_controlid(module, - curr->control_id, - curr->index); + curr->control_id, + curr->index); if ((curr->control_id != GBAUDIO_INVALID_ID) && !dapm_routes->control) { dev_err(module->dev, "%d:%d:%d:%d - Invalid control\n", @@ -1325,7 +1325,7 @@ error: } static int gbaudio_tplg_process_header(struct gbaudio_module_info *module, - struct gb_audio_topology *tplg_data) + struct gb_audio_topology *tplg_data) { /* fetch no. of kcontrols, widgets & routes */ module->num_controls = tplg_data->num_controls; @@ -1351,7 +1351,7 @@ static int gbaudio_tplg_process_header(struct gbaudio_module_info *module, } int gbaudio_tplg_parse_data(struct gbaudio_module_info *module, - struct gb_audio_topology *tplg_data) + struct gb_audio_topology *tplg_data) { int ret; struct gb_audio_control *controls; diff --git a/drivers/staging/greybus/bootrom.c b/drivers/staging/greybus/bootrom.c index e85ffae85dff..402e6360834f 100644 --- a/drivers/staging/greybus/bootrom.c +++ b/drivers/staging/greybus/bootrom.c @@ -86,7 +86,8 @@ static void gb_bootrom_timedout(struct work_struct *work) } static void gb_bootrom_set_timeout(struct gb_bootrom *bootrom, - enum next_request_type next, unsigned long timeout) + enum next_request_type next, + unsigned long timeout) { bootrom->next_request = next; schedule_delayed_work(&bootrom->dwork, msecs_to_jiffies(timeout)); @@ -175,7 +176,7 @@ static int find_firmware(struct gb_bootrom *bootrom, u8 stage) firmware_name); rc = request_firmware(&bootrom->fw, firmware_name, - &connection->bundle->dev); + &connection->bundle->dev); if (rc) { dev_err(&connection->bundle->dev, "failed to find %s firmware (%d)\n", firmware_name, rc); @@ -274,7 +275,7 @@ static int gb_bootrom_get_firmware(struct gb_operation *op) if (offset >= fw->size || size > fw->size - offset) { dev_warn(dev, "bad firmware request (offs = %u, size = %u)\n", - offset, size); + offset, size); ret = -EINVAL; goto unlock; } @@ -387,15 +388,15 @@ static int gb_bootrom_get_version(struct gb_bootrom *bootrom) sizeof(response)); if (ret) { dev_err(&bundle->dev, - "failed to get protocol version: %d\n", - ret); + "failed to get protocol version: %d\n", + ret); return ret; } if (response.major > request.major) { dev_err(&bundle->dev, - "unsupported major protocol version (%u > %u)\n", - response.major, request.major); + "unsupported major protocol version (%u > %u)\n", + response.major, request.major); return -ENOTSUPP; } @@ -403,13 +404,13 @@ static int gb_bootrom_get_version(struct gb_bootrom *bootrom) bootrom->protocol_minor = response.minor; dev_dbg(&bundle->dev, "%s - %u.%u\n", __func__, response.major, - response.minor); + response.minor); return 0; } static int gb_bootrom_probe(struct gb_bundle *bundle, - const struct greybus_bundle_id *id) + const struct greybus_bundle_id *id) { struct greybus_descriptor_cport *cport_desc; struct gb_connection *connection; @@ -428,8 +429,8 @@ static int gb_bootrom_probe(struct gb_bundle *bundle, return -ENOMEM; connection = gb_connection_create(bundle, - le16_to_cpu(cport_desc->id), - gb_bootrom_request_handler); + le16_to_cpu(cport_desc->id), + gb_bootrom_request_handler); if (IS_ERR(connection)) { ret = PTR_ERR(connection); goto err_free_bootrom; @@ -466,7 +467,7 @@ static int gb_bootrom_probe(struct gb_bundle *bundle, NULL, 0); if (ret) { dev_err(&connection->bundle->dev, - "failed to send AP READY: %d\n", ret); + "failed to send AP READY: %d\n", ret); goto err_cancel_timeout; } diff --git a/drivers/staging/greybus/bundle.c b/drivers/staging/greybus/bundle.c index 81c018da1248..e97b2b87ba47 100644 --- a/drivers/staging/greybus/bundle.c +++ b/drivers/staging/greybus/bundle.c @@ -65,7 +65,7 @@ static struct attribute *bundle_attrs[] = { ATTRIBUTE_GROUPS(bundle); static struct gb_bundle *gb_bundle_find(struct gb_interface *intf, - u8 bundle_id) + u8 bundle_id) { struct gb_bundle *bundle; diff --git a/drivers/staging/greybus/bundle.h b/drivers/staging/greybus/bundle.h index ffcfd43802cc..8734d2055657 100644 --- a/drivers/staging/greybus/bundle.h +++ b/drivers/staging/greybus/bundle.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus bundles * diff --git a/drivers/staging/greybus/camera.c b/drivers/staging/greybus/camera.c index 6dded10f4155..615c8e7fd51e 100644 --- a/drivers/staging/greybus/camera.c +++ b/drivers/staging/greybus/camera.c @@ -841,8 +841,8 @@ done: } static int gb_camera_op_capture(void *priv, u32 request_id, - unsigned int streams, unsigned int num_frames, - size_t settings_size, const void *settings) + unsigned int streams, unsigned int num_frames, + size_t settings_size, const void *settings) { struct gb_camera *gcam = priv; @@ -869,7 +869,7 @@ static const struct gb_camera_ops gb_cam_ops = { */ static ssize_t gb_camera_debugfs_capabilities(struct gb_camera *gcam, - char *buf, size_t len) + char *buf, size_t len) { struct gb_camera_debugfs_buffer *buffer = &gcam->debugfs.buffers[GB_CAMERA_DEBUGFS_BUFFER_CAPABILITIES]; @@ -905,7 +905,7 @@ done: } static ssize_t gb_camera_debugfs_configure_streams(struct gb_camera *gcam, - char *buf, size_t len) + char *buf, size_t len) { struct gb_camera_debugfs_buffer *buffer = &gcam->debugfs.buffers[GB_CAMERA_DEBUGFS_BUFFER_STREAMS]; @@ -999,7 +999,7 @@ done: }; static ssize_t gb_camera_debugfs_capture(struct gb_camera *gcam, - char *buf, size_t len) + char *buf, size_t len) { unsigned int request_id; unsigned int streams_mask; @@ -1040,7 +1040,7 @@ static ssize_t gb_camera_debugfs_capture(struct gb_camera *gcam, } static ssize_t gb_camera_debugfs_flush(struct gb_camera *gcam, - char *buf, size_t len) + char *buf, size_t len) { struct gb_camera_debugfs_buffer *buffer = &gcam->debugfs.buffers[GB_CAMERA_DEBUGFS_BUFFER_FLUSH]; @@ -1190,7 +1190,6 @@ static int gb_camera_debugfs_init(struct gb_camera *gcam) debugfs_create_file(entry->name, entry->mask, gcam->debugfs.root, gcam, &gb_camera_debugfs_ops); - } } return 0; diff --git a/drivers/staging/greybus/connection.c b/drivers/staging/greybus/connection.c index 2103168b585e..eda964208cce 100644 --- a/drivers/staging/greybus/connection.c +++ b/drivers/staging/greybus/connection.c @@ -11,17 +11,13 @@ #include "greybus.h" #include "greybus_trace.h" - #define GB_CONNECTION_CPORT_QUIESCE_TIMEOUT 1000 - static void gb_connection_kref_release(struct kref *kref); - static DEFINE_SPINLOCK(gb_connections_lock); static DEFINE_MUTEX(gb_connection_mutex); - /* Caller holds gb_connection_mutex. */ static bool gb_connection_cport_in_use(struct gb_interface *intf, u16 cport_id) { @@ -30,7 +26,7 @@ static bool gb_connection_cport_in_use(struct gb_interface *intf, u16 cport_id) list_for_each_entry(connection, &hd->connections, hd_links) { if (connection->intf == intf && - connection->intf_cport_id == cport_id) + connection->intf_cport_id == cport_id) return true; } @@ -78,7 +74,7 @@ found: * received on the bundle. */ void greybus_data_rcvd(struct gb_host_device *hd, u16 cport_id, - u8 *data, size_t length) + u8 *data, size_t length) { struct gb_connection *connection; @@ -118,7 +114,7 @@ static void gb_connection_init_name(struct gb_connection *connection) } snprintf(connection->name, sizeof(connection->name), - "%u/%u:%u", hd_cport_id, intf_id, cport_id); + "%u/%u:%u", hd_cport_id, intf_id, cport_id); } /* @@ -146,10 +142,10 @@ static void gb_connection_init_name(struct gb_connection *connection) */ static struct gb_connection * _gb_connection_create(struct gb_host_device *hd, int hd_cport_id, - struct gb_interface *intf, - struct gb_bundle *bundle, int cport_id, - gb_request_handler_t handler, - unsigned long flags) + struct gb_interface *intf, + struct gb_bundle *bundle, int cport_id, + gb_request_handler_t handler, + unsigned long flags) { struct gb_connection *connection; int ret; @@ -230,35 +226,35 @@ err_unlock: struct gb_connection * gb_connection_create_static(struct gb_host_device *hd, u16 hd_cport_id, - gb_request_handler_t handler) + gb_request_handler_t handler) { return _gb_connection_create(hd, hd_cport_id, NULL, NULL, 0, handler, - GB_CONNECTION_FLAG_HIGH_PRIO); + GB_CONNECTION_FLAG_HIGH_PRIO); } struct gb_connection * gb_connection_create_control(struct gb_interface *intf) { return _gb_connection_create(intf->hd, -1, intf, NULL, 0, NULL, - GB_CONNECTION_FLAG_CONTROL | - GB_CONNECTION_FLAG_HIGH_PRIO); + GB_CONNECTION_FLAG_CONTROL | + GB_CONNECTION_FLAG_HIGH_PRIO); } struct gb_connection * gb_connection_create(struct gb_bundle *bundle, u16 cport_id, - gb_request_handler_t handler) + gb_request_handler_t handler) { struct gb_interface *intf = bundle->intf; return _gb_connection_create(intf->hd, -1, intf, bundle, cport_id, - handler, 0); + handler, 0); } EXPORT_SYMBOL_GPL(gb_connection_create); struct gb_connection * gb_connection_create_flags(struct gb_bundle *bundle, u16 cport_id, - gb_request_handler_t handler, - unsigned long flags) + gb_request_handler_t handler, + unsigned long flags) { struct gb_interface *intf = bundle->intf; @@ -266,13 +262,13 @@ gb_connection_create_flags(struct gb_bundle *bundle, u16 cport_id, flags &= ~GB_CONNECTION_FLAG_CORE_MASK; return _gb_connection_create(intf->hd, -1, intf, bundle, cport_id, - handler, flags); + handler, flags); } EXPORT_SYMBOL_GPL(gb_connection_create_flags); struct gb_connection * gb_connection_create_offloaded(struct gb_bundle *bundle, u16 cport_id, - unsigned long flags) + unsigned long flags) { flags |= GB_CONNECTION_FLAG_OFFLOADED; @@ -289,10 +285,10 @@ static int gb_connection_hd_cport_enable(struct gb_connection *connection) return 0; ret = hd->driver->cport_enable(hd, connection->hd_cport_id, - connection->flags); + connection->flags); if (ret) { dev_err(&hd->dev, "%s: failed to enable host cport: %d\n", - connection->name, ret); + connection->name, ret); return ret; } @@ -310,7 +306,7 @@ static void gb_connection_hd_cport_disable(struct gb_connection *connection) ret = hd->driver->cport_disable(hd, connection->hd_cport_id); if (ret) { dev_err(&hd->dev, "%s: failed to disable host cport: %d\n", - connection->name, ret); + connection->name, ret); } } @@ -325,7 +321,7 @@ static int gb_connection_hd_cport_connected(struct gb_connection *connection) ret = hd->driver->cport_connected(hd, connection->hd_cport_id); if (ret) { dev_err(&hd->dev, "%s: failed to set connected state: %d\n", - connection->name, ret); + connection->name, ret); return ret; } @@ -343,7 +339,7 @@ static int gb_connection_hd_cport_flush(struct gb_connection *connection) ret = hd->driver->cport_flush(hd, connection->hd_cport_id); if (ret) { dev_err(&hd->dev, "%s: failed to flush host cport: %d\n", - connection->name, ret); + connection->name, ret); return ret; } @@ -373,7 +369,7 @@ static int gb_connection_hd_cport_quiesce(struct gb_connection *connection) GB_CONNECTION_CPORT_QUIESCE_TIMEOUT); if (ret) { dev_err(&hd->dev, "%s: failed to quiesce host cport: %d\n", - connection->name, ret); + connection->name, ret); return ret; } @@ -391,7 +387,7 @@ static int gb_connection_hd_cport_clear(struct gb_connection *connection) ret = hd->driver->cport_clear(hd, connection->hd_cport_id); if (ret) { dev_err(&hd->dev, "%s: failed to clear host cport: %d\n", - connection->name, ret); + connection->name, ret); return ret; } @@ -427,11 +423,11 @@ gb_connection_svc_connection_create(struct gb_connection *connection) } ret = gb_svc_connection_create(hd->svc, - hd->svc->ap_intf_id, - connection->hd_cport_id, - intf->interface_id, - connection->intf_cport_id, - cport_flags); + hd->svc->ap_intf_id, + connection->hd_cport_id, + intf->interface_id, + connection->intf_cport_id, + cport_flags); if (ret) { dev_err(&connection->hd->dev, "%s: failed to create svc connection: %d\n", @@ -495,8 +491,8 @@ gb_connection_control_disconnecting(struct gb_connection *connection) ret = gb_control_disconnecting_operation(control, cport_id); if (ret) { dev_err(&connection->hd->dev, - "%s: failed to send disconnecting: %d\n", - connection->name, ret); + "%s: failed to send disconnecting: %d\n", + connection->name, ret); } } @@ -535,16 +531,16 @@ gb_connection_control_disconnected(struct gb_connection *connection) } static int gb_connection_shutdown_operation(struct gb_connection *connection, - u8 phase) + u8 phase) { struct gb_cport_shutdown_request *req; struct gb_operation *operation; int ret; operation = gb_operation_create_core(connection, - GB_REQUEST_TYPE_CPORT_SHUTDOWN, - sizeof(*req), 0, 0, - GFP_KERNEL); + GB_REQUEST_TYPE_CPORT_SHUTDOWN, + sizeof(*req), 0, 0, + GFP_KERNEL); if (!operation) return -ENOMEM; @@ -573,14 +569,14 @@ static int gb_connection_cport_shutdown(struct gb_connection *connection, return 0; ret = drv->cport_shutdown(hd, connection->hd_cport_id, phase, - GB_OPERATION_TIMEOUT_DEFAULT); + GB_OPERATION_TIMEOUT_DEFAULT); } else { ret = gb_connection_shutdown_operation(connection, phase); } if (ret) { dev_err(&hd->dev, "%s: failed to send cport shutdown (phase %d): %d\n", - connection->name, phase, ret); + connection->name, phase, ret); return ret; } @@ -606,14 +602,14 @@ gb_connection_cport_shutdown_phase_2(struct gb_connection *connection) * DISCONNECTING. */ static void gb_connection_cancel_operations(struct gb_connection *connection, - int errno) + int errno) __must_hold(&connection->lock) { struct gb_operation *operation; while (!list_empty(&connection->operations)) { operation = list_last_entry(&connection->operations, - struct gb_operation, links); + struct gb_operation, links); gb_operation_get(operation); spin_unlock_irq(&connection->lock); @@ -635,7 +631,7 @@ static void gb_connection_cancel_operations(struct gb_connection *connection, */ static void gb_connection_flush_incoming_operations(struct gb_connection *connection, - int errno) + int errno) __must_hold(&connection->lock) { struct gb_operation *operation; @@ -644,7 +640,7 @@ gb_connection_flush_incoming_operations(struct gb_connection *connection, while (!list_empty(&connection->operations)) { incoming = false; list_for_each_entry(operation, &connection->operations, - links) { + links) { if (gb_operation_is_incoming(operation)) { gb_operation_get(operation); incoming = true; diff --git a/drivers/staging/greybus/connection.h b/drivers/staging/greybus/connection.h index ec3f1d3ef3b9..5ca3befc0636 100644 --- a/drivers/staging/greybus/connection.h +++ b/drivers/staging/greybus/connection.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus connections * @@ -88,7 +88,7 @@ void gb_connection_mode_switch_prepare(struct gb_connection *connection); void gb_connection_mode_switch_complete(struct gb_connection *connection); void greybus_data_rcvd(struct gb_host_device *hd, u16 cport_id, - u8 *data, size_t length); + u8 *data, size_t length); void gb_connection_latency_tag_enable(struct gb_connection *connection); void gb_connection_latency_tag_disable(struct gb_connection *connection); diff --git a/drivers/staging/greybus/control.c b/drivers/staging/greybus/control.c index 35f945a12b11..a9e8b6036cac 100644 --- a/drivers/staging/greybus/control.c +++ b/drivers/staging/greybus/control.c @@ -15,7 +15,6 @@ #define GB_CONTROL_VERSION_MAJOR 0 #define GB_CONTROL_VERSION_MINOR 1 - static int gb_control_get_version(struct gb_control *control) { struct gb_interface *intf = control->connection->intf; @@ -32,15 +31,15 @@ static int gb_control_get_version(struct gb_control *control) sizeof(response)); if (ret) { dev_err(&intf->dev, - "failed to get control-protocol version: %d\n", - ret); + "failed to get control-protocol version: %d\n", + ret); return ret; } if (response.major > request.major) { dev_err(&intf->dev, - "unsupported major control-protocol version (%u > %u)\n", - response.major, request.major); + "unsupported major control-protocol version (%u > %u)\n", + response.major, request.major); return -ENOTSUPP; } @@ -48,13 +47,13 @@ static int gb_control_get_version(struct gb_control *control) control->protocol_minor = response.minor; dev_dbg(&intf->dev, "%s - %u.%u\n", __func__, response.major, - response.minor); + response.minor); return 0; } static int gb_control_get_bundle_version(struct gb_control *control, - struct gb_bundle *bundle) + struct gb_bundle *bundle) { struct gb_interface *intf = control->connection->intf; struct gb_control_bundle_version_request request; @@ -69,8 +68,8 @@ static int gb_control_get_bundle_version(struct gb_control *control, &response, sizeof(response)); if (ret) { dev_err(&intf->dev, - "failed to get bundle %u class version: %d\n", - bundle->id, ret); + "failed to get bundle %u class version: %d\n", + bundle->id, ret); return ret; } @@ -78,7 +77,7 @@ static int gb_control_get_bundle_version(struct gb_control *control, bundle->class_minor = response.minor; dev_dbg(&intf->dev, "%s - %u: %u.%u\n", __func__, bundle->id, - response.major, response.minor); + response.major, response.minor); return 0; } @@ -112,7 +111,7 @@ int gb_control_get_manifest_size_operation(struct gb_interface *intf) NULL, 0, &response, sizeof(response)); if (ret) { dev_err(&connection->intf->dev, - "failed to get manifest size: %d\n", ret); + "failed to get manifest size: %d\n", ret); return ret; } @@ -149,16 +148,16 @@ int gb_control_disconnected_operation(struct gb_control *control, u16 cport_id) } int gb_control_disconnecting_operation(struct gb_control *control, - u16 cport_id) + u16 cport_id) { struct gb_control_disconnecting_request *request; struct gb_operation *operation; int ret; operation = gb_operation_create_core(control->connection, - GB_CONTROL_TYPE_DISCONNECTING, - sizeof(*request), 0, 0, - GFP_KERNEL); + GB_CONTROL_TYPE_DISCONNECTING, + sizeof(*request), 0, 0, + GFP_KERNEL); if (!operation) return -ENOMEM; @@ -168,7 +167,7 @@ int gb_control_disconnecting_operation(struct gb_control *control, ret = gb_operation_request_send_sync(operation); if (ret) { dev_err(&control->dev, "failed to send disconnecting: %d\n", - ret); + ret); } gb_operation_put(operation); @@ -182,9 +181,10 @@ int gb_control_mode_switch_operation(struct gb_control *control) int ret; operation = gb_operation_create_core(control->connection, - GB_CONTROL_TYPE_MODE_SWITCH, - 0, 0, GB_OPERATION_FLAG_UNIDIRECTIONAL, - GFP_KERNEL); + GB_CONTROL_TYPE_MODE_SWITCH, + 0, 0, + GB_OPERATION_FLAG_UNIDIRECTIONAL, + GFP_KERNEL); if (!operation) return -ENOMEM; @@ -400,7 +400,7 @@ int gb_control_interface_hibernate_abort(struct gb_control *control) } static ssize_t vendor_string_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { struct gb_control *control = to_gb_control(dev); @@ -409,7 +409,7 @@ static ssize_t vendor_string_show(struct device *dev, static DEVICE_ATTR_RO(vendor_string); static ssize_t product_string_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { struct gb_control *control = to_gb_control(dev); @@ -455,8 +455,8 @@ struct gb_control *gb_control_create(struct gb_interface *intf) connection = gb_connection_create_control(intf); if (IS_ERR(connection)) { dev_err(&intf->dev, - "failed to create control connection: %ld\n", - PTR_ERR(connection)); + "failed to create control connection: %ld\n", + PTR_ERR(connection)); kfree(control); return ERR_CAST(connection); } @@ -485,8 +485,8 @@ int gb_control_enable(struct gb_control *control) ret = gb_connection_enable_tx(control->connection); if (ret) { dev_err(&control->connection->intf->dev, - "failed to enable control connection: %d\n", - ret); + "failed to enable control connection: %d\n", + ret); return ret; } @@ -547,8 +547,8 @@ int gb_control_add(struct gb_control *control) ret = device_add(&control->dev); if (ret) { dev_err(&control->dev, - "failed to register control device: %d\n", - ret); + "failed to register control device: %d\n", + ret); return ret; } diff --git a/drivers/staging/greybus/control.h b/drivers/staging/greybus/control.h index 643ddb9e0f92..3a29ec05f631 100644 --- a/drivers/staging/greybus/control.h +++ b/drivers/staging/greybus/control.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +/* SPDX-License-Identifier: GPL-2.0 */ /* * Greybus CPort control protocol * @@ -40,7 +40,7 @@ int gb_control_get_bundle_versions(struct gb_control *control); int gb_control_connected_operation(struct gb_control *control, u16 cport_id); int gb_control_disconnected_operation(struct gb_control *control, u16 cport_id); int gb_control_disconnecting_operation(struct gb_control *control, - u16 cport_id); + u16 cport_id); int gb_control_mode_switch_operation(struct gb_control *control); void gb_control_mode_switch_prepare(struct gb_control *control); void gb_control_mode_switch_complete(struct gb_control *control); diff --git a/drivers/staging/greybus/core.c b/drivers/staging/greybus/core.c index dafa430d176e..d6b0d49130c0 100644 --- a/drivers/staging/greybus/core.c +++ b/drivers/staging/greybus/core.c @@ -28,7 +28,7 @@ int greybus_disabled(void) EXPORT_SYMBOL_GPL(greybus_disabled); static bool greybus_match_one_id(struct gb_bundle *bundle, - const struct greybus_bundle_id *id) + const struct greybus_bundle_id *id) { if ((id->match_flags & GREYBUS_ID_MATCH_VENDOR) && (id->vendor != bundle->intf->vendor_id)) @@ -48,7 +48,7 @@ static bool greybus_match_one_id(struct gb_bundle *bundle, static const struct greybus_bundle_id * greybus_match_id(struct gb_bundle *bundle, const struct greybus_bundle_id *id) { - if (id == NULL) + if (!id) return NULL; for (; id->vendor || id->product || id->class || id->driver_info; @@ -266,7 +266,7 @@ static int greybus_remove(struct device *dev) } int greybus_register_driver(struct greybus_driver *driver, struct module *owner, - const char *mod_name) + const char *mod_name) { int retval; diff --git a/drivers/staging/greybus/es2.c b/drivers/staging/greybus/es2.c index b082d81833a0..be6af18cec31 100644 --- a/drivers/staging/greybus/es2.c +++ b/drivers/staging/greybus/es2.c @@ -216,7 +216,7 @@ static int output_async(struct es2_ap_dev *es2, void *req, u16 size, u8 cmd) } static int output(struct gb_host_device *hd, void *req, u16 size, u8 cmd, - bool async) + bool async) { struct es2_ap_dev *es2 = hd_to_es2(hd); @@ -227,7 +227,7 @@ static int output(struct gb_host_device *hd, void *req, u16 size, u8 cmd, } static int es2_cport_in_enable(struct es2_ap_dev *es2, - struct es2_cport_in *cport_in) + struct es2_cport_in *cport_in) { struct urb *urb; int ret; @@ -239,7 +239,7 @@ static int es2_cport_in_enable(struct es2_ap_dev *es2, ret = usb_submit_urb(urb, GFP_KERNEL); if (ret) { dev_err(&es2->usb_dev->dev, - "failed to submit in-urb: %d\n", ret); + "failed to submit in-urb: %d\n", ret); goto err_kill_urbs; } } @@ -256,7 +256,7 @@ err_kill_urbs: } static void es2_cport_in_disable(struct es2_ap_dev *es2, - struct es2_cport_in *cport_in) + struct es2_cport_in *cport_in) { struct urb *urb; int i; @@ -316,8 +316,8 @@ static struct urb *next_free_urb(struct es2_ap_dev *es2, gfp_t gfp_mask) /* Look in our pool of allocated urbs first, as that's the "fastest" */ for (i = 0; i < NUM_CPORT_OUT_URB; ++i) { - if (es2->cport_out_urb_busy[i] == false && - es2->cport_out_urb_cancelled[i] == false) { + if (!es2->cport_out_urb_busy[i] && + !es2->cport_out_urb_cancelled[i]) { es2->cport_out_urb_busy[i] = true; urb = es2->cport_out_urb[i]; break; @@ -487,7 +487,7 @@ static void message_cancel(struct gb_message *message) } static int es2_cport_allocate(struct gb_host_device *hd, int cport_id, - unsigned long flags) + unsigned long flags) { struct es2_ap_dev *es2 = hd_to_es2(hd); struct ida *id_map = &hd->cport_id_map; @@ -501,7 +501,7 @@ static int es2_cport_allocate(struct gb_host_device *hd, int cport_id, } if (flags & GB_CONNECTION_FLAG_OFFLOADED && - flags & GB_CONNECTION_FLAG_CDSI1) { + flags & GB_CONNECTION_FLAG_CDSI1) { if (es2->cdsi1_in_use) { dev_err(&hd->dev, "CDSI1 already in use\n"); return -EBUSY; @@ -561,16 +561,16 @@ static int cport_enable(struct gb_host_device *hd, u16 cport_id, req->flags = cpu_to_le32(connection_flags); dev_dbg(&hd->dev, "%s - cport = %u, flags = %02x\n", __func__, - cport_id, connection_flags); + cport_id, connection_flags); ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), - GB_APB_REQUEST_CPORT_FLAGS, - USB_DIR_OUT | USB_TYPE_VENDOR | - USB_RECIP_INTERFACE, cport_id, 0, - req, sizeof(*req), ES2_USB_CTRL_TIMEOUT); + GB_APB_REQUEST_CPORT_FLAGS, + USB_DIR_OUT | USB_TYPE_VENDOR | + USB_RECIP_INTERFACE, cport_id, 0, + req, sizeof(*req), ES2_USB_CTRL_TIMEOUT); if (ret != sizeof(*req)) { dev_err(&udev->dev, "failed to set cport flags for port %d\n", - cport_id); + cport_id); if (ret >= 0) ret = -EIO; @@ -596,7 +596,7 @@ static int es2_cport_connected(struct gb_host_device *hd, u16 cport_id) NULL, ES2_ARPC_CPORT_TIMEOUT); if (ret) { dev_err(dev, "failed to set connected state for cport %u: %d\n", - cport_id, ret); + cport_id, ret); return ret; } @@ -622,7 +622,7 @@ static int es2_cport_flush(struct gb_host_device *hd, u16 cport_id) } static int es2_cport_shutdown(struct gb_host_device *hd, u16 cport_id, - u8 phase, unsigned int timeout) + u8 phase, unsigned int timeout) { struct es2_ap_dev *es2 = hd_to_es2(hd); struct device *dev = &es2->usb_dev->dev; @@ -640,7 +640,7 @@ static int es2_cport_shutdown(struct gb_host_device *hd, u16 cport_id, &result, ES2_ARPC_CPORT_TIMEOUT + timeout); if (ret) { dev_err(dev, "failed to send shutdown over cport %u: %d (%d)\n", - cport_id, ret, result); + cport_id, ret, result); return ret; } @@ -648,7 +648,7 @@ static int es2_cport_shutdown(struct gb_host_device *hd, u16 cport_id, } static int es2_cport_quiesce(struct gb_host_device *hd, u16 cport_id, - size_t peer_space, unsigned int timeout) + size_t peer_space, unsigned int timeout) { struct es2_ap_dev *es2 = hd_to_es2(hd); struct device *dev = &es2->usb_dev->dev; @@ -669,7 +669,7 @@ static int es2_cport_quiesce(struct gb_host_device *hd, u16 cport_id, &result, ES2_ARPC_CPORT_TIMEOUT + timeout); if (ret) { dev_err(dev, "failed to quiesce cport %u: %d (%d)\n", - cport_id, ret, result); + cport_id, ret, result); return ret; } @@ -846,7 +846,7 @@ static void cport_in_callback(struct urb *urb) if (cport_id_valid(hd, cport_id)) { greybus_data_rcvd(hd, cport_id, urb->transfer_buffer, - urb->actual_length); + urb->actual_length); } else { dev_err(dev, "invalid cport id %u received\n", cport_id); } @@ -1083,14 +1083,14 @@ static void apb_log_get(struct es2_ap_dev *es2, char *buf) do { retval = usb_control_msg(es2->usb_dev, - usb_rcvctrlpipe(es2->usb_dev, 0), - GB_APB_REQUEST_LOG, - USB_DIR_IN | USB_TYPE_VENDOR | - USB_RECIP_INTERFACE, - 0x00, 0x00, - buf, - APB1_LOG_MSG_SIZE, - ES2_USB_CTRL_TIMEOUT); + usb_rcvctrlpipe(es2->usb_dev, 0), + GB_APB_REQUEST_LOG, + USB_DIR_IN | USB_TYPE_VENDOR | + USB_RECIP_INTERFACE, + 0x00, 0x00, + buf, + APB1_LOG_MSG_SIZE, + ES2_USB_CTRL_TIMEOUT); if (retval > 0) kfifo_in(&es2->apb_log_fifo, buf, retval); } while (retval > 0); @@ -1116,7 +1116,7 @@ static int apb_log_poll(void *data) } static ssize_t apb_log_read(struct file *f, char __user *buf, - size_t count, loff_t *ppos) + size_t count, loff_t *ppos) { struct es2_ap_dev *es2 = file_inode(f)->i_private; ssize_t ret; @@ -1153,8 +1153,8 @@ static void usb_log_enable(struct es2_ap_dev *es2) return; /* XXX We will need to rename this per APB */ es2->apb_log_dentry = debugfs_create_file("apb_log", 0444, - gb_debugfs_get(), es2, - &apb_log_fops); + gb_debugfs_get(), es2, + &apb_log_fops); } static void usb_log_disable(struct es2_ap_dev *es2) @@ -1170,7 +1170,7 @@ static void usb_log_disable(struct es2_ap_dev *es2) } static ssize_t apb_log_enable_read(struct file *f, char __user *buf, - size_t count, loff_t *ppos) + size_t count, loff_t *ppos) { struct es2_ap_dev *es2 = file_inode(f)->i_private; int enable = !IS_ERR_OR_NULL(es2->apb_log_task); @@ -1181,7 +1181,7 @@ static ssize_t apb_log_enable_read(struct file *f, char __user *buf, } static ssize_t apb_log_enable_write(struct file *f, const char __user *buf, - size_t count, loff_t *ppos) + size_t count, loff_t *ppos) { int enable; ssize_t retval; @@ -1274,7 +1274,7 @@ static int ap_probe(struct usb_interface *interface, } hd = gb_hd_create(&es2_driver, &udev->dev, ES2_GBUF_MSG_SIZE_MAX, - num_cports); + num_cports); if (IS_ERR(hd)) { usb_put_dev(udev); return PTR_ERR(hd); @@ -1409,9 +1409,9 @@ static int ap_probe(struct usb_interface *interface, /* XXX We will need to rename this per APB */ es2->apb_log_enable_dentry = debugfs_create_file("apb_log_enable", - 0644, - gb_debugfs_get(), es2, - &apb_log_enable_fops); + 0644, + gb_debugfs_get(), es2, + &apb_log_enable_fops); INIT_LIST_HEAD(&es2->arpcs); spin_lock_init(&es2->arpc_lock); diff --git a/drivers/staging/greybus/gpio.c b/drivers/staging/greybus/gpio.c index b1d4698019a1..3151004d26fb 100644 --- a/drivers/staging/greybus/gpio.c +++ b/drivers/staging/greybus/gpio.c @@ -9,9 +9,9 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/slab.h> -#include <linux/gpio.h> #include <linux/irq.h> #include <linux/irqdomain.h> +#include <linux/gpio/driver.h> #include <linux/mutex.h> #include "greybus.h" @@ -39,11 +39,6 @@ struct gb_gpio_controller { struct gpio_chip chip; struct irq_chip irqc; - struct irq_chip *irqchip; - struct irq_domain *irqdomain; - unsigned int irq_base; - irq_flow_handler_t irq_handler; - unsigned int irq_default_type; struct mutex irq_lock; }; #define gpio_chip_to_gb_gpio_controller(chip) \ @@ -74,7 +69,7 @@ static int gb_gpio_activate_operation(struct gb_gpio_controller *ggc, u8 which) request.which = which; ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_ACTIVATE, - &request, sizeof(request), NULL, 0); + &request, sizeof(request), NULL, 0); if (ret) { gbphy_runtime_put_autosuspend(gbphy_dev); return ret; @@ -86,7 +81,7 @@ static int gb_gpio_activate_operation(struct gb_gpio_controller *ggc, u8 which) } static void gb_gpio_deactivate_operation(struct gb_gpio_controller *ggc, - u8 which) + u8 which) { struct gbphy_device *gbphy_dev = ggc->gbphy_dev; struct device *dev = &gbphy_dev->dev; @@ -95,7 +90,7 @@ static void gb_gpio_deactivate_operation(struct gb_gpio_controller *ggc, request.which = which; ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_DEACTIVATE, - &request, sizeof(request), NULL, 0); + &request, sizeof(request), NULL, 0); if (ret) { dev_err(dev, "failed to deactivate gpio %u\n", which); goto out_pm_put; @@ -108,7 +103,7 @@ out_pm_put: } static int gb_gpio_get_direction_operation(struct gb_gpio_controller *ggc, - u8 which) + u8 which) { struct device *dev = &ggc->gbphy_dev->dev; struct gb_gpio_get_direction_request request; @@ -133,7 +128,7 @@ static int gb_gpio_get_direction_operation(struct gb_gpio_controller *ggc, } static int gb_gpio_direction_in_operation(struct gb_gpio_controller *ggc, - u8 which) + u8 which) { struct gb_gpio_direction_in_request request; int ret; @@ -147,7 +142,7 @@ static int gb_gpio_direction_in_operation(struct gb_gpio_controller *ggc, } static int gb_gpio_direction_out_operation(struct gb_gpio_controller *ggc, - u8 which, bool value_high) + u8 which, bool value_high) { struct gb_gpio_direction_out_request request; int ret; @@ -162,7 +157,7 @@ static int gb_gpio_direction_out_operation(struct gb_gpio_controller *ggc, } static int gb_gpio_get_value_operation(struct gb_gpio_controller *ggc, - u8 which) + u8 which) { struct device *dev = &ggc->gbphy_dev->dev; struct gb_gpio_get_value_request request; @@ -214,7 +209,7 @@ static void gb_gpio_set_value_operation(struct gb_gpio_controller *ggc, } static int gb_gpio_set_debounce_operation(struct gb_gpio_controller *ggc, - u8 which, u16 debounce_usec) + u8 which, u16 debounce_usec) { struct gb_gpio_set_debounce_request request; int ret; @@ -257,7 +252,7 @@ static void _gb_gpio_irq_unmask(struct gb_gpio_controller *ggc, u8 hwirq) } static void _gb_gpio_irq_set_type(struct gb_gpio_controller *ggc, - u8 hwirq, u8 type) + u8 hwirq, u8 type) { struct device *dev = &ggc->gbphy_dev->dev; struct gb_gpio_irq_type_request request; @@ -391,7 +386,7 @@ static int gb_gpio_request_handler(struct gb_operation *op) return -EINVAL; } - irq = irq_find_mapping(ggc->irqdomain, event->which); + irq = irq_find_mapping(ggc->chip.irq.domain, event->which); if (!irq) { dev_err(dev, "failed to find IRQ\n"); return -EINVAL; @@ -506,135 +501,6 @@ static int gb_gpio_controller_setup(struct gb_gpio_controller *ggc) return ret; } -/** - * gb_gpio_irq_map() - maps an IRQ into a GB gpio irqchip - * @d: the irqdomain used by this irqchip - * @irq: the global irq number used by this GB gpio irqchip irq - * @hwirq: the local IRQ/GPIO line offset on this GB gpio - * - * This function will set up the mapping for a certain IRQ line on a - * GB gpio by assigning the GB gpio as chip data, and using the irqchip - * stored inside the GB gpio. - */ -static int gb_gpio_irq_map(struct irq_domain *domain, unsigned int irq, - irq_hw_number_t hwirq) -{ - struct gpio_chip *chip = domain->host_data; - struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); - - irq_set_chip_data(irq, ggc); - irq_set_chip_and_handler(irq, ggc->irqchip, ggc->irq_handler); - irq_set_noprobe(irq); - /* - * No set-up of the hardware will happen if IRQ_TYPE_NONE - * is passed as default type. - */ - if (ggc->irq_default_type != IRQ_TYPE_NONE) - irq_set_irq_type(irq, ggc->irq_default_type); - - return 0; -} - -static void gb_gpio_irq_unmap(struct irq_domain *d, unsigned int irq) -{ - irq_set_chip_and_handler(irq, NULL, NULL); - irq_set_chip_data(irq, NULL); -} - -static const struct irq_domain_ops gb_gpio_domain_ops = { - .map = gb_gpio_irq_map, - .unmap = gb_gpio_irq_unmap, -}; - -/** - * gb_gpio_irqchip_remove() - removes an irqchip added to a gb_gpio_controller - * @ggc: the gb_gpio_controller to remove the irqchip from - * - * This is called only from gb_gpio_remove() - */ -static void gb_gpio_irqchip_remove(struct gb_gpio_controller *ggc) -{ - unsigned int offset; - - /* Remove all IRQ mappings and delete the domain */ - if (ggc->irqdomain) { - for (offset = 0; offset < (ggc->line_max + 1); offset++) - irq_dispose_mapping(irq_find_mapping(ggc->irqdomain, - offset)); - irq_domain_remove(ggc->irqdomain); - } - - if (ggc->irqchip) - ggc->irqchip = NULL; -} - -/** - * gb_gpio_irqchip_add() - adds an irqchip to a gpio chip - * @chip: the gpio chip to add the irqchip to - * @irqchip: the irqchip to add to the adapter - * @first_irq: if not dynamically assigned, the base (first) IRQ to - * allocate gpio irqs from - * @handler: the irq handler to use (often a predefined irq core function) - * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE - * to have the core avoid setting up any default type in the hardware. - * - * This function closely associates a certain irqchip with a certain - * gpio chip, providing an irq domain to translate the local IRQs to - * global irqs, and making sure that the gpio chip - * is passed as chip data to all related functions. Driver callbacks - * need to use container_of() to get their local state containers back - * from the gpio chip passed as chip data. An irqdomain will be stored - * in the gpio chip that shall be used by the driver to handle IRQ number - * translation. The gpio chip will need to be initialized and registered - * before calling this function. - */ -static int gb_gpio_irqchip_add(struct gpio_chip *chip, - struct irq_chip *irqchip, - unsigned int first_irq, - irq_flow_handler_t handler, - unsigned int type) -{ - struct gb_gpio_controller *ggc; - unsigned int offset; - unsigned int irq_base; - - if (!chip || !irqchip) - return -EINVAL; - - ggc = gpio_chip_to_gb_gpio_controller(chip); - - ggc->irqchip = irqchip; - ggc->irq_handler = handler; - ggc->irq_default_type = type; - ggc->irqdomain = irq_domain_add_simple(NULL, - ggc->line_max + 1, first_irq, - &gb_gpio_domain_ops, chip); - if (!ggc->irqdomain) { - ggc->irqchip = NULL; - return -EINVAL; - } - - /* - * Prepare the mapping since the irqchip shall be orthogonal to - * any gpio calls. If the first_irq was zero, this is - * necessary to allocate descriptors for all IRQs. - */ - for (offset = 0; offset < (ggc->line_max + 1); offset++) { - irq_base = irq_create_mapping(ggc->irqdomain, offset); - if (offset == 0) - ggc->irq_base = irq_base; - } - - return 0; -} - -static int gb_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) -{ - struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); - - return irq_find_mapping(ggc->irqdomain, offset); -} - static int gb_gpio_probe(struct gbphy_device *gbphy_dev, const struct gbphy_device_id *id) { @@ -648,9 +514,10 @@ static int gb_gpio_probe(struct gbphy_device *gbphy_dev, if (!ggc) return -ENOMEM; - connection = gb_connection_create(gbphy_dev->bundle, - le16_to_cpu(gbphy_dev->cport_desc->id), - gb_gpio_request_handler); + connection = + gb_connection_create(gbphy_dev->bundle, + le16_to_cpu(gbphy_dev->cport_desc->id), + gb_gpio_request_handler); if (IS_ERR(connection)) { ret = PTR_ERR(connection); goto exit_ggc_free; @@ -693,7 +560,6 @@ static int gb_gpio_probe(struct gbphy_device *gbphy_dev, gpio->get = gb_gpio_get; gpio->set = gb_gpio_set; gpio->set_config = gb_gpio_set_config; - gpio->to_irq = gb_gpio_to_irq; gpio->base = -1; /* Allocate base dynamically */ gpio->ngpio = ggc->line_max + 1; gpio->can_sleep = true; @@ -702,24 +568,24 @@ static int gb_gpio_probe(struct gbphy_device *gbphy_dev, if (ret) goto exit_line_free; - ret = gb_gpio_irqchip_add(gpio, irqc, 0, - handle_level_irq, IRQ_TYPE_NONE); + ret = gpiochip_add(gpio); if (ret) { - dev_err(&gbphy_dev->dev, "failed to add irq chip: %d\n", ret); + dev_err(&gbphy_dev->dev, "failed to add gpio chip: %d\n", ret); goto exit_line_free; } - ret = gpiochip_add(gpio); + ret = gpiochip_irqchip_add(gpio, irqc, 0, handle_level_irq, + IRQ_TYPE_NONE); if (ret) { - dev_err(&gbphy_dev->dev, "failed to add gpio chip: %d\n", ret); - goto exit_gpio_irqchip_remove; + dev_err(&gbphy_dev->dev, "failed to add irq chip: %d\n", ret); + goto exit_gpiochip_remove; } gbphy_runtime_put_autosuspend(gbphy_dev); return 0; -exit_gpio_irqchip_remove: - gb_gpio_irqchip_remove(ggc); +exit_gpiochip_remove: + gpiochip_remove(gpio); exit_line_free: kfree(ggc->lines); exit_connection_disable: @@ -743,7 +609,6 @@ static void gb_gpio_remove(struct gbphy_device *gbphy_dev) gb_connection_disable_rx(connection); gpiochip_remove(&ggc->chip); - gb_gpio_irqchip_remove(ggc); gb_connection_disable(connection); gb_connection_destroy(connection); kfree(ggc->lines); diff --git a/drivers/staging/greybus/greybus_protocols.h b/drivers/staging/greybus/greybus_protocols.h index 9bd7b6dfb476..ddc73f10eb22 100644 --- a/drivers/staging/greybus/greybus_protocols.h +++ b/drivers/staging/greybus/greybus_protocols.h @@ -878,10 +878,10 @@ struct gb_pwm_disable_request { /* Should match up with modes in linux/spi/spi.h */ #define GB_SPI_MODE_CPHA 0x01 /* clock phase */ #define GB_SPI_MODE_CPOL 0x02 /* clock polarity */ -#define GB_SPI_MODE_MODE_0 (0|0) /* (original MicroWire) */ -#define GB_SPI_MODE_MODE_1 (0|GB_SPI_MODE_CPHA) -#define GB_SPI_MODE_MODE_2 (GB_SPI_MODE_CPOL|0) -#define GB_SPI_MODE_MODE_3 (GB_SPI_MODE_CPOL|GB_SPI_MODE_CPHA) +#define GB_SPI_MODE_MODE_0 (0 | 0) /* (original MicroWire) */ +#define GB_SPI_MODE_MODE_1 (0 | GB_SPI_MODE_CPHA) +#define GB_SPI_MODE_MODE_2 (GB_SPI_MODE_CPOL | 0) +#define GB_SPI_MODE_MODE_3 (GB_SPI_MODE_CPOL | GB_SPI_MODE_CPHA) #define GB_SPI_MODE_CS_HIGH 0x04 /* chipselect active high? */ #define GB_SPI_MODE_LSB_FIRST 0x08 /* per-word bits-on-wire */ #define GB_SPI_MODE_3WIRE 0x10 /* SI/SO signals shared */ diff --git a/drivers/staging/greybus/hid.c b/drivers/staging/greybus/hid.c index 04053ff075a6..0b72e1b9d325 100644 --- a/drivers/staging/greybus/hid.c +++ b/drivers/staging/greybus/hid.c @@ -49,8 +49,8 @@ static int gb_hid_get_report_desc(struct gb_hid *ghid, char *rdesc) return ret; ret = gb_operation_sync(ghid->connection, GB_HID_TYPE_GET_REPORT_DESC, - NULL, 0, rdesc, - le16_to_cpu(ghid->hdesc.wReportDescLength)); + NULL, 0, rdesc, + le16_to_cpu(ghid->hdesc.wReportDescLength)); gb_pm_runtime_put_autosuspend(ghid->bundle); @@ -86,7 +86,7 @@ static int gb_hid_get_report(struct gb_hid *ghid, u8 report_type, u8 report_id, request.report_id = report_id; ret = gb_operation_sync(ghid->connection, GB_HID_TYPE_GET_REPORT, - &request, sizeof(request), buf, len); + &request, sizeof(request), buf, len); gb_pm_runtime_put_autosuspend(ghid->bundle); @@ -211,11 +211,13 @@ static void gb_hid_init_reports(struct gb_hid *ghid) struct hid_report *report; list_for_each_entry(report, - &hid->report_enum[HID_INPUT_REPORT].report_list, list) + &hid->report_enum[HID_INPUT_REPORT].report_list, + list) gb_hid_init_report(ghid, report); list_for_each_entry(report, - &hid->report_enum[HID_FEATURE_REPORT].report_list, list) + &hid->report_enum[HID_FEATURE_REPORT].report_list, + list) gb_hid_init_report(ghid, report); } @@ -259,8 +261,8 @@ static int __gb_hid_output_raw_report(struct hid_device *hid, __u8 *buf, } static int gb_hid_raw_request(struct hid_device *hid, unsigned char reportnum, - __u8 *buf, size_t len, unsigned char rtype, - int reqtype) + __u8 *buf, size_t len, unsigned char rtype, + int reqtype) { switch (reqtype) { case HID_REQ_GET_REPORT: @@ -440,7 +442,7 @@ static int gb_hid_probe(struct gb_bundle *bundle, return -ENOMEM; connection = gb_connection_create(bundle, le16_to_cpu(cport_desc->id), - gb_hid_request_handler); + gb_hid_request_handler); if (IS_ERR(connection)) { ret = PTR_ERR(connection); goto err_free_ghid; diff --git a/drivers/staging/greybus/i2c.c b/drivers/staging/greybus/i2c.c index 58a37deb6579..7bb85a75d3b1 100644 --- a/drivers/staging/greybus/i2c.c +++ b/drivers/staging/greybus/i2c.c @@ -107,7 +107,7 @@ gb_i2c_operation_create(struct gb_connection *connection, /* Response consists only of incoming data */ operation = gb_operation_create(connection, GB_I2C_TYPE_TRANSFER, - request_size, data_in_size, GFP_KERNEL); + request_size, data_in_size, GFP_KERNEL); if (!operation) return NULL; @@ -137,7 +137,7 @@ gb_i2c_operation_create(struct gb_connection *connection, } static void gb_i2c_decode_response(struct i2c_msg *msgs, u32 msg_count, - struct gb_i2c_transfer_response *response) + struct gb_i2c_transfer_response *response) { struct i2c_msg *msg = msgs; u8 *data; @@ -164,7 +164,7 @@ static bool gb_i2c_expected_transfer_error(int errno) } static int gb_i2c_transfer_operation(struct gb_i2c_device *gb_i2c_dev, - struct i2c_msg *msgs, u32 msg_count) + struct i2c_msg *msgs, u32 msg_count) { struct gb_connection *connection = gb_i2c_dev->connection; struct device *dev = &gb_i2c_dev->gbphy_dev->dev; @@ -199,7 +199,7 @@ exit_operation_put: } static int gb_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, - int msg_count) + int msg_count) { struct gb_i2c_device *gb_i2c_dev; @@ -211,8 +211,8 @@ static int gb_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, #if 0 /* Later */ static int gb_i2c_smbus_xfer(struct i2c_adapter *adap, - u16 addr, unsigned short flags, char read_write, - u8 command, int size, union i2c_smbus_data *data) + u16 addr, unsigned short flags, char read_write, + u8 command, int size, union i2c_smbus_data *data) { struct gb_i2c_device *gb_i2c_dev; @@ -249,7 +249,7 @@ static int gb_i2c_device_setup(struct gb_i2c_device *gb_i2c_dev) } static int gb_i2c_probe(struct gbphy_device *gbphy_dev, - const struct gbphy_device_id *id) + const struct gbphy_device_id *id) { struct gb_connection *connection; struct gb_i2c_device *gb_i2c_dev; @@ -260,9 +260,10 @@ static int gb_i2c_probe(struct gbphy_device *gbphy_dev, if (!gb_i2c_dev) return -ENOMEM; - connection = gb_connection_create(gbphy_dev->bundle, - le16_to_cpu(gbphy_dev->cport_desc->id), - NULL); + connection = + gb_connection_create(gbphy_dev->bundle, + le16_to_cpu(gbphy_dev->cport_desc->id), + NULL); if (IS_ERR(connection)) { ret = PTR_ERR(connection); goto exit_i2cdev_free; diff --git a/drivers/staging/greybus/loopback.c b/drivers/staging/greybus/loopback.c index 7080294f705c..48d85ebe404a 100644 --- a/drivers/staging/greybus/loopback.c +++ b/drivers/staging/greybus/loopback.c @@ -47,8 +47,6 @@ struct gb_loopback_device { /* We need to take a lock in atomic context */ spinlock_t lock; - struct list_head list; - struct list_head list_op_async; wait_queue_head_t wq; }; @@ -68,7 +66,6 @@ struct gb_loopback { struct kfifo kfifo_lat; struct mutex mutex; struct task_struct *task; - struct list_head entry; struct device *dev; wait_queue_head_t wq; wait_queue_head_t wq_completion; @@ -144,7 +141,7 @@ static ssize_t name##_##field##_show(struct device *dev, \ /* Report 0 for min and max if no transfer successed */ \ if (!gb->requests_completed) \ return sprintf(buf, "0\n"); \ - return sprintf(buf, "%"#type"\n", gb->name.field); \ + return sprintf(buf, "%" #type "\n", gb->name.field); \ } \ static DEVICE_ATTR_RO(name##_##field) @@ -179,7 +176,7 @@ static ssize_t field##_show(struct device *dev, \ char *buf) \ { \ struct gb_loopback *gb = dev_get_drvdata(dev); \ - return sprintf(buf, "%"#type"\n", gb->field); \ + return sprintf(buf, "%" #type "\n", gb->field); \ } \ static ssize_t field##_store(struct device *dev, \ struct device_attribute *attr, \ @@ -215,7 +212,7 @@ static ssize_t field##_show(struct device *dev, \ char *buf) \ { \ struct gb_loopback *gb = dev_get_drvdata(dev); \ - return sprintf(buf, "%"#type"\n", gb->field); \ + return sprintf(buf, "%" #type "\n", gb->field); \ } \ static ssize_t field##_store(struct device *dev, \ struct device_attribute *attr, \ @@ -973,50 +970,7 @@ static int gb_loopback_dbgfs_latency_show(struct seq_file *s, void *unused) return gb_loopback_dbgfs_latency_show_common(s, &gb->kfifo_lat, &gb->mutex); } - -static int gb_loopback_latency_open(struct inode *inode, struct file *file) -{ - return single_open(file, gb_loopback_dbgfs_latency_show, - inode->i_private); -} - -static const struct file_operations gb_loopback_debugfs_latency_ops = { - .open = gb_loopback_latency_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static int gb_loopback_bus_id_compare(void *priv, struct list_head *lha, - struct list_head *lhb) -{ - struct gb_loopback *a = list_entry(lha, struct gb_loopback, entry); - struct gb_loopback *b = list_entry(lhb, struct gb_loopback, entry); - struct gb_connection *ca = a->connection; - struct gb_connection *cb = b->connection; - - if (ca->bundle->intf->interface_id < cb->bundle->intf->interface_id) - return -1; - if (cb->bundle->intf->interface_id < ca->bundle->intf->interface_id) - return 1; - if (ca->bundle->id < cb->bundle->id) - return -1; - if (cb->bundle->id < ca->bundle->id) - return 1; - if (ca->intf_cport_id < cb->intf_cport_id) - return -1; - else if (cb->intf_cport_id < ca->intf_cport_id) - return 1; - - return 0; -} - -static void gb_loopback_insert_id(struct gb_loopback *gb) -{ - /* perform an insertion sort */ - list_add_tail(&gb->entry, &gb_dev.list); - list_sort(NULL, &gb_dev.list, gb_loopback_bus_id_compare); -} +DEFINE_SHOW_ATTRIBUTE(gb_loopback_dbgfs_latency); #define DEBUGFS_NAMELEN 32 @@ -1076,7 +1030,7 @@ static int gb_loopback_probe(struct gb_bundle *bundle, snprintf(name, sizeof(name), "raw_latency_%s", dev_name(&connection->bundle->dev)); gb->file = debugfs_create_file(name, S_IFREG | 0444, gb_dev.root, gb, - &gb_loopback_debugfs_latency_ops); + &gb_loopback_dbgfs_latency_fops); gb->id = ida_simple_get(&loopback_ida, 0, 0, GFP_KERNEL); if (gb->id < 0) { @@ -1113,7 +1067,6 @@ static int gb_loopback_probe(struct gb_bundle *bundle, } spin_lock_irqsave(&gb_dev.lock, flags); - gb_loopback_insert_id(gb); gb_dev.count++; spin_unlock_irqrestore(&gb_dev.lock, flags); @@ -1169,7 +1122,6 @@ static void gb_loopback_disconnect(struct gb_bundle *bundle) spin_lock_irqsave(&gb_dev.lock, flags); gb_dev.count--; - list_del(&gb->entry); spin_unlock_irqrestore(&gb_dev.lock, flags); device_unregister(gb->dev); @@ -1196,8 +1148,6 @@ static int loopback_init(void) { int retval; - INIT_LIST_HEAD(&gb_dev.list); - INIT_LIST_HEAD(&gb_dev.list_op_async); spin_lock_init(&gb_dev.lock); gb_dev.root = debugfs_create_dir("gb_loopback", NULL); diff --git a/drivers/staging/greybus/module.c b/drivers/staging/greybus/module.c index 894d02e8d8b7..b251a53d0e8e 100644 --- a/drivers/staging/greybus/module.c +++ b/drivers/staging/greybus/module.c @@ -9,10 +9,9 @@ #include "greybus.h" #include "greybus_trace.h" - static ssize_t eject_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) + struct device_attribute *attr, + const char *buf, size_t len) { struct gb_module *module = to_gb_module(dev); struct gb_interface *intf; @@ -48,7 +47,7 @@ static ssize_t eject_store(struct device *dev, static DEVICE_ATTR_WO(eject); static ssize_t module_id_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { struct gb_module *module = to_gb_module(dev); @@ -57,7 +56,7 @@ static ssize_t module_id_show(struct device *dev, static DEVICE_ATTR_RO(module_id); static ssize_t num_interfaces_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { struct gb_module *module = to_gb_module(dev); @@ -88,7 +87,7 @@ struct device_type greybus_module_type = { }; struct gb_module *gb_module_create(struct gb_host_device *hd, u8 module_id, - size_t num_interfaces) + size_t num_interfaces) { struct gb_interface *intf; struct gb_module *module; @@ -117,7 +116,7 @@ struct gb_module *gb_module_create(struct gb_host_device *hd, u8 module_id, intf = gb_interface_create(module, module_id + i); if (!intf) { dev_err(&module->dev, "failed to create interface %u\n", - module_id + i); + module_id + i); goto err_put_interfaces; } module->interfaces[i] = intf; @@ -149,8 +148,8 @@ static void gb_module_register_interface(struct gb_interface *intf) if (ret) { if (intf->type != GB_INTERFACE_TYPE_DUMMY) { dev_err(&module->dev, - "failed to activate interface %u: %d\n", - intf_id, ret); + "failed to activate interface %u: %d\n", + intf_id, ret); } gb_interface_add(intf); @@ -164,7 +163,7 @@ static void gb_module_register_interface(struct gb_interface *intf) ret = gb_interface_enable(intf); if (ret) { dev_err(&module->dev, "failed to enable interface %u: %d\n", - intf_id, ret); + intf_id, ret); goto err_interface_deactivate; } diff --git a/drivers/staging/greybus/operation.c b/drivers/staging/greybus/operation.c index c462b1c046cd..fe268f7b63ed 100644 --- a/drivers/staging/greybus/operation.c +++ b/drivers/staging/greybus/operation.c @@ -31,7 +31,7 @@ static DECLARE_WAIT_QUEUE_HEAD(gb_operation_cancellation_queue); static DEFINE_SPINLOCK(gb_operations_lock); static int gb_operation_response_send(struct gb_operation *operation, - int errno); + int errno); /* * Increment operation active count and add to connection list unless the @@ -202,7 +202,7 @@ gb_operation_find_outgoing(struct gb_connection *connection, u16 operation_id) spin_lock_irqsave(&connection->lock, flags); list_for_each_entry(operation, &connection->operations, links) if (operation->id == operation_id && - !gb_operation_is_incoming(operation)) { + !gb_operation_is_incoming(operation)) { gb_operation_get(operation); found = true; break; @@ -307,8 +307,9 @@ static void gb_operation_timeout(struct timer_list *t) } static void gb_operation_message_init(struct gb_host_device *hd, - struct gb_message *message, u16 operation_id, - size_t payload_size, u8 type) + struct gb_message *message, + u16 operation_id, + size_t payload_size, u8 type) { struct gb_operation_msg_hdr *header; @@ -358,7 +359,7 @@ static void gb_operation_message_init(struct gb_host_device *hd, */ static struct gb_message * gb_operation_message_alloc(struct gb_host_device *hd, u8 type, - size_t payload_size, gfp_t gfp_flags) + size_t payload_size, gfp_t gfp_flags) { struct gb_message *message; struct gb_operation_msg_hdr *header; @@ -366,7 +367,7 @@ gb_operation_message_alloc(struct gb_host_device *hd, u8 type, if (message_size > hd->buffer_size_max) { dev_warn(&hd->dev, "requested message size too big (%zu > %zu)\n", - message_size, hd->buffer_size_max); + message_size, hd->buffer_size_max); return NULL; } @@ -465,7 +466,7 @@ static u8 gb_operation_errno_map(int errno) } bool gb_operation_response_alloc(struct gb_operation *operation, - size_t response_size, gfp_t gfp) + size_t response_size, gfp_t gfp) { struct gb_host_device *hd = operation->connection->hd; struct gb_operation_msg_hdr *request_header; @@ -516,8 +517,8 @@ EXPORT_SYMBOL_GPL(gb_operation_response_alloc); */ static struct gb_operation * gb_operation_create_common(struct gb_connection *connection, u8 type, - size_t request_size, size_t response_size, - unsigned long op_flags, gfp_t gfp_flags) + size_t request_size, size_t response_size, + unsigned long op_flags, gfp_t gfp_flags) { struct gb_host_device *hd = connection->hd; struct gb_operation *operation; @@ -572,9 +573,9 @@ err_cache: */ struct gb_operation * gb_operation_create_flags(struct gb_connection *connection, - u8 type, size_t request_size, - size_t response_size, unsigned long flags, - gfp_t gfp) + u8 type, size_t request_size, + size_t response_size, unsigned long flags, + gfp_t gfp) { struct gb_operation *operation; @@ -587,8 +588,8 @@ gb_operation_create_flags(struct gb_connection *connection, flags &= GB_OPERATION_FLAG_USER_MASK; operation = gb_operation_create_common(connection, type, - request_size, response_size, - flags, gfp); + request_size, response_size, + flags, gfp); if (operation) trace_gb_operation_create(operation); @@ -598,22 +599,23 @@ EXPORT_SYMBOL_GPL(gb_operation_create_flags); struct gb_operation * gb_operation_create_core(struct gb_connection *connection, - u8 type, size_t request_size, - size_t response_size, unsigned long flags, - gfp_t gfp) + u8 type, size_t request_size, + size_t response_size, unsigned long flags, + gfp_t gfp) { struct gb_operation *operation; flags |= GB_OPERATION_FLAG_CORE; operation = gb_operation_create_common(connection, type, - request_size, response_size, - flags, gfp); + request_size, response_size, + flags, gfp); if (operation) trace_gb_operation_create_core(operation); return operation; } + /* Do not export this function. */ size_t gb_operation_get_payload_size_max(struct gb_connection *connection) @@ -626,7 +628,7 @@ EXPORT_SYMBOL_GPL(gb_operation_get_payload_size_max); static struct gb_operation * gb_operation_create_incoming(struct gb_connection *connection, u16 id, - u8 type, void *data, size_t size) + u8 type, void *data, size_t size) { struct gb_operation *operation; size_t request_size; @@ -639,9 +641,9 @@ gb_operation_create_incoming(struct gb_connection *connection, u16 id, flags |= GB_OPERATION_FLAG_UNIDIRECTIONAL; operation = gb_operation_create_common(connection, type, - request_size, - GB_REQUEST_TYPE_INVALID, - flags, GFP_ATOMIC); + request_size, + GB_REQUEST_TYPE_INVALID, + flags, GFP_ATOMIC); if (!operation) return NULL; @@ -716,9 +718,9 @@ static void gb_operation_sync_callback(struct gb_operation *operation) * or a negative errno. */ int gb_operation_request_send(struct gb_operation *operation, - gb_operation_callback callback, - unsigned int timeout, - gfp_t gfp) + gb_operation_callback callback, + unsigned int timeout, + gfp_t gfp) { struct gb_connection *connection = operation->connection; struct gb_operation_msg_hdr *header; @@ -790,7 +792,7 @@ EXPORT_SYMBOL_GPL(gb_operation_request_send); * operation. */ int gb_operation_request_send_sync_timeout(struct gb_operation *operation, - unsigned int timeout) + unsigned int timeout) { int ret; @@ -819,13 +821,13 @@ EXPORT_SYMBOL_GPL(gb_operation_request_send_sync_timeout); * allocate the response message if necessary. */ static int gb_operation_response_send(struct gb_operation *operation, - int errno) + int errno) { struct gb_connection *connection = operation->connection; int ret; if (!operation->response && - !gb_operation_is_unidirectional(operation)) { + !gb_operation_is_unidirectional(operation)) { if (!gb_operation_response_alloc(operation, 0, GFP_KERNEL)) return -ENOMEM; } @@ -867,7 +869,7 @@ err_put: * This function is called when a message send request has completed. */ void greybus_message_sent(struct gb_host_device *hd, - struct gb_message *message, int status) + struct gb_message *message, int status) { struct gb_operation *operation = message->operation; struct gb_connection *connection = operation->connection; @@ -895,7 +897,7 @@ void greybus_message_sent(struct gb_host_device *hd, } else if (status || gb_operation_is_unidirectional(operation)) { if (gb_operation_result_set(operation, status)) { queue_work(gb_operation_completion_wq, - &operation->work); + &operation->work); } } } @@ -921,7 +923,7 @@ static void gb_connection_recv_request(struct gb_connection *connection, type = header->type; operation = gb_operation_create_incoming(connection, operation_id, - type, data, size); + type, data, size); if (!operation) { dev_err(&connection->hd->dev, "%s: can't create incoming operation\n", @@ -966,16 +968,16 @@ static void gb_connection_recv_response(struct gb_connection *connection, if (!operation_id) { dev_err_ratelimited(&connection->hd->dev, - "%s: invalid response id 0 received\n", - connection->name); + "%s: invalid response id 0 received\n", + connection->name); return; } operation = gb_operation_find_outgoing(connection, operation_id); if (!operation) { dev_err_ratelimited(&connection->hd->dev, - "%s: unexpected response id 0x%04x received\n", - connection->name, operation_id); + "%s: unexpected response id 0x%04x received\n", + connection->name, operation_id); return; } @@ -984,18 +986,18 @@ static void gb_connection_recv_response(struct gb_connection *connection, message_size = sizeof(*header) + message->payload_size; if (!errno && size > message_size) { dev_err_ratelimited(&connection->hd->dev, - "%s: malformed response 0x%02x received (%zu > %zu)\n", - connection->name, header->type, - size, message_size); + "%s: malformed response 0x%02x received (%zu > %zu)\n", + connection->name, header->type, + size, message_size); errno = -EMSGSIZE; } else if (!errno && size < message_size) { if (gb_operation_short_response_allowed(operation)) { message->payload_size = size - sizeof(*header); } else { dev_err_ratelimited(&connection->hd->dev, - "%s: short response 0x%02x received (%zu < %zu)\n", - connection->name, header->type, - size, message_size); + "%s: short response 0x%02x received (%zu < %zu)\n", + connection->name, header->type, + size, message_size); errno = -EMSGSIZE; } } @@ -1022,22 +1024,22 @@ static void gb_connection_recv_response(struct gb_connection *connection, * with, it's effectively dropped). */ void gb_connection_recv(struct gb_connection *connection, - void *data, size_t size) + void *data, size_t size) { struct gb_operation_msg_hdr header; struct device *dev = &connection->hd->dev; size_t msg_size; if (connection->state == GB_CONNECTION_STATE_DISABLED || - gb_connection_is_offloaded(connection)) { + gb_connection_is_offloaded(connection)) { dev_warn_ratelimited(dev, "%s: dropping %zu received bytes\n", - connection->name, size); + connection->name, size); return; } if (size < sizeof(header)) { dev_err_ratelimited(dev, "%s: short message received\n", - connection->name); + connection->name); return; } @@ -1046,19 +1048,19 @@ void gb_connection_recv(struct gb_connection *connection, msg_size = le16_to_cpu(header.size); if (size < msg_size) { dev_err_ratelimited(dev, - "%s: incomplete message 0x%04x of type 0x%02x received (%zu < %zu)\n", - connection->name, - le16_to_cpu(header.operation_id), - header.type, size, msg_size); + "%s: incomplete message 0x%04x of type 0x%02x received (%zu < %zu)\n", + connection->name, + le16_to_cpu(header.operation_id), + header.type, size, msg_size); return; /* XXX Should still complete operation */ } if (header.type & GB_MESSAGE_TYPE_RESPONSE) { gb_connection_recv_response(connection, &header, data, - msg_size); + msg_size); } else { gb_connection_recv_request(connection, &header, data, - msg_size); + msg_size); } } @@ -1079,7 +1081,7 @@ void gb_operation_cancel(struct gb_operation *operation, int errno) atomic_inc(&operation->waiters); wait_event(gb_operation_cancellation_queue, - !gb_operation_is_active(operation)); + !gb_operation_is_active(operation)); atomic_dec(&operation->waiters); } EXPORT_SYMBOL_GPL(gb_operation_cancel); @@ -1106,7 +1108,7 @@ void gb_operation_cancel_incoming(struct gb_operation *operation, int errno) atomic_inc(&operation->waiters); wait_event(gb_operation_cancellation_queue, - !gb_operation_is_active(operation)); + !gb_operation_is_active(operation)); atomic_dec(&operation->waiters); } @@ -1134,9 +1136,9 @@ void gb_operation_cancel_incoming(struct gb_operation *operation, int errno) * If there is an error, the response buffer is left alone. */ int gb_operation_sync_timeout(struct gb_connection *connection, int type, - void *request, int request_size, - void *response, int response_size, - unsigned int timeout) + void *request, int request_size, + void *response, int response_size, + unsigned int timeout) { struct gb_operation *operation; int ret; @@ -1187,8 +1189,9 @@ EXPORT_SYMBOL_GPL(gb_operation_sync_timeout); * the request as actually reached the remote end of the connection. */ int gb_operation_unidirectional_timeout(struct gb_connection *connection, - int type, void *request, int request_size, - unsigned int timeout) + int type, void *request, + int request_size, + unsigned int timeout) { struct gb_operation *operation; int ret; @@ -1197,9 +1200,9 @@ int gb_operation_unidirectional_timeout(struct gb_connection *connection, return -EINVAL; operation = gb_operation_create_flags(connection, type, - request_size, 0, - GB_OPERATION_FLAG_UNIDIRECTIONAL, - GFP_KERNEL); + request_size, 0, + GB_OPERATION_FLAG_UNIDIRECTIONAL, + GFP_KERNEL); if (!operation) return -ENOMEM; @@ -1222,17 +1225,19 @@ EXPORT_SYMBOL_GPL(gb_operation_unidirectional_timeout); int __init gb_operation_init(void) { gb_message_cache = kmem_cache_create("gb_message_cache", - sizeof(struct gb_message), 0, 0, NULL); + sizeof(struct gb_message), 0, 0, + NULL); if (!gb_message_cache) return -ENOMEM; gb_operation_cache = kmem_cache_create("gb_operation_cache", - sizeof(struct gb_operation), 0, 0, NULL); + sizeof(struct gb_operation), 0, + 0, NULL); if (!gb_operation_cache) goto err_destroy_message_cache; gb_operation_completion_wq = alloc_workqueue("greybus_completion", - 0, 0); + 0, 0); if (!gb_operation_completion_wq) goto err_destroy_operation_cache; diff --git a/drivers/staging/greybus/svc.c b/drivers/staging/greybus/svc.c index a2bb7e1a3db3..05bc45287b87 100644 --- a/drivers/staging/greybus/svc.c +++ b/drivers/staging/greybus/svc.c @@ -20,11 +20,10 @@ struct gb_svc_deferred_request { struct gb_operation *operation; }; - static int gb_svc_queue_deferred_request(struct gb_operation *operation); static ssize_t endo_id_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { struct gb_svc *svc = to_gb_svc(dev); @@ -33,7 +32,7 @@ static ssize_t endo_id_show(struct device *dev, static DEVICE_ATTR_RO(endo_id); static ssize_t ap_intf_id_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { struct gb_svc *svc = to_gb_svc(dev); @@ -304,8 +303,8 @@ int gb_svc_intf_vsys_set(struct gb_svc *svc, u8 intf_id, bool enable) type = GB_SVC_TYPE_INTF_VSYS_DISABLE; ret = gb_operation_sync(svc->connection, type, - &request, sizeof(request), - &response, sizeof(response)); + &request, sizeof(request), + &response, sizeof(response)); if (ret < 0) return ret; if (response.result_code != GB_SVC_INTF_VSYS_OK) @@ -327,8 +326,8 @@ int gb_svc_intf_refclk_set(struct gb_svc *svc, u8 intf_id, bool enable) type = GB_SVC_TYPE_INTF_REFCLK_DISABLE; ret = gb_operation_sync(svc->connection, type, - &request, sizeof(request), - &response, sizeof(response)); + &request, sizeof(request), + &response, sizeof(response)); if (ret < 0) return ret; if (response.result_code != GB_SVC_INTF_REFCLK_OK) @@ -350,8 +349,8 @@ int gb_svc_intf_unipro_set(struct gb_svc *svc, u8 intf_id, bool enable) type = GB_SVC_TYPE_INTF_UNIPRO_DISABLE; ret = gb_operation_sync(svc->connection, type, - &request, sizeof(request), - &response, sizeof(response)); + &request, sizeof(request), + &response, sizeof(response)); if (ret < 0) return ret; if (response.result_code != GB_SVC_INTF_UNIPRO_OK) @@ -368,15 +367,15 @@ int gb_svc_intf_activate(struct gb_svc *svc, u8 intf_id, u8 *intf_type) request.intf_id = intf_id; ret = gb_operation_sync_timeout(svc->connection, - GB_SVC_TYPE_INTF_ACTIVATE, - &request, sizeof(request), - &response, sizeof(response), - SVC_INTF_ACTIVATE_TIMEOUT); + GB_SVC_TYPE_INTF_ACTIVATE, + &request, sizeof(request), + &response, sizeof(response), + SVC_INTF_ACTIVATE_TIMEOUT); if (ret < 0) return ret; if (response.status != GB_SVC_OP_SUCCESS) { dev_err(&svc->dev, "failed to activate interface %u: %u\n", - intf_id, response.status); + intf_id, response.status); return -EREMOTEIO; } @@ -430,14 +429,14 @@ int gb_svc_dme_peer_get(struct gb_svc *svc, u8 intf_id, u16 attr, u16 selector, &response, sizeof(response)); if (ret) { dev_err(&svc->dev, "failed to get DME attribute (%u 0x%04x %u): %d\n", - intf_id, attr, selector, ret); + intf_id, attr, selector, ret); return ret; } result = le16_to_cpu(response.result_code); if (result) { dev_err(&svc->dev, "UniPro error while getting DME attribute (%u 0x%04x %u): %u\n", - intf_id, attr, selector, result); + intf_id, attr, selector, result); return -EREMOTEIO; } @@ -465,14 +464,14 @@ int gb_svc_dme_peer_set(struct gb_svc *svc, u8 intf_id, u16 attr, u16 selector, &response, sizeof(response)); if (ret) { dev_err(&svc->dev, "failed to set DME attribute (%u 0x%04x %u %u): %d\n", - intf_id, attr, selector, value, ret); + intf_id, attr, selector, value, ret); return ret; } result = le16_to_cpu(response.result_code); if (result) { dev_err(&svc->dev, "UniPro error while setting DME attribute (%u 0x%04x %u %u): %u\n", - intf_id, attr, selector, value, result); + intf_id, attr, selector, value, result); return -EREMOTEIO; } @@ -480,9 +479,9 @@ int gb_svc_dme_peer_set(struct gb_svc *svc, u8 intf_id, u16 attr, u16 selector, } int gb_svc_connection_create(struct gb_svc *svc, - u8 intf1_id, u16 cport1_id, - u8 intf2_id, u16 cport2_id, - u8 cport_flags) + u8 intf1_id, u16 cport1_id, + u8 intf2_id, u16 cport2_id, + u8 cport_flags) { struct gb_svc_conn_create_request request; @@ -513,13 +512,13 @@ void gb_svc_connection_destroy(struct gb_svc *svc, u8 intf1_id, u16 cport1_id, &request, sizeof(request), NULL, 0); if (ret) { dev_err(&svc->dev, "failed to destroy connection (%u:%u %u:%u): %d\n", - intf1_id, cport1_id, intf2_id, cport2_id, ret); + intf1_id, cport1_id, intf2_id, cport2_id, ret); } } /* Creates bi-directional routes between the devices */ int gb_svc_route_create(struct gb_svc *svc, u8 intf1_id, u8 dev1_id, - u8 intf2_id, u8 dev2_id) + u8 intf2_id, u8 dev2_id) { struct gb_svc_route_create_request request; @@ -545,7 +544,7 @@ void gb_svc_route_destroy(struct gb_svc *svc, u8 intf1_id, u8 intf2_id) &request, sizeof(request), NULL, 0); if (ret) { dev_err(&svc->dev, "failed to destroy route (%u %u): %d\n", - intf1_id, intf2_id, ret); + intf1_id, intf2_id, ret); } } @@ -648,8 +647,8 @@ static int gb_svc_version_request(struct gb_operation *op) if (op->request->payload_size < sizeof(*request)) { dev_err(&svc->dev, "short version request (%zu < %zu)\n", - op->request->payload_size, - sizeof(*request)); + op->request->payload_size, + sizeof(*request)); return -EINVAL; } @@ -657,7 +656,7 @@ static int gb_svc_version_request(struct gb_operation *op) if (request->major > GB_SVC_VERSION_MAJOR) { dev_warn(&svc->dev, "unsupported major version (%u > %u)\n", - request->major, GB_SVC_VERSION_MAJOR); + request->major, GB_SVC_VERSION_MAJOR); return -ENOTSUPP; } @@ -845,8 +844,8 @@ static int gb_svc_hello(struct gb_operation *op) if (op->request->payload_size < sizeof(*hello_request)) { dev_warn(&svc->dev, "short hello request (%zu < %zu)\n", - op->request->payload_size, - sizeof(*hello_request)); + op->request->payload_size, + sizeof(*hello_request)); return -EINVAL; } @@ -877,7 +876,7 @@ err_unregister_device: } static struct gb_interface *gb_svc_interface_lookup(struct gb_svc *svc, - u8 intf_id) + u8 intf_id) { struct gb_host_device *hd = svc->hd; struct gb_module *module; @@ -889,7 +888,7 @@ static struct gb_interface *gb_svc_interface_lookup(struct gb_svc *svc, num_interfaces = module->num_interfaces; if (intf_id >= module_id && - intf_id < module_id + num_interfaces) { + intf_id < module_id + num_interfaces) { return module->interfaces[intf_id - module_id]; } } @@ -938,8 +937,8 @@ static void gb_svc_process_hello_deferred(struct gb_operation *operation) if (ret) dev_warn(&svc->dev, - "power mode change failed on AP to switch link: %d\n", - ret); + "power mode change failed on AP to switch link: %d\n", + ret); } static void gb_svc_process_module_inserted(struct gb_operation *operation) @@ -961,17 +960,17 @@ static void gb_svc_process_module_inserted(struct gb_operation *operation) flags = le16_to_cpu(request->flags); dev_dbg(&svc->dev, "%s - id = %u, num_interfaces = %zu, flags = 0x%04x\n", - __func__, module_id, num_interfaces, flags); + __func__, module_id, num_interfaces, flags); if (flags & GB_SVC_MODULE_INSERTED_FLAG_NO_PRIMARY) { dev_warn(&svc->dev, "no primary interface detected on module %u\n", - module_id); + module_id); } module = gb_svc_module_lookup(svc, module_id); if (module) { dev_warn(&svc->dev, "unexpected module-inserted event %u\n", - module_id); + module_id); return; } @@ -1007,7 +1006,7 @@ static void gb_svc_process_module_removed(struct gb_operation *operation) module = gb_svc_module_lookup(svc, module_id); if (!module) { dev_warn(&svc->dev, "unexpected module-removed event %u\n", - module_id); + module_id); return; } @@ -1066,7 +1065,7 @@ static void gb_svc_process_intf_mailbox_event(struct gb_operation *operation) mailbox = le32_to_cpu(request->mailbox); dev_dbg(&svc->dev, "%s - id = %u, result = 0x%04x, mailbox = 0x%08x\n", - __func__, intf_id, result_code, mailbox); + __func__, intf_id, result_code, mailbox); intf = gb_svc_interface_lookup(svc, intf_id); if (!intf) { @@ -1140,7 +1139,7 @@ static int gb_svc_intf_reset_recv(struct gb_operation *op) if (request->payload_size < sizeof(*reset)) { dev_warn(&svc->dev, "short reset request received (%zu < %zu)\n", - request->payload_size, sizeof(*reset)); + request->payload_size, sizeof(*reset)); return -EINVAL; } reset = request->payload; @@ -1157,14 +1156,14 @@ static int gb_svc_module_inserted_recv(struct gb_operation *op) if (op->request->payload_size < sizeof(*request)) { dev_warn(&svc->dev, "short module-inserted request received (%zu < %zu)\n", - op->request->payload_size, sizeof(*request)); + op->request->payload_size, sizeof(*request)); return -EINVAL; } request = op->request->payload; dev_dbg(&svc->dev, "%s - id = %u\n", __func__, - request->primary_intf_id); + request->primary_intf_id); return gb_svc_queue_deferred_request(op); } @@ -1176,14 +1175,14 @@ static int gb_svc_module_removed_recv(struct gb_operation *op) if (op->request->payload_size < sizeof(*request)) { dev_warn(&svc->dev, "short module-removed request received (%zu < %zu)\n", - op->request->payload_size, sizeof(*request)); + op->request->payload_size, sizeof(*request)); return -EINVAL; } request = op->request->payload; dev_dbg(&svc->dev, "%s - id = %u\n", __func__, - request->primary_intf_id); + request->primary_intf_id); return gb_svc_queue_deferred_request(op); } @@ -1209,7 +1208,7 @@ static int gb_svc_intf_mailbox_event_recv(struct gb_operation *op) if (op->request->payload_size < sizeof(*request)) { dev_warn(&svc->dev, "short mailbox request received (%zu < %zu)\n", - op->request->payload_size, sizeof(*request)); + op->request->payload_size, sizeof(*request)); return -EINVAL; } @@ -1254,7 +1253,7 @@ static int gb_svc_request_handler(struct gb_operation *op) if (ret) { dev_warn(&svc->dev, "unexpected request 0x%02x received (state %u)\n", - type, svc->state); + type, svc->state); return ret; } @@ -1329,10 +1328,10 @@ struct gb_svc *gb_svc_create(struct gb_host_device *hd) svc->hd = hd; svc->connection = gb_connection_create_static(hd, GB_SVC_CPORT_ID, - gb_svc_request_handler); + gb_svc_request_handler); if (IS_ERR(svc->connection)) { dev_err(&svc->dev, "failed to create connection: %ld\n", - PTR_ERR(svc->connection)); + PTR_ERR(svc->connection)); goto err_put_device; } diff --git a/drivers/staging/greybus/uart.c b/drivers/staging/greybus/uart.c index 3313cb0b60af..b3bffe91ae99 100644 --- a/drivers/staging/greybus/uart.c +++ b/drivers/staging/greybus/uart.c @@ -805,8 +805,8 @@ static const struct tty_operations gb_ops = { .tiocmget = gb_tty_tiocmget, .tiocmset = gb_tty_tiocmset, .get_icount = gb_tty_get_icount, - .set_serial = set_serial_info, - .get_serial = get_serial_info, + .set_serial = set_serial_info, + .get_serial = get_serial_info, }; static const struct tty_port_operations gb_port_ops = { diff --git a/drivers/staging/gs_fpgaboot/gs_fpgaboot.c b/drivers/staging/gs_fpgaboot/gs_fpgaboot.c index fa8b27e091a2..3e154562c64d 100644 --- a/drivers/staging/gs_fpgaboot/gs_fpgaboot.c +++ b/drivers/staging/gs_fpgaboot/gs_fpgaboot.c @@ -1,14 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0+ #include <linux/kernel.h> #include <linux/init.h> diff --git a/drivers/staging/gs_fpgaboot/gs_fpgaboot.h b/drivers/staging/gs_fpgaboot/gs_fpgaboot.h index 986e841f6b5e..5cf12c14cca4 100644 --- a/drivers/staging/gs_fpgaboot/gs_fpgaboot.h +++ b/drivers/staging/gs_fpgaboot/gs_fpgaboot.h @@ -1,14 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0+ */ #include <linux/firmware.h> diff --git a/drivers/staging/gs_fpgaboot/io.c b/drivers/staging/gs_fpgaboot/io.c index 83a13ca7259a..80903ec36b76 100644 --- a/drivers/staging/gs_fpgaboot/io.c +++ b/drivers/staging/gs_fpgaboot/io.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * - * GNU General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0+ #include <linux/kernel.h> #include <linux/init.h> @@ -50,8 +39,7 @@ int xl_supported_prog_bus_width(enum wbus bus_bytes) case bus_2byte: break; default: - pr_err("unsupported program bus width %d\n", - bus_bytes); + pr_err("unsupported program bus width %d\n", bus_bytes); return 0; } diff --git a/drivers/staging/gs_fpgaboot/io.h b/drivers/staging/gs_fpgaboot/io.h index bc5d99cbda8f..9bd86a92e90f 100644 --- a/drivers/staging/gs_fpgaboot/io.h +++ b/drivers/staging/gs_fpgaboot/io.h @@ -1,14 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0+ */ #define GPDIR 0 #define GPCFG 4 /* open drain or not */ diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig index 9d3062a07460..7a93d3a5c113 100644 --- a/drivers/staging/iio/adc/Kconfig +++ b/drivers/staging/iio/adc/Kconfig @@ -3,40 +3,6 @@ # menu "Analog to digital converters" -config AD7606 - tristate "Analog Devices AD7606 ADC driver" - depends on GPIOLIB || COMPILE_TEST - depends on HAS_IOMEM - select IIO_BUFFER - select IIO_TRIGGERED_BUFFER - help - Say yes here to build support for Analog Devices: - ad7605-4, ad7606, ad7606-6, ad7606-4 analog to digital converters (ADC). - - To compile this driver as a module, choose M here: the - module will be called ad7606. - -config AD7606_IFACE_PARALLEL - tristate "parallel interface support" - depends on AD7606 - help - Say yes here to include parallel interface support on the AD7606 - ADC driver. - - To compile this driver as a module, choose M here: the - module will be called ad7606_parallel. - -config AD7606_IFACE_SPI - tristate "spi interface support" - depends on AD7606 - depends on SPI - help - Say yes here to include parallel interface support on the AD7606 - ADC driver. - - To compile this driver as a module, choose M here: the - module will be called ad7606_spi. - config AD7780 tristate "Analog Devices AD7780 and similar ADCs driver" depends on SPI @@ -73,6 +39,7 @@ config AD7192 config AD7280 tristate "Analog Devices AD7280A Lithium Ion Battery Monitoring System" depends on SPI + select CRC8 help Say yes here to build support for Analog Devices AD7280A Lithium Ion Battery Monitoring System. diff --git a/drivers/staging/iio/adc/Makefile b/drivers/staging/iio/adc/Makefile index ebe83c1ad362..7a421088ff82 100644 --- a/drivers/staging/iio/adc/Makefile +++ b/drivers/staging/iio/adc/Makefile @@ -3,10 +3,6 @@ # Makefile for industrial I/O ADC drivers # -obj-$(CONFIG_AD7606_IFACE_PARALLEL) += ad7606_par.o -obj-$(CONFIG_AD7606_IFACE_SPI) += ad7606_spi.o -obj-$(CONFIG_AD7606) += ad7606.o - obj-$(CONFIG_AD7780) += ad7780.o obj-$(CONFIG_AD7816) += ad7816.o obj-$(CONFIG_AD7192) += ad7192.o diff --git a/drivers/staging/iio/adc/ad7192.c b/drivers/staging/iio/adc/ad7192.c index acdbc07fd259..2fc8bc22b57b 100644 --- a/drivers/staging/iio/adc/ad7192.c +++ b/drivers/staging/iio/adc/ad7192.c @@ -109,10 +109,10 @@ #define AD7192_CH_AIN3 BIT(6) /* AIN3 - AINCOM */ #define AD7192_CH_AIN4 BIT(7) /* AIN4 - AINCOM */ -#define AD7193_CH_AIN1P_AIN2M 0x000 /* AIN1(+) - AIN2(-) */ -#define AD7193_CH_AIN3P_AIN4M 0x001 /* AIN3(+) - AIN4(-) */ -#define AD7193_CH_AIN5P_AIN6M 0x002 /* AIN5(+) - AIN6(-) */ -#define AD7193_CH_AIN7P_AIN8M 0x004 /* AIN7(+) - AIN8(-) */ +#define AD7193_CH_AIN1P_AIN2M 0x001 /* AIN1(+) - AIN2(-) */ +#define AD7193_CH_AIN3P_AIN4M 0x002 /* AIN3(+) - AIN4(-) */ +#define AD7193_CH_AIN5P_AIN6M 0x004 /* AIN5(+) - AIN6(-) */ +#define AD7193_CH_AIN7P_AIN8M 0x008 /* AIN7(+) - AIN8(-) */ #define AD7193_CH_TEMP 0x100 /* Temp senseor */ #define AD7193_CH_AIN2P_AIN2M 0x200 /* AIN2(+) - AIN2(-) */ #define AD7193_CH_AIN1 0x401 /* AIN1 - AINCOM */ diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 58420dcb406d..d9df12665176 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -6,6 +6,7 @@ * Licensed under the GPL-2. */ +#include <linux/crc8.h> #include <linux/device.h> #include <linux/kernel.h> #include <linux/slab.h> @@ -96,6 +97,10 @@ #define AD7280A_NUM_CH (AD7280A_AUX_ADC_6 - \ AD7280A_CELL_VOLTAGE_1 + 1) +#define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) ((d * AD7280A_CELLS_PER_DEV) + c) +#define AD7280A_CALC_TEMP_CHAN_NUM(d, c) ((d * AD7280A_CELLS_PER_DEV) + \ + c - AD7280A_CELLS_PER_DEV) + #define AD7280A_DEVADDR_MASTER 0 #define AD7280A_DEVADDR_ALL 0x1F /* 5-bit device address is sent LSB first */ @@ -121,8 +126,6 @@ static unsigned int ad7280a_devaddr(unsigned int addr) * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F */ #define POLYNOM 0x2F -#define POLYNOM_ORDER 8 -#define HIGHBIT (1 << (POLYNOM_ORDER - 1)) struct ad7280_state { struct spi_device *spi; @@ -131,7 +134,7 @@ struct ad7280_state { int slave_num; int scan_cnt; int readback_delay_us; - unsigned char crc_tab[256]; + unsigned char crc_tab[CRC8_TABLE_SIZE]; unsigned char ctrl_hb; unsigned char ctrl_lb; unsigned char cell_threshhigh; @@ -144,23 +147,6 @@ struct ad7280_state { __be32 buf[2] ____cacheline_aligned; }; -static void ad7280_crc8_build_table(unsigned char *crc_tab) -{ - unsigned char bit, crc; - int cnt, i; - - for (cnt = 0; cnt < 256; cnt++) { - crc = cnt; - for (i = 0; i < 8; i++) { - bit = crc & HIGHBIT; - crc <<= 1; - if (bit) - crc ^= POLYNOM; - } - crc_tab[cnt] = crc; - } -} - static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) { unsigned char crc; @@ -256,7 +242,9 @@ static int ad7280_read(struct ad7280_state *st, unsigned int devaddr, if (ret) return ret; - __ad7280_read32(st, &tmp); + ret = __ad7280_read32(st, &tmp); + if (ret) + return ret; if (ad7280_check_crc(st, tmp)) return -EIO; @@ -294,7 +282,9 @@ static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, ad7280_delay(st); - __ad7280_read32(st, &tmp); + ret = __ad7280_read32(st, &tmp); + if (ret) + return ret; if (ad7280_check_crc(st, tmp)) return -EIO; @@ -327,7 +317,9 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, ad7280_delay(st); for (i = 0; i < cnt; i++) { - __ad7280_read32(st, &tmp); + ret = __ad7280_read32(st, &tmp); + if (ret) + return ret; if (ad7280_check_crc(st, tmp)) return -EIO; @@ -342,6 +334,14 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, return sum; } +static void ad7280_sw_power_down(void *data) +{ + struct ad7280_state *st = data; + + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, + AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); +} + static int ad7280_chain_setup(struct ad7280_state *st) { unsigned int val, n; @@ -362,26 +362,38 @@ static int ad7280_chain_setup(struct ad7280_state *st) AD7280A_CTRL_LB_MUST_SET | st->ctrl_lb); if (ret) - return ret; + goto error_power_down; ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1, AD7280A_CONTROL_LB << 2); if (ret) - return ret; + goto error_power_down; for (n = 0; n <= AD7280A_MAX_CHAIN; n++) { - __ad7280_read32(st, &val); + ret = __ad7280_read32(st, &val); + if (ret) + goto error_power_down; + if (val == 0) return n - 1; - if (ad7280_check_crc(st, val)) - return -EIO; + if (ad7280_check_crc(st, val)) { + ret = -EIO; + goto error_power_down; + } - if (n != ad7280a_devaddr(val >> 27)) - return -EIO; + if (n != ad7280a_devaddr(val >> 27)) { + ret = -EIO; + goto error_power_down; + } } + ret = -EFAULT; + +error_power_down: + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, + AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); - return -EFAULT; + return ret; } static ssize_t ad7280_show_balance_sw(struct device *dev, @@ -488,115 +500,183 @@ static const struct attribute_group ad7280_attrs_group = { .attrs = ad7280_attributes, }; +static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i) +{ + chan->type = IIO_VOLTAGE; + chan->differential = 1; + chan->channel = i; + chan->channel2 = chan->channel + 1; +} + +static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i) +{ + chan->type = IIO_TEMP; + chan->channel = i; +} + +static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, + int cnt) +{ + chan->indexed = 1; + chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); + chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); + chan->address = addr; + chan->scan_index = cnt; + chan->scan_type.sign = 'u'; + chan->scan_type.realbits = 12; + chan->scan_type.storagebits = 32; +} + +static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan, + int cnt, int dev) +{ + chan->type = IIO_VOLTAGE; + chan->differential = 1; + chan->channel = 0; + chan->channel2 = dev * AD7280A_CELLS_PER_DEV; + chan->address = AD7280A_ALL_CELLS; + chan->indexed = 1; + chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); + chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); + chan->scan_index = cnt; + chan->scan_type.sign = 'u'; + chan->scan_type.realbits = 32; + chan->scan_type.storagebits = 32; +} + +static void ad7280_timestamp_channel_init(struct iio_chan_spec *chan, int cnt) +{ + chan->type = IIO_TIMESTAMP; + chan->channel = -1; + chan->scan_index = cnt; + chan->scan_type.sign = 's'; + chan->scan_type.realbits = 64; + chan->scan_type.storagebits = 64; +} + +static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) +{ + int addr, ch, i; + struct iio_chan_spec *chan; + + for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6; ch++) { + chan = &st->channels[*cnt]; + + if (ch < AD7280A_AUX_ADC_1) { + i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch); + ad7280_voltage_channel_init(chan, i); + } else { + i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch); + ad7280_temp_channel_init(chan, i); + } + + addr = ad7280a_devaddr(dev) << 8 | ch; + ad7280_common_fields_init(chan, addr, *cnt); + + (*cnt)++; + } +} + static int ad7280_channel_init(struct ad7280_state *st) { - int dev, ch, cnt; + int dev, cnt = 0; - st->channels = kcalloc((st->slave_num + 1) * 12 + 2, - sizeof(*st->channels), GFP_KERNEL); + st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 2, + sizeof(*st->channels), GFP_KERNEL); if (!st->channels) return -ENOMEM; - for (dev = 0, cnt = 0; dev <= st->slave_num; dev++) - for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6; - ch++, cnt++) { - if (ch < AD7280A_AUX_ADC_1) { - st->channels[cnt].type = IIO_VOLTAGE; - st->channels[cnt].differential = 1; - st->channels[cnt].channel = (dev * 6) + ch; - st->channels[cnt].channel2 = - st->channels[cnt].channel + 1; - } else { - st->channels[cnt].type = IIO_TEMP; - st->channels[cnt].channel = (dev * 6) + ch - 6; - } - st->channels[cnt].indexed = 1; - st->channels[cnt].info_mask_separate = - BIT(IIO_CHAN_INFO_RAW); - st->channels[cnt].info_mask_shared_by_type = - BIT(IIO_CHAN_INFO_SCALE); - st->channels[cnt].address = - ad7280a_devaddr(dev) << 8 | ch; - st->channels[cnt].scan_index = cnt; - st->channels[cnt].scan_type.sign = 'u'; - st->channels[cnt].scan_type.realbits = 12; - st->channels[cnt].scan_type.storagebits = 32; - st->channels[cnt].scan_type.shift = 0; - } + for (dev = 0; dev <= st->slave_num; dev++) + ad7280_init_dev_channels(st, dev, &cnt); - st->channels[cnt].type = IIO_VOLTAGE; - st->channels[cnt].differential = 1; - st->channels[cnt].channel = 0; - st->channels[cnt].channel2 = dev * 6; - st->channels[cnt].address = AD7280A_ALL_CELLS; - st->channels[cnt].indexed = 1; - st->channels[cnt].info_mask_separate = BIT(IIO_CHAN_INFO_RAW); - st->channels[cnt].info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); - st->channels[cnt].scan_index = cnt; - st->channels[cnt].scan_type.sign = 'u'; - st->channels[cnt].scan_type.realbits = 32; - st->channels[cnt].scan_type.storagebits = 32; - st->channels[cnt].scan_type.shift = 0; + ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev); cnt++; - st->channels[cnt].type = IIO_TIMESTAMP; - st->channels[cnt].channel = -1; - st->channels[cnt].scan_index = cnt; - st->channels[cnt].scan_type.sign = 's'; - st->channels[cnt].scan_type.realbits = 64; - st->channels[cnt].scan_type.storagebits = 64; - st->channels[cnt].scan_type.shift = 0; + ad7280_timestamp_channel_init(&st->channels[cnt], cnt); return cnt + 1; } +static int ad7280_balance_switch_attr_init(struct iio_dev_attr *attr, + struct device *dev, int addr, int i) +{ + attr->address = addr; + attr->dev_attr.attr.mode = 0644; + attr->dev_attr.show = ad7280_show_balance_sw; + attr->dev_attr.store = ad7280_store_balance_sw; + attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, + "in%d-in%d_balance_switch_en", + i, i + 1); + if (!attr->dev_attr.attr.name) + return -ENOMEM; + + return 0; +} + +static int ad7280_balance_timer_attr_init(struct iio_dev_attr *attr, + struct device *dev, int addr, int i) +{ + attr->address = addr; + attr->dev_attr.attr.mode = 0644; + attr->dev_attr.show = ad7280_show_balance_timer; + attr->dev_attr.store = ad7280_store_balance_timer; + attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, + "in%d-in%d_balance_timer", + i, i + 1); + if (!attr->dev_attr.attr.name) + return -ENOMEM; + + return 0; +} + +static int ad7280_init_dev_attrs(struct ad7280_state *st, int dev, int *cnt) +{ + int addr, ch, i, ret; + struct iio_dev_attr *iio_attr; + struct device *sdev = &st->spi->dev; + + for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6; ch++) { + iio_attr = &st->iio_attr[*cnt]; + addr = ad7280a_devaddr(dev) << 8 | ch; + i = dev * AD7280A_CELLS_PER_DEV + ch; + + ret = ad7280_balance_switch_attr_init(iio_attr, sdev, addr, i); + if (ret < 0) + return ret; + + ad7280_attributes[*cnt] = &iio_attr->dev_attr.attr; + + (*cnt)++; + iio_attr = &st->iio_attr[*cnt]; + addr = ad7280a_devaddr(dev) << 8 | (AD7280A_CB1_TIMER + ch); + + ret = ad7280_balance_timer_attr_init(iio_attr, sdev, addr, i); + if (ret < 0) + return ret; + + ad7280_attributes[*cnt] = &iio_attr->dev_attr.attr; + (*cnt)++; + } + + ad7280_attributes[*cnt] = NULL; + + return 0; +} + static int ad7280_attr_init(struct ad7280_state *st) { - int dev, ch, cnt; + int dev, cnt = 0, ret; - st->iio_attr = kcalloc(2, sizeof(*st->iio_attr) * - (st->slave_num + 1) * AD7280A_CELLS_PER_DEV, - GFP_KERNEL); + st->iio_attr = devm_kcalloc(&st->spi->dev, 2, sizeof(*st->iio_attr) * + (st->slave_num + 1) * AD7280A_CELLS_PER_DEV, + GFP_KERNEL); if (!st->iio_attr) return -ENOMEM; - for (dev = 0, cnt = 0; dev <= st->slave_num; dev++) - for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6; - ch++, cnt++) { - st->iio_attr[cnt].address = - ad7280a_devaddr(dev) << 8 | ch; - st->iio_attr[cnt].dev_attr.attr.mode = - 0644; - st->iio_attr[cnt].dev_attr.show = - ad7280_show_balance_sw; - st->iio_attr[cnt].dev_attr.store = - ad7280_store_balance_sw; - st->iio_attr[cnt].dev_attr.attr.name = - kasprintf(GFP_KERNEL, - "in%d-in%d_balance_switch_en", - dev * AD7280A_CELLS_PER_DEV + ch, - dev * AD7280A_CELLS_PER_DEV + ch + 1); - ad7280_attributes[cnt] = - &st->iio_attr[cnt].dev_attr.attr; - cnt++; - st->iio_attr[cnt].address = - ad7280a_devaddr(dev) << 8 | - (AD7280A_CB1_TIMER + ch); - st->iio_attr[cnt].dev_attr.attr.mode = - 0644; - st->iio_attr[cnt].dev_attr.show = - ad7280_show_balance_timer; - st->iio_attr[cnt].dev_attr.store = - ad7280_store_balance_timer; - st->iio_attr[cnt].dev_attr.attr.name = - kasprintf(GFP_KERNEL, - "in%d-in%d_balance_timer", - dev * AD7280A_CELLS_PER_DEV + ch, - dev * AD7280A_CELLS_PER_DEV + ch + 1); - ad7280_attributes[cnt] = - &st->iio_attr[cnt].dev_attr.attr; - } - - ad7280_attributes[cnt] = NULL; + for (dev = 0; dev <= st->slave_num; dev++) { + ret = ad7280_init_dev_attrs(st, dev, &cnt); + if (ret < 0) + return ret; + } return 0; } @@ -610,7 +690,7 @@ static ssize_t ad7280_read_channel_config(struct device *dev, struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); unsigned int val; - switch ((u32)this_attr->address) { + switch (this_attr->address) { case AD7280A_CELL_OVERVOLTAGE: val = 1000 + (st->cell_threshhigh * 1568) / 100; break; @@ -646,7 +726,7 @@ static ssize_t ad7280_write_channel_config(struct device *dev, if (ret) return ret; - switch ((u32)this_attr->address) { + switch (this_attr->address) { case AD7280A_CELL_OVERVOLTAGE: case AD7280A_CELL_UNDERVOLTAGE: val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ @@ -662,7 +742,7 @@ static ssize_t ad7280_write_channel_config(struct device *dev, val = clamp(val, 0L, 0xFFL); mutex_lock(&st->lock); - switch ((u32)this_attr->address) { + switch (this_attr->address) { case AD7280A_CELL_OVERVOLTAGE: st->cell_threshhigh = val; break; @@ -857,7 +937,7 @@ static int ad7280_probe(struct spi_device *spi) if (!pdata) pdata = &ad7793_default_pdata; - ad7280_crc8_build_table(st->crc_tab); + crc8_populate_msb(st->crc_tab, POLYNOM); st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ; st->spi->mode = SPI_MODE_1; @@ -877,6 +957,10 @@ static int ad7280_probe(struct spi_device *spi) st->cell_threshhigh = 0xFF; st->aux_threshhigh = 0xFF; + ret = devm_add_action_or_reset(&spi->dev, ad7280_sw_power_down, st); + if (ret) + return ret; + /* * Total Conversion Time = ((tACQ + tCONV) * * (Number of Conversions per Part)) − @@ -909,66 +993,38 @@ static int ad7280_probe(struct spi_device *spi) ret = ad7280_attr_init(st); if (ret < 0) - goto error_free_channels; + return ret; - ret = iio_device_register(indio_dev); + ret = devm_iio_device_register(&spi->dev, indio_dev); if (ret) - goto error_free_attr; + return ret; if (spi->irq > 0) { ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_ALERT, 1, AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN); if (ret) - goto error_unregister; + return ret; ret = ad7280_write(st, ad7280a_devaddr(st->slave_num), AD7280A_ALERT, 0, AD7280A_ALERT_GEN_STATIC_HIGH | (pdata->chain_last_alert_ignore & 0xF)); if (ret) - goto error_unregister; - - ret = request_threaded_irq(spi->irq, - NULL, - ad7280_event_handler, - IRQF_TRIGGER_FALLING | - IRQF_ONESHOT, - indio_dev->name, - indio_dev); + return ret; + + ret = devm_request_threaded_irq(&spi->dev, spi->irq, + NULL, + ad7280_event_handler, + IRQF_TRIGGER_FALLING | + IRQF_ONESHOT, + indio_dev->name, + indio_dev); if (ret) - goto error_unregister; + return ret; } return 0; -error_unregister: - iio_device_unregister(indio_dev); - -error_free_attr: - kfree(st->iio_attr); - -error_free_channels: - kfree(st->channels); - - return ret; -} - -static int ad7280_remove(struct spi_device *spi) -{ - struct iio_dev *indio_dev = spi_get_drvdata(spi); - struct ad7280_state *st = iio_priv(indio_dev); - - if (spi->irq > 0) - free_irq(spi->irq, indio_dev); - iio_device_unregister(indio_dev); - - ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, - AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); - - kfree(st->channels); - kfree(st->iio_attr); - - return 0; } static const struct spi_device_id ad7280_id[] = { @@ -982,7 +1038,6 @@ static struct spi_driver ad7280_driver = { .name = "ad7280", }, .probe = ad7280_probe, - .remove = ad7280_remove, .id_table = ad7280_id, }; module_spi_driver(ad7280_driver); diff --git a/drivers/staging/iio/adc/ad7606.c b/drivers/staging/iio/adc/ad7606.c deleted file mode 100644 index 048c205b979e..000000000000 --- a/drivers/staging/iio/adc/ad7606.c +++ /dev/null @@ -1,563 +0,0 @@ -/* - * AD7606 SPI ADC driver - * - * Copyright 2011 Analog Devices Inc. - * - * Licensed under the GPL-2. - */ - -#include <linux/interrupt.h> -#include <linux/device.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/sysfs.h> -#include <linux/regulator/consumer.h> -#include <linux/err.h> -#include <linux/gpio/consumer.h> -#include <linux/delay.h> -#include <linux/sched.h> -#include <linux/module.h> - -#include <linux/iio/iio.h> -#include <linux/iio/sysfs.h> -#include <linux/iio/buffer.h> -#include <linux/iio/trigger_consumer.h> -#include <linux/iio/triggered_buffer.h> - -#include "ad7606.h" - -/* - * Scales are computed as 5000/32768 and 10000/32768 respectively, - * so that when applied to the raw values they provide mV values - */ -static const unsigned int scale_avail[2][2] = { - {0, 152588}, {0, 305176} -}; - -static int ad7606_reset(struct ad7606_state *st) -{ - if (st->gpio_reset) { - gpiod_set_value(st->gpio_reset, 1); - ndelay(100); /* t_reset >= 100ns */ - gpiod_set_value(st->gpio_reset, 0); - return 0; - } - - return -ENODEV; -} - -static int ad7606_read_samples(struct ad7606_state *st) -{ - unsigned int num = st->chip_info->num_channels; - u16 *data = st->data; - int ret; - - /* - * The frstdata signal is set to high while and after reading the sample - * of the first channel and low for all other channels. This can be used - * to check that the incoming data is correctly aligned. During normal - * operation the data should never become unaligned, but some glitch or - * electrostatic discharge might cause an extra read or clock cycle. - * Monitoring the frstdata signal allows to recover from such failure - * situations. - */ - - if (st->gpio_frstdata) { - ret = st->bops->read_block(st->dev, 1, data); - if (ret) - return ret; - - if (!gpiod_get_value(st->gpio_frstdata)) { - ad7606_reset(st); - return -EIO; - } - - data++; - num--; - } - - return st->bops->read_block(st->dev, num, data); -} - -static irqreturn_t ad7606_trigger_handler(int irq, void *p) -{ - struct iio_poll_func *pf = p; - struct ad7606_state *st = iio_priv(pf->indio_dev); - - gpiod_set_value(st->gpio_convst, 1); - - return IRQ_HANDLED; -} - -/** - * ad7606_poll_bh_to_ring() bh of trigger launched polling to ring buffer - * @work_s: the work struct through which this was scheduled - * - * Currently there is no option in this driver to disable the saving of - * timestamps within the ring. - * I think the one copy of this at a time was to avoid problems if the - * trigger was set far too high and the reads then locked up the computer. - **/ -static void ad7606_poll_bh_to_ring(struct work_struct *work_s) -{ - struct ad7606_state *st = container_of(work_s, struct ad7606_state, - poll_work); - struct iio_dev *indio_dev = iio_priv_to_dev(st); - int ret; - - ret = ad7606_read_samples(st); - if (ret == 0) - iio_push_to_buffers_with_timestamp(indio_dev, st->data, - iio_get_time_ns(indio_dev)); - - gpiod_set_value(st->gpio_convst, 0); - iio_trigger_notify_done(indio_dev->trig); -} - -static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) -{ - struct ad7606_state *st = iio_priv(indio_dev); - int ret; - - st->done = false; - gpiod_set_value(st->gpio_convst, 1); - - ret = wait_event_interruptible(st->wq_data_avail, st->done); - if (ret) - goto error_ret; - - ret = ad7606_read_samples(st); - if (ret == 0) - ret = st->data[ch]; - -error_ret: - gpiod_set_value(st->gpio_convst, 0); - - return ret; -} - -static int ad7606_read_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int *val, - int *val2, - long m) -{ - int ret; - struct ad7606_state *st = iio_priv(indio_dev); - - switch (m) { - case IIO_CHAN_INFO_RAW: - ret = iio_device_claim_direct_mode(indio_dev); - if (ret) - return ret; - - ret = ad7606_scan_direct(indio_dev, chan->address); - iio_device_release_direct_mode(indio_dev); - - if (ret < 0) - return ret; - *val = (short)ret; - return IIO_VAL_INT; - case IIO_CHAN_INFO_SCALE: - *val = scale_avail[st->range][0]; - *val2 = scale_avail[st->range][1]; - return IIO_VAL_INT_PLUS_MICRO; - case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - *val = st->oversampling; - return IIO_VAL_INT; - } - return -EINVAL; -} - -static ssize_t in_voltage_scale_available_show(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - int i, len = 0; - - for (i = 0; i < ARRAY_SIZE(scale_avail); i++) - len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06u ", - scale_avail[i][0], scale_avail[i][1]); - - buf[len - 1] = '\n'; - - return len; -} - -static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); - -static int ad7606_oversampling_get_index(unsigned int val) -{ - unsigned char supported[] = {1, 2, 4, 8, 16, 32, 64}; - int i; - - for (i = 0; i < ARRAY_SIZE(supported); i++) - if (val == supported[i]) - return i; - - return -EINVAL; -} - -static int ad7606_write_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int val, - int val2, - long mask) -{ - struct ad7606_state *st = iio_priv(indio_dev); - DECLARE_BITMAP(values, 3); - int ret, i; - - switch (mask) { - case IIO_CHAN_INFO_SCALE: - ret = -EINVAL; - mutex_lock(&st->lock); - for (i = 0; i < ARRAY_SIZE(scale_avail); i++) - if (val2 == scale_avail[i][1]) { - gpiod_set_value(st->gpio_range, i); - st->range = i; - - ret = 0; - break; - } - mutex_unlock(&st->lock); - - return ret; - case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - if (val2) - return -EINVAL; - ret = ad7606_oversampling_get_index(val); - if (ret < 0) - return ret; - - values[0] = ret; - - mutex_lock(&st->lock); - gpiod_set_array_value(3, st->gpio_os->desc, st->gpio_os->info, - values); - st->oversampling = val; - mutex_unlock(&st->lock); - - return 0; - default: - return -EINVAL; - } -} - -static IIO_CONST_ATTR(oversampling_ratio_available, "1 2 4 8 16 32 64"); - -static struct attribute *ad7606_attributes_os_and_range[] = { - &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, - &iio_const_attr_oversampling_ratio_available.dev_attr.attr, - NULL, -}; - -static const struct attribute_group ad7606_attribute_group_os_and_range = { - .attrs = ad7606_attributes_os_and_range, -}; - -static struct attribute *ad7606_attributes_os[] = { - &iio_const_attr_oversampling_ratio_available.dev_attr.attr, - NULL, -}; - -static const struct attribute_group ad7606_attribute_group_os = { - .attrs = ad7606_attributes_os, -}; - -static struct attribute *ad7606_attributes_range[] = { - &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, - NULL, -}; - -static const struct attribute_group ad7606_attribute_group_range = { - .attrs = ad7606_attributes_range, -}; - -#define AD760X_CHANNEL(num, mask) \ - { \ - .type = IIO_VOLTAGE, \ - .indexed = 1, \ - .channel = num, \ - .address = num, \ - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ - .info_mask_shared_by_all = mask, \ - .scan_index = num, \ - .scan_type = { \ - .sign = 's', \ - .realbits = 16, \ - .storagebits = 16, \ - .endianness = IIO_CPU, \ - }, \ - } - -#define AD7605_CHANNEL(num) \ - AD760X_CHANNEL(num, 0) - -#define AD7606_CHANNEL(num) \ - AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) - -static const struct iio_chan_spec ad7605_channels[] = { - IIO_CHAN_SOFT_TIMESTAMP(4), - AD7605_CHANNEL(0), - AD7605_CHANNEL(1), - AD7605_CHANNEL(2), - AD7605_CHANNEL(3), -}; - -static const struct iio_chan_spec ad7606_channels[] = { - IIO_CHAN_SOFT_TIMESTAMP(8), - AD7606_CHANNEL(0), - AD7606_CHANNEL(1), - AD7606_CHANNEL(2), - AD7606_CHANNEL(3), - AD7606_CHANNEL(4), - AD7606_CHANNEL(5), - AD7606_CHANNEL(6), - AD7606_CHANNEL(7), -}; - -static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { - /* - * More devices added in future - */ - [ID_AD7605_4] = { - .channels = ad7605_channels, - .num_channels = 5, - }, - [ID_AD7606_8] = { - .channels = ad7606_channels, - .num_channels = 9, - .has_oversampling = true, - }, - [ID_AD7606_6] = { - .channels = ad7606_channels, - .num_channels = 7, - .has_oversampling = true, - }, - [ID_AD7606_4] = { - .channels = ad7606_channels, - .num_channels = 5, - .has_oversampling = true, - }, -}; - -static int ad7606_request_gpios(struct ad7606_state *st) -{ - struct device *dev = st->dev; - - st->gpio_convst = devm_gpiod_get(dev, "conversion-start", - GPIOD_OUT_LOW); - if (IS_ERR(st->gpio_convst)) - return PTR_ERR(st->gpio_convst); - - st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); - if (IS_ERR(st->gpio_reset)) - return PTR_ERR(st->gpio_reset); - - st->gpio_range = devm_gpiod_get_optional(dev, "range", GPIOD_OUT_LOW); - if (IS_ERR(st->gpio_range)) - return PTR_ERR(st->gpio_range); - - st->gpio_standby = devm_gpiod_get_optional(dev, "standby", - GPIOD_OUT_HIGH); - if (IS_ERR(st->gpio_standby)) - return PTR_ERR(st->gpio_standby); - - st->gpio_frstdata = devm_gpiod_get_optional(dev, "first-data", - GPIOD_IN); - if (IS_ERR(st->gpio_frstdata)) - return PTR_ERR(st->gpio_frstdata); - - if (!st->chip_info->has_oversampling) - return 0; - - st->gpio_os = devm_gpiod_get_array_optional(dev, "oversampling-ratio", - GPIOD_OUT_LOW); - return PTR_ERR_OR_ZERO(st->gpio_os); -} - -/** - * Interrupt handler - */ -static irqreturn_t ad7606_interrupt(int irq, void *dev_id) -{ - struct iio_dev *indio_dev = dev_id; - struct ad7606_state *st = iio_priv(indio_dev); - - if (iio_buffer_enabled(indio_dev)) { - schedule_work(&st->poll_work); - } else { - st->done = true; - wake_up_interruptible(&st->wq_data_avail); - } - - return IRQ_HANDLED; -}; - -static const struct iio_info ad7606_info_no_os_or_range = { - .read_raw = &ad7606_read_raw, -}; - -static const struct iio_info ad7606_info_os_and_range = { - .read_raw = &ad7606_read_raw, - .write_raw = &ad7606_write_raw, - .attrs = &ad7606_attribute_group_os_and_range, -}; - -static const struct iio_info ad7606_info_os = { - .read_raw = &ad7606_read_raw, - .write_raw = &ad7606_write_raw, - .attrs = &ad7606_attribute_group_os, -}; - -static const struct iio_info ad7606_info_range = { - .read_raw = &ad7606_read_raw, - .write_raw = &ad7606_write_raw, - .attrs = &ad7606_attribute_group_range, -}; - -int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, - const char *name, unsigned int id, - const struct ad7606_bus_ops *bops) -{ - struct ad7606_state *st; - int ret; - struct iio_dev *indio_dev; - - indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); - if (!indio_dev) - return -ENOMEM; - - st = iio_priv(indio_dev); - - st->dev = dev; - mutex_init(&st->lock); - st->bops = bops; - st->base_address = base_address; - /* tied to logic low, analog input range is +/- 5V */ - st->range = 0; - st->oversampling = 1; - INIT_WORK(&st->poll_work, &ad7606_poll_bh_to_ring); - - st->reg = devm_regulator_get(dev, "avcc"); - if (IS_ERR(st->reg)) - return PTR_ERR(st->reg); - - ret = regulator_enable(st->reg); - if (ret) { - dev_err(dev, "Failed to enable specified AVcc supply\n"); - return ret; - } - - st->chip_info = &ad7606_chip_info_tbl[id]; - - ret = ad7606_request_gpios(st); - if (ret) - goto error_disable_reg; - - indio_dev->dev.parent = dev; - if (st->gpio_os) { - if (st->gpio_range) - indio_dev->info = &ad7606_info_os_and_range; - else - indio_dev->info = &ad7606_info_os; - } else { - if (st->gpio_range) - indio_dev->info = &ad7606_info_range; - else - indio_dev->info = &ad7606_info_no_os_or_range; - } - indio_dev->modes = INDIO_DIRECT_MODE; - indio_dev->name = name; - indio_dev->channels = st->chip_info->channels; - indio_dev->num_channels = st->chip_info->num_channels; - - init_waitqueue_head(&st->wq_data_avail); - - ret = ad7606_reset(st); - if (ret) - dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); - - ret = request_irq(irq, ad7606_interrupt, IRQF_TRIGGER_FALLING, name, - indio_dev); - if (ret) - goto error_disable_reg; - - ret = iio_triggered_buffer_setup(indio_dev, &ad7606_trigger_handler, - NULL, NULL); - if (ret) - goto error_free_irq; - - ret = iio_device_register(indio_dev); - if (ret) - goto error_unregister_ring; - - dev_set_drvdata(dev, indio_dev); - - return 0; -error_unregister_ring: - iio_triggered_buffer_cleanup(indio_dev); - -error_free_irq: - free_irq(irq, indio_dev); - -error_disable_reg: - regulator_disable(st->reg); - return ret; -} -EXPORT_SYMBOL_GPL(ad7606_probe); - -int ad7606_remove(struct device *dev, int irq) -{ - struct iio_dev *indio_dev = dev_get_drvdata(dev); - struct ad7606_state *st = iio_priv(indio_dev); - - iio_device_unregister(indio_dev); - iio_triggered_buffer_cleanup(indio_dev); - - free_irq(irq, indio_dev); - regulator_disable(st->reg); - - return 0; -} -EXPORT_SYMBOL_GPL(ad7606_remove); - -#ifdef CONFIG_PM_SLEEP - -static int ad7606_suspend(struct device *dev) -{ - struct iio_dev *indio_dev = dev_get_drvdata(dev); - struct ad7606_state *st = iio_priv(indio_dev); - - if (st->gpio_standby) { - gpiod_set_value(st->gpio_range, 1); - gpiod_set_value(st->gpio_standby, 0); - } - - return 0; -} - -static int ad7606_resume(struct device *dev) -{ - struct iio_dev *indio_dev = dev_get_drvdata(dev); - struct ad7606_state *st = iio_priv(indio_dev); - - if (st->gpio_standby) { - gpiod_set_value(st->gpio_range, st->range); - gpiod_set_value(st->gpio_standby, 1); - ad7606_reset(st); - } - - return 0; -} - -SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume); -EXPORT_SYMBOL_GPL(ad7606_pm_ops); - -#endif - -MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); -MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/ad7606.h b/drivers/staging/iio/adc/ad7606.h deleted file mode 100644 index 86188054b60b..000000000000 --- a/drivers/staging/iio/adc/ad7606.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * AD7606 ADC driver - * - * Copyright 2011 Analog Devices Inc. - * - * Licensed under the GPL-2. - */ - -#ifndef IIO_ADC_AD7606_H_ -#define IIO_ADC_AD7606_H_ - -/** - * struct ad7606_chip_info - chip specific information - * @channels: channel specification - * @num_channels: number of channels - * @has_oversampling: whether the device has oversampling support - */ - -struct ad7606_chip_info { - const struct iio_chan_spec *channels; - unsigned int num_channels; - bool has_oversampling; -}; - -/** - * struct ad7606_state - driver instance specific data - * @dev pointer to kernel device - * @chip_info entry in the table of chips that describes this device - * @reg regulator info for the the power supply of the device - * @poll_work work struct for continuously reading data from the device - * into an IIO triggered buffer - * @wq_data_avail wait queue struct for buffer mode - * @bops bus operations (SPI or parallel) - * @range voltage range selection, selects which scale to apply - * @oversampling oversampling selection - * @done marks whether reading data is done - * @base_address address from where to read data in parallel operation - * @lock protect sensor state from concurrent accesses to GPIOs - * @gpio_convst GPIO descriptor for conversion start signal (CONVST) - * @gpio_reset GPIO descriptor for device hard-reset - * @gpio_range GPIO descriptor for range selection - * @gpio_standby GPIO descriptor for stand-by signal (STBY), - * controls power-down mode of device - * @gpio_frstdata GPIO descriptor for reading from device when data - * is being read on the first channel - * @gpio_os GPIO descriptors to control oversampling on the device - * @data buffer for reading data from the device - */ - -struct ad7606_state { - struct device *dev; - const struct ad7606_chip_info *chip_info; - struct regulator *reg; - struct work_struct poll_work; - wait_queue_head_t wq_data_avail; - const struct ad7606_bus_ops *bops; - unsigned int range; - unsigned int oversampling; - bool done; - void __iomem *base_address; - - struct mutex lock; /* protect sensor state */ - struct gpio_desc *gpio_convst; - struct gpio_desc *gpio_reset; - struct gpio_desc *gpio_range; - struct gpio_desc *gpio_standby; - struct gpio_desc *gpio_frstdata; - struct gpio_descs *gpio_os; - - /* - * DMA (thus cache coherency maintenance) requires the - * transfer buffers to live in their own cache lines. - * 8 * 16-bit samples + 64-bit timestamp - */ - unsigned short data[12] ____cacheline_aligned; -}; - -/** - * struct ad7606_bus_ops - driver bus operations - * @read_block function pointer for reading blocks of data - */ -struct ad7606_bus_ops { - /* more methods added in future? */ - int (*read_block)(struct device *dev, int num, void *data); -}; - -int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, - const char *name, unsigned int id, - const struct ad7606_bus_ops *bops); -int ad7606_remove(struct device *dev, int irq); - -enum ad7606_supported_device_ids { - ID_AD7605_4, - ID_AD7606_8, - ID_AD7606_6, - ID_AD7606_4 -}; - -#ifdef CONFIG_PM_SLEEP -extern const struct dev_pm_ops ad7606_pm_ops; -#define AD7606_PM_OPS (&ad7606_pm_ops) -#else -#define AD7606_PM_OPS NULL -#endif - -#endif /* IIO_ADC_AD7606_H_ */ diff --git a/drivers/staging/iio/adc/ad7606_par.c b/drivers/staging/iio/adc/ad7606_par.c deleted file mode 100644 index 8bd86e727b02..000000000000 --- a/drivers/staging/iio/adc/ad7606_par.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - * AD7606 Parallel Interface ADC driver - * - * Copyright 2011 Analog Devices Inc. - * - * Licensed under the GPL-2. - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/types.h> -#include <linux/err.h> -#include <linux/io.h> - -#include <linux/iio/iio.h> -#include "ad7606.h" - -static int ad7606_par16_read_block(struct device *dev, - int count, void *buf) -{ - struct iio_dev *indio_dev = dev_get_drvdata(dev); - struct ad7606_state *st = iio_priv(indio_dev); - - insw((unsigned long)st->base_address, buf, count); - - return 0; -} - -static const struct ad7606_bus_ops ad7606_par16_bops = { - .read_block = ad7606_par16_read_block, -}; - -static int ad7606_par8_read_block(struct device *dev, - int count, void *buf) -{ - struct iio_dev *indio_dev = dev_get_drvdata(dev); - struct ad7606_state *st = iio_priv(indio_dev); - - insb((unsigned long)st->base_address, buf, count * 2); - - return 0; -} - -static const struct ad7606_bus_ops ad7606_par8_bops = { - .read_block = ad7606_par8_read_block, -}; - -static int ad7606_par_probe(struct platform_device *pdev) -{ - const struct platform_device_id *id = platform_get_device_id(pdev); - struct resource *res; - void __iomem *addr; - resource_size_t remap_size; - int irq; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) { - dev_err(&pdev->dev, "no irq: %d\n", irq); - return irq; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - addr = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(addr)) - return PTR_ERR(addr); - - remap_size = resource_size(res); - - return ad7606_probe(&pdev->dev, irq, addr, - id->name, id->driver_data, - remap_size > 1 ? &ad7606_par16_bops : - &ad7606_par8_bops); -} - -static int ad7606_par_remove(struct platform_device *pdev) -{ - return ad7606_remove(&pdev->dev, platform_get_irq(pdev, 0)); -} - -static const struct platform_device_id ad7606_driver_ids[] = { - { - .name = "ad7605-4", - .driver_data = ID_AD7605_4, - }, { - .name = "ad7606-8", - .driver_data = ID_AD7606_8, - }, { - .name = "ad7606-6", - .driver_data = ID_AD7606_6, - }, { - .name = "ad7606-4", - .driver_data = ID_AD7606_4, - }, - { } -}; - -MODULE_DEVICE_TABLE(platform, ad7606_driver_ids); - -static struct platform_driver ad7606_driver = { - .probe = ad7606_par_probe, - .remove = ad7606_par_remove, - .id_table = ad7606_driver_ids, - .driver = { - .name = "ad7606", - .pm = AD7606_PM_OPS, - }, -}; - -module_platform_driver(ad7606_driver); - -MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); -MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/ad7606_spi.c b/drivers/staging/iio/adc/ad7606_spi.c deleted file mode 100644 index b76ca5a8c059..000000000000 --- a/drivers/staging/iio/adc/ad7606_spi.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * AD7606 SPI ADC driver - * - * Copyright 2011 Analog Devices Inc. - * - * Licensed under the GPL-2. - */ - -#include <linux/module.h> -#include <linux/spi/spi.h> -#include <linux/types.h> -#include <linux/err.h> - -#include <linux/iio/iio.h> -#include "ad7606.h" - -#define MAX_SPI_FREQ_HZ 23500000 /* VDRIVE above 4.75 V */ - -static int ad7606_spi_read_block(struct device *dev, - int count, void *buf) -{ - struct spi_device *spi = to_spi_device(dev); - int i, ret; - unsigned short *data = buf; - __be16 *bdata = buf; - - ret = spi_read(spi, buf, count * 2); - if (ret < 0) { - dev_err(&spi->dev, "SPI read error\n"); - return ret; - } - - for (i = 0; i < count; i++) - data[i] = be16_to_cpu(bdata[i]); - - return 0; -} - -static const struct ad7606_bus_ops ad7606_spi_bops = { - .read_block = ad7606_spi_read_block, -}; - -static int ad7606_spi_probe(struct spi_device *spi) -{ - const struct spi_device_id *id = spi_get_device_id(spi); - - return ad7606_probe(&spi->dev, spi->irq, NULL, - id->name, id->driver_data, - &ad7606_spi_bops); -} - -static int ad7606_spi_remove(struct spi_device *spi) -{ - return ad7606_remove(&spi->dev, spi->irq); -} - -static const struct spi_device_id ad7606_id[] = { - {"ad7605-4", ID_AD7605_4}, - {"ad7606-8", ID_AD7606_8}, - {"ad7606-6", ID_AD7606_6}, - {"ad7606-4", ID_AD7606_4}, - {} -}; -MODULE_DEVICE_TABLE(spi, ad7606_id); - -static struct spi_driver ad7606_driver = { - .driver = { - .name = "ad7606", - .pm = AD7606_PM_OPS, - }, - .probe = ad7606_spi_probe, - .remove = ad7606_spi_remove, - .id_table = ad7606_id, -}; -module_spi_driver(ad7606_driver); - -MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); -MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/ad7780.c b/drivers/staging/iio/adc/ad7780.c index b67412db0318..c4a85789c2db 100644 --- a/drivers/staging/iio/adc/ad7780.c +++ b/drivers/staging/iio/adc/ad7780.c @@ -22,19 +22,28 @@ #include <linux/iio/sysfs.h> #include <linux/iio/adc/ad_sigma_delta.h> -#define AD7780_RDY BIT(7) -#define AD7780_FILTER BIT(6) -#define AD7780_ERR BIT(5) -#define AD7780_ID1 BIT(4) -#define AD7780_ID0 BIT(3) -#define AD7780_GAIN BIT(2) -#define AD7780_PAT1 BIT(1) -#define AD7780_PAT0 BIT(0) +#define AD7780_RDY BIT(7) +#define AD7780_FILTER BIT(6) +#define AD7780_ERR BIT(5) +#define AD7780_ID1 BIT(4) +#define AD7780_ID0 BIT(3) +#define AD7780_GAIN BIT(2) +#define AD7780_PAT1 BIT(1) +#define AD7780_PAT0 BIT(0) + +#define AD7780_PATTERN (AD7780_PAT0) +#define AD7780_PATTERN_MASK (AD7780_PAT0 | AD7780_PAT1) + +#define AD7170_PAT2 BIT(2) + +#define AD7170_PATTERN (AD7780_PAT0 | AD7170_PAT2) +#define AD7170_PATTERN_MASK (AD7780_PAT0 | AD7780_PAT1 | AD7170_PAT2) struct ad7780_chip_info { struct iio_chan_spec channel; unsigned int pattern_mask; unsigned int pattern; + bool is_ad778x; }; struct ad7780_state { @@ -42,7 +51,6 @@ struct ad7780_state { struct regulator *reg; struct gpio_desc *powerdown_gpio; unsigned int gain; - u16 int_vref_mv; struct ad_sigma_delta sd; }; @@ -87,16 +95,20 @@ static int ad7780_read_raw(struct iio_dev *indio_dev, long m) { struct ad7780_state *st = iio_priv(indio_dev); + int voltage_uv; switch (m) { case IIO_CHAN_INFO_RAW: return ad_sigma_delta_single_conversion(indio_dev, chan, val); case IIO_CHAN_INFO_SCALE: - *val = st->int_vref_mv * st->gain; + voltage_uv = regulator_get_voltage(st->reg); + if (voltage_uv < 0) + return voltage_uv; + *val = (voltage_uv / 1000) * st->gain; *val2 = chan->scan_type.realbits - 1; return IIO_VAL_FRACTIONAL_LOG2; case IIO_CHAN_INFO_OFFSET: - *val -= (1 << (chan->scan_type.realbits - 1)); + *val = -(1 << (chan->scan_type.realbits - 1)); return IIO_VAL_INT; } @@ -113,10 +125,12 @@ static int ad7780_postprocess_sample(struct ad_sigma_delta *sigma_delta, ((raw_sample & chip_info->pattern_mask) != chip_info->pattern)) return -EIO; - if (raw_sample & AD7780_GAIN) - st->gain = 1; - else - st->gain = 128; + if (chip_info->is_ad778x) { + if (raw_sample & AD7780_GAIN) + st->gain = 1; + else + st->gain = 128; + } return 0; } @@ -133,23 +147,27 @@ static const struct ad_sigma_delta_info ad7780_sigma_delta_info = { static const struct ad7780_chip_info ad7780_chip_info_tbl[] = { [ID_AD7170] = { .channel = AD7780_CHANNEL(12, 24), - .pattern = 0x5, - .pattern_mask = 0x7, + .pattern = AD7170_PATTERN, + .pattern_mask = AD7170_PATTERN_MASK, + .is_ad778x = false, }, [ID_AD7171] = { .channel = AD7780_CHANNEL(16, 24), - .pattern = 0x5, - .pattern_mask = 0x7, + .pattern = AD7170_PATTERN, + .pattern_mask = AD7170_PATTERN_MASK, + .is_ad778x = false, }, [ID_AD7780] = { .channel = AD7780_CHANNEL(24, 32), - .pattern = 0x1, - .pattern_mask = 0x3, + .pattern = AD7780_PATTERN, + .pattern_mask = AD7780_PATTERN_MASK, + .is_ad778x = true, }, [ID_AD7781] = { .channel = AD7780_CHANNEL(20, 32), - .pattern = 0x1, - .pattern_mask = 0x3, + .pattern = AD7780_PATTERN, + .pattern_mask = AD7780_PATTERN_MASK, + .is_ad778x = true, }, }; @@ -161,7 +179,7 @@ static int ad7780_probe(struct spi_device *spi) { struct ad7780_state *st; struct iio_dev *indio_dev; - int ret, voltage_uv = 0; + int ret; indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); if (!indio_dev) @@ -181,16 +199,10 @@ static int ad7780_probe(struct spi_device *spi) dev_err(&spi->dev, "Failed to enable specified AVdd supply\n"); return ret; } - voltage_uv = regulator_get_voltage(st->reg); st->chip_info = &ad7780_chip_info_tbl[spi_get_device_id(spi)->driver_data]; - if (voltage_uv) - st->int_vref_mv = voltage_uv / 1000; - else - dev_warn(&spi->dev, "Reference voltage unspecified\n"); - spi_set_drvdata(spi, indio_dev); indio_dev->dev.parent = &spi->dev; diff --git a/drivers/staging/iio/adc/ad7816.c b/drivers/staging/iio/adc/ad7816.c index bf76a8620bdb..ee50e7296795 100644 --- a/drivers/staging/iio/adc/ad7816.c +++ b/drivers/staging/iio/adc/ad7816.c @@ -7,7 +7,7 @@ */ #include <linux/interrupt.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/device.h> #include <linux/kernel.h> #include <linux/slab.h> @@ -43,46 +43,55 @@ */ struct ad7816_chip_info { + kernel_ulong_t id; struct spi_device *spi_dev; - u16 rdwr_pin; - u16 convert_pin; - u16 busy_pin; + struct gpio_desc *rdwr_pin; + struct gpio_desc *convert_pin; + struct gpio_desc *busy_pin; u8 oti_data[AD7816_CS_MAX + 1]; u8 channel_id; /* 0 always be temperature */ u8 mode; }; +enum ad7816_type { + ID_AD7816, + ID_AD7817, + ID_AD7818, +}; + /* * ad7816 data access by SPI */ static int ad7816_spi_read(struct ad7816_chip_info *chip, u16 *data) { struct spi_device *spi_dev = chip->spi_dev; - int ret = 0; + int ret; __be16 buf; - gpio_set_value(chip->rdwr_pin, 1); - gpio_set_value(chip->rdwr_pin, 0); + gpiod_set_value(chip->rdwr_pin, 1); + gpiod_set_value(chip->rdwr_pin, 0); ret = spi_write(spi_dev, &chip->channel_id, sizeof(chip->channel_id)); if (ret < 0) { dev_err(&spi_dev->dev, "SPI channel setting error\n"); return ret; } - gpio_set_value(chip->rdwr_pin, 1); + gpiod_set_value(chip->rdwr_pin, 1); if (chip->mode == AD7816_PD) { /* operating mode 2 */ - gpio_set_value(chip->convert_pin, 1); - gpio_set_value(chip->convert_pin, 0); + gpiod_set_value(chip->convert_pin, 1); + gpiod_set_value(chip->convert_pin, 0); } else { /* operating mode 1 */ - gpio_set_value(chip->convert_pin, 0); - gpio_set_value(chip->convert_pin, 1); + gpiod_set_value(chip->convert_pin, 0); + gpiod_set_value(chip->convert_pin, 1); } - while (gpio_get_value(chip->busy_pin)) - cpu_relax(); + if (chip->id == ID_AD7816 || chip->id == ID_AD7817) { + while (gpiod_get_value(chip->busy_pin)) + cpu_relax(); + } - gpio_set_value(chip->rdwr_pin, 0); - gpio_set_value(chip->rdwr_pin, 1); + gpiod_set_value(chip->rdwr_pin, 0); + gpiod_set_value(chip->rdwr_pin, 1); ret = spi_read(spi_dev, &buf, sizeof(*data)); if (ret < 0) { dev_err(&spi_dev->dev, "SPI data read error\n"); @@ -97,10 +106,10 @@ static int ad7816_spi_read(struct ad7816_chip_info *chip, u16 *data) static int ad7816_spi_write(struct ad7816_chip_info *chip, u8 data) { struct spi_device *spi_dev = chip->spi_dev; - int ret = 0; + int ret; - gpio_set_value(chip->rdwr_pin, 1); - gpio_set_value(chip->rdwr_pin, 0); + gpiod_set_value(chip->rdwr_pin, 1); + gpiod_set_value(chip->rdwr_pin, 0); ret = spi_write(spi_dev, &data, sizeof(data)); if (ret < 0) dev_err(&spi_dev->dev, "SPI oti data write error\n"); @@ -129,10 +138,10 @@ static ssize_t ad7816_store_mode(struct device *dev, struct ad7816_chip_info *chip = iio_priv(indio_dev); if (strcmp(buf, "full")) { - gpio_set_value(chip->rdwr_pin, 1); + gpiod_set_value(chip->rdwr_pin, 1); chip->mode = AD7816_FULL; } else { - gpio_set_value(chip->rdwr_pin, 0); + gpiod_set_value(chip->rdwr_pin, 0); chip->mode = AD7816_PD; } @@ -345,14 +354,7 @@ static int ad7816_probe(struct spi_device *spi_dev) { struct ad7816_chip_info *chip; struct iio_dev *indio_dev; - unsigned short *pins = dev_get_platdata(&spi_dev->dev); - int ret = 0; - int i; - - if (!pins) { - dev_err(&spi_dev->dev, "No necessary GPIO platform data.\n"); - return -EINVAL; - } + int i, ret; indio_dev = devm_iio_device_alloc(&spi_dev->dev, sizeof(*chip)); if (!indio_dev) @@ -364,34 +366,33 @@ static int ad7816_probe(struct spi_device *spi_dev) chip->spi_dev = spi_dev; for (i = 0; i <= AD7816_CS_MAX; i++) chip->oti_data[i] = 203; - chip->rdwr_pin = pins[0]; - chip->convert_pin = pins[1]; - chip->busy_pin = pins[2]; - - ret = devm_gpio_request(&spi_dev->dev, chip->rdwr_pin, - spi_get_device_id(spi_dev)->name); - if (ret) { - dev_err(&spi_dev->dev, "Fail to request rdwr gpio PIN %d.\n", - chip->rdwr_pin); + + chip->id = spi_get_device_id(spi_dev)->driver_data; + chip->rdwr_pin = devm_gpiod_get(&spi_dev->dev, "rdwr", GPIOD_OUT_HIGH); + if (IS_ERR(chip->rdwr_pin)) { + ret = PTR_ERR(chip->rdwr_pin); + dev_err(&spi_dev->dev, "Failed to request rdwr GPIO: %d\n", + ret); return ret; } - gpio_direction_input(chip->rdwr_pin); - ret = devm_gpio_request(&spi_dev->dev, chip->convert_pin, - spi_get_device_id(spi_dev)->name); - if (ret) { - dev_err(&spi_dev->dev, "Fail to request convert gpio PIN %d.\n", - chip->convert_pin); + chip->convert_pin = devm_gpiod_get(&spi_dev->dev, "convert", + GPIOD_OUT_HIGH); + if (IS_ERR(chip->convert_pin)) { + ret = PTR_ERR(chip->convert_pin); + dev_err(&spi_dev->dev, "Failed to request convert GPIO: %d\n", + ret); return ret; } - gpio_direction_input(chip->convert_pin); - ret = devm_gpio_request(&spi_dev->dev, chip->busy_pin, - spi_get_device_id(spi_dev)->name); - if (ret) { - dev_err(&spi_dev->dev, "Fail to request busy gpio PIN %d.\n", - chip->busy_pin); - return ret; + if (chip->id == ID_AD7816 || chip->id == ID_AD7817) { + chip->busy_pin = devm_gpiod_get(&spi_dev->dev, "busy", + GPIOD_IN); + if (IS_ERR(chip->busy_pin)) { + ret = PTR_ERR(chip->busy_pin); + dev_err(&spi_dev->dev, "Failed to request busy GPIO: %d\n", + ret); + return ret; + } } - gpio_direction_input(chip->busy_pin); indio_dev->name = spi_get_device_id(spi_dev)->name; indio_dev->dev.parent = &spi_dev->dev; @@ -420,10 +421,18 @@ static int ad7816_probe(struct spi_device *spi_dev) return 0; } +static const struct of_device_id ad7816_of_match[] = { + { .compatible = "adi,ad7816", }, + { .compatible = "adi,ad7817", }, + { .compatible = "adi,ad7818", }, + { } +}; +MODULE_DEVICE_TABLE(of, ad7816_of_match); + static const struct spi_device_id ad7816_id[] = { - { "ad7816", 0 }, - { "ad7817", 0 }, - { "ad7818", 0 }, + { "ad7816", ID_AD7816 }, + { "ad7817", ID_AD7817 }, + { "ad7818", ID_AD7818 }, {} }; @@ -432,6 +441,7 @@ MODULE_DEVICE_TABLE(spi, ad7816_id); static struct spi_driver ad7816_driver = { .driver = { .name = "ad7816", + .of_match_table = ad7816_of_match, }, .probe = ad7816_probe, .id_table = ad7816_id, diff --git a/drivers/staging/iio/addac/adt7316-i2c.c b/drivers/staging/iio/addac/adt7316-i2c.c index f66dd3ebbab1..0f26bc38edc6 100644 --- a/drivers/staging/iio/addac/adt7316-i2c.c +++ b/drivers/staging/iio/addac/adt7316-i2c.c @@ -35,13 +35,15 @@ static int adt7316_i2c_read(void *client, u8 reg, u8 *data) return ret; } + *data = ret; + return 0; } static int adt7316_i2c_write(void *client, u8 reg, u8 data) { struct i2c_client *cl = client; - int ret = 0; + int ret; ret = i2c_smbus_write_byte_data(cl, reg, data); if (ret < 0) @@ -53,7 +55,7 @@ static int adt7316_i2c_write(void *client, u8 reg, u8 data) static int adt7316_i2c_multi_read(void *client, u8 reg, u8 count, u8 *data) { struct i2c_client *cl = client; - int i, ret = 0; + int i, ret; if (count > ADT7316_REG_MAX_ADDR) count = ADT7316_REG_MAX_ADDR; @@ -72,7 +74,7 @@ static int adt7316_i2c_multi_read(void *client, u8 reg, u8 count, u8 *data) static int adt7316_i2c_multi_write(void *client, u8 reg, u8 count, u8 *data) { struct i2c_client *cl = client; - int i, ret = 0; + int i, ret; if (count > ADT7316_REG_MAX_ADDR) count = ADT7316_REG_MAX_ADDR; @@ -98,7 +100,6 @@ static int adt7316_i2c_probe(struct i2c_client *client, struct adt7316_bus bus = { .client = client, .irq = client->irq, - .irq_flags = IRQF_TRIGGER_LOW, .read = adt7316_i2c_read, .write = adt7316_i2c_write, .multi_read = adt7316_i2c_multi_read, @@ -120,9 +121,22 @@ static const struct i2c_device_id adt7316_i2c_id[] = { MODULE_DEVICE_TABLE(i2c, adt7316_i2c_id); +static const struct of_device_id adt7316_of_match[] = { + { .compatible = "adi,adt7316" }, + { .compatible = "adi,adt7317" }, + { .compatible = "adi,adt7318" }, + { .compatible = "adi,adt7516" }, + { .compatible = "adi,adt7517" }, + { .compatible = "adi,adt7519" }, + { }, +}; + +MODULE_DEVICE_TABLE(of, adt7316_of_match); + static struct i2c_driver adt7316_driver = { .driver = { .name = "adt7316", + .of_match_table = adt7316_of_match, .pm = ADT7316_PM_OPS, }, .probe = adt7316_i2c_probe, diff --git a/drivers/staging/iio/addac/adt7316-spi.c b/drivers/staging/iio/addac/adt7316-spi.c index 5cd22743e140..8294b9c1e3c2 100644 --- a/drivers/staging/iio/addac/adt7316-spi.c +++ b/drivers/staging/iio/addac/adt7316-spi.c @@ -27,7 +27,7 @@ static int adt7316_spi_multi_read(void *client, u8 reg, u8 count, u8 *data) { struct spi_device *spi_dev = client; u8 cmd[2]; - int ret = 0; + int ret; if (count > ADT7316_REG_MAX_ADDR) count = ADT7316_REG_MAX_ADDR; @@ -56,7 +56,7 @@ static int adt7316_spi_multi_write(void *client, u8 reg, u8 count, u8 *data) { struct spi_device *spi_dev = client; u8 buf[ADT7316_REG_MAX_ADDR + 2]; - int i, ret = 0; + int i, ret; if (count > ADT7316_REG_MAX_ADDR) count = ADT7316_REG_MAX_ADDR; @@ -94,7 +94,6 @@ static int adt7316_spi_probe(struct spi_device *spi_dev) struct adt7316_bus bus = { .client = spi_dev, .irq = spi_dev->irq, - .irq_flags = IRQF_TRIGGER_LOW, .read = adt7316_spi_read, .write = adt7316_spi_write, .multi_read = adt7316_spi_multi_read, diff --git a/drivers/staging/iio/addac/adt7316.c b/drivers/staging/iio/addac/adt7316.c index 3f22d1088713..6f7891b567b9 100644 --- a/drivers/staging/iio/addac/adt7316.c +++ b/drivers/staging/iio/addac/adt7316.c @@ -47,6 +47,8 @@ #define ADT7516_MSB_AIN3 0xA #define ADT7516_MSB_AIN4 0xB #define ADT7316_DA_DATA_BASE 0x10 +#define ADT7316_DA_10_BIT_LSB_SHIFT 6 +#define ADT7316_DA_12_BIT_LSB_SHIFT 4 #define ADT7316_DA_MSB_DATA_REGS 4 #define ADT7316_LSB_DAC_A 0x10 #define ADT7316_MSB_DAC_A 0x11 @@ -59,8 +61,8 @@ #define ADT7316_CONFIG1 0x18 #define ADT7316_CONFIG2 0x19 #define ADT7316_CONFIG3 0x1A -#define ADT7316_LDAC_CONFIG 0x1B -#define ADT7316_DAC_CONFIG 0x1C +#define ADT7316_DAC_CONFIG 0x1B +#define ADT7316_LDAC_CONFIG 0x1C #define ADT7316_INT_MASK1 0x1D #define ADT7316_INT_MASK2 0x1E #define ADT7316_IN_TEMP_OFFSET 0x1F @@ -117,7 +119,7 @@ */ #define ADT7316_ADCLK_22_5 0x1 #define ADT7316_DA_HIGH_RESOLUTION 0x2 -#define ADT7316_DA_EN_VIA_DAC_LDCA 0x4 +#define ADT7316_DA_EN_VIA_DAC_LDAC 0x8 #define ADT7516_AIN_IN_VREF 0x10 #define ADT7316_EN_IN_TEMP_PROP_DACA 0x20 #define ADT7316_EN_EX_TEMP_PROP_DACB 0x40 @@ -127,6 +129,7 @@ */ #define ADT7316_DA_2VREF_CH_MASK 0xF #define ADT7316_DA_EN_MODE_MASK 0x30 +#define ADT7316_DA_EN_MODE_SHIFT 4 #define ADT7316_DA_EN_MODE_SINGLE 0x00 #define ADT7316_DA_EN_MODE_AB_CD 0x10 #define ADT7316_DA_EN_MODE_ABCD 0x20 @@ -177,7 +180,7 @@ struct adt7316_chip_info { struct adt7316_bus bus; - u16 ldac_pin; + struct gpio_desc *ldac_pin; u16 int_mask; /* 0x2f */ u8 config1; u8 config2; @@ -217,8 +220,8 @@ struct adt7316_limit_regs { }; static ssize_t adt7316_show_enabled(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -227,7 +230,7 @@ static ssize_t adt7316_show_enabled(struct device *dev, } static ssize_t _adt7316_store_enabled(struct adt7316_chip_info *chip, - int enable) + int enable) { u8 config1; int ret; @@ -247,9 +250,9 @@ static ssize_t _adt7316_store_enabled(struct adt7316_chip_info *chip, } static ssize_t adt7316_store_enabled(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -272,8 +275,8 @@ static IIO_DEVICE_ATTR(enabled, 0644, 0); static ssize_t adt7316_show_select_ex_temp(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -285,9 +288,9 @@ static ssize_t adt7316_show_select_ex_temp(struct device *dev, } static ssize_t adt7316_store_select_ex_temp(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -316,8 +319,8 @@ static IIO_DEVICE_ATTR(select_ex_temp, 0644, 0); static ssize_t adt7316_show_mode(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -329,9 +332,9 @@ static ssize_t adt7316_show_mode(struct device *dev, } static ssize_t adt7316_store_mode(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -357,8 +360,8 @@ static IIO_DEVICE_ATTR(mode, 0644, 0); static ssize_t adt7316_show_all_modes(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { return sprintf(buf, "single_channel\nround_robin\n"); } @@ -366,8 +369,8 @@ static ssize_t adt7316_show_all_modes(struct device *dev, static IIO_DEVICE_ATTR(all_modes, 0444, adt7316_show_all_modes, NULL, 0); static ssize_t adt7316_show_ad_channel(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -382,7 +385,7 @@ static ssize_t adt7316_show_ad_channel(struct device *dev, return sprintf(buf, "1 - Internal Temperature\n"); case ADT7316_AD_SINGLE_CH_EX: if (((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) && - (chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0) + (chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0) return sprintf(buf, "2 - AIN1\n"); return sprintf(buf, "2 - External Temperature\n"); @@ -404,9 +407,9 @@ static ssize_t adt7316_show_ad_channel(struct device *dev, } static ssize_t adt7316_store_ad_channel(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -450,8 +453,8 @@ static IIO_DEVICE_ATTR(ad_channel, 0644, 0); static ssize_t adt7316_show_all_ad_channels(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -471,8 +474,8 @@ static IIO_DEVICE_ATTR(all_ad_channels, 0444, adt7316_show_all_ad_channels, NULL, 0); static ssize_t adt7316_show_disable_averaging(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -482,9 +485,9 @@ static ssize_t adt7316_show_disable_averaging(struct device *dev, } static ssize_t adt7316_store_disable_averaging(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -510,8 +513,8 @@ static IIO_DEVICE_ATTR(disable_averaging, 0644, 0); static ssize_t adt7316_show_enable_smbus_timeout(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -521,9 +524,9 @@ static ssize_t adt7316_show_enable_smbus_timeout(struct device *dev, } static ssize_t adt7316_store_enable_smbus_timeout(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -549,8 +552,8 @@ static IIO_DEVICE_ATTR(enable_smbus_timeout, 0644, 0); static ssize_t adt7316_show_powerdown(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -559,9 +562,9 @@ static ssize_t adt7316_show_powerdown(struct device *dev, } static ssize_t adt7316_store_powerdown(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -587,8 +590,8 @@ static IIO_DEVICE_ATTR(powerdown, 0644, 0); static ssize_t adt7316_show_fast_ad_clock(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -597,9 +600,9 @@ static ssize_t adt7316_show_fast_ad_clock(struct device *dev, } static ssize_t adt7316_store_fast_ad_clock(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -625,16 +628,14 @@ static IIO_DEVICE_ATTR(fast_ad_clock, 0644, 0); static ssize_t adt7316_show_da_high_resolution(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); if (chip->config3 & ADT7316_DA_HIGH_RESOLUTION) { - if (chip->id == ID_ADT7316 || chip->id == ID_ADT7516) - return sprintf(buf, "1 (12 bits)\n"); - if (chip->id == ID_ADT7317 || chip->id == ID_ADT7517) + if (chip->id != ID_ADT7318 && chip->id != ID_ADT7519) return sprintf(buf, "1 (10 bits)\n"); } @@ -642,26 +643,21 @@ static ssize_t adt7316_show_da_high_resolution(struct device *dev, } static ssize_t adt7316_store_da_high_resolution(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); u8 config3; int ret; - chip->dac_bits = 8; + if (chip->id == ID_ADT7318 || chip->id == ID_ADT7519) + return -EPERM; - if (buf[0] == '1') { - config3 = chip->config3 | ADT7316_DA_HIGH_RESOLUTION; - if (chip->id == ID_ADT7316 || chip->id == ID_ADT7516) - chip->dac_bits = 12; - else if (chip->id == ID_ADT7317 || chip->id == ID_ADT7517) - chip->dac_bits = 10; - } else { - config3 = chip->config3 & (~ADT7316_DA_HIGH_RESOLUTION); - } + config3 = chip->config3 & (~ADT7316_DA_HIGH_RESOLUTION); + if (buf[0] == '1') + config3 |= ADT7316_DA_HIGH_RESOLUTION; ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG3, config3); if (ret) @@ -678,8 +674,8 @@ static IIO_DEVICE_ATTR(da_high_resolution, 0644, 0); static ssize_t adt7316_show_AIN_internal_Vref(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -692,9 +688,9 @@ static ssize_t adt7316_show_AIN_internal_Vref(struct device *dev, } static ssize_t adt7316_store_AIN_internal_Vref(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -724,8 +720,8 @@ static IIO_DEVICE_ATTR(AIN_internal_Vref, 0644, 0); static ssize_t adt7316_show_enable_prop_DACA(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -735,9 +731,9 @@ static ssize_t adt7316_show_enable_prop_DACA(struct device *dev, } static ssize_t adt7316_store_enable_prop_DACA(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -758,13 +754,13 @@ static ssize_t adt7316_store_enable_prop_DACA(struct device *dev, } static IIO_DEVICE_ATTR(enable_proportion_DACA, 0644, - adt7316_show_enable_prop_DACA, - adt7316_store_enable_prop_DACA, - 0); + adt7316_show_enable_prop_DACA, + adt7316_store_enable_prop_DACA, + 0); static ssize_t adt7316_show_enable_prop_DACB(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -774,9 +770,9 @@ static ssize_t adt7316_show_enable_prop_DACB(struct device *dev, } static ssize_t adt7316_store_enable_prop_DACB(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -797,13 +793,13 @@ static ssize_t adt7316_store_enable_prop_DACB(struct device *dev, } static IIO_DEVICE_ATTR(enable_proportion_DACB, 0644, - adt7316_show_enable_prop_DACB, - adt7316_store_enable_prop_DACB, - 0); + adt7316_show_enable_prop_DACB, + adt7316_store_enable_prop_DACB, + 0); static ssize_t adt7316_show_DAC_2Vref_ch_mask(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -813,9 +809,9 @@ static ssize_t adt7316_show_DAC_2Vref_ch_mask(struct device *dev, } static ssize_t adt7316_store_DAC_2Vref_ch_mask(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -840,18 +836,18 @@ static ssize_t adt7316_store_DAC_2Vref_ch_mask(struct device *dev, } static IIO_DEVICE_ATTR(DAC_2Vref_channels_mask, 0644, - adt7316_show_DAC_2Vref_ch_mask, - adt7316_store_DAC_2Vref_ch_mask, - 0); + adt7316_show_DAC_2Vref_ch_mask, + adt7316_store_DAC_2Vref_ch_mask, + 0); static ssize_t adt7316_show_DAC_update_mode(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); - if (!(chip->config3 & ADT7316_DA_EN_VIA_DAC_LDCA)) + if (!(chip->config3 & ADT7316_DA_EN_VIA_DAC_LDAC)) return sprintf(buf, "manual\n"); switch (chip->dac_config & ADT7316_DA_EN_MODE_MASK) { @@ -870,9 +866,9 @@ static ssize_t adt7316_show_DAC_update_mode(struct device *dev, } static ssize_t adt7316_store_DAC_update_mode(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -880,15 +876,15 @@ static ssize_t adt7316_store_DAC_update_mode(struct device *dev, u8 data; int ret; - if (!(chip->config3 & ADT7316_DA_EN_VIA_DAC_LDCA)) + if (!(chip->config3 & ADT7316_DA_EN_VIA_DAC_LDAC)) return -EPERM; ret = kstrtou8(buf, 10, &data); - if (ret || data > ADT7316_DA_EN_MODE_MASK) + if (ret || data > (ADT7316_DA_EN_MODE_MASK >> ADT7316_DA_EN_MODE_SHIFT)) return -EINVAL; dac_config = chip->dac_config & (~ADT7316_DA_EN_MODE_MASK); - dac_config |= data; + dac_config |= data << ADT7316_DA_EN_MODE_SHIFT; ret = chip->bus.write(chip->bus.client, ADT7316_DAC_CONFIG, dac_config); if (ret) @@ -900,18 +896,18 @@ static ssize_t adt7316_store_DAC_update_mode(struct device *dev, } static IIO_DEVICE_ATTR(DAC_update_mode, 0644, - adt7316_show_DAC_update_mode, - adt7316_store_DAC_update_mode, - 0); + adt7316_show_DAC_update_mode, + adt7316_store_DAC_update_mode, + 0); static ssize_t adt7316_show_all_DAC_update_modes(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); - if (chip->config3 & ADT7316_DA_EN_VIA_DAC_LDCA) + if (chip->config3 & ADT7316_DA_EN_VIA_DAC_LDAC) return sprintf(buf, "0 - auto at any MSB DAC writing\n" "1 - auto at MSB DAC AB and CD writing\n" "2 - auto at MSB DAC ABCD writing\n" @@ -920,12 +916,12 @@ static ssize_t adt7316_show_all_DAC_update_modes(struct device *dev, } static IIO_DEVICE_ATTR(all_DAC_update_modes, 0444, - adt7316_show_all_DAC_update_modes, NULL, 0); + adt7316_show_all_DAC_update_modes, NULL, 0); static ssize_t adt7316_store_update_DAC(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -933,7 +929,7 @@ static ssize_t adt7316_store_update_DAC(struct device *dev, u8 data; int ret; - if (chip->config3 & ADT7316_DA_EN_VIA_DAC_LDCA) { + if (chip->config3 & ADT7316_DA_EN_VIA_DAC_LDAC) { if ((chip->dac_config & ADT7316_DA_EN_MODE_MASK) != ADT7316_DA_EN_MODE_LDAC) return -EPERM; @@ -950,45 +946,39 @@ static ssize_t adt7316_store_update_DAC(struct device *dev, if (ret) return -EIO; } else { - gpio_set_value(chip->ldac_pin, 0); - gpio_set_value(chip->ldac_pin, 1); + gpiod_set_value(chip->ldac_pin, 0); + gpiod_set_value(chip->ldac_pin, 1); } return len; } static IIO_DEVICE_ATTR(update_DAC, 0644, - NULL, - adt7316_store_update_DAC, - 0); + NULL, + adt7316_store_update_DAC, + 0); static ssize_t adt7316_show_DA_AB_Vref_bypass(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); - if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) - return -EPERM; - return sprintf(buf, "%d\n", !!(chip->dac_config & ADT7316_VREF_BYPASS_DAC_AB)); } static ssize_t adt7316_store_DA_AB_Vref_bypass(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); u8 dac_config; int ret; - if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) - return -EPERM; - dac_config = chip->dac_config & (~ADT7316_VREF_BYPASS_DAC_AB); if (buf[0] == '1') dac_config |= ADT7316_VREF_BYPASS_DAC_AB; @@ -1003,37 +993,31 @@ static ssize_t adt7316_store_DA_AB_Vref_bypass(struct device *dev, } static IIO_DEVICE_ATTR(DA_AB_Vref_bypass, 0644, - adt7316_show_DA_AB_Vref_bypass, - adt7316_store_DA_AB_Vref_bypass, - 0); + adt7316_show_DA_AB_Vref_bypass, + adt7316_store_DA_AB_Vref_bypass, + 0); static ssize_t adt7316_show_DA_CD_Vref_bypass(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); - if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) - return -EPERM; - return sprintf(buf, "%d\n", !!(chip->dac_config & ADT7316_VREF_BYPASS_DAC_CD)); } static ssize_t adt7316_store_DA_CD_Vref_bypass(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); u8 dac_config; int ret; - if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) - return -EPERM; - dac_config = chip->dac_config & (~ADT7316_VREF_BYPASS_DAC_CD); if (buf[0] == '1') dac_config |= ADT7316_VREF_BYPASS_DAC_CD; @@ -1048,29 +1032,29 @@ static ssize_t adt7316_store_DA_CD_Vref_bypass(struct device *dev, } static IIO_DEVICE_ATTR(DA_CD_Vref_bypass, 0644, - adt7316_show_DA_CD_Vref_bypass, - adt7316_store_DA_CD_Vref_bypass, - 0); + adt7316_show_DA_CD_Vref_bypass, + adt7316_store_DA_CD_Vref_bypass, + 0); static ssize_t adt7316_show_DAC_internal_Vref(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) return sprintf(buf, "0x%x\n", - (chip->dac_config & ADT7516_DAC_IN_VREF_MASK) >> + (chip->ldac_config & ADT7516_DAC_IN_VREF_MASK) >> ADT7516_DAC_IN_VREF_OFFSET); return sprintf(buf, "%d\n", - !!(chip->dac_config & ADT7316_DAC_IN_VREF)); + !!(chip->ldac_config & ADT7316_DAC_IN_VREF)); } static ssize_t adt7316_store_DAC_internal_Vref(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1086,7 +1070,7 @@ static ssize_t adt7316_store_DAC_internal_Vref(struct device *dev, ldac_config = chip->ldac_config & (~ADT7516_DAC_IN_VREF_MASK); if (data & 0x1) ldac_config |= ADT7516_DAC_AB_IN_VREF; - else if (data & 0x2) + if (data & 0x2) ldac_config |= ADT7516_DAC_CD_IN_VREF; } else { ret = kstrtou8(buf, 16, &data); @@ -1109,12 +1093,12 @@ static ssize_t adt7316_store_DAC_internal_Vref(struct device *dev, } static IIO_DEVICE_ATTR(DAC_internal_Vref, 0644, - adt7316_show_DAC_internal_Vref, - adt7316_store_DAC_internal_Vref, - 0); + adt7316_show_DAC_internal_Vref, + adt7316_store_DAC_internal_Vref, + 0); static ssize_t adt7316_show_ad(struct adt7316_chip_info *chip, - int channel, char *buf) + int channel, char *buf) { u16 data; u8 msb, lsb; @@ -1122,7 +1106,7 @@ static ssize_t adt7316_show_ad(struct adt7316_chip_info *chip, int ret; if ((chip->config2 & ADT7316_AD_SINGLE_CH_MODE) && - channel != (chip->config2 & ADT7516_AD_SINGLE_CH_MASK)) + channel != (chip->config2 & ADT7516_AD_SINGLE_CH_MASK)) return -EPERM; switch (channel) { @@ -1189,8 +1173,8 @@ static ssize_t adt7316_show_ad(struct adt7316_chip_info *chip, } static ssize_t adt7316_show_VDD(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1200,8 +1184,8 @@ static ssize_t adt7316_show_VDD(struct device *dev, static IIO_DEVICE_ATTR(VDD, 0444, adt7316_show_VDD, NULL, 0); static ssize_t adt7316_show_in_temp(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1212,8 +1196,8 @@ static ssize_t adt7316_show_in_temp(struct device *dev, static IIO_DEVICE_ATTR(in_temp, 0444, adt7316_show_in_temp, NULL, 0); static ssize_t adt7316_show_ex_temp_AIN1(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1222,12 +1206,12 @@ static ssize_t adt7316_show_ex_temp_AIN1(struct device *dev, } static IIO_DEVICE_ATTR(ex_temp_AIN1, 0444, adt7316_show_ex_temp_AIN1, - NULL, 0); + NULL, 0); static IIO_DEVICE_ATTR(ex_temp, 0444, adt7316_show_ex_temp_AIN1, NULL, 0); static ssize_t adt7316_show_AIN2(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1237,8 +1221,8 @@ static ssize_t adt7316_show_AIN2(struct device *dev, static IIO_DEVICE_ATTR(AIN2, 0444, adt7316_show_AIN2, NULL, 0); static ssize_t adt7316_show_AIN3(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1248,8 +1232,8 @@ static ssize_t adt7316_show_AIN3(struct device *dev, static IIO_DEVICE_ATTR(AIN3, 0444, adt7316_show_AIN3, NULL, 0); static ssize_t adt7316_show_AIN4(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1259,7 +1243,7 @@ static ssize_t adt7316_show_AIN4(struct device *dev, static IIO_DEVICE_ATTR(AIN4, 0444, adt7316_show_AIN4, NULL, 0); static ssize_t adt7316_show_temp_offset(struct adt7316_chip_info *chip, - int offset_addr, char *buf) + int offset_addr, char *buf) { int data; u8 val; @@ -1277,7 +1261,9 @@ static ssize_t adt7316_show_temp_offset(struct adt7316_chip_info *chip, } static ssize_t adt7316_store_temp_offset(struct adt7316_chip_info *chip, - int offset_addr, const char *buf, size_t len) + int offset_addr, + const char *buf, + size_t len) { int data; u8 val; @@ -1300,8 +1286,8 @@ static ssize_t adt7316_store_temp_offset(struct adt7316_chip_info *chip, } static ssize_t adt7316_show_in_temp_offset(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1310,9 +1296,9 @@ static ssize_t adt7316_show_in_temp_offset(struct device *dev, } static ssize_t adt7316_store_in_temp_offset(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1322,12 +1308,12 @@ static ssize_t adt7316_store_in_temp_offset(struct device *dev, } static IIO_DEVICE_ATTR(in_temp_offset, 0644, - adt7316_show_in_temp_offset, - adt7316_store_in_temp_offset, 0); + adt7316_show_in_temp_offset, + adt7316_store_in_temp_offset, 0); static ssize_t adt7316_show_ex_temp_offset(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1336,9 +1322,9 @@ static ssize_t adt7316_show_ex_temp_offset(struct device *dev, } static ssize_t adt7316_store_ex_temp_offset(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1348,12 +1334,12 @@ static ssize_t adt7316_store_ex_temp_offset(struct device *dev, } static IIO_DEVICE_ATTR(ex_temp_offset, 0644, - adt7316_show_ex_temp_offset, - adt7316_store_ex_temp_offset, 0); + adt7316_show_ex_temp_offset, + adt7316_store_ex_temp_offset, 0); static ssize_t adt7316_show_in_analog_temp_offset(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1363,9 +1349,9 @@ static ssize_t adt7316_show_in_analog_temp_offset(struct device *dev, } static ssize_t adt7316_store_in_analog_temp_offset(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1375,12 +1361,12 @@ static ssize_t adt7316_store_in_analog_temp_offset(struct device *dev, } static IIO_DEVICE_ATTR(in_analog_temp_offset, 0644, - adt7316_show_in_analog_temp_offset, - adt7316_store_in_analog_temp_offset, 0); + adt7316_show_in_analog_temp_offset, + adt7316_store_in_analog_temp_offset, 0); static ssize_t adt7316_show_ex_analog_temp_offset(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1390,9 +1376,9 @@ static ssize_t adt7316_show_ex_analog_temp_offset(struct device *dev, } static ssize_t adt7316_store_ex_analog_temp_offset(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1402,21 +1388,21 @@ static ssize_t adt7316_store_ex_analog_temp_offset(struct device *dev, } static IIO_DEVICE_ATTR(ex_analog_temp_offset, 0644, - adt7316_show_ex_analog_temp_offset, - adt7316_store_ex_analog_temp_offset, 0); + adt7316_show_ex_analog_temp_offset, + adt7316_store_ex_analog_temp_offset, 0); static ssize_t adt7316_show_DAC(struct adt7316_chip_info *chip, - int channel, char *buf) + int channel, char *buf) { - u16 data; + u16 data = 0; u8 msb, lsb, offset; int ret; if (channel >= ADT7316_DA_MSB_DATA_REGS || - (channel == 0 && - (chip->config3 & ADT7316_EN_IN_TEMP_PROP_DACA)) || - (channel == 1 && - (chip->config3 & ADT7316_EN_EX_TEMP_PROP_DACB))) + (channel == 0 && + (chip->config3 & ADT7316_EN_IN_TEMP_PROP_DACA)) || + (channel == 1 && + (chip->config3 & ADT7316_EN_EX_TEMP_PROP_DACB))) return -EPERM; offset = chip->dac_bits - 8; @@ -1433,23 +1419,27 @@ static ssize_t adt7316_show_DAC(struct adt7316_chip_info *chip, if (ret) return -EIO; - data = (msb << offset) + (lsb & ((1 << offset) - 1)); + if (chip->dac_bits == 12) + data = lsb >> ADT7316_DA_12_BIT_LSB_SHIFT; + else if (chip->dac_bits == 10) + data = lsb >> ADT7316_DA_10_BIT_LSB_SHIFT; + data |= msb << offset; return sprintf(buf, "%d\n", data); } static ssize_t adt7316_store_DAC(struct adt7316_chip_info *chip, - int channel, const char *buf, size_t len) + int channel, const char *buf, size_t len) { - u8 msb, lsb, offset; + u8 msb, lsb, lsb_reg, offset; u16 data; int ret; if (channel >= ADT7316_DA_MSB_DATA_REGS || - (channel == 0 && - (chip->config3 & ADT7316_EN_IN_TEMP_PROP_DACA)) || - (channel == 1 && - (chip->config3 & ADT7316_EN_EX_TEMP_PROP_DACB))) + (channel == 0 && + (chip->config3 & ADT7316_EN_IN_TEMP_PROP_DACA)) || + (channel == 1 && + (chip->config3 & ADT7316_EN_EX_TEMP_PROP_DACB))) return -EPERM; offset = chip->dac_bits - 8; @@ -1459,9 +1449,13 @@ static ssize_t adt7316_store_DAC(struct adt7316_chip_info *chip, return -EINVAL; if (chip->dac_bits > 8) { - lsb = data & (1 << offset); + lsb = data & ((1 << offset) - 1); + if (chip->dac_bits == 12) + lsb_reg = lsb << ADT7316_DA_12_BIT_LSB_SHIFT; + else + lsb_reg = lsb << ADT7316_DA_10_BIT_LSB_SHIFT; ret = chip->bus.write(chip->bus.client, - ADT7316_DA_DATA_BASE + channel * 2, lsb); + ADT7316_DA_DATA_BASE + channel * 2, lsb_reg); if (ret) return -EIO; } @@ -1476,8 +1470,8 @@ static ssize_t adt7316_store_DAC(struct adt7316_chip_info *chip, } static ssize_t adt7316_show_DAC_A(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1486,9 +1480,9 @@ static ssize_t adt7316_show_DAC_A(struct device *dev, } static ssize_t adt7316_store_DAC_A(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1497,11 +1491,11 @@ static ssize_t adt7316_store_DAC_A(struct device *dev, } static IIO_DEVICE_ATTR(DAC_A, 0644, adt7316_show_DAC_A, - adt7316_store_DAC_A, 0); + adt7316_store_DAC_A, 0); static ssize_t adt7316_show_DAC_B(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1510,9 +1504,9 @@ static ssize_t adt7316_show_DAC_B(struct device *dev, } static ssize_t adt7316_store_DAC_B(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1521,11 +1515,11 @@ static ssize_t adt7316_store_DAC_B(struct device *dev, } static IIO_DEVICE_ATTR(DAC_B, 0644, adt7316_show_DAC_B, - adt7316_store_DAC_B, 0); + adt7316_store_DAC_B, 0); static ssize_t adt7316_show_DAC_C(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1534,9 +1528,9 @@ static ssize_t adt7316_show_DAC_C(struct device *dev, } static ssize_t adt7316_store_DAC_C(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1545,11 +1539,11 @@ static ssize_t adt7316_store_DAC_C(struct device *dev, } static IIO_DEVICE_ATTR(DAC_C, 0644, adt7316_show_DAC_C, - adt7316_store_DAC_C, 0); + adt7316_store_DAC_C, 0); static ssize_t adt7316_show_DAC_D(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1558,9 +1552,9 @@ static ssize_t adt7316_show_DAC_D(struct device *dev, } static ssize_t adt7316_store_DAC_D(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1569,11 +1563,11 @@ static ssize_t adt7316_store_DAC_D(struct device *dev, } static IIO_DEVICE_ATTR(DAC_D, 0644, adt7316_show_DAC_D, - adt7316_store_DAC_D, 0); + adt7316_store_DAC_D, 0); static ssize_t adt7316_show_device_id(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1590,8 +1584,8 @@ static ssize_t adt7316_show_device_id(struct device *dev, static IIO_DEVICE_ATTR(device_id, 0444, adt7316_show_device_id, NULL, 0); static ssize_t adt7316_show_manufactorer_id(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1606,11 +1600,11 @@ static ssize_t adt7316_show_manufactorer_id(struct device *dev, } static IIO_DEVICE_ATTR(manufactorer_id, 0444, - adt7316_show_manufactorer_id, NULL, 0); + adt7316_show_manufactorer_id, NULL, 0); static ssize_t adt7316_show_device_rev(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1627,8 +1621,8 @@ static ssize_t adt7316_show_device_rev(struct device *dev, static IIO_DEVICE_ATTR(device_rev, 0444, adt7316_show_device_rev, NULL, 0); static ssize_t adt7316_show_bus_type(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1708,8 +1702,6 @@ static struct attribute *adt7516_attributes[] = { &iio_dev_attr_DAC_update_mode.dev_attr.attr, &iio_dev_attr_all_DAC_update_modes.dev_attr.attr, &iio_dev_attr_update_DAC.dev_attr.attr, - &iio_dev_attr_DA_AB_Vref_bypass.dev_attr.attr, - &iio_dev_attr_DA_CD_Vref_bypass.dev_attr.attr, &iio_dev_attr_DAC_internal_Vref.dev_attr.attr, &iio_dev_attr_VDD.dev_attr.attr, &iio_dev_attr_in_temp.dev_attr.attr, @@ -1807,12 +1799,49 @@ static irqreturn_t adt7316_event_handler(int irq, void *private) return IRQ_HANDLED; } +static int adt7316_setup_irq(struct iio_dev *indio_dev) +{ + struct adt7316_chip_info *chip = iio_priv(indio_dev); + int irq_type, ret; + + irq_type = irqd_get_trigger_type(irq_get_irq_data(chip->bus.irq)); + + switch (irq_type) { + case IRQF_TRIGGER_HIGH: + case IRQF_TRIGGER_RISING: + break; + case IRQF_TRIGGER_LOW: + case IRQF_TRIGGER_FALLING: + break; + default: + dev_info(&indio_dev->dev, "mode %d unsupported, using IRQF_TRIGGER_LOW\n", + irq_type); + irq_type = IRQF_TRIGGER_LOW; + break; + } + + ret = devm_request_threaded_irq(&indio_dev->dev, chip->bus.irq, + NULL, adt7316_event_handler, + irq_type | IRQF_ONESHOT, + indio_dev->name, indio_dev); + if (ret) { + dev_err(&indio_dev->dev, "failed to request irq %d\n", + chip->bus.irq); + return ret; + } + + if (irq_type & IRQF_TRIGGER_HIGH) + chip->config1 |= ADT7316_INT_POLARITY; + + return 0; +} + /* * Show mask of enabled interrupts in Hex. */ static ssize_t adt7316_show_int_mask(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1824,9 +1853,9 @@ static ssize_t adt7316_show_int_mask(struct device *dev, * Set 1 to the mask in Hex to enabled interrupts. */ static ssize_t adt7316_set_int_mask(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1865,8 +1894,8 @@ static ssize_t adt7316_set_int_mask(struct device *dev, } static inline ssize_t adt7316_show_ad_bound(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); struct iio_dev *dev_info = dev_to_iio_dev(dev); @@ -1876,7 +1905,7 @@ static inline ssize_t adt7316_show_ad_bound(struct device *dev, int ret; if ((chip->id & ID_FAMILY_MASK) == ID_ADT73XX && - this_attr->address > ADT7316_EX_TEMP_LOW) + this_attr->address > ADT7316_EX_TEMP_LOW) return -EPERM; ret = chip->bus.read(chip->bus.client, this_attr->address, &val); @@ -1886,7 +1915,7 @@ static inline ssize_t adt7316_show_ad_bound(struct device *dev, data = (int)val; if (!((chip->id & ID_FAMILY_MASK) == ID_ADT75XX && - (chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0)) { + (chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0)) { if (data & 0x80) data -= 256; } @@ -1895,9 +1924,9 @@ static inline ssize_t adt7316_show_ad_bound(struct device *dev, } static inline ssize_t adt7316_set_ad_bound(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); struct iio_dev *dev_info = dev_to_iio_dev(dev); @@ -1907,7 +1936,7 @@ static inline ssize_t adt7316_set_ad_bound(struct device *dev, int ret; if ((chip->id & ID_FAMILY_MASK) == ID_ADT73XX && - this_attr->address > ADT7316_EX_TEMP_LOW) + this_attr->address > ADT7316_EX_TEMP_LOW) return -EPERM; ret = kstrtoint(buf, 10, &data); @@ -1915,7 +1944,7 @@ static inline ssize_t adt7316_set_ad_bound(struct device *dev, return -EINVAL; if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX && - (chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0) { + (chip->config1 & ADT7516_SEL_AIN1_2_EX_TEMP_MASK) == 0) { if (data > 255 || data < 0) return -EINVAL; } else { @@ -1936,8 +1965,8 @@ static inline ssize_t adt7316_set_ad_bound(struct device *dev, } static ssize_t adt7316_show_int_enabled(struct device *dev, - struct device_attribute *attr, - char *buf) + struct device_attribute *attr, + char *buf) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -1946,9 +1975,9 @@ static ssize_t adt7316_show_int_enabled(struct device *dev, } static ssize_t adt7316_set_int_enabled(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) + struct device_attribute *attr, + const char *buf, + size_t len) { struct iio_dev *dev_info = dev_to_iio_dev(dev); struct adt7316_chip_info *chip = iio_priv(dev_info); @@ -2097,12 +2126,11 @@ static const struct iio_info adt7516_info = { * device probe and remove */ int adt7316_probe(struct device *dev, struct adt7316_bus *bus, - const char *name) + const char *name) { struct adt7316_chip_info *chip; struct iio_dev *indio_dev; - unsigned short *adt7316_platform_data = dev->platform_data; - int ret = 0; + int ret; indio_dev = devm_iio_device_alloc(dev, sizeof(*chip)); if (!indio_dev) @@ -2120,9 +2148,22 @@ int adt7316_probe(struct device *dev, struct adt7316_bus *bus, else return -ENODEV; - chip->ldac_pin = adt7316_platform_data[1]; - if (chip->ldac_pin) { - chip->config3 |= ADT7316_DA_EN_VIA_DAC_LDCA; + if (chip->id == ID_ADT7316 || chip->id == ID_ADT7516) + chip->dac_bits = 12; + else if (chip->id == ID_ADT7317 || chip->id == ID_ADT7517) + chip->dac_bits = 10; + else + chip->dac_bits = 8; + + chip->ldac_pin = devm_gpiod_get_optional(dev, "adi,ldac", GPIOD_OUT_LOW); + if (IS_ERR(chip->ldac_pin)) { + ret = PTR_ERR(chip->ldac_pin); + dev_err(dev, "Failed to request ldac GPIO: %d\n", ret); + return ret; + } + + if (!chip->ldac_pin) { + chip->config3 |= ADT7316_DA_EN_VIA_DAC_LDAC; if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) chip->config1 |= ADT7516_SEL_AIN3; } @@ -2139,21 +2180,9 @@ int adt7316_probe(struct device *dev, struct adt7316_bus *bus, indio_dev->modes = INDIO_DIRECT_MODE; if (chip->bus.irq > 0) { - if (adt7316_platform_data[0]) - chip->bus.irq_flags = adt7316_platform_data[0]; - - ret = devm_request_threaded_irq(dev, chip->bus.irq, - NULL, - adt7316_event_handler, - chip->bus.irq_flags | - IRQF_ONESHOT, - indio_dev->name, - indio_dev); + ret = adt7316_setup_irq(indio_dev); if (ret) return ret; - - if (chip->bus.irq_flags & IRQF_TRIGGER_HIGH) - chip->config1 |= ADT7316_INT_POLARITY; } ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG1, chip->config1); @@ -2169,7 +2198,7 @@ int adt7316_probe(struct device *dev, struct adt7316_bus *bus, return ret; dev_info(dev, "%s temperature sensor, ADC and DAC registered.\n", - indio_dev->name); + indio_dev->name); return 0; } diff --git a/drivers/staging/iio/addac/adt7316.h b/drivers/staging/iio/addac/adt7316.h index ec40fbb698a6..84ca4f6c88f5 100644 --- a/drivers/staging/iio/addac/adt7316.h +++ b/drivers/staging/iio/addac/adt7316.h @@ -17,7 +17,6 @@ struct adt7316_bus { void *client; int irq; - int irq_flags; int (*read)(void *client, u8 reg, u8 *data); int (*write)(void *client, u8 reg, u8 val); int (*multi_read)(void *client, u8 first_reg, u8 count, u8 *data); @@ -31,6 +30,6 @@ extern const struct dev_pm_ops adt7316_pm_ops; #define ADT7316_PM_OPS NULL #endif int adt7316_probe(struct device *dev, struct adt7316_bus *bus, - const char *name); + const char *name); #endif diff --git a/drivers/staging/iio/cdc/Kconfig b/drivers/staging/iio/cdc/Kconfig index 80211df8c577..b97478e7cbd0 100644 --- a/drivers/staging/iio/cdc/Kconfig +++ b/drivers/staging/iio/cdc/Kconfig @@ -13,16 +13,6 @@ config AD7150 To compile this driver as a module, choose M here: the module will be called ad7150. -config AD7152 - tristate "Analog Devices ad7152/3 capacitive sensor driver" - depends on I2C - help - Say yes here to build support for Analog Devices capacitive sensors. - (ad7152, ad7153) Provides direct access via sysfs. - - To compile this driver as a module, choose M here: the - module will be called ad7152. - config AD7746 tristate "Analog Devices AD7745, AD7746 AD7747 capacitive sensor driver" depends on I2C diff --git a/drivers/staging/iio/cdc/Makefile b/drivers/staging/iio/cdc/Makefile index a5fbabf5c8bf..1466bc31f244 100644 --- a/drivers/staging/iio/cdc/Makefile +++ b/drivers/staging/iio/cdc/Makefile @@ -3,5 +3,4 @@ # obj-$(CONFIG_AD7150) += ad7150.o -obj-$(CONFIG_AD7152) += ad7152.o obj-$(CONFIG_AD7746) += ad7746.o diff --git a/drivers/staging/iio/cdc/ad7150.c b/drivers/staging/iio/cdc/ad7150.c index d16084d7068c..24f74ce60f80 100644 --- a/drivers/staging/iio/cdc/ad7150.c +++ b/drivers/staging/iio/cdc/ad7150.c @@ -102,18 +102,19 @@ static int ad7150_read_raw(struct iio_dev *indio_dev, { int ret; struct ad7150_chip_info *chip = iio_priv(indio_dev); + int channel = chan->channel; switch (mask) { case IIO_CHAN_INFO_RAW: ret = i2c_smbus_read_word_data(chip->client, - ad7150_addresses[chan->channel][0]); + ad7150_addresses[channel][0]); if (ret < 0) return ret; *val = swab16(ret); return IIO_VAL_INT; case IIO_CHAN_INFO_AVERAGE_RAW: ret = i2c_smbus_read_word_data(chip->client, - ad7150_addresses[chan->channel][1]); + ad7150_addresses[channel][1]); if (ret < 0) return ret; *val = swab16(ret); @@ -182,8 +183,8 @@ static int ad7150_write_event_params(struct iio_dev *indio_dev, case IIO_EV_TYPE_THRESH: value = chip->threshold[rising][chan]; return i2c_smbus_write_word_data(chip->client, - ad7150_addresses[chan][3], - swab16(value)); + ad7150_addresses[chan][3], + swab16(value)); case IIO_EV_TYPE_MAG_ADAPTIVE: sens = chip->mag_sensitivity[rising][chan]; timeout = chip->mag_timeout[rising][chan]; diff --git a/drivers/staging/iio/cdc/ad7152.c b/drivers/staging/iio/cdc/ad7152.c deleted file mode 100644 index 25f51db05d2d..000000000000 --- a/drivers/staging/iio/cdc/ad7152.c +++ /dev/null @@ -1,552 +0,0 @@ -/* - * AD7152 capacitive sensor driver supporting AD7152/3 - * - * Copyright 2010-2011a Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include <linux/interrupt.h> -#include <linux/device.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/sysfs.h> -#include <linux/i2c.h> -#include <linux/module.h> -#include <linux/delay.h> - -#include <linux/iio/iio.h> -#include <linux/iio/sysfs.h> - -/* - * TODO: Check compliance of calibbias with abi (units) - */ -/* - * AD7152 registers definition - */ - -#define AD7152_REG_STATUS 0 -#define AD7152_REG_CH1_DATA_HIGH 1 -#define AD7152_REG_CH2_DATA_HIGH 3 -#define AD7152_REG_CH1_OFFS_HIGH 5 -#define AD7152_REG_CH2_OFFS_HIGH 7 -#define AD7152_REG_CH1_GAIN_HIGH 9 -#define AD7152_REG_CH1_SETUP 11 -#define AD7152_REG_CH2_GAIN_HIGH 12 -#define AD7152_REG_CH2_SETUP 14 -#define AD7152_REG_CFG 15 -#define AD7152_REG_RESEVERD 16 -#define AD7152_REG_CAPDAC_POS 17 -#define AD7152_REG_CAPDAC_NEG 18 -#define AD7152_REG_CFG2 26 - -/* Status Register Bit Designations (AD7152_REG_STATUS) */ -#define AD7152_STATUS_RDY1 BIT(0) -#define AD7152_STATUS_RDY2 BIT(1) -#define AD7152_STATUS_C1C2 BIT(2) -#define AD7152_STATUS_PWDN BIT(7) - -/* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */ -#define AD7152_SETUP_CAPDIFF BIT(5) -#define AD7152_SETUP_RANGE_2pF (0 << 6) -#define AD7152_SETUP_RANGE_0_5pF (1 << 6) -#define AD7152_SETUP_RANGE_1pF (2 << 6) -#define AD7152_SETUP_RANGE_4pF (3 << 6) -#define AD7152_SETUP_RANGE(x) ((x) << 6) - -/* Config Register Bit Designations (AD7152_REG_CFG) */ -#define AD7152_CONF_CH2EN BIT(3) -#define AD7152_CONF_CH1EN BIT(4) -#define AD7152_CONF_MODE_IDLE (0 << 0) -#define AD7152_CONF_MODE_CONT_CONV (1 << 0) -#define AD7152_CONF_MODE_SINGLE_CONV (2 << 0) -#define AD7152_CONF_MODE_OFFS_CAL (5 << 0) -#define AD7152_CONF_MODE_GAIN_CAL (6 << 0) - -/* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */ -#define AD7152_CAPDAC_DACEN BIT(7) -#define AD7152_CAPDAC_DACP(x) ((x) & 0x1F) - -/* CFG2 Register Bit Designations (AD7152_REG_CFG2) */ -#define AD7152_CFG2_OSR(x) (((x) & 0x3) << 4) - -enum { - AD7152_DATA, - AD7152_OFFS, - AD7152_GAIN, - AD7152_SETUP -}; - -/* - * struct ad7152_chip_info - chip specific information - */ - -struct ad7152_chip_info { - struct i2c_client *client; - /* - * Capacitive channel digital filter setup; - * conversion time/update rate setup per channel - */ - u8 filter_rate_setup; - u8 setup[2]; - struct mutex state_lock; /* protect hardware state */ -}; - -static inline ssize_t ad7152_start_calib(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len, - u8 regval) -{ - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ad7152_chip_info *chip = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - bool doit; - int ret, timeout = 10; - - ret = strtobool(buf, &doit); - if (ret < 0) - return ret; - - if (!doit) - return 0; - - if (this_attr->address == 0) - regval |= AD7152_CONF_CH1EN; - else - regval |= AD7152_CONF_CH2EN; - - mutex_lock(&chip->state_lock); - ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG, regval); - if (ret < 0) - goto unlock; - - do { - mdelay(20); - ret = i2c_smbus_read_byte_data(chip->client, AD7152_REG_CFG); - if (ret < 0) - goto unlock; - - } while ((ret == regval) && timeout--); - - mutex_unlock(&chip->state_lock); - return len; - -unlock: - mutex_unlock(&chip->state_lock); - return ret; -} - -static ssize_t ad7152_start_offset_calib(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) -{ - return ad7152_start_calib(dev, attr, buf, len, - AD7152_CONF_MODE_OFFS_CAL); -} - -static ssize_t ad7152_start_gain_calib(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) -{ - return ad7152_start_calib(dev, attr, buf, len, - AD7152_CONF_MODE_GAIN_CAL); -} - -static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration, - 0200, NULL, ad7152_start_offset_calib, 0); -static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration, - 0200, NULL, ad7152_start_offset_calib, 1); -static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration, - 0200, NULL, ad7152_start_gain_calib, 0); -static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration, - 0200, NULL, ad7152_start_gain_calib, 1); - -/* Values are Update Rate (Hz), Conversion Time (ms) + 1*/ -static const unsigned char ad7152_filter_rate_table[][2] = { - {200, 5 + 1}, {50, 20 + 1}, {20, 50 + 1}, {17, 60 + 1}, -}; - -static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("200 50 20 17"); - -static IIO_CONST_ATTR(in_capacitance_scale_available, - "0.000061050 0.000030525 0.000015263 0.000007631"); - -static struct attribute *ad7152_attributes[] = { - &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr, - &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr, - &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr, - &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr, - &iio_const_attr_in_capacitance_scale_available.dev_attr.attr, - &iio_const_attr_sampling_frequency_available.dev_attr.attr, - NULL, -}; - -static const struct attribute_group ad7152_attribute_group = { - .attrs = ad7152_attributes, -}; - -static const u8 ad7152_addresses[][4] = { - { AD7152_REG_CH1_DATA_HIGH, AD7152_REG_CH1_OFFS_HIGH, - AD7152_REG_CH1_GAIN_HIGH, AD7152_REG_CH1_SETUP }, - { AD7152_REG_CH2_DATA_HIGH, AD7152_REG_CH2_OFFS_HIGH, - AD7152_REG_CH2_GAIN_HIGH, AD7152_REG_CH2_SETUP }, -}; - -/* Values are nano relative to pf base. */ -static const int ad7152_scale_table[] = { - 30525, 7631, 15263, 61050 -}; - -/** - * read_raw handler for IIO_CHAN_INFO_SAMP_FREQ - * - * lock must be held - **/ -static int ad7152_read_raw_samp_freq(struct device *dev, int *val) -{ - struct ad7152_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); - - *val = ad7152_filter_rate_table[chip->filter_rate_setup][0]; - - return 0; -} - -/** - * write_raw handler for IIO_CHAN_INFO_SAMP_FREQ - * - * lock must be held - **/ -static int ad7152_write_raw_samp_freq(struct device *dev, int val) -{ - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ad7152_chip_info *chip = iio_priv(indio_dev); - int ret, i; - - for (i = 0; i < ARRAY_SIZE(ad7152_filter_rate_table); i++) - if (val >= ad7152_filter_rate_table[i][0]) - break; - - if (i >= ARRAY_SIZE(ad7152_filter_rate_table)) - i = ARRAY_SIZE(ad7152_filter_rate_table) - 1; - - ret = i2c_smbus_write_byte_data(chip->client, - AD7152_REG_CFG2, AD7152_CFG2_OSR(i)); - if (ret < 0) - return ret; - - chip->filter_rate_setup = i; - - return ret; -} - -static int ad7152_write_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int val, - int val2, - long mask) -{ - struct ad7152_chip_info *chip = iio_priv(indio_dev); - int ret, i; - - mutex_lock(&chip->state_lock); - - switch (mask) { - case IIO_CHAN_INFO_CALIBSCALE: - if (val != 1) { - ret = -EINVAL; - goto out; - } - - val = (val2 * 1024) / 15625; - - ret = i2c_smbus_write_word_data(chip->client, - ad7152_addresses[chan->channel][AD7152_GAIN], - swab16(val)); - if (ret < 0) - goto out; - - ret = 0; - break; - - case IIO_CHAN_INFO_CALIBBIAS: - if ((val < 0) | (val > 0xFFFF)) { - ret = -EINVAL; - goto out; - } - ret = i2c_smbus_write_word_data(chip->client, - ad7152_addresses[chan->channel][AD7152_OFFS], - swab16(val)); - if (ret < 0) - goto out; - - ret = 0; - break; - case IIO_CHAN_INFO_SCALE: - if (val) { - ret = -EINVAL; - goto out; - } - for (i = 0; i < ARRAY_SIZE(ad7152_scale_table); i++) - if (val2 == ad7152_scale_table[i]) - break; - - chip->setup[chan->channel] &= ~AD7152_SETUP_RANGE_4pF; - chip->setup[chan->channel] |= AD7152_SETUP_RANGE(i); - - ret = i2c_smbus_write_byte_data(chip->client, - ad7152_addresses[chan->channel][AD7152_SETUP], - chip->setup[chan->channel]); - if (ret < 0) - goto out; - - ret = 0; - break; - case IIO_CHAN_INFO_SAMP_FREQ: - if (val2) { - ret = -EINVAL; - goto out; - } - ret = ad7152_write_raw_samp_freq(&indio_dev->dev, val); - if (ret < 0) - goto out; - - ret = 0; - break; - default: - ret = -EINVAL; - } - -out: - mutex_unlock(&chip->state_lock); - return ret; -} - -static int ad7152_read_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int *val, int *val2, - long mask) -{ - struct ad7152_chip_info *chip = iio_priv(indio_dev); - int ret; - u8 regval = 0; - - mutex_lock(&chip->state_lock); - - switch (mask) { - case IIO_CHAN_INFO_RAW: - /* First set whether in differential mode */ - - regval = chip->setup[chan->channel]; - - if (chan->differential) - chip->setup[chan->channel] |= AD7152_SETUP_CAPDIFF; - else - chip->setup[chan->channel] &= ~AD7152_SETUP_CAPDIFF; - - if (regval != chip->setup[chan->channel]) { - ret = i2c_smbus_write_byte_data(chip->client, - ad7152_addresses[chan->channel][AD7152_SETUP], - chip->setup[chan->channel]); - if (ret < 0) - goto out; - } - /* Make sure the channel is enabled */ - if (chan->channel == 0) - regval = AD7152_CONF_CH1EN; - else - regval = AD7152_CONF_CH2EN; - - /* Trigger a single read */ - regval |= AD7152_CONF_MODE_SINGLE_CONV; - ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG, - regval); - if (ret < 0) - goto out; - - msleep(ad7152_filter_rate_table[chip->filter_rate_setup][1]); - /* Now read the actual register */ - ret = i2c_smbus_read_word_data(chip->client, - ad7152_addresses[chan->channel][AD7152_DATA]); - if (ret < 0) - goto out; - *val = swab16(ret); - - if (chan->differential) - *val -= 0x8000; - - ret = IIO_VAL_INT; - break; - case IIO_CHAN_INFO_CALIBSCALE: - - ret = i2c_smbus_read_word_data(chip->client, - ad7152_addresses[chan->channel][AD7152_GAIN]); - if (ret < 0) - goto out; - /* 1 + gain_val / 2^16 */ - *val = 1; - *val2 = (15625 * swab16(ret)) / 1024; - - ret = IIO_VAL_INT_PLUS_MICRO; - break; - case IIO_CHAN_INFO_CALIBBIAS: - ret = i2c_smbus_read_word_data(chip->client, - ad7152_addresses[chan->channel][AD7152_OFFS]); - if (ret < 0) - goto out; - *val = swab16(ret); - - ret = IIO_VAL_INT; - break; - case IIO_CHAN_INFO_SCALE: - ret = i2c_smbus_read_byte_data(chip->client, - ad7152_addresses[chan->channel][AD7152_SETUP]); - if (ret < 0) - goto out; - *val = 0; - *val2 = ad7152_scale_table[ret >> 6]; - - ret = IIO_VAL_INT_PLUS_NANO; - break; - case IIO_CHAN_INFO_SAMP_FREQ: - ret = ad7152_read_raw_samp_freq(&indio_dev->dev, val); - if (ret < 0) - goto out; - - ret = IIO_VAL_INT; - break; - default: - ret = -EINVAL; - } -out: - mutex_unlock(&chip->state_lock); - return ret; -} - -static int ad7152_write_raw_get_fmt(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - long mask) -{ - switch (mask) { - case IIO_CHAN_INFO_SCALE: - return IIO_VAL_INT_PLUS_NANO; - default: - return IIO_VAL_INT_PLUS_MICRO; - } -} - -static const struct iio_info ad7152_info = { - .attrs = &ad7152_attribute_group, - .read_raw = ad7152_read_raw, - .write_raw = ad7152_write_raw, - .write_raw_get_fmt = ad7152_write_raw_get_fmt, -}; - -static const struct iio_chan_spec ad7152_channels[] = { - { - .type = IIO_CAPACITANCE, - .indexed = 1, - .channel = 0, - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | - BIT(IIO_CHAN_INFO_CALIBSCALE) | - BIT(IIO_CHAN_INFO_CALIBBIAS) | - BIT(IIO_CHAN_INFO_SCALE), - .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), - }, { - .type = IIO_CAPACITANCE, - .differential = 1, - .indexed = 1, - .channel = 0, - .channel2 = 2, - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | - BIT(IIO_CHAN_INFO_CALIBSCALE) | - BIT(IIO_CHAN_INFO_CALIBBIAS) | - BIT(IIO_CHAN_INFO_SCALE), - .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), - }, { - .type = IIO_CAPACITANCE, - .indexed = 1, - .channel = 1, - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | - BIT(IIO_CHAN_INFO_CALIBSCALE) | - BIT(IIO_CHAN_INFO_CALIBBIAS) | - BIT(IIO_CHAN_INFO_SCALE), - .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), - }, { - .type = IIO_CAPACITANCE, - .differential = 1, - .indexed = 1, - .channel = 1, - .channel2 = 3, - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | - BIT(IIO_CHAN_INFO_CALIBSCALE) | - BIT(IIO_CHAN_INFO_CALIBBIAS) | - BIT(IIO_CHAN_INFO_SCALE), - .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), - } -}; - -/* - * device probe and remove - */ - -static int ad7152_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - int ret = 0; - struct ad7152_chip_info *chip; - struct iio_dev *indio_dev; - - indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); - if (!indio_dev) - return -ENOMEM; - chip = iio_priv(indio_dev); - /* this is only used for device removal purposes */ - i2c_set_clientdata(client, indio_dev); - - chip->client = client; - mutex_init(&chip->state_lock); - - /* Establish that the iio_dev is a child of the i2c device */ - indio_dev->name = id->name; - indio_dev->dev.parent = &client->dev; - indio_dev->info = &ad7152_info; - indio_dev->channels = ad7152_channels; - if (id->driver_data == 0) - indio_dev->num_channels = ARRAY_SIZE(ad7152_channels); - else - indio_dev->num_channels = 2; - indio_dev->num_channels = ARRAY_SIZE(ad7152_channels); - indio_dev->modes = INDIO_DIRECT_MODE; - - ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev); - if (ret) - return ret; - - dev_err(&client->dev, "%s capacitive sensor registered\n", id->name); - - return 0; -} - -static const struct i2c_device_id ad7152_id[] = { - { "ad7152", 0 }, - { "ad7153", 1 }, - {} -}; - -MODULE_DEVICE_TABLE(i2c, ad7152_id); - -static struct i2c_driver ad7152_driver = { - .driver = { - .name = KBUILD_MODNAME, - }, - .probe = ad7152_probe, - .id_table = ad7152_id, -}; -module_i2c_driver(ad7152_driver); - -MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); -MODULE_DESCRIPTION("Analog Devices AD7152/3 capacitive sensor driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/frequency/ad9834.c b/drivers/staging/iio/frequency/ad9834.c index 1e977014fe5f..0b0287503fb4 100644 --- a/drivers/staging/iio/frequency/ad9834.c +++ b/drivers/staging/iio/frequency/ad9834.c @@ -6,6 +6,7 @@ * Licensed under the GPL-2. */ +#include <linux/clk.h> #include <linux/interrupt.h> #include <linux/workqueue.h> #include <linux/device.h> @@ -71,7 +72,7 @@ struct ad9834_state { struct spi_device *spi; struct regulator *reg; - unsigned int mclk; + struct clk *mclk; unsigned short control; unsigned short devid; struct spi_transfer xfer; @@ -110,12 +111,15 @@ static unsigned int ad9834_calc_freqreg(unsigned long mclk, unsigned long fout) static int ad9834_write_frequency(struct ad9834_state *st, unsigned long addr, unsigned long fout) { + unsigned long clk_freq; unsigned long regval; - if (fout > (st->mclk / 2)) + clk_freq = clk_get_rate(st->mclk); + + if (fout > (clk_freq / 2)) return -EINVAL; - regval = ad9834_calc_freqreg(st->mclk, fout); + regval = ad9834_calc_freqreg(clk_freq, fout); st->freq_data[0] = cpu_to_be16(addr | (regval & RES_MASK(AD9834_FREQ_BITS / 2))); @@ -389,16 +393,11 @@ static const struct iio_info ad9833_info = { static int ad9834_probe(struct spi_device *spi) { - struct ad9834_platform_data *pdata = dev_get_platdata(&spi->dev); struct ad9834_state *st; struct iio_dev *indio_dev; struct regulator *reg; int ret; - if (!pdata) { - dev_dbg(&spi->dev, "no platform data?\n"); - return -ENODEV; - } reg = devm_regulator_get(&spi->dev, "avdd"); if (IS_ERR(reg)) @@ -418,7 +417,14 @@ static int ad9834_probe(struct spi_device *spi) spi_set_drvdata(spi, indio_dev); st = iio_priv(indio_dev); mutex_init(&st->lock); - st->mclk = pdata->mclk; + st->mclk = devm_clk_get(&spi->dev, NULL); + + ret = clk_prepare_enable(st->mclk); + if (ret) { + dev_err(&spi->dev, "Failed to enable master clock\n"); + goto error_disable_reg; + } + st->spi = spi; st->devid = spi_get_device_id(spi)->driver_data; st->reg = reg; @@ -454,42 +460,41 @@ static int ad9834_probe(struct spi_device *spi) spi_message_add_tail(&st->freq_xfer[1], &st->freq_msg); st->control = AD9834_B28 | AD9834_RESET; + st->control |= AD9834_DIV2; - if (!pdata->en_div2) - st->control |= AD9834_DIV2; - - if (!pdata->en_signbit_msb_out && (st->devid == ID_AD9834)) + if (st->devid == ID_AD9834) st->control |= AD9834_SIGN_PIB; st->data = cpu_to_be16(AD9834_REG_CMD | st->control); ret = spi_sync(st->spi, &st->msg); if (ret) { dev_err(&spi->dev, "device init failed\n"); - goto error_disable_reg; + goto error_clock_unprepare; } - ret = ad9834_write_frequency(st, AD9834_REG_FREQ0, pdata->freq0); + ret = ad9834_write_frequency(st, AD9834_REG_FREQ0, 1000000); if (ret) - goto error_disable_reg; + goto error_clock_unprepare; - ret = ad9834_write_frequency(st, AD9834_REG_FREQ1, pdata->freq1); + ret = ad9834_write_frequency(st, AD9834_REG_FREQ1, 5000000); if (ret) - goto error_disable_reg; + goto error_clock_unprepare; - ret = ad9834_write_phase(st, AD9834_REG_PHASE0, pdata->phase0); + ret = ad9834_write_phase(st, AD9834_REG_PHASE0, 512); if (ret) - goto error_disable_reg; + goto error_clock_unprepare; - ret = ad9834_write_phase(st, AD9834_REG_PHASE1, pdata->phase1); + ret = ad9834_write_phase(st, AD9834_REG_PHASE1, 1024); if (ret) - goto error_disable_reg; + goto error_clock_unprepare; ret = iio_device_register(indio_dev); if (ret) - goto error_disable_reg; + goto error_clock_unprepare; return 0; - +error_clock_unprepare: + clk_disable_unprepare(st->mclk); error_disable_reg: regulator_disable(reg); @@ -502,6 +507,7 @@ static int ad9834_remove(struct spi_device *spi) struct ad9834_state *st = iio_priv(indio_dev); iio_device_unregister(indio_dev); + clk_disable_unprepare(st->mclk); regulator_disable(st->reg); return 0; diff --git a/drivers/staging/iio/frequency/ad9834.h b/drivers/staging/iio/frequency/ad9834.h index ae620f38eb49..da7e83ceedad 100644 --- a/drivers/staging/iio/frequency/ad9834.h +++ b/drivers/staging/iio/frequency/ad9834.h @@ -8,32 +8,4 @@ #ifndef IIO_DDS_AD9834_H_ #define IIO_DDS_AD9834_H_ -/* - * TODO: struct ad7887_platform_data needs to go into include/linux/iio - */ - -/** - * struct ad9834_platform_data - platform specific information - * @mclk: master clock in Hz - * @freq0: power up freq0 tuning word in Hz - * @freq1: power up freq1 tuning word in Hz - * @phase0: power up phase0 value [0..4095] correlates with 0..2PI - * @phase1: power up phase1 value [0..4095] correlates with 0..2PI - * @en_div2: digital output/2 is passed to the SIGN BIT OUT pin - * @en_signbit_msb_out: the MSB (or MSB/2) of the DAC data is connected to the - * SIGN BIT OUT pin. en_div2 controls whether it is the MSB - * or MSB/2 that is output. if en_signbit_msb_out=false, - * the on-board comparator is connected to SIGN BIT OUT - */ - -struct ad9834_platform_data { - unsigned int mclk; - unsigned int freq0; - unsigned int freq1; - unsigned short phase0; - unsigned short phase1; - bool en_div2; - bool en_signbit_msb_out; -}; - #endif /* IIO_DDS_AD9834_H_ */ diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c index a2370dd1e1a8..3134295f014f 100644 --- a/drivers/staging/iio/impedance-analyzer/ad5933.c +++ b/drivers/staging/iio/impedance-analyzer/ad5933.c @@ -16,6 +16,7 @@ #include <linux/err.h> #include <linux/delay.h> #include <linux/module.h> +#include <linux/clk.h> #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> @@ -82,21 +83,10 @@ #define AD5933_POLL_TIME_ms 10 #define AD5933_INIT_EXCITATION_TIME_ms 100 -/** - * struct ad5933_platform_data - platform specific data - * @ext_clk_Hz: the external clock frequency in Hz, if not set - * the driver uses the internal clock (16.776 MHz) - * @vref_mv: the external reference voltage in millivolt - */ - -struct ad5933_platform_data { - unsigned long ext_clk_Hz; - unsigned short vref_mv; -}; - struct ad5933_state { struct i2c_client *client; struct regulator *reg; + struct clk *mclk; struct delayed_work work; struct mutex lock; /* Protect sensor state */ unsigned long mclk_hz; @@ -112,10 +102,6 @@ struct ad5933_state { unsigned int poll_time_jiffies; }; -static struct ad5933_platform_data ad5933_default_pdata = { - .vref_mv = 3300, -}; - #define AD5933_CHANNEL(_type, _extend_name, _info_mask_separate, _address, \ _scan_index, _realbits) { \ .type = (_type), \ @@ -210,7 +196,7 @@ static int ad5933_set_freq(struct ad5933_state *st, u8 d8[4]; } dat; - freqreg = (u64) freq * (u64) (1 << 27); + freqreg = (u64)freq * (u64)(1 << 27); do_div(freqreg, st->mclk_hz / 4); switch (reg) { @@ -267,7 +253,6 @@ static void ad5933_calc_out_ranges(struct ad5933_state *st) for (i = 0; i < 4; i++) st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300; - } /* @@ -692,10 +677,10 @@ static void ad5933_work(struct work_struct *work) static int ad5933_probe(struct i2c_client *client, const struct i2c_device_id *id) { - int ret, voltage_uv = 0; - struct ad5933_platform_data *pdata = dev_get_platdata(&client->dev); + int ret; struct ad5933_state *st; struct iio_dev *indio_dev; + unsigned long ext_clk_hz = 0; indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st)); if (!indio_dev) @@ -707,9 +692,6 @@ static int ad5933_probe(struct i2c_client *client, mutex_init(&st->lock); - if (!pdata) - pdata = &ad5933_default_pdata; - st->reg = devm_regulator_get(&client->dev, "vdd"); if (IS_ERR(st->reg)) return PTR_ERR(st->reg); @@ -719,15 +701,28 @@ static int ad5933_probe(struct i2c_client *client, dev_err(&client->dev, "Failed to enable specified VDD supply\n"); return ret; } - voltage_uv = regulator_get_voltage(st->reg); + ret = regulator_get_voltage(st->reg); - if (voltage_uv) - st->vref_mv = voltage_uv / 1000; - else - st->vref_mv = pdata->vref_mv; + if (ret < 0) + goto error_disable_reg; - if (pdata->ext_clk_Hz) { - st->mclk_hz = pdata->ext_clk_Hz; + st->vref_mv = ret / 1000; + + st->mclk = devm_clk_get(&client->dev, "mclk"); + if (IS_ERR(st->mclk) && PTR_ERR(st->mclk) != -ENOENT) { + ret = PTR_ERR(st->mclk); + goto error_disable_reg; + } + + if (!IS_ERR(st->mclk)) { + ret = clk_prepare_enable(st->mclk); + if (ret < 0) + goto error_disable_reg; + ext_clk_hz = clk_get_rate(st->mclk); + } + + if (ext_clk_hz) { + st->mclk_hz = ext_clk_hz; st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK; } else { st->mclk_hz = AD5933_INT_OSC_FREQ_Hz; @@ -747,7 +742,7 @@ static int ad5933_probe(struct i2c_client *client, ret = ad5933_register_ring_funcs_and_init(indio_dev); if (ret) - goto error_disable_reg; + goto error_disable_mclk; ret = ad5933_setup(st); if (ret) @@ -761,6 +756,8 @@ static int ad5933_probe(struct i2c_client *client, error_unreg_ring: iio_kfifo_free(indio_dev->buffer); +error_disable_mclk: + clk_disable_unprepare(st->mclk); error_disable_reg: regulator_disable(st->reg); @@ -775,6 +772,7 @@ static int ad5933_remove(struct i2c_client *client) iio_device_unregister(indio_dev); iio_kfifo_free(indio_dev->buffer); regulator_disable(st->reg); + clk_disable_unprepare(st->mclk); return 0; } @@ -787,9 +785,18 @@ static const struct i2c_device_id ad5933_id[] = { MODULE_DEVICE_TABLE(i2c, ad5933_id); +static const struct of_device_id ad5933_of_match[] = { + { .compatible = "adi,ad5933" }, + { .compatible = "adi,ad5934" }, + { }, +}; + +MODULE_DEVICE_TABLE(of, ad5933_of_match); + static struct i2c_driver ad5933_driver = { .driver = { .name = "ad5933", + .of_match_table = ad5933_of_match, }, .probe = ad5933_probe, .remove = ad5933_remove, diff --git a/drivers/staging/iio/meter/ade7854.c b/drivers/staging/iio/meter/ade7854.c index 029c3bf42d4d..07774c000c5a 100644 --- a/drivers/staging/iio/meter/ade7854.c +++ b/drivers/staging/iio/meter/ade7854.c @@ -269,7 +269,7 @@ static IIO_DEV_ATTR_VPEAK(0644, static IIO_DEV_ATTR_IPEAK(0644, ade7854_read_32bit, ade7854_write_32bit, - ADE7854_VPEAK); + ADE7854_IPEAK); static IIO_DEV_ATTR_APHCAL(0644, ade7854_read_16bit, ade7854_write_16bit, diff --git a/drivers/staging/iio/resolver/Kconfig b/drivers/staging/iio/resolver/Kconfig index 6a469ee6101f..4a727c17bb8f 100644 --- a/drivers/staging/iio/resolver/Kconfig +++ b/drivers/staging/iio/resolver/Kconfig @@ -3,16 +3,6 @@ # menu "Resolver to digital converters" -config AD2S90 - tristate "Analog Devices ad2s90 driver" - depends on SPI - help - Say yes here to build support for Analog Devices spi resolver - to digital converters, ad2s90, provides direct access via sysfs. - - To compile this driver as a module, choose M here: the - module will be called ad2s90. - config AD2S1210 tristate "Analog Devices ad2s1210 driver" depends on SPI diff --git a/drivers/staging/iio/resolver/Makefile b/drivers/staging/iio/resolver/Makefile index 8d901dc7500b..b2049f2ce36e 100644 --- a/drivers/staging/iio/resolver/Makefile +++ b/drivers/staging/iio/resolver/Makefile @@ -2,5 +2,4 @@ # Makefile for Resolver/Synchro drivers # -obj-$(CONFIG_AD2S90) += ad2s90.o obj-$(CONFIG_AD2S1210) += ad2s1210.o diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c index ac13b99bd9cb..cec9d995b3df 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -15,12 +15,11 @@ #include <linux/slab.h> #include <linux/sysfs.h> #include <linux/delay.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/module.h> #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> -#include "ad2s1210.h" #define DRV_NAME "ad2s1210" @@ -67,12 +66,33 @@ enum ad2s1210_mode { MOD_RESERVED, }; +enum ad2s1210_gpios { + AD2S1210_SAMPLE, + AD2S1210_A0, + AD2S1210_A1, + AD2S1210_RES0, + AD2S1210_RES1, +}; + +struct ad2s1210_gpio { + const char *name; + unsigned long flags; +}; + +static const struct ad2s1210_gpio gpios[] = { + [AD2S1210_SAMPLE] = { .name = "adi,sample", .flags = GPIOD_OUT_LOW }, + [AD2S1210_A0] = { .name = "adi,a0", .flags = GPIOD_OUT_LOW }, + [AD2S1210_A1] = { .name = "adi,a1", .flags = GPIOD_OUT_LOW }, + [AD2S1210_RES0] = { .name = "adi,res0", .flags = GPIOD_OUT_LOW }, + [AD2S1210_RES1] = { .name = "adi,res1", .flags = GPIOD_OUT_LOW }, +}; + static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 }; struct ad2s1210_state { - const struct ad2s1210_platform_data *pdata; struct mutex lock; struct spi_device *sdev; + struct gpio_desc *gpios[5]; unsigned int fclkin; unsigned int fexcit; bool hysteresis; @@ -91,8 +111,8 @@ static const int ad2s1210_mode_vals[4][2] = { static inline void ad2s1210_set_mode(enum ad2s1210_mode mode, struct ad2s1210_state *st) { - gpio_set_value(st->pdata->a[0], ad2s1210_mode_vals[mode][0]); - gpio_set_value(st->pdata->a[1], ad2s1210_mode_vals[mode][1]); + gpiod_set_value(st->gpios[AD2S1210_A0], ad2s1210_mode_vals[mode][0]); + gpiod_set_value(st->gpios[AD2S1210_A1], ad2s1210_mode_vals[mode][1]); st->mode = mode; } @@ -150,24 +170,16 @@ int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st) return ad2s1210_config_write(st, fcw); } -static unsigned char ad2s1210_read_resolution_pin(struct ad2s1210_state *st) -{ - int resolution = (gpio_get_value(st->pdata->res[0]) << 1) | - gpio_get_value(st->pdata->res[1]); - - return ad2s1210_resolution_value[resolution]; -} - static const int ad2s1210_res_pins[4][2] = { { 0, 0 }, {0, 1}, {1, 0}, {1, 1} }; static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st) { - gpio_set_value(st->pdata->res[0], - ad2s1210_res_pins[(st->resolution - 10) / 2][0]); - gpio_set_value(st->pdata->res[1], - ad2s1210_res_pins[(st->resolution - 10) / 2][1]); + gpiod_set_value(st->gpios[AD2S1210_RES0], + ad2s1210_res_pins[(st->resolution - 10) / 2][0]); + gpiod_set_value(st->gpios[AD2S1210_RES1], + ad2s1210_res_pins[(st->resolution - 10) / 2][1]); } static inline int ad2s1210_soft_reset(struct ad2s1210_state *st) @@ -301,15 +313,9 @@ static ssize_t ad2s1210_store_control(struct device *dev, "ad2s1210: write control register fail\n"); goto error_ret; } - st->resolution - = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; - if (st->pdata->gpioin) { - data = ad2s1210_read_resolution_pin(st); - if (data != st->resolution) - dev_warn(dev, "ad2s1210: resolution settings not match\n"); - } else { - ad2s1210_set_resolution_pin(st); - } + st->resolution = + ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; + ad2s1210_set_resolution_pin(st); ret = len; st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS); @@ -363,15 +369,9 @@ static ssize_t ad2s1210_store_resolution(struct device *dev, dev_err(dev, "ad2s1210: setting resolution fail\n"); goto error_ret; } - st->resolution - = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; - if (st->pdata->gpioin) { - data = ad2s1210_read_resolution_pin(st); - if (data != st->resolution) - dev_warn(dev, "ad2s1210: resolution settings not match\n"); - } else { - ad2s1210_set_resolution_pin(st); - } + st->resolution = + ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; + ad2s1210_set_resolution_pin(st); ret = len; error_ret: mutex_unlock(&st->lock); @@ -401,15 +401,15 @@ static ssize_t ad2s1210_clear_fault(struct device *dev, int ret; mutex_lock(&st->lock); - gpio_set_value(st->pdata->sample, 0); + gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0); /* delay (2 * tck + 20) nano seconds */ udelay(1); - gpio_set_value(st->pdata->sample, 1); + gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1); ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT); if (ret < 0) goto error_ret; - gpio_set_value(st->pdata->sample, 0); - gpio_set_value(st->pdata->sample, 1); + gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0); + gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1); error_ret: mutex_unlock(&st->lock); @@ -466,7 +466,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, s16 vel; mutex_lock(&st->lock); - gpio_set_value(st->pdata->sample, 0); + gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0); /* delay (6 * tck + 20) nano seconds */ udelay(1); @@ -512,7 +512,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, } error_ret: - gpio_set_value(st->pdata->sample, 1); + gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1); /* delay (2 * tck + 20) nano seconds */ udelay(1); mutex_unlock(&st->lock); @@ -592,10 +592,7 @@ static int ad2s1210_initial(struct ad2s1210_state *st) int ret; mutex_lock(&st->lock); - if (st->pdata->gpioin) - st->resolution = ad2s1210_read_resolution_pin(st); - else - ad2s1210_set_resolution_pin(st); + ad2s1210_set_resolution_pin(st); ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL); if (ret < 0) @@ -630,30 +627,22 @@ static const struct iio_info ad2s1210_info = { static int ad2s1210_setup_gpios(struct ad2s1210_state *st) { - unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT; - struct gpio ad2s1210_gpios[] = { - { st->pdata->sample, GPIOF_DIR_IN, "sample" }, - { st->pdata->a[0], flags, "a0" }, - { st->pdata->a[1], flags, "a1" }, - { st->pdata->res[0], flags, "res0" }, - { st->pdata->res[0], flags, "res1" }, - }; - - return gpio_request_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios)); -} - -static void ad2s1210_free_gpios(struct ad2s1210_state *st) -{ - unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT; - struct gpio ad2s1210_gpios[] = { - { st->pdata->sample, GPIOF_DIR_IN, "sample" }, - { st->pdata->a[0], flags, "a0" }, - { st->pdata->a[1], flags, "a1" }, - { st->pdata->res[0], flags, "res0" }, - { st->pdata->res[0], flags, "res1" }, - }; + struct spi_device *spi = st->sdev; + int i, ret; + + for (i = 0; i < ARRAY_SIZE(gpios); i++) { + st->gpios[i] = devm_gpiod_get(&spi->dev, gpios[i].name, + gpios[i].flags); + if (IS_ERR(st->gpios[i])) { + ret = PTR_ERR(st->gpios[i]); + dev_err(&spi->dev, + "ad2s1210: failed to request %s GPIO: %d\n", + gpios[i].name, ret); + return ret; + } + } - gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios)); + return 0; } static int ad2s1210_probe(struct spi_device *spi) @@ -669,7 +658,6 @@ static int ad2s1210_probe(struct spi_device *spi) if (!indio_dev) return -ENOMEM; st = iio_priv(indio_dev); - st->pdata = spi->dev.platform_data; ret = ad2s1210_setup_gpios(st); if (ret < 0) return ret; @@ -692,7 +680,7 @@ static int ad2s1210_probe(struct spi_device *spi) ret = iio_device_register(indio_dev); if (ret) - goto error_free_gpios; + return ret; st->fclkin = spi->max_speed_hz; spi->mode = SPI_MODE_3; @@ -700,10 +688,6 @@ static int ad2s1210_probe(struct spi_device *spi) ad2s1210_initial(st); return 0; - -error_free_gpios: - ad2s1210_free_gpios(st); - return ret; } static int ad2s1210_remove(struct spi_device *spi) @@ -711,11 +695,16 @@ static int ad2s1210_remove(struct spi_device *spi) struct iio_dev *indio_dev = spi_get_drvdata(spi); iio_device_unregister(indio_dev); - ad2s1210_free_gpios(iio_priv(indio_dev)); return 0; } +static const struct of_device_id ad2s1210_of_match[] = { + { .compatible = "adi,ad2s1210", }, + { } +}; +MODULE_DEVICE_TABLE(of, ad2s1210_of_match); + static const struct spi_device_id ad2s1210_id[] = { { "ad2s1210" }, {} @@ -725,6 +714,7 @@ MODULE_DEVICE_TABLE(spi, ad2s1210_id); static struct spi_driver ad2s1210_driver = { .driver = { .name = DRV_NAME, + .of_match_table = of_match_ptr(ad2s1210_of_match), }, .probe = ad2s1210_probe, .remove = ad2s1210_remove, diff --git a/drivers/staging/iio/resolver/ad2s1210.h b/drivers/staging/iio/resolver/ad2s1210.h deleted file mode 100644 index e9b2147701fc..000000000000 --- a/drivers/staging/iio/resolver/ad2s1210.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * ad2s1210.h plaform data for the ADI Resolver to Digital Converters: - * AD2S1210 - * - * Copyright (c) 2010-2010 Analog Devices Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _AD2S1210_H -#define _AD2S1210_H - -struct ad2s1210_platform_data { - unsigned int sample; - unsigned int a[2]; - unsigned int res[2]; - bool gpioin; -}; -#endif /* _AD2S1210_H */ diff --git a/drivers/staging/iio/resolver/ad2s90.c b/drivers/staging/iio/resolver/ad2s90.c deleted file mode 100644 index 59586947a936..000000000000 --- a/drivers/staging/iio/resolver/ad2s90.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - * ad2s90.c simple support for the ADI Resolver to Digital Converters: AD2S90 - * - * Copyright (c) 2010-2010 Analog Devices Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#include <linux/types.h> -#include <linux/mutex.h> -#include <linux/device.h> -#include <linux/spi/spi.h> -#include <linux/slab.h> -#include <linux/sysfs.h> -#include <linux/module.h> - -#include <linux/iio/iio.h> -#include <linux/iio/sysfs.h> - -struct ad2s90_state { - struct mutex lock; - struct spi_device *sdev; - u8 rx[2] ____cacheline_aligned; -}; - -static int ad2s90_read_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int *val, - int *val2, - long m) -{ - int ret; - struct ad2s90_state *st = iio_priv(indio_dev); - - mutex_lock(&st->lock); - ret = spi_read(st->sdev, st->rx, 2); - if (ret) - goto error_ret; - *val = (((u16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4); - -error_ret: - mutex_unlock(&st->lock); - - return IIO_VAL_INT; -} - -static const struct iio_info ad2s90_info = { - .read_raw = ad2s90_read_raw, -}; - -static const struct iio_chan_spec ad2s90_chan = { - .type = IIO_ANGL, - .indexed = 1, - .channel = 0, - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), -}; - -static int ad2s90_probe(struct spi_device *spi) -{ - struct iio_dev *indio_dev; - struct ad2s90_state *st; - int ret = 0; - - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); - if (!indio_dev) - return -ENOMEM; - st = iio_priv(indio_dev); - spi_set_drvdata(spi, indio_dev); - - mutex_init(&st->lock); - st->sdev = spi; - indio_dev->dev.parent = &spi->dev; - indio_dev->info = &ad2s90_info; - indio_dev->modes = INDIO_DIRECT_MODE; - indio_dev->channels = &ad2s90_chan; - indio_dev->num_channels = 1; - indio_dev->name = spi_get_device_id(spi)->name; - - ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev); - if (ret) - return ret; - - /* need 600ns between CS and the first falling edge of SCLK */ - spi->max_speed_hz = 830000; - spi->mode = SPI_MODE_3; - spi_setup(spi); - - return 0; -} - -static const struct spi_device_id ad2s90_id[] = { - { "ad2s90" }, - {} -}; -MODULE_DEVICE_TABLE(spi, ad2s90_id); - -static struct spi_driver ad2s90_driver = { - .driver = { - .name = "ad2s90", - }, - .probe = ad2s90_probe, - .id_table = ad2s90_id, -}; -module_spi_driver(ad2s90_driver); - -MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>"); -MODULE_DESCRIPTION("Analog Devices AD2S90 Resolver to Digital SPI driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/ks7010/Makefile b/drivers/staging/ks7010/Makefile index 07dc16cc86f5..412e2105a3a5 100644 --- a/drivers/staging/ks7010/Makefile +++ b/drivers/staging/ks7010/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_KS7010) += ks7010.o -ks7010-y := michael_mic.o ks_hostif.o ks_wlan_net.o ks7010_sdio.o +ks7010-y := ks_hostif.o ks_wlan_net.o ks7010_sdio.o diff --git a/drivers/staging/ks7010/TODO b/drivers/staging/ks7010/TODO index d393ca58e231..87a6dac4890d 100644 --- a/drivers/staging/ks7010/TODO +++ b/drivers/staging/ks7010/TODO @@ -27,8 +27,6 @@ Now the TODOs: - fix the 'card removal' event when card is inserted when booting - check what other upstream wireless mechanisms can be used instead of the custom ones here -- replace custom Michael MIC implementation with the kernel - implementation. This task is only required for a *clean* WEXT interface. Please send any patches to: Greg Kroah-Hartman <gregkh@linuxfoundation.org> diff --git a/drivers/staging/ks7010/ks_hostif.c b/drivers/staging/ks7010/ks_hostif.c index 065bce193fac..06ebea0be118 100644 --- a/drivers/staging/ks7010/ks_hostif.c +++ b/drivers/staging/ks7010/ks_hostif.c @@ -6,15 +6,18 @@ * Copyright (C) 2009 Renesas Technology Corp. */ +#include <crypto/hash.h> #include <linux/circ_buf.h> #include <linux/if_arp.h> #include <net/iw_handler.h> #include <uapi/linux/llc.h> #include "eap_packet.h" #include "ks_wlan.h" -#include "michael_mic.h" #include "ks_hostif.h" +#define MICHAEL_MIC_KEY_LEN 8 +#define MICHAEL_MIC_LEN 8 + static inline void inc_smeqhead(struct ks_wlan_private *priv) { priv->sme_i.qhead = (priv->sme_i.qhead + 1) % SME_EVENT_BUFF_SIZE; @@ -35,7 +38,7 @@ static inline u8 get_byte(struct ks_wlan_private *priv) { u8 data; - data = *(priv->rxp)++; + data = *priv->rxp++; /* length check in advance ! */ --(priv->rx_size); return data; @@ -171,7 +174,7 @@ int get_current_ap(struct ks_wlan_private *priv, struct link_ap_info *ap_info) "- rate_set_size=%d\n", ap->bssid[0], ap->bssid[1], ap->bssid[2], ap->bssid[3], ap->bssid[4], ap->bssid[5], - &(ap->ssid.body[0]), + &ap->ssid.body[0], ap->rate_set.body[0], ap->rate_set.body[1], ap->rate_set.body[2], ap->rate_set.body[3], ap->rate_set.body[4], ap->rate_set.body[5], @@ -191,6 +194,68 @@ static u8 read_ie(unsigned char *bp, u8 max, u8 *body) return size; } +static int +michael_mic(u8 *key, u8 *data, unsigned int len, u8 priority, u8 *result) +{ + u8 pad_data[4] = { priority, 0, 0, 0 }; + struct crypto_shash *tfm = NULL; + struct shash_desc *desc = NULL; + int ret; + + tfm = crypto_alloc_shash("michael_mic", 0, 0); + if (IS_ERR(tfm)) { + ret = PTR_ERR(tfm); + goto err; + } + + ret = crypto_shash_setkey(tfm, key, MICHAEL_MIC_KEY_LEN); + if (ret < 0) + goto err_free_tfm; + + desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(tfm), GFP_KERNEL); + if (!desc) { + ret = -ENOMEM; + goto err_free_tfm; + } + + desc->tfm = tfm; + desc->flags = 0; + + ret = crypto_shash_init(desc); + if (ret < 0) + goto err_free_desc; + + // Compute the MIC value + /* + * IEEE802.11i page 47 + * Figure 43g TKIP MIC processing format + * +--+--+--------+--+----+--+--+--+--+--+--+--+--+ + * |6 |6 |1 |3 |M |1 |1 |1 |1 |1 |1 |1 |1 | Octet + * +--+--+--------+--+----+--+--+--+--+--+--+--+--+ + * |DA|SA|Priority|0 |Data|M0|M1|M2|M3|M4|M5|M6|M7| + * +--+--+--------+--+----+--+--+--+--+--+--+--+--+ + */ + + ret = crypto_shash_update(desc, data, 12); + if (ret < 0) + goto err_free_desc; + + ret = crypto_shash_update(desc, pad_data, 4); + if (ret < 0) + goto err_free_desc; + + ret = crypto_shash_finup(desc, data + 12, len - 12, result); + +err_free_desc: + kzfree(desc); + +err_free_tfm: + crypto_free_shash(tfm); + +err: + return ret; +} + static int get_ap_information(struct ks_wlan_private *priv, struct ap_info *ap_info, struct local_ap *ap) @@ -273,11 +338,11 @@ int hostif_data_indication_wpa(struct ks_wlan_private *priv, { struct ether_hdr *eth_hdr; unsigned short eth_proto; - unsigned char recv_mic[8]; + unsigned char recv_mic[MICHAEL_MIC_LEN]; char buf[128]; unsigned long now; struct mic_failure *mic_failure; - struct michael_mic michael_mic; + u8 mic[MICHAEL_MIC_LEN]; union iwreq_data wrqu; unsigned int key_index = auth_type - 1; struct wpa_key *key = &priv->wpa.key[key_index]; @@ -300,14 +365,20 @@ int hostif_data_indication_wpa(struct ks_wlan_private *priv, netdev_dbg(priv->net_dev, "TKIP: protocol=%04X: size=%u\n", eth_proto, priv->rx_size); /* MIC save */ - memcpy(&recv_mic[0], (priv->rxp) + ((priv->rx_size) - 8), 8); - priv->rx_size = priv->rx_size - 8; + memcpy(&recv_mic[0], + (priv->rxp) + ((priv->rx_size) - sizeof(recv_mic)), + sizeof(recv_mic)); + priv->rx_size = priv->rx_size - sizeof(recv_mic); if (auth_type > 0 && auth_type < 4) { /* auth_type check */ - michael_mic_function(&michael_mic, key->rx_mic_key, - priv->rxp, priv->rx_size, - 0, michael_mic.result); + int ret; + + ret = michael_mic(key->rx_mic_key, + priv->rxp, priv->rx_size, + 0, mic); + if (ret < 0) + return ret; } - if (memcmp(michael_mic.result, recv_mic, 8) != 0) { + if (memcmp(mic, recv_mic, sizeof(mic)) != 0) { now = jiffies; mic_failure = &priv->wpa.mic_failure; /* MIC FAILURE */ @@ -730,9 +801,9 @@ void hostif_scan_indication(struct ks_wlan_private *priv) priv->scan_ind_count++; if (priv->scan_ind_count < LOCAL_APLIST_MAX + 1) { netdev_dbg(priv->net_dev, " scan_ind_count=%d :: aplist.size=%d\n", - priv->scan_ind_count, priv->aplist.size); + priv->scan_ind_count, priv->aplist.size); get_ap_information(priv, (struct ap_info *)(priv->rxp), - &(priv->aplist.ap[priv->scan_ind_count - 1])); + &priv->aplist.ap[priv->scan_ind_count - 1]); priv->aplist.size = priv->scan_ind_count; } else { netdev_dbg(priv->net_dev, " count over :: scan_ind_count=%d\n", @@ -1002,7 +1073,6 @@ int hostif_data_request(struct ks_wlan_private *priv, struct sk_buff *skb) int result = 0; unsigned short eth_proto; struct ether_hdr *eth_hdr; - struct michael_mic michael_mic; unsigned short keyinfo = 0; struct ieee802_1x_hdr *aa1x_hdr; struct wpa_eapol_key *eap_key; @@ -1109,17 +1179,20 @@ int hostif_data_request(struct ks_wlan_private *priv, struct sk_buff *skb) pp->auth_type = cpu_to_le16(TYPE_AUTH); } else { if (priv->wpa.pairwise_suite == IW_AUTH_CIPHER_TKIP) { - michael_mic_function(&michael_mic, - priv->wpa.key[0].tx_mic_key, - &pp->data[0], skb_len, - 0, michael_mic.result); - memcpy(p, michael_mic.result, 8); - length += 8; - skb_len += 8; - p += 8; + u8 mic[MICHAEL_MIC_LEN]; + + ret = michael_mic(priv->wpa.key[0].tx_mic_key, + &pp->data[0], skb_len, + 0, mic); + if (ret < 0) + goto err_kfree; + + memcpy(p, mic, sizeof(mic)); + length += sizeof(mic); + skb_len += sizeof(mic); + p += sizeof(mic); pp->auth_type = cpu_to_le16(TYPE_DATA); - } else if (priv->wpa.pairwise_suite == IW_AUTH_CIPHER_CCMP) { pp->auth_type = diff --git a/drivers/staging/ks7010/ks_wlan_net.c b/drivers/staging/ks7010/ks_wlan_net.c index dc5459ae0b51..3cffc8be6656 100644 --- a/drivers/staging/ks7010/ks_wlan_net.c +++ b/drivers/staging/ks7010/ks_wlan_net.c @@ -182,7 +182,7 @@ static int ks_wlan_set_freq(struct net_device *dev, /* for SLEEP MODE */ /* If setting by frequency, convert to a channel */ if ((fwrq->freq.e == 1) && - (fwrq->freq.m >= (int)2.412e8) && (fwrq->freq.m <= (int)2.487e8)) { + (fwrq->freq.m >= 241200000) && (fwrq->freq.m <= 248700000)) { int f = fwrq->freq.m / 100000; int c = 0; diff --git a/drivers/staging/ks7010/michael_mic.c b/drivers/staging/ks7010/michael_mic.c deleted file mode 100644 index e6bd70846e98..000000000000 --- a/drivers/staging/ks7010/michael_mic.c +++ /dev/null @@ -1,128 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Driver for KeyStream wireless LAN - * - * Copyright (C) 2005-2008 KeyStream Corp. - * Copyright (C) 2009 Renesas Technology Corp. - */ - -#include <asm/unaligned.h> -#include <linux/bitops.h> -#include <linux/string.h> -#include "michael_mic.h" - - -// Reset the state to the empty message. -static inline void michael_clear(struct michael_mic *mic) -{ - mic->l = mic->k0; - mic->r = mic->k1; - mic->m_bytes = 0; -} - -static void michael_init(struct michael_mic *mic, u8 *key) -{ - // Set the key - mic->k0 = get_unaligned_le32(key); - mic->k1 = get_unaligned_le32(key + 4); - - //clear(); - michael_clear(mic); -} - -static inline void michael_block(struct michael_mic *mic) -{ - mic->r ^= rol32(mic->l, 17); - mic->l += mic->r; - mic->r ^= ((mic->l & 0xff00ff00) >> 8) | - ((mic->l & 0x00ff00ff) << 8); - mic->l += mic->r; - mic->r ^= rol32(mic->l, 3); - mic->l += mic->r; - mic->r ^= ror32(mic->l, 2); - mic->l += mic->r; -} - -static void michael_append(struct michael_mic *mic, u8 *src, int bytes) -{ - int addlen; - - if (mic->m_bytes) { - addlen = 4 - mic->m_bytes; - if (addlen > bytes) - addlen = bytes; - memcpy(&mic->m[mic->m_bytes], src, addlen); - mic->m_bytes += addlen; - src += addlen; - bytes -= addlen; - - if (mic->m_bytes < 4) - return; - - mic->l ^= get_unaligned_le32(mic->m); - michael_block(mic); - mic->m_bytes = 0; - } - - while (bytes >= 4) { - mic->l ^= get_unaligned_le32(src); - michael_block(mic); - src += 4; - bytes -= 4; - } - - if (bytes > 0) { - mic->m_bytes = bytes; - memcpy(mic->m, src, bytes); - } -} - -static void michael_get_mic(struct michael_mic *mic, u8 *dst) -{ - u8 *data = mic->m; - - switch (mic->m_bytes) { - case 0: - mic->l ^= 0x5a; - break; - case 1: - mic->l ^= data[0] | 0x5a00; - break; - case 2: - mic->l ^= data[0] | (data[1] << 8) | 0x5a0000; - break; - case 3: - mic->l ^= data[0] | (data[1] << 8) | (data[2] << 16) | - 0x5a000000; - break; - } - michael_block(mic); - michael_block(mic); - // The appendByte function has already computed the result. - put_unaligned_le32(mic->l, dst); - put_unaligned_le32(mic->r, dst + 4); - - // Reset to the empty message. - michael_clear(mic); -} - -void michael_mic_function(struct michael_mic *mic, u8 *key, - u8 *data, unsigned int len, u8 priority, u8 *result) -{ - u8 pad_data[4] = { priority, 0, 0, 0 }; - // Compute the MIC value - /* - * IEEE802.11i page 47 - * Figure 43g TKIP MIC processing format - * +--+--+--------+--+----+--+--+--+--+--+--+--+--+ - * |6 |6 |1 |3 |M |1 |1 |1 |1 |1 |1 |1 |1 | Octet - * +--+--+--------+--+----+--+--+--+--+--+--+--+--+ - * |DA|SA|Priority|0 |Data|M0|M1|M2|M3|M4|M5|M6|M7| - * +--+--+--------+--+----+--+--+--+--+--+--+--+--+ - */ - michael_init(mic, key); - michael_append(mic, data, 12); /* |DA|SA| */ - michael_append(mic, pad_data, 4); /* |Priority|0|0|0| */ - michael_append(mic, data + 12, len - 12); /* |Data| */ - michael_get_mic(mic, result); -} diff --git a/drivers/staging/ks7010/michael_mic.h b/drivers/staging/ks7010/michael_mic.h deleted file mode 100644 index f0ac164b999b..000000000000 --- a/drivers/staging/ks7010/michael_mic.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Driver for KeyStream wireless LAN - * - * Copyright (C) 2005-2008 KeyStream Corp. - * Copyright (C) 2009 Renesas Technology Corp. - */ - -/* MichaelMIC routine define */ -struct michael_mic { - u32 k0; // Key - u32 k1; // Key - u32 l; // Current state - u32 r; // Current state - u8 m[4]; // Message accumulator (single word) - int m_bytes; // # bytes in M - u8 result[8]; -}; - -void michael_mic_function(struct michael_mic *mic, u8 *key, - u8 *data, unsigned int len, u8 priority, u8 *result); diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig index b3620a8f2d9f..1da5c20d65c0 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig @@ -25,16 +25,18 @@ source "drivers/staging/media/davinci_vpfe/Kconfig" source "drivers/staging/media/imx/Kconfig" -source "drivers/staging/media/imx074/Kconfig" - -source "drivers/staging/media/mt9t031/Kconfig" - source "drivers/staging/media/omap4iss/Kconfig" +source "drivers/staging/media/rockchip/vpu/Kconfig" + source "drivers/staging/media/sunxi/Kconfig" source "drivers/staging/media/tegra-vde/Kconfig" source "drivers/staging/media/zoran/Kconfig" +source "drivers/staging/media/ipu3/Kconfig" + +source "drivers/staging/media/soc_camera/Kconfig" + endif diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile index 42948f805548..0355e3030504 100644 --- a/drivers/staging/media/Makefile +++ b/drivers/staging/media/Makefile @@ -1,10 +1,11 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_I2C_BCM2048) += bcm2048/ obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx/ -obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074/ -obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031/ obj-$(CONFIG_VIDEO_DM365_VPFE) += davinci_vpfe/ obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ obj-$(CONFIG_VIDEO_SUNXI) += sunxi/ obj-$(CONFIG_TEGRA_VDE) += tegra-vde/ obj-$(CONFIG_VIDEO_ZORAN) += zoran/ +obj-$(CONFIG_VIDEO_ROCKCHIP_VPU) += rockchip/vpu/ +obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3/ +obj-$(CONFIG_SOC_CAMERA) += soc_camera/ diff --git a/drivers/staging/media/bcm2048/radio-bcm2048.c b/drivers/staging/media/bcm2048/radio-bcm2048.c index 874d290f9622..d9b02ff66259 100644 --- a/drivers/staging/media/bcm2048/radio-bcm2048.c +++ b/drivers/staging/media/bcm2048/radio-bcm2048.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * drivers/staging/media/radio-bcm2048.c * @@ -2574,8 +2575,7 @@ static const struct video_device bcm2048_viddev_template = { /* * I2C driver interface */ -static int bcm2048_i2c_driver_probe(struct i2c_client *client, - const struct i2c_device_id *id) +static int bcm2048_i2c_driver_probe(struct i2c_client *client) { struct bcm2048_device *bdev; int err; @@ -2679,7 +2679,7 @@ static struct i2c_driver bcm2048_i2c_driver = { .driver = { .name = BCM2048_DRIVER_NAME, }, - .probe = bcm2048_i2c_driver_probe, + .probe_new = bcm2048_i2c_driver_probe, .remove = bcm2048_i2c_driver_remove, .id_table = bcm2048_id, }; diff --git a/drivers/staging/media/bcm2048/radio-bcm2048.h b/drivers/staging/media/bcm2048/radio-bcm2048.h index 4d950c1e2e8b..22887a075257 100644 --- a/drivers/staging/media/bcm2048/radio-bcm2048.h +++ b/drivers/staging/media/bcm2048/radio-bcm2048.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * drivers/staging/media/radio-bcm2048.h * diff --git a/drivers/staging/media/davinci_vpfe/Makefile b/drivers/staging/media/davinci_vpfe/Makefile index 9c57042c877d..9268e507f791 100644 --- a/drivers/staging/media/davinci_vpfe/Makefile +++ b/drivers/staging/media/davinci_vpfe/Makefile @@ -6,5 +6,5 @@ davinci-vfpe-objs := \ # Allow building it with COMPILE_TEST on other archs ifndef CONFIG_ARCH_DAVINCI -ccflags-y += -Iarch/arm/mach-davinci/include/ +ccflags-y += -I $(srctree)/arch/arm/mach-davinci/include/ endif diff --git a/drivers/staging/media/davinci_vpfe/davinci_vpfe_user.h b/drivers/staging/media/davinci_vpfe/davinci_vpfe_user.h index 7cc115c9ebe6..8d772029c91d 100644 --- a/drivers/staging/media/davinci_vpfe/davinci_vpfe_user.h +++ b/drivers/staging/media/davinci_vpfe/davinci_vpfe_user.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipe.c b/drivers/staging/media/davinci_vpfe/dm365_ipipe.c index dcfeac818451..3d910b85905c 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_ipipe.c +++ b/drivers/staging/media/davinci_vpfe/dm365_ipipe.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> @@ -62,7 +59,7 @@ static int ipipe_validate_lutdpc_params(struct vpfe_ipipe_lutdpc *lutdpc) for (i = 0; i < lutdpc->dpc_size; i++) if (lutdpc->table[i].horz_pos > LUT_DPC_H_POS_MASK || - lutdpc->table[i].vert_pos > LUT_DPC_V_POS_MASK) + lutdpc->table[i].vert_pos > LUT_DPC_V_POS_MASK) return -EINVAL; return 0; @@ -102,7 +99,7 @@ static int ipipe_get_lutdpc_params(struct vpfe_ipipe_device *ipipe, void *param) lut_param->repl_white = lutdpc->repl_white; lut_param->dpc_size = lutdpc->dpc_size; memcpy(&lut_param->table, &lutdpc->table, - (lutdpc->dpc_size * sizeof(struct vpfe_ipipe_lutdpc_entry))); + (lutdpc->dpc_size * sizeof(struct vpfe_ipipe_lutdpc_entry))); return 0; } @@ -491,7 +488,7 @@ ipipe_validate_rgb2rgb_params(struct vpfe_ipipe_rgb2rgb *rgb2rgb, } static int ipipe_set_rgb2rgb_params(struct vpfe_ipipe_device *ipipe, - unsigned int id, void *param) + unsigned int id, void *param) { struct vpfe_ipipe_rgb2rgb *rgb2rgb = &ipipe->config.rgb2rgb1; struct device *dev = ipipe->subdev.v4l2_dev->dev; @@ -545,7 +542,7 @@ ipipe_set_rgb2rgb_2_params(struct vpfe_ipipe_device *ipipe, void *param) } static int ipipe_get_rgb2rgb_params(struct vpfe_ipipe_device *ipipe, - unsigned int id, void *param) + unsigned int id, void *param) { struct vpfe_ipipe_rgb2rgb *rgb2rgb = &ipipe->config.rgb2rgb1; struct vpfe_ipipe_rgb2rgb *rgb2rgb_param; @@ -775,44 +772,44 @@ success: static int ipipe_validate_rgb2yuv_params(struct vpfe_ipipe_rgb2yuv *rgb2yuv) { if (rgb2yuv->coef_ry.decimal > RGB2YCBCR_COEF_DECI_MASK || - rgb2yuv->coef_ry.integer > RGB2YCBCR_COEF_INT_MASK) + rgb2yuv->coef_ry.integer > RGB2YCBCR_COEF_INT_MASK) return -EINVAL; if (rgb2yuv->coef_gy.decimal > RGB2YCBCR_COEF_DECI_MASK || - rgb2yuv->coef_gy.integer > RGB2YCBCR_COEF_INT_MASK) + rgb2yuv->coef_gy.integer > RGB2YCBCR_COEF_INT_MASK) return -EINVAL; if (rgb2yuv->coef_by.decimal > RGB2YCBCR_COEF_DECI_MASK || - rgb2yuv->coef_by.integer > RGB2YCBCR_COEF_INT_MASK) + rgb2yuv->coef_by.integer > RGB2YCBCR_COEF_INT_MASK) return -EINVAL; if (rgb2yuv->coef_rcb.decimal > RGB2YCBCR_COEF_DECI_MASK || - rgb2yuv->coef_rcb.integer > RGB2YCBCR_COEF_INT_MASK) + rgb2yuv->coef_rcb.integer > RGB2YCBCR_COEF_INT_MASK) return -EINVAL; if (rgb2yuv->coef_gcb.decimal > RGB2YCBCR_COEF_DECI_MASK || - rgb2yuv->coef_gcb.integer > RGB2YCBCR_COEF_INT_MASK) + rgb2yuv->coef_gcb.integer > RGB2YCBCR_COEF_INT_MASK) return -EINVAL; if (rgb2yuv->coef_bcb.decimal > RGB2YCBCR_COEF_DECI_MASK || - rgb2yuv->coef_bcb.integer > RGB2YCBCR_COEF_INT_MASK) + rgb2yuv->coef_bcb.integer > RGB2YCBCR_COEF_INT_MASK) return -EINVAL; if (rgb2yuv->coef_rcr.decimal > RGB2YCBCR_COEF_DECI_MASK || - rgb2yuv->coef_rcr.integer > RGB2YCBCR_COEF_INT_MASK) + rgb2yuv->coef_rcr.integer > RGB2YCBCR_COEF_INT_MASK) return -EINVAL; if (rgb2yuv->coef_gcr.decimal > RGB2YCBCR_COEF_DECI_MASK || - rgb2yuv->coef_gcr.integer > RGB2YCBCR_COEF_INT_MASK) + rgb2yuv->coef_gcr.integer > RGB2YCBCR_COEF_INT_MASK) return -EINVAL; if (rgb2yuv->coef_bcr.decimal > RGB2YCBCR_COEF_DECI_MASK || - rgb2yuv->coef_bcr.integer > RGB2YCBCR_COEF_INT_MASK) + rgb2yuv->coef_bcr.integer > RGB2YCBCR_COEF_INT_MASK) return -EINVAL; if (rgb2yuv->out_ofst_y > RGB2YCBCR_OFST_MASK || - rgb2yuv->out_ofst_cb > RGB2YCBCR_OFST_MASK || - rgb2yuv->out_ofst_cr > RGB2YCBCR_OFST_MASK) + rgb2yuv->out_ofst_cb > RGB2YCBCR_OFST_MASK || + rgb2yuv->out_ofst_cr > RGB2YCBCR_OFST_MASK) return -EINVAL; return 0; @@ -918,7 +915,7 @@ static int ipipe_get_gbce_params(struct vpfe_ipipe_device *ipipe, void *param) gbce_param->type = gbce->type; memcpy(gbce_param->table, gbce->table, - (VPFE_IPIPE_MAX_SIZE_GBCE_LUT * sizeof(unsigned short))); + (VPFE_IPIPE_MAX_SIZE_GBCE_LUT * sizeof(unsigned short))); return 0; } @@ -945,7 +942,7 @@ ipipe_set_yuv422_conv_params(struct vpfe_ipipe_device *ipipe, void *param) yuv422_conv->chrom_pos = VPFE_IPIPE_YUV422_CHR_POS_COSITE; } else { memcpy(yuv422_conv, yuv422_conv_param, - sizeof(struct vpfe_ipipe_yuv422_conv)); + sizeof(struct vpfe_ipipe_yuv422_conv)); if (ipipe_validate_yuv422_conv_params(yuv422_conv) < 0) { dev_err(dev, "Invalid yuv422 params\n"); return -EINVAL; @@ -1382,7 +1379,7 @@ static int ipipe_set_stream(struct v4l2_subdev *sd, int enable) struct vpfe_device *vpfe_dev = to_vpfe_device(ipipe); if (enable && ipipe->input != IPIPE_INPUT_NONE && - ipipe->output != IPIPE_OUTPUT_NONE) { + ipipe->output != IPIPE_OUTPUT_NONE) { if (config_ipipe_hw(ipipe) < 0) return -EINVAL; } @@ -1402,8 +1399,8 @@ static int ipipe_set_stream(struct v4l2_subdev *sd, int enable) */ static struct v4l2_mbus_framefmt * __ipipe_get_format(struct vpfe_ipipe_device *ipipe, - struct v4l2_subdev_pad_config *cfg, unsigned int pad, - enum v4l2_subdev_format_whence which) + struct v4l2_subdev_pad_config *cfg, unsigned int pad, + enum v4l2_subdev_format_whence which) { if (which == V4L2_SUBDEV_FORMAT_TRY) return v4l2_subdev_get_try_format(&ipipe->subdev, cfg, pad); @@ -1421,9 +1418,9 @@ __ipipe_get_format(struct vpfe_ipipe_device *ipipe, */ static void ipipe_try_format(struct vpfe_ipipe_device *ipipe, - struct v4l2_subdev_pad_config *cfg, unsigned int pad, - struct v4l2_mbus_framefmt *fmt, - enum v4l2_subdev_format_whence which) + struct v4l2_subdev_pad_config *cfg, unsigned int pad, + struct v4l2_mbus_framefmt *fmt, + enum v4l2_subdev_format_whence which) { unsigned int max_out_height; unsigned int max_out_width; @@ -1463,13 +1460,13 @@ ipipe_try_format(struct vpfe_ipipe_device *ipipe, */ static int ipipe_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, - struct v4l2_subdev_format *fmt) + struct v4l2_subdev_format *fmt) { struct vpfe_ipipe_device *ipipe = v4l2_get_subdevdata(sd); struct v4l2_mbus_framefmt *format; format = __ipipe_get_format(ipipe, cfg, fmt->pad, fmt->which); - if (format == NULL) + if (!format) return -EINVAL; ipipe_try_format(ipipe, cfg, fmt->pad, &fmt->format, fmt->which); @@ -1479,11 +1476,11 @@ ipipe_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, return 0; if (fmt->pad == IPIPE_PAD_SINK && - (ipipe->input == IPIPE_INPUT_CCDC || + (ipipe->input == IPIPE_INPUT_CCDC || ipipe->input == IPIPE_INPUT_MEMORY)) ipipe->formats[fmt->pad] = fmt->format; else if (fmt->pad == IPIPE_PAD_SOURCE && - ipipe->output == IPIPE_OUTPUT_RESIZER) + ipipe->output == IPIPE_OUTPUT_RESIZER) ipipe->formats[fmt->pad] = fmt->format; else return -EINVAL; @@ -1499,7 +1496,7 @@ ipipe_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, */ static int ipipe_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, - struct v4l2_subdev_format *fmt) + struct v4l2_subdev_format *fmt) { struct vpfe_ipipe_device *ipipe = v4l2_get_subdevdata(sd); @@ -1519,8 +1516,8 @@ ipipe_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, */ static int ipipe_enum_frame_size(struct v4l2_subdev *sd, - struct v4l2_subdev_pad_config *cfg, - struct v4l2_subdev_frame_size_enum *fse) + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) { struct vpfe_ipipe_device *ipipe = v4l2_get_subdevdata(sd); struct v4l2_mbus_framefmt format; @@ -1687,7 +1684,7 @@ static const struct v4l2_subdev_ops ipipe_v4l2_ops = { */ static int ipipe_link_setup(struct media_entity *entity, const struct media_pad *local, - const struct media_pad *remote, u32 flags) + const struct media_pad *remote, u32 flags) { struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); struct vpfe_ipipe_device *ipipe = v4l2_get_subdevdata(sd); @@ -1749,7 +1746,7 @@ void vpfe_ipipe_unregister_entities(struct vpfe_ipipe_device *vpfe_ipipe) */ int vpfe_ipipe_register_entities(struct vpfe_ipipe_device *ipipe, - struct v4l2_device *vdev) + struct v4l2_device *vdev) { int ret; @@ -1820,8 +1817,6 @@ vpfe_ipipe_init(struct vpfe_ipipe_device *ipipe, struct platform_device *pdev) v4l2_ctrl_new_std(&ipipe->ctrls, &ipipe_ctrl_ops, V4L2_CID_CONTRAST, 0, IPIPE_CONTRAST_HIGH, 1, 16); - - v4l2_ctrl_handler_setup(&ipipe->ctrls); sd->ctrl_handler = &ipipe->ctrls; diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipe.h b/drivers/staging/media/davinci_vpfe/dm365_ipipe.h index d81b29e19309..174334b53f96 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_ipipe.h +++ b/drivers/staging/media/davinci_vpfe/dm365_ipipe.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c b/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c index dbb7ddc70bef..565a3dc5bed1 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c +++ b/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> @@ -784,7 +781,7 @@ ipipe_set_3d_lut_regs(void __iomem *base_addr, void __iomem *isp5_base_addr, if (!lut_3d->en) return; - /* valied table */ + /* valid table */ tbl = lut_3d->table; for (i = 0; i < VPFE_IPIPE_MAX_SIZE_3D_LUT; i++) { /* diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.h b/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.h index 7ee157233047..16b6a14b7058 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.h +++ b/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipeif.c b/drivers/staging/media/davinci_vpfe/dm365_ipipeif.c index e3425bf082ae..22fcdbcde96b 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_ipipeif.c +++ b/drivers/staging/media/davinci_vpfe/dm365_ipipeif.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipeif.h b/drivers/staging/media/davinci_vpfe/dm365_ipipeif.h index cea3d61335af..4685d64016de 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_ipipeif.h +++ b/drivers/staging/media/davinci_vpfe/dm365_ipipeif.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipeif_user.h b/drivers/staging/media/davinci_vpfe/dm365_ipipeif_user.h index e2a69b59554a..046dbdec67d8 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_ipipeif_user.h +++ b/drivers/staging/media/davinci_vpfe/dm365_ipipeif_user.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/dm365_isif.c b/drivers/staging/media/davinci_vpfe/dm365_isif.c index 39eb0819ab4e..0a6d038fcec9 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_isif.c +++ b/drivers/staging/media/davinci_vpfe/dm365_isif.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> @@ -678,7 +675,7 @@ static void isif_config_bclamp(struct vpfe_isif_device *isif, val = (bc->bc_mode_color & ISIF_BC_MODE_COLOR_MASK) << ISIF_BC_MODE_COLOR_SHIFT; - /* Enable BC and horizontal clamp calculation paramaters */ + /* Enable BC and horizontal clamp calculation parameters */ val = val | 1 | ((bc->horz.mode & ISIF_HORZ_BC_MODE_MASK) << ISIF_HORZ_BC_MODE_SHIFT); @@ -715,7 +712,7 @@ static void isif_config_bclamp(struct vpfe_isif_device *isif, isif_write(isif->isif_cfg.base_addr, val, CLHWIN2); } - /* vertical clamp calculation paramaters */ + /* vertical clamp calculation parameters */ /* OB H Valid */ val = bc->vert.ob_h_sz_calc & ISIF_VERT_BC_OB_H_SZ_MASK; diff --git a/drivers/staging/media/davinci_vpfe/dm365_isif.h b/drivers/staging/media/davinci_vpfe/dm365_isif.h index 89e814e9c0d7..0e1fe472fb2b 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_isif.h +++ b/drivers/staging/media/davinci_vpfe/dm365_isif.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/dm365_isif_regs.h b/drivers/staging/media/davinci_vpfe/dm365_isif_regs.h index 64fbb459baa2..6695680817b9 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_isif_regs.h +++ b/drivers/staging/media/davinci_vpfe/dm365_isif_regs.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/dm365_resizer.c b/drivers/staging/media/davinci_vpfe/dm365_resizer.c index 72bbbc34d18c..9d726298b406 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_resizer.c +++ b/drivers/staging/media/davinci_vpfe/dm365_resizer.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> @@ -1287,7 +1284,7 @@ static int resizer_set_stream(struct v4l2_subdev *sd, int enable) * @cfg: V4L2 subdev pad config * @pad: pad number. * @which: wanted subdev format. - * Retun wanted mbus frame format. + * Return wanted mbus frame format. */ static struct v4l2_mbus_framefmt * __resizer_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, @@ -1788,7 +1785,7 @@ void vpfe_resizer_unregister_entities(struct vpfe_resizer_device *vpfe_rsz) /* * vpfe_resizer_register_entities() - Register entity - * @resizer - pointer to resizer devive. + * @resizer - pointer to resizer device. * @vdev: pointer to v4l2 device structure. */ int vpfe_resizer_register_entities(struct vpfe_resizer_device *resizer, diff --git a/drivers/staging/media/davinci_vpfe/dm365_resizer.h b/drivers/staging/media/davinci_vpfe/dm365_resizer.h index cf560a33d862..5e31de96b2c9 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_resizer.h +++ b/drivers/staging/media/davinci_vpfe/dm365_resizer.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/vpfe.h b/drivers/staging/media/davinci_vpfe/vpfe.h index 0587bc52a840..1f8e011fc162 100644 --- a/drivers/staging/media/davinci_vpfe/vpfe.h +++ b/drivers/staging/media/davinci_vpfe/vpfe.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.c b/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.c index bdf6ee5ad96c..57b93605bc58 100644 --- a/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.c +++ b/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> @@ -531,7 +528,7 @@ static void vpfe_cleanup_modules(struct vpfe_device *vpfe_dev, * @vpfe_dev - ptr to vpfe capture device * @pdev - pointer to platform device * - * intialize all v4l2 subdevs and media entities + * initialize all v4l2 subdevs and media entities */ static int vpfe_initialize_modules(struct vpfe_device *vpfe_dev, struct platform_device *pdev) diff --git a/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.h b/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.h index 8ad8d743f4e0..fe4a421b5dba 100644 --- a/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.h +++ b/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/vpfe_video.c b/drivers/staging/media/davinci_vpfe/vpfe_video.c index 5e9769ea8a50..510202a3b091 100644 --- a/drivers/staging/media/davinci_vpfe/vpfe_video.c +++ b/drivers/staging/media/davinci_vpfe/vpfe_video.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/davinci_vpfe/vpfe_video.h b/drivers/staging/media/davinci_vpfe/vpfe_video.h index 4bbd219e8329..5d01c4883ab4 100644 --- a/drivers/staging/media/davinci_vpfe/vpfe_video.h +++ b/drivers/staging/media/davinci_vpfe/vpfe_video.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2012 Texas Instruments Inc * @@ -10,10 +11,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * * Contributors: * Manjunath Hadli <manjunath.hadli@ti.com> * Prabhakar Lad <prabhakar.lad@ti.com> diff --git a/drivers/staging/media/imx/Kconfig b/drivers/staging/media/imx/Kconfig index bfc17de56b17..36b276ea2ecc 100644 --- a/drivers/staging/media/imx/Kconfig +++ b/drivers/staging/media/imx/Kconfig @@ -11,7 +11,7 @@ config VIDEO_IMX_MEDIA driver for the i.MX5/6 SOC. if VIDEO_IMX_MEDIA -menu "i.MX5/6 Media Sub devices" +menu "i.MX5/6/7 Media Sub devices" config VIDEO_IMX_CSI tristate "i.MX5/6 Camera Sensor Interface driver" @@ -20,5 +20,12 @@ config VIDEO_IMX_CSI ---help--- A video4linux camera sensor interface driver for i.MX5/6. +config VIDEO_IMX7_CSI + tristate "i.MX7 Camera Sensor Interface driver" + depends on VIDEO_IMX_MEDIA && VIDEO_DEV && I2C + default y + help + Enable support for video4linux camera sensor interface driver for + i.MX7. endmenu endif diff --git a/drivers/staging/media/imx/Makefile b/drivers/staging/media/imx/Makefile index 698a4210316e..d2d909a36239 100644 --- a/drivers/staging/media/imx/Makefile +++ b/drivers/staging/media/imx/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 imx-media-objs := imx-media-dev.o imx-media-internal-sd.o imx-media-of.o +imx-media-objs += imx-media-dev-common.o imx-media-common-objs := imx-media-utils.o imx-media-fim.o imx-media-ic-objs := imx-ic-common.o imx-ic-prp.o imx-ic-prpencvf.o @@ -11,3 +12,6 @@ obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx-media-ic.o obj-$(CONFIG_VIDEO_IMX_CSI) += imx-media-csi.o obj-$(CONFIG_VIDEO_IMX_CSI) += imx6-mipi-csi2.o + +obj-$(CONFIG_VIDEO_IMX7_CSI) += imx7-media-csi.o +obj-$(CONFIG_VIDEO_IMX7_CSI) += imx7-mipi-csis.o diff --git a/drivers/staging/media/imx/TODO b/drivers/staging/media/imx/TODO index aeeb15494a49..6f29b5ca5324 100644 --- a/drivers/staging/media/imx/TODO +++ b/drivers/staging/media/imx/TODO @@ -45,3 +45,12 @@ Which means a port must not contain mixed-use endpoints, they must all refer to media links between V4L2 subdevices. + +- i.MX7: all of the above, since it uses the imx media core + +- i.MX7: use Frame Interval Monitor + +- i.MX7: runtime testing with parallel sensor, links setup and streaming + +- i.MX7: runtime testing with different formats, for the time only 10-bit bayer + is tested diff --git a/drivers/staging/media/imx/imx-ic-common.c b/drivers/staging/media/imx/imx-ic-common.c index cfdd4900a3be..765919487a73 100644 --- a/drivers/staging/media/imx/imx-ic-common.c +++ b/drivers/staging/media/imx/imx-ic-common.c @@ -41,13 +41,13 @@ static int imx_ic_probe(struct platform_device *pdev) pdata = priv->dev->platform_data; priv->ipu_id = pdata->ipu_id; switch (pdata->grp_id) { - case IMX_MEDIA_GRP_ID_IC_PRP: + case IMX_MEDIA_GRP_ID_IPU_IC_PRP: priv->task_id = IC_TASK_PRP; break; - case IMX_MEDIA_GRP_ID_IC_PRPENC: + case IMX_MEDIA_GRP_ID_IPU_IC_PRPENC: priv->task_id = IC_TASK_ENCODER; break; - case IMX_MEDIA_GRP_ID_IC_PRPVF: + case IMX_MEDIA_GRP_ID_IPU_IC_PRPVF: priv->task_id = IC_TASK_VIEWFINDER; break; default: diff --git a/drivers/staging/media/imx/imx-ic-prp.c b/drivers/staging/media/imx/imx-ic-prp.c index 98923fc844ce..3d43cdcb4bb9 100644 --- a/drivers/staging/media/imx/imx-ic-prp.c +++ b/drivers/staging/media/imx/imx-ic-prp.c @@ -77,7 +77,7 @@ static int prp_start(struct prp_priv *priv) priv->ipu = priv->md->ipu[ic_priv->ipu_id]; /* set IC to receive from CSI or VDI depending on source */ - src_is_vdic = !!(priv->src_sd->grp_id & IMX_MEDIA_GRP_ID_VDIC); + src_is_vdic = !!(priv->src_sd->grp_id & IMX_MEDIA_GRP_ID_IPU_VDIC); ipu_set_ic_src_mux(priv->ipu, priv->csi_id, src_is_vdic); @@ -237,8 +237,8 @@ static int prp_link_setup(struct media_entity *entity, ret = -EBUSY; goto out; } - if (priv->sink_sd_prpenc && (remote_sd->grp_id & - IMX_MEDIA_GRP_ID_VDIC)) { + if (priv->sink_sd_prpenc && + (remote_sd->grp_id & IMX_MEDIA_GRP_ID_IPU_VDIC)) { ret = -EINVAL; goto out; } @@ -259,7 +259,7 @@ static int prp_link_setup(struct media_entity *entity, goto out; } if (priv->src_sd && (priv->src_sd->grp_id & - IMX_MEDIA_GRP_ID_VDIC)) { + IMX_MEDIA_GRP_ID_IPU_VDIC)) { ret = -EINVAL; goto out; } @@ -309,13 +309,13 @@ static int prp_link_validate(struct v4l2_subdev *sd, return ret; csi = imx_media_find_upstream_subdev(priv->md, &ic_priv->sd.entity, - IMX_MEDIA_GRP_ID_CSI); + IMX_MEDIA_GRP_ID_IPU_CSI); if (IS_ERR(csi)) csi = NULL; mutex_lock(&priv->lock); - if (priv->src_sd->grp_id & IMX_MEDIA_GRP_ID_VDIC) { + if (priv->src_sd->grp_id & IMX_MEDIA_GRP_ID_IPU_VDIC) { /* * the ->PRPENC link cannot be enabled if the source * is the VDIC @@ -334,10 +334,10 @@ static int prp_link_validate(struct v4l2_subdev *sd, if (csi) { switch (csi->grp_id) { - case IMX_MEDIA_GRP_ID_CSI0: + case IMX_MEDIA_GRP_ID_IPU_CSI0: priv->csi_id = 0; break; - case IMX_MEDIA_GRP_ID_CSI1: + case IMX_MEDIA_GRP_ID_IPU_CSI1: priv->csi_id = 1; break; default: @@ -422,9 +422,14 @@ static int prp_s_frame_interval(struct v4l2_subdev *sd, if (fi->pad >= PRP_NUM_PADS) return -EINVAL; - /* No limits on frame interval */ mutex_lock(&priv->lock); - priv->frame_interval = fi->interval; + + /* No limits on valid frame intervals */ + if (fi->interval.numerator == 0 || fi->interval.denominator == 0) + fi->interval = priv->frame_interval; + else + priv->frame_interval = fi->interval; + mutex_unlock(&priv->lock); return 0; diff --git a/drivers/staging/media/imx/imx-ic-prpencvf.c b/drivers/staging/media/imx/imx-ic-prpencvf.c index 28f41caba05d..5c8e6ad8c025 100644 --- a/drivers/staging/media/imx/imx-ic-prpencvf.c +++ b/drivers/staging/media/imx/imx-ic-prpencvf.c @@ -48,7 +48,7 @@ #define MAX_W_SRC 1024 #define MAX_H_SRC 1024 -#define W_ALIGN_SRC 4 /* multiple of 16 pixels */ +#define W_ALIGN_SRC 1 /* multiple of 2 pixels */ #define H_ALIGN_SRC 1 /* multiple of 2 lines */ #define S_ALIGN 1 /* multiple of 2 */ @@ -106,6 +106,7 @@ struct prp_priv { u32 frame_sequence; /* frame sequence counter */ bool last_eof; /* waiting for last EOF at stream off */ bool nfb4eof; /* NFB4EOF encountered during streaming */ + bool interweave_swap; /* swap top/bottom lines when interweaving */ struct completion last_eof_comp; }; @@ -235,6 +236,9 @@ static void prp_vb2_buf_done(struct prp_priv *priv, struct ipuv3_channel *ch) if (ipu_idmac_buffer_is_ready(ch, priv->ipu_buf_num)) ipu_idmac_clear_buffer(ch, priv->ipu_buf_num); + if (priv->interweave_swap && ch == priv->out_ch) + phys += vdev->fmt.fmt.pix.bytesperline; + ipu_cpmem_set_buffer(ch, priv->ipu_buf_num, phys); } @@ -354,20 +358,30 @@ static int prp_setup_channel(struct prp_priv *priv, { struct imx_media_video_dev *vdev = priv->vdev; const struct imx_media_pixfmt *outcc; - struct v4l2_mbus_framefmt *infmt; + struct v4l2_mbus_framefmt *outfmt; unsigned int burst_size; struct ipu_image image; + bool interweave; int ret; - infmt = &priv->format_mbus[PRPENCVF_SINK_PAD]; + outfmt = &priv->format_mbus[PRPENCVF_SRC_PAD]; outcc = vdev->cc; ipu_cpmem_zero(channel); memset(&image, 0, sizeof(image)); image.pix = vdev->fmt.fmt.pix; - image.rect.width = image.pix.width; - image.rect.height = image.pix.height; + image.rect = vdev->compose; + + /* + * If the field type at capture interface is interlaced, and + * the output IDMAC pad is sequential, enable interweave at + * the IDMAC output channel. + */ + interweave = V4L2_FIELD_IS_INTERLACED(image.pix.field) && + V4L2_FIELD_IS_SEQUENTIAL(outfmt->field); + priv->interweave_swap = interweave && + image.pix.field == V4L2_FIELD_INTERLACED_BT; if (rot_swap_width_height) { swap(image.pix.width, image.pix.height); @@ -378,15 +392,25 @@ static int prp_setup_channel(struct prp_priv *priv, (image.pix.width * outcc->bpp) >> 3; } + if (priv->interweave_swap && channel == priv->out_ch) { + /* start interweave scan at 1st top line (2nd line) */ + image.rect.top = 1; + } + image.phys0 = addr0; image.phys1 = addr1; - if (channel == priv->out_ch || channel == priv->rot_out_ch) { + /* + * Skip writing U and V components to odd rows in the output + * channels for planar 4:2:0 (but not when enabling IDMAC + * interweaving, they are incompatible). + */ + if ((channel == priv->out_ch && !interweave) || + channel == priv->rot_out_ch) { switch (image.pix.pixelformat) { case V4L2_PIX_FMT_YUV420: case V4L2_PIX_FMT_YVU420: case V4L2_PIX_FMT_NV12: - /* Skip writing U and V components to odd rows */ ipu_cpmem_skip_odd_chroma_rows(channel); break; } @@ -409,10 +433,12 @@ static int prp_setup_channel(struct prp_priv *priv, if (rot_mode) ipu_cpmem_set_rotation(channel, rot_mode); - if (image.pix.field == V4L2_FIELD_NONE && - V4L2_FIELD_HAS_BOTH(infmt->field) && - channel == priv->out_ch) - ipu_cpmem_interlaced_scan(channel, image.pix.bytesperline); + if (interweave && channel == priv->out_ch) + ipu_cpmem_interlaced_scan(channel, + priv->interweave_swap ? + -image.pix.bytesperline : + image.pix.bytesperline, + image.pix.pixelformat); ret = ipu_ic_task_idma_init(priv->ic, channel, image.pix.width, image.pix.height, @@ -680,12 +706,23 @@ static int prp_start(struct prp_priv *priv) goto out_free_nfb4eof_irq; } + /* start upstream */ + ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 1); + ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; + if (ret) { + v4l2_err(&ic_priv->sd, + "upstream stream on failed: %d\n", ret); + goto out_free_eof_irq; + } + /* start the EOF timeout timer */ mod_timer(&priv->eof_timeout_timer, jiffies + msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT)); return 0; +out_free_eof_irq: + devm_free_irq(ic_priv->dev, priv->eof_irq, priv); out_free_nfb4eof_irq: devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv); out_unsetup: @@ -717,6 +754,12 @@ static void prp_stop(struct prp_priv *priv) if (ret == 0) v4l2_warn(&ic_priv->sd, "wait last EOF timeout\n"); + /* stop upstream */ + ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 0); + if (ret && ret != -ENOIOCTLCMD) + v4l2_warn(&ic_priv->sd, + "upstream stream off failed: %d\n", ret); + devm_free_irq(ic_priv->dev, priv->eof_irq, priv); devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv); @@ -838,8 +881,7 @@ static void prp_try_fmt(struct prp_priv *priv, infmt = __prp_get_fmt(priv, cfg, PRPENCVF_SINK_PAD, sdformat->which); if (sdformat->pad == PRPENCVF_SRC_PAD) { - if (sdformat->format.field != V4L2_FIELD_NONE) - sdformat->format.field = infmt->field; + sdformat->format.field = infmt->field; prp_bound_align_output(&sdformat->format, infmt, priv->rot_mode); @@ -870,6 +912,7 @@ static int prp_set_fmt(struct v4l2_subdev *sd, const struct imx_media_pixfmt *cc; struct v4l2_pix_format vdev_fmt; struct v4l2_mbus_framefmt *fmt; + struct v4l2_rect vdev_compose; int ret = 0; if (sdformat->pad >= PRPENCVF_NUM_PADS) @@ -911,11 +954,11 @@ static int prp_set_fmt(struct v4l2_subdev *sd, priv->cc[sdformat->pad] = cc; /* propagate output pad format to capture device */ - imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, + imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, &vdev_compose, &priv->format_mbus[PRPENCVF_SRC_PAD], priv->cc[PRPENCVF_SRC_PAD]); mutex_unlock(&priv->lock); - imx_media_capture_device_set_format(vdev, &vdev_fmt); + imx_media_capture_device_set_format(vdev, &vdev_fmt, &vdev_compose); return 0; out: @@ -1148,15 +1191,6 @@ static int prp_s_stream(struct v4l2_subdev *sd, int enable) if (ret) goto out; - /* start/stop upstream */ - ret = v4l2_subdev_call(priv->src_sd, video, s_stream, enable); - ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; - if (ret) { - if (enable) - prp_stop(priv); - goto out; - } - update_count: priv->stream_count += enable ? 1 : -1; if (priv->stream_count < 0) @@ -1189,9 +1223,14 @@ static int prp_s_frame_interval(struct v4l2_subdev *sd, if (fi->pad >= PRPENCVF_NUM_PADS) return -EINVAL; - /* No limits on frame interval */ mutex_lock(&priv->lock); - priv->frame_interval = fi->interval; + + /* No limits on valid frame intervals */ + if (fi->interval.numerator == 0 || fi->interval.denominator == 0) + fi->interval = priv->frame_interval; + else + priv->frame_interval = fi->interval; + mutex_unlock(&priv->lock); return 0; diff --git a/drivers/staging/media/imx/imx-media-capture.c b/drivers/staging/media/imx/imx-media-capture.c index b37e1186eb2f..9703c85b19c4 100644 --- a/drivers/staging/media/imx/imx-media-capture.c +++ b/drivers/staging/media/imx/imx-media-capture.c @@ -203,21 +203,14 @@ static int capture_g_fmt_vid_cap(struct file *file, void *fh, return 0; } -static int capture_try_fmt_vid_cap(struct file *file, void *fh, - struct v4l2_format *f) +static int __capture_try_fmt_vid_cap(struct capture_priv *priv, + struct v4l2_subdev_format *fmt_src, + struct v4l2_format *f, + struct v4l2_rect *compose) { - struct capture_priv *priv = video_drvdata(file); - struct v4l2_subdev_format fmt_src; const struct imx_media_pixfmt *cc, *cc_src; - int ret; - - fmt_src.pad = priv->src_sd_pad; - fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE; - ret = v4l2_subdev_call(priv->src_sd, pad, get_fmt, NULL, &fmt_src); - if (ret) - return ret; - cc_src = imx_media_find_ipu_format(fmt_src.format.code, CS_SEL_ANY); + cc_src = imx_media_find_ipu_format(fmt_src->format.code, CS_SEL_ANY); if (cc_src) { u32 fourcc, cs_sel; @@ -231,7 +224,7 @@ static int capture_try_fmt_vid_cap(struct file *file, void *fh, cc = imx_media_find_format(fourcc, cs_sel, false); } } else { - cc_src = imx_media_find_mbus_format(fmt_src.format.code, + cc_src = imx_media_find_mbus_format(fmt_src->format.code, CS_SEL_ANY, true); if (WARN_ON(!cc_src)) return -EINVAL; @@ -239,15 +232,48 @@ static int capture_try_fmt_vid_cap(struct file *file, void *fh, cc = cc_src; } - imx_media_mbus_fmt_to_pix_fmt(&f->fmt.pix, &fmt_src.format, cc); + /* allow IDMAC interweave but enforce field order from source */ + if (V4L2_FIELD_IS_INTERLACED(f->fmt.pix.field)) { + switch (fmt_src->format.field) { + case V4L2_FIELD_SEQ_TB: + fmt_src->format.field = V4L2_FIELD_INTERLACED_TB; + break; + case V4L2_FIELD_SEQ_BT: + fmt_src->format.field = V4L2_FIELD_INTERLACED_BT; + break; + default: + break; + } + } + + imx_media_mbus_fmt_to_pix_fmt(&f->fmt.pix, compose, + &fmt_src->format, cc); return 0; } +static int capture_try_fmt_vid_cap(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct capture_priv *priv = video_drvdata(file); + struct v4l2_subdev_format fmt_src; + int ret; + + fmt_src.pad = priv->src_sd_pad; + fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE; + ret = v4l2_subdev_call(priv->src_sd, pad, get_fmt, NULL, &fmt_src); + if (ret) + return ret; + + return __capture_try_fmt_vid_cap(priv, &fmt_src, f, NULL); +} + static int capture_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f) { struct capture_priv *priv = video_drvdata(file); + struct v4l2_subdev_format fmt_src; + struct v4l2_rect compose; int ret; if (vb2_is_busy(&priv->q)) { @@ -255,13 +281,20 @@ static int capture_s_fmt_vid_cap(struct file *file, void *fh, return -EBUSY; } - ret = capture_try_fmt_vid_cap(file, priv, f); + fmt_src.pad = priv->src_sd_pad; + fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE; + ret = v4l2_subdev_call(priv->src_sd, pad, get_fmt, NULL, &fmt_src); + if (ret) + return ret; + + ret = __capture_try_fmt_vid_cap(priv, &fmt_src, f, &compose); if (ret) return ret; priv->vdev.fmt.fmt.pix = f->fmt.pix; priv->vdev.cc = imx_media_find_format(f->fmt.pix.pixelformat, CS_SEL_ANY, true); + priv->vdev.compose = compose; return 0; } @@ -290,6 +323,36 @@ static int capture_s_std(struct file *file, void *fh, v4l2_std_id std) return v4l2_subdev_call(priv->src_sd, video, s_std, std); } +static int capture_g_selection(struct file *file, void *fh, + struct v4l2_selection *s) +{ + struct capture_priv *priv = video_drvdata(file); + + switch (s->target) { + case V4L2_SEL_TGT_COMPOSE: + case V4L2_SEL_TGT_COMPOSE_DEFAULT: + case V4L2_SEL_TGT_COMPOSE_BOUNDS: + /* The compose rectangle is fixed to the source format. */ + s->r = priv->vdev.compose; + break; + case V4L2_SEL_TGT_COMPOSE_PADDED: + /* + * The hardware writes with a configurable but fixed DMA burst + * size. If the source format width is not burst size aligned, + * the written frame contains padding to the right. + */ + s->r.left = 0; + s->r.top = 0; + s->r.width = priv->vdev.fmt.fmt.pix.width; + s->r.height = priv->vdev.fmt.fmt.pix.height; + break; + default: + return -EINVAL; + } + + return 0; +} + static int capture_g_parm(struct file *file, void *fh, struct v4l2_streamparm *a) { @@ -335,6 +398,21 @@ static int capture_s_parm(struct file *file, void *fh, return 0; } +static int capture_subscribe_event(struct v4l2_fh *fh, + const struct v4l2_event_subscription *sub) +{ + switch (sub->type) { + case V4L2_EVENT_IMX_FRAME_INTERVAL_ERROR: + return v4l2_event_subscribe(fh, sub, 0, NULL); + case V4L2_EVENT_SOURCE_CHANGE: + return v4l2_src_change_event_subscribe(fh, sub); + case V4L2_EVENT_CTRL: + return v4l2_ctrl_subscribe_event(fh, sub); + default: + return -EINVAL; + } +} + static const struct v4l2_ioctl_ops capture_ioctl_ops = { .vidioc_querycap = vidioc_querycap, @@ -350,6 +428,8 @@ static const struct v4l2_ioctl_ops capture_ioctl_ops = { .vidioc_g_std = capture_g_std, .vidioc_s_std = capture_s_std, + .vidioc_g_selection = capture_g_selection, + .vidioc_g_parm = capture_g_parm, .vidioc_s_parm = capture_s_parm, @@ -362,6 +442,9 @@ static const struct v4l2_ioctl_ops capture_ioctl_ops = { .vidioc_expbuf = vb2_ioctl_expbuf, .vidioc_streamon = vb2_ioctl_streamon, .vidioc_streamoff = vb2_ioctl_streamoff, + + .vidioc_subscribe_event = capture_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, }; /* @@ -572,7 +655,8 @@ static struct video_device capture_videodev = { }; void imx_media_capture_device_set_format(struct imx_media_video_dev *vdev, - struct v4l2_pix_format *pix) + const struct v4l2_pix_format *pix, + const struct v4l2_rect *compose) { struct capture_priv *priv = to_capture_priv(vdev); @@ -580,6 +664,7 @@ void imx_media_capture_device_set_format(struct imx_media_video_dev *vdev, priv->vdev.fmt.fmt.pix = *pix; priv->vdev.cc = imx_media_find_format(pix->pixelformat, CS_SEL_ANY, true); + priv->vdev.compose = *compose; mutex_unlock(&priv->mutex); } EXPORT_SYMBOL_GPL(imx_media_capture_device_set_format); @@ -685,7 +770,7 @@ int imx_media_capture_device_register(struct imx_media_video_dev *vdev) } vdev->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - imx_media_mbus_fmt_to_pix_fmt(&vdev->fmt.fmt.pix, + imx_media_mbus_fmt_to_pix_fmt(&vdev->fmt.fmt.pix, &vdev->compose, &fmt_src.format, NULL); vdev->cc = imx_media_find_format(vdev->fmt.fmt.pix.pixelformat, CS_SEL_ANY, false); diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index 4223f8d418ae..3b7517348666 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -41,7 +41,7 @@ #define MIN_H 144 #define MAX_W 4096 #define MAX_H 4096 -#define W_ALIGN 4 /* multiple of 16 pixels */ +#define W_ALIGN 1 /* multiple of 2 pixels */ #define H_ALIGN 1 /* multiple of 2 lines */ #define S_ALIGN 1 /* multiple of 2 */ @@ -114,6 +114,7 @@ struct csi_priv { u32 frame_sequence; /* frame sequence counter */ bool last_eof; /* waiting for last EOF at stream off */ bool nfb4eof; /* NFB4EOF encountered during streaming */ + bool interweave_swap; /* swap top/bottom lines when interweaving */ struct completion last_eof_comp; }; @@ -286,6 +287,9 @@ static void csi_vb2_buf_done(struct csi_priv *priv) if (ipu_idmac_buffer_is_ready(priv->idmac_ch, priv->ipu_buf_num)) ipu_idmac_clear_buffer(priv->idmac_ch, priv->ipu_buf_num); + if (priv->interweave_swap) + phys += vdev->fmt.fmt.pix.bytesperline; + ipu_cpmem_set_buffer(priv->idmac_ch, priv->ipu_buf_num, phys); } @@ -398,23 +402,24 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) struct imx_media_video_dev *vdev = priv->vdev; const struct imx_media_pixfmt *incc; struct v4l2_mbus_framefmt *infmt; + struct v4l2_mbus_framefmt *outfmt; + bool passthrough, interweave; struct ipu_image image; u32 passthrough_bits; u32 passthrough_cycles; dma_addr_t phys[2]; - bool passthrough; u32 burst_size; int ret; infmt = &priv->format_mbus[CSI_SINK_PAD]; incc = priv->cc[CSI_SINK_PAD]; + outfmt = &priv->format_mbus[CSI_SRC_PAD_IDMAC]; ipu_cpmem_zero(priv->idmac_ch); memset(&image, 0, sizeof(image)); image.pix = vdev->fmt.fmt.pix; - image.rect.width = image.pix.width; - image.rect.height = image.pix.height; + image.rect = vdev->compose; csi_idmac_setup_vb2_buf(priv, phys); @@ -424,6 +429,16 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) passthrough = requires_passthrough(&priv->upstream_ep, infmt, incc); passthrough_cycles = 1; + /* + * If the field type at capture interface is interlaced, and + * the output IDMAC pad is sequential, enable interweave at + * the IDMAC output channel. + */ + interweave = V4L2_FIELD_IS_INTERLACED(image.pix.field) && + V4L2_FIELD_IS_SEQUENTIAL(outfmt->field); + priv->interweave_swap = interweave && + image.pix.field == V4L2_FIELD_INTERLACED_BT; + switch (image.pix.pixelformat) { case V4L2_PIX_FMT_SBGGR8: case V4L2_PIX_FMT_SGBRG8: @@ -442,13 +457,18 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) passthrough_bits = 16; break; case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_YVU420: case V4L2_PIX_FMT_NV12: burst_size = (image.pix.width & 0x3f) ? ((image.pix.width & 0x1f) ? ((image.pix.width & 0xf) ? 8 : 16) : 32) : 64; passthrough_bits = 16; - /* Skip writing U and V components to odd rows */ - ipu_cpmem_skip_odd_chroma_rows(priv->idmac_ch); + /* + * Skip writing U and V components to odd rows (but not + * when enabling IDMAC interweaving, they are incompatible). + */ + if (!interweave) + ipu_cpmem_skip_odd_chroma_rows(priv->idmac_ch); break; case V4L2_PIX_FMT_YUYV: case V4L2_PIX_FMT_UYVY: @@ -471,6 +491,12 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) } if (passthrough) { + if (priv->interweave_swap) { + /* start interweave scan at 1st top line (2nd line) */ + image.phys0 += image.pix.bytesperline; + image.phys1 += image.pix.bytesperline; + } + ipu_cpmem_set_resolution(priv->idmac_ch, image.rect.width * passthrough_cycles, image.rect.height); @@ -480,6 +506,11 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) ipu_cpmem_set_format_passthrough(priv->idmac_ch, passthrough_bits); } else { + if (priv->interweave_swap) { + /* start interweave scan at 1st top line (2nd line) */ + image.rect.top = 1; + } + ret = ipu_cpmem_set_image(priv->idmac_ch, &image); if (ret) goto unsetup_vb2; @@ -509,10 +540,12 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) ipu_smfc_set_burstsize(priv->smfc, burst_size); - if (image.pix.field == V4L2_FIELD_NONE && - V4L2_FIELD_HAS_BOTH(infmt->field)) + if (interweave) ipu_cpmem_interlaced_scan(priv->idmac_ch, - image.pix.bytesperline); + priv->interweave_swap ? + -image.pix.bytesperline : + image.pix.bytesperline, + image.pix.pixelformat); ipu_idmac_set_double_buffer(priv->idmac_ch, true); @@ -629,7 +662,7 @@ out_put_ipu: return ret; } -static void csi_idmac_stop(struct csi_priv *priv) +static void csi_idmac_wait_last_eof(struct csi_priv *priv) { unsigned long flags; int ret; @@ -646,7 +679,10 @@ static void csi_idmac_stop(struct csi_priv *priv) &priv->last_eof_comp, msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT)); if (ret == 0) v4l2_warn(&priv->sd, "wait last EOF timeout\n"); +} +static void csi_idmac_stop(struct csi_priv *priv) +{ devm_free_irq(priv->dev, priv->eof_irq, priv); devm_free_irq(priv->dev, priv->nfb4eof_irq, priv); @@ -679,12 +715,7 @@ static int csi_setup(struct csi_priv *priv) priv->upstream_ep.bus.parallel.flags : priv->upstream_ep.bus.mipi_csi2.flags; - /* - * we need to pass input frame to CSI interface, but - * with translated field type from output format - */ if_fmt = *infmt; - if_fmt.field = outfmt->field; crop = priv->crop; /* @@ -702,7 +733,7 @@ static int csi_setup(struct csi_priv *priv) priv->crop.width == 2 * priv->compose.width, priv->crop.height == 2 * priv->compose.height); - ipu_csi_init_interface(priv->csi, &mbus_cfg, &if_fmt); + ipu_csi_init_interface(priv->csi, &mbus_cfg, &if_fmt, outfmt); ipu_csi_set_dest(priv->csi, priv->dest); @@ -722,10 +753,16 @@ static int csi_start(struct csi_priv *priv) output_fi = &priv->frame_interval[priv->active_output_pad]; + /* start upstream */ + ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 1); + ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; + if (ret) + return ret; + if (priv->dest == IPU_CSI_DEST_IDMAC) { ret = csi_idmac_start(priv); if (ret) - return ret; + goto stop_upstream; } ret = csi_setup(priv); @@ -753,11 +790,26 @@ fim_off: idmac_stop: if (priv->dest == IPU_CSI_DEST_IDMAC) csi_idmac_stop(priv); +stop_upstream: + v4l2_subdev_call(priv->src_sd, video, s_stream, 0); return ret; } static void csi_stop(struct csi_priv *priv) { + if (priv->dest == IPU_CSI_DEST_IDMAC) + csi_idmac_wait_last_eof(priv); + + /* + * Disable the CSI asap, after syncing with the last EOF. + * Doing so after the IDMA channel is disabled has shown to + * create hard system-wide hangs. + */ + ipu_csi_disable(priv->csi); + + /* stop upstream */ + v4l2_subdev_call(priv->src_sd, video, s_stream, 0); + if (priv->dest == IPU_CSI_DEST_IDMAC) { csi_idmac_stop(priv); @@ -765,8 +817,6 @@ static void csi_stop(struct csi_priv *priv) if (priv->fim) imx_media_fim_set_stream(priv->fim, NULL, false); } - - ipu_csi_disable(priv->csi); } static const struct csi_skip_desc csi_skip[12] = { @@ -876,7 +926,10 @@ static int csi_s_frame_interval(struct v4l2_subdev *sd, switch (fi->pad) { case CSI_SINK_PAD: - /* No limits on input frame interval */ + /* No limits on valid input frame intervals */ + if (fi->interval.numerator == 0 || + fi->interval.denominator == 0) + fi->interval = *input_fi; /* Reset output intervals and frame skipping ratio to 1:1 */ priv->frame_interval[CSI_SRC_PAD_IDMAC] = fi->interval; priv->frame_interval[CSI_SRC_PAD_DIRECT] = fi->interval; @@ -927,23 +980,13 @@ static int csi_s_stream(struct v4l2_subdev *sd, int enable) goto update_count; if (enable) { - /* upstream must be started first, before starting CSI */ - ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 1); - ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; - if (ret) - goto out; - dev_dbg(priv->dev, "stream ON\n"); ret = csi_start(priv); - if (ret) { - v4l2_subdev_call(priv->src_sd, video, s_stream, 0); + if (ret) goto out; - } } else { dev_dbg(priv->dev, "stream OFF\n"); - /* CSI must be stopped first, then stop upstream */ csi_stop(priv); - v4l2_subdev_call(priv->src_sd, video, s_stream, 0); } update_count: @@ -1001,6 +1044,8 @@ static int csi_link_setup(struct media_entity *entity, v4l2_ctrl_handler_free(&priv->ctrl_hdlr); v4l2_ctrl_handler_init(&priv->ctrl_hdlr, 0); priv->sink = NULL; + /* do not apply IC burst alignment in csi_try_crop */ + priv->active_output_pad = CSI_SRC_PAD_IDMAC; goto out; } @@ -1029,10 +1074,10 @@ static int csi_link_setup(struct media_entity *entity, remote_sd = media_entity_to_v4l2_subdev(remote->entity); switch (remote_sd->grp_id) { - case IMX_MEDIA_GRP_ID_VDIC: + case IMX_MEDIA_GRP_ID_IPU_VDIC: priv->dest = IPU_CSI_DEST_VDIC; break; - case IMX_MEDIA_GRP_ID_IC_PRP: + case IMX_MEDIA_GRP_ID_IPU_IC_PRP: priv->dest = IPU_CSI_DEST_IC; break; default: @@ -1137,12 +1182,21 @@ static void csi_try_crop(struct csi_priv *priv, struct v4l2_mbus_framefmt *infmt, struct v4l2_fwnode_endpoint *upstream_ep) { + u32 in_height; + crop->width = min_t(__u32, infmt->width, crop->width); if (crop->left + crop->width > infmt->width) crop->left = infmt->width - crop->width; /* adjust crop left/width to h/w alignment restrictions */ crop->left &= ~0x3; - crop->width &= ~0x7; + if (priv->active_output_pad == CSI_SRC_PAD_DIRECT) + crop->width &= ~0x7; /* multiple of 8 pixels (IC burst) */ + else + crop->width &= ~0x1; /* multiple of 2 pixels */ + + in_height = infmt->height; + if (infmt->field == V4L2_FIELD_ALTERNATE) + in_height *= 2; /* * FIXME: not sure why yet, but on interlaced bt.656, @@ -1153,12 +1207,12 @@ static void csi_try_crop(struct csi_priv *priv, if (upstream_ep->bus_type == V4L2_MBUS_BT656 && (V4L2_FIELD_HAS_BOTH(infmt->field) || infmt->field == V4L2_FIELD_ALTERNATE)) { - crop->height = infmt->height; - crop->top = (infmt->height == 480) ? 2 : 0; + crop->height = in_height; + crop->top = (in_height == 480) ? 2 : 0; } else { - crop->height = min_t(__u32, infmt->height, crop->height); - if (crop->top + crop->height > infmt->height) - crop->top = infmt->height - crop->height; + crop->height = min_t(__u32, in_height, crop->height); + if (crop->top + crop->height > in_height) + crop->top = in_height - crop->height; } } @@ -1308,6 +1362,49 @@ out: return ret; } +static void csi_try_field(struct csi_priv *priv, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *sdformat) +{ + struct v4l2_mbus_framefmt *infmt = + __csi_get_fmt(priv, cfg, CSI_SINK_PAD, sdformat->which); + + /* no restrictions on sink pad field type */ + if (sdformat->pad == CSI_SINK_PAD) + return; + + switch (infmt->field) { + case V4L2_FIELD_SEQ_TB: + case V4L2_FIELD_SEQ_BT: + /* + * If the user requests sequential at the source pad, + * allow it (along with possibly inverting field order). + * Otherwise passthrough the field type. + */ + if (!V4L2_FIELD_IS_SEQUENTIAL(sdformat->format.field)) + sdformat->format.field = infmt->field; + break; + case V4L2_FIELD_ALTERNATE: + /* + * This driver does not support alternate field mode, and + * the CSI captures a whole frame, so the CSI never presents + * alternate mode at its source pads. If user has not + * already requested sequential, translate ALTERNATE at + * sink pad to SEQ_TB or SEQ_BT at the source pad depending + * on input height (assume NTSC BT order if 480 total active + * frame lines, otherwise PAL TB order). + */ + if (!V4L2_FIELD_IS_SEQUENTIAL(sdformat->format.field)) + sdformat->format.field = (infmt->height == 480 / 2) ? + V4L2_FIELD_SEQ_BT : V4L2_FIELD_SEQ_TB; + break; + default: + /* Passthrough for all other input field types */ + sdformat->format.field = infmt->field; + break; + } +} + static void csi_try_fmt(struct csi_priv *priv, struct v4l2_fwnode_endpoint *upstream_ep, struct v4l2_subdev_pad_config *cfg, @@ -1347,42 +1444,20 @@ static void csi_try_fmt(struct csi_priv *priv, } } - if (sdformat->pad == CSI_SRC_PAD_DIRECT || - sdformat->format.field != V4L2_FIELD_NONE) - sdformat->format.field = infmt->field; - - /* - * translate V4L2_FIELD_ALTERNATE to SEQ_TB or SEQ_BT - * depending on input height (assume NTSC top-bottom - * order if 480 lines, otherwise PAL bottom-top order). - */ - if (sdformat->format.field == V4L2_FIELD_ALTERNATE) { - sdformat->format.field = (infmt->height == 480) ? - V4L2_FIELD_SEQ_TB : V4L2_FIELD_SEQ_BT; - } + csi_try_field(priv, cfg, sdformat); /* propagate colorimetry from sink */ sdformat->format.colorspace = infmt->colorspace; sdformat->format.xfer_func = infmt->xfer_func; sdformat->format.quantization = infmt->quantization; sdformat->format.ycbcr_enc = infmt->ycbcr_enc; + break; case CSI_SINK_PAD: v4l_bound_align_image(&sdformat->format.width, MIN_W, MAX_W, W_ALIGN, &sdformat->format.height, MIN_H, MAX_H, H_ALIGN, S_ALIGN); - /* Reset crop and compose rectangles */ - crop->left = 0; - crop->top = 0; - crop->width = sdformat->format.width; - crop->height = sdformat->format.height; - csi_try_crop(priv, crop, cfg, &sdformat->format, upstream_ep); - compose->left = 0; - compose->top = 0; - compose->width = crop->width; - compose->height = crop->height; - *cc = imx_media_find_mbus_format(sdformat->format.code, CS_SEL_ANY, true); if (!*cc) { @@ -1393,9 +1468,25 @@ static void csi_try_fmt(struct csi_priv *priv, sdformat->format.code = (*cc)->codes[0]; } + csi_try_field(priv, cfg, sdformat); + imx_media_fill_default_mbus_fields( &sdformat->format, infmt, priv->active_output_pad == CSI_SRC_PAD_DIRECT); + + /* Reset crop and compose rectangles */ + crop->left = 0; + crop->top = 0; + crop->width = sdformat->format.width; + crop->height = sdformat->format.height; + if (sdformat->format.field == V4L2_FIELD_ALTERNATE) + crop->height *= 2; + csi_try_crop(priv, crop, cfg, &sdformat->format, upstream_ep); + compose->left = 0; + compose->top = 0; + compose->width = crop->width; + compose->height = crop->height; + break; } } @@ -1411,6 +1502,7 @@ static int csi_set_fmt(struct v4l2_subdev *sd, struct v4l2_pix_format vdev_fmt; struct v4l2_mbus_framefmt *fmt; struct v4l2_rect *crop, *compose; + struct v4l2_rect vdev_compose; int ret; if (sdformat->pad >= CSI_NUM_PADS) @@ -1466,11 +1558,11 @@ static int csi_set_fmt(struct v4l2_subdev *sd, priv->cc[sdformat->pad] = cc; /* propagate IDMAC output pad format to capture device */ - imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, + imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, &vdev_compose, &priv->format_mbus[CSI_SRC_PAD_IDMAC], priv->cc[CSI_SRC_PAD_IDMAC]); mutex_unlock(&priv->lock); - imx_media_capture_device_set_format(vdev, &vdev_fmt); + imx_media_capture_device_set_format(vdev, &vdev_fmt, &vdev_compose); return 0; out: @@ -1502,6 +1594,8 @@ static int csi_get_selection(struct v4l2_subdev *sd, sel->r.top = 0; sel->r.width = infmt->width; sel->r.height = infmt->height; + if (infmt->field == V4L2_FIELD_ALTERNATE) + sel->r.height *= 2; break; case V4L2_SEL_TGT_CROP: sel->r = *crop; @@ -1787,7 +1881,7 @@ static int imx_csi_parse_endpoint(struct device *dev, struct v4l2_fwnode_endpoint *vep, struct v4l2_async_subdev *asd) { - return fwnode_device_is_available(asd->match.fwnode) ? 0 : -EINVAL; + return fwnode_device_is_available(asd->match.fwnode) ? 0 : -ENOTCONN; } static int imx_csi_async_register(struct csi_priv *priv) @@ -1864,6 +1958,8 @@ static int imx_csi_probe(struct platform_device *pdev) priv->csi_id = pdata->csi; priv->smfc_id = (priv->csi_id == 0) ? 0 : 2; + priv->active_output_pad = CSI_SRC_PAD_IDMAC; + timer_setup(&priv->eof_timeout_timer, csi_idmac_eof_timeout, 0); spin_lock_init(&priv->irqlock); @@ -1877,7 +1973,7 @@ static int imx_csi_probe(struct platform_device *pdev) priv->sd.owner = THIS_MODULE; priv->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; priv->sd.grp_id = priv->csi_id ? - IMX_MEDIA_GRP_ID_CSI1 : IMX_MEDIA_GRP_ID_CSI0; + IMX_MEDIA_GRP_ID_IPU_CSI1 : IMX_MEDIA_GRP_ID_IPU_CSI0; imx_media_grp_id_to_sd_name(priv->sd.name, sizeof(priv->sd.name), priv->sd.grp_id, ipu_get_num(priv->ipu)); diff --git a/drivers/staging/media/imx/imx-media-dev-common.c b/drivers/staging/media/imx/imx-media-dev-common.c new file mode 100644 index 000000000000..910594125889 --- /dev/null +++ b/drivers/staging/media/imx/imx-media-dev-common.c @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * V4L2 Media Controller Driver for Freescale common i.MX5/6/7 SOC + * + * Copyright (c) 2019 Linaro Ltd + * Copyright (c) 2016 Mentor Graphics Inc. + */ + +#include <linux/of_graph.h> +#include <linux/of_platform.h> +#include "imx-media.h" + +static const struct v4l2_async_notifier_operations imx_media_subdev_ops = { + .bound = imx_media_subdev_bound, + .complete = imx_media_probe_complete, +}; + +static const struct media_device_ops imx_media_md_ops = { + .link_notify = imx_media_link_notify, +}; + +struct imx_media_dev *imx_media_dev_init(struct device *dev) +{ + struct imx_media_dev *imxmd; + int ret; + + imxmd = devm_kzalloc(dev, sizeof(*imxmd), GFP_KERNEL); + if (!imxmd) + return ERR_PTR(-ENOMEM); + + dev_set_drvdata(dev, imxmd); + + strlcpy(imxmd->md.model, "imx-media", sizeof(imxmd->md.model)); + imxmd->md.ops = &imx_media_md_ops; + imxmd->md.dev = dev; + + mutex_init(&imxmd->mutex); + + imxmd->v4l2_dev.mdev = &imxmd->md; + imxmd->v4l2_dev.notify = imx_media_notify; + strlcpy(imxmd->v4l2_dev.name, "imx-media", + sizeof(imxmd->v4l2_dev.name)); + + media_device_init(&imxmd->md); + + ret = v4l2_device_register(dev, &imxmd->v4l2_dev); + if (ret < 0) { + v4l2_err(&imxmd->v4l2_dev, + "Failed to register v4l2_device: %d\n", ret); + goto cleanup; + } + + dev_set_drvdata(imxmd->v4l2_dev.dev, imxmd); + + INIT_LIST_HEAD(&imxmd->vdev_list); + + v4l2_async_notifier_init(&imxmd->notifier); + + return imxmd; + +cleanup: + media_device_cleanup(&imxmd->md); + + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(imx_media_dev_init); + +int imx_media_dev_notifier_register(struct imx_media_dev *imxmd) +{ + int ret; + + /* no subdevs? just bail */ + if (list_empty(&imxmd->notifier.asd_list)) { + v4l2_err(&imxmd->v4l2_dev, "no subdevs\n"); + return -ENODEV; + } + + /* prepare the async subdev notifier and register it */ + imxmd->notifier.ops = &imx_media_subdev_ops; + ret = v4l2_async_notifier_register(&imxmd->v4l2_dev, + &imxmd->notifier); + if (ret) { + v4l2_err(&imxmd->v4l2_dev, + "v4l2_async_notifier_register failed with %d\n", ret); + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(imx_media_dev_notifier_register); diff --git a/drivers/staging/media/imx/imx-media-dev.c b/drivers/staging/media/imx/imx-media-dev.c index 4b344a4a3706..28a3d23aad5b 100644 --- a/drivers/staging/media/imx/imx-media-dev.c +++ b/drivers/staging/media/imx/imx-media-dev.c @@ -116,16 +116,16 @@ static int imx_media_get_ipu(struct imx_media_dev *imxmd, } /* async subdev bound notifier */ -static int imx_media_subdev_bound(struct v4l2_async_notifier *notifier, - struct v4l2_subdev *sd, - struct v4l2_async_subdev *asd) +int imx_media_subdev_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_subdev *asd) { struct imx_media_dev *imxmd = notifier2dev(notifier); int ret = 0; mutex_lock(&imxmd->mutex); - if (sd->grp_id & IMX_MEDIA_GRP_ID_CSI) { + if (sd->grp_id & IMX_MEDIA_GRP_ID_IPU_CSI) { ret = imx_media_get_ipu(imxmd, sd); if (ret) goto out; @@ -149,13 +149,13 @@ static int imx_media_create_links(struct v4l2_async_notifier *notifier) list_for_each_entry(sd, &imxmd->v4l2_dev.subdevs, list) { switch (sd->grp_id) { - case IMX_MEDIA_GRP_ID_VDIC: - case IMX_MEDIA_GRP_ID_IC_PRP: - case IMX_MEDIA_GRP_ID_IC_PRPENC: - case IMX_MEDIA_GRP_ID_IC_PRPVF: - case IMX_MEDIA_GRP_ID_CSI0: - case IMX_MEDIA_GRP_ID_CSI1: - ret = imx_media_create_internal_links(imxmd, sd); + case IMX_MEDIA_GRP_ID_IPU_VDIC: + case IMX_MEDIA_GRP_ID_IPU_IC_PRP: + case IMX_MEDIA_GRP_ID_IPU_IC_PRPENC: + case IMX_MEDIA_GRP_ID_IPU_IC_PRPVF: + case IMX_MEDIA_GRP_ID_IPU_CSI0: + case IMX_MEDIA_GRP_ID_IPU_CSI1: + ret = imx_media_create_ipu_internal_links(imxmd, sd); if (ret) return ret; /* @@ -163,9 +163,13 @@ static int imx_media_create_links(struct v4l2_async_notifier *notifier) * internal entities, so create the external links * to the CSI sink pads. */ - if (sd->grp_id & IMX_MEDIA_GRP_ID_CSI) + if (sd->grp_id & IMX_MEDIA_GRP_ID_IPU_CSI) imx_media_create_csi_of_links(imxmd, sd); break; + case IMX_MEDIA_GRP_ID_CSI: + imx_media_create_csi_of_links(imxmd, sd); + + break; default: /* * if this subdev has fwnode links, create media @@ -302,7 +306,7 @@ static int imx_media_create_pad_vdev_lists(struct imx_media_dev *imxmd) } /* async subdev complete notifier */ -static int imx_media_probe_complete(struct v4l2_async_notifier *notifier) +int imx_media_probe_complete(struct v4l2_async_notifier *notifier) { struct imx_media_dev *imxmd = notifier2dev(notifier); int ret; @@ -326,11 +330,6 @@ unlock: return media_device_register(&imxmd->md); } -static const struct v4l2_async_notifier_operations imx_media_subdev_ops = { - .bound = imx_media_subdev_bound, - .complete = imx_media_probe_complete, -}; - /* * adds controls to a video device from an entity subdevice. * Continues upstream from the entity's sink pads. @@ -374,8 +373,8 @@ static int imx_media_inherit_controls(struct imx_media_dev *imxmd, return ret; } -static int imx_media_link_notify(struct media_link *link, u32 flags, - unsigned int notification) +int imx_media_link_notify(struct media_link *link, u32 flags, + unsigned int notification) { struct media_entity *source = link->source->entity; struct imx_media_pad_vdev *pad_vdev; @@ -438,9 +437,27 @@ static int imx_media_link_notify(struct media_link *link, u32 flags, return ret; } -static const struct media_device_ops imx_media_md_ops = { - .link_notify = imx_media_link_notify, -}; +void imx_media_notify(struct v4l2_subdev *sd, unsigned int notification, + void *arg) +{ + struct media_entity *entity = &sd->entity; + int i; + + if (notification != V4L2_DEVICE_NOTIFY_EVENT) + return; + + for (i = 0; i < entity->num_pads; i++) { + struct media_pad *pad = &entity->pads[i]; + struct imx_media_pad_vdev *pad_vdev; + struct list_head *pad_vdev_list; + + pad_vdev_list = to_pad_vdev_list(sd, pad->index); + if (!pad_vdev_list) + continue; + list_for_each_entry(pad_vdev, pad_vdev_list, list) + v4l2_event_queue(pad_vdev->vdev->vfd, arg); + } +} static int imx_media_probe(struct platform_device *pdev) { @@ -449,76 +466,37 @@ static int imx_media_probe(struct platform_device *pdev) struct imx_media_dev *imxmd; int ret; - imxmd = devm_kzalloc(dev, sizeof(*imxmd), GFP_KERNEL); - if (!imxmd) - return -ENOMEM; - - dev_set_drvdata(dev, imxmd); - - strscpy(imxmd->md.model, "imx-media", sizeof(imxmd->md.model)); - imxmd->md.ops = &imx_media_md_ops; - imxmd->md.dev = dev; - - mutex_init(&imxmd->mutex); - - imxmd->v4l2_dev.mdev = &imxmd->md; - strscpy(imxmd->v4l2_dev.name, "imx-media", - sizeof(imxmd->v4l2_dev.name)); - - media_device_init(&imxmd->md); - - ret = v4l2_device_register(dev, &imxmd->v4l2_dev); - if (ret < 0) { - v4l2_err(&imxmd->v4l2_dev, - "Failed to register v4l2_device: %d\n", ret); - goto cleanup; - } - - dev_set_drvdata(imxmd->v4l2_dev.dev, imxmd); - - INIT_LIST_HEAD(&imxmd->vdev_list); - - v4l2_async_notifier_init(&imxmd->notifier); + imxmd = imx_media_dev_init(dev); + if (IS_ERR(imxmd)) + return PTR_ERR(imxmd); ret = imx_media_add_of_subdevs(imxmd, node); if (ret) { v4l2_err(&imxmd->v4l2_dev, "add_of_subdevs failed with %d\n", ret); - goto notifier_cleanup; + goto cleanup; } ret = imx_media_add_internal_subdevs(imxmd); if (ret) { v4l2_err(&imxmd->v4l2_dev, "add_internal_subdevs failed with %d\n", ret); - goto notifier_cleanup; - } - - /* no subdevs? just bail */ - if (list_empty(&imxmd->notifier.asd_list)) { - ret = -ENODEV; - goto notifier_cleanup; + goto cleanup; } - /* prepare the async subdev notifier and register it */ - imxmd->notifier.ops = &imx_media_subdev_ops; - ret = v4l2_async_notifier_register(&imxmd->v4l2_dev, - &imxmd->notifier); - if (ret) { - v4l2_err(&imxmd->v4l2_dev, - "v4l2_async_notifier_register failed with %d\n", ret); + ret = imx_media_dev_notifier_register(imxmd); + if (ret) goto del_int; - } return 0; del_int: imx_media_remove_internal_subdevs(imxmd); -notifier_cleanup: +cleanup: v4l2_async_notifier_cleanup(&imxmd->notifier); v4l2_device_unregister(&imxmd->v4l2_dev); -cleanup: media_device_cleanup(&imxmd->md); + return ret; } @@ -532,8 +510,8 @@ static int imx_media_remove(struct platform_device *pdev) v4l2_async_notifier_unregister(&imxmd->notifier); imx_media_remove_internal_subdevs(imxmd); v4l2_async_notifier_cleanup(&imxmd->notifier); - v4l2_device_unregister(&imxmd->v4l2_dev); media_device_unregister(&imxmd->md); + v4l2_device_unregister(&imxmd->v4l2_dev); media_device_cleanup(&imxmd->md); return 0; diff --git a/drivers/staging/media/imx/imx-media-internal-sd.c b/drivers/staging/media/imx/imx-media-internal-sd.c index 0fdc45dbfb76..5e10d95e5529 100644 --- a/drivers/staging/media/imx/imx-media-internal-sd.c +++ b/drivers/staging/media/imx/imx-media-internal-sd.c @@ -30,32 +30,32 @@ static const struct internal_subdev_id { } isd_id[num_isd] = { [isd_csi0] = { .index = isd_csi0, - .grp_id = IMX_MEDIA_GRP_ID_CSI0, + .grp_id = IMX_MEDIA_GRP_ID_IPU_CSI0, .name = "imx-ipuv3-csi", }, [isd_csi1] = { .index = isd_csi1, - .grp_id = IMX_MEDIA_GRP_ID_CSI1, + .grp_id = IMX_MEDIA_GRP_ID_IPU_CSI1, .name = "imx-ipuv3-csi", }, [isd_vdic] = { .index = isd_vdic, - .grp_id = IMX_MEDIA_GRP_ID_VDIC, + .grp_id = IMX_MEDIA_GRP_ID_IPU_VDIC, .name = "imx-ipuv3-vdic", }, [isd_ic_prp] = { .index = isd_ic_prp, - .grp_id = IMX_MEDIA_GRP_ID_IC_PRP, + .grp_id = IMX_MEDIA_GRP_ID_IPU_IC_PRP, .name = "imx-ipuv3-ic", }, [isd_ic_prpenc] = { .index = isd_ic_prpenc, - .grp_id = IMX_MEDIA_GRP_ID_IC_PRPENC, + .grp_id = IMX_MEDIA_GRP_ID_IPU_IC_PRPENC, .name = "imx-ipuv3-ic", }, [isd_ic_prpvf] = { .index = isd_ic_prpvf, - .grp_id = IMX_MEDIA_GRP_ID_IC_PRPVF, + .grp_id = IMX_MEDIA_GRP_ID_IPU_IC_PRPVF, .name = "imx-ipuv3-ic", }, }; @@ -229,8 +229,8 @@ static int create_ipu_internal_link(struct imx_media_dev *imxmd, return ret; } -int imx_media_create_internal_links(struct imx_media_dev *imxmd, - struct v4l2_subdev *sd) +int imx_media_create_ipu_internal_links(struct imx_media_dev *imxmd, + struct v4l2_subdev *sd) { const struct internal_subdev *intsd; const struct internal_pad *intpad; @@ -312,8 +312,8 @@ static int add_ipu_internal_subdevs(struct imx_media_dev *imxmd, int ipu_id) * of_parse_subdev(). */ switch (isd->id->grp_id) { - case IMX_MEDIA_GRP_ID_CSI0: - case IMX_MEDIA_GRP_ID_CSI1: + case IMX_MEDIA_GRP_ID_IPU_CSI0: + case IMX_MEDIA_GRP_ID_IPU_CSI1: ret = 0; break; default: diff --git a/drivers/staging/media/imx/imx-media-of.c b/drivers/staging/media/imx/imx-media-of.c index b2e840f96c50..03446335ac03 100644 --- a/drivers/staging/media/imx/imx-media-of.c +++ b/drivers/staging/media/imx/imx-media-of.c @@ -20,7 +20,8 @@ #include <video/imx-ipu-v3.h> #include "imx-media.h" -static int of_add_csi(struct imx_media_dev *imxmd, struct device_node *csi_np) +int imx_media_of_add_csi(struct imx_media_dev *imxmd, + struct device_node *csi_np) { int ret; @@ -45,6 +46,7 @@ static int of_add_csi(struct imx_media_dev *imxmd, struct device_node *csi_np) return 0; } +EXPORT_SYMBOL_GPL(imx_media_of_add_csi); int imx_media_add_of_subdevs(struct imx_media_dev *imxmd, struct device_node *np) @@ -57,7 +59,7 @@ int imx_media_add_of_subdevs(struct imx_media_dev *imxmd, if (!csi_np) break; - ret = of_add_csi(imxmd, csi_np); + ret = imx_media_of_add_csi(imxmd, csi_np); of_node_put(csi_np); if (ret) return ret; @@ -162,7 +164,7 @@ int imx_media_create_csi_of_links(struct imx_media_dev *imxmd, fwnode_property_read_u32(fwnode, "reg", &link.remote_port); fwnode = fwnode_get_next_parent(fwnode); if (is_of_node(fwnode) && - of_node_cmp(to_of_node(fwnode)->name, "ports") == 0) + of_node_name_eq(to_of_node(fwnode), "ports")) fwnode = fwnode_get_next_parent(fwnode); link.remote_node = fwnode; diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 0eaa353d5cb3..1c63a2765a81 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -577,9 +577,11 @@ void imx_media_fill_default_mbus_fields(struct v4l2_mbus_framefmt *tryfmt, EXPORT_SYMBOL_GPL(imx_media_fill_default_mbus_fields); int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, - struct v4l2_mbus_framefmt *mbus, + struct v4l2_rect *compose, + const struct v4l2_mbus_framefmt *mbus, const struct imx_media_pixfmt *cc) { + u32 width; u32 stride; if (!cc) { @@ -602,9 +604,16 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, cc = imx_media_find_mbus_format(code, CS_SEL_YUV, false); } - stride = cc->planar ? mbus->width : (mbus->width * cc->bpp) >> 3; + /* Round up width for minimum burst size */ + width = round_up(mbus->width, 8); - pix->width = mbus->width; + /* Round up stride for IDMAC line start address alignment */ + if (cc->planar) + stride = round_up(width, 16); + else + stride = round_up((width * cc->bpp) >> 3, 8); + + pix->width = width; pix->height = mbus->height; pix->pixelformat = cc->fourcc; pix->colorspace = mbus->colorspace; @@ -613,7 +622,19 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, pix->quantization = mbus->quantization; pix->field = mbus->field; pix->bytesperline = stride; - pix->sizeimage = (pix->width * pix->height * cc->bpp) >> 3; + pix->sizeimage = cc->planar ? ((stride * pix->height * cc->bpp) >> 3) : + stride * pix->height; + + /* + * set capture compose rectangle, which is fixed to the + * source subdevice mbus format. + */ + if (compose) { + compose->left = 0; + compose->top = 0; + compose->width = mbus->width; + compose->height = mbus->height; + } return 0; } @@ -626,13 +647,11 @@ int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, memset(image, 0, sizeof(*image)); - ret = imx_media_mbus_fmt_to_pix_fmt(&image->pix, mbus, NULL); + ret = imx_media_mbus_fmt_to_pix_fmt(&image->pix, &image->rect, + mbus, NULL); if (ret) return ret; - image->rect.width = mbus->width; - image->rect.height = mbus->height; - return 0; } EXPORT_SYMBOL_GPL(imx_media_mbus_fmt_to_ipu_image); @@ -696,20 +715,20 @@ void imx_media_grp_id_to_sd_name(char *sd_name, int sz, u32 grp_id, int ipu_id) int id; switch (grp_id) { - case IMX_MEDIA_GRP_ID_CSI0...IMX_MEDIA_GRP_ID_CSI1: - id = (grp_id >> IMX_MEDIA_GRP_ID_CSI_BIT) - 1; + case IMX_MEDIA_GRP_ID_IPU_CSI0...IMX_MEDIA_GRP_ID_IPU_CSI1: + id = (grp_id >> IMX_MEDIA_GRP_ID_IPU_CSI_BIT) - 1; snprintf(sd_name, sz, "ipu%d_csi%d", ipu_id + 1, id); break; - case IMX_MEDIA_GRP_ID_VDIC: + case IMX_MEDIA_GRP_ID_IPU_VDIC: snprintf(sd_name, sz, "ipu%d_vdic", ipu_id + 1); break; - case IMX_MEDIA_GRP_ID_IC_PRP: + case IMX_MEDIA_GRP_ID_IPU_IC_PRP: snprintf(sd_name, sz, "ipu%d_ic_prp", ipu_id + 1); break; - case IMX_MEDIA_GRP_ID_IC_PRPENC: + case IMX_MEDIA_GRP_ID_IPU_IC_PRPENC: snprintf(sd_name, sz, "ipu%d_ic_prpenc", ipu_id + 1); break; - case IMX_MEDIA_GRP_ID_IC_PRPVF: + case IMX_MEDIA_GRP_ID_IPU_IC_PRPVF: snprintf(sd_name, sz, "ipu%d_ic_prpvf", ipu_id + 1); break; default: diff --git a/drivers/staging/media/imx/imx-media-vdic.c b/drivers/staging/media/imx/imx-media-vdic.c index 482250d47e7c..2808662e2597 100644 --- a/drivers/staging/media/imx/imx-media-vdic.c +++ b/drivers/staging/media/imx/imx-media-vdic.c @@ -219,26 +219,18 @@ static void __maybe_unused prepare_vdi_in_buffers(struct vdic_priv *priv, switch (priv->fieldtype) { case V4L2_FIELD_SEQ_TB: - prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0); - curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + fs; - next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); - break; case V4L2_FIELD_SEQ_BT: prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0) + fs; curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + fs; break; + case V4L2_FIELD_INTERLACED_TB: case V4L2_FIELD_INTERLACED_BT: + case V4L2_FIELD_INTERLACED: prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0) + is; curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + is; break; - default: - /* assume V4L2_FIELD_INTERLACED_TB */ - prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0); - curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + is; - next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); - break; } ipu_cpmem_set_buffer(priv->vdi_in_ch_p, 0, prev_phys); @@ -263,10 +255,10 @@ static int setup_vdi_channel(struct vdic_priv *priv, memset(&image, 0, sizeof(image)); image.pix = vdev->fmt.fmt.pix; + image.rect = vdev->compose; /* one field to VDIC channels */ image.pix.height /= 2; - image.rect.width = image.pix.width; - image.rect.height = image.pix.height; + image.rect.height /= 2; image.phys0 = phys0; image.phys1 = phys1; @@ -826,7 +818,10 @@ static int vdic_s_frame_interval(struct v4l2_subdev *sd, switch (fi->pad) { case VDIC_SINK_PAD_DIRECT: case VDIC_SINK_PAD_IDMAC: - /* No limits on input frame interval */ + /* No limits on valid input frame intervals */ + if (fi->interval.numerator == 0 || + fi->interval.denominator == 0) + fi->interval = priv->frame_interval[fi->pad]; /* Reset output interval */ *output_fi = fi->interval; if (priv->csi_direct) diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index bc7feb81937c..ae964c8d5be1 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -80,6 +80,8 @@ struct imx_media_video_dev { /* the user format */ struct v4l2_format fmt; + /* the compose rectangle */ + struct v4l2_rect compose; const struct imx_media_pixfmt *cc; /* links this vdev to master list */ @@ -178,7 +180,8 @@ void imx_media_fill_default_mbus_fields(struct v4l2_mbus_framefmt *tryfmt, struct v4l2_mbus_framefmt *fmt, bool ic_route); int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, - struct v4l2_mbus_framefmt *mbus, + struct v4l2_rect *compose, + const struct v4l2_mbus_framefmt *mbus, const struct imx_media_pixfmt *cc); int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, struct v4l2_mbus_framefmt *mbus); @@ -226,6 +229,18 @@ int imx_media_add_async_subdev(struct imx_media_dev *imxmd, struct fwnode_handle *fwnode, struct platform_device *pdev); +int imx_media_subdev_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_subdev *asd); +int imx_media_link_notify(struct media_link *link, u32 flags, + unsigned int notification); +void imx_media_notify(struct v4l2_subdev *sd, unsigned int notification, + void *arg); +int imx_media_probe_complete(struct v4l2_async_notifier *notifier); + +struct imx_media_dev *imx_media_dev_init(struct device *dev); +int imx_media_dev_notifier_register(struct imx_media_dev *imxmd); + /* imx-media-fim.c */ struct imx_media_fim; void imx_media_fim_eof_monitor(struct imx_media_fim *fim, ktime_t timestamp); @@ -238,8 +253,8 @@ void imx_media_fim_free(struct imx_media_fim *fim); /* imx-media-internal-sd.c */ int imx_media_add_internal_subdevs(struct imx_media_dev *imxmd); -int imx_media_create_internal_links(struct imx_media_dev *imxmd, - struct v4l2_subdev *sd); +int imx_media_create_ipu_internal_links(struct imx_media_dev *imxmd, + struct v4l2_subdev *sd); void imx_media_remove_internal_subdevs(struct imx_media_dev *imxmd); /* imx-media-of.c */ @@ -249,6 +264,8 @@ int imx_media_create_of_links(struct imx_media_dev *imxmd, struct v4l2_subdev *sd); int imx_media_create_csi_of_links(struct imx_media_dev *imxmd, struct v4l2_subdev *csi); +int imx_media_of_add_csi(struct imx_media_dev *imxmd, + struct device_node *csi_np); /* imx-media-capture.c */ struct imx_media_video_dev * @@ -259,18 +276,20 @@ void imx_media_capture_device_unregister(struct imx_media_video_dev *vdev); struct imx_media_buffer * imx_media_capture_device_next_buf(struct imx_media_video_dev *vdev); void imx_media_capture_device_set_format(struct imx_media_video_dev *vdev, - struct v4l2_pix_format *pix); + const struct v4l2_pix_format *pix, + const struct v4l2_rect *compose); void imx_media_capture_device_error(struct imx_media_video_dev *vdev); /* subdev group ids */ -#define IMX_MEDIA_GRP_ID_CSI2 BIT(8) -#define IMX_MEDIA_GRP_ID_CSI_BIT 9 -#define IMX_MEDIA_GRP_ID_CSI (0x3 << IMX_MEDIA_GRP_ID_CSI_BIT) -#define IMX_MEDIA_GRP_ID_CSI0 BIT(IMX_MEDIA_GRP_ID_CSI_BIT) -#define IMX_MEDIA_GRP_ID_CSI1 (2 << IMX_MEDIA_GRP_ID_CSI_BIT) -#define IMX_MEDIA_GRP_ID_VDIC BIT(11) -#define IMX_MEDIA_GRP_ID_IC_PRP BIT(12) -#define IMX_MEDIA_GRP_ID_IC_PRPENC BIT(13) -#define IMX_MEDIA_GRP_ID_IC_PRPVF BIT(14) +#define IMX_MEDIA_GRP_ID_CSI2 BIT(8) +#define IMX_MEDIA_GRP_ID_CSI BIT(9) +#define IMX_MEDIA_GRP_ID_IPU_CSI_BIT 10 +#define IMX_MEDIA_GRP_ID_IPU_CSI (0x3 << IMX_MEDIA_GRP_ID_IPU_CSI_BIT) +#define IMX_MEDIA_GRP_ID_IPU_CSI0 BIT(IMX_MEDIA_GRP_ID_IPU_CSI_BIT) +#define IMX_MEDIA_GRP_ID_IPU_CSI1 (2 << IMX_MEDIA_GRP_ID_IPU_CSI_BIT) +#define IMX_MEDIA_GRP_ID_IPU_VDIC BIT(12) +#define IMX_MEDIA_GRP_ID_IPU_IC_PRP BIT(13) +#define IMX_MEDIA_GRP_ID_IPU_IC_PRPENC BIT(14) +#define IMX_MEDIA_GRP_ID_IPU_IC_PRPVF BIT(15) #endif diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c new file mode 100644 index 000000000000..3fba7c27c0ec --- /dev/null +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -0,0 +1,1369 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * V4L2 Capture CSI Subdev for Freescale i.MX7 SOC + * + * Copyright (c) 2019 Linaro Ltd + * + */ + +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/gcd.h> +#include <linux/interrupt.h> +#include <linux/mfd/syscon.h> +#include <linux/module.h> +#include <linux/of_graph.h> +#include <linux/pinctrl/consumer.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/types.h> + +#include <media/v4l2-ctrls.h> +#include <media/v4l2-device.h> +#include <media/v4l2-event.h> +#include <media/v4l2-fwnode.h> +#include <media/v4l2-mc.h> +#include <media/v4l2-subdev.h> +#include <media/videobuf2-dma-contig.h> + +#include <media/imx.h> +#include "imx-media.h" + +#define IMX7_CSI_PAD_SINK 0 +#define IMX7_CSI_PAD_SRC 1 +#define IMX7_CSI_PADS_NUM 2 + +/* reset values */ +#define CSICR1_RESET_VAL 0x40000800 +#define CSICR2_RESET_VAL 0x0 +#define CSICR3_RESET_VAL 0x0 + +/* csi control reg 1 */ +#define BIT_SWAP16_EN BIT(31) +#define BIT_EXT_VSYNC BIT(30) +#define BIT_EOF_INT_EN BIT(29) +#define BIT_PRP_IF_EN BIT(28) +#define BIT_CCIR_MODE BIT(27) +#define BIT_COF_INT_EN BIT(26) +#define BIT_SF_OR_INTEN BIT(25) +#define BIT_RF_OR_INTEN BIT(24) +#define BIT_SFF_DMA_DONE_INTEN BIT(22) +#define BIT_STATFF_INTEN BIT(21) +#define BIT_FB2_DMA_DONE_INTEN BIT(20) +#define BIT_FB1_DMA_DONE_INTEN BIT(19) +#define BIT_RXFF_INTEN BIT(18) +#define BIT_SOF_POL BIT(17) +#define BIT_SOF_INTEN BIT(16) +#define BIT_MCLKDIV (0xF << 12) +#define BIT_HSYNC_POL BIT(11) +#define BIT_CCIR_EN BIT(10) +#define BIT_MCLKEN BIT(9) +#define BIT_FCC BIT(8) +#define BIT_PACK_DIR BIT(7) +#define BIT_CLR_STATFIFO BIT(6) +#define BIT_CLR_RXFIFO BIT(5) +#define BIT_GCLK_MODE BIT(4) +#define BIT_INV_DATA BIT(3) +#define BIT_INV_PCLK BIT(2) +#define BIT_REDGE BIT(1) +#define BIT_PIXEL_BIT BIT(0) + +#define SHIFT_MCLKDIV 12 + +/* control reg 3 */ +#define BIT_FRMCNT (0xFFFF << 16) +#define BIT_FRMCNT_RST BIT(15) +#define BIT_DMA_REFLASH_RFF BIT(14) +#define BIT_DMA_REFLASH_SFF BIT(13) +#define BIT_DMA_REQ_EN_RFF BIT(12) +#define BIT_DMA_REQ_EN_SFF BIT(11) +#define BIT_STATFF_LEVEL (0x7 << 8) +#define BIT_HRESP_ERR_EN BIT(7) +#define BIT_RXFF_LEVEL (0x7 << 4) +#define BIT_TWO_8BIT_SENSOR BIT(3) +#define BIT_ZERO_PACK_EN BIT(2) +#define BIT_ECC_INT_EN BIT(1) +#define BIT_ECC_AUTO_EN BIT(0) + +#define SHIFT_FRMCNT 16 +#define SHIFT_RXFIFO_LEVEL 4 + +/* csi status reg */ +#define BIT_ADDR_CH_ERR_INT BIT(28) +#define BIT_FIELD0_INT BIT(27) +#define BIT_FIELD1_INT BIT(26) +#define BIT_SFF_OR_INT BIT(25) +#define BIT_RFF_OR_INT BIT(24) +#define BIT_DMA_TSF_DONE_SFF BIT(22) +#define BIT_STATFF_INT BIT(21) +#define BIT_DMA_TSF_DONE_FB2 BIT(20) +#define BIT_DMA_TSF_DONE_FB1 BIT(19) +#define BIT_RXFF_INT BIT(18) +#define BIT_EOF_INT BIT(17) +#define BIT_SOF_INT BIT(16) +#define BIT_F2_INT BIT(15) +#define BIT_F1_INT BIT(14) +#define BIT_COF_INT BIT(13) +#define BIT_HRESP_ERR_INT BIT(7) +#define BIT_ECC_INT BIT(1) +#define BIT_DRDY BIT(0) + +/* csi control reg 18 */ +#define BIT_CSI_HW_ENABLE BIT(31) +#define BIT_MIPI_DATA_FORMAT_RAW8 (0x2a << 25) +#define BIT_MIPI_DATA_FORMAT_RAW10 (0x2b << 25) +#define BIT_MIPI_DATA_FORMAT_RAW12 (0x2c << 25) +#define BIT_MIPI_DATA_FORMAT_RAW14 (0x2d << 25) +#define BIT_MIPI_DATA_FORMAT_YUV422_8B (0x1e << 25) +#define BIT_MIPI_DATA_FORMAT_MASK (0x3F << 25) +#define BIT_MIPI_DATA_FORMAT_OFFSET 25 +#define BIT_DATA_FROM_MIPI BIT(22) +#define BIT_MIPI_YU_SWAP BIT(21) +#define BIT_MIPI_DOUBLE_CMPNT BIT(20) +#define BIT_BASEADDR_CHG_ERR_EN BIT(9) +#define BIT_BASEADDR_SWITCH_SEL BIT(5) +#define BIT_BASEADDR_SWITCH_EN BIT(4) +#define BIT_PARALLEL24_EN BIT(3) +#define BIT_DEINTERLACE_EN BIT(2) +#define BIT_TVDECODER_IN_EN BIT(1) +#define BIT_NTSC_EN BIT(0) + +#define CSI_MCLK_VF 1 +#define CSI_MCLK_ENC 2 +#define CSI_MCLK_RAW 4 +#define CSI_MCLK_I2C 8 + +#define CSI_CSICR1 0x0 +#define CSI_CSICR2 0x4 +#define CSI_CSICR3 0x8 +#define CSI_STATFIFO 0xC +#define CSI_CSIRXFIFO 0x10 +#define CSI_CSIRXCNT 0x14 +#define CSI_CSISR 0x18 + +#define CSI_CSIDBG 0x1C +#define CSI_CSIDMASA_STATFIFO 0x20 +#define CSI_CSIDMATS_STATFIFO 0x24 +#define CSI_CSIDMASA_FB1 0x28 +#define CSI_CSIDMASA_FB2 0x2C +#define CSI_CSIFBUF_PARA 0x30 +#define CSI_CSIIMAG_PARA 0x34 + +#define CSI_CSICR18 0x48 +#define CSI_CSICR19 0x4c + +static const char * const imx7_csi_clk_id[] = {"axi", "dcic", "mclk"}; + +struct imx7_csi { + struct device *dev; + struct v4l2_subdev sd; + struct imx_media_video_dev *vdev; + struct imx_media_dev *imxmd; + struct media_pad pad[IMX7_CSI_PADS_NUM]; + + /* lock to protect members below */ + struct mutex lock; + /* lock to protect irq handler when stop streaming */ + spinlock_t irqlock; + + struct v4l2_subdev *src_sd; + + struct media_entity *sink; + + struct v4l2_fwnode_endpoint upstream_ep; + + struct v4l2_mbus_framefmt format_mbus[IMX7_CSI_PADS_NUM]; + const struct imx_media_pixfmt *cc[IMX7_CSI_PADS_NUM]; + struct v4l2_fract frame_interval[IMX7_CSI_PADS_NUM]; + + struct v4l2_ctrl_handler ctrl_hdlr; + + void __iomem *regbase; + int irq; + + int num_clks; + struct clk_bulk_data *clks; + + /* active vb2 buffers to send to video dev sink */ + struct imx_media_buffer *active_vb2_buf[2]; + struct imx_media_dma_buf underrun_buf; + + int buf_num; + u32 frame_sequence; + + bool last_eof; + bool is_init; + bool is_streaming; + bool is_csi2; + + struct completion last_eof_completion; +}; + +#define imx7_csi_reg_read(_csi, _offset) \ + __raw_readl((_csi)->regbase + (_offset)) +#define imx7_csi_reg_write(_csi, _val, _offset) \ + __raw_writel(_val, (_csi)->regbase + (_offset)) + +static void imx7_csi_clk_enable(struct imx7_csi *csi) +{ + int ret; + + ret = clk_bulk_prepare_enable(csi->num_clks, csi->clks); + if (ret < 0) + dev_err(csi->dev, "failed to enable clocks\n"); +} + +static void imx7_csi_clk_disable(struct imx7_csi *csi) +{ + clk_bulk_disable_unprepare(csi->num_clks, csi->clks); +} + +static void imx7_csi_hw_reset(struct imx7_csi *csi) +{ + imx7_csi_reg_write(csi, + imx7_csi_reg_read(csi, CSI_CSICR3) | BIT_FRMCNT_RST, + CSI_CSICR3); + + imx7_csi_reg_write(csi, CSICR1_RESET_VAL, CSI_CSICR1); + imx7_csi_reg_write(csi, CSICR2_RESET_VAL, CSI_CSICR2); + imx7_csi_reg_write(csi, CSICR3_RESET_VAL, CSI_CSICR3); +} + +static unsigned long imx7_csi_irq_clear(struct imx7_csi *csi) +{ + unsigned long isr; + + isr = imx7_csi_reg_read(csi, CSI_CSISR); + imx7_csi_reg_write(csi, isr, CSI_CSISR); + + return isr; +} + +static void imx7_csi_init_interface(struct imx7_csi *csi) +{ + unsigned int val = 0; + unsigned int imag_para; + + val = BIT_SOF_POL | BIT_REDGE | BIT_GCLK_MODE | BIT_HSYNC_POL | + BIT_FCC | 1 << SHIFT_MCLKDIV | BIT_MCLKEN; + imx7_csi_reg_write(csi, val, CSI_CSICR1); + + imag_para = (800 << 16) | 600; + imx7_csi_reg_write(csi, imag_para, CSI_CSIIMAG_PARA); + + val = BIT_DMA_REFLASH_RFF; + imx7_csi_reg_write(csi, val, CSI_CSICR3); +} + +static void imx7_csi_hw_enable_irq(struct imx7_csi *csi) +{ + unsigned long cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); + + cr1 |= BIT_SOF_INTEN; + cr1 |= BIT_RFF_OR_INT; + + /* still capture needs DMA interrupt */ + cr1 |= BIT_FB1_DMA_DONE_INTEN; + cr1 |= BIT_FB2_DMA_DONE_INTEN; + + cr1 |= BIT_EOF_INT_EN; + + imx7_csi_reg_write(csi, cr1, CSI_CSICR1); +} + +static void imx7_csi_hw_disable_irq(struct imx7_csi *csi) +{ + unsigned long cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); + + cr1 &= ~BIT_SOF_INTEN; + cr1 &= ~BIT_RFF_OR_INT; + cr1 &= ~BIT_FB1_DMA_DONE_INTEN; + cr1 &= ~BIT_FB2_DMA_DONE_INTEN; + cr1 &= ~BIT_EOF_INT_EN; + + imx7_csi_reg_write(csi, cr1, CSI_CSICR1); +} + +static void imx7_csi_hw_enable(struct imx7_csi *csi) +{ + unsigned long cr = imx7_csi_reg_read(csi, CSI_CSICR18); + + cr |= BIT_CSI_HW_ENABLE; + + imx7_csi_reg_write(csi, cr, CSI_CSICR18); +} + +static void imx7_csi_hw_disable(struct imx7_csi *csi) +{ + unsigned long cr = imx7_csi_reg_read(csi, CSI_CSICR18); + + cr &= ~BIT_CSI_HW_ENABLE; + + imx7_csi_reg_write(csi, cr, CSI_CSICR18); +} + +static void imx7_csi_dma_reflash(struct imx7_csi *csi) +{ + unsigned long cr3 = imx7_csi_reg_read(csi, CSI_CSICR18); + + cr3 = imx7_csi_reg_read(csi, CSI_CSICR3); + cr3 |= BIT_DMA_REFLASH_RFF; + imx7_csi_reg_write(csi, cr3, CSI_CSICR3); +} + +static void imx7_csi_rx_fifo_clear(struct imx7_csi *csi) +{ + unsigned long cr1; + + cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); + imx7_csi_reg_write(csi, cr1 & ~BIT_FCC, CSI_CSICR1); + cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); + imx7_csi_reg_write(csi, cr1 | BIT_CLR_RXFIFO, CSI_CSICR1); + + cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); + imx7_csi_reg_write(csi, cr1 | BIT_FCC, CSI_CSICR1); +} + +static void imx7_csi_buf_stride_set(struct imx7_csi *csi, u32 stride) +{ + imx7_csi_reg_write(csi, stride, CSI_CSIFBUF_PARA); +} + +static void imx7_csi_deinterlace_enable(struct imx7_csi *csi, bool enable) +{ + unsigned long cr18 = imx7_csi_reg_read(csi, CSI_CSICR18); + + if (enable) + cr18 |= BIT_DEINTERLACE_EN; + else + cr18 &= ~BIT_DEINTERLACE_EN; + + imx7_csi_reg_write(csi, cr18, CSI_CSICR18); +} + +static void imx7_csi_dmareq_rff_enable(struct imx7_csi *csi) +{ + unsigned long cr3 = imx7_csi_reg_read(csi, CSI_CSICR3); + unsigned long cr2 = imx7_csi_reg_read(csi, CSI_CSICR2); + + /* Burst Type of DMA Transfer from RxFIFO. INCR16 */ + cr2 |= 0xC0000000; + + cr3 |= BIT_DMA_REQ_EN_RFF; + cr3 |= BIT_HRESP_ERR_EN; + cr3 &= ~BIT_RXFF_LEVEL; + cr3 |= 0x2 << 4; + + imx7_csi_reg_write(csi, cr3, CSI_CSICR3); + imx7_csi_reg_write(csi, cr2, CSI_CSICR2); +} + +static void imx7_csi_dmareq_rff_disable(struct imx7_csi *csi) +{ + unsigned long cr3 = imx7_csi_reg_read(csi, CSI_CSICR3); + + cr3 &= ~BIT_DMA_REQ_EN_RFF; + cr3 &= ~BIT_HRESP_ERR_EN; + imx7_csi_reg_write(csi, cr3, CSI_CSICR3); +} + +static void imx7_csi_set_imagpara(struct imx7_csi *csi, int width, int height) +{ + int imag_para; + int rx_count; + + rx_count = (width * height) >> 2; + imx7_csi_reg_write(csi, rx_count, CSI_CSIRXCNT); + + imag_para = (width << 16) | height; + imx7_csi_reg_write(csi, imag_para, CSI_CSIIMAG_PARA); + + /* reflash the embedded DMA controller */ + imx7_csi_dma_reflash(csi); +} + +static void imx7_csi_sw_reset(struct imx7_csi *csi) +{ + imx7_csi_hw_disable(csi); + + imx7_csi_rx_fifo_clear(csi); + + imx7_csi_dma_reflash(csi); + + usleep_range(2000, 3000); + + imx7_csi_irq_clear(csi); + + imx7_csi_hw_enable(csi); +} + +static void imx7_csi_error_recovery(struct imx7_csi *csi) +{ + imx7_csi_hw_disable(csi); + + imx7_csi_rx_fifo_clear(csi); + + imx7_csi_dma_reflash(csi); + + imx7_csi_hw_enable(csi); +} + +static void imx7_csi_init(struct imx7_csi *csi) +{ + if (csi->is_init) + return; + + imx7_csi_clk_enable(csi); + imx7_csi_hw_reset(csi); + imx7_csi_init_interface(csi); + imx7_csi_dmareq_rff_enable(csi); + + csi->is_init = true; +} + +static void imx7_csi_deinit(struct imx7_csi *csi) +{ + if (!csi->is_init) + return; + + imx7_csi_hw_reset(csi); + imx7_csi_init_interface(csi); + imx7_csi_dmareq_rff_disable(csi); + imx7_csi_clk_disable(csi); + + csi->is_init = false; +} + +static int imx7_csi_get_upstream_endpoint(struct imx7_csi *csi, + struct v4l2_fwnode_endpoint *ep, + bool skip_mux) +{ + struct device_node *endpoint, *port; + struct media_entity *src; + struct v4l2_subdev *sd; + struct media_pad *pad; + + if (!csi->src_sd) + return -EPIPE; + + src = &csi->src_sd->entity; + +skip_video_mux: + /* get source pad of entity directly upstream from src */ + pad = imx_media_find_upstream_pad(csi->imxmd, src, 0); + if (IS_ERR(pad)) + return PTR_ERR(pad); + + sd = media_entity_to_v4l2_subdev(pad->entity); + + /* To get bus type we may need to skip video mux */ + if (skip_mux && src->function == MEDIA_ENT_F_VID_MUX) { + src = &sd->entity; + goto skip_video_mux; + } + + /* + * NOTE: this assumes an OF-graph port id is the same as a + * media pad index. + */ + port = of_graph_get_port_by_id(sd->dev->of_node, pad->index); + if (!port) + return -ENODEV; + + endpoint = of_get_next_child(port, NULL); + of_node_put(port); + if (!endpoint) + return -ENODEV; + + v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), ep); + of_node_put(endpoint); + + return 0; +} + +static int imx7_csi_link_setup(struct media_entity *entity, + const struct media_pad *local, + const struct media_pad *remote, u32 flags) +{ + struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + struct v4l2_subdev *remote_sd; + int ret = 0; + + dev_dbg(csi->dev, "link setup %s -> %s\n", remote->entity->name, + local->entity->name); + + mutex_lock(&csi->lock); + + if (local->flags & MEDIA_PAD_FL_SINK) { + if (!is_media_entity_v4l2_subdev(remote->entity)) { + ret = -EINVAL; + goto unlock; + } + + remote_sd = media_entity_to_v4l2_subdev(remote->entity); + + if (flags & MEDIA_LNK_FL_ENABLED) { + if (csi->src_sd) { + ret = -EBUSY; + goto unlock; + } + csi->src_sd = remote_sd; + } else { + csi->src_sd = NULL; + } + + goto init; + } + + /* source pad */ + if (flags & MEDIA_LNK_FL_ENABLED) { + if (csi->sink) { + ret = -EBUSY; + goto unlock; + } + csi->sink = remote->entity; + } else { + v4l2_ctrl_handler_free(&csi->ctrl_hdlr); + v4l2_ctrl_handler_init(&csi->ctrl_hdlr, 0); + csi->sink = NULL; + } + +init: + if (csi->sink || csi->src_sd) + imx7_csi_init(csi); + else + imx7_csi_deinit(csi); + +unlock: + mutex_unlock(&csi->lock); + + return ret; +} + +static int imx7_csi_pad_link_validate(struct v4l2_subdev *sd, + struct media_link *link, + struct v4l2_subdev_format *source_fmt, + struct v4l2_subdev_format *sink_fmt) +{ + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + struct v4l2_fwnode_endpoint upstream_ep = {}; + int ret; + + ret = v4l2_subdev_link_validate_default(sd, link, source_fmt, sink_fmt); + if (ret) + return ret; + + ret = imx7_csi_get_upstream_endpoint(csi, &upstream_ep, true); + if (ret) { + v4l2_err(&csi->sd, "failed to find upstream endpoint\n"); + return ret; + } + + mutex_lock(&csi->lock); + + csi->upstream_ep = upstream_ep; + csi->is_csi2 = (upstream_ep.bus_type == V4L2_MBUS_CSI2_DPHY); + + mutex_unlock(&csi->lock); + + return 0; +} + +static void imx7_csi_update_buf(struct imx7_csi *csi, dma_addr_t phys, + int buf_num) +{ + if (buf_num == 1) + imx7_csi_reg_write(csi, phys, CSI_CSIDMASA_FB2); + else + imx7_csi_reg_write(csi, phys, CSI_CSIDMASA_FB1); +} + +static void imx7_csi_setup_vb2_buf(struct imx7_csi *csi) +{ + struct imx_media_video_dev *vdev = csi->vdev; + struct imx_media_buffer *buf; + struct vb2_buffer *vb2_buf; + dma_addr_t phys[2]; + int i; + + for (i = 0; i < 2; i++) { + buf = imx_media_capture_device_next_buf(vdev); + if (buf) { + csi->active_vb2_buf[i] = buf; + vb2_buf = &buf->vbuf.vb2_buf; + phys[i] = vb2_dma_contig_plane_dma_addr(vb2_buf, 0); + } else { + csi->active_vb2_buf[i] = NULL; + phys[i] = csi->underrun_buf.phys; + } + + imx7_csi_update_buf(csi, phys[i], i); + } +} + +static void imx7_csi_dma_unsetup_vb2_buf(struct imx7_csi *csi, + enum vb2_buffer_state return_status) +{ + struct imx_media_buffer *buf; + int i; + + /* return any remaining active frames with return_status */ + for (i = 0; i < 2; i++) { + buf = csi->active_vb2_buf[i]; + if (buf) { + struct vb2_buffer *vb = &buf->vbuf.vb2_buf; + + vb->timestamp = ktime_get_ns(); + vb2_buffer_done(vb, return_status); + } + } +} + +static void imx7_csi_vb2_buf_done(struct imx7_csi *csi) +{ + struct imx_media_video_dev *vdev = csi->vdev; + struct imx_media_buffer *done, *next; + struct vb2_buffer *vb; + dma_addr_t phys; + + done = csi->active_vb2_buf[csi->buf_num]; + if (done) { + done->vbuf.field = vdev->fmt.fmt.pix.field; + done->vbuf.sequence = csi->frame_sequence; + vb = &done->vbuf.vb2_buf; + vb->timestamp = ktime_get_ns(); + vb2_buffer_done(vb, VB2_BUF_STATE_DONE); + } + csi->frame_sequence++; + + /* get next queued buffer */ + next = imx_media_capture_device_next_buf(vdev); + if (next) { + phys = vb2_dma_contig_plane_dma_addr(&next->vbuf.vb2_buf, 0); + csi->active_vb2_buf[csi->buf_num] = next; + } else { + phys = csi->underrun_buf.phys; + csi->active_vb2_buf[csi->buf_num] = NULL; + } + + imx7_csi_update_buf(csi, phys, csi->buf_num); +} + +static irqreturn_t imx7_csi_irq_handler(int irq, void *data) +{ + struct imx7_csi *csi = data; + unsigned long status; + + spin_lock(&csi->irqlock); + + status = imx7_csi_irq_clear(csi); + + if (status & BIT_RFF_OR_INT) { + dev_warn(csi->dev, "Rx fifo overflow\n"); + imx7_csi_error_recovery(csi); + } + + if (status & BIT_HRESP_ERR_INT) { + dev_warn(csi->dev, "Hresponse error detected\n"); + imx7_csi_error_recovery(csi); + } + + if (status & BIT_ADDR_CH_ERR_INT) { + imx7_csi_hw_disable(csi); + + imx7_csi_dma_reflash(csi); + + imx7_csi_hw_enable(csi); + } + + if ((status & BIT_DMA_TSF_DONE_FB1) && + (status & BIT_DMA_TSF_DONE_FB2)) { + /* + * For both FB1 and FB2 interrupter bits set case, + * CSI DMA is work in one of FB1 and FB2 buffer, + * but software can not know the state. + * Skip it to avoid base address updated + * when csi work in field0 and field1 will write to + * new base address. + */ + } else if (status & BIT_DMA_TSF_DONE_FB1) { + csi->buf_num = 0; + } else if (status & BIT_DMA_TSF_DONE_FB2) { + csi->buf_num = 1; + } + + if ((status & BIT_DMA_TSF_DONE_FB1) || + (status & BIT_DMA_TSF_DONE_FB2)) { + imx7_csi_vb2_buf_done(csi); + + if (csi->last_eof) { + complete(&csi->last_eof_completion); + csi->last_eof = false; + } + } + + spin_unlock(&csi->irqlock); + + return IRQ_HANDLED; +} + +static int imx7_csi_dma_start(struct imx7_csi *csi) +{ + struct imx_media_video_dev *vdev = csi->vdev; + struct v4l2_pix_format *out_pix = &vdev->fmt.fmt.pix; + int ret; + + ret = imx_media_alloc_dma_buf(csi->imxmd, &csi->underrun_buf, + out_pix->sizeimage); + if (ret < 0) { + v4l2_warn(&csi->sd, "consider increasing the CMA area\n"); + return ret; + } + + csi->frame_sequence = 0; + csi->last_eof = false; + init_completion(&csi->last_eof_completion); + + imx7_csi_setup_vb2_buf(csi); + + return 0; +} + +static void imx7_csi_dma_stop(struct imx7_csi *csi) +{ + unsigned long timeout_jiffies; + unsigned long flags; + int ret; + + /* mark next EOF interrupt as the last before stream off */ + spin_lock_irqsave(&csi->irqlock, flags); + csi->last_eof = true; + spin_unlock_irqrestore(&csi->irqlock, flags); + + /* + * and then wait for interrupt handler to mark completion. + */ + timeout_jiffies = msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT); + ret = wait_for_completion_timeout(&csi->last_eof_completion, + timeout_jiffies); + if (ret == 0) + v4l2_warn(&csi->sd, "wait last EOF timeout\n"); + + imx7_csi_hw_disable_irq(csi); + + imx7_csi_dma_unsetup_vb2_buf(csi, VB2_BUF_STATE_ERROR); + + imx_media_free_dma_buf(csi->imxmd, &csi->underrun_buf); +} + +static int imx7_csi_configure(struct imx7_csi *csi) +{ + struct imx_media_video_dev *vdev = csi->vdev; + struct v4l2_pix_format *out_pix = &vdev->fmt.fmt.pix; + __u32 in_code = csi->format_mbus[IMX7_CSI_PAD_SINK].code; + u32 cr1, cr18; + + if (out_pix->field == V4L2_FIELD_INTERLACED) { + imx7_csi_deinterlace_enable(csi, true); + imx7_csi_buf_stride_set(csi, out_pix->width); + } else { + imx7_csi_deinterlace_enable(csi, false); + imx7_csi_buf_stride_set(csi, 0); + } + + imx7_csi_set_imagpara(csi, out_pix->width, out_pix->height); + + if (!csi->is_csi2) + return 0; + + cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); + cr1 &= ~BIT_GCLK_MODE; + + cr18 = imx7_csi_reg_read(csi, CSI_CSICR18); + cr18 &= BIT_MIPI_DATA_FORMAT_MASK; + cr18 |= BIT_DATA_FROM_MIPI; + + switch (out_pix->pixelformat) { + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_YUYV: + cr18 |= BIT_MIPI_DATA_FORMAT_YUV422_8B; + break; + case V4L2_PIX_FMT_SBGGR8: + cr18 |= BIT_MIPI_DATA_FORMAT_RAW8; + break; + case V4L2_PIX_FMT_SBGGR16: + if (in_code == MEDIA_BUS_FMT_SBGGR10_1X10) + cr18 |= BIT_MIPI_DATA_FORMAT_RAW10; + else if (in_code == MEDIA_BUS_FMT_SBGGR12_1X12) + cr18 |= BIT_MIPI_DATA_FORMAT_RAW12; + else if (in_code == MEDIA_BUS_FMT_SBGGR14_1X14) + cr18 |= BIT_MIPI_DATA_FORMAT_RAW14; + cr1 |= BIT_PIXEL_BIT; + break; + default: + return -EINVAL; + } + + imx7_csi_reg_write(csi, cr1, CSI_CSICR1); + imx7_csi_reg_write(csi, cr18, CSI_CSICR18); + + return 0; +} + +static int imx7_csi_enable(struct imx7_csi *csi) +{ + imx7_csi_sw_reset(csi); + + if (csi->is_csi2) { + imx7_csi_dmareq_rff_enable(csi); + imx7_csi_hw_enable_irq(csi); + imx7_csi_hw_enable(csi); + return 0; + } + + return 0; +} + +static void imx7_csi_disable(struct imx7_csi *csi) +{ + imx7_csi_dmareq_rff_disable(csi); + + imx7_csi_hw_disable_irq(csi); + + imx7_csi_buf_stride_set(csi, 0); + + imx7_csi_hw_disable(csi); +} + +static int imx7_csi_streaming_start(struct imx7_csi *csi) +{ + int ret; + + ret = imx7_csi_dma_start(csi); + if (ret < 0) + return ret; + + ret = imx7_csi_configure(csi); + if (ret < 0) + goto dma_stop; + + imx7_csi_enable(csi); + + return 0; + +dma_stop: + imx7_csi_dma_stop(csi); + + return ret; +} + +static int imx7_csi_streaming_stop(struct imx7_csi *csi) +{ + imx7_csi_dma_stop(csi); + + imx7_csi_disable(csi); + + return 0; +} + +static int imx7_csi_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + int ret = 0; + + mutex_lock(&csi->lock); + + if (!csi->src_sd || !csi->sink) { + ret = -EPIPE; + goto out_unlock; + } + + if (csi->is_streaming == !!enable) + goto out_unlock; + + if (enable) { + ret = v4l2_subdev_call(csi->src_sd, video, s_stream, 1); + if (ret < 0) + goto out_unlock; + + ret = imx7_csi_streaming_start(csi); + if (ret < 0) { + v4l2_subdev_call(csi->src_sd, video, s_stream, 0); + goto out_unlock; + } + } else { + imx7_csi_streaming_stop(csi); + + v4l2_subdev_call(csi->src_sd, video, s_stream, 0); + } + + csi->is_streaming = !!enable; + +out_unlock: + mutex_unlock(&csi->lock); + + return ret; +} + +static struct v4l2_mbus_framefmt * +imx7_csi_get_format(struct imx7_csi *csi, + struct v4l2_subdev_pad_config *cfg, + unsigned int pad, + enum v4l2_subdev_format_whence which) +{ + if (which == V4L2_SUBDEV_FORMAT_TRY) + return v4l2_subdev_get_try_format(&csi->sd, cfg, pad); + + return &csi->format_mbus[pad]; +} + +static int imx7_csi_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt *in_fmt; + int ret = 0; + + mutex_lock(&csi->lock); + + in_fmt = imx7_csi_get_format(csi, cfg, IMX7_CSI_PAD_SINK, code->which); + + switch (code->pad) { + case IMX7_CSI_PAD_SINK: + ret = imx_media_enum_mbus_format(&code->code, code->index, + CS_SEL_ANY, true); + break; + case IMX7_CSI_PAD_SRC: + if (code->index != 0) { + ret = -EINVAL; + goto out_unlock; + } + + code->code = in_fmt->code; + break; + default: + ret = -EINVAL; + } + +out_unlock: + mutex_unlock(&csi->lock); + + return ret; +} + +static int imx7_csi_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *sdformat) +{ + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt *fmt; + int ret = 0; + + mutex_lock(&csi->lock); + + fmt = imx7_csi_get_format(csi, cfg, sdformat->pad, sdformat->which); + if (!fmt) { + ret = -EINVAL; + goto out_unlock; + } + + sdformat->format = *fmt; + +out_unlock: + mutex_unlock(&csi->lock); + + return ret; +} + +static int imx7_csi_try_fmt(struct imx7_csi *csi, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *sdformat, + const struct imx_media_pixfmt **cc) +{ + const struct imx_media_pixfmt *in_cc; + struct v4l2_mbus_framefmt *in_fmt; + u32 code; + + in_fmt = imx7_csi_get_format(csi, cfg, IMX7_CSI_PAD_SINK, + sdformat->which); + if (!in_fmt) + return -EINVAL; + + switch (sdformat->pad) { + case IMX7_CSI_PAD_SRC: + in_cc = imx_media_find_mbus_format(in_fmt->code, CS_SEL_ANY, + true); + + sdformat->format.width = in_fmt->width; + sdformat->format.height = in_fmt->height; + sdformat->format.code = in_fmt->code; + *cc = in_cc; + + sdformat->format.colorspace = in_fmt->colorspace; + sdformat->format.xfer_func = in_fmt->xfer_func; + sdformat->format.quantization = in_fmt->quantization; + sdformat->format.ycbcr_enc = in_fmt->ycbcr_enc; + break; + case IMX7_CSI_PAD_SINK: + *cc = imx_media_find_mbus_format(sdformat->format.code, + CS_SEL_ANY, true); + if (!*cc) { + imx_media_enum_mbus_format(&code, 0, CS_SEL_ANY, false); + *cc = imx_media_find_mbus_format(code, CS_SEL_ANY, + false); + sdformat->format.code = (*cc)->codes[0]; + } + + imx_media_fill_default_mbus_fields(&sdformat->format, in_fmt, + false); + break; + default: + return -EINVAL; + break; + } + return 0; +} + +static int imx7_csi_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *sdformat) +{ + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + struct imx_media_video_dev *vdev = csi->vdev; + const struct imx_media_pixfmt *outcc; + struct v4l2_mbus_framefmt *outfmt; + struct v4l2_pix_format vdev_fmt; + struct v4l2_rect vdev_compose; + const struct imx_media_pixfmt *cc; + struct v4l2_mbus_framefmt *fmt; + struct v4l2_subdev_format format; + int ret = 0; + + if (sdformat->pad >= IMX7_CSI_PADS_NUM) + return -EINVAL; + + mutex_lock(&csi->lock); + + if (csi->is_streaming) { + ret = -EBUSY; + goto out_unlock; + } + + imx7_csi_try_fmt(csi, cfg, sdformat, &cc); + + fmt = imx7_csi_get_format(csi, cfg, sdformat->pad, sdformat->which); + if (!fmt) { + ret = -EINVAL; + goto out_unlock; + } + + *fmt = sdformat->format; + + if (sdformat->pad == IMX7_CSI_PAD_SINK) { + /* propagate format to source pads */ + format.pad = IMX7_CSI_PAD_SRC; + format.which = sdformat->which; + format.format = sdformat->format; + if (imx7_csi_try_fmt(csi, cfg, &format, &outcc)) { + ret = -EINVAL; + goto out_unlock; + } + outfmt = imx7_csi_get_format(csi, cfg, IMX7_CSI_PAD_SRC, + sdformat->which); + *outfmt = format.format; + + if (sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE) + csi->cc[IMX7_CSI_PAD_SRC] = outcc; + } + + if (sdformat->which == V4L2_SUBDEV_FORMAT_TRY) + goto out_unlock; + + csi->cc[sdformat->pad] = cc; + + /* propagate output pad format to capture device */ + imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, &vdev_compose, + &csi->format_mbus[IMX7_CSI_PAD_SRC], + csi->cc[IMX7_CSI_PAD_SRC]); + mutex_unlock(&csi->lock); + imx_media_capture_device_set_format(vdev, &vdev_fmt, &vdev_compose); + + return 0; + +out_unlock: + mutex_unlock(&csi->lock); + + return ret; +} + +static int imx7_csi_registered(struct v4l2_subdev *sd) +{ + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + int ret; + int i; + + for (i = 0; i < IMX7_CSI_PADS_NUM; i++) { + csi->pad[i].flags = (i == IMX7_CSI_PAD_SINK) ? + MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE; + + /* set a default mbus format */ + ret = imx_media_init_mbus_fmt(&csi->format_mbus[i], + 800, 600, 0, V4L2_FIELD_NONE, + &csi->cc[i]); + if (ret < 0) + return ret; + + /* init default frame interval */ + csi->frame_interval[i].numerator = 1; + csi->frame_interval[i].denominator = 30; + } + + ret = media_entity_pads_init(&sd->entity, IMX7_CSI_PADS_NUM, csi->pad); + if (ret < 0) + return ret; + + ret = imx_media_capture_device_register(csi->vdev); + if (ret < 0) + return ret; + + ret = imx_media_add_video_device(csi->imxmd, csi->vdev); + if (ret < 0) { + imx_media_capture_device_unregister(csi->vdev); + return ret; + } + + return 0; +} + +static void imx7_csi_unregistered(struct v4l2_subdev *sd) +{ + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + + imx_media_capture_device_unregister(csi->vdev); +} + +static int imx7_csi_init_cfg(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg) +{ + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt *mf; + int ret; + int i; + + for (i = 0; i < IMX7_CSI_PADS_NUM; i++) { + mf = v4l2_subdev_get_try_format(sd, cfg, i); + + ret = imx_media_init_mbus_fmt(mf, 800, 600, 0, V4L2_FIELD_NONE, + &csi->cc[i]); + if (ret < 0) + return ret; + } + + return 0; +} + +static const struct media_entity_operations imx7_csi_entity_ops = { + .link_setup = imx7_csi_link_setup, + .link_validate = v4l2_subdev_link_validate, +}; + +static const struct v4l2_subdev_video_ops imx7_csi_video_ops = { + .s_stream = imx7_csi_s_stream, +}; + +static const struct v4l2_subdev_pad_ops imx7_csi_pad_ops = { + .init_cfg = imx7_csi_init_cfg, + .enum_mbus_code = imx7_csi_enum_mbus_code, + .get_fmt = imx7_csi_get_fmt, + .set_fmt = imx7_csi_set_fmt, + .link_validate = imx7_csi_pad_link_validate, +}; + +static const struct v4l2_subdev_ops imx7_csi_subdev_ops = { + .video = &imx7_csi_video_ops, + .pad = &imx7_csi_pad_ops, +}; + +static const struct v4l2_subdev_internal_ops imx7_csi_internal_ops = { + .registered = imx7_csi_registered, + .unregistered = imx7_csi_unregistered, +}; + +static int imx7_csi_parse_endpoint(struct device *dev, + struct v4l2_fwnode_endpoint *vep, + struct v4l2_async_subdev *asd) +{ + return fwnode_device_is_available(asd->match.fwnode) ? 0 : -EINVAL; +} + +static int imx7_csi_clocks_get(struct imx7_csi *csi) +{ + struct device *dev = csi->dev; + int i; + + csi->num_clks = ARRAY_SIZE(imx7_csi_clk_id); + csi->clks = devm_kcalloc(dev, csi->num_clks, sizeof(*csi->clks), + GFP_KERNEL); + + if (!csi->clks) + return -ENOMEM; + + for (i = 0; i < csi->num_clks; i++) + csi->clks[i].id = imx7_csi_clk_id[i]; + + return devm_clk_bulk_get(dev, csi->num_clks, csi->clks); +} + +static int imx7_csi_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct imx_media_dev *imxmd; + struct imx7_csi *csi; + struct resource *res; + int ret; + + csi = devm_kzalloc(&pdev->dev, sizeof(*csi), GFP_KERNEL); + if (!csi) + return -ENOMEM; + + csi->dev = dev; + + ret = imx7_csi_clocks_get(csi); + if (ret < 0) { + dev_err(dev, "Failed to get clocks"); + return -ENODEV; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + csi->irq = platform_get_irq(pdev, 0); + if (!res || csi->irq < 0) { + dev_err(dev, "Missing platform resources data\n"); + return -ENODEV; + } + + csi->regbase = devm_ioremap_resource(dev, res); + if (IS_ERR(csi->regbase)) { + dev_err(dev, "Failed platform resources map\n"); + return -ENODEV; + } + + spin_lock_init(&csi->irqlock); + mutex_init(&csi->lock); + + /* install interrupt handler */ + ret = devm_request_irq(dev, csi->irq, imx7_csi_irq_handler, 0, "csi", + (void *)csi); + if (ret < 0) { + dev_err(dev, "Request CSI IRQ failed.\n"); + ret = -ENODEV; + goto destroy_mutex; + } + + /* add media device */ + imxmd = imx_media_dev_init(dev); + if (IS_ERR(imxmd)) { + ret = PTR_ERR(imxmd); + goto destroy_mutex; + } + platform_set_drvdata(pdev, &csi->sd); + + ret = imx_media_of_add_csi(imxmd, node); + if (ret < 0) + goto cleanup; + + ret = imx_media_dev_notifier_register(imxmd); + if (ret < 0) + goto cleanup; + + csi->imxmd = imxmd; + v4l2_subdev_init(&csi->sd, &imx7_csi_subdev_ops); + v4l2_set_subdevdata(&csi->sd, csi); + csi->sd.internal_ops = &imx7_csi_internal_ops; + csi->sd.entity.ops = &imx7_csi_entity_ops; + csi->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + csi->sd.dev = &pdev->dev; + csi->sd.owner = THIS_MODULE; + csi->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE; + csi->sd.grp_id = IMX_MEDIA_GRP_ID_CSI; + snprintf(csi->sd.name, sizeof(csi->sd.name), "csi"); + + csi->vdev = imx_media_capture_device_init(&csi->sd, IMX7_CSI_PAD_SRC); + if (IS_ERR(csi->vdev)) + return PTR_ERR(csi->vdev); + + v4l2_ctrl_handler_init(&csi->ctrl_hdlr, 0); + csi->sd.ctrl_handler = &csi->ctrl_hdlr; + + ret = v4l2_async_register_fwnode_subdev(&csi->sd, + sizeof(struct v4l2_async_subdev), + NULL, 0, + imx7_csi_parse_endpoint); + if (ret) + goto free; + + return 0; + +free: + imx_media_capture_device_unregister(csi->vdev); + imx_media_capture_device_remove(csi->vdev); + v4l2_ctrl_handler_free(&csi->ctrl_hdlr); + +cleanup: + v4l2_async_notifier_cleanup(&imxmd->notifier); + v4l2_device_unregister(&imxmd->v4l2_dev); + media_device_unregister(&imxmd->md); + media_device_cleanup(&imxmd->md); + +destroy_mutex: + mutex_destroy(&csi->lock); + + return ret; +} + +static int imx7_csi_remove(struct platform_device *pdev) +{ + struct v4l2_subdev *sd = platform_get_drvdata(pdev); + struct imx7_csi *csi = v4l2_get_subdevdata(sd); + struct imx_media_dev *imxmd = csi->imxmd; + + v4l2_async_notifier_unregister(&imxmd->notifier); + v4l2_async_notifier_cleanup(&imxmd->notifier); + + media_device_unregister(&imxmd->md); + v4l2_device_unregister(&imxmd->v4l2_dev); + media_device_cleanup(&imxmd->md); + + imx_media_capture_device_unregister(csi->vdev); + imx_media_capture_device_remove(csi->vdev); + + v4l2_async_unregister_subdev(sd); + v4l2_ctrl_handler_free(&csi->ctrl_hdlr); + + mutex_destroy(&csi->lock); + + return 0; +} + +static const struct of_device_id imx7_csi_of_match[] = { + { .compatible = "fsl,imx7-csi" }, + { }, +}; +MODULE_DEVICE_TABLE(of, imx7_csi_of_match); + +static struct platform_driver imx7_csi_driver = { + .probe = imx7_csi_probe, + .remove = imx7_csi_remove, + .driver = { + .of_match_table = imx7_csi_of_match, + .name = "imx7-csi", + }, +}; +module_platform_driver(imx7_csi_driver); + +MODULE_DESCRIPTION("i.MX7 CSI subdev driver"); +MODULE_AUTHOR("Rui Miguel Silva <rui.silva@linaro.org>"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:imx7-csi"); diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c new file mode 100644 index 000000000000..2ddcc42ab8ff --- /dev/null +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -0,0 +1,1160 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Freescale i.MX7 SoC series MIPI-CSI V3.3 receiver driver + * + * Copyright (C) 2019 Linaro Ltd + * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd. + * + */ + +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/irq.h> +#include <linux/kernel.h> +#include <linux/mfd/syscon.h> +#include <linux/module.h> +#include <linux/of_graph.h> +#include <linux/platform_device.h> +#include <linux/pm_runtime.h> +#include <linux/reset.h> +#include <linux/regulator/consumer.h> +#include <linux/spinlock.h> + +#include <media/v4l2-device.h> +#include <media/v4l2-fwnode.h> +#include <media/v4l2-subdev.h> + +#include "imx-media.h" + +#define CSIS_DRIVER_NAME "imx7-mipi-csis" +#define CSIS_SUBDEV_NAME CSIS_DRIVER_NAME + +#define CSIS_PAD_SINK 0 +#define CSIS_PAD_SOURCE 1 +#define CSIS_PADS_NUM 2 + +#define MIPI_CSIS_DEF_PIX_WIDTH 640 +#define MIPI_CSIS_DEF_PIX_HEIGHT 480 + +/* Register map definition */ + +/* CSIS common control */ +#define MIPI_CSIS_CMN_CTRL 0x04 +#define MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW BIT(16) +#define MIPI_CSIS_CMN_CTRL_INTER_MODE BIT(10) +#define MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL BIT(2) +#define MIPI_CSIS_CMN_CTRL_RESET BIT(1) +#define MIPI_CSIS_CMN_CTRL_ENABLE BIT(0) + +#define MIPI_CSIS_CMN_CTRL_LANE_NR_OFFSET 8 +#define MIPI_CSIS_CMN_CTRL_LANE_NR_MASK (3 << 8) + +/* CSIS clock control */ +#define MIPI_CSIS_CLK_CTRL 0x08 +#define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH3(x) ((x) << 28) +#define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH2(x) ((x) << 24) +#define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH1(x) ((x) << 20) +#define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH0(x) ((x) << 16) +#define MIPI_CSIS_CLK_CTRL_CLKGATE_EN_MSK (0xf << 4) +#define MIPI_CSIS_CLK_CTRL_WCLK_SRC BIT(0) + +/* CSIS Interrupt mask */ +#define MIPI_CSIS_INTMSK 0x10 +#define MIPI_CSIS_INTMSK_EVEN_BEFORE BIT(31) +#define MIPI_CSIS_INTMSK_EVEN_AFTER BIT(30) +#define MIPI_CSIS_INTMSK_ODD_BEFORE BIT(29) +#define MIPI_CSIS_INTMSK_ODD_AFTER BIT(28) +#define MIPI_CSIS_INTMSK_FRAME_START BIT(24) +#define MIPI_CSIS_INTMSK_FRAME_END BIT(20) +#define MIPI_CSIS_INTMSK_ERR_SOT_HS BIT(16) +#define MIPI_CSIS_INTMSK_ERR_LOST_FS BIT(12) +#define MIPI_CSIS_INTMSK_ERR_LOST_FE BIT(8) +#define MIPI_CSIS_INTMSK_ERR_OVER BIT(4) +#define MIPI_CSIS_INTMSK_ERR_WRONG_CFG BIT(3) +#define MIPI_CSIS_INTMSK_ERR_ECC BIT(2) +#define MIPI_CSIS_INTMSK_ERR_CRC BIT(1) +#define MIPI_CSIS_INTMSK_ERR_UNKNOWN BIT(0) + +/* CSIS Interrupt source */ +#define MIPI_CSIS_INTSRC 0x14 +#define MIPI_CSIS_INTSRC_EVEN_BEFORE BIT(31) +#define MIPI_CSIS_INTSRC_EVEN_AFTER BIT(30) +#define MIPI_CSIS_INTSRC_EVEN BIT(30) +#define MIPI_CSIS_INTSRC_ODD_BEFORE BIT(29) +#define MIPI_CSIS_INTSRC_ODD_AFTER BIT(28) +#define MIPI_CSIS_INTSRC_ODD (0x3 << 28) +#define MIPI_CSIS_INTSRC_NON_IMAGE_DATA (0xf << 28) +#define MIPI_CSIS_INTSRC_FRAME_START BIT(24) +#define MIPI_CSIS_INTSRC_FRAME_END BIT(20) +#define MIPI_CSIS_INTSRC_ERR_SOT_HS BIT(16) +#define MIPI_CSIS_INTSRC_ERR_LOST_FS BIT(12) +#define MIPI_CSIS_INTSRC_ERR_LOST_FE BIT(8) +#define MIPI_CSIS_INTSRC_ERR_OVER BIT(4) +#define MIPI_CSIS_INTSRC_ERR_WRONG_CFG BIT(3) +#define MIPI_CSIS_INTSRC_ERR_ECC BIT(2) +#define MIPI_CSIS_INTSRC_ERR_CRC BIT(1) +#define MIPI_CSIS_INTSRC_ERR_UNKNOWN BIT(0) +#define MIPI_CSIS_INTSRC_ERRORS 0xfffff + +/* D-PHY status control */ +#define MIPI_CSIS_DPHYSTATUS 0x20 +#define MIPI_CSIS_DPHYSTATUS_ULPS_DAT BIT(8) +#define MIPI_CSIS_DPHYSTATUS_STOPSTATE_DAT BIT(4) +#define MIPI_CSIS_DPHYSTATUS_ULPS_CLK BIT(1) +#define MIPI_CSIS_DPHYSTATUS_STOPSTATE_CLK BIT(0) + +/* D-PHY common control */ +#define MIPI_CSIS_DPHYCTRL 0x24 +#define MIPI_CSIS_DPHYCTRL_HSS_MASK (0xff << 24) +#define MIPI_CSIS_DPHYCTRL_HSS_OFFSET 24 +#define MIPI_CSIS_DPHYCTRL_SCLKS_MASK (0x3 << 22) +#define MIPI_CSIS_DPHYCTRL_SCLKS_OFFSET 22 +#define MIPI_CSIS_DPHYCTRL_DPDN_SWAP_CLK BIT(6) +#define MIPI_CSIS_DPHYCTRL_DPDN_SWAP_DAT BIT(5) +#define MIPI_CSIS_DPHYCTRL_ENABLE_DAT BIT(1) +#define MIPI_CSIS_DPHYCTRL_ENABLE_CLK BIT(0) +#define MIPI_CSIS_DPHYCTRL_ENABLE (0x1f << 0) + +/* D-PHY Master and Slave Control register Low */ +#define MIPI_CSIS_DPHYBCTRL_L 0x30 +/* D-PHY Master and Slave Control register High */ +#define MIPI_CSIS_DPHYBCTRL_H 0x34 +/* D-PHY Slave Control register Low */ +#define MIPI_CSIS_DPHYSCTRL_L 0x38 +/* D-PHY Slave Control register High */ +#define MIPI_CSIS_DPHYSCTRL_H 0x3c + +/* ISP Configuration register */ +#define MIPI_CSIS_ISPCONFIG_CH0 0x40 +#define MIPI_CSIS_ISPCONFIG_CH1 0x50 +#define MIPI_CSIS_ISPCONFIG_CH2 0x60 +#define MIPI_CSIS_ISPCONFIG_CH3 0x70 + +#define MIPI_CSIS_ISPCFG_MEM_FULL_GAP_MSK (0xff << 24) +#define MIPI_CSIS_ISPCFG_MEM_FULL_GAP(x) ((x) << 24) +#define MIPI_CSIS_ISPCFG_DOUBLE_CMPNT BIT(12) +#define MIPI_CSIS_ISPCFG_ALIGN_32BIT BIT(11) +#define MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT (0x1e << 2) +#define MIPI_CSIS_ISPCFG_FMT_RAW8 (0x2a << 2) +#define MIPI_CSIS_ISPCFG_FMT_RAW10 (0x2b << 2) +#define MIPI_CSIS_ISPCFG_FMT_RAW12 (0x2c << 2) + +/* User defined formats, x = 1...4 */ +#define MIPI_CSIS_ISPCFG_FMT_USER(x) ((0x30 + (x) - 1) << 2) +#define MIPI_CSIS_ISPCFG_FMT_MASK (0x3f << 2) + +/* ISP Image Resolution register */ +#define MIPI_CSIS_ISPRESOL_CH0 0x44 +#define MIPI_CSIS_ISPRESOL_CH1 0x54 +#define MIPI_CSIS_ISPRESOL_CH2 0x64 +#define MIPI_CSIS_ISPRESOL_CH3 0x74 +#define CSIS_MAX_PIX_WIDTH 0xffff +#define CSIS_MAX_PIX_HEIGHT 0xffff + +/* ISP SYNC register */ +#define MIPI_CSIS_ISPSYNC_CH0 0x48 +#define MIPI_CSIS_ISPSYNC_CH1 0x58 +#define MIPI_CSIS_ISPSYNC_CH2 0x68 +#define MIPI_CSIS_ISPSYNC_CH3 0x78 + +#define MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET 18 +#define MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET 12 +#define MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET 0 + +/* Non-image packet data buffers */ +#define MIPI_CSIS_PKTDATA_ODD 0x2000 +#define MIPI_CSIS_PKTDATA_EVEN 0x3000 +#define MIPI_CSIS_PKTDATA_SIZE SZ_4K + +#define DEFAULT_SCLK_CSIS_FREQ 166000000UL + +enum { + ST_POWERED = 1, + ST_STREAMING = 2, + ST_SUSPENDED = 4, +}; + +struct mipi_csis_event { + u32 mask; + const char * const name; + unsigned int counter; +}; + +static const struct mipi_csis_event mipi_csis_events[] = { + /* Errors */ + { MIPI_CSIS_INTSRC_ERR_SOT_HS, "SOT Error" }, + { MIPI_CSIS_INTSRC_ERR_LOST_FS, "Lost Frame Start Error" }, + { MIPI_CSIS_INTSRC_ERR_LOST_FE, "Lost Frame End Error" }, + { MIPI_CSIS_INTSRC_ERR_OVER, "FIFO Overflow Error" }, + { MIPI_CSIS_INTSRC_ERR_WRONG_CFG, "Wrong Configuration Error" }, + { MIPI_CSIS_INTSRC_ERR_ECC, "ECC Error" }, + { MIPI_CSIS_INTSRC_ERR_CRC, "CRC Error" }, + { MIPI_CSIS_INTSRC_ERR_UNKNOWN, "Unknown Error" }, + /* Non-image data receive events */ + { MIPI_CSIS_INTSRC_EVEN_BEFORE, "Non-image data before even frame" }, + { MIPI_CSIS_INTSRC_EVEN_AFTER, "Non-image data after even frame" }, + { MIPI_CSIS_INTSRC_ODD_BEFORE, "Non-image data before odd frame" }, + { MIPI_CSIS_INTSRC_ODD_AFTER, "Non-image data after odd frame" }, + /* Frame start/end */ + { MIPI_CSIS_INTSRC_FRAME_START, "Frame Start" }, + { MIPI_CSIS_INTSRC_FRAME_END, "Frame End" }, +}; + +#define MIPI_CSIS_NUM_EVENTS ARRAY_SIZE(mipi_csis_events) + +static const char * const mipi_csis_clk_id[] = {"pclk", "wrap", "phy"}; + +struct csis_hw_reset { + struct regmap *src; + u8 req_src; + u8 rst_bit; +}; + +struct csi_state { + /* lock elements below */ + struct mutex lock; + /* lock for event handler */ + spinlock_t slock; + struct device *dev; + struct media_pad pads[CSIS_PADS_NUM]; + struct v4l2_subdev mipi_sd; + struct v4l2_subdev *src_sd; + + u8 index; + struct platform_device *pdev; + struct phy *phy; + void __iomem *regs; + struct clk *wrap_clk; + int irq; + u32 flags; + + struct dentry *debugfs_root; + bool debug; + + int num_clks; + struct clk_bulk_data *clks; + + u32 clk_frequency; + u32 hs_settle; + + struct reset_control *mrst; + + const struct csis_pix_format *csis_fmt; + struct v4l2_mbus_framefmt format_mbus; + + struct v4l2_fwnode_bus_mipi_csi2 bus; + + struct mipi_csis_event events[MIPI_CSIS_NUM_EVENTS]; + + struct v4l2_async_notifier subdev_notifier; + + struct csis_hw_reset hw_reset; + struct regulator *mipi_phy_regulator; + bool sink_linked; +}; + +struct csis_pix_format { + unsigned int pix_width_alignment; + u32 code; + u32 fmt_reg; + u8 data_alignment; +}; + +static const struct csis_pix_format mipi_csis_formats[] = { + { + .code = MEDIA_BUS_FMT_SBGGR10_1X10, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, + .data_alignment = 16, + }, { + .code = MEDIA_BUS_FMT_VYUY8_2X8, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, + .data_alignment = 16, + }, { + .code = MEDIA_BUS_FMT_SBGGR8_1X8, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, + .data_alignment = 8, + }, { + .code = MEDIA_BUS_FMT_YUYV8_2X8, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, + .data_alignment = 16, + } +}; + +#define mipi_csis_write(__csis, __r, __v) writel(__v, (__csis)->regs + (__r)) +#define mipi_csis_read(__csis, __r) readl((__csis)->regs + (__r)) + +static int mipi_csis_dump_regs(struct csi_state *state) +{ + struct device *dev = &state->pdev->dev; + unsigned int i; + u32 cfg; + struct { + u32 offset; + const char * const name; + } registers[] = { + { 0x04, "CTRL" }, + { 0x24, "DPHYCTRL" }, + { 0x08, "CLKCTRL" }, + { 0x20, "DPHYSTS" }, + { 0x10, "INTMSK" }, + { 0x40, "CONFIG_CH0" }, + { 0xC0, "DBG_CONFIG" }, + { 0x38, "DPHYSLAVE_L" }, + { 0x3C, "DPHYSLAVE_H" }, + }; + + dev_info(dev, "--- REGISTERS ---\n"); + + for (i = 0; i < ARRAY_SIZE(registers); i++) { + cfg = mipi_csis_read(state, registers[i].offset); + dev_info(dev, "%12s: 0x%08x\n", registers[i].name, cfg); + } + + return 0; +} + +static struct csi_state *mipi_sd_to_csis_state(struct v4l2_subdev *sdev) +{ + return container_of(sdev, struct csi_state, mipi_sd); +} + +static const struct csis_pix_format *find_csis_format(u32 code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(mipi_csis_formats); i++) + if (code == mipi_csis_formats[i].code) + return &mipi_csis_formats[i]; + return NULL; +} + +static void mipi_csis_enable_interrupts(struct csi_state *state, bool on) +{ + mipi_csis_write(state, MIPI_CSIS_INTMSK, on ? 0xffffffff : 0); +} + +static void mipi_csis_sw_reset(struct csi_state *state) +{ + u32 val = mipi_csis_read(state, MIPI_CSIS_CMN_CTRL); + + mipi_csis_write(state, MIPI_CSIS_CMN_CTRL, + val | MIPI_CSIS_CMN_CTRL_RESET); + usleep_range(10, 20); +} + +static int mipi_csis_phy_init(struct csi_state *state) +{ + state->mipi_phy_regulator = devm_regulator_get(state->dev, "phy"); + + return regulator_set_voltage(state->mipi_phy_regulator, 1000000, + 1000000); +} + +static void mipi_csis_phy_reset(struct csi_state *state) +{ + reset_control_assert(state->mrst); + + msleep(20); + + reset_control_deassert(state->mrst); +} + +static void mipi_csis_system_enable(struct csi_state *state, int on) +{ + u32 val, mask; + + val = mipi_csis_read(state, MIPI_CSIS_CMN_CTRL); + if (on) + val |= MIPI_CSIS_CMN_CTRL_ENABLE; + else + val &= ~MIPI_CSIS_CMN_CTRL_ENABLE; + mipi_csis_write(state, MIPI_CSIS_CMN_CTRL, val); + + val = mipi_csis_read(state, MIPI_CSIS_DPHYCTRL); + val &= ~MIPI_CSIS_DPHYCTRL_ENABLE; + if (on) { + mask = (1 << (state->bus.num_data_lanes + 1)) - 1; + val |= (mask & MIPI_CSIS_DPHYCTRL_ENABLE); + } + mipi_csis_write(state, MIPI_CSIS_DPHYCTRL, val); +} + +/* Called with the state.lock mutex held */ +static void __mipi_csis_set_format(struct csi_state *state) +{ + struct v4l2_mbus_framefmt *mf = &state->format_mbus; + u32 val; + + /* Color format */ + val = mipi_csis_read(state, MIPI_CSIS_ISPCONFIG_CH0); + val = (val & ~MIPI_CSIS_ISPCFG_FMT_MASK) | state->csis_fmt->fmt_reg; + mipi_csis_write(state, MIPI_CSIS_ISPCONFIG_CH0, val); + + /* Pixel resolution */ + val = mf->width | (mf->height << 16); + mipi_csis_write(state, MIPI_CSIS_ISPRESOL_CH0, val); +} + +static void mipi_csis_set_hsync_settle(struct csi_state *state, int hs_settle) +{ + u32 val = mipi_csis_read(state, MIPI_CSIS_DPHYCTRL); + + val = ((val & ~MIPI_CSIS_DPHYCTRL_HSS_MASK) | (hs_settle << 24)); + + mipi_csis_write(state, MIPI_CSIS_DPHYCTRL, val); +} + +static void mipi_csis_set_params(struct csi_state *state) +{ + int lanes = state->bus.num_data_lanes; + u32 val; + + val = mipi_csis_read(state, MIPI_CSIS_CMN_CTRL); + val &= ~MIPI_CSIS_CMN_CTRL_LANE_NR_MASK; + val |= (lanes - 1) << MIPI_CSIS_CMN_CTRL_LANE_NR_OFFSET; + mipi_csis_write(state, MIPI_CSIS_CMN_CTRL, val); + + __mipi_csis_set_format(state); + + mipi_csis_set_hsync_settle(state, state->hs_settle); + + val = mipi_csis_read(state, MIPI_CSIS_ISPCONFIG_CH0); + if (state->csis_fmt->data_alignment == 32) + val |= MIPI_CSIS_ISPCFG_ALIGN_32BIT; + else + val &= ~MIPI_CSIS_ISPCFG_ALIGN_32BIT; + mipi_csis_write(state, MIPI_CSIS_ISPCONFIG_CH0, val); + + val = (0 << MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET) | + (0 << MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET) | + (0 << MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET); + mipi_csis_write(state, MIPI_CSIS_ISPSYNC_CH0, val); + + val = mipi_csis_read(state, MIPI_CSIS_CLK_CTRL); + val &= ~MIPI_CSIS_CLK_CTRL_WCLK_SRC; + if (state->wrap_clk) + val |= MIPI_CSIS_CLK_CTRL_WCLK_SRC; + else + val &= ~MIPI_CSIS_CLK_CTRL_WCLK_SRC; + + val |= MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH0(15); + val &= ~MIPI_CSIS_CLK_CTRL_CLKGATE_EN_MSK; + mipi_csis_write(state, MIPI_CSIS_CLK_CTRL, val); + + mipi_csis_write(state, MIPI_CSIS_DPHYBCTRL_L, 0x1f4); + mipi_csis_write(state, MIPI_CSIS_DPHYBCTRL_H, 0); + + /* Update the shadow register. */ + val = mipi_csis_read(state, MIPI_CSIS_CMN_CTRL); + mipi_csis_write(state, MIPI_CSIS_CMN_CTRL, + val | MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW | + MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL); +} + +static void mipi_csis_clk_enable(struct csi_state *state) +{ + int ret; + + ret = clk_bulk_prepare_enable(state->num_clks, state->clks); + if (ret < 0) + dev_err(state->dev, "failed to enable clocks\n"); +} + +static void mipi_csis_clk_disable(struct csi_state *state) +{ + clk_bulk_disable_unprepare(state->num_clks, state->clks); +} + +static int mipi_csis_clk_get(struct csi_state *state) +{ + struct device *dev = &state->pdev->dev; + unsigned int i; + int ret; + + state->num_clks = ARRAY_SIZE(mipi_csis_clk_id); + state->clks = devm_kcalloc(dev, state->num_clks, sizeof(*state->clks), + GFP_KERNEL); + + if (!state->clks) + return -ENOMEM; + + for (i = 0; i < state->num_clks; i++) + state->clks[i].id = mipi_csis_clk_id[i]; + + ret = devm_clk_bulk_get(dev, state->num_clks, state->clks); + if (ret < 0) + return ret; + + state->wrap_clk = devm_clk_get(dev, "wrap"); + if (IS_ERR(state->wrap_clk)) + return IS_ERR(state->wrap_clk); + + /* Set clock rate */ + ret = clk_set_rate(state->wrap_clk, state->clk_frequency); + if (ret < 0) + dev_err(dev, "set rate=%d failed: %d\n", state->clk_frequency, + ret); + + return ret; +} + +static void mipi_csis_start_stream(struct csi_state *state) +{ + mipi_csis_sw_reset(state); + mipi_csis_set_params(state); + mipi_csis_system_enable(state, true); + mipi_csis_enable_interrupts(state, true); +} + +static void mipi_csis_stop_stream(struct csi_state *state) +{ + mipi_csis_enable_interrupts(state, false); + mipi_csis_system_enable(state, false); +} + +static void mipi_csis_clear_counters(struct csi_state *state) +{ + unsigned long flags; + unsigned int i; + + spin_lock_irqsave(&state->slock, flags); + for (i = 0; i < MIPI_CSIS_NUM_EVENTS; i++) + state->events[i].counter = 0; + spin_unlock_irqrestore(&state->slock, flags); +} + +static void mipi_csis_log_counters(struct csi_state *state, bool non_errors) +{ + int i = non_errors ? MIPI_CSIS_NUM_EVENTS : MIPI_CSIS_NUM_EVENTS - 4; + struct device *dev = &state->pdev->dev; + unsigned long flags; + + spin_lock_irqsave(&state->slock, flags); + + for (i--; i >= 0; i--) { + if (state->events[i].counter > 0 || state->debug) + dev_info(dev, "%s events: %d\n", state->events[i].name, + state->events[i].counter); + } + spin_unlock_irqrestore(&state->slock, flags); +} + +/* + * V4L2 subdev operations + */ +static int mipi_csis_s_stream(struct v4l2_subdev *mipi_sd, int enable) +{ + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + int ret = 0; + + if (enable) { + mipi_csis_clear_counters(state); + ret = pm_runtime_get_sync(&state->pdev->dev); + if (ret < 0) { + pm_runtime_put_noidle(&state->pdev->dev); + return ret; + } + ret = v4l2_subdev_call(state->src_sd, core, s_power, 1); + if (ret < 0) + return ret; + } + + mutex_lock(&state->lock); + if (enable) { + if (state->flags & ST_SUSPENDED) { + ret = -EBUSY; + goto unlock; + } + + mipi_csis_start_stream(state); + ret = v4l2_subdev_call(state->src_sd, video, s_stream, 1); + if (ret < 0) + goto unlock; + + mipi_csis_log_counters(state, true); + + state->flags |= ST_STREAMING; + } else { + v4l2_subdev_call(state->src_sd, video, s_stream, 0); + ret = v4l2_subdev_call(state->src_sd, core, s_power, 1); + mipi_csis_stop_stream(state); + state->flags &= ~ST_STREAMING; + if (state->debug) + mipi_csis_log_counters(state, true); + } + +unlock: + mutex_unlock(&state->lock); + if (!enable) + pm_runtime_put(&state->pdev->dev); + + return ret; +} + +static int mipi_csis_link_setup(struct media_entity *entity, + const struct media_pad *local_pad, + const struct media_pad *remote_pad, u32 flags) +{ + struct v4l2_subdev *mipi_sd = media_entity_to_v4l2_subdev(entity); + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + struct v4l2_subdev *remote_sd; + int ret = 0; + + dev_dbg(state->dev, "link setup %s -> %s", remote_pad->entity->name, + local_pad->entity->name); + + remote_sd = media_entity_to_v4l2_subdev(remote_pad->entity); + + mutex_lock(&state->lock); + + if (local_pad->flags & MEDIA_PAD_FL_SOURCE) { + if (flags & MEDIA_LNK_FL_ENABLED) { + if (state->sink_linked) { + ret = -EBUSY; + goto out; + } + state->sink_linked = true; + } else { + state->sink_linked = false; + } + } else { + if (flags & MEDIA_LNK_FL_ENABLED) { + if (state->src_sd) { + ret = -EBUSY; + goto out; + } + state->src_sd = remote_sd; + } else { + state->src_sd = NULL; + } + } + +out: + mutex_unlock(&state->lock); + return ret; +} + +static int mipi_csis_init_cfg(struct v4l2_subdev *mipi_sd, + struct v4l2_subdev_pad_config *cfg) +{ + struct v4l2_mbus_framefmt *mf; + unsigned int i; + int ret; + + for (i = 0; i < CSIS_PADS_NUM; i++) { + mf = v4l2_subdev_get_try_format(mipi_sd, cfg, i); + + ret = imx_media_init_mbus_fmt(mf, MIPI_CSIS_DEF_PIX_HEIGHT, + MIPI_CSIS_DEF_PIX_WIDTH, 0, + V4L2_FIELD_NONE, NULL); + if (ret < 0) + return ret; + } + + return 0; +} + +static struct csis_pix_format const * +mipi_csis_try_format(struct v4l2_subdev *mipi_sd, struct v4l2_mbus_framefmt *mf) +{ + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + struct csis_pix_format const *csis_fmt; + + csis_fmt = find_csis_format(mf->code); + if (!csis_fmt) + csis_fmt = &mipi_csis_formats[0]; + + v4l_bound_align_image(&mf->width, 1, CSIS_MAX_PIX_WIDTH, + csis_fmt->pix_width_alignment, + &mf->height, 1, CSIS_MAX_PIX_HEIGHT, 1, + 0); + + state->format_mbus.code = csis_fmt->code; + state->format_mbus.width = mf->width; + state->format_mbus.height = mf->height; + + return csis_fmt; +} + +static struct v4l2_mbus_framefmt * +mipi_csis_get_format(struct csi_state *state, + struct v4l2_subdev_pad_config *cfg, + enum v4l2_subdev_format_whence which, + unsigned int pad) +{ + if (which == V4L2_SUBDEV_FORMAT_TRY) + return v4l2_subdev_get_try_format(&state->mipi_sd, cfg, pad); + + return &state->format_mbus; +} + +static int mipi_csis_set_fmt(struct v4l2_subdev *mipi_sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *sdformat) +{ + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + struct csis_pix_format const *csis_fmt; + struct v4l2_mbus_framefmt *fmt; + + if (sdformat->pad >= CSIS_PADS_NUM) + return -EINVAL; + + fmt = mipi_csis_get_format(state, cfg, sdformat->which, sdformat->pad); + + mutex_lock(&state->lock); + if (fmt && sdformat->pad == CSIS_PAD_SOURCE) { + sdformat->format = *fmt; + goto unlock; + } + + csis_fmt = mipi_csis_try_format(mipi_sd, &sdformat->format); + + sdformat->format = *fmt; + + if (csis_fmt && sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE) + state->csis_fmt = csis_fmt; + else + cfg->try_fmt = sdformat->format; + +unlock: + mutex_unlock(&state->lock); + + return 0; +} + +static int mipi_csis_get_fmt(struct v4l2_subdev *mipi_sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *sdformat) +{ + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + struct v4l2_mbus_framefmt *fmt; + + mutex_lock(&state->lock); + + fmt = mipi_csis_get_format(state, cfg, sdformat->which, sdformat->pad); + + sdformat->format = *fmt; + + mutex_unlock(&state->lock); + + return 0; +} + +static int mipi_csis_log_status(struct v4l2_subdev *mipi_sd) +{ + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + + mutex_lock(&state->lock); + mipi_csis_log_counters(state, true); + if (state->debug && (state->flags & ST_POWERED)) + mipi_csis_dump_regs(state); + mutex_unlock(&state->lock); + + return 0; +} + +static irqreturn_t mipi_csis_irq_handler(int irq, void *dev_id) +{ + struct csi_state *state = dev_id; + unsigned long flags; + unsigned int i; + u32 status; + + status = mipi_csis_read(state, MIPI_CSIS_INTSRC); + + spin_lock_irqsave(&state->slock, flags); + + /* Update the event/error counters */ + if ((status & MIPI_CSIS_INTSRC_ERRORS) || state->debug) { + for (i = 0; i < MIPI_CSIS_NUM_EVENTS; i++) { + if (!(status & state->events[i].mask)) + continue; + state->events[i].counter++; + } + } + spin_unlock_irqrestore(&state->slock, flags); + + mipi_csis_write(state, MIPI_CSIS_INTSRC, status); + + return IRQ_HANDLED; +} + +static const struct v4l2_subdev_core_ops mipi_csis_core_ops = { + .log_status = mipi_csis_log_status, +}; + +static const struct media_entity_operations mipi_csis_entity_ops = { + .link_setup = mipi_csis_link_setup, + .link_validate = v4l2_subdev_link_validate, +}; + +static const struct v4l2_subdev_video_ops mipi_csis_video_ops = { + .s_stream = mipi_csis_s_stream, +}; + +static const struct v4l2_subdev_pad_ops mipi_csis_pad_ops = { + .init_cfg = mipi_csis_init_cfg, + .get_fmt = mipi_csis_get_fmt, + .set_fmt = mipi_csis_set_fmt, +}; + +static const struct v4l2_subdev_ops mipi_csis_subdev_ops = { + .core = &mipi_csis_core_ops, + .video = &mipi_csis_video_ops, + .pad = &mipi_csis_pad_ops, +}; + +static int mipi_csis_parse_dt(struct platform_device *pdev, + struct csi_state *state) +{ + struct device_node *node = pdev->dev.of_node; + + if (of_property_read_u32(node, "clock-frequency", + &state->clk_frequency)) + state->clk_frequency = DEFAULT_SCLK_CSIS_FREQ; + + /* Get MIPI PHY resets */ + state->mrst = devm_reset_control_get_exclusive(&pdev->dev, "mrst"); + if (IS_ERR(state->mrst)) + return PTR_ERR(state->mrst); + + /* Get MIPI CSI-2 bus configuration from the endpoint node. */ + of_property_read_u32(node, "fsl,csis-hs-settle", &state->hs_settle); + + return 0; +} + +static int mipi_csis_pm_resume(struct device *dev, bool runtime); + +static int mipi_csis_parse_endpoint(struct device *dev, + struct v4l2_fwnode_endpoint *ep, + struct v4l2_async_subdev *asd) +{ + struct v4l2_subdev *mipi_sd = dev_get_drvdata(dev); + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + + if (ep->bus_type != V4L2_MBUS_CSI2_DPHY) { + dev_err(dev, "invalid bus type, must be MIPI CSI2\n"); + return -EINVAL; + } + + state->bus = ep->bus.mipi_csi2; + + dev_dbg(state->dev, "data lanes: %d\n", state->bus.num_data_lanes); + dev_dbg(state->dev, "flags: 0x%08x\n", state->bus.flags); + + return 0; +} + +static int mipi_csis_subdev_init(struct v4l2_subdev *mipi_sd, + struct platform_device *pdev, + const struct v4l2_subdev_ops *ops) +{ + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + unsigned int sink_port = 0; + int ret; + + v4l2_subdev_init(mipi_sd, ops); + mipi_sd->owner = THIS_MODULE; + snprintf(mipi_sd->name, sizeof(mipi_sd->name), "%s.%d", + CSIS_SUBDEV_NAME, state->index); + + mipi_sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + mipi_sd->ctrl_handler = NULL; + + mipi_sd->entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + mipi_sd->entity.ops = &mipi_csis_entity_ops; + + mipi_sd->dev = &pdev->dev; + + state->csis_fmt = &mipi_csis_formats[0]; + state->format_mbus.code = mipi_csis_formats[0].code; + state->format_mbus.width = MIPI_CSIS_DEF_PIX_WIDTH; + state->format_mbus.height = MIPI_CSIS_DEF_PIX_HEIGHT; + state->format_mbus.field = V4L2_FIELD_NONE; + + v4l2_set_subdevdata(mipi_sd, &pdev->dev); + + ret = v4l2_async_register_fwnode_subdev(mipi_sd, + sizeof(struct v4l2_async_subdev), + &sink_port, 1, + mipi_csis_parse_endpoint); + if (ret < 0) + dev_err(&pdev->dev, "async fwnode register failed: %d\n", ret); + + return ret; +} + +#ifdef CONFIG_DEBUG_FS +#include <linux/debugfs.h> + +static int mipi_csis_dump_regs_show(struct seq_file *m, void *private) +{ + struct csi_state *state = m->private; + + return mipi_csis_dump_regs(state); +} +DEFINE_SHOW_ATTRIBUTE(mipi_csis_dump_regs); + +static int __init_or_module mipi_csis_debugfs_init(struct csi_state *state) +{ + struct dentry *d; + + if (!debugfs_initialized()) + return -ENODEV; + + state->debugfs_root = debugfs_create_dir(dev_name(state->dev), NULL); + if (!state->debugfs_root) + return -ENOMEM; + + d = debugfs_create_bool("debug_enable", 0600, state->debugfs_root, + &state->debug); + if (!d) + goto remove_debugfs; + + d = debugfs_create_file("dump_regs", 0600, state->debugfs_root, + state, &mipi_csis_dump_regs_fops); + if (!d) + goto remove_debugfs; + + return 0; + +remove_debugfs: + debugfs_remove_recursive(state->debugfs_root); + + return -ENOMEM; +} + +static void mipi_csis_debugfs_exit(struct csi_state *state) +{ + debugfs_remove_recursive(state->debugfs_root); +} + +#else +static int mipi_csis_debugfs_init(struct csi_state *state __maybe_unused) +{ + return 0; +} + +static void mipi_csis_debugfs_exit(struct csi_state *state __maybe_unused) +{ +} +#endif + +static int mipi_csis_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct resource *mem_res; + struct csi_state *state; + int ret = -ENOMEM; + + state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL); + if (!state) + return -ENOMEM; + + spin_lock_init(&state->slock); + + state->pdev = pdev; + state->dev = dev; + + ret = mipi_csis_parse_dt(pdev, state); + if (ret < 0) { + dev_err(dev, "Failed to parse device tree: %d\n", ret); + return ret; + } + + mipi_csis_phy_init(state); + mipi_csis_phy_reset(state); + + mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + state->regs = devm_ioremap_resource(dev, mem_res); + if (IS_ERR(state->regs)) + return PTR_ERR(state->regs); + + state->irq = platform_get_irq(pdev, 0); + if (state->irq < 0) { + dev_err(dev, "Failed to get irq\n"); + return state->irq; + } + + ret = mipi_csis_clk_get(state); + if (ret < 0) + return ret; + + mipi_csis_clk_enable(state); + + ret = devm_request_irq(dev, state->irq, mipi_csis_irq_handler, + 0, dev_name(dev), state); + if (ret) { + dev_err(dev, "Interrupt request failed\n"); + goto disable_clock; + } + + platform_set_drvdata(pdev, &state->mipi_sd); + + mutex_init(&state->lock); + ret = mipi_csis_subdev_init(&state->mipi_sd, pdev, + &mipi_csis_subdev_ops); + if (ret < 0) + goto disable_clock; + + state->pads[CSIS_PAD_SINK].flags = MEDIA_PAD_FL_SINK; + state->pads[CSIS_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(&state->mipi_sd.entity, CSIS_PADS_NUM, + state->pads); + if (ret < 0) + goto unregister_subdev; + + memcpy(state->events, mipi_csis_events, sizeof(state->events)); + + mipi_csis_debugfs_init(state); + pm_runtime_enable(dev); + if (!pm_runtime_enabled(dev)) { + ret = mipi_csis_pm_resume(dev, true); + if (ret < 0) + goto unregister_all; + } + + dev_info(&pdev->dev, "lanes: %d, hs_settle: %d, wclk: %d, freq: %u\n", + state->bus.num_data_lanes, state->hs_settle, + state->wrap_clk ? 1 : 0, state->clk_frequency); + + return 0; + +unregister_all: + mipi_csis_debugfs_exit(state); + media_entity_cleanup(&state->mipi_sd.entity); +unregister_subdev: + v4l2_async_unregister_subdev(&state->mipi_sd); +disable_clock: + mipi_csis_clk_disable(state); + mutex_destroy(&state->lock); + + return ret; +} + +static int mipi_csis_pm_suspend(struct device *dev, bool runtime) +{ + struct platform_device *pdev = to_platform_device(dev); + struct v4l2_subdev *mipi_sd = platform_get_drvdata(pdev); + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + int ret = 0; + + mutex_lock(&state->lock); + if (state->flags & ST_POWERED) { + mipi_csis_stop_stream(state); + ret = regulator_disable(state->mipi_phy_regulator); + if (ret) + goto unlock; + mipi_csis_clk_disable(state); + state->flags &= ~ST_POWERED; + if (!runtime) + state->flags |= ST_SUSPENDED; + } + +unlock: + mutex_unlock(&state->lock); + + return ret ? -EAGAIN : 0; +} + +static int mipi_csis_pm_resume(struct device *dev, bool runtime) +{ + struct platform_device *pdev = to_platform_device(dev); + struct v4l2_subdev *mipi_sd = platform_get_drvdata(pdev); + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + int ret = 0; + + mutex_lock(&state->lock); + if (!runtime && !(state->flags & ST_SUSPENDED)) + goto unlock; + + if (!(state->flags & ST_POWERED)) { + ret = regulator_enable(state->mipi_phy_regulator); + if (ret) + goto unlock; + + state->flags |= ST_POWERED; + mipi_csis_clk_enable(state); + } + if (state->flags & ST_STREAMING) + mipi_csis_start_stream(state); + + state->flags &= ~ST_SUSPENDED; + +unlock: + mutex_unlock(&state->lock); + + return ret ? -EAGAIN : 0; +} + +static int __maybe_unused mipi_csis_suspend(struct device *dev) +{ + return mipi_csis_pm_suspend(dev, false); +} + +static int __maybe_unused mipi_csis_resume(struct device *dev) +{ + return mipi_csis_pm_resume(dev, false); +} + +static int __maybe_unused mipi_csis_runtime_suspend(struct device *dev) +{ + return mipi_csis_pm_suspend(dev, true); +} + +static int __maybe_unused mipi_csis_runtime_resume(struct device *dev) +{ + return mipi_csis_pm_resume(dev, true); +} + +static int mipi_csis_remove(struct platform_device *pdev) +{ + struct v4l2_subdev *mipi_sd = platform_get_drvdata(pdev); + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + + mipi_csis_debugfs_exit(state); + v4l2_async_unregister_subdev(&state->mipi_sd); + v4l2_async_notifier_unregister(&state->subdev_notifier); + + pm_runtime_disable(&pdev->dev); + mipi_csis_pm_suspend(&pdev->dev, true); + mipi_csis_clk_disable(state); + media_entity_cleanup(&state->mipi_sd.entity); + mutex_destroy(&state->lock); + pm_runtime_set_suspended(&pdev->dev); + + return 0; +} + +static const struct dev_pm_ops mipi_csis_pm_ops = { + SET_RUNTIME_PM_OPS(mipi_csis_runtime_suspend, mipi_csis_runtime_resume, + NULL) + SET_SYSTEM_SLEEP_PM_OPS(mipi_csis_suspend, mipi_csis_resume) +}; + +static const struct of_device_id mipi_csis_of_match[] = { + { .compatible = "fsl,imx7-mipi-csi2", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, mipi_csis_of_match); + +static struct platform_driver mipi_csis_driver = { + .probe = mipi_csis_probe, + .remove = mipi_csis_remove, + .driver = { + .of_match_table = mipi_csis_of_match, + .name = CSIS_DRIVER_NAME, + .pm = &mipi_csis_pm_ops, + }, +}; + +module_platform_driver(mipi_csis_driver); + +MODULE_DESCRIPTION("i.MX7 MIPI CSI-2 Receiver driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:imx7-mipi-csi2"); diff --git a/drivers/staging/media/imx074/Kconfig b/drivers/staging/media/imx074/Kconfig deleted file mode 100644 index 229cbeea580b..000000000000 --- a/drivers/staging/media/imx074/Kconfig +++ /dev/null @@ -1,5 +0,0 @@ -config SOC_CAMERA_IMX074 - tristate "imx074 support (DEPRECATED)" - depends on SOC_CAMERA && I2C - help - This driver supports IMX074 cameras from Sony diff --git a/drivers/staging/media/imx074/Makefile b/drivers/staging/media/imx074/Makefile deleted file mode 100644 index 7d183574aa84..000000000000 --- a/drivers/staging/media/imx074/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o diff --git a/drivers/staging/media/imx074/TODO b/drivers/staging/media/imx074/TODO deleted file mode 100644 index 15580a4f950c..000000000000 --- a/drivers/staging/media/imx074/TODO +++ /dev/null @@ -1,5 +0,0 @@ -This sensor driver needs to be converted to a regular -v4l2 subdev driver. The soc_camera framework is deprecated and -will be removed in the future. Unless someone does this work this -sensor driver will be deleted when the soc_camera framework is -deleted. diff --git a/drivers/staging/media/ipu3/Kconfig b/drivers/staging/media/ipu3/Kconfig new file mode 100644 index 000000000000..75cd889f18f7 --- /dev/null +++ b/drivers/staging/media/ipu3/Kconfig @@ -0,0 +1,14 @@ +config VIDEO_IPU3_IMGU + tristate "Intel ipu3-imgu driver" + depends on PCI && VIDEO_V4L2 + depends on MEDIA_CONTROLLER && VIDEO_V4L2_SUBDEV_API + depends on X86 + select IOMMU_IOVA + select VIDEOBUF2_DMA_SG + ---help--- + This is the Video4Linux2 driver for Intel IPU3 image processing unit, + found in Intel Skylake and Kaby Lake SoCs and used for processing + images and video. + + Say Y or M here if you have a Skylake/Kaby Lake SoC with a MIPI + camera. The module will be called ipu3-imgu. diff --git a/drivers/staging/media/ipu3/Makefile b/drivers/staging/media/ipu3/Makefile new file mode 100644 index 000000000000..fa7fa3372bcb --- /dev/null +++ b/drivers/staging/media/ipu3/Makefile @@ -0,0 +1,17 @@ +# +# Makefile for the IPU3 ImgU drivers +# + +ipu3-imgu-objs += \ + ipu3-mmu.o ipu3-dmamap.o \ + ipu3-tables.o ipu3-css-pool.o \ + ipu3-css-fw.o ipu3-css-params.o \ + ipu3-css.o ipu3-v4l2.o ipu3.o + +obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3-imgu.o + +# HACK! While this driver is in bad shape, don't enable several warnings +# that would be otherwise enabled with W=1 +ccflags-y += $(call cc-disable-warning, packed-not-aligned) +ccflags-y += $(call cc-disable-warning, type-limits) +ccflags-y += $(call cc-disable-warning, unused-const-variable) diff --git a/drivers/staging/media/ipu3/TODO b/drivers/staging/media/ipu3/TODO new file mode 100644 index 000000000000..5e55baeaea1a --- /dev/null +++ b/drivers/staging/media/ipu3/TODO @@ -0,0 +1,31 @@ +This is a list of things that need to be done to get this driver out of the +staging directory. + +- Request API conversion. Remove of the dual pipeline and associate buffers + as well as formats and the binary used to a request. Remove the + opportunistic buffer management. (Sakari) + +- Using ENABLED and IMMUTABLE link flags for the links where those are + relevant. (Sakari) + +- IPU3 driver documentation (Laurent) + Add diagram in driver rst to describe output capability. + Comments on configuring v4l2 subdevs for CIO2 and ImgU. + +- uAPI documentation: + Further clarification on some ambiguities such as data type conversion of + IEFD CU inputs. (Sakari) + Move acronyms to doc-rst file. (Mauro) + +- Switch to yavta from v4l2n in driver docs. + +- Elaborate the functionality of different selection rectangles in driver + documentation. This may require driver changes as well. + +- More detailed documentation on calculating BDS, GCD etc. sizes needed. + +- Document different operation modes, and which buffer queues are relevant + in each mode. To process an image, which queues require a buffer an in + which ones is it optional? + +- Make sure it builds fine with no warnings with W=1 diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h new file mode 100644 index 000000000000..1e7184e4311d --- /dev/null +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h @@ -0,0 +1,2779 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2017 - 2018 Intel Corporation */ + +#ifndef __IPU3_UAPI_H +#define __IPU3_UAPI_H + +#include <linux/types.h> + +/* from /drivers/staging/media/ipu3/include/videodev2.h */ + +/* Vendor specific - used for IPU3 camera sub-system */ +#define V4L2_META_FMT_IPU3_PARAMS v4l2_fourcc('i', 'p', '3', 'p') /* IPU3 processing parameters */ +#define V4L2_META_FMT_IPU3_STAT_3A v4l2_fourcc('i', 'p', '3', 's') /* IPU3 3A statistics */ + +/* from include/uapi/linux/v4l2-controls.h */ +#define V4L2_CID_INTEL_IPU3_BASE (V4L2_CID_USER_BASE + 0x10c0) +#define V4L2_CID_INTEL_IPU3_MODE (V4L2_CID_INTEL_IPU3_BASE + 1) + +/******************* ipu3_uapi_stats_3a *******************/ + +#define IPU3_UAPI_MAX_STRIPES 2 +#define IPU3_UAPI_MAX_BUBBLE_SIZE 10 + +#define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1) +#define IPU3_UAPI_GRID_Y_START_EN (1 << 15) + +/* controls generation of meta_data (like FF enable/disable) */ +#define IPU3_UAPI_AWB_RGBS_THR_B_EN (1 << 14) +#define IPU3_UAPI_AWB_RGBS_THR_B_INCL_SAT (1 << 15) + +/** + * struct ipu3_uapi_grid_config - Grid plane config + * + * @width: Grid horizontal dimensions, in number of grid blocks(cells). + * @height: Grid vertical dimensions, in number of grid cells. + * @block_width_log2: Log2 of the width of each cell in pixels. + * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. + * @block_height_log2: Log2 of the height of each cell in pixels. + * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. + * @height_per_slice: The number of blocks in vertical axis per slice. + * Default 2. + * @x_start: X value of top left corner of Region of Interest(ROI). + * @y_start: Y value of top left corner of ROI + * @x_end: X value of bottom right corner of ROI + * @y_end: Y value of bottom right corner of ROI + * + * Due to the size of total amount of collected data, most statistics + * create a grid-based output, and the data is then divided into "slices". + */ +struct ipu3_uapi_grid_config { + __u8 width; + __u8 height; + __u16 block_width_log2:3; + __u16 block_height_log2:3; + __u16 height_per_slice:8; + __u16 x_start; + __u16 y_start; + __u16 x_end; + __u16 y_end; +} __packed; + +/* + * The grid based data is divided into "slices" called set, each slice of setX + * refers to ipu3_uapi_grid_config width * height_per_slice. + */ +#define IPU3_UAPI_AWB_MAX_SETS 60 +/* Based on grid size 80 * 60 and cell size 16 x 16 */ +#define IPU3_UAPI_AWB_SET_SIZE 1280 +#define IPU3_UAPI_AWB_MD_ITEM_SIZE 8 +#define IPU3_UAPI_AWB_SPARE_FOR_BUBBLES \ + (IPU3_UAPI_MAX_BUBBLE_SIZE * IPU3_UAPI_MAX_STRIPES * \ + IPU3_UAPI_AWB_MD_ITEM_SIZE) +#define IPU3_UAPI_AWB_MAX_BUFFER_SIZE \ + (IPU3_UAPI_AWB_MAX_SETS * \ + (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) + + +/** + * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer + * + * @meta_data: buffer to hold auto white balance meta data which is + * the average values for each color channel. + */ +struct ipu3_uapi_awb_raw_buffer { + __u8 meta_data[IPU3_UAPI_AWB_MAX_BUFFER_SIZE] + __attribute__((aligned(32))); +} __packed; + +/** + * struct ipu3_uapi_awb_config_s - AWB config + * + * @rgbs_thr_gr: gr threshold value. + * @rgbs_thr_r: Red threshold value. + * @rgbs_thr_gb: gb threshold value. + * @rgbs_thr_b: Blue threshold value. + * @grid: &ipu3_uapi_grid_config, the default grid resolution is 16x16 cells. + * + * The threshold is a saturation measure range [0, 8191], 8191 is default. + * Values over threshold may be optionally rejected for averaging. + */ +struct ipu3_uapi_awb_config_s { + __u16 rgbs_thr_gr; + __u16 rgbs_thr_r; + __u16 rgbs_thr_gb; + __u16 rgbs_thr_b; + struct ipu3_uapi_grid_config grid; +} __attribute__((aligned(32))) __packed; + +/** + * struct ipu3_uapi_awb_config - AWB config wrapper + * + * @config: config for auto white balance as defined by &ipu3_uapi_awb_config_s + */ +struct ipu3_uapi_awb_config { + struct ipu3_uapi_awb_config_s config __attribute__((aligned(32))); +} __packed; + +#define IPU3_UAPI_AE_COLORS 4 /* R, G, B, Y */ +#define IPU3_UAPI_AE_BINS 256 +#define IPU3_UAPI_AE_WEIGHTS 96 + +/** + + * struct ipu3_uapi_ae_raw_buffer - AE global weighted histogram + + * + + * @vals: Sum of IPU3_UAPI_AE_COLORS in cell + + * + + * Each histogram contains IPU3_UAPI_AE_BINS bins. Each bin has 24 bit unsigned + + * for counting the number of the pixel. + + */ +struct ipu3_uapi_ae_raw_buffer { + __u32 vals[IPU3_UAPI_AE_BINS * IPU3_UAPI_AE_COLORS]; +} __packed; + +/** + * struct ipu3_uapi_ae_raw_buffer_aligned - AE raw buffer + * + * @buff: &ipu3_uapi_ae_raw_buffer to hold full frame meta data. + */ +struct ipu3_uapi_ae_raw_buffer_aligned { + struct ipu3_uapi_ae_raw_buffer buff __attribute__((aligned(32))); +} __packed; + +/** + * struct ipu3_uapi_ae_grid_config - AE weight grid + * + * @width: Grid horizontal dimensions. Value: [16, 32], default 16. + * @height: Grid vertical dimensions. Value: [16, 24], default 16. + * @block_width_log2: Log2 of the width of the grid cell, value: [3, 7]. + * @block_height_log2: Log2 of the height of the grid cell, value: [3, 7]. + * default is 3 (cell size 8x8), 4 cell per grid. + * @reserved0: reserved + * @ae_en: 0: does not write to &ipu3_uapi_ae_raw_buffer_aligned array, + * 1: write normally. + * @rst_hist_array: write 1 to trigger histogram array reset. + * @done_rst_hist_array: flag for histogram array reset done. + * @x_start: X value of top left corner of ROI, default 0. + * @y_start: Y value of top left corner of ROI, default 0. + * @x_end: X value of bottom right corner of ROI + * @y_end: Y value of bottom right corner of ROI + * + * The AE block accumulates 4 global weighted histograms(R, G, B, Y) over + * a defined ROI within the frame. The contribution of each pixel into the + * histogram, defined by &ipu3_uapi_ae_weight_elem LUT, is indexed by a grid. + */ +struct ipu3_uapi_ae_grid_config { + __u8 width; + __u8 height; + __u8 block_width_log2:4; + __u8 block_height_log2:4; + __u8 reserved0:5; + __u8 ae_en:1; + __u8 rst_hist_array:1; + __u8 done_rst_hist_array:1; + __u16 x_start; + __u16 y_start; + __u16 x_end; + __u16 y_end; +} __packed; + +/** + * struct ipu3_uapi_ae_weight_elem - AE weights LUT + * + * @cell0: weighted histogram grid value. + * @cell1: weighted histogram grid value. + * @cell2: weighted histogram grid value. + * @cell3: weighted histogram grid value. + * @cell4: weighted histogram grid value. + * @cell5: weighted histogram grid value. + * @cell6: weighted histogram grid value. + * @cell7: weighted histogram grid value. + * + * Use weighted grid value to give a different contribution factor to each cell. + * Precision u4, range [0, 15]. + */ +struct ipu3_uapi_ae_weight_elem { + __u32 cell0:4; + __u32 cell1:4; + __u32 cell2:4; + __u32 cell3:4; + __u32 cell4:4; + __u32 cell5:4; + __u32 cell6:4; + __u32 cell7:4; +} __packed; + +/** + * struct ipu3_uapi_ae_ccm - AE coefficients for WB and CCM + * + * @gain_gr: WB gain factor for the gr channels. Default 256. + * @gain_r: WB gain factor for the r channel. Default 256. + * @gain_b: WB gain factor for the b channel. Default 256. + * @gain_gb: WB gain factor for the gb channels. Default 256. + * @mat: 4x4 matrix that transforms Bayer quad output from WB to RGB+Y. + * + * Default: + * 128, 0, 0, 0, + * 0, 128, 0, 0, + * 0, 0, 128, 0, + * 0, 0, 0, 128, + * + * As part of the raw frame pre-process stage, the WB and color conversion need + * to be applied to expose the impact of these gain operations. + */ +struct ipu3_uapi_ae_ccm { + __u16 gain_gr; + __u16 gain_r; + __u16 gain_b; + __u16 gain_gb; + __s16 mat[16]; +} __packed; + +/** + * struct ipu3_uapi_ae_config - AE config + * + * @grid_cfg: config for auto exposure statistics grid. See struct + * &ipu3_uapi_ae_grid_config + * @weights: &IPU3_UAPI_AE_WEIGHTS is based on 32x24 blocks in the grid. + * Each grid cell has a corresponding value in weights LUT called + * grid value, global histogram is updated based on grid value and + * pixel value. + * @ae_ccm: Color convert matrix pre-processing block. + * + * Calculate AE grid from image resolution, resample ae weights. + */ +struct ipu3_uapi_ae_config { + struct ipu3_uapi_ae_grid_config grid_cfg __attribute__((aligned(32))); + struct ipu3_uapi_ae_weight_elem weights[ + IPU3_UAPI_AE_WEIGHTS] __attribute__((aligned(32))); + struct ipu3_uapi_ae_ccm ae_ccm __attribute__((aligned(32))); +} __packed; + +/** + * struct ipu3_uapi_af_filter_config - AF 2D filter for contrast measurements + * + * @y1_coeff_0: filter Y1, structure: 3x11, support both symmetry and + * anti-symmetry type. A12 is center, A1-A11 are neighbours. + * for analyzing low frequency content, used to calculate sum + * of gradients in x direction. + * @y1_coeff_0.a1: filter1 coefficients A1, u8, default 0. + * @y1_coeff_0.a2: filter1 coefficients A2, u8, default 0. + * @y1_coeff_0.a3: filter1 coefficients A3, u8, default 0. + * @y1_coeff_0.a4: filter1 coefficients A4, u8, default 0. + * @y1_coeff_1: Struct + * @y1_coeff_1.a5: filter1 coefficients A5, u8, default 0. + * @y1_coeff_1.a6: filter1 coefficients A6, u8, default 0. + * @y1_coeff_1.a7: filter1 coefficients A7, u8, default 0. + * @y1_coeff_1.a8: filter1 coefficients A8, u8, default 0. + * @y1_coeff_2: Struct + * @y1_coeff_2.a9: filter1 coefficients A9, u8, default 0. + * @y1_coeff_2.a10: filter1 coefficients A10, u8, default 0. + * @y1_coeff_2.a11: filter1 coefficients A11, u8, default 0. + * @y1_coeff_2.a12: filter1 coefficients A12, u8, default 128. + * @y1_sign_vec: Each bit corresponds to one coefficient sign bit, + * 0: positive, 1: negative, default 0. + * @y2_coeff_0: Y2, same structure as Y1. For analyzing high frequency content. + * @y2_coeff_0.a1: filter2 coefficients A1, u8, default 0. + * @y2_coeff_0.a2: filter2 coefficients A2, u8, default 0. + * @y2_coeff_0.a3: filter2 coefficients A3, u8, default 0. + * @y2_coeff_0.a4: filter2 coefficients A4, u8, default 0. + * @y2_coeff_1: Struct + * @y2_coeff_1.a5: filter2 coefficients A5, u8, default 0. + * @y2_coeff_1.a6: filter2 coefficients A6, u8, default 0. + * @y2_coeff_1.a7: filter2 coefficients A7, u8, default 0. + * @y2_coeff_1.a8: filter2 coefficients A8, u8, default 0. + * @y2_coeff_2: Struct + * @y2_coeff_2.a9: filter1 coefficients A9, u8, default 0. + * @y2_coeff_2.a10: filter1 coefficients A10, u8, default 0. + * @y2_coeff_2.a11: filter1 coefficients A11, u8, default 0. + * @y2_coeff_2.a12: filter1 coefficients A12, u8, default 128. + * @y2_sign_vec: Each bit corresponds to one coefficient sign bit, + * 0: positive, 1: negative, default 0. + * @y_calc: Pre-processing that converts Bayer quad to RGB+Y values to be + * used for building histogram. Range [0, 32], default 8. + * Rule: + * y_gen_rate_gr + y_gen_rate_r + y_gen_rate_b + y_gen_rate_gb = 32 + * A single Y is calculated based on sum of Gr/R/B/Gb based on + * their contribution ratio. + * @y_calc.y_gen_rate_gr: Contribution ratio Gr for Y + * @y_calc.y_gen_rate_r: Contribution ratio R for Y + * @y_calc.y_gen_rate_b: Contribution ratio B for Y + * @y_calc.y_gen_rate_gb: Contribution ratio Gb for Y + * @nf: The shift right value that should be applied during the Y1/Y2 filter to + * make sure the total memory needed is 2 bytes per grid cell. + * @nf.reserved0: reserved + * @nf.y1_nf: Normalization factor for the convolution coeffs of y1, + * should be log2 of the sum of the abs values of the filter + * coeffs, default 7 (2^7 = 128). + * @nf.reserved1: reserved + * @nf.y2_nf: Normalization factor for y2, should be log2 of the sum of the + * abs values of the filter coeffs. + * @nf.reserved2: reserved + */ +struct ipu3_uapi_af_filter_config { + struct { + __u8 a1; + __u8 a2; + __u8 a3; + __u8 a4; + } y1_coeff_0; + struct { + __u8 a5; + __u8 a6; + __u8 a7; + __u8 a8; + } y1_coeff_1; + struct { + __u8 a9; + __u8 a10; + __u8 a11; + __u8 a12; + } y1_coeff_2; + + __u32 y1_sign_vec; + + struct { + __u8 a1; + __u8 a2; + __u8 a3; + __u8 a4; + } y2_coeff_0; + struct { + __u8 a5; + __u8 a6; + __u8 a7; + __u8 a8; + } y2_coeff_1; + struct { + __u8 a9; + __u8 a10; + __u8 a11; + __u8 a12; + } y2_coeff_2; + + __u32 y2_sign_vec; + + struct { + __u8 y_gen_rate_gr; + __u8 y_gen_rate_r; + __u8 y_gen_rate_b; + __u8 y_gen_rate_gb; + } y_calc; + + struct { + __u32 reserved0:8; + __u32 y1_nf:4; + __u32 reserved1:4; + __u32 y2_nf:4; + __u32 reserved2:12; + } nf; +} __packed; + +#define IPU3_UAPI_AF_MAX_SETS 24 +#define IPU3_UAPI_AF_MD_ITEM_SIZE 4 +#define IPU3_UAPI_AF_SPARE_FOR_BUBBLES \ + (IPU3_UAPI_MAX_BUBBLE_SIZE * IPU3_UAPI_MAX_STRIPES * \ + IPU3_UAPI_AF_MD_ITEM_SIZE) +#define IPU3_UAPI_AF_Y_TABLE_SET_SIZE 128 +#define IPU3_UAPI_AF_Y_TABLE_MAX_SIZE \ + (IPU3_UAPI_AF_MAX_SETS * \ + (IPU3_UAPI_AF_Y_TABLE_SET_SIZE + IPU3_UAPI_AF_SPARE_FOR_BUBBLES) * \ + IPU3_UAPI_MAX_STRIPES) + +/** + * struct ipu3_uapi_af_raw_buffer - AF meta data + * + * @y_table: Each color component will be convolved separately with filter1 + * and filter2 and the result will be summed out and averaged for + * each cell. + */ +struct ipu3_uapi_af_raw_buffer { + __u8 y_table[IPU3_UAPI_AF_Y_TABLE_MAX_SIZE] __attribute__((aligned(32))); +} __packed; + +/** + * struct ipu3_uapi_af_config_s - AF config + * + * @filter_config: AF uses Y1 and Y2 filters as configured in + * &ipu3_uapi_af_filter_config + * @padding: paddings + * @grid_cfg: See &ipu3_uapi_grid_config, default resolution 16x16. Use large + * grid size for large image and vice versa. + */ +struct ipu3_uapi_af_config_s { + struct ipu3_uapi_af_filter_config filter_config __attribute__((aligned(32))); + __u8 padding[4]; + struct ipu3_uapi_grid_config grid_cfg __attribute__((aligned(32))); +} __packed; + +#define IPU3_UAPI_AWB_FR_MAX_SETS 24 +#define IPU3_UAPI_AWB_FR_MD_ITEM_SIZE 8 +#define IPU3_UAPI_AWB_FR_BAYER_TBL_SIZE 256 +#define IPU3_UAPI_AWB_FR_SPARE_FOR_BUBBLES \ + (IPU3_UAPI_MAX_BUBBLE_SIZE * IPU3_UAPI_MAX_STRIPES * \ + IPU3_UAPI_AWB_FR_MD_ITEM_SIZE) +#define IPU3_UAPI_AWB_FR_BAYER_TABLE_MAX_SIZE \ + (IPU3_UAPI_AWB_FR_MAX_SETS * \ + (IPU3_UAPI_AWB_FR_BAYER_TBL_SIZE + \ + IPU3_UAPI_AWB_FR_SPARE_FOR_BUBBLES) * IPU3_UAPI_MAX_STRIPES) + +/** + * struct ipu3_uapi_awb_fr_meta_data - AWB filter response meta data + * + * @meta_data: Statistics output on the grid after convolving with 1D filter. + */ +struct ipu3_uapi_awb_fr_raw_buffer { + __u8 meta_data[IPU3_UAPI_AWB_FR_BAYER_TABLE_MAX_SIZE] + __attribute__((aligned(32))); +} __packed; + +/** + * struct ipu3_uapi_awb_fr_config_s - AWB filter response config + * + * @grid_cfg: grid config, default 16x16. + * @bayer_coeff: 1D Filter 1x11 center symmetry/anti-symmetry. + * coefficients defaults { 0, 0, 0, 0, 0, 128 }. + * Applied on whole image for each Bayer channel separately + * by a weighted sum of its 11x1 neighbors. + * @reserved1: reserved + * @bayer_sign: sign of filter coefficients, default 0. + * @bayer_nf: normalization factor for the convolution coeffs, to make sure + * total memory needed is within pre-determined range. + * NF should be the log2 of the sum of the abs values of the + * filter coeffs, range [7, 14], default 7. + * @reserved2: reserved + */ +struct ipu3_uapi_awb_fr_config_s { + struct ipu3_uapi_grid_config grid_cfg; + __u8 bayer_coeff[6]; + __u16 reserved1; + __u32 bayer_sign; + __u8 bayer_nf; + __u8 reserved2[3]; +} __attribute__((aligned(32))) __packed; + +/** + * struct ipu3_uapi_4a_config - 4A config + * + * @awb_config: &ipu3_uapi_awb_config_s, default resolution 16x16 + * @ae_grd_config: auto exposure statistics &ipu3_uapi_ae_grid_config + * @padding: paddings + * @af_config: auto focus config &ipu3_uapi_af_config_s + * @awb_fr_config: &ipu3_uapi_awb_fr_config_s, default resolution 16x16 + */ +struct ipu3_uapi_4a_config { + struct ipu3_uapi_awb_config_s awb_config __attribute__((aligned(32))); + struct ipu3_uapi_ae_grid_config ae_grd_config; + __u8 padding[20]; + struct ipu3_uapi_af_config_s af_config; + struct ipu3_uapi_awb_fr_config_s awb_fr_config; +} __packed; + +/** + * struct ipu3_uapi_bubble_info - Bubble info for host side debugging + * + * @num_of_stripes: A single frame is divided into several parts called stripes + * due to limitation on line buffer memory. + * The separation between the stripes is vertical. Each such + * stripe is processed as a single frame by the ISP pipe. + * @padding: padding bytes. + * @num_sets: number of sets. + * @padding1: padding bytes. + * @size_of_set: set size. + * @padding2: padding bytes. + * @bubble_size: is the amount of padding in the bubble expressed in "sets". + * @padding3: padding bytes. + */ +struct ipu3_uapi_bubble_info { + __u32 num_of_stripes __attribute__((aligned(32))); + __u8 padding[28]; + __u32 num_sets; + __u8 padding1[28]; + __u32 size_of_set; + __u8 padding2[28]; + __u32 bubble_size; + __u8 padding3[28]; +} __packed; + +/* + * struct ipu3_uapi_stats_3a_bubble_info_per_stripe + */ +struct ipu3_uapi_stats_3a_bubble_info_per_stripe { + struct ipu3_uapi_bubble_info awb[IPU3_UAPI_MAX_STRIPES]; + struct ipu3_uapi_bubble_info af[IPU3_UAPI_MAX_STRIPES]; + struct ipu3_uapi_bubble_info awb_fr[IPU3_UAPI_MAX_STRIPES]; +} __packed; + +/** + * struct ipu3_uapi_ff_status - Enable bits for each 3A fixed function + * + * @awb_en: auto white balance enable + * @padding: padding config + * @ae_en: auto exposure enable + * @padding1: padding config + * @af_en: auto focus enable + * @padding2: padding config + * @awb_fr_en: awb filter response enable bit + * @padding3: padding config + */ +struct ipu3_uapi_ff_status { + __u32 awb_en __attribute__((aligned(32))); + __u8 padding[28]; + __u32 ae_en; + __u8 padding1[28]; + __u32 af_en; + __u8 padding2[28]; + __u32 awb_fr_en; + __u8 padding3[28]; +} __packed; + +/** + * struct ipu3_uapi_stats_3a - 3A statistics + * + * @awb_raw_buffer: auto white balance meta data &ipu3_uapi_awb_raw_buffer + * @ae_raw_buffer: auto exposure raw data &ipu3_uapi_ae_raw_buffer_aligned + * @af_raw_buffer: &ipu3_uapi_af_raw_buffer for auto focus meta data + * @awb_fr_raw_buffer: value as specified by &ipu3_uapi_awb_fr_raw_buffer + * @stats_4a_config: 4a statistics config as defined by &ipu3_uapi_4a_config. + * @ae_join_buffers: 1 to use ae_raw_buffer. + * @padding: padding config + * @stats_3a_bubble_per_stripe: a &ipu3_uapi_stats_3a_bubble_info_per_stripe + * @stats_3a_status: 3a statistics status set in &ipu3_uapi_ff_status + */ +struct ipu3_uapi_stats_3a { + struct ipu3_uapi_awb_raw_buffer awb_raw_buffer; + struct ipu3_uapi_ae_raw_buffer_aligned + ae_raw_buffer[IPU3_UAPI_MAX_STRIPES]; + struct ipu3_uapi_af_raw_buffer af_raw_buffer; + struct ipu3_uapi_awb_fr_raw_buffer awb_fr_raw_buffer; + struct ipu3_uapi_4a_config stats_4a_config; + __u32 ae_join_buffers; + __u8 padding[28]; + struct ipu3_uapi_stats_3a_bubble_info_per_stripe + stats_3a_bubble_per_stripe; + struct ipu3_uapi_ff_status stats_3a_status; +} __packed; + +/******************* ipu3_uapi_acc_param *******************/ + +#define IPU3_UAPI_ISP_VEC_ELEMS 64 +#define IPU3_UAPI_ISP_TNR3_VMEM_LEN 9 + +#define IPU3_UAPI_BNR_LUT_SIZE 32 + +/* number of elements in gamma correction LUT */ +#define IPU3_UAPI_GAMMA_CORR_LUT_ENTRIES 256 + +/* largest grid is 73x56, for grid_height_per_slice of 2, 73x2 = 146 */ +#define IPU3_UAPI_SHD_MAX_CELLS_PER_SET 146 +#define IPU3_UAPI_SHD_MAX_CFG_SETS 28 +/* Normalization shift aka nf */ +#define IPU3_UAPI_SHD_BLGR_NF_SHIFT 13 +#define IPU3_UAPI_SHD_BLGR_NF_MASK 7 + +#define IPU3_UAPI_YUVP2_TCC_MACC_TABLE_ELEMENTS 16 +#define IPU3_UAPI_YUVP2_TCC_INV_Y_LUT_ELEMENTS 14 +#define IPU3_UAPI_YUVP2_TCC_GAIN_PCWL_LUT_ELEMENTS 258 +#define IPU3_UAPI_YUVP2_TCC_R_SQR_LUT_ELEMENTS 24 + +#define IPU3_UAPI_ANR_LUT_SIZE 26 +#define IPU3_UAPI_ANR_PYRAMID_SIZE 22 + +#define IPU3_UAPI_LIN_LUT_SIZE 64 + +/* Bayer Noise Reduction related structs */ + +/** + * struct ipu3_uapi_bnr_static_config_wb_gains_config - White balance gains + * + * @gr: white balance gain for Gr channel. + * @r: white balance gain for R channel. + * @b: white balance gain for B channel. + * @gb: white balance gain for Gb channel. + * + * Precision u3.13, range [0, 8). White balance correction is done by applying + * a multiplicative gain to each color channels prior to BNR. + */ +struct ipu3_uapi_bnr_static_config_wb_gains_config { + __u16 gr; + __u16 r; + __u16 b; + __u16 gb; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config_wb_gains_thr_config - Threshold config + * + * @gr: white balance threshold gain for Gr channel. + * @r: white balance threshold gain for R channel. + * @b: white balance threshold gain for B channel. + * @gb: white balance threshold gain for Gb channel. + * + * Defines the threshold that specifies how different a defect pixel can be from + * its neighbors.(used by dynamic defect pixel correction sub block) + * Precision u4.4 range [0, 8]. + */ +struct ipu3_uapi_bnr_static_config_wb_gains_thr_config { + __u8 gr; + __u8 r; + __u8 b; + __u8 gb; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config_thr_coeffs_config - Noise model + * coefficients that controls noise threshold + * + * @cf: Free coefficient for threshold calculation, range [0, 8191], default 0. + * @reserved0: reserved + * @cg: Gain coefficient for threshold calculation, [0, 31], default 8. + * @ci: Intensity coefficient for threshold calculation. range [0, 0x1f] + * default 6. + * format: u3.2 (3 most significant bits represent whole number, + * 2 least significant bits represent the fractional part + * with each count representing 0.25) + * e.g. 6 in binary format is 00110, that translates to 1.5 + * @reserved1: reserved + * @r_nf: Normalization shift value for r^2 calculation, range [12, 20] + * where r is a radius of pixel [row, col] from centor of sensor. + * default 14. + * + * Threshold used to distinguish between noise and details. + */ +struct ipu3_uapi_bnr_static_config_thr_coeffs_config { + __u32 cf:13; + __u32 reserved0:3; + __u32 cg:5; + __u32 ci:5; + __u32 reserved1:1; + __u32 r_nf:5; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config_thr_ctrl_shd_config - Shading config + * + * @gr: Coefficient defines lens shading gain approximation for gr channel + * @r: Coefficient defines lens shading gain approximation for r channel + * @b: Coefficient defines lens shading gain approximation for b channel + * @gb: Coefficient defines lens shading gain approximation for gb channel + * + * Parameters for noise model (NM) adaptation of BNR due to shading correction. + * All above have precision of u3.3, default to 0. + */ +struct ipu3_uapi_bnr_static_config_thr_ctrl_shd_config { + __u8 gr; + __u8 r; + __u8 b; + __u8 gb; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config_opt_center_config - Optical center config + * + * @x_reset: Reset value of X (col start - X center). Precision s12.0. + * @reserved0: reserved + * @y_reset: Reset value of Y (row start - Y center). Precision s12.0. + * @reserved2: reserved + * + * Distance from corner to optical center for NM adaptation due to shading + * correction (should be calculated based on shading tables) + */ +struct ipu3_uapi_bnr_static_config_opt_center_config { + __s32 x_reset:13; + __u32 reserved0:3; + __s32 y_reset:13; + __u32 reserved2:3; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config_lut_config - BNR square root lookup table + * + * @values: pre-calculated values of square root function. + * + * LUT implementation of square root operation. + */ +struct ipu3_uapi_bnr_static_config_lut_config { + __u8 values[IPU3_UAPI_BNR_LUT_SIZE]; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config_bp_ctrl_config - Detect bad pixels (bp) + * + * @bp_thr_gain: Defines the threshold that specifies how different a + * defect pixel can be from its neighbors. Threshold is + * dependent on de-noise threshold calculated by algorithm. + * Range [4, 31], default 4. + * @reserved0: reserved + * @defect_mode: Mode of addressed defect pixels, + * 0 - single defect pixel is expected, + * 1 - 2 adjacent defect pixels are expected, default 1. + * @bp_gain: Defines how 2nd derivation that passes through a defect pixel + * is different from 2nd derivations that pass through + * neighbor pixels. u4.2, range [0, 256], default 8. + * @reserved1: reserved + * @w0_coeff: Blending coefficient of defect pixel correction. + * Precision u4, range [0, 8], default 8. + * @reserved2: reserved + * @w1_coeff: Enable influence of incorrect defect pixel correction to be + * avoided. Precision u4, range [1, 8], default 8. + * @reserved3: reserved + */ +struct ipu3_uapi_bnr_static_config_bp_ctrl_config { + __u32 bp_thr_gain:5; + __u32 reserved0:2; + __u32 defect_mode:1; + __u32 bp_gain:6; + __u32 reserved1:18; + __u32 w0_coeff:4; + __u32 reserved2:4; + __u32 w1_coeff:4; + __u32 reserved3:20; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config_dn_detect_ctrl_config - Denoising config + * + * @alpha: Weight of central element of smoothing filter. + * @beta: Weight of peripheral elements of smoothing filter, default 4. + * @gamma: Weight of diagonal elements of smoothing filter, default 4. + * + * beta and gamma parameter define the strength of the noise removal filter. + * All above has precision u0.4, range [0, 0xf] + * format: u0.4 (no / zero bits represent whole number, + * 4 bits represent the fractional part + * with each count representing 0.0625) + * e.g. 0xf translates to 0.0625x15 = 0.9375 + * + * @reserved0: reserved + * @max_inf: Maximum increase of peripheral or diagonal element influence + * relative to the pre-defined value range: [0x5, 0xa] + * @reserved1: reserved + * @gd_enable: Green disparity enable control, 0 - disable, 1 - enable. + * @bpc_enable: Bad pixel correction enable control, 0 - disable, 1 - enable. + * @bnr_enable: Bayer noise removal enable control, 0 - disable, 1 - enable. + * @ff_enable: Fixed function enable, 0 - disable, 1 - enable. + * @reserved2: reserved + */ +struct ipu3_uapi_bnr_static_config_dn_detect_ctrl_config { + __u32 alpha:4; + __u32 beta:4; + __u32 gamma:4; + __u32 reserved0:4; + __u32 max_inf:4; + __u32 reserved1:7; + __u32 gd_enable:1; + __u32 bpc_enable:1; + __u32 bnr_enable:1; + __u32 ff_enable:1; + __u32 reserved2:1; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config_opt_center_sqr_config - BNR optical square + * + * @x_sqr_reset: Reset value of X^2. + * @y_sqr_reset: Reset value of Y^2. + * + * Please note: + * + * #. X and Y ref to + * &ipu3_uapi_bnr_static_config_opt_center_config + * #. Both structs are used in threshold formula to calculate r^2, where r + * is a radius of pixel [row, col] from centor of sensor. + */ +struct ipu3_uapi_bnr_static_config_opt_center_sqr_config { + __u32 x_sqr_reset; + __u32 y_sqr_reset; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config - BNR static config + * + * @wb_gains: white balance gains &ipu3_uapi_bnr_static_config_wb_gains_config + * @wb_gains_thr: white balance gains threshold as defined by + * &ipu3_uapi_bnr_static_config_wb_gains_thr_config + * @thr_coeffs: coefficients of threshold + * &ipu3_uapi_bnr_static_config_thr_coeffs_config + * @thr_ctrl_shd: control of shading threshold + * &ipu3_uapi_bnr_static_config_thr_ctrl_shd_config + * @opt_center: optical center &ipu3_uapi_bnr_static_config_opt_center_config + * + * Above parameters and opt_center_sqr are used for white balance and shading. + * + * @lut: lookup table &ipu3_uapi_bnr_static_config_lut_config + * @bp_ctrl: detect and remove bad pixels as defined in struct + * &ipu3_uapi_bnr_static_config_bp_ctrl_config + * @dn_detect_ctrl: detect and remove noise. + * &ipu3_uapi_bnr_static_config_dn_detect_ctrl_config + * @column_size: The number of pixels in column. + * @opt_center_sqr: Reset value of r^2 to optical center, see + * &ipu3_uapi_bnr_static_config_opt_center_sqr_config. + */ +struct ipu3_uapi_bnr_static_config { + struct ipu3_uapi_bnr_static_config_wb_gains_config wb_gains; + struct ipu3_uapi_bnr_static_config_wb_gains_thr_config wb_gains_thr; + struct ipu3_uapi_bnr_static_config_thr_coeffs_config thr_coeffs; + struct ipu3_uapi_bnr_static_config_thr_ctrl_shd_config thr_ctrl_shd; + struct ipu3_uapi_bnr_static_config_opt_center_config opt_center; + struct ipu3_uapi_bnr_static_config_lut_config lut; + struct ipu3_uapi_bnr_static_config_bp_ctrl_config bp_ctrl; + struct ipu3_uapi_bnr_static_config_dn_detect_ctrl_config dn_detect_ctrl; + __u32 column_size; + struct ipu3_uapi_bnr_static_config_opt_center_sqr_config opt_center_sqr; +} __packed; + +/** + * struct ipu3_uapi_bnr_static_config_green_disparity - Correct green disparity + * + * @gd_red: Shading gain coeff for gr disparity level in bright red region. + * Precision u0.6, default 4(0.0625). + * @reserved0: reserved + * @gd_green: Shading gain coeff for gr disparity level in bright green + * region. Precision u0.6, default 4(0.0625). + * @reserved1: reserved + * @gd_blue: Shading gain coeff for gr disparity level in bright blue region. + * Precision u0.6, default 4(0.0625). + * @reserved2: reserved + * @gd_black: Maximal green disparity level in dark region (stronger disparity + * assumed to be image detail). Precision u14, default 80. + * @reserved3: reserved + * @gd_shading: Change maximal green disparity level according to square + * distance from image center. + * @reserved4: reserved + * @gd_support: Lower bound for the number of second green color pixels in + * current pixel neighborhood with less than threshold difference + * from it. + * + * The shading gain coeff of red, green, blue and black are used to calculate + * threshold given a pixel's color value and its coordinates in the image. + * + * @reserved5: reserved + * @gd_clip: Turn green disparity clip on/off, [0, 1], default 1. + * @gd_central_weight: Central pixel weight in 9 pixels weighted sum. + */ +struct ipu3_uapi_bnr_static_config_green_disparity { + __u32 gd_red:6; + __u32 reserved0:2; + __u32 gd_green:6; + __u32 reserved1:2; + __u32 gd_blue:6; + __u32 reserved2:10; + __u32 gd_black:14; + __u32 reserved3:2; + __u32 gd_shading:7; + __u32 reserved4:1; + __u32 gd_support:2; + __u32 reserved5:1; + __u32 gd_clip:1; + __u32 gd_central_weight:4; +} __packed; + +/** + * struct ipu3_uapi_dm_config - De-mosaic parameters + * + * @dm_en: de-mosaic enable. + * @ch_ar_en: Checker artifacts removal enable flag. Default 0. + * @fcc_en: False color correction (FCC) enable flag. Default 0. + * @reserved0: reserved + * @frame_width: do not care + * @gamma_sc: Sharpening coefficient (coefficient of 2-d derivation of + * complementary color in Hamilton-Adams interpolation). + * u5, range [0, 31], default 8. + * @reserved1: reserved + * @lc_ctrl: Parameter that controls weights of Chroma Homogeneity metric + * in calculation of final homogeneity metric. + * u5, range [0, 31], default 7. + * @reserved2: reserved + * @cr_param1: First parameter that defines Checker artifact removal + * feature gain. Precision u5, range [0, 31], default 8. + * @reserved3: reserved + * @cr_param2: Second parameter that defines Checker artifact removal + * feature gain. Precision u5, range [0, 31], default 8. + * @reserved4: reserved + * @coring_param: Defines power of false color correction operation. + * low for preserving edge colors, high for preserving gray + * edge artifacts. + * Precision u1.4, range [0, 1.9375], default 4 (0.25). + * @reserved5: reserved + * + * The demosaic fixed function block is responsible to covert Bayer(mosaiced) + * images into color images based on demosaicing algorithm. + */ +struct ipu3_uapi_dm_config { + __u32 dm_en:1; + __u32 ch_ar_en:1; + __u32 fcc_en:1; + __u32 reserved0:13; + __u32 frame_width:16; + + __u32 gamma_sc:5; + __u32 reserved1:3; + __u32 lc_ctrl:5; + __u32 reserved2:3; + __u32 cr_param1:5; + __u32 reserved3:3; + __u32 cr_param2:5; + __u32 reserved4:3; + + __u32 coring_param:5; + __u32 reserved5:27; +} __packed; + +/** + * struct ipu3_uapi_ccm_mat_config - Color correction matrix + * + * @coeff_m11: CCM 3x3 coefficient, range [-65536, 65535] + * @coeff_m12: CCM 3x3 coefficient, range [-8192, 8191] + * @coeff_m13: CCM 3x3 coefficient, range [-32768, 32767] + * @coeff_o_r: Bias 3x1 coefficient, range [-8191, 8181] + * @coeff_m21: CCM 3x3 coefficient, range [-32767, 32767] + * @coeff_m22: CCM 3x3 coefficient, range [-8192, 8191] + * @coeff_m23: CCM 3x3 coefficient, range [-32768, 32767] + * @coeff_o_g: Bias 3x1 coefficient, range [-8191, 8181] + * @coeff_m31: CCM 3x3 coefficient, range [-32768, 32767] + * @coeff_m32: CCM 3x3 coefficient, range [-8192, 8191] + * @coeff_m33: CCM 3x3 coefficient, range [-32768, 32767] + * @coeff_o_b: Bias 3x1 coefficient, range [-8191, 8181] + * + * Transform sensor specific color space to standard sRGB by applying 3x3 matrix + * and adding a bias vector O. The transformation is basically a rotation and + * translation in the 3-dimensional color spaces. Here are the defaults: + * + * 9775, -2671, 1087, 0 + * -1071, 8303, 815, 0 + * -23, -7887, 16103, 0 + */ +struct ipu3_uapi_ccm_mat_config { + __s16 coeff_m11; + __s16 coeff_m12; + __s16 coeff_m13; + __s16 coeff_o_r; + __s16 coeff_m21; + __s16 coeff_m22; + __s16 coeff_m23; + __s16 coeff_o_g; + __s16 coeff_m31; + __s16 coeff_m32; + __s16 coeff_m33; + __s16 coeff_o_b; +} __packed; + +/** + * struct ipu3_uapi_gamma_corr_ctrl - Gamma correction + * + * @enable: gamma correction enable. + * @reserved: reserved + */ +struct ipu3_uapi_gamma_corr_ctrl { + __u32 enable:1; + __u32 reserved:31; +} __packed; + +/** + * struct ipu3_uapi_gamma_corr_lut - Per-pixel tone mapping implemented as LUT. + * + * @lut: 256 tabulated values of the gamma function. LUT[1].. LUT[256] + * format u13.0, range [0, 8191]. + * + * The tone mapping operation is done by a Piece wise linear graph + * that is implemented as a lookup table(LUT). The pixel component input + * intensity is the X-axis of the graph which is the table entry. + */ +struct ipu3_uapi_gamma_corr_lut { + __u16 lut[IPU3_UAPI_GAMMA_CORR_LUT_ENTRIES]; +} __packed; + +/** + * struct ipu3_uapi_gamma_config - Gamma config + * + * @gc_ctrl: control of gamma correction &ipu3_uapi_gamma_corr_ctrl + * @gc_lut: lookup table of gamma correction &ipu3_uapi_gamma_corr_lut + */ +struct ipu3_uapi_gamma_config { + struct ipu3_uapi_gamma_corr_ctrl gc_ctrl __attribute__((aligned(32))); + struct ipu3_uapi_gamma_corr_lut gc_lut __attribute__((aligned(32))); +} __packed; + +/** + * struct ipu3_uapi_csc_mat_config - Color space conversion matrix config + * + * @coeff_c11: Conversion matrix value, format s0.14, range [-16384, 16383]. + * @coeff_c12: Conversion matrix value, format s0.14, range [-8192, 8191]. + * @coeff_c13: Conversion matrix value, format s0.14, range [-16384, 16383]. + * @coeff_b1: Bias 3x1 coefficient, s13.0 range [-8192, 8191]. + * @coeff_c21: Conversion matrix value, format s0.14, range [-16384, 16383]. + * @coeff_c22: Conversion matrix value, format s0.14, range [-8192, 8191]. + * @coeff_c23: Conversion matrix value, format s0.14, range [-16384, 16383]. + * @coeff_b2: Bias 3x1 coefficient, s13.0 range [-8192, 8191]. + * @coeff_c31: Conversion matrix value, format s0.14, range [-16384, 16383]. + * @coeff_c32: Conversion matrix value, format s0.14, range [-8192, 8191]. + * @coeff_c33: Conversion matrix value, format s0.14, range [-16384, 16383]. + * @coeff_b3: Bias 3x1 coefficient, s13.0 range [-8192, 8191]. + * + * To transform each pixel from RGB to YUV (Y - brightness/luminance, + * UV -chroma) by applying the pixel's values by a 3x3 matrix and adding an + * optional bias 3x1 vector. Here are the default values for the matrix: + * + * 4898, 9617, 1867, 0, + * -2410, -4732, 7143, 0, + * 10076, -8437, -1638, 0, + * + * (i.e. for real number 0.299, 0.299 * 2^14 becomes 4898.) + */ +struct ipu3_uapi_csc_mat_config { + __s16 coeff_c11; + __s16 coeff_c12; + __s16 coeff_c13; + __s16 coeff_b1; + __s16 coeff_c21; + __s16 coeff_c22; + __s16 coeff_c23; + __s16 coeff_b2; + __s16 coeff_c31; + __s16 coeff_c32; + __s16 coeff_c33; + __s16 coeff_b3; +} __packed; + +/** + * struct ipu3_uapi_cds_params - Chroma down-scaling + * + * @ds_c00: range [0, 3] + * @ds_c01: range [0, 3] + * @ds_c02: range [0, 3] + * @ds_c03: range [0, 3] + * @ds_c10: range [0, 3] + * @ds_c11: range [0, 3] + * @ds_c12: range [0, 3] + * @ds_c13: range [0, 3] + * + * In case user does not provide, above 4x2 filter will use following defaults: + * 1, 3, 3, 1, + * 1, 3, 3, 1, + * + * @ds_nf: Normalization factor for Chroma output downscaling filter, + * range 0,4, default 2. + * @reserved0: reserved + * @csc_en: Color space conversion enable + * @uv_bin_output: 0: output YUV 4.2.0, 1: output YUV 4.2.2(default). + * @reserved1: reserved + */ +struct ipu3_uapi_cds_params { + __u32 ds_c00:2; + __u32 ds_c01:2; + __u32 ds_c02:2; + __u32 ds_c03:2; + __u32 ds_c10:2; + __u32 ds_c11:2; + __u32 ds_c12:2; + __u32 ds_c13:2; + __u32 ds_nf:5; + __u32 reserved0:3; + __u32 csc_en:1; + __u32 uv_bin_output:1; + __u32 reserved1:6; +} __packed; + +/** + * struct ipu3_uapi_shd_grid_config - Bayer shading(darkening) correction + * + * @width: Grid horizontal dimensions, u8, [8, 128], default 73 + * @height: Grid vertical dimensions, u8, [8, 128], default 56 + * @block_width_log2: Log2 of the width of the grid cell in pixel count + * u4, [0, 15], default value 5. + * @reserved0: reserved + * @block_height_log2: Log2 of the height of the grid cell in pixel count + * u4, [0, 15], default value 6. + * @reserved1: reserved + * @grid_height_per_slice: SHD_MAX_CELLS_PER_SET/width. + * (with SHD_MAX_CELLS_PER_SET = 146). + * @x_start: X value of top left corner of sensor relative to ROI + * s13, [-4096, 0], default 0, only negative values. + * @y_start: Y value of top left corner of sensor relative to ROI + * s13, [-4096, 0], default 0, only negative values. + */ +struct ipu3_uapi_shd_grid_config { + /* reg 0 */ + __u8 width; + __u8 height; + __u8 block_width_log2:3; + __u8 reserved0:1; + __u8 block_height_log2:3; + __u8 reserved1:1; + __u8 grid_height_per_slice; + /* reg 1 */ + __s16 x_start; + __s16 y_start; +} __packed; + +/** + * struct ipu3_uapi_shd_general_config - Shading general config + * + * @init_set_vrt_offst_ul: set vertical offset, + * y_start >> block_height_log2 % grid_height_per_slice. + * @shd_enable: shading enable. + * @gain_factor: Gain factor. Shift calculated anti shading value. Precision u2. + * 0x0 - gain factor [1, 5], means no shift interpolated value. + * 0x1 - gain factor [1, 9], means shift interpolated by 1. + * 0x2 - gain factor [1, 17], means shift interpolated by 2. + * @reserved: reserved + * + * Correction is performed by multiplying a gain factor for each of the 4 Bayer + * channels as a function of the pixel location in the sensor. + */ +struct ipu3_uapi_shd_general_config { + __u32 init_set_vrt_offst_ul:8; + __u32 shd_enable:1; + __u32 gain_factor:2; + __u32 reserved:21; +} __packed; + +/** + * struct ipu3_uapi_shd_black_level_config - Black level correction + * + * @bl_r: Bios values for green red. s11 range [-2048, 2047]. + * @bl_gr: Bios values for green blue. s11 range [-2048, 2047]. + * @bl_gb: Bios values for red. s11 range [-2048, 2047]. + * @bl_b: Bios values for blue. s11 range [-2048, 2047]. + */ +struct ipu3_uapi_shd_black_level_config { + __s16 bl_r; + __s16 bl_gr; + __s16 bl_gb; + __s16 bl_b; +} __packed; + +/** + * struct ipu3_uapi_shd_config_static - Shading config static + * + * @grid: shading grid config &ipu3_uapi_shd_grid_config + * @general: shading general config &ipu3_uapi_shd_general_config + * @black_level: black level config for shading correction as defined by + * &ipu3_uapi_shd_black_level_config + */ +struct ipu3_uapi_shd_config_static { + struct ipu3_uapi_shd_grid_config grid; + struct ipu3_uapi_shd_general_config general; + struct ipu3_uapi_shd_black_level_config black_level; +} __packed; + +/** + * struct ipu3_uapi_shd_lut - Shading gain factor lookup table. + * + * @sets: array + * @sets.r_and_gr: Red and GreenR Lookup table. + * @sets.r_and_gr.r: Red shading factor. + * @sets.r_and_gr.gr: GreenR shading factor. + * @sets.reserved1: reserved + * @sets.gb_and_b: GreenB and Blue Lookup table. + * @sets.gb_and_b.gb: GreenB shading factor. + * @sets.gb_and_b.b: Blue shading factor. + * @sets.reserved2: reserved + * + * Map to shading correction LUT register set. + */ +struct ipu3_uapi_shd_lut { + struct { + struct { + __u16 r; + __u16 gr; + } r_and_gr[IPU3_UAPI_SHD_MAX_CELLS_PER_SET]; + __u8 reserved1[24]; + struct { + __u16 gb; + __u16 b; + } gb_and_b[IPU3_UAPI_SHD_MAX_CELLS_PER_SET]; + __u8 reserved2[24]; + } sets[IPU3_UAPI_SHD_MAX_CFG_SETS]; +} __packed; + +/** + * struct ipu3_uapi_shd_config - Shading config + * + * @shd: shading static config, see &ipu3_uapi_shd_config_static + * @shd_lut: shading lookup table &ipu3_uapi_shd_lut + */ +struct ipu3_uapi_shd_config { + struct ipu3_uapi_shd_config_static shd __attribute__((aligned(32))); + struct ipu3_uapi_shd_lut shd_lut __attribute__((aligned(32))); +} __packed; + +/* Image Enhancement Filter directed */ + +/** + * struct ipu3_uapi_iefd_cux2 - IEFd Config Unit 2 parameters + * + * @x0: X0 point of Config Unit, u9.0, default 0. + * @x1: X1 point of Config Unit, u9.0, default 0. + * @a01: Slope A of Config Unit, s4.4, default 0. + * @b01: Slope B, always 0. + * + * Calculate weight for blending directed and non-directed denoise elements + * + * Note: + * Each instance of Config Unit needs X coordinate of n points and + * slope A factor between points calculated by driver based on calibration + * parameters. + * + * All CU inputs are unsigned, they will be converted to signed when written + * to register, i.e. a01 will be written to 9 bit register in s4.4 format. + * This applies to &ipu3_uapi_iefd_cux6_ed, &ipu3_uapi_iefd_cux2_1, + * &ipu3_uapi_iefd_cux2_1, &ipu3_uapi_iefd_cux4 and &ipu3_uapi_iefd_cux6_rad. + */ +struct ipu3_uapi_iefd_cux2 { + __u32 x0:9; + __u32 x1:9; + __u32 a01:9; + __u32 b01:5; +} __packed; + +/** + * struct ipu3_uapi_iefd_cux6_ed - Calculate power of non-directed sharpening + * element, Config Unit 6 for edge detail (ED). + * + * @x0: X coordinate of point 0, u9.0, default 0. + * @x1: X coordinate of point 1, u9.0, default 0. + * @x2: X coordinate of point 2, u9.0, default 0. + * @reserved0: reserved + * @x3: X coordinate of point 3, u9.0, default 0. + * @x4: X coordinate of point 4, u9.0, default 0. + * @x5: X coordinate of point 5, u9.0, default 0. + * @reserved1: reserved + * @a01: slope A points 01, s4.4, default 0. + * @a12: slope A points 12, s4.4, default 0. + * @a23: slope A points 23, s4.4, default 0. + * @reserved2: reserved + * @a34: slope A points 34, s4.4, default 0. + * @a45: slope A points 45, s4.4, default 0. + * @reserved3: reserved + * @b01: slope B points 01, s4.4, default 0. + * @b12: slope B points 12, s4.4, default 0. + * @b23: slope B points 23, s4.4, default 0. + * @reserved4: reserved + * @b34: slope B points 34, s4.4, default 0. + * @b45: slope B points 45, s4.4, default 0. + * @reserved5: reserved. + */ +struct ipu3_uapi_iefd_cux6_ed { + __u32 x0:9; + __u32 x1:9; + __u32 x2:9; + __u32 reserved0:5; + + __u32 x3:9; + __u32 x4:9; + __u32 x5:9; + __u32 reserved1:5; + + __u32 a01:9; + __u32 a12:9; + __u32 a23:9; + __u32 reserved2:5; + + __u32 a34:9; + __u32 a45:9; + __u32 reserved3:14; + + __u32 b01:9; + __u32 b12:9; + __u32 b23:9; + __u32 reserved4:5; + + __u32 b34:9; + __u32 b45:9; + __u32 reserved5:14; +} __packed; + +/** + * struct ipu3_uapi_iefd_cux2_1 - Calculate power of non-directed denoise + * element apply. + * @x0: X0 point of Config Unit, u9.0, default 0. + * @x1: X1 point of Config Unit, u9.0, default 0. + * @a01: Slope A of Config Unit, s4.4, default 0. + * @reserved1: reserved + * @b01: offset B0 of Config Unit, u7.0, default 0. + * @reserved2: reserved + */ +struct ipu3_uapi_iefd_cux2_1 { + __u32 x0:9; + __u32 x1:9; + __u32 a01:9; + __u32 reserved1:5; + + __u32 b01:8; + __u32 reserved2:24; +} __packed; + +/** + * struct ipu3_uapi_iefd_cux4 - Calculate power of non-directed sharpening + * element. + * + * @x0: X0 point of Config Unit, u9.0, default 0. + * @x1: X1 point of Config Unit, u9.0, default 0. + * @x2: X2 point of Config Unit, u9.0, default 0. + * @reserved0: reserved + * @x3: X3 point of Config Unit, u9.0, default 0. + * @a01: Slope A0 of Config Unit, s4.4, default 0. + * @a12: Slope A1 of Config Unit, s4.4, default 0. + * @reserved1: reserved + * @a23: Slope A2 of Config Unit, s4.4, default 0. + * @b01: Offset B0 of Config Unit, s7.0, default 0. + * @b12: Offset B1 of Config Unit, s7.0, default 0. + * @reserved2: reserved + * @b23: Offset B2 of Config Unit, s7.0, default 0. + * @reserved3: reserved + */ +struct ipu3_uapi_iefd_cux4 { + __u32 x0:9; + __u32 x1:9; + __u32 x2:9; + __u32 reserved0:5; + + __u32 x3:9; + __u32 a01:9; + __u32 a12:9; + __u32 reserved1:5; + + __u32 a23:9; + __u32 b01:8; + __u32 b12:8; + __u32 reserved2:7; + + __u32 b23:8; + __u32 reserved3:24; +} __packed; + +/** + * struct ipu3_uapi_iefd_cux6_rad - Radial Config Unit (CU) + * + * @x0: x0 points of Config Unit radial, u8.0 + * @x1: x1 points of Config Unit radial, u8.0 + * @x2: x2 points of Config Unit radial, u8.0 + * @x3: x3 points of Config Unit radial, u8.0 + * @x4: x4 points of Config Unit radial, u8.0 + * @x5: x5 points of Config Unit radial, u8.0 + * @reserved1: reserved + * @a01: Slope A of Config Unit radial, s7.8 + * @a12: Slope A of Config Unit radial, s7.8 + * @a23: Slope A of Config Unit radial, s7.8 + * @a34: Slope A of Config Unit radial, s7.8 + * @a45: Slope A of Config Unit radial, s7.8 + * @reserved2: reserved + * @b01: Slope B of Config Unit radial, s9.0 + * @b12: Slope B of Config Unit radial, s9.0 + * @b23: Slope B of Config Unit radial, s9.0 + * @reserved4: reserved + * @b34: Slope B of Config Unit radial, s9.0 + * @b45: Slope B of Config Unit radial, s9.0 + * @reserved5: reserved + */ +struct ipu3_uapi_iefd_cux6_rad { + __u32 x0:8; + __u32 x1:8; + __u32 x2:8; + __u32 x3:8; + + __u32 x4:8; + __u32 x5:8; + __u32 reserved1:16; + + __u32 a01:16; + __u32 a12:16; + + __u32 a23:16; + __u32 a34:16; + + __u32 a45:16; + __u32 reserved2:16; + + __u32 b01:10; + __u32 b12:10; + __u32 b23:10; + __u32 reserved4:2; + + __u32 b34:10; + __u32 b45:10; + __u32 reserved5:12; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_iefd_cfg_units - IEFd Config Units parameters + * + * @cu_1: calculate weight for blending directed and + * non-directed denoise elements. See &ipu3_uapi_iefd_cux2 + * @cu_ed: calculate power of non-directed sharpening element, see + * &ipu3_uapi_iefd_cux6_ed + * @cu_3: calculate weight for blending directed and + * non-directed denoise elements. A &ipu3_uapi_iefd_cux2 + * @cu_5: calculate power of non-directed denoise element apply, use + * &ipu3_uapi_iefd_cux2_1 + * @cu_6: calculate power of non-directed sharpening element. See + * &ipu3_uapi_iefd_cux4 + * @cu_7: calculate weight for blending directed and + * non-directed denoise elements. Use &ipu3_uapi_iefd_cux2 + * @cu_unsharp: Config Unit of unsharp &ipu3_uapi_iefd_cux4 + * @cu_radial: Config Unit of radial &ipu3_uapi_iefd_cux6_rad + * @cu_vssnlm: Config Unit of vssnlm &ipu3_uapi_iefd_cux2 + */ +struct ipu3_uapi_yuvp1_iefd_cfg_units { + struct ipu3_uapi_iefd_cux2 cu_1; + struct ipu3_uapi_iefd_cux6_ed cu_ed; + struct ipu3_uapi_iefd_cux2 cu_3; + struct ipu3_uapi_iefd_cux2_1 cu_5; + struct ipu3_uapi_iefd_cux4 cu_6; + struct ipu3_uapi_iefd_cux2 cu_7; + struct ipu3_uapi_iefd_cux4 cu_unsharp; + struct ipu3_uapi_iefd_cux6_rad cu_radial; + struct ipu3_uapi_iefd_cux2 cu_vssnlm; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_iefd_config_s - IEFd config + * + * @horver_diag_coeff: Gradient compensation. Compared with vertical / + * horizontal (0 / 90 degree), coefficient of diagonal (45 / + * 135 degree) direction should be corrected by approx. + * 1/sqrt(2). + * @reserved0: reserved + * @clamp_stitch: Slope to stitch between clamped and unclamped edge values + * @reserved1: reserved + * @direct_metric_update: Update coeff for direction metric + * @reserved2: reserved + * @ed_horver_diag_coeff: Radial Coefficient that compensates for + * different distance for vertical/horizontal and + * diagonal gradient calculation (approx. 1/sqrt(2)) + * @reserved3: reserved + */ +struct ipu3_uapi_yuvp1_iefd_config_s { + __u32 horver_diag_coeff:7; + __u32 reserved0:1; + __u32 clamp_stitch:6; + __u32 reserved1:2; + __u32 direct_metric_update:5; + __u32 reserved2:3; + __u32 ed_horver_diag_coeff:7; + __u32 reserved3:1; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_iefd_control - IEFd control + * + * @iefd_en: Enable IEFd + * @denoise_en: Enable denoise + * @direct_smooth_en: Enable directional smooth + * @rad_en: Enable radial update + * @vssnlm_en: Enable VSSNLM output filter + * @reserved: reserved + */ +struct ipu3_uapi_yuvp1_iefd_control { + __u32 iefd_en:1; + __u32 denoise_en:1; + __u32 direct_smooth_en:1; + __u32 rad_en:1; + __u32 vssnlm_en:1; + __u32 reserved:27; +} __packed; + +/** + * struct ipu3_uapi_sharp_cfg - Sharpening config + * + * @nega_lmt_txt: Sharpening limit for negative overshoots for texture. + * @reserved0: reserved + * @posi_lmt_txt: Sharpening limit for positive overshoots for texture. + * @reserved1: reserved + * @nega_lmt_dir: Sharpening limit for negative overshoots for direction (edge). + * @reserved2: reserved + * @posi_lmt_dir: Sharpening limit for positive overshoots for direction (edge). + * @reserved3: reserved + * + * Fixed point type u13.0, range [0, 8191]. + */ +struct ipu3_uapi_sharp_cfg { + __u32 nega_lmt_txt:13; + __u32 reserved0:19; + __u32 posi_lmt_txt:13; + __u32 reserved1:19; + __u32 nega_lmt_dir:13; + __u32 reserved2:19; + __u32 posi_lmt_dir:13; + __u32 reserved3:19; +} __packed; + +/** + * struct struct ipu3_uapi_far_w - Sharpening config for far sub-group + * + * @dir_shrp: Weight of wide direct sharpening, u1.6, range [0, 64], default 64. + * @reserved0: reserved + * @dir_dns: Weight of wide direct denoising, u1.6, range [0, 64], default 0. + * @reserved1: reserved + * @ndir_dns_powr: Power of non-direct denoising, + * Precision u1.6, range [0, 64], default 64. + * @reserved2: reserved + */ +struct ipu3_uapi_far_w { + __u32 dir_shrp:7; + __u32 reserved0:1; + __u32 dir_dns:7; + __u32 reserved1:1; + __u32 ndir_dns_powr:7; + __u32 reserved2:9; +} __packed; + +/** + * struct struct ipu3_uapi_unsharp_cfg - Unsharp config + * + * @unsharp_weight: Unsharp mask blending weight. + * u1.6, range [0, 64], default 16. + * 0 - disabled, 64 - use only unsharp. + * @reserved0: reserved + * @unsharp_amount: Unsharp mask amount, u4.5, range [0, 511], default 0. + * @reserved1: reserved + */ +struct ipu3_uapi_unsharp_cfg { + __u32 unsharp_weight:7; + __u32 reserved0:1; + __u32 unsharp_amount:9; + __u32 reserved1:15; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_iefd_shrp_cfg - IEFd sharpness config + * + * @cfg: sharpness config &ipu3_uapi_sharp_cfg + * @far_w: wide range config, value as specified by &ipu3_uapi_far_w: + * The 5x5 environment is separated into 2 sub-groups, the 3x3 nearest + * neighbors (8 pixels called Near), and the second order neighborhood + * around them (16 pixels called Far). + * @unshrp_cfg: unsharpness config. &ipu3_uapi_unsharp_cfg + */ +struct ipu3_uapi_yuvp1_iefd_shrp_cfg { + struct ipu3_uapi_sharp_cfg cfg; + struct ipu3_uapi_far_w far_w; + struct ipu3_uapi_unsharp_cfg unshrp_cfg; +} __packed; + +/** + * struct ipu3_uapi_unsharp_coef0 - Unsharp mask coefficients + * + * @c00: Coeff11, s0.8, range [-255, 255], default 1. + * @c01: Coeff12, s0.8, range [-255, 255], default 5. + * @c02: Coeff13, s0.8, range [-255, 255], default 9. + * @reserved: reserved + * + * Configurable registers for common sharpening support. + */ +struct ipu3_uapi_unsharp_coef0 { + __u32 c00:9; + __u32 c01:9; + __u32 c02:9; + __u32 reserved:5; +} __packed; + +/** + * struct ipu3_uapi_unsharp_coef1 - Unsharp mask coefficients + * + * @c11: Coeff22, s0.8, range [-255, 255], default 29. + * @c12: Coeff23, s0.8, range [-255, 255], default 55. + * @c22: Coeff33, s0.8, range [-255, 255], default 96. + * @reserved: reserved + */ +struct ipu3_uapi_unsharp_coef1 { + __u32 c11:9; + __u32 c12:9; + __u32 c22:9; + __u32 reserved:5; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_iefd_unshrp_cfg - Unsharp mask config + * + * @unsharp_coef0: unsharp coefficient 0 config. See &ipu3_uapi_unsharp_coef0 + * @unsharp_coef1: unsharp coefficient 1 config. See &ipu3_uapi_unsharp_coef1 + */ +struct ipu3_uapi_yuvp1_iefd_unshrp_cfg { + struct ipu3_uapi_unsharp_coef0 unsharp_coef0; + struct ipu3_uapi_unsharp_coef1 unsharp_coef1; +} __packed; + +/** + * struct ipu3_uapi_radial_reset_xy - Radial coordinate reset + * + * @x: Radial reset of x coordinate. Precision s12, [-4095, 4095], default 0. + * @reserved0: reserved + * @y: Radial center y coordinate. Precision s12, [-4095, 4095], default 0. + * @reserved1: reserved + */ +struct ipu3_uapi_radial_reset_xy { + __s32 x:13; + __u32 reserved0:3; + __s32 y:13; + __u32 reserved1:3; +} __packed; + +/** + * struct ipu3_uapi_radial_reset_x2 - Radial X^2 reset + * + * @x2: Radial reset of x^2 coordinate. Precision u24, default 0. + * @reserved: reserved + */ +struct ipu3_uapi_radial_reset_x2 { + __u32 x2:24; + __u32 reserved:8; +} __packed; + +/** + * struct ipu3_uapi_radial_reset_y2 - Radial Y^2 reset + * + * @y2: Radial reset of y^2 coordinate. Precision u24, default 0. + * @reserved: reserved + */ +struct ipu3_uapi_radial_reset_y2 { + __u32 y2:24; + __u32 reserved:8; +} __packed; + +/** + * struct ipu3_uapi_radial_cfg - Radial config + * + * @rad_nf: Radial. R^2 normalization factor is scale down by 2^ - (15 + scale) + * @reserved0: reserved + * @rad_inv_r2: Radial R^-2 normelized to (0.5..1). + * Precision u7, range [0, 127]. + * @reserved1: reserved + */ +struct ipu3_uapi_radial_cfg { + __u32 rad_nf:4; + __u32 reserved0:4; + __u32 rad_inv_r2:7; + __u32 reserved1:17; +} __packed; + +/** + * struct ipu3_uapi_rad_far_w - Radial FAR sub-group + * + * @rad_dir_far_sharp_w: Weight of wide direct sharpening, u1.6, range [0, 64], + * default 64. + * @rad_dir_far_dns_w: Weight of wide direct denoising, u1.6, range [0, 64], + * default 0. + * @rad_ndir_far_dns_power: power of non-direct sharpening, u1.6, range [0, 64], + * default 0. + * @reserved: reserved + */ +struct ipu3_uapi_rad_far_w { + __u32 rad_dir_far_sharp_w:8; + __u32 rad_dir_far_dns_w:8; + __u32 rad_ndir_far_dns_power:8; + __u32 reserved:8; +} __packed; + +/** + * struct ipu3_uapi_cu_cfg0 - Radius Config Unit cfg0 register + * + * @cu6_pow: Power of CU6. Power of non-direct sharpening, u3.4. + * @reserved0: reserved + * @cu_unsharp_pow: Power of unsharp mask, u2.4. + * @reserved1: reserved + * @rad_cu6_pow: Radial/corner CU6. Directed sharpening power, u3.4. + * @reserved2: reserved + * @rad_cu_unsharp_pow: Radial power of unsharp mask, u2.4. + * @reserved3: reserved + */ +struct ipu3_uapi_cu_cfg0 { + __u32 cu6_pow:7; + __u32 reserved0:1; + __u32 cu_unsharp_pow:7; + __u32 reserved1:1; + __u32 rad_cu6_pow:7; + __u32 reserved2:1; + __u32 rad_cu_unsharp_pow:6; + __u32 reserved3:2; +} __packed; + +/** + * struct ipu3_uapi_cu_cfg1 - Radius Config Unit cfg1 register + * + * @rad_cu6_x1: X1 point of Config Unit 6, precision u9.0. + * @reserved0: reserved + * @rad_cu_unsharp_x1: X1 point for Config Unit unsharp for radial/corner point + * precision u9.0. + * @reserved1: reserved + */ +struct ipu3_uapi_cu_cfg1 { + __u32 rad_cu6_x1:9; + __u32 reserved0:1; + __u32 rad_cu_unsharp_x1:9; + __u32 reserved1:13; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_iefd_rad_cfg - IEFd parameters changed radially over + * the picture plane. + * + * @reset_xy: reset xy value in radial calculation. &ipu3_uapi_radial_reset_xy + * @reset_x2: reset x square value in radial calculation. See struct + * &ipu3_uapi_radial_reset_x2 + * @reset_y2: reset y square value in radial calculation. See struct + * &ipu3_uapi_radial_reset_y2 + * @cfg: radial config defined in &ipu3_uapi_radial_cfg + * @rad_far_w: weight for wide range radial. &ipu3_uapi_rad_far_w + * @cu_cfg0: configuration unit 0. See &ipu3_uapi_cu_cfg0 + * @cu_cfg1: configuration unit 1. See &ipu3_uapi_cu_cfg1 + */ +struct ipu3_uapi_yuvp1_iefd_rad_cfg { + struct ipu3_uapi_radial_reset_xy reset_xy; + struct ipu3_uapi_radial_reset_x2 reset_x2; + struct ipu3_uapi_radial_reset_y2 reset_y2; + struct ipu3_uapi_radial_cfg cfg; + struct ipu3_uapi_rad_far_w rad_far_w; + struct ipu3_uapi_cu_cfg0 cu_cfg0; + struct ipu3_uapi_cu_cfg1 cu_cfg1; +} __packed; + +/* Vssnlm - Very small scale non-local mean algorithm */ + +/** + * struct ipu3_uapi_vss_lut_x - Vssnlm LUT x0/x1/x2 + * + * @vs_x0: Vssnlm LUT x0, precision u8, range [0, 255], default 16. + * @vs_x1: Vssnlm LUT x1, precision u8, range [0, 255], default 32. + * @vs_x2: Vssnlm LUT x2, precision u8, range [0, 255], default 64. + * @reserved2: reserved + */ +struct ipu3_uapi_vss_lut_x { + __u32 vs_x0:8; + __u32 vs_x1:8; + __u32 vs_x2:8; + __u32 reserved2:8; +} __packed; + +/** + * struct ipu3_uapi_vss_lut_y - Vssnlm LUT y0/y1/y2 + * + * @vs_y1: Vssnlm LUT y1, precision u4, range [0, 8], default 1. + * @reserved0: reserved + * @vs_y2: Vssnlm LUT y2, precision u4, range [0, 8], default 3. + * @reserved1: reserved + * @vs_y3: Vssnlm LUT y3, precision u4, range [0, 8], default 8. + * @reserved2: reserved + */ +struct ipu3_uapi_vss_lut_y { + __u32 vs_y1:4; + __u32 reserved0:4; + __u32 vs_y2:4; + __u32 reserved1:4; + __u32 vs_y3:4; + __u32 reserved2:12; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_iefd_vssnlm_cf - IEFd Vssnlm Lookup table + * + * @vss_lut_x: vss lookup table. See &ipu3_uapi_vss_lut_x description + * @vss_lut_y: vss lookup table. See &ipu3_uapi_vss_lut_y description + */ +struct ipu3_uapi_yuvp1_iefd_vssnlm_cfg { + struct ipu3_uapi_vss_lut_x vss_lut_x; + struct ipu3_uapi_vss_lut_y vss_lut_y; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_iefd_config - IEFd config + * + * @units: configuration unit setting, &ipu3_uapi_yuvp1_iefd_cfg_units + * @config: configuration, as defined by &ipu3_uapi_yuvp1_iefd_config_s + * @control: control setting, as defined by &ipu3_uapi_yuvp1_iefd_control + * @sharp: sharpness setting, as defined by &ipu3_uapi_yuvp1_iefd_shrp_cfg + * @unsharp: unsharpness setting, as defined by &ipu3_uapi_yuvp1_iefd_unshrp_cfg + * @rad: radial setting, as defined by &ipu3_uapi_yuvp1_iefd_rad_cfg + * @vsslnm: vsslnm setting, as defined by &ipu3_uapi_yuvp1_iefd_vssnlm_cfg + */ +struct ipu3_uapi_yuvp1_iefd_config { + struct ipu3_uapi_yuvp1_iefd_cfg_units units; + struct ipu3_uapi_yuvp1_iefd_config_s config; + struct ipu3_uapi_yuvp1_iefd_control control; + struct ipu3_uapi_yuvp1_iefd_shrp_cfg sharp; + struct ipu3_uapi_yuvp1_iefd_unshrp_cfg unsharp; + struct ipu3_uapi_yuvp1_iefd_rad_cfg rad; + struct ipu3_uapi_yuvp1_iefd_vssnlm_cfg vsslnm; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_yds_config - Y Down-Sampling config + * + * @c00: range [0, 3], default 0x0 + * @c01: range [0, 3], default 0x1 + * @c02: range [0, 3], default 0x1 + * @c03: range [0, 3], default 0x0 + * @c10: range [0, 3], default 0x0 + * @c11: range [0, 3], default 0x1 + * @c12: range [0, 3], default 0x1 + * @c13: range [0, 3], default 0x0 + * + * Above are 4x2 filter coefficients for chroma output downscaling. + * + * @norm_factor: Normalization factor, range [0, 4], default 2 + * 0 - divide by 1 + * 1 - divide by 2 + * 2 - divide by 4 + * 3 - divide by 8 + * 4 - divide by 16 + * @reserved0: reserved + * @bin_output: Down sampling on Luma channel in two optional modes + * 0 - Bin output 4.2.0 (default), 1 output 4.2.2. + * @reserved1: reserved + */ +struct ipu3_uapi_yuvp1_yds_config { + __u32 c00:2; + __u32 c01:2; + __u32 c02:2; + __u32 c03:2; + __u32 c10:2; + __u32 c11:2; + __u32 c12:2; + __u32 c13:2; + __u32 norm_factor:5; + __u32 reserved0:4; + __u32 bin_output:1; + __u32 reserved1:6; +} __packed; + +/* Chroma Noise Reduction */ + +/** + * struct ipu3_uapi_yuvp1_chnr_enable_config - Chroma noise reduction enable + * + * @enable: enable/disable chroma noise reduction + * @yuv_mode: 0 - YUV420, 1 - YUV422 + * @reserved0: reserved + * @col_size: number of columns in the frame, max width is 2560 + * @reserved1: reserved + */ +struct ipu3_uapi_yuvp1_chnr_enable_config { + __u32 enable:1; + __u32 yuv_mode:1; + __u32 reserved0:14; + __u32 col_size:12; + __u32 reserved1:4; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_chnr_coring_config - Coring thresholds for UV + * + * @u: U coring level, u0.13, range [0.0, 1.0], default 0.0 + * @reserved0: reserved + * @v: V coring level, u0.13, range [0.0, 1.0], default 0.0 + * @reserved1: reserved + */ +struct ipu3_uapi_yuvp1_chnr_coring_config { + __u32 u:13; + __u32 reserved0:3; + __u32 v:13; + __u32 reserved1:3; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_chnr_sense_gain_config - Chroma noise reduction gains + * + * All sensitivity gain parameters have precision u13.0, range [0, 8191]. + * + * @vy: Sensitivity of horizontal edge of Y, default 100 + * @vu: Sensitivity of horizontal edge of U, default 100 + * @vv: Sensitivity of horizontal edge of V, default 100 + * @reserved0: reserved + * @hy: Sensitivity of vertical edge of Y, default 50 + * @hu: Sensitivity of vertical edge of U, default 50 + * @hv: Sensitivity of vertical edge of V, default 50 + * @reserved1: reserved + */ +struct ipu3_uapi_yuvp1_chnr_sense_gain_config { + __u32 vy:8; + __u32 vu:8; + __u32 vv:8; + __u32 reserved0:8; + + __u32 hy:8; + __u32 hu:8; + __u32 hv:8; + __u32 reserved1:8; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_chnr_iir_fir_config - Chroma IIR/FIR filter config + * + * @fir_0h: Value of center tap in horizontal FIR, range [0, 32], default 8. + * @reserved0: reserved + * @fir_1h: Value of distance 1 in horizontal FIR, range [0, 32], default 12. + * @reserved1: reserved + * @fir_2h: Value of distance 2 tap in horizontal FIR, range [0, 32], default 0. + * @dalpha_clip_val: weight for previous row in IIR, range [1, 256], default 0. + * @reserved2: reserved + */ +struct ipu3_uapi_yuvp1_chnr_iir_fir_config { + __u32 fir_0h:6; + __u32 reserved0:2; + __u32 fir_1h:6; + __u32 reserved1:2; + __u32 fir_2h:6; + __u32 dalpha_clip_val:9; + __u32 reserved2:1; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_chnr_config - Chroma noise reduction config + * + * @enable: chroma noise reduction enable, see + * &ipu3_uapi_yuvp1_chnr_enable_config + * @coring: coring config for chroma noise reduction, see + * &ipu3_uapi_yuvp1_chnr_coring_config + * @sense_gain: sensitivity config for chroma noise reduction, see + * ipu3_uapi_yuvp1_chnr_sense_gain_config + * @iir_fir: iir and fir config for chroma noise reduction, see + * ipu3_uapi_yuvp1_chnr_iir_fir_config + */ +struct ipu3_uapi_yuvp1_chnr_config { + struct ipu3_uapi_yuvp1_chnr_enable_config enable; + struct ipu3_uapi_yuvp1_chnr_coring_config coring; + struct ipu3_uapi_yuvp1_chnr_sense_gain_config sense_gain; + struct ipu3_uapi_yuvp1_chnr_iir_fir_config iir_fir; +} __packed; + +/* Edge Enhancement and Noise Reduction */ + +/** + * struct ipu3_uapi_yuvp1_y_ee_nr_lpf_config - Luma(Y) edge enhancement low-pass + * filter coefficients + * + * @a_diag: Smoothing diagonal coefficient, u5.0. + * @reserved0: reserved + * @a_periph: Image smoothing perpherial, u5.0. + * @reserved1: reserved + * @a_cent: Image Smoothing center coefficient, u5.0. + * @reserved2: reserved + * @enable: 0: Y_EE_NR disabled, output = input; 1: Y_EE_NR enabled. + */ +struct ipu3_uapi_yuvp1_y_ee_nr_lpf_config { + __u32 a_diag:5; + __u32 reserved0:3; + __u32 a_periph:5; + __u32 reserved1:3; + __u32 a_cent:5; + __u32 reserved2:9; + __u32 enable:1; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_y_ee_nr_sense_config - Luma(Y) edge enhancement + * noise reduction sensitivity gains + * + * @edge_sense_0: Sensitivity of edge in dark area. u13.0, default 8191. + * @reserved0: reserved + * @delta_edge_sense: Difference in the sensitivity of edges between + * the bright and dark areas. u13.0, default 0. + * @reserved1: reserved + * @corner_sense_0: Sensitivity of corner in dark area. u13.0, default 0. + * @reserved2: reserved + * @delta_corner_sense: Difference in the sensitivity of corners between + * the bright and dark areas. u13.0, default 8191. + * @reserved3: reserved + */ +struct ipu3_uapi_yuvp1_y_ee_nr_sense_config { + __u32 edge_sense_0:13; + __u32 reserved0:3; + __u32 delta_edge_sense:13; + __u32 reserved1:3; + __u32 corner_sense_0:13; + __u32 reserved2:3; + __u32 delta_corner_sense:13; + __u32 reserved3:3; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_y_ee_nr_gain_config - Luma(Y) edge enhancement + * noise reduction gain config + * + * @gain_pos_0: Gain for positive edge in dark area. u5.0, [0, 16], default 2. + * @reserved0: reserved + * @delta_gain_posi: Difference in the gain of edges between the bright and + * dark areas for positive edges. u5.0, [0, 16], default 0. + * @reserved1: reserved + * @gain_neg_0: Gain for negative edge in dark area. u5.0, [0, 16], default 8. + * @reserved2: reserved + * @delta_gain_neg: Difference in the gain of edges between the bright and + * dark areas for negative edges. u5.0, [0, 16], default 0. + * @reserved3: reserved + */ +struct ipu3_uapi_yuvp1_y_ee_nr_gain_config { + __u32 gain_pos_0:5; + __u32 reserved0:3; + __u32 delta_gain_posi:5; + __u32 reserved1:3; + __u32 gain_neg_0:5; + __u32 reserved2:3; + __u32 delta_gain_neg:5; + __u32 reserved3:3; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_y_ee_nr_clip_config - Luma(Y) edge enhancement + * noise reduction clipping config + * + * @clip_pos_0: Limit of positive edge in dark area + * u5, value [0, 16], default 8. + * @reserved0: reserved + * @delta_clip_posi: Difference in the limit of edges between the bright + * and dark areas for positive edges. + * u5, value [0, 16], default 8. + * @reserved1: reserved + * @clip_neg_0: Limit of negative edge in dark area + * u5, value [0, 16], default 8. + * @reserved2: reserved + * @delta_clip_neg: Difference in the limit of edges between the bright + * and dark areas for negative edges. + * u5, value [0, 16], default 8. + * @reserved3: reserved + */ +struct ipu3_uapi_yuvp1_y_ee_nr_clip_config { + __u32 clip_pos_0:5; + __u32 reserved0:3; + __u32 delta_clip_posi:5; + __u32 reserved1:3; + __u32 clip_neg_0:5; + __u32 reserved2:3; + __u32 delta_clip_neg:5; + __u32 reserved3:3; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_y_ee_nr_frng_config - Luma(Y) edge enhancement + * noise reduction fringe config + * + * @gain_exp: Common exponent of gains, u4, [0, 8], default 2. + * @reserved0: reserved + * @min_edge: Threshold for edge and smooth stitching, u13. + * @reserved1: reserved + * @lin_seg_param: Power of LinSeg, u4. + * @reserved2: reserved + * @t1: Parameter for enabling/disabling the edge enhancement, u1.0, [0, 1], + * default 1. + * @t2: Parameter for enabling/disabling the smoothing, u1.0, [0, 1], + * default 1. + * @reserved3: reserved + */ +struct ipu3_uapi_yuvp1_y_ee_nr_frng_config { + __u32 gain_exp:4; + __u32 reserved0:28; + __u32 min_edge:13; + __u32 reserved1:3; + __u32 lin_seg_param:4; + __u32 reserved2:4; + __u32 t1:1; + __u32 t2:1; + __u32 reserved3:6; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_y_ee_nr_diag_config - Luma(Y) edge enhancement + * noise reduction diagonal config + * + * @diag_disc_g: Coefficient that prioritize diagonal edge direction on + * horizontal or vertical for final enhancement. + * u4.0, [1, 15], default 1. + * @reserved0: reserved + * @hvw_hor: Weight of horizontal/vertical edge enhancement for hv edge. + * u2.2, [1, 15], default 4. + * @dw_hor: Weight of diagonal edge enhancement for hv edge. + * u2.2, [1, 15], default 1. + * @hvw_diag: Weight of horizontal/vertical edge enhancement for diagonal edge. + * u2.2, [1, 15], default 1. + * @dw_diag: Weight of diagonal edge enhancement for diagonal edge. + * u2.2, [1, 15], default 4. + * @reserved1: reserved + */ +struct ipu3_uapi_yuvp1_y_ee_nr_diag_config { + __u32 diag_disc_g:4; + __u32 reserved0:4; + __u32 hvw_hor:4; + __u32 dw_hor:4; + __u32 hvw_diag:4; + __u32 dw_diag:4; + __u32 reserved1:8; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_y_ee_nr_fc_coring_config - Luma(Y) edge enhancement + * noise reduction false color correction (FCC) coring config + * + * @pos_0: Gain for positive edge in dark, u13.0, [0, 16], default 0. + * @reserved0: reserved + * @pos_delta: Gain for positive edge in bright, value: pos_0 + pos_delta <=16 + * u13.0, default 0. + * @reserved1: reserved + * @neg_0: Gain for negative edge in dark area, u13.0, range [0, 16], default 0. + * @reserved2: reserved + * @neg_delta: Gain for negative edge in bright area. neg_0 + neg_delta <=16 + * u13.0, default 0. + * @reserved3: reserved + * + * Coring is a simple soft thresholding technique. + */ +struct ipu3_uapi_yuvp1_y_ee_nr_fc_coring_config { + __u32 pos_0:13; + __u32 reserved0:3; + __u32 pos_delta:13; + __u32 reserved1:3; + __u32 neg_0:13; + __u32 reserved2:3; + __u32 neg_delta:13; + __u32 reserved3:3; +} __packed; + +/** + * struct ipu3_uapi_yuvp1_y_ee_nr_config - Edge enhancement and noise reduction + * + * @lpf: low-pass filter config. See &ipu3_uapi_yuvp1_y_ee_nr_lpf_config + * @sense: sensitivity config. See &ipu3_uapi_yuvp1_y_ee_nr_sense_config + * @gain: gain config as defined in &ipu3_uapi_yuvp1_y_ee_nr_gain_config + * @clip: clip config as defined in &ipu3_uapi_yuvp1_y_ee_nr_clip_config + * @frng: fringe config as defined in &ipu3_uapi_yuvp1_y_ee_nr_frng_config + * @diag: diagonal edge config. See &ipu3_uapi_yuvp1_y_ee_nr_diag_config + * @fc_coring: coring config for fringe control. See + * &ipu3_uapi_yuvp1_y_ee_nr_fc_coring_config + */ +struct ipu3_uapi_yuvp1_y_ee_nr_config { + struct ipu3_uapi_yuvp1_y_ee_nr_lpf_config lpf; + struct ipu3_uapi_yuvp1_y_ee_nr_sense_config sense; + struct ipu3_uapi_yuvp1_y_ee_nr_gain_config gain; + struct ipu3_uapi_yuvp1_y_ee_nr_clip_config clip; + struct ipu3_uapi_yuvp1_y_ee_nr_frng_config frng; + struct ipu3_uapi_yuvp1_y_ee_nr_diag_config diag; + struct ipu3_uapi_yuvp1_y_ee_nr_fc_coring_config fc_coring; +} __packed; + +/* Total Color Correction */ + +/** + * struct ipu3_uapi_yuvp2_tcc_gen_control_static_config - Total color correction + * general control config + * + * @en: 0 - TCC disabled. Output = input 1 - TCC enabled. + * @blend_shift: blend shift, Range[3, 4], default NA. + * @gain_according_to_y_only: 0: Gain is calculated according to YUV, + * 1: Gain is calculated according to Y only + * @reserved0: reserved + * @gamma: Final blending coefficients. Values[-16, 16], default NA. + * @reserved1: reserved + * @delta: Final blending coefficients. Values[-16, 16], default NA. + * @reserved2: reserved + */ +struct ipu3_uapi_yuvp2_tcc_gen_control_static_config { + __u32 en:1; + __u32 blend_shift:3; + __u32 gain_according_to_y_only:1; + __u32 reserved0:11; + __s32 gamma:5; + __u32 reserved1:3; + __s32 delta:5; + __u32 reserved2:3; +} __packed; + +/** + * struct ipu3_uapi_yuvp2_tcc_macc_elem_static_config - Total color correction + * multi-axis color control (MACC) config + * + * @a: a coefficient for 2x2 MACC conversion matrix. + * @reserved0: reserved + * @b: b coefficient 2x2 MACC conversion matrix. + * @reserved1: reserved + * @c: c coefficient for 2x2 MACC conversion matrix. + * @reserved2: reserved + * @d: d coefficient for 2x2 MACC conversion matrix. + * @reserved3: reserved + */ +struct ipu3_uapi_yuvp2_tcc_macc_elem_static_config { + __s32 a:12; + __u32 reserved0:4; + __s32 b:12; + __u32 reserved1:4; + __s32 c:12; + __u32 reserved2:4; + __s32 d:12; + __u32 reserved3:4; +} __packed; + +/** + * struct ipu3_uapi_yuvp2_tcc_macc_table_static_config - Total color correction + * multi-axis color control (MACC) table array + * + * @entries: config for multi axis color correction, as specified by + * &ipu3_uapi_yuvp2_tcc_macc_elem_static_config + */ +struct ipu3_uapi_yuvp2_tcc_macc_table_static_config { + struct ipu3_uapi_yuvp2_tcc_macc_elem_static_config + entries[IPU3_UAPI_YUVP2_TCC_MACC_TABLE_ELEMENTS]; +} __packed; + +/** + * struct ipu3_uapi_yuvp2_tcc_inv_y_lut_static_config - Total color correction + * inverse y lookup table + * + * @entries: lookup table for inverse y estimation, and use it to estimate the + * ratio between luma and chroma. Chroma by approximate the absolute + * value of the radius on the chroma plane (R = sqrt(u^2+v^2) ) and + * luma by approximate by 1/Y. + */ +struct ipu3_uapi_yuvp2_tcc_inv_y_lut_static_config { + __u16 entries[IPU3_UAPI_YUVP2_TCC_INV_Y_LUT_ELEMENTS]; +} __packed; + +/** + * struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config - Total color + * correction lookup table for PCWL + * + * @entries: lookup table for gain piece wise linear transformation (PCWL) + */ +struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config { + __u16 entries[IPU3_UAPI_YUVP2_TCC_GAIN_PCWL_LUT_ELEMENTS]; +} __packed; + +/** + * struct ipu3_uapi_yuvp2_tcc_r_sqr_lut_static_config - Total color correction + * lookup table for r square root + * + * @entries: lookup table for r square root estimation + */ +struct ipu3_uapi_yuvp2_tcc_r_sqr_lut_static_config { + __s16 entries[IPU3_UAPI_YUVP2_TCC_R_SQR_LUT_ELEMENTS]; +} __packed; + +/** + * struct ipu3_uapi_yuvp2_tcc_static_config- Total color correction static + * + * @gen_control: general config for Total Color Correction + * @macc_table: config for multi axis color correction + * @inv_y_lut: lookup table for inverse y estimation + * @gain_pcwl: lookup table for gain PCWL + * @r_sqr_lut: lookup table for r square root estimation. + */ +struct ipu3_uapi_yuvp2_tcc_static_config { + struct ipu3_uapi_yuvp2_tcc_gen_control_static_config gen_control; + struct ipu3_uapi_yuvp2_tcc_macc_table_static_config macc_table; + struct ipu3_uapi_yuvp2_tcc_inv_y_lut_static_config inv_y_lut; + struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config gain_pcwl; + struct ipu3_uapi_yuvp2_tcc_r_sqr_lut_static_config r_sqr_lut; +} __packed; + +/* Advanced Noise Reduction related structs */ + +/* + * struct ipu3_uapi_anr_alpha - Advanced noise reduction alpha + * + * Tunable parameters that are subject to modification according to the + * total gain used. + */ +struct ipu3_uapi_anr_alpha { + __u16 gr; + __u16 r; + __u16 b; + __u16 gb; + __u16 dc_gr; + __u16 dc_r; + __u16 dc_b; + __u16 dc_gb; +} __packed; + +/* + * struct ipu3_uapi_anr_beta - Advanced noise reduction beta + * + * Tunable parameters that are subject to modification according to the + * total gain used. + */ +struct ipu3_uapi_anr_beta { + __u16 beta_gr; + __u16 beta_r; + __u16 beta_b; + __u16 beta_gb; +} __packed; + +/* + * struct ipu3_uapi_anr_plane_color - Advanced noise reduction per plane R, Gr, + * Gb and B register settings + * + * Tunable parameters that are subject to modification according to the + * total gain used. + */ +struct ipu3_uapi_anr_plane_color { + __u16 reg_w_gr[16]; + __u16 reg_w_r[16]; + __u16 reg_w_b[16]; + __u16 reg_w_gb[16]; +} __packed; + +/** + * struct ipu3_uapi_anr_transform_config - Advanced noise reduction transform + * + * @enable: advanced noise reduction enabled. + * @adaptive_treshhold_en: On IPU3, adaptive threshold is always enabled. + * @reserved1: reserved + * @reserved2: reserved + * @alpha: using following defaults: + * 13, 13, 13, 13, 0, 0, 0, 0 + * 11, 11, 11, 11, 0, 0, 0, 0 + * 14, 14, 14, 14, 0, 0, 0, 0 + * @beta: use following defaults: + * 24, 24, 24, 24 + * 21, 20, 20, 21 + * 25, 25, 25, 25 + * @color: use defaults defined in driver/media/pci/intel/ipu3-tables.c + * @sqrt_lut: 11 bits per element, values = + * [724 768 810 849 887 + * 923 958 991 1024 1056 + * 1116 1145 1173 1201 1086 + * 1228 1254 1280 1305 1330 + * 1355 1379 1402 1425 1448] + * @xreset: Reset value of X for r^2 calculation Value: col_start-X_center + * Constraint: Xreset + FrameWdith=4095 Xreset= -4095, default -1632. + * @reserved3: reserved + * @yreset: Reset value of Y for r^2 calculation Value: row_start-Y_center + * Constraint: Yreset + FrameHeight=4095 Yreset= -4095, default -1224. + * @reserved4: reserved + * @x_sqr_reset: Reset value of X^2 for r^2 calculation Value = (Xreset)^2 + * @r_normfactor: Normalization factor for R. Default 14. + * @reserved5: reserved + * @y_sqr_reset: Reset value of Y^2 for r^2 calculation Value = (Yreset)^2 + * @gain_scale: Parameter describing shading gain as a function of distance + * from the image center. + * A single value per frame, loaded by the driver. Default 115. + */ +struct ipu3_uapi_anr_transform_config { + __u32 enable:1; /* 0 or 1, disabled or enabled */ + __u32 adaptive_treshhold_en:1; /* On IPU3, always enabled */ + + __u32 reserved1:30; + __u8 reserved2[44]; + + struct ipu3_uapi_anr_alpha alpha[3]; + struct ipu3_uapi_anr_beta beta[3]; + struct ipu3_uapi_anr_plane_color color[3]; + + __u16 sqrt_lut[IPU3_UAPI_ANR_LUT_SIZE]; /* 11 bits per element */ + + __s16 xreset:13; + __u16 reserved3:3; + __s16 yreset:13; + __u16 reserved4:3; + + __u32 x_sqr_reset:24; + __u32 r_normfactor:5; + __u32 reserved5:3; + + __u32 y_sqr_reset:24; + __u32 gain_scale:8; +} __packed; + +/** + * struct ipu3_uapi_anr_stitch_pyramid - ANR stitch pyramid + * + * @entry0: pyramid LUT entry0, range [0x0, 0x3f] + * @entry1: pyramid LUT entry1, range [0x0, 0x3f] + * @entry2: pyramid LUT entry2, range [0x0, 0x3f] + * @reserved: reserved + */ +struct ipu3_uapi_anr_stitch_pyramid { + __u32 entry0:6; + __u32 entry1:6; + __u32 entry2:6; + __u32 reserved:14; +} __packed; + +/** + * struct ipu3_uapi_anr_stitch_config - ANR stitch config + * + * @anr_stitch_en: enable stitch. Enabled with 1. + * @reserved: reserved + * @pyramid: pyramid table as defined by &ipu3_uapi_anr_stitch_pyramid + * default values: + * { 1, 3, 5 }, { 7, 7, 5 }, { 3, 1, 3 }, + * { 9, 15, 21 }, { 21, 15, 9 }, { 3, 5, 15 }, + * { 25, 35, 35 }, { 25, 15, 5 }, { 7, 21, 35 }, + * { 49, 49, 35 }, { 21, 7, 7 }, { 21, 35, 49 }, + * { 49, 35, 21 }, { 7, 5, 15 }, { 25, 35, 35 }, + * { 25, 15, 5 }, { 3, 9, 15 }, { 21, 21, 15 }, + * { 9, 3, 1 }, { 3, 5, 7 }, { 7, 5, 3}, { 1 } + */ +struct ipu3_uapi_anr_stitch_config { + __u32 anr_stitch_en; + __u8 reserved[44]; + struct ipu3_uapi_anr_stitch_pyramid pyramid[IPU3_UAPI_ANR_PYRAMID_SIZE]; +} __packed; + +/** + * struct ipu3_uapi_anr_config - ANR config + * + * @transform: advanced noise reduction transform config as specified by + * &ipu3_uapi_anr_transform_config + * @stitch: create 4x4 patch from 4 surrounding 8x8 patches. + */ +struct ipu3_uapi_anr_config { + struct ipu3_uapi_anr_transform_config transform __attribute__((aligned(32))); + struct ipu3_uapi_anr_stitch_config stitch __attribute__((aligned(32))); +} __packed; + +/** + * struct ipu3_uapi_acc_param - Accelerator cluster parameters + * + * ACC refers to the HW cluster containing all Fixed Functions (FFs). Each FF + * implements a specific algorithm. + * + * @bnr: parameters for bayer noise reduction static config. See + * &ipu3_uapi_bnr_static_config + * @green_disparity: disparity static config between gr and gb channel. + * See &ipu3_uapi_bnr_static_config_green_disparity + * @dm: de-mosaic config. See &ipu3_uapi_dm_config + * @ccm: color correction matrix. See &ipu3_uapi_ccm_mat_config + * @gamma: gamma correction config. See &ipu3_uapi_gamma_config + * @csc: color space conversion matrix. See &ipu3_uapi_csc_mat_config + * @cds: color down sample config. See &ipu3_uapi_cds_params + * @shd: lens shading correction config. See &ipu3_uapi_shd_config + * @iefd: Image enhancement filter and denoise config. + * &ipu3_uapi_yuvp1_iefd_config + * @yds_c0: y down scaler config. &ipu3_uapi_yuvp1_yds_config + * @chnr_c0: chroma noise reduction config. &ipu3_uapi_yuvp1_chnr_config + * @y_ee_nr: y edge enhancement and noise reduction config. + * &ipu3_uapi_yuvp1_y_ee_nr_config + * @yds: y down scaler config. See &ipu3_uapi_yuvp1_yds_config + * @chnr: chroma noise reduction config. See &ipu3_uapi_yuvp1_chnr_config + * @reserved1: reserved + * @yds2: y channel down scaler config. See &ipu3_uapi_yuvp1_yds_config + * @tcc: total color correction config as defined in struct + * &ipu3_uapi_yuvp2_tcc_static_config + * @reserved2: reserved + * @anr: advanced noise reduction config.See &ipu3_uapi_anr_config + * @awb_fr: AWB filter response config. See ipu3_uapi_awb_fr_config + * @ae: auto exposure config As specified by &ipu3_uapi_ae_config + * @af: auto focus config. As specified by &ipu3_uapi_af_config + * @awb: auto white balance config. As specified by &ipu3_uapi_awb_config + */ +struct ipu3_uapi_acc_param { + struct ipu3_uapi_bnr_static_config bnr; + struct ipu3_uapi_bnr_static_config_green_disparity + green_disparity __attribute__((aligned(32))); + struct ipu3_uapi_dm_config dm __attribute__((aligned(32))); + struct ipu3_uapi_ccm_mat_config ccm __attribute__((aligned(32))); + struct ipu3_uapi_gamma_config gamma __attribute__((aligned(32))); + struct ipu3_uapi_csc_mat_config csc __attribute__((aligned(32))); + struct ipu3_uapi_cds_params cds __attribute__((aligned(32))); + struct ipu3_uapi_shd_config shd __attribute__((aligned(32))); + struct ipu3_uapi_yuvp1_iefd_config iefd __attribute__((aligned(32))); + struct ipu3_uapi_yuvp1_yds_config yds_c0 __attribute__((aligned(32))); + struct ipu3_uapi_yuvp1_chnr_config chnr_c0 __attribute__((aligned(32))); + struct ipu3_uapi_yuvp1_y_ee_nr_config y_ee_nr __attribute__((aligned(32))); + struct ipu3_uapi_yuvp1_yds_config yds __attribute__((aligned(32))); + struct ipu3_uapi_yuvp1_chnr_config chnr __attribute__((aligned(32))); + struct ipu3_uapi_yuvp1_yds_config yds2 __attribute__((aligned(32))); + struct ipu3_uapi_yuvp2_tcc_static_config tcc __attribute__((aligned(32))); + struct ipu3_uapi_anr_config anr; + struct ipu3_uapi_awb_fr_config_s awb_fr; + struct ipu3_uapi_ae_config ae; + struct ipu3_uapi_af_config_s af; + struct ipu3_uapi_awb_config awb; +} __packed; + +/** + * struct ipu3_uapi_isp_lin_vmem_params - Linearization parameters + * + * @lin_lutlow_gr: linearization look-up table for GR channel interpolation. + * @lin_lutlow_r: linearization look-up table for R channel interpolation. + * @lin_lutlow_b: linearization look-up table for B channel interpolation. + * @lin_lutlow_gb: linearization look-up table for GB channel interpolation. + * lin_lutlow_gr / lin_lutlow_r / lin_lutlow_b / + * lin_lutlow_gb <= LIN_MAX_VALUE - 1. + * @lin_lutdif_gr: lin_lutlow_gr[i+1] - lin_lutlow_gr[i]. + * @lin_lutdif_r: lin_lutlow_r[i+1] - lin_lutlow_r[i]. + * @lin_lutdif_b: lin_lutlow_b[i+1] - lin_lutlow_b[i]. + * @lin_lutdif_gb: lin_lutlow_gb[i+1] - lin_lutlow_gb[i]. + */ +struct ipu3_uapi_isp_lin_vmem_params { + __s16 lin_lutlow_gr[IPU3_UAPI_LIN_LUT_SIZE]; + __s16 lin_lutlow_r[IPU3_UAPI_LIN_LUT_SIZE]; + __s16 lin_lutlow_b[IPU3_UAPI_LIN_LUT_SIZE]; + __s16 lin_lutlow_gb[IPU3_UAPI_LIN_LUT_SIZE]; + __s16 lin_lutdif_gr[IPU3_UAPI_LIN_LUT_SIZE]; + __s16 lin_lutdif_r[IPU3_UAPI_LIN_LUT_SIZE]; + __s16 lin_lutdif_b[IPU3_UAPI_LIN_LUT_SIZE]; + __s16 lin_lutdif_gb[IPU3_UAPI_LIN_LUT_SIZE]; +} __packed; + +/* Temporal Noise Reduction */ + +/** + * struct ipu3_uapi_isp_tnr3_vmem_params - Temporal noise reduction vector + * memory parameters + * + * @slope: slope setting in interpolation curve for temporal noise reduction. + * @reserved1: reserved + * @sigma: knee point setting in interpolation curve for temporal + * noise reduction. + * @reserved2: reserved + */ +struct ipu3_uapi_isp_tnr3_vmem_params { + __u16 slope[IPU3_UAPI_ISP_TNR3_VMEM_LEN]; + __u16 reserved1[IPU3_UAPI_ISP_VEC_ELEMS + - IPU3_UAPI_ISP_TNR3_VMEM_LEN]; + __u16 sigma[IPU3_UAPI_ISP_TNR3_VMEM_LEN]; + __u16 reserved2[IPU3_UAPI_ISP_VEC_ELEMS + - IPU3_UAPI_ISP_TNR3_VMEM_LEN]; +} __packed; + +/** + * struct ipu3_uapi_isp_tnr3_params - Temporal noise reduction v3 parameters + * + * @knee_y1: Knee point TNR3 assumes standard deviation of Y,U and + * V at Y1 are TnrY1_Sigma_Y, U and V. + * @knee_y2: Knee point TNR3 assumes standard deviation of Y,U and + * V at Y2 are TnrY2_Sigma_Y, U and V. + * @maxfb_y: Max feedback gain for Y + * @maxfb_u: Max feedback gain for U + * @maxfb_v: Max feedback gain for V + * @round_adj_y: rounding Adjust for Y + * @round_adj_u: rounding Adjust for U + * @round_adj_v: rounding Adjust for V + * @ref_buf_select: selection of the reference frame buffer to be used. + */ +struct ipu3_uapi_isp_tnr3_params { + __u32 knee_y1; + __u32 knee_y2; + __u32 maxfb_y; + __u32 maxfb_u; + __u32 maxfb_v; + __u32 round_adj_y; + __u32 round_adj_u; + __u32 round_adj_v; + __u32 ref_buf_select; +} __packed; + +/* Extreme Noise Reduction version 3 */ + +/** + * struct ipu3_uapi_isp_xnr3_vmem_params - Extreme noise reduction v3 + * vector memory parameters + * + * @x: xnr3 parameters. + * @a: xnr3 parameters. + * @b: xnr3 parameters. + * @c: xnr3 parameters. + */ +struct ipu3_uapi_isp_xnr3_vmem_params { + __u16 x[IPU3_UAPI_ISP_VEC_ELEMS]; + __u16 a[IPU3_UAPI_ISP_VEC_ELEMS]; + __u16 b[IPU3_UAPI_ISP_VEC_ELEMS]; + __u16 c[IPU3_UAPI_ISP_VEC_ELEMS]; +} __packed; + +/** + * struct ipu3_uapi_xnr3_alpha_params - Extreme noise reduction v3 + * alpha tuning parameters + * + * @y0: Sigma for Y range similarity in dark area. + * @u0: Sigma for U range similarity in dark area. + * @v0: Sigma for V range similarity in dark area. + * @ydiff: Sigma difference for Y between bright area and dark area. + * @udiff: Sigma difference for U between bright area and dark area. + * @vdiff: Sigma difference for V between bright area and dark area. + */ +struct ipu3_uapi_xnr3_alpha_params { + __u32 y0; + __u32 u0; + __u32 v0; + __u32 ydiff; + __u32 udiff; + __u32 vdiff; +} __packed; + +/** + * struct ipu3_uapi_xnr3_coring_params - Extreme noise reduction v3 + * coring parameters + * + * @u0: Coring Threshold of U channel in dark area. + * @v0: Coring Threshold of V channel in dark area. + * @udiff: Threshold difference of U channel between bright and dark area. + * @vdiff: Threshold difference of V channel between bright and dark area. + */ +struct ipu3_uapi_xnr3_coring_params { + __u32 u0; + __u32 v0; + __u32 udiff; + __u32 vdiff; +} __packed; + +/** + * struct ipu3_uapi_xnr3_blending_params - Blending factor + * + * @strength: The factor for blending output with input. This is tuning + * parameterHigher values lead to more aggressive XNR operation. + */ +struct ipu3_uapi_xnr3_blending_params { + __u32 strength; +} __packed; + +/** + * struct ipu3_uapi_isp_xnr3_params - Extreme noise reduction v3 parameters + * + * @alpha: parameters for xnr3 alpha. See &ipu3_uapi_xnr3_alpha_params + * @coring: parameters for xnr3 coring. See &ipu3_uapi_xnr3_coring_params + * @blending: parameters for xnr3 blending. See &ipu3_uapi_xnr3_blending_params + */ +struct ipu3_uapi_isp_xnr3_params { + struct ipu3_uapi_xnr3_alpha_params alpha; + struct ipu3_uapi_xnr3_coring_params coring; + struct ipu3_uapi_xnr3_blending_params blending; +} __packed; + +/***** Obgrid (optical black level compensation) table entry *****/ + +/** + * struct ipu3_uapi_obgrid_param - Optical black level compensation parameters + * + * @gr: Grid table values for color GR + * @r: Grid table values for color R + * @b: Grid table values for color B + * @gb: Grid table values for color GB + * + * Black level is different for red, green, and blue channels. So black level + * compensation is different per channel. + */ +struct ipu3_uapi_obgrid_param { + __u16 gr; + __u16 r; + __u16 b; + __u16 gb; +} __packed; + +/******************* V4L2_META_FMT_IPU3_PARAMS *******************/ + +/** + * struct ipu3_uapi_flags - bits to indicate which pipeline needs update + * + * @gdc: 0 = no update, 1 = update. + * @obgrid: 0 = no update, 1 = update. + * @reserved1: Not used. + * @acc_bnr: 0 = no update, 1 = update. + * @acc_green_disparity: 0 = no update, 1 = update. + * @acc_dm: 0 = no update, 1 = update. + * @acc_ccm: 0 = no update, 1 = update. + * @acc_gamma: 0 = no update, 1 = update. + * @acc_csc: 0 = no update, 1 = update. + * @acc_cds: 0 = no update, 1 = update. + * @acc_shd: 0 = no update, 1 = update. + * @reserved2: Not used. + * @acc_iefd: 0 = no update, 1 = update. + * @acc_yds_c0: 0 = no update, 1 = update. + * @acc_chnr_c0: 0 = no update, 1 = update. + * @acc_y_ee_nr: 0 = no update, 1 = update. + * @acc_yds: 0 = no update, 1 = update. + * @acc_chnr: 0 = no update, 1 = update. + * @acc_ytm: 0 = no update, 1 = update. + * @acc_yds2: 0 = no update, 1 = update. + * @acc_tcc: 0 = no update, 1 = update. + * @acc_dpc: 0 = no update, 1 = update. + * @acc_bds: 0 = no update, 1 = update. + * @acc_anr: 0 = no update, 1 = update. + * @acc_awb_fr: 0 = no update, 1 = update. + * @acc_ae: 0 = no update, 1 = update. + * @acc_af: 0 = no update, 1 = update. + * @acc_awb: 0 = no update, 1 = update. + * @__acc_osys: 0 = no update, 1 = update. + * @reserved3: Not used. + * @lin_vmem_params: 0 = no update, 1 = update. + * @tnr3_vmem_params: 0 = no update, 1 = update. + * @xnr3_vmem_params: 0 = no update, 1 = update. + * @tnr3_dmem_params: 0 = no update, 1 = update. + * @xnr3_dmem_params: 0 = no update, 1 = update. + * @reserved4: Not used. + * @obgrid_param: 0 = no update, 1 = update. + * @reserved5: Not used. + */ +struct ipu3_uapi_flags { + __u32 gdc:1; + __u32 obgrid:1; + __u32 reserved1:30; + + __u32 acc_bnr:1; + __u32 acc_green_disparity:1; + __u32 acc_dm:1; + __u32 acc_ccm:1; + __u32 acc_gamma:1; + __u32 acc_csc:1; + __u32 acc_cds:1; + __u32 acc_shd:1; + __u32 reserved2:2; + __u32 acc_iefd:1; + __u32 acc_yds_c0:1; + __u32 acc_chnr_c0:1; + __u32 acc_y_ee_nr:1; + __u32 acc_yds:1; + __u32 acc_chnr:1; + __u32 acc_ytm:1; + __u32 acc_yds2:1; + __u32 acc_tcc:1; + __u32 acc_dpc:1; + __u32 acc_bds:1; + __u32 acc_anr:1; + __u32 acc_awb_fr:1; + __u32 acc_ae:1; + __u32 acc_af:1; + __u32 acc_awb:1; + __u32 reserved3:4; + + __u32 lin_vmem_params:1; + __u32 tnr3_vmem_params:1; + __u32 xnr3_vmem_params:1; + __u32 tnr3_dmem_params:1; + __u32 xnr3_dmem_params:1; + __u32 reserved4:1; + __u32 obgrid_param:1; + __u32 reserved5:25; +} __packed; + +/** + * struct ipu3_uapi_params - V4L2_META_FMT_IPU3_PARAMS + * + * @use: select which parameters to apply, see &ipu3_uapi_flags + * @acc_param: ACC parameters, as specified by &ipu3_uapi_acc_param + * @lin_vmem_params: linearization VMEM, as specified by + * &ipu3_uapi_isp_lin_vmem_params + * @tnr3_vmem_params: tnr3 VMEM as specified by + * &ipu3_uapi_isp_tnr3_vmem_params + * @xnr3_vmem_params: xnr3 VMEM as specified by + * &ipu3_uapi_isp_xnr3_vmem_params + * @tnr3_dmem_params: tnr3 DMEM as specified by &ipu3_uapi_isp_tnr3_params + * @xnr3_dmem_params: xnr3 DMEM as specified by &ipu3_uapi_isp_xnr3_params + * @obgrid_param: obgrid parameters as specified by + * &ipu3_uapi_obgrid_param + * + * The video queue "parameters" is of format V4L2_META_FMT_IPU3_PARAMS. + * This is a "single plane" v4l2_meta_format using V4L2_BUF_TYPE_META_OUTPUT. + * + * struct ipu3_uapi_params as defined below contains a lot of parameters and + * ipu3_uapi_flags selects which parameters to apply. + */ +struct ipu3_uapi_params { + /* Flags which of the settings below are to be applied */ + struct ipu3_uapi_flags use __attribute__((aligned(32))); + + /* Accelerator cluster parameters */ + struct ipu3_uapi_acc_param acc_param; + + /* ISP vector address space parameters */ + struct ipu3_uapi_isp_lin_vmem_params lin_vmem_params; + struct ipu3_uapi_isp_tnr3_vmem_params tnr3_vmem_params; + struct ipu3_uapi_isp_xnr3_vmem_params xnr3_vmem_params; + + /* ISP data memory (DMEM) parameters */ + struct ipu3_uapi_isp_tnr3_params tnr3_dmem_params; + struct ipu3_uapi_isp_xnr3_params xnr3_dmem_params; + + /* Optical black level compensation */ + struct ipu3_uapi_obgrid_param obgrid_param; +} __packed; + +#endif /* __IPU3_UAPI_H */ diff --git a/drivers/staging/media/ipu3/ipu3-abi.h b/drivers/staging/media/ipu3/ipu3-abi.h new file mode 100644 index 000000000000..e1185602c7fd --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-abi.h @@ -0,0 +1,2011 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018 Intel Corporation */ + +#ifndef __IPU3_ABI_H +#define __IPU3_ABI_H + +#include "include/intel-ipu3.h" + +/******************* IMGU Hardware information *******************/ + +typedef u32 imgu_addr_t; + +#define IMGU_ISP_VMEM_ALIGN 128 +#define IMGU_DVS_BLOCK_W 64 +#define IMGU_DVS_BLOCK_H 32 +#define IMGU_GDC_BUF_X (2 * IMGU_DVS_BLOCK_W) +#define IMGU_GDC_BUF_Y IMGU_DVS_BLOCK_H +/* n = 0..1 */ +#define IMGU_SP_PMEM_BASE(n) (0x20000 + (n) * 0x4000) +#define IMGU_MAX_BQ_GRID_WIDTH 80 +#define IMGU_MAX_BQ_GRID_HEIGHT 60 +#define IMGU_OBGRID_TILE_SIZE 16 +#define IMGU_PIXELS_PER_WORD 50 +#define IMGU_BYTES_PER_WORD 64 +#define IMGU_STRIPE_FIXED_HALF_OVERLAP 2 +#define IMGU_SHD_SETS 3 +#define IMGU_BDS_MIN_CLIP_VAL 0 +#define IMGU_BDS_MAX_CLIP_VAL 2 + +#define IMGU_ABI_AWB_MAX_CELLS_PER_SET 160 +#define IMGU_ABI_AF_MAX_CELLS_PER_SET 32 +#define IMGU_ABI_AWB_FR_MAX_CELLS_PER_SET 32 + +#define IMGU_ABI_ACC_OP_IDLE 0 +#define IMGU_ABI_ACC_OP_END_OF_ACK 1 +#define IMGU_ABI_ACC_OP_END_OF_OPS 2 +#define IMGU_ABI_ACC_OP_NO_OPS 3 + +#define IMGU_ABI_ACC_OPTYPE_PROCESS_LINES 0 +#define IMGU_ABI_ACC_OPTYPE_TRANSFER_DATA 1 + +/* Register definitions */ + +/* PM_CTRL_0_5_0_IMGHMMADR */ +#define IMGU_REG_PM_CTRL 0x0 +#define IMGU_PM_CTRL_START BIT(0) +#define IMGU_PM_CTRL_CFG_DONE BIT(1) +#define IMGU_PM_CTRL_RACE_TO_HALT BIT(2) +#define IMGU_PM_CTRL_NACK_ALL BIT(3) +#define IMGU_PM_CTRL_CSS_PWRDN BIT(4) +#define IMGU_PM_CTRL_RST_AT_EOF BIT(5) +#define IMGU_PM_CTRL_FORCE_HALT BIT(6) +#define IMGU_PM_CTRL_FORCE_UNHALT BIT(7) +#define IMGU_PM_CTRL_FORCE_PWRDN BIT(8) +#define IMGU_PM_CTRL_FORCE_RESET BIT(9) + +/* SYSTEM_REQ_0_5_0_IMGHMMADR */ +#define IMGU_REG_SYSTEM_REQ 0x18 +#define IMGU_SYSTEM_REQ_FREQ_MASK 0x3f +#define IMGU_SYSTEM_REQ_FREQ_DIVIDER 25 +#define IMGU_REG_INT_STATUS 0x30 +#define IMGU_REG_INT_ENABLE 0x34 +#define IMGU_REG_INT_CSS_IRQ BIT(31) +/* STATE_0_5_0_IMGHMMADR */ +#define IMGU_REG_STATE 0x130 +#define IMGU_STATE_HALT_STS BIT(0) +#define IMGU_STATE_IDLE_STS BIT(1) +#define IMGU_STATE_POWER_UP BIT(2) +#define IMGU_STATE_POWER_DOWN BIT(3) +#define IMGU_STATE_CSS_BUSY_MASK 0xc0 +#define IMGU_STATE_PM_FSM_MASK 0x180 +#define IMGU_STATE_PWRDNM_FSM_MASK 0x1E00000 +/* PM_STS_0_5_0_IMGHMMADR */ +#define IMGU_REG_PM_STS 0x140 + +#define IMGU_REG_BASE 0x4000 + +#define IMGU_REG_ISP_CTRL (IMGU_REG_BASE + 0x00) +#define IMGU_CTRL_RST BIT(0) +#define IMGU_CTRL_START BIT(1) +#define IMGU_CTRL_BREAK BIT(2) +#define IMGU_CTRL_RUN BIT(3) +#define IMGU_CTRL_BROKEN BIT(4) +#define IMGU_CTRL_IDLE BIT(5) +#define IMGU_CTRL_SLEEPING BIT(6) +#define IMGU_CTRL_STALLING BIT(7) +#define IMGU_CTRL_IRQ_CLEAR BIT(8) +#define IMGU_CTRL_IRQ_READY BIT(10) +#define IMGU_CTRL_IRQ_SLEEPING BIT(11) +#define IMGU_CTRL_ICACHE_INV BIT(12) +#define IMGU_CTRL_IPREFETCH_EN BIT(13) +#define IMGU_REG_ISP_START_ADDR (IMGU_REG_BASE + 0x04) +#define IMGU_REG_ISP_ICACHE_ADDR (IMGU_REG_BASE + 0x10) +#define IMGU_REG_ISP_PC (IMGU_REG_BASE + 0x1c) + +/* SP Registers, sp = 0:SP0; 1:SP1 */ +#define IMGU_REG_SP_CTRL(sp) (IMGU_REG_BASE + (sp) * 0x100 + 0x100) + /* For bits in IMGU_REG_SP_CTRL, see IMGU_CTRL_* */ +#define IMGU_REG_SP_START_ADDR(sp) (IMGU_REG_BASE + (sp) * 0x100 + 0x104) +#define IMGU_REG_SP_ICACHE_ADDR(sp) (IMGU_REG_BASE + (sp) * 0x100 + 0x11c) +#define IMGU_REG_SP_CTRL_SINK(sp) (IMGU_REG_BASE + (sp) * 0x100 + 0x130) +#define IMGU_REG_SP_PC(sp) (IMGU_REG_BASE + (sp) * 0x100 + 0x134) + +#define IMGU_REG_TLB_INVALIDATE (IMGU_REG_BASE + 0x300) +#define IMGU_TLB_INVALIDATE 1 +#define IMGU_REG_L1_PHYS (IMGU_REG_BASE + 0x304) /* 27-bit pfn */ + +#define IMGU_REG_CIO_GATE_BURST_STATE (IMGU_REG_BASE + 0x404) +#define IMGU_CIO_GATE_BURST_MASK 0x80 + +#define IMGU_REG_GP_BUSY (IMGU_REG_BASE + 0x500) +#define IMGU_REG_GP_STARVING (IMGU_REG_BASE + 0x504) +#define IMGU_REG_GP_WORKLOAD (IMGU_REG_BASE + 0x508) +#define IMGU_REG_GP_IRQ(n) (IMGU_REG_BASE + (n) * 4 + 0x50c) /* n = 0..4 */ +#define IMGU_REG_GP_SP1_STRMON_STAT (IMGU_REG_BASE + 0x520) +#define IMGU_REG_GP_SP2_STRMON_STAT (IMGU_REG_BASE + 0x524) +#define IMGU_REG_GP_ISP_STRMON_STAT (IMGU_REG_BASE + 0x528) +#define IMGU_REG_GP_MOD_STRMON_STAT (IMGU_REG_BASE + 0x52c) + +/* Port definitions for the streaming monitors. */ +/* For each definition there is signal pair : valid [bit 0]- accept [bit 1] */ +#define IMGU_GP_STRMON_STAT_SP1_PORT_SP12DMA BIT(0) +#define IMGU_GP_STRMON_STAT_SP1_PORT_DMA2SP1 BIT(2) +#define IMGU_GP_STRMON_STAT_SP1_PORT_SP12SP2 BIT(4) +#define IMGU_GP_STRMON_STAT_SP1_PORT_SP22SP1 BIT(6) +#define IMGU_GP_STRMON_STAT_SP1_PORT_SP12ISP BIT(8) +#define IMGU_GP_STRMON_STAT_SP1_PORT_ISP2SP1 BIT(10) + +#define IMGU_GP_STRMON_STAT_SP2_PORT_SP22DMA BIT(0) +#define IMGU_GP_STRMON_STAT_SP2_PORT_DMA2SP2 BIT(2) +#define IMGU_GP_STRMON_STAT_SP2_PORT_SP22SP1 BIT(4) +#define IMGU_GP_STRMON_STAT_SP2_PORT_SP12SP2 BIT(6) + +#define IMGU_GP_STRMON_STAT_ISP_PORT_ISP2DMA BIT(0) +#define IMGU_GP_STRMON_STAT_ISP_PORT_DMA2ISP BIT(2) +#define IMGU_GP_STRMON_STAT_ISP_PORT_ISP2SP1 BIT(4) +#define IMGU_GP_STRMON_STAT_ISP_PORT_SP12ISP BIT(6) + +/* Between the devices and the fifo */ +#define IMGU_GP_STRMON_STAT_MOD_PORT_SP12DMA BIT(0) +#define IMGU_GP_STRMON_STAT_MOD_PORT_DMA2SP1 BIT(2) +#define IMGU_GP_STRMON_STAT_MOD_PORT_SP22DMA BIT(4) +#define IMGU_GP_STRMON_STAT_MOD_PORT_DMA2SP2 BIT(6) +#define IMGU_GP_STRMON_STAT_MOD_PORT_ISP2DMA BIT(8) +#define IMGU_GP_STRMON_STAT_MOD_PORT_DMA2ISP BIT(10) +#define IMGU_GP_STRMON_STAT_MOD_PORT_CELLS2GDC BIT(12) +#define IMGU_GP_STRMON_STAT_MOD_PORT_GDC2CELLS BIT(14) +#define IMGU_GP_STRMON_STAT_MOD_PORT_CELLS2DECOMP BIT(16) +#define IMGU_GP_STRMON_STAT_MOD_PORT_DECOMP2CELLS BIT(18) +/* n = 1..6 */ +#define IMGU_GP_STRMON_STAT_MOD_PORT_S2V(n) (1 << (((n) - 1) * 2 + 20)) + +/* n = 1..15 */ +#define IMGU_GP_STRMON_STAT_ACCS_PORT_ACC(n) (1 << (((n) - 1) * 2)) + +/* After FIFO and demux before SP1, n = 1..15 */ +#define IMGU_GP_STRMON_STAT_ACCS2SP1_MON_PORT_ACC(n) (1 << (((n) - 1) * 2)) + +/* After FIFO and demux before SP2, n = 1..15 */ +#define IMGU_GP_STRMON_STAT_ACCS2SP2_MON_PORT_ACC(n) (1 << (((n) - 1) * 2)) + +#define IMGU_REG_GP_HALT (IMGU_REG_BASE + 0x5dc) + + /* n = 0..2 (main ctrl, SP0, SP1) */ +#define IMGU_REG_IRQCTRL_BASE(n) (IMGU_REG_BASE + (n) * 0x100 + 0x700) +#define IMGU_IRQCTRL_MAIN 0 +#define IMGU_IRQCTRL_SP0 1 +#define IMGU_IRQCTRL_SP1 2 +#define IMGU_IRQCTRL_NUM 3 +#define IMGU_IRQCTRL_IRQ_SP1 BIT(0) +#define IMGU_IRQCTRL_IRQ_SP2 BIT(1) +#define IMGU_IRQCTRL_IRQ_ISP BIT(2) +#define IMGU_IRQCTRL_IRQ_SP1_STREAM_MON BIT(3) +#define IMGU_IRQCTRL_IRQ_SP2_STREAM_MON BIT(4) +#define IMGU_IRQCTRL_IRQ_ISP_STREAM_MON BIT(5) +#define IMGU_IRQCTRL_IRQ_MOD_STREAM_MON BIT(6) +#define IMGU_IRQCTRL_IRQ_MOD_ISP_STREAM_MON BIT(7) +#define IMGU_IRQCTRL_IRQ_ACCS_STREAM_MON BIT(8) +#define IMGU_IRQCTRL_IRQ_ACCS_SP1_STREAM_MON BIT(9) +#define IMGU_IRQCTRL_IRQ_ACCS_SP2_STREAM_MON BIT(10) +#define IMGU_IRQCTRL_IRQ_ISP_PMEM_ERROR BIT(11) +#define IMGU_IRQCTRL_IRQ_ISP_BAMEM_ERROR BIT(12) +#define IMGU_IRQCTRL_IRQ_ISP_VMEM_ERROR BIT(13) +#define IMGU_IRQCTRL_IRQ_ISP_DMEM_ERROR BIT(14) +#define IMGU_IRQCTRL_IRQ_SP1_ICACHE_MEM_ERROR BIT(15) +#define IMGU_IRQCTRL_IRQ_SP1_DMEM_ERROR BIT(16) +#define IMGU_IRQCTRL_IRQ_SP2_ICACHE_MEM_ERROR BIT(17) +#define IMGU_IRQCTRL_IRQ_SP2_DMEM_ERROR BIT(18) +#define IMGU_IRQCTRL_IRQ_ACCS_SCRATCH_MEM_ERROR BIT(19) +#define IMGU_IRQCTRL_IRQ_GP_TIMER(n) BIT(20 + (n)) /* n=0..1 */ +#define IMGU_IRQCTRL_IRQ_DMA BIT(22) +#define IMGU_IRQCTRL_IRQ_SW_PIN(n) BIT(23 + (n)) /* n=0..4 */ +#define IMGU_IRQCTRL_IRQ_ACC_SYS BIT(28) +#define IMGU_IRQCTRL_IRQ_OUT_FORM_IRQ_CTRL BIT(29) +#define IMGU_IRQCTRL_IRQ_SP1_IRQ_CTRL BIT(30) +#define IMGU_IRQCTRL_IRQ_SP2_IRQ_CTRL BIT(31) +#define IMGU_REG_IRQCTRL_EDGE(n) (IMGU_REG_IRQCTRL_BASE(n) + 0x00) +#define IMGU_REG_IRQCTRL_MASK(n) (IMGU_REG_IRQCTRL_BASE(n) + 0x04) +#define IMGU_REG_IRQCTRL_STATUS(n) (IMGU_REG_IRQCTRL_BASE(n) + 0x08) +#define IMGU_REG_IRQCTRL_CLEAR(n) (IMGU_REG_IRQCTRL_BASE(n) + 0x0c) +#define IMGU_REG_IRQCTRL_ENABLE(n) (IMGU_REG_IRQCTRL_BASE(n) + 0x10) +#define IMGU_REG_IRQCTRL_EDGE_NOT_PULSE(n) (IMGU_REG_IRQCTRL_BASE(n) + 0x14) +#define IMGU_REG_IRQCTRL_STR_OUT_ENABLE(n) (IMGU_REG_IRQCTRL_BASE(n) + 0x18) + +#define IMGU_REG_GP_TIMER (IMGU_REG_BASE + 0xa34) + +#define IMGU_REG_SP_DMEM_BASE(n) (IMGU_REG_BASE + (n) * 0x4000 + 0x4000) +#define IMGU_REG_ISP_DMEM_BASE (IMGU_REG_BASE + 0xc000) + +#define IMGU_REG_GDC_BASE (IMGU_REG_BASE + 0x18000) +#define IMGU_REG_GDC_LUT_BASE (IMGU_REG_GDC_BASE + 0x140) +#define IMGU_GDC_LUT_MASK ((1 << 12) - 1) /* Range -1024..+1024 */ + +#define IMGU_SCALER_PHASES 32 +#define IMGU_SCALER_COEFF_BITS 24 +#define IMGU_SCALER_PHASE_COUNTER_PREC_REF 6 +#define IMGU_SCALER_MAX_EXPONENT_SHIFT 3 +#define IMGU_SCALER_FILTER_TAPS 4 +#define IMGU_SCALER_TAPS_Y IMGU_SCALER_FILTER_TAPS +#define IMGU_SCALER_TAPS_UV (IMGU_SCALER_FILTER_TAPS / 2) +#define IMGU_SCALER_FIR_PHASES \ + (IMGU_SCALER_PHASES << IMGU_SCALER_PHASE_COUNTER_PREC_REF) + +/******************* imgu_abi_acc_param *******************/ + +#define IMGU_ABI_SHD_MAX_PROCESS_LINES 31 +#define IMGU_ABI_SHD_MAX_TRANSFERS 31 +#define IMGU_ABI_SHD_MAX_OPERATIONS \ + (IMGU_ABI_SHD_MAX_PROCESS_LINES + IMGU_ABI_SHD_MAX_TRANSFERS) +#define IMGU_ABI_SHD_MAX_CELLS_PER_SET 146 +/* largest grid is 73x56 */ +#define IMGU_ABI_SHD_MAX_CFG_SETS (2 * 28) + +#define IMGU_ABI_DVS_STAT_MAX_OPERATIONS 100 +#define IMGU_ABI_DVS_STAT_MAX_PROCESS_LINES 52 +#define IMGU_ABI_DVS_STAT_MAX_TRANSFERS 52 + +#define IMGU_ABI_BDS_SAMPLE_PATTERN_ARRAY_SIZE 8 +#define IMGU_ABI_BDS_PHASE_COEFFS_ARRAY_SIZE 32 + +#define IMGU_ABI_AWB_FR_MAX_TRANSFERS 30 +#define IMGU_ABI_AWB_FR_MAX_PROCESS_LINES 30 +#define IMGU_ABI_AWB_FR_MAX_OPERATIONS \ + (IMGU_ABI_AWB_FR_MAX_TRANSFERS + IMGU_ABI_AWB_FR_MAX_PROCESS_LINES) + +#define IMGU_ABI_AF_MAX_TRANSFERS 30 +#define IMGU_ABI_AF_MAX_PROCESS_LINES 30 +#define IMGU_ABI_AF_MAX_OPERATIONS \ + (IMGU_ABI_AF_MAX_TRANSFERS + IMGU_ABI_AF_MAX_PROCESS_LINES) + +#define IMGU_ABI_AWB_MAX_PROCESS_LINES 68 +#define IMGU_ABI_AWB_MAX_TRANSFERS 68 +#define IMGU_ABI_AWB_MAX_OPERATIONS \ + (IMGU_ABI_AWB_MAX_PROCESS_LINES + IMGU_ABI_AWB_MAX_TRANSFERS) + +#define IMGU_ABI_OSYS_PIN_VF 0 +#define IMGU_ABI_OSYS_PIN_OUT 1 +#define IMGU_ABI_OSYS_PINS 2 + +#define IMGU_ABI_DVS_STAT_LEVELS 3 +#define IMGU_ABI_YUVP2_YTM_LUT_ENTRIES 256 +#define IMGU_ABI_GDC_FRAC_BITS 8 +#define IMGU_ABI_BINARY_MAX_OUTPUT_PORTS 2 +#define IMGU_ABI_MAX_BINARY_NAME 64 +#define IMGU_ABI_ISP_DDR_WORD_BITS 256 +#define IMGU_ABI_ISP_DDR_WORD_BYTES (IMGU_ABI_ISP_DDR_WORD_BITS / 8) +#define IMGU_ABI_MAX_STAGES 3 +#define IMGU_ABI_MAX_IF_CONFIGS 3 +#define IMGU_ABI_PIPE_CONFIG_ACQUIRE_ISP BIT(31) +#define IMGU_ABI_PORT_CONFIG_TYPE_INPUT_HOST BIT(0) +#define IMGU_ABI_PORT_CONFIG_TYPE_OUTPUT_HOST BIT(4) +#define IMGU_ABI_MAX_SP_THREADS 4 +#define IMGU_ABI_FRAMES_REF 3 +#define IMGU_ABI_FRAMES_TNR 4 +#define IMGU_ABI_BUF_SETS_TNR 1 + +#define IMGU_ABI_EVENT_BUFFER_ENQUEUED(thread, queue) \ + (0 << 24 | (thread) << 16 | (queue) << 8) +#define IMGU_ABI_EVENT_BUFFER_DEQUEUED(queue) (1 << 24 | (queue) << 8) +#define IMGU_ABI_EVENT_EVENT_DEQUEUED (2 << 24) +#define IMGU_ABI_EVENT_START_STREAM (3 << 24) +#define IMGU_ABI_EVENT_STOP_STREAM (4 << 24) +#define IMGU_ABI_EVENT_MIPI_BUFFERS_READY (5 << 24) +#define IMGU_ABI_EVENT_UNLOCK_RAW_BUFFER (6 << 24) +#define IMGU_ABI_EVENT_STAGE_ENABLE_DISABLE (7 << 24) + +#define IMGU_ABI_HOST2SP_BUFQ_SIZE 3 +#define IMGU_ABI_SP2HOST_BUFQ_SIZE (2 * IMGU_ABI_MAX_SP_THREADS) +#define IMGU_ABI_HOST2SP_EVTQ_SIZE (IMGU_ABI_QUEUE_NUM * \ + IMGU_ABI_MAX_SP_THREADS * 2 + IMGU_ABI_MAX_SP_THREADS * 4) +#define IMGU_ABI_SP2HOST_EVTQ_SIZE (6 * IMGU_ABI_MAX_SP_THREADS) + +#define IMGU_ABI_EVTTYPE_EVENT_SHIFT 0 +#define IMGU_ABI_EVTTYPE_EVENT_MASK (0xff << IMGU_ABI_EVTTYPE_EVENT_SHIFT) +#define IMGU_ABI_EVTTYPE_PIPE_SHIFT 8 +#define IMGU_ABI_EVTTYPE_PIPE_MASK (0xff << IMGU_ABI_EVTTYPE_PIPE_SHIFT) +#define IMGU_ABI_EVTTYPE_PIPEID_SHIFT 16 +#define IMGU_ABI_EVTTYPE_PIPEID_MASK (0xff << IMGU_ABI_EVTTYPE_PIPEID_SHIFT) +#define IMGU_ABI_EVTTYPE_MODULEID_SHIFT 8 +#define IMGU_ABI_EVTTYPE_MODULEID_MASK (0xff << IMGU_ABI_EVTTYPE_MODULEID_SHIFT) +#define IMGU_ABI_EVTTYPE_LINENO_SHIFT 16 +#define IMGU_ABI_EVTTYPE_LINENO_MASK (0xffff << IMGU_ABI_EVTTYPE_LINENO_SHIFT) + +/* Output frame ready */ +#define IMGU_ABI_EVTTYPE_OUT_FRAME_DONE 0 +/* Second output frame ready */ +#define IMGU_ABI_EVTTYPE_2ND_OUT_FRAME_DONE 1 +/* Viewfinder Output frame ready */ +#define IMGU_ABI_EVTTYPE_VF_OUT_FRAME_DONE 2 +/* Second viewfinder Output frame ready */ +#define IMGU_ABI_EVTTYPE_2ND_VF_OUT_FRAME_DONE 3 +/* Indication that 3A statistics are available */ +#define IMGU_ABI_EVTTYPE_3A_STATS_DONE 4 +/* Indication that DIS statistics are available */ +#define IMGU_ABI_EVTTYPE_DIS_STATS_DONE 5 +/* Pipeline Done event, sent after last pipeline stage */ +#define IMGU_ABI_EVTTYPE_PIPELINE_DONE 6 +/* Frame tagged */ +#define IMGU_ABI_EVTTYPE_FRAME_TAGGED 7 +/* Input frame ready */ +#define IMGU_ABI_EVTTYPE_INPUT_FRAME_DONE 8 +/* Metadata ready */ +#define IMGU_ABI_EVTTYPE_METADATA_DONE 9 +/* Indication that LACE statistics are available */ +#define IMGU_ABI_EVTTYPE_LACE_STATS_DONE 10 +/* Extension stage executed */ +#define IMGU_ABI_EVTTYPE_ACC_STAGE_COMPLETE 11 +/* Timing measurement data */ +#define IMGU_ABI_EVTTYPE_TIMER 12 +/* End Of Frame event, sent when in buffered sensor mode */ +#define IMGU_ABI_EVTTYPE_PORT_EOF 13 +/* Performance warning encountered by FW */ +#define IMGU_ABI_EVTTYPE_FW_WARNING 14 +/* Assertion hit by FW */ +#define IMGU_ABI_EVTTYPE_FW_ASSERT 15 + +#define IMGU_ABI_NUM_CONTINUOUS_FRAMES 10 +#define IMGU_ABI_SP_COMM_COMMAND 0x00 + +/* + * The host2sp_cmd_ready command is the only command written by the SP + * It acknowledges that is previous command has been received. + * (this does not mean that the command has been executed) + * It also indicates that a new command can be send (it is a queue + * with depth 1). + */ +#define IMGU_ABI_SP_COMM_COMMAND_READY 1 +/* Command written by the Host */ +#define IMGU_ABI_SP_COMM_COMMAND_DUMMY 2 /* No action */ +#define IMGU_ABI_SP_COMM_COMMAND_START_FLASH 3 /* Start the flash */ +#define IMGU_ABI_SP_COMM_COMMAND_TERMINATE 4 /* Terminate */ + +/* n = 0..IPU3_CSS_PIPE_ID_NUM-1 */ +#define IMGU_ABI_SP_COMM_EVENT_IRQ_MASK(n) ((n) * 4 + 0x60) +#define IMGU_ABI_SP_COMM_EVENT_IRQ_MASK_OR_SHIFT 0 +#define IMGU_ABI_SP_COMM_EVENT_IRQ_MASK_AND_SHIFT 16 + +#define IMGU_ABI_BL_DMACMD_TYPE_SP_PMEM 1 /* sp_pmem */ + +/***** For parameter computation *****/ + +#define IMGU_HIVE_OF_SYS_SCALER_TO_FA_OFFSET 0xC +#define IMGU_HIVE_OF_SYS_OF_TO_FA_OFFSET 0x8 +#define IMGU_HIVE_OF_SYS_OF_SYSTEM_NWAYS 32 + +#define IMGU_SCALER_ELEMS_PER_VEC 0x10 +#define IMGU_SCALER_FILTER_TAPS_Y 0x4 +#define IMGU_SCALER_OUT_BPP 0x8 + +#define IMGU_SCALER_MS_TO_OUTFORMACC_SL_ADDR 0x400 +#define IMGU_SCALER_TO_OF_ACK_FA_ADDR \ + (0xC00 + IMGU_HIVE_OF_SYS_SCALER_TO_FA_OFFSET) +#define IMGU_OF_TO_ACK_FA_ADDR (0xC00 + IMGU_HIVE_OF_SYS_OF_TO_FA_OFFSET) +#define IMGU_OUTFORMACC_MS_TO_SCALER_SL_ADDR 0 +#define IMGU_SCALER_INTR_BPP 10 + +#define IMGU_PS_SNR_PRESERVE_BITS 3 +#define IMGU_CNTX_BPP 11 +#define IMGU_SCALER_FILTER_TAPS_UV (IMGU_SCALER_FILTER_TAPS_Y / 2) + +#define IMGU_VMEM2_ELEMS_PER_VEC (IMGU_SCALER_ELEMS_PER_VEC) +#define IMGU_STRIDE_Y (IMGU_SCALER_FILTER_TAPS_Y + 1) +#define IMGU_MAX_FRAME_WIDTH 3840 +#define IMGU_VMEM3_ELEMS_PER_VEC (IMGU_SCALER_ELEMS_PER_VEC) + +#define IMGU_VER_CNTX_WORDS DIV_ROUND_UP((IMGU_SCALER_OUT_BPP + \ + IMGU_PS_SNR_PRESERVE_BITS), IMGU_CNTX_BPP) /* 1 */ +#define IMGU_MAX_INPUT_BLOCK_HEIGHT 64 +#define IMGU_HOR_CNTX_WORDS DIV_ROUND_UP((IMGU_SCALER_INTR_BPP + \ + IMGU_PS_SNR_PRESERVE_BITS), IMGU_CNTX_BPP) /* 2 */ +#define IMGU_MAX_OUTPUT_BLOCK_WIDTH 128 +#define IMGU_CNTX_STRIDE_UV (IMGU_SCALER_FILTER_TAPS_UV + 1) + +#define IMGU_OSYS_DMA_CROP_W_LIMIT 64 +#define IMGU_OSYS_DMA_CROP_H_LIMIT 4 +#define IMGU_OSYS_BLOCK_WIDTH (2 * IPU3_UAPI_ISP_VEC_ELEMS) +#define IMGU_OSYS_BLOCK_HEIGHT 32 +#define IMGU_OSYS_PHASES 0x20 +#define IMGU_OSYS_FILTER_TAPS 0x4 +#define IMGU_OSYS_PHASE_COUNTER_PREC_REF 6 +#define IMGU_OSYS_NUM_INPUT_BUFFERS 2 +#define IMGU_OSYS_FIR_PHASES \ + (IMGU_OSYS_PHASES << IMGU_OSYS_PHASE_COUNTER_PREC_REF) +#define IMGU_OSYS_TAPS_UV (IMGU_OSYS_FILTER_TAPS / 2) +#define IMGU_OSYS_TAPS_Y (IMGU_OSYS_FILTER_TAPS) +#define IMGU_OSYS_NUM_INTERM_BUFFERS 2 + +#define IMGU_VMEM1_Y_SIZE \ + (IMGU_OSYS_BLOCK_HEIGHT * IMGU_VMEM1_Y_STRIDE) +#define IMGU_VMEM1_UV_SIZE (IMGU_VMEM1_Y_SIZE / 4) +#define IMGU_VMEM1_OUT_BUF_ADDR (IMGU_VMEM1_INP_BUF_ADDR + \ + (IMGU_OSYS_NUM_INPUT_BUFFERS * IMGU_VMEM1_BUF_SIZE)) +#define IMGU_OSYS_NUM_OUTPUT_BUFFERS 2 + +/* transpose of input height */ +#define IMGU_VMEM2_VECS_PER_LINE \ + (DIV_ROUND_UP(IMGU_OSYS_BLOCK_HEIGHT, IMGU_VMEM2_ELEMS_PER_VEC)) +/* size in words (vectors) */ +#define IMGU_VMEM2_BUF_SIZE \ + (IMGU_VMEM2_VECS_PER_LINE * IMGU_VMEM2_LINES_PER_BLOCK) +#define IMGU_VMEM3_VER_Y_SIZE \ + ((IMGU_STRIDE_Y * IMGU_MAX_FRAME_WIDTH \ + / IMGU_VMEM3_ELEMS_PER_VEC) * IMGU_VER_CNTX_WORDS) +#define IMGU_VMEM3_HOR_Y_SIZE \ + ((IMGU_STRIDE_Y * IMGU_MAX_INPUT_BLOCK_HEIGHT \ + / IMGU_VMEM3_ELEMS_PER_VEC) * IMGU_HOR_CNTX_WORDS) +#define IMGU_VMEM3_VER_Y_EXTRA \ + ((IMGU_STRIDE_Y * IMGU_MAX_OUTPUT_BLOCK_WIDTH \ + / IMGU_VMEM3_ELEMS_PER_VEC) * IMGU_VER_CNTX_WORDS) +#define IMGU_VMEM3_VER_U_SIZE \ + (((IMGU_CNTX_STRIDE_UV * IMGU_MAX_FRAME_WIDTH \ + / IMGU_VMEM3_ELEMS_PER_VEC) * IMGU_VER_CNTX_WORDS) / 2) +#define IMGU_VMEM3_HOR_U_SIZE \ + (((IMGU_STRIDE_Y * IMGU_MAX_INPUT_BLOCK_HEIGHT \ + / IMGU_VMEM3_ELEMS_PER_VEC) * IMGU_HOR_CNTX_WORDS) / 2) +#define IMGU_VMEM3_VER_U_EXTRA \ + (((IMGU_CNTX_STRIDE_UV * IMGU_MAX_OUTPUT_BLOCK_WIDTH \ + / IMGU_VMEM3_ELEMS_PER_VEC) * IMGU_VER_CNTX_WORDS) / 2) +#define IMGU_VMEM3_VER_V_SIZE \ + (((IMGU_CNTX_STRIDE_UV * IMGU_MAX_FRAME_WIDTH \ + / IMGU_VMEM3_ELEMS_PER_VEC) * IMGU_VER_CNTX_WORDS) / 2) + +#define IMGU_ISP_VEC_NELEMS 64 +#define IMGU_LUMA_TO_CHROMA_RATIO 2 +#define IMGU_INPUT_BLOCK_WIDTH (128) +#define IMGU_FIFO_ADDR_SCALER_TO_FMT \ + (IMGU_SCALER_MS_TO_OUTFORMACC_SL_ADDR >> 2) +#define IMGU_FIFO_ADDR_SCALER_TO_SP (IMGU_SCALER_TO_OF_ACK_FA_ADDR >> 2) +#define IMGU_VMEM1_INP_BUF_ADDR 0 +#define IMGU_VMEM1_Y_STRIDE \ + (IMGU_OSYS_BLOCK_WIDTH / IMGU_VMEM1_ELEMS_PER_VEC) +#define IMGU_VMEM1_BUF_SIZE (IMGU_VMEM1_V_OFFSET + IMGU_VMEM1_UV_SIZE) + +#define IMGU_VMEM1_U_OFFSET (IMGU_VMEM1_Y_SIZE) +#define IMGU_VMEM1_V_OFFSET (IMGU_VMEM1_U_OFFSET + IMGU_VMEM1_UV_SIZE) +#define IMGU_VMEM1_UV_STRIDE (IMGU_VMEM1_Y_STRIDE / 2) +#define IMGU_VMEM1_INT_BUF_ADDR (IMGU_VMEM1_OUT_BUF_ADDR + \ + (IMGU_OSYS_NUM_OUTPUT_BUFFERS * IMGU_VMEM1_BUF_SIZE)) + +#define IMGU_VMEM1_ELEMS_PER_VEC (IMGU_HIVE_OF_SYS_OF_SYSTEM_NWAYS) +#define IMGU_VMEM2_BUF_Y_ADDR 0 +#define IMGU_VMEM2_BUF_Y_STRIDE (IMGU_VMEM2_VECS_PER_LINE) +#define IMGU_VMEM2_BUF_U_ADDR \ + (IMGU_VMEM2_BUF_Y_ADDR + IMGU_VMEM2_BUF_SIZE) +#define IMGU_VMEM2_BUF_V_ADDR \ + (IMGU_VMEM2_BUF_U_ADDR + IMGU_VMEM2_BUF_SIZE / 4) +#define IMGU_VMEM2_BUF_UV_STRIDE (IMGU_VMEM2_VECS_PER_LINE / 2) +/* 1.5 x depth of intermediate buffer */ +#define IMGU_VMEM2_LINES_PER_BLOCK 192 +#define IMGU_VMEM3_HOR_Y_ADDR \ + (IMGU_VMEM3_VER_Y_ADDR + IMGU_VMEM3_VER_Y_SIZE) +#define IMGU_VMEM3_HOR_U_ADDR \ + (IMGU_VMEM3_VER_U_ADDR + IMGU_VMEM3_VER_U_SIZE) +#define IMGU_VMEM3_HOR_V_ADDR \ + (IMGU_VMEM3_VER_V_ADDR + IMGU_VMEM3_VER_V_SIZE) +#define IMGU_VMEM3_VER_Y_ADDR 0 +#define IMGU_VMEM3_VER_U_ADDR \ + (IMGU_VMEM3_VER_Y_ADDR + IMGU_VMEM3_VER_Y_SIZE + \ + max(IMGU_VMEM3_HOR_Y_SIZE, IMGU_VMEM3_VER_Y_EXTRA)) +#define IMGU_VMEM3_VER_V_ADDR \ + (IMGU_VMEM3_VER_U_ADDR + IMGU_VMEM3_VER_U_SIZE + \ + max(IMGU_VMEM3_HOR_U_SIZE, IMGU_VMEM3_VER_U_EXTRA)) +#define IMGU_FIFO_ADDR_FMT_TO_SP (IMGU_OF_TO_ACK_FA_ADDR >> 2) +#define IMGU_FIFO_ADDR_FMT_TO_SCALER (IMGU_OUTFORMACC_MS_TO_SCALER_SL_ADDR >> 2) +#define IMGU_VMEM1_HST_BUF_ADDR (IMGU_VMEM1_INT_BUF_ADDR + \ + (IMGU_OSYS_NUM_INTERM_BUFFERS * IMGU_VMEM1_BUF_SIZE)) +#define IMGU_VMEM1_HST_BUF_STRIDE 120 +#define IMGU_VMEM1_HST_BUF_NLINES 3 + +enum imgu_abi_frame_format { + IMGU_ABI_FRAME_FORMAT_NV11, /* 12 bit YUV 411, Y, UV plane */ + IMGU_ABI_FRAME_FORMAT_NV12, /* 12 bit YUV 420, Y, UV plane */ + IMGU_ABI_FRAME_FORMAT_NV12_16, /* 16 bit YUV 420, Y, UV plane */ + IMGU_ABI_FRAME_FORMAT_NV12_TILEY,/* 12 bit YUV 420,Intel tiled format */ + IMGU_ABI_FRAME_FORMAT_NV16, /* 16 bit YUV 422, Y, UV plane */ + IMGU_ABI_FRAME_FORMAT_NV21, /* 12 bit YUV 420, Y, VU plane */ + IMGU_ABI_FRAME_FORMAT_NV61, /* 16 bit YUV 422, Y, VU plane */ + IMGU_ABI_FRAME_FORMAT_YV12, /* 12 bit YUV 420, Y, V, U plane */ + IMGU_ABI_FRAME_FORMAT_YV16, /* 16 bit YUV 422, Y, V, U plane */ + IMGU_ABI_FRAME_FORMAT_YUV420, /* 12 bit YUV 420, Y, U, V plane */ + IMGU_ABI_FRAME_FORMAT_YUV420_16,/* yuv420, 16 bits per subpixel */ + IMGU_ABI_FRAME_FORMAT_YUV422, /* 16 bit YUV 422, Y, U, V plane */ + IMGU_ABI_FRAME_FORMAT_YUV422_16,/* yuv422, 16 bits per subpixel */ + IMGU_ABI_FRAME_FORMAT_UYVY, /* 16 bit YUV 422, UYVY interleaved */ + IMGU_ABI_FRAME_FORMAT_YUYV, /* 16 bit YUV 422, YUYV interleaved */ + IMGU_ABI_FRAME_FORMAT_YUV444, /* 24 bit YUV 444, Y, U, V plane */ + IMGU_ABI_FRAME_FORMAT_YUV_LINE, /* Internal format, 2 y lines */ + /* followed by a uv-interleaved line */ + IMGU_ABI_FRAME_FORMAT_RAW, /* RAW, 1 plane */ + IMGU_ABI_FRAME_FORMAT_RGB565, /* 16 bit RGB, 1 plane. Each 3 sub + * pixels are packed into one 16 bit + * value, 5 bits for R, 6 bits for G + * and 5 bits for B. + */ + IMGU_ABI_FRAME_FORMAT_PLANAR_RGB888, /* 24 bit RGB, 3 planes */ + IMGU_ABI_FRAME_FORMAT_RGBA888, /* 32 bit RGBA, 1 plane, A=Alpha + * (alpha is unused) + */ + IMGU_ABI_FRAME_FORMAT_QPLANE6, /* Internal, for advanced ISP */ + IMGU_ABI_FRAME_FORMAT_BINARY_8, /* byte stream, used for jpeg. For + * frames of this type, we set the + * height to 1 and the width to the + * number of allocated bytes. + */ + IMGU_ABI_FRAME_FORMAT_MIPI, /* MIPI frame, 1 plane */ + IMGU_ABI_FRAME_FORMAT_RAW_PACKED, /* RAW, 1 plane, packed */ + IMGU_ABI_FRAME_FORMAT_CSI_MIPI_YUV420_8, /* 8 bit per Y/U/V. Y odd line + * UYVY interleaved even line + */ + IMGU_ABI_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8, /* Legacy YUV420. + * UY odd line; + * VY even line + */ + IMGU_ABI_FRAME_FORMAT_CSI_MIPI_YUV420_10,/* 10 bit per Y/U/V. Y odd + * line; UYVY interleaved + * even line + */ + IMGU_ABI_FRAME_FORMAT_YCGCO444_16, /* Internal format for ISP2.7, + * 16 bits per plane YUV 444, + * Y, U, V plane + */ + IMGU_ABI_FRAME_FORMAT_NUM +}; + +enum imgu_abi_bayer_order { + IMGU_ABI_BAYER_ORDER_GRBG, + IMGU_ABI_BAYER_ORDER_RGGB, + IMGU_ABI_BAYER_ORDER_BGGR, + IMGU_ABI_BAYER_ORDER_GBRG +}; + +enum imgu_abi_osys_format { + IMGU_ABI_OSYS_FORMAT_YUV420, + IMGU_ABI_OSYS_FORMAT_YV12, + IMGU_ABI_OSYS_FORMAT_NV12, + IMGU_ABI_OSYS_FORMAT_NV21, + IMGU_ABI_OSYS_FORMAT_YUV_LINE, + IMGU_ABI_OSYS_FORMAT_YUY2, /* = IMGU_ABI_OSYS_FORMAT_YUYV */ + IMGU_ABI_OSYS_FORMAT_NV16, + IMGU_ABI_OSYS_FORMAT_RGBA, + IMGU_ABI_OSYS_FORMAT_BGRA +}; + +enum imgu_abi_osys_tiling { + IMGU_ABI_OSYS_TILING_NONE, + IMGU_ABI_OSYS_TILING_Y, + IMGU_ABI_OSYS_TILING_YF, +}; + +enum imgu_abi_osys_procmode { + IMGU_ABI_OSYS_PROCMODE_BYPASS, + IMGU_ABI_OSYS_PROCMODE_UPSCALE, + IMGU_ABI_OSYS_PROCMODE_DOWNSCALE, +}; + +enum imgu_abi_queue_id { + IMGU_ABI_QUEUE_EVENT_ID = -1, + IMGU_ABI_QUEUE_A_ID = 0, + IMGU_ABI_QUEUE_B_ID, + IMGU_ABI_QUEUE_C_ID, + IMGU_ABI_QUEUE_D_ID, + IMGU_ABI_QUEUE_E_ID, + IMGU_ABI_QUEUE_F_ID, + IMGU_ABI_QUEUE_G_ID, + IMGU_ABI_QUEUE_H_ID, /* input frame queue for skycam */ + IMGU_ABI_QUEUE_NUM +}; + +enum imgu_abi_buffer_type { + IMGU_ABI_BUFFER_TYPE_INVALID = -1, + IMGU_ABI_BUFFER_TYPE_3A_STATISTICS = 0, + IMGU_ABI_BUFFER_TYPE_DIS_STATISTICS, + IMGU_ABI_BUFFER_TYPE_LACE_STATISTICS, + IMGU_ABI_BUFFER_TYPE_INPUT_FRAME, + IMGU_ABI_BUFFER_TYPE_OUTPUT_FRAME, + IMGU_ABI_BUFFER_TYPE_SEC_OUTPUT_FRAME, + IMGU_ABI_BUFFER_TYPE_VF_OUTPUT_FRAME, + IMGU_ABI_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME, + IMGU_ABI_BUFFER_TYPE_RAW_OUTPUT_FRAME, + IMGU_ABI_BUFFER_TYPE_CUSTOM_INPUT, + IMGU_ABI_BUFFER_TYPE_CUSTOM_OUTPUT, + IMGU_ABI_BUFFER_TYPE_METADATA, + IMGU_ABI_BUFFER_TYPE_PARAMETER_SET, + IMGU_ABI_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, + IMGU_ABI_NUM_DYNAMIC_BUFFER_TYPE, + IMGU_ABI_NUM_BUFFER_TYPE +}; + +enum imgu_abi_raw_type { + IMGU_ABI_RAW_TYPE_BAYER, + IMGU_ABI_RAW_TYPE_IR_ON_GR, + IMGU_ABI_RAW_TYPE_IR_ON_GB +}; + +enum imgu_abi_memories { + IMGU_ABI_MEM_ISP_PMEM0 = 0, + IMGU_ABI_MEM_ISP_DMEM0, + IMGU_ABI_MEM_ISP_VMEM0, + IMGU_ABI_MEM_ISP_VAMEM0, + IMGU_ABI_MEM_ISP_VAMEM1, + IMGU_ABI_MEM_ISP_VAMEM2, + IMGU_ABI_MEM_ISP_HMEM0, + IMGU_ABI_MEM_SP0_DMEM0, + IMGU_ABI_MEM_SP1_DMEM0, + IMGU_ABI_MEM_DDR, + IMGU_ABI_NUM_MEMORIES +}; + +enum imgu_abi_param_class { + IMGU_ABI_PARAM_CLASS_PARAM, /* Late binding parameters, like 3A */ + IMGU_ABI_PARAM_CLASS_CONFIG, /* Pipe config time parameters */ + IMGU_ABI_PARAM_CLASS_STATE, /* State parameters, eg. buffer index */ + IMGU_ABI_PARAM_CLASS_NUM +}; + +enum imgu_abi_bin_input_src { + IMGU_ABI_BINARY_INPUT_SOURCE_SENSOR, + IMGU_ABI_BINARY_INPUT_SOURCE_MEMORY, + IMGU_ABI_BINARY_INPUT_SOURCE_VARIABLE, +}; + +enum imgu_abi_sp_swstate { + IMGU_ABI_SP_SWSTATE_TERMINATED, + IMGU_ABI_SP_SWSTATE_INITIALIZED, + IMGU_ABI_SP_SWSTATE_CONNECTED, + IMGU_ABI_SP_SWSTATE_RUNNING, +}; + +enum imgu_abi_bl_swstate { + IMGU_ABI_BL_SWSTATE_OK = 0x100, + IMGU_ABI_BL_SWSTATE_BUSY, + IMGU_ABI_BL_SWSTATE_ERR, +}; + +/* The type of pipe stage */ +enum imgu_abi_stage_type { + IMGU_ABI_STAGE_TYPE_SP, + IMGU_ABI_STAGE_TYPE_ISP, +}; + +struct imgu_abi_acc_operation { + /* + * zero means on init, + * others mean upon receiving an ack signal from the BC acc. + */ + u8 op_indicator; + u8 op_type; +} __packed; + +struct imgu_abi_acc_process_lines_cmd_data { + u16 lines; + u8 cfg_set; + u8 reserved; /* Align to 4 bytes */ +} __packed; + +/* Bayer shading definitions */ + +struct imgu_abi_shd_transfer_luts_set_data { + u8 set_number; + u8 padding[3]; + imgu_addr_t rg_lut_ddr_addr; + imgu_addr_t bg_lut_ddr_addr; + u32 align_dummy; +} __packed; + +struct imgu_abi_shd_grid_config { + /* reg 0 */ + u32 grid_width:8; + u32 grid_height:8; + u32 block_width:3; + u32 reserved0:1; + u32 block_height:3; + u32 reserved1:1; + u32 grid_height_per_slice:8; + /* reg 1 */ + s32 x_start:13; + s32 reserved2:3; + s32 y_start:13; + s32 reserved3:3; +} __packed; + +struct imgu_abi_shd_general_config { + u32 init_set_vrt_offst_ul:8; + u32 shd_enable:1; + /* aka 'gf' */ + u32 gain_factor:2; + u32 reserved:21; +} __packed; + +struct imgu_abi_shd_black_level_config { + /* reg 0 */ + s32 bl_r:12; + s32 reserved0:4; + s32 bl_gr:12; + u32 reserved1:1; + /* aka 'nf' */ + u32 normalization_shift:3; + /* reg 1 */ + s32 bl_gb:12; + s32 reserved2:4; + s32 bl_b:12; + s32 reserved3:4; +} __packed; + +struct imgu_abi_shd_intra_frame_operations_data { + struct imgu_abi_acc_operation + operation_list[IMGU_ABI_SHD_MAX_OPERATIONS] __aligned(32); + struct imgu_abi_acc_process_lines_cmd_data + process_lines_data[IMGU_ABI_SHD_MAX_PROCESS_LINES] __aligned(32); + struct imgu_abi_shd_transfer_luts_set_data + transfer_data[IMGU_ABI_SHD_MAX_TRANSFERS] __aligned(32); +} __packed; + +struct imgu_abi_shd_config { + struct ipu3_uapi_shd_config_static shd __aligned(32); + struct imgu_abi_shd_intra_frame_operations_data shd_ops __aligned(32); + struct ipu3_uapi_shd_lut shd_lut __aligned(32); +} __packed; + +struct imgu_abi_stripe_input_frame_resolution { + u16 width; + u16 height; + u32 bayer_order; /* enum ipu3_uapi_bayer_order */ + u32 raw_bit_depth; +} __packed; + +/* Stripe-based processing */ + +struct imgu_abi_stripes { + /* offset from start of frame - measured in pixels */ + u16 offset; + /* stripe width - measured in pixels */ + u16 width; + /* stripe width - measured in pixels */ + u16 height; +} __packed; + +struct imgu_abi_stripe_data { + /* + * number of stripes for current processing source + * - VLIW binary parameter we currently support 1 or 2 stripes + */ + u16 num_of_stripes; + + u8 padding[2]; + + /* + * the following data is derived from resolution-related + * pipe config and from num_of_stripes + */ + + /* + *'input-stripes' - before input cropping + * used by input feeder + */ + struct imgu_abi_stripe_input_frame_resolution input_frame; + + /*'effective-stripes' - after input cropping used dpc, bds */ + struct imgu_abi_stripes effective_stripes[IPU3_UAPI_MAX_STRIPES]; + + /* 'down-scaled-stripes' - after down-scaling ONLY. used by BDS */ + struct imgu_abi_stripes down_scaled_stripes[IPU3_UAPI_MAX_STRIPES]; + + /* + *'bds-out-stripes' - after bayer down-scaling and padding. + * used by all algos starting with norm up to the ref-frame for GDC + * (currently up to the output kernel) + */ + struct imgu_abi_stripes bds_out_stripes[IPU3_UAPI_MAX_STRIPES]; + + /* 'bds-out-stripes (no overlap)' - used for ref kernel */ + struct imgu_abi_stripes + bds_out_stripes_no_overlap[IPU3_UAPI_MAX_STRIPES]; + + /* + * input resolution for output system (equal to bds_out - envelope) + * output-system input frame width as configured by user + */ + u16 output_system_in_frame_width; + /* output-system input frame height as configured by user */ + u16 output_system_in_frame_height; + + /* + * 'output-stripes' - accounts for stiching on the output (no overlap) + * used by the output kernel + */ + struct imgu_abi_stripes output_stripes[IPU3_UAPI_MAX_STRIPES]; + + /* + * 'block-stripes' - accounts for stiching by the output system + * (1 or more blocks overlap) + * used by DVS, TNR and the output system kernel + */ + struct imgu_abi_stripes block_stripes[IPU3_UAPI_MAX_STRIPES]; + + u16 effective_frame_width; /* Needed for vertical cropping */ + u16 bds_frame_width; + u16 out_frame_width; /* Output frame width as configured by user */ + u16 out_frame_height; /* Output frame height as configured by user */ + + /* GDC in buffer (A.K.A delay frame,ref buffer) info */ + u16 gdc_in_buffer_width; /* GDC in buffer width */ + u16 gdc_in_buffer_height; /* GDC in buffer height */ + /* GDC in buffer first valid pixel x offset */ + u16 gdc_in_buffer_offset_x; + /* GDC in buffer first valid pixel y offset */ + u16 gdc_in_buffer_offset_y; + + /* Display frame width as configured by user */ + u16 display_frame_width; + /* Display frame height as configured by user */ + u16 display_frame_height; + u16 bds_aligned_frame_width; + /* Number of vectors to left-crop when writing stripes (not stripe 0) */ + u16 half_overlap_vectors; + /* Decimate ISP and fixed func resolutions after BDS (ir_extraction) */ + u16 ir_ext_decimation; + u8 padding1[2]; +} __packed; + +/* Input feeder related structs */ + +struct imgu_abi_input_feeder_data { + u32 row_stride; /* row stride */ + u32 start_row_address; /* start row address */ + u32 start_pixel; /* start pixel */ +} __packed; + +struct imgu_abi_input_feeder_data_aligned { + struct imgu_abi_input_feeder_data data __aligned(32); +} __packed; + +struct imgu_abi_input_feeder_data_per_stripe { + struct imgu_abi_input_feeder_data_aligned + input_feeder_data[IPU3_UAPI_MAX_STRIPES]; +} __packed; + +struct imgu_abi_input_feeder_config { + struct imgu_abi_input_feeder_data data; + struct imgu_abi_input_feeder_data_per_stripe data_per_stripe + __aligned(32); +} __packed; + +/* DVS related definitions */ + +struct imgu_abi_dvs_stat_grd_config { + u8 grid_width; + u8 grid_height; + u8 block_width; + u8 block_height; + u16 x_start; + u16 y_start; + u16 enable; + u16 x_end; + u16 y_end; +} __packed; + +struct imgu_abi_dvs_stat_cfg { + u8 reserved0[4]; + struct imgu_abi_dvs_stat_grd_config + grd_config[IMGU_ABI_DVS_STAT_LEVELS]; + u8 reserved1[18]; +} __packed; + +struct imgu_abi_dvs_stat_transfer_op_data { + u8 set_number; +} __packed; + +struct imgu_abi_dvs_stat_intra_frame_operations_data { + struct imgu_abi_acc_operation + ops[IMGU_ABI_DVS_STAT_MAX_OPERATIONS] __aligned(32); + struct imgu_abi_acc_process_lines_cmd_data + process_lines_data[IMGU_ABI_DVS_STAT_MAX_PROCESS_LINES] + __aligned(32); + struct imgu_abi_dvs_stat_transfer_op_data + transfer_data[IMGU_ABI_DVS_STAT_MAX_TRANSFERS] __aligned(32); +} __packed; + +struct imgu_abi_dvs_stat_config { + struct imgu_abi_dvs_stat_cfg cfg __aligned(32); + u8 reserved0[128]; + struct imgu_abi_dvs_stat_intra_frame_operations_data operations_data; + u8 reserved1[64]; +} __packed; + +/* Y-tone Mapping */ + +struct imgu_abi_yuvp2_y_tm_lut_static_config { + u16 entries[IMGU_ABI_YUVP2_YTM_LUT_ENTRIES]; + u32 enable; +} __packed; + +/* Output formatter related structs */ + +struct imgu_abi_osys_formatter_params { + u32 format; + u32 flip; + u32 mirror; + u32 tiling; + u32 reduce_range; + u32 alpha_blending; + u32 release_inp_addr; + u32 release_inp_en; + u32 process_out_buf_addr; + u32 image_width_vecs; + u32 image_height_lines; + u32 inp_buff_y_st_addr; + u32 inp_buff_y_line_stride; + u32 inp_buff_y_buffer_stride; + u32 int_buff_u_st_addr; + u32 int_buff_v_st_addr; + u32 inp_buff_uv_line_stride; + u32 inp_buff_uv_buffer_stride; + u32 out_buff_level; + u32 out_buff_nr_y_lines; + u32 out_buff_u_st_offset; + u32 out_buff_v_st_offset; + u32 out_buff_y_line_stride; + u32 out_buff_uv_line_stride; + u32 hist_buff_st_addr; + u32 hist_buff_line_stride; + u32 hist_buff_nr_lines; +} __packed; + +struct imgu_abi_osys_formatter { + struct imgu_abi_osys_formatter_params param __aligned(32); +} __packed; + +struct imgu_abi_osys_scaler_params { + u32 inp_buf_y_st_addr; + u32 inp_buf_y_line_stride; + u32 inp_buf_y_buffer_stride; + u32 inp_buf_u_st_addr; + u32 inp_buf_v_st_addr; + u32 inp_buf_uv_line_stride; + u32 inp_buf_uv_buffer_stride; + u32 inp_buf_chunk_width; + u32 inp_buf_nr_buffers; + /* Output buffers */ + u32 out_buf_y_st_addr; + u32 out_buf_y_line_stride; + u32 out_buf_y_buffer_stride; + u32 out_buf_u_st_addr; + u32 out_buf_v_st_addr; + u32 out_buf_uv_line_stride; + u32 out_buf_uv_buffer_stride; + u32 out_buf_nr_buffers; + /* Intermediate buffers */ + u32 int_buf_y_st_addr; + u32 int_buf_y_line_stride; + u32 int_buf_u_st_addr; + u32 int_buf_v_st_addr; + u32 int_buf_uv_line_stride; + u32 int_buf_height; + u32 int_buf_chunk_width; + u32 int_buf_chunk_height; + /* Context buffers */ + u32 ctx_buf_hor_y_st_addr; + u32 ctx_buf_hor_u_st_addr; + u32 ctx_buf_hor_v_st_addr; + u32 ctx_buf_ver_y_st_addr; + u32 ctx_buf_ver_u_st_addr; + u32 ctx_buf_ver_v_st_addr; + /* Addresses for release-input and process-output tokens */ + u32 release_inp_buf_addr; + u32 release_inp_buf_en; + u32 release_out_buf_en; + u32 process_out_buf_addr; + /* Settings dimensions, padding, cropping */ + u32 input_image_y_width; + u32 input_image_y_height; + u32 input_image_y_start_column; + u32 input_image_uv_start_column; + u32 input_image_y_left_pad; + u32 input_image_uv_left_pad; + u32 input_image_y_right_pad; + u32 input_image_uv_right_pad; + u32 input_image_y_top_pad; + u32 input_image_uv_top_pad; + u32 input_image_y_bottom_pad; + u32 input_image_uv_bottom_pad; + u32 processing_mode; /* enum imgu_abi_osys_procmode */ + u32 scaling_ratio; + u32 y_left_phase_init; + u32 uv_left_phase_init; + u32 y_top_phase_init; + u32 uv_top_phase_init; + u32 coeffs_exp_shift; + u32 out_y_left_crop; + u32 out_uv_left_crop; + u32 out_y_top_crop; + u32 out_uv_top_crop; +} __packed; + +struct imgu_abi_osys_scaler { + struct imgu_abi_osys_scaler_params param __aligned(32); +} __packed; + +struct imgu_abi_osys_frame_params { + /* Output pins */ + u32 enable; + u32 format; /* enum imgu_abi_osys_format */ + u32 flip; + u32 mirror; + u32 tiling; /* enum imgu_abi_osys_tiling */ + u32 width; + u32 height; + u32 stride; + u32 scaled; +} __packed; + +struct imgu_abi_osys_frame { + struct imgu_abi_osys_frame_params param __aligned(32); +} __packed; + +struct imgu_abi_osys_stripe { + /* Input resolution */ + u32 input_width; + u32 input_height; + /* Output Stripe */ + u32 output_width[IMGU_ABI_OSYS_PINS]; + u32 output_height[IMGU_ABI_OSYS_PINS]; + u32 output_offset[IMGU_ABI_OSYS_PINS]; + u32 buf_stride[IMGU_ABI_OSYS_PINS]; + /* Scaler params */ + u32 block_width; + u32 block_height; + /* Output Crop factor */ + u32 crop_top[IMGU_ABI_OSYS_PINS]; + u32 crop_left[IMGU_ABI_OSYS_PINS]; +} __packed; + +struct imgu_abi_osys_config { + struct imgu_abi_osys_formatter + formatter[IPU3_UAPI_MAX_STRIPES][IMGU_ABI_OSYS_PINS]; + struct imgu_abi_osys_scaler scaler[IPU3_UAPI_MAX_STRIPES]; + struct imgu_abi_osys_frame frame[IMGU_ABI_OSYS_PINS]; + struct imgu_abi_osys_stripe stripe[IPU3_UAPI_MAX_STRIPES]; + /* 32 packed coefficients for luma and chroma */ + s8 scaler_coeffs_chroma[128]; + s8 scaler_coeffs_luma[128]; +} __packed; + +/* BDS */ + +struct imgu_abi_bds_hor_ctrl0 { + u32 sample_patrn_length:9; + u32 reserved0:3; + u32 hor_ds_en:1; + u32 min_clip_val:1; + u32 max_clip_val:2; + u32 out_frame_width:13; + u32 reserved1:3; +} __packed; + +struct imgu_abi_bds_ptrn_arr { + u32 elems[IMGU_ABI_BDS_SAMPLE_PATTERN_ARRAY_SIZE]; +} __packed; + +struct imgu_abi_bds_phase_entry { + s8 coeff_min2; + s8 coeff_min1; + s8 coeff_0; + s8 nf; + s8 coeff_pls1; + s8 coeff_pls2; + s8 coeff_pls3; + u8 reserved; +} __packed; + +struct imgu_abi_bds_phase_arr { + struct imgu_abi_bds_phase_entry + even[IMGU_ABI_BDS_PHASE_COEFFS_ARRAY_SIZE]; + struct imgu_abi_bds_phase_entry + odd[IMGU_ABI_BDS_PHASE_COEFFS_ARRAY_SIZE]; +} __packed; + +struct imgu_abi_bds_hor_ctrl1 { + u32 hor_crop_start:13; + u32 reserved0:3; + u32 hor_crop_end:13; + u32 reserved1:1; + u32 hor_crop_en:1; + u32 reserved2:1; +} __packed; + +struct imgu_abi_bds_hor_ctrl2 { + u32 input_frame_height:13; + u32 reserved0:19; +} __packed; + +struct imgu_abi_bds_hor { + struct imgu_abi_bds_hor_ctrl0 hor_ctrl0; + struct imgu_abi_bds_ptrn_arr hor_ptrn_arr; + struct imgu_abi_bds_phase_arr hor_phase_arr; + struct imgu_abi_bds_hor_ctrl1 hor_ctrl1; + struct imgu_abi_bds_hor_ctrl2 hor_ctrl2; +} __packed; + +struct imgu_abi_bds_ver_ctrl0 { + u32 sample_patrn_length:9; + u32 reserved0:3; + u32 ver_ds_en:1; + u32 min_clip_val:1; + u32 max_clip_val:2; + u32 reserved1:16; +} __packed; + +struct imgu_abi_bds_ver_ctrl1 { + u32 out_frame_width:13; + u32 reserved0:3; + u32 out_frame_height:13; + u32 reserved1:3; +} __packed; + +struct imgu_abi_bds_ver { + struct imgu_abi_bds_ver_ctrl0 ver_ctrl0; + struct imgu_abi_bds_ptrn_arr ver_ptrn_arr; + struct imgu_abi_bds_phase_arr ver_phase_arr; + struct imgu_abi_bds_ver_ctrl1 ver_ctrl1; +} __packed; + +struct imgu_abi_bds_per_stripe_data { + struct imgu_abi_bds_hor_ctrl0 hor_ctrl0; + struct imgu_abi_bds_ver_ctrl1 ver_ctrl1; + struct imgu_abi_bds_hor_ctrl1 crop; +} __packed; + +struct imgu_abi_bds_per_stripe_data_aligned { + struct imgu_abi_bds_per_stripe_data data __aligned(32); +} __packed; + +struct imgu_abi_bds_per_stripe { + struct imgu_abi_bds_per_stripe_data_aligned + aligned_data[IPU3_UAPI_MAX_STRIPES]; +} __packed; + +struct imgu_abi_bds_config { + struct imgu_abi_bds_hor hor __aligned(32); + struct imgu_abi_bds_ver ver __aligned(32); + struct imgu_abi_bds_per_stripe per_stripe __aligned(32); + u32 enabled; +} __packed; + +/* ANR */ + +struct imgu_abi_anr_search_config { + u32 enable; + u16 frame_width; + u16 frame_height; +} __packed; + +struct imgu_abi_anr_stitch_config { + u32 anr_stitch_en; + u16 frame_width; + u16 frame_height; + u8 reserved[40]; + struct ipu3_uapi_anr_stitch_pyramid pyramid[IPU3_UAPI_ANR_PYRAMID_SIZE]; +} __packed; + +struct imgu_abi_anr_tile2strm_config { + u32 enable; + u16 frame_width; + u16 frame_height; +} __packed; + +struct imgu_abi_anr_config { + struct imgu_abi_anr_search_config search __aligned(32); + struct ipu3_uapi_anr_transform_config transform __aligned(32); + struct imgu_abi_anr_stitch_config stitch __aligned(32); + struct imgu_abi_anr_tile2strm_config tile2strm __aligned(32); +} __packed; + +/* AF */ + +struct imgu_abi_af_frame_size { + u16 width; + u16 height; +} __packed; + +struct imgu_abi_af_config_s { + struct ipu3_uapi_af_filter_config filter_config __aligned(32); + struct imgu_abi_af_frame_size frame_size; + struct ipu3_uapi_grid_config grid_cfg __aligned(32); +} __packed; + +struct imgu_abi_af_intra_frame_operations_data { + struct imgu_abi_acc_operation ops[IMGU_ABI_AF_MAX_OPERATIONS] + __aligned(32); + struct imgu_abi_acc_process_lines_cmd_data + process_lines_data[IMGU_ABI_AF_MAX_PROCESS_LINES] __aligned(32); +} __packed; + +struct imgu_abi_af_stripe_config { + struct imgu_abi_af_frame_size frame_size __aligned(32); + struct ipu3_uapi_grid_config grid_cfg __aligned(32); +} __packed; + +struct imgu_abi_af_config { + struct imgu_abi_af_config_s config; + struct imgu_abi_af_intra_frame_operations_data operations_data; + struct imgu_abi_af_stripe_config stripes[IPU3_UAPI_MAX_STRIPES]; +} __packed; + +/* AE */ + +struct imgu_abi_ae_config { + struct ipu3_uapi_ae_grid_config grid_cfg __aligned(32); + struct ipu3_uapi_ae_weight_elem weights[IPU3_UAPI_AE_WEIGHTS] + __aligned(32); + struct ipu3_uapi_ae_ccm ae_ccm __aligned(32); + struct { + struct ipu3_uapi_ae_grid_config grid __aligned(32); + } stripes[IPU3_UAPI_MAX_STRIPES]; +} __packed; + +/* AWB_FR */ + +struct imgu_abi_awb_fr_intra_frame_operations_data { + struct imgu_abi_acc_operation ops[IMGU_ABI_AWB_FR_MAX_OPERATIONS] + __aligned(32); + struct imgu_abi_acc_process_lines_cmd_data + process_lines_data[IMGU_ABI_AWB_FR_MAX_PROCESS_LINES] __aligned(32); +} __packed; + +struct imgu_abi_awb_fr_config { + struct ipu3_uapi_awb_fr_config_s config; + struct imgu_abi_awb_fr_intra_frame_operations_data operations_data; + struct ipu3_uapi_awb_fr_config_s stripes[IPU3_UAPI_MAX_STRIPES]; +} __packed; + +struct imgu_abi_acc_transfer_op_data { + u8 set_number; +} __packed; + +struct imgu_abi_awb_intra_frame_operations_data { + struct imgu_abi_acc_operation ops[IMGU_ABI_AWB_MAX_OPERATIONS] + __aligned(32); + struct imgu_abi_acc_process_lines_cmd_data + process_lines_data[IMGU_ABI_AWB_MAX_PROCESS_LINES] __aligned(32); + struct imgu_abi_acc_transfer_op_data + transfer_data[IMGU_ABI_AWB_MAX_TRANSFERS] __aligned(32); +} __aligned(32) __packed; + +struct imgu_abi_awb_config { + struct ipu3_uapi_awb_config_s config __aligned(32); + struct imgu_abi_awb_intra_frame_operations_data operations_data; + struct ipu3_uapi_awb_config_s stripes[IPU3_UAPI_MAX_STRIPES]; +} __packed; + +struct imgu_abi_acc_param { + struct imgu_abi_stripe_data stripe; + u8 padding[8]; + struct imgu_abi_input_feeder_config input_feeder; + struct ipu3_uapi_bnr_static_config bnr; + struct ipu3_uapi_bnr_static_config_green_disparity green_disparity + __aligned(32); + struct ipu3_uapi_dm_config dm __aligned(32); + struct ipu3_uapi_ccm_mat_config ccm __aligned(32); + struct ipu3_uapi_gamma_config gamma __aligned(32); + struct ipu3_uapi_csc_mat_config csc __aligned(32); + struct ipu3_uapi_cds_params cds __aligned(32); + struct imgu_abi_shd_config shd __aligned(32); + struct imgu_abi_dvs_stat_config dvs_stat; + u8 padding1[224]; /* reserved for lace_stat */ + struct ipu3_uapi_yuvp1_iefd_config iefd __aligned(32); + struct ipu3_uapi_yuvp1_yds_config yds_c0 __aligned(32); + struct ipu3_uapi_yuvp1_chnr_config chnr_c0 __aligned(32); + struct ipu3_uapi_yuvp1_y_ee_nr_config y_ee_nr __aligned(32); + struct ipu3_uapi_yuvp1_yds_config yds __aligned(32); + struct ipu3_uapi_yuvp1_chnr_config chnr __aligned(32); + struct imgu_abi_yuvp2_y_tm_lut_static_config ytm __aligned(32); + struct ipu3_uapi_yuvp1_yds_config yds2 __aligned(32); + struct ipu3_uapi_yuvp2_tcc_static_config tcc __aligned(32); + /* reserved for defect pixel correction */ + u8 dpc[240832] __aligned(32); + struct imgu_abi_bds_config bds; + struct imgu_abi_anr_config anr; + struct imgu_abi_awb_fr_config awb_fr; + struct imgu_abi_ae_config ae; + struct imgu_abi_af_config af; + struct imgu_abi_awb_config awb; + struct imgu_abi_osys_config osys; +} __packed; + +/***** Morphing table entry *****/ + +struct imgu_abi_gdc_warp_param { + u32 origin_x; + u32 origin_y; + u32 in_addr_offset; + u32 in_block_width; + u32 in_block_height; + u32 p0_x; + u32 p0_y; + u32 p1_x; + u32 p1_y; + u32 p2_x; + u32 p2_y; + u32 p3_x; + u32 p3_y; + u32 in_block_width_a; + u32 in_block_width_b; + u32 padding; /* struct size multiple of DDR word */ +} __packed; + +/******************* Firmware ABI definitions *******************/ + +/***** struct imgu_abi_sp_stage *****/ + +struct imgu_abi_crop_pos { + u16 x; + u16 y; +} __packed; + +struct imgu_abi_sp_resolution { + u16 width; /* Width of valid data in pixels */ + u16 height; /* Height of valid data in lines */ +} __packed; + +/* + * Frame info struct. This describes the contents of an image frame buffer. + */ +struct imgu_abi_frame_sp_info { + struct imgu_abi_sp_resolution res; + u16 padded_width; /* stride of line in memory + * (in pixels) + */ + u8 format; /* format of the frame data */ + u8 raw_bit_depth; /* number of valid bits per pixel, + * only valid for RAW bayer frames + */ + u8 raw_bayer_order; /* bayer order, only valid + * for RAW bayer frames + */ + u8 raw_type; /* To choose the proper raw frame type. for + * Legacy SKC pipes/Default is set to + * IMGU_ABI_RAW_TYPE_BAYER. For RGB IR sensor - + * driver should set it to: + * IronGr case - IMGU_ABI_RAW_TYPE_IR_ON_GR + * IronGb case - IMGU_ABI_RAW_TYPE_IR_ON_GB + */ + u8 padding[2]; /* Extend to 32 bit multiple */ +} __packed; + +struct imgu_abi_buffer_sp { + union { + imgu_addr_t xmem_addr; + s32 queue_id; /* enum imgu_abi_queue_id */ + } buf_src; + s32 buf_type; /* enum imgu_abi_buffer_type */ +} __packed; + +struct imgu_abi_frame_sp_plane { + u32 offset; /* offset in bytes to start of frame data */ + /* offset is wrt data in imgu_abi_sp_sp_frame */ +} __packed; + +struct imgu_abi_frame_sp_rgb_planes { + struct imgu_abi_frame_sp_plane r; + struct imgu_abi_frame_sp_plane g; + struct imgu_abi_frame_sp_plane b; +} __packed; + +struct imgu_abi_frame_sp_yuv_planes { + struct imgu_abi_frame_sp_plane y; + struct imgu_abi_frame_sp_plane u; + struct imgu_abi_frame_sp_plane v; +} __packed; + +struct imgu_abi_frame_sp_nv_planes { + struct imgu_abi_frame_sp_plane y; + struct imgu_abi_frame_sp_plane uv; +} __packed; + +struct imgu_abi_frame_sp_plane6 { + struct imgu_abi_frame_sp_plane r; + struct imgu_abi_frame_sp_plane r_at_b; + struct imgu_abi_frame_sp_plane gr; + struct imgu_abi_frame_sp_plane gb; + struct imgu_abi_frame_sp_plane b; + struct imgu_abi_frame_sp_plane b_at_r; +} __packed; + +struct imgu_abi_frame_sp_binary_plane { + u32 size; + struct imgu_abi_frame_sp_plane data; +} __packed; + +struct imgu_abi_frame_sp { + struct imgu_abi_frame_sp_info info; + struct imgu_abi_buffer_sp buf_attr; + union { + struct imgu_abi_frame_sp_plane raw; + struct imgu_abi_frame_sp_plane rgb; + struct imgu_abi_frame_sp_rgb_planes planar_rgb; + struct imgu_abi_frame_sp_plane yuyv; + struct imgu_abi_frame_sp_yuv_planes yuv; + struct imgu_abi_frame_sp_nv_planes nv; + struct imgu_abi_frame_sp_plane6 plane6; + struct imgu_abi_frame_sp_binary_plane binary; + } planes; +} __packed; + +struct imgu_abi_resolution { + u32 width; + u32 height; +} __packed; + +struct imgu_abi_frames_sp { + struct imgu_abi_frame_sp in; + struct imgu_abi_frame_sp out[IMGU_ABI_BINARY_MAX_OUTPUT_PORTS]; + struct imgu_abi_resolution effective_in_res; + struct imgu_abi_frame_sp out_vf; + struct imgu_abi_frame_sp_info internal_frame_info; + struct imgu_abi_buffer_sp s3a_buf; + struct imgu_abi_buffer_sp dvs_buf; + struct imgu_abi_buffer_sp lace_buf; +} __packed; + +struct imgu_abi_uds_info { + u16 curr_dx; + u16 curr_dy; + u16 xc; + u16 yc; +} __packed; + +/* Information for a single pipeline stage */ +struct imgu_abi_sp_stage { + /* Multiple boolean flags can be stored in an integer */ + u8 num; /* Stage number */ + u8 isp_online; + u8 isp_copy_vf; + u8 isp_copy_output; + u8 sp_enable_xnr; + u8 isp_deci_log_factor; + u8 isp_vf_downscale_bits; + u8 deinterleaved; + /* + * NOTE: Programming the input circuit can only be done at the + * start of a session. It is illegal to program it during execution + * The input circuit defines the connectivity + */ + u8 program_input_circuit; + u8 func; + u8 stage_type; /* enum imgu_abi_stage_type */ + u8 num_stripes; + u8 isp_pipe_version; + struct { + u8 vf_output; + u8 s3a; + u8 sdis; + u8 dvs_stats; + u8 lace_stats; + } enable; + + struct imgu_abi_crop_pos sp_out_crop_pos; + u8 padding[2]; + struct imgu_abi_frames_sp frames; + struct imgu_abi_resolution dvs_envelope; + struct imgu_abi_uds_info uds; + imgu_addr_t isp_stage_addr; + imgu_addr_t xmem_bin_addr; + imgu_addr_t xmem_map_addr; + + u16 top_cropping; + u16 row_stripes_height; + u16 row_stripes_overlap_lines; + u8 if_config_index; /* Which should be applied by this stage. */ + u8 padding2; +} __packed; + +/***** struct imgu_abi_isp_stage *****/ + +struct imgu_abi_isp_param_memory_offsets { + u32 offsets[IMGU_ABI_PARAM_CLASS_NUM]; /* offset wrt hdr in bytes */ +} __packed; + +/* + * Blob descriptor. + * This structure describes an SP or ISP blob. + * It describes the test, data and bss sections as well as position in a + * firmware file. + * For convenience, it contains dynamic data after loading. + */ +struct imgu_abi_blob_info { + /* Static blob data */ + u32 offset; /* Blob offset in fw file */ + struct imgu_abi_isp_param_memory_offsets memory_offsets; + /* offset wrt hdr in bytes */ + u32 prog_name_offset; /* offset wrt hdr in bytes */ + u32 size; /* Size of blob */ + u32 padding_size; /* total cumulative of bytes added + * due to section alignment + */ + u32 icache_source; /* Position of icache in blob */ + u32 icache_size; /* Size of icache section */ + u32 icache_padding; /* added due to icache section alignment */ + u32 text_source; /* Position of text in blob */ + u32 text_size; /* Size of text section */ + u32 text_padding; /* bytes added due to text section alignment */ + u32 data_source; /* Position of data in blob */ + u32 data_target; /* Start of data in SP dmem */ + u32 data_size; /* Size of text section */ + u32 data_padding; /* bytes added due to data section alignment */ + u32 bss_target; /* Start position of bss in SP dmem */ + u32 bss_size; /* Size of bss section + * Dynamic data filled by loader + */ + u64 code __aligned(8); /* Code section absolute pointer */ + /* within fw, code = icache + text */ + u64 data __aligned(8); /* Data section absolute pointer */ + /* within fw, data = data + bss */ +} __packed; + +struct imgu_abi_binary_pipeline_info { + u32 mode; + u32 isp_pipe_version; + u32 pipelining; + u32 c_subsampling; + u32 top_cropping; + u32 left_cropping; + u32 variable_resolution; +} __packed; + +struct imgu_abi_binary_input_info { + u32 min_width; + u32 min_height; + u32 max_width; + u32 max_height; + u32 source; /* enum imgu_abi_bin_input_src */ +} __packed; + +struct imgu_abi_binary_output_info { + u32 min_width; + u32 min_height; + u32 max_width; + u32 max_height; + u32 num_chunks; + u32 variable_format; +} __packed; + +struct imgu_abi_binary_internal_info { + u32 max_width; + u32 max_height; +} __packed; + +struct imgu_abi_binary_bds_info { + u32 supported_bds_factors; +} __packed; + +struct imgu_abi_binary_dvs_info { + u32 max_envelope_width; + u32 max_envelope_height; +} __packed; + +struct imgu_abi_binary_vf_dec_info { + u32 is_variable; + u32 max_log_downscale; +} __packed; + +struct imgu_abi_binary_s3a_info { + u32 s3atbl_use_dmem; + u32 fixed_s3a_deci_log; +} __packed; + +struct imgu_abi_binary_dpc_info { + u32 bnr_lite; /* bnr lite enable flag */ +} __packed; + +struct imgu_abi_binary_iterator_info { + u32 num_stripes; + u32 row_stripes_height; + u32 row_stripes_overlap_lines; +} __packed; + +struct imgu_abi_binary_address_info { + u32 isp_addresses; /* Address in ISP dmem */ + u32 main_entry; /* Address of entry fct */ + u32 in_frame; /* Address in ISP dmem */ + u32 out_frame; /* Address in ISP dmem */ + u32 in_data; /* Address in ISP dmem */ + u32 out_data; /* Address in ISP dmem */ + u32 sh_dma_cmd_ptr; /* In ISP dmem */ +} __packed; + +struct imgu_abi_binary_uds_info { + u16 bpp; + u16 use_bci; + u16 use_str; + u16 woix; + u16 woiy; + u16 extra_out_vecs; + u16 vectors_per_line_in; + u16 vectors_per_line_out; + u16 vectors_c_per_line_in; + u16 vectors_c_per_line_out; + u16 vmem_gdc_in_block_height_y; + u16 vmem_gdc_in_block_height_c; +} __packed; + +struct imgu_abi_binary_block_info { + u32 block_width; + u32 block_height; + u32 output_block_height; +} __packed; + +struct imgu_abi_isp_data { + imgu_addr_t address; /* ISP address */ + u32 size; /* Disabled if 0 */ +} __packed; + +struct imgu_abi_isp_param_segments { + struct imgu_abi_isp_data + params[IMGU_ABI_PARAM_CLASS_NUM][IMGU_ABI_NUM_MEMORIES]; +} __packed; + +struct imgu_abi_binary_info { + u32 id __aligned(8); /* IMGU_ABI_BINARY_ID_* */ + struct imgu_abi_binary_pipeline_info pipeline; + struct imgu_abi_binary_input_info input; + struct imgu_abi_binary_output_info output; + struct imgu_abi_binary_internal_info internal; + struct imgu_abi_binary_bds_info bds; + struct imgu_abi_binary_dvs_info dvs; + struct imgu_abi_binary_vf_dec_info vf_dec; + struct imgu_abi_binary_s3a_info s3a; + struct imgu_abi_binary_dpc_info dpc_bnr; /* DPC related binary info */ + struct imgu_abi_binary_iterator_info iterator; + struct imgu_abi_binary_address_info addresses; + struct imgu_abi_binary_uds_info uds; + struct imgu_abi_binary_block_info block; + struct imgu_abi_isp_param_segments mem_initializers; + struct { + u8 input_feeder; + u8 output_system; + u8 obgrid; + u8 lin; + u8 dpc_acc; + u8 bds_acc; + u8 shd_acc; + u8 shd_ff; + u8 stats_3a_raw_buffer; + u8 acc_bayer_denoise; + u8 bnr_ff; + u8 awb_acc; + u8 awb_fr_acc; + u8 anr_acc; + u8 rgbpp_acc; + u8 rgbpp_ff; + u8 demosaic_acc; + u8 demosaic_ff; + u8 dvs_stats; + u8 lace_stats; + u8 yuvp1_b0_acc; + u8 yuvp1_c0_acc; + u8 yuvp2_acc; + u8 ae; + u8 af; + u8 dergb; + u8 rgb2yuv; + u8 high_quality; + u8 kerneltest; + u8 routing_shd_to_bnr; /* connect SHD with BNR ACCs */ + u8 routing_bnr_to_anr; /* connect BNR with ANR ACCs */ + u8 routing_anr_to_de; /* connect ANR with DE ACCs */ + u8 routing_rgb_to_yuvp1; /* connect RGB with YUVP1 */ + u8 routing_yuvp1_to_yuvp2; /* connect YUVP1 with YUVP2 */ + u8 luma_only; + u8 input_yuv; + u8 input_raw; + u8 reduced_pipe; + u8 vf_veceven; + u8 dis; + u8 dvs_envelope; + u8 uds; + u8 dvs_6axis; + u8 block_output; + u8 streaming_dma; + u8 ds; + u8 bayer_fir_6db; + u8 raw_binning; + u8 continuous; + u8 s3a; + u8 fpnr; + u8 sc; + u8 macc; + u8 output; + u8 ref_frame; + u8 tnr; + u8 xnr; + u8 params; + u8 ca_gdc; + u8 isp_addresses; + u8 in_frame; + u8 out_frame; + u8 high_speed; + u8 dpc; + u8 padding[2]; + u8 rgbir; + } enable; + struct { + u8 ref_y_channel; + u8 ref_c_channel; + u8 tnr_channel; + u8 tnr_out_channel; + u8 dvs_coords_channel; + u8 output_channel; + u8 c_channel; + u8 vfout_channel; + u8 vfout_c_channel; + u8 vfdec_bits_per_pixel; + u8 claimed_by_isp; + u8 padding[2]; + } dma; +} __packed; + +struct imgu_abi_isp_stage { + struct imgu_abi_blob_info blob_info; + struct imgu_abi_binary_info binary_info; + char binary_name[IMGU_ABI_MAX_BINARY_NAME]; + struct imgu_abi_isp_param_segments mem_initializers; +} __packed; + +/***** struct imgu_abi_ddr_address_map and parameter set *****/ + +/* xmem address map allocation */ +struct imgu_abi_ddr_address_map { + imgu_addr_t isp_mem_param[IMGU_ABI_MAX_STAGES][IMGU_ABI_NUM_MEMORIES]; + imgu_addr_t obgrid_tbl[IPU3_UAPI_MAX_STRIPES]; + imgu_addr_t acc_cluster_params_for_sp; + imgu_addr_t dvs_6axis_params_y; +} __packed; + +struct imgu_abi_parameter_set_info { + /* Pointers to Parameters in ISP format IMPT */ + struct imgu_abi_ddr_address_map mem_map; + /* Unique ID to track per-frame configurations */ + u32 isp_parameters_id; + /* Output frame to which this config has to be applied (optional) */ + imgu_addr_t output_frame_ptr; +} __packed; + +/***** struct imgu_abi_sp_group *****/ + +/* SP configuration information */ +struct imgu_abi_sp_config { + u8 no_isp_sync; /* Signal host immediately after start */ + u8 enable_raw_pool_locking; /* Enable Raw Buffer Locking for HALv3 */ + u8 lock_all; + u8 disable_cont_vf; + u8 disable_preview_on_capture; + u8 padding[3]; +} __packed; + +/* Information for a pipeline */ +struct imgu_abi_sp_pipeline { + u32 pipe_id; /* the pipe ID */ + u32 pipe_num; /* the dynamic pipe number */ + u32 thread_id; /* the sp thread ID */ + u32 pipe_config; /* the pipe config */ + u32 pipe_qos_config; /* Bitmap of multiple QOS extension fw + * state, 0xffffffff indicates non + * QOS pipe. + */ + u32 inout_port_config; + u32 required_bds_factor; + u32 dvs_frame_delay; + u32 num_stages; /* the pipe config */ + u32 running; /* needed for pipe termination */ + imgu_addr_t sp_stage_addr[IMGU_ABI_MAX_STAGES]; + imgu_addr_t scaler_pp_lut; /* Early bound LUT */ + u32 stage; /* stage ptr is only used on sp */ + s32 num_execs; /* number of times to run if this is + * an acceleration pipe. + */ + union { + struct { + u32 bytes_available; + } bin; + struct { + u32 height; + u32 width; + u32 padded_width; + u32 max_input_width; + u32 raw_bit_depth; + } raw; + } copy; + + /* Parameters passed to Shading Correction kernel. */ + struct { + /* Origin X (bqs) of internal frame on shading table */ + u32 internal_frame_origin_x_bqs_on_sctbl; + /* Origin Y (bqs) of internal frame on shading table */ + u32 internal_frame_origin_y_bqs_on_sctbl; + } shading; +} __packed; + +struct imgu_abi_sp_debug_command { + /* + * The DMA software-mask, + * Bit 31...24: unused. + * Bit 23...16: unused. + * Bit 15...08: reading-request enabling bits for DMA channel 7..0 + * Bit 07...00: writing-request enabling bits for DMA channel 7..0 + * + * For example, "0...0 0...0 11111011 11111101" indicates that the + * writing request through DMA Channel 1 and the reading request + * through DMA channel 2 are both disabled. The others are enabled. + */ + u32 dma_sw_reg; +} __packed; + +/* + * Group all host initialized SP variables into this struct. + * This is initialized every stage through dma. + * The stage part itself is transferred through imgu_abi_sp_stage. + */ +struct imgu_abi_sp_group { + struct imgu_abi_sp_config config; + struct imgu_abi_sp_pipeline pipe[IMGU_ABI_MAX_SP_THREADS]; + struct imgu_abi_sp_debug_command debug; +} __packed; + +/***** parameter and state class binary configurations *****/ + +struct imgu_abi_isp_iterator_config { + struct imgu_abi_frame_sp_info input_info; + struct imgu_abi_frame_sp_info internal_info; + struct imgu_abi_frame_sp_info output_info; + struct imgu_abi_frame_sp_info vf_info; + struct imgu_abi_sp_resolution dvs_envelope; +} __packed; + +struct imgu_abi_dma_port_config { + u8 crop, elems; + u16 width; + u32 stride; +} __packed; + +struct imgu_abi_isp_ref_config { + u32 width_a_over_b; + struct imgu_abi_dma_port_config port_b; + u32 ref_frame_addr_y[IMGU_ABI_FRAMES_REF]; + u32 ref_frame_addr_c[IMGU_ABI_FRAMES_REF]; + u32 dvs_frame_delay; +} __packed; + +struct imgu_abi_isp_ref_dmem_state { + u32 ref_in_buf_idx; + u32 ref_out_buf_idx; +} __packed; + +struct imgu_abi_isp_dvs_config { + u32 num_horizontal_blocks; + u32 num_vertical_blocks; +} __packed; + +struct imgu_abi_isp_tnr3_config { + u32 width_a_over_b; + u32 frame_height; + struct imgu_abi_dma_port_config port_b; + u32 delay_frame; + u32 frame_addr[IMGU_ABI_FRAMES_TNR]; +} __packed; + +struct imgu_abi_isp_tnr3_dmem_state { + u32 in_bufidx; + u32 out_bufidx; + u32 total_frame_counter; + u32 buffer_frame_counter[IMGU_ABI_BUF_SETS_TNR]; + u32 bypass_filter; +} __packed; + +/***** Queues *****/ + +struct imgu_abi_queue_info { + u8 size; /* the maximum number of elements*/ + u8 step; /* number of bytes per element */ + u8 start; /* index of the oldest element */ + u8 end; /* index at which to write the new element */ +} __packed; + +struct imgu_abi_queues { + /* + * Queues for the dynamic frame information, + * i.e. the "in_frame" buffer, the "out_frame" + * buffer and the "vf_out_frame" buffer. + */ + struct imgu_abi_queue_info host2sp_bufq_info + [IMGU_ABI_MAX_SP_THREADS][IMGU_ABI_QUEUE_NUM]; + u32 host2sp_bufq[IMGU_ABI_MAX_SP_THREADS][IMGU_ABI_QUEUE_NUM] + [IMGU_ABI_HOST2SP_BUFQ_SIZE]; + struct imgu_abi_queue_info sp2host_bufq_info[IMGU_ABI_QUEUE_NUM]; + u32 sp2host_bufq[IMGU_ABI_QUEUE_NUM][IMGU_ABI_SP2HOST_BUFQ_SIZE]; + + /* + * The queues for the events. + */ + struct imgu_abi_queue_info host2sp_evtq_info; + u32 host2sp_evtq[IMGU_ABI_HOST2SP_EVTQ_SIZE]; + struct imgu_abi_queue_info sp2host_evtq_info; + u32 sp2host_evtq[IMGU_ABI_SP2HOST_EVTQ_SIZE]; +} __packed; + +/***** Buffer descriptor *****/ + +struct imgu_abi_metadata_info { + struct imgu_abi_resolution resolution; /* Resolution */ + u32 stride; /* Stride in bytes */ + u32 size; /* Total size in bytes */ +} __packed; + +struct imgu_abi_isp_3a_statistics { + union { + struct { + imgu_addr_t s3a_tbl; + } dmem; + struct { + imgu_addr_t s3a_tbl_hi; + imgu_addr_t s3a_tbl_lo; + } vmem; + } data; + struct { + imgu_addr_t rgby_tbl; + } data_hmem; + u32 exp_id; /* exposure id, to match statistics to a frame, */ + u32 isp_config_id; /* Tracks per-frame configs */ + imgu_addr_t data_ptr; /* pointer to base of all data */ + u32 size; /* total size of all data */ + u32 dmem_size; + u32 vmem_size; /* both lo and hi have this size */ + u32 hmem_size; +} __packed; + +struct imgu_abi_metadata { + struct imgu_abi_metadata_info info; /* Layout info */ + imgu_addr_t address; /* CSS virtual address */ + u32 exp_id; /* Exposure ID */ +} __packed; + +struct imgu_abi_time_meas { + u32 start_timer_value; /* measured time in ticks */ + u32 end_timer_value; /* measured time in ticks */ +} __packed; + +struct imgu_abi_buffer { + union { + struct imgu_abi_isp_3a_statistics s3a; + u8 reserved[28]; + imgu_addr_t skc_dvs_statistics; + imgu_addr_t lace_stat; + struct imgu_abi_metadata metadata; + struct { + imgu_addr_t frame_data; + u32 flashed; + u32 exp_id; + u32 isp_parameters_id; /* Tracks per-frame configs */ + u32 padded_width; + } frame; + imgu_addr_t ddr_ptrs; + } payload; + /* + * kernel_ptr is present for host administration purposes only. + * type is uint64_t in order to be 64-bit host compatible. + * uint64_t does not exist on SP/ISP. + * Size of the struct is checked by sp.hive.c. + */ + u64 cookie_ptr __aligned(8); + u64 kernel_ptr; + struct imgu_abi_time_meas timing_data; + u32 isys_eof_clock_tick; +} __packed; + +struct imgu_abi_bl_dma_cmd_entry { + u32 src_addr; /* virtual DDR address */ + u32 size; /* number of bytes to transferred */ + u32 dst_type; + u32 dst_addr; /* hmm address of xMEM or MMIO */ +} __packed; + +struct imgu_abi_sp_init_dmem_cfg { + u32 ddr_data_addr; /* data segment address in ddr */ + u32 dmem_data_addr; /* data segment address in dmem */ + u32 dmem_bss_addr; /* bss segment address in dmem */ + u32 data_size; /* data segment size */ + u32 bss_size; /* bss segment size */ + u32 sp_id; /* sp id */ +} __packed; + +#endif diff --git a/drivers/staging/media/ipu3/ipu3-css-fw.c b/drivers/staging/media/ipu3/ipu3-css-fw.c new file mode 100644 index 000000000000..4122d4e42db6 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-css-fw.c @@ -0,0 +1,265 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 Intel Corporation + +#include <linux/device.h> +#include <linux/firmware.h> +#include <linux/mm.h> +#include <linux/slab.h> + +#include "ipu3-css.h" +#include "ipu3-css-fw.h" +#include "ipu3-dmamap.h" + +static void imgu_css_fw_show_binary(struct device *dev, struct imgu_fw_info *bi, + const char *name) +{ + unsigned int i; + + dev_dbg(dev, "found firmware binary type %i size %i name %s\n", + bi->type, bi->blob.size, name); + if (bi->type != IMGU_FW_ISP_FIRMWARE) + return; + + dev_dbg(dev, " id %i mode %i bds 0x%x veceven %i/%i out_pins %i\n", + bi->info.isp.sp.id, bi->info.isp.sp.pipeline.mode, + bi->info.isp.sp.bds.supported_bds_factors, + bi->info.isp.sp.enable.vf_veceven, + bi->info.isp.sp.vf_dec.is_variable, + bi->info.isp.num_output_pins); + + dev_dbg(dev, " input (%i,%i)-(%i,%i) formats %s%s%s\n", + bi->info.isp.sp.input.min_width, + bi->info.isp.sp.input.min_height, + bi->info.isp.sp.input.max_width, + bi->info.isp.sp.input.max_height, + bi->info.isp.sp.enable.input_yuv ? "yuv420 " : "", + bi->info.isp.sp.enable.input_feeder || + bi->info.isp.sp.enable.input_raw ? "raw8 raw10 " : "", + bi->info.isp.sp.enable.input_raw ? "raw12" : ""); + + dev_dbg(dev, " internal (%i,%i)\n", + bi->info.isp.sp.internal.max_width, + bi->info.isp.sp.internal.max_height); + + dev_dbg(dev, " output (%i,%i)-(%i,%i) formats", + bi->info.isp.sp.output.min_width, + bi->info.isp.sp.output.min_height, + bi->info.isp.sp.output.max_width, + bi->info.isp.sp.output.max_height); + for (i = 0; i < bi->info.isp.num_output_formats; i++) + dev_dbg(dev, " %i", bi->info.isp.output_formats[i]); + dev_dbg(dev, " vf"); + for (i = 0; i < bi->info.isp.num_vf_formats; i++) + dev_dbg(dev, " %i", bi->info.isp.vf_formats[i]); + dev_dbg(dev, "\n"); +} + +unsigned int imgu_css_fw_obgrid_size(const struct imgu_fw_info *bi) +{ + unsigned int width = DIV_ROUND_UP(bi->info.isp.sp.internal.max_width, + IMGU_OBGRID_TILE_SIZE * 2) + 1; + unsigned int height = DIV_ROUND_UP(bi->info.isp.sp.internal.max_height, + IMGU_OBGRID_TILE_SIZE * 2) + 1; + unsigned int obgrid_size; + + width = ALIGN(width, IPU3_UAPI_ISP_VEC_ELEMS / 4); + obgrid_size = PAGE_ALIGN(width * height * + sizeof(struct ipu3_uapi_obgrid_param)) * + bi->info.isp.sp.iterator.num_stripes; + return obgrid_size; +} + +void *imgu_css_fw_pipeline_params(struct imgu_css *css, unsigned int pipe, + enum imgu_abi_param_class cls, + enum imgu_abi_memories mem, + struct imgu_fw_isp_parameter *par, + size_t par_size, void *binary_params) +{ + struct imgu_fw_info *bi = + &css->fwp->binary_header[css->pipes[pipe].bindex]; + + if (par->offset + par->size > + bi->info.isp.sp.mem_initializers.params[cls][mem].size) + return NULL; + + if (par->size != par_size) + pr_warn("parameter size doesn't match defined size\n"); + + if (par->size < par_size) + return NULL; + + return binary_params + par->offset; +} + +void imgu_css_fw_cleanup(struct imgu_css *css) +{ + struct imgu_device *imgu = dev_get_drvdata(css->dev); + + if (css->binary) { + unsigned int i; + + for (i = 0; i < css->fwp->file_header.binary_nr; i++) + imgu_dmamap_free(imgu, &css->binary[i]); + kfree(css->binary); + } + if (css->fw) + release_firmware(css->fw); + + css->binary = NULL; + css->fw = NULL; +} + +int imgu_css_fw_init(struct imgu_css *css) +{ + static const u32 BLOCK_MAX = 65536; + struct imgu_device *imgu = dev_get_drvdata(css->dev); + struct device *dev = css->dev; + unsigned int i, j, binary_nr; + int r; + + r = request_firmware(&css->fw, IMGU_FW_NAME, css->dev); + if (r) + return r; + + /* Check and display fw header info */ + + css->fwp = (struct imgu_fw_header *)css->fw->data; + if (css->fw->size < sizeof(struct imgu_fw_header *) || + css->fwp->file_header.h_size != sizeof(struct imgu_fw_bi_file_h)) + goto bad_fw; + if (sizeof(struct imgu_fw_bi_file_h) + + css->fwp->file_header.binary_nr * sizeof(struct imgu_fw_info) > + css->fw->size) + goto bad_fw; + + dev_info(dev, "loaded firmware version %.64s, %u binaries, %zu bytes\n", + css->fwp->file_header.version, css->fwp->file_header.binary_nr, + css->fw->size); + + /* Validate and display info on fw binaries */ + + binary_nr = css->fwp->file_header.binary_nr; + + css->fw_bl = -1; + css->fw_sp[0] = -1; + css->fw_sp[1] = -1; + + for (i = 0; i < binary_nr; i++) { + struct imgu_fw_info *bi = &css->fwp->binary_header[i]; + const char *name = (void *)css->fwp + bi->blob.prog_name_offset; + size_t len; + + if (bi->blob.prog_name_offset >= css->fw->size) + goto bad_fw; + len = strnlen(name, css->fw->size - bi->blob.prog_name_offset); + if (len + 1 > css->fw->size - bi->blob.prog_name_offset || + len + 1 >= IMGU_ABI_MAX_BINARY_NAME) + goto bad_fw; + + if (bi->blob.size != bi->blob.text_size + bi->blob.icache_size + + bi->blob.data_size + bi->blob.padding_size) + goto bad_fw; + if (bi->blob.offset + bi->blob.size > css->fw->size) + goto bad_fw; + + if (bi->type == IMGU_FW_BOOTLOADER_FIRMWARE) { + css->fw_bl = i; + if (bi->info.bl.sw_state >= css->iomem_length || + bi->info.bl.num_dma_cmds >= css->iomem_length || + bi->info.bl.dma_cmd_list >= css->iomem_length) + goto bad_fw; + } + if (bi->type == IMGU_FW_SP_FIRMWARE || + bi->type == IMGU_FW_SP1_FIRMWARE) { + css->fw_sp[bi->type == IMGU_FW_SP_FIRMWARE ? 0 : 1] = i; + if (bi->info.sp.per_frame_data >= css->iomem_length || + bi->info.sp.init_dmem_data >= css->iomem_length || + bi->info.sp.host_sp_queue >= css->iomem_length || + bi->info.sp.isp_started >= css->iomem_length || + bi->info.sp.sw_state >= css->iomem_length || + bi->info.sp.sleep_mode >= css->iomem_length || + bi->info.sp.invalidate_tlb >= css->iomem_length || + bi->info.sp.host_sp_com >= css->iomem_length || + bi->info.sp.output + 12 >= css->iomem_length || + bi->info.sp.host_sp_queues_initialized >= + css->iomem_length) + goto bad_fw; + } + if (bi->type != IMGU_FW_ISP_FIRMWARE) + continue; + + if (bi->info.isp.sp.pipeline.mode >= IPU3_CSS_PIPE_ID_NUM) + goto bad_fw; + + if (bi->info.isp.sp.iterator.num_stripes > + IPU3_UAPI_MAX_STRIPES) + goto bad_fw; + + if (bi->info.isp.num_vf_formats > IMGU_ABI_FRAME_FORMAT_NUM || + bi->info.isp.num_output_formats > IMGU_ABI_FRAME_FORMAT_NUM) + goto bad_fw; + + for (j = 0; j < bi->info.isp.num_output_formats; j++) + if (bi->info.isp.output_formats[j] < 0 || + bi->info.isp.output_formats[j] >= + IMGU_ABI_FRAME_FORMAT_NUM) + goto bad_fw; + for (j = 0; j < bi->info.isp.num_vf_formats; j++) + if (bi->info.isp.vf_formats[j] < 0 || + bi->info.isp.vf_formats[j] >= + IMGU_ABI_FRAME_FORMAT_NUM) + goto bad_fw; + + if (bi->info.isp.sp.block.block_width <= 0 || + bi->info.isp.sp.block.block_width > BLOCK_MAX || + bi->info.isp.sp.block.output_block_height <= 0 || + bi->info.isp.sp.block.output_block_height > BLOCK_MAX) + goto bad_fw; + + if (bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_PARAM] + + sizeof(struct imgu_fw_param_memory_offsets) > + css->fw->size || + bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_CONFIG] + + sizeof(struct imgu_fw_config_memory_offsets) > + css->fw->size || + bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_STATE] + + sizeof(struct imgu_fw_state_memory_offsets) > + css->fw->size) + goto bad_fw; + + imgu_css_fw_show_binary(dev, bi, name); + } + + if (css->fw_bl == -1 || css->fw_sp[0] == -1 || css->fw_sp[1] == -1) + goto bad_fw; + + /* Allocate and map fw binaries into IMGU */ + + css->binary = kcalloc(binary_nr, sizeof(*css->binary), GFP_KERNEL); + if (!css->binary) { + r = -ENOMEM; + goto error_out; + } + + for (i = 0; i < css->fwp->file_header.binary_nr; i++) { + struct imgu_fw_info *bi = &css->fwp->binary_header[i]; + void *blob = (void *)css->fwp + bi->blob.offset; + size_t size = bi->blob.size; + + if (!imgu_dmamap_alloc(imgu, &css->binary[i], size)) { + r = -ENOMEM; + goto error_out; + } + memcpy(css->binary[i].vaddr, blob, size); + } + + return 0; + +bad_fw: + dev_err(dev, "invalid firmware binary, size %u\n", (int)css->fw->size); + r = -ENODEV; + +error_out: + imgu_css_fw_cleanup(css); + return r; +} diff --git a/drivers/staging/media/ipu3/ipu3-css-fw.h b/drivers/staging/media/ipu3/ipu3-css-fw.h new file mode 100644 index 000000000000..79ffa7045139 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-css-fw.h @@ -0,0 +1,188 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018 Intel Corporation */ + +#ifndef __IPU3_CSS_FW_H +#define __IPU3_CSS_FW_H + +/******************* Firmware file definitions *******************/ + +#define IMGU_FW_NAME "intel/ipu3-fw.bin" + +typedef u32 imgu_fw_ptr; + +enum imgu_fw_type { + IMGU_FW_SP_FIRMWARE, /* Firmware for the SP */ + IMGU_FW_SP1_FIRMWARE, /* Firmware for the SP1 */ + IMGU_FW_ISP_FIRMWARE, /* Firmware for the ISP */ + IMGU_FW_BOOTLOADER_FIRMWARE, /* Firmware for the BootLoader */ + IMGU_FW_ACC_FIRMWARE /* Firmware for accelerations */ +}; + +enum imgu_fw_acc_type { + IMGU_FW_ACC_NONE, /* Normal binary */ + IMGU_FW_ACC_OUTPUT, /* Accelerator stage on output frame */ + IMGU_FW_ACC_VIEWFINDER, /* Accelerator stage on viewfinder frame */ + IMGU_FW_ACC_STANDALONE, /* Stand-alone acceleration */ +}; + +struct imgu_fw_isp_parameter { + u32 offset; /* Offset in isp_<mem> config, params, etc. */ + u32 size; /* Disabled if 0 */ +}; + +struct imgu_fw_param_memory_offsets { + struct { + struct imgu_fw_isp_parameter lin; /* lin_vmem_params */ + struct imgu_fw_isp_parameter tnr3; /* tnr3_vmem_params */ + struct imgu_fw_isp_parameter xnr3; /* xnr3_vmem_params */ + } vmem; + struct { + struct imgu_fw_isp_parameter tnr; + struct imgu_fw_isp_parameter tnr3; /* tnr3_params */ + struct imgu_fw_isp_parameter xnr3; /* xnr3_params */ + struct imgu_fw_isp_parameter plane_io_config; /* 192 bytes */ + struct imgu_fw_isp_parameter rgbir; /* rgbir_params */ + } dmem; +}; + +struct imgu_fw_config_memory_offsets { + struct { + struct imgu_fw_isp_parameter iterator; + struct imgu_fw_isp_parameter dvs; + struct imgu_fw_isp_parameter output; + struct imgu_fw_isp_parameter raw; + struct imgu_fw_isp_parameter input_yuv; + struct imgu_fw_isp_parameter tnr; + struct imgu_fw_isp_parameter tnr3; + struct imgu_fw_isp_parameter ref; + } dmem; +}; + +struct imgu_fw_state_memory_offsets { + struct { + struct imgu_fw_isp_parameter tnr; + struct imgu_fw_isp_parameter tnr3; + struct imgu_fw_isp_parameter ref; + } dmem; +}; + +union imgu_fw_all_memory_offsets { + struct { + u64 imgu_fw_mem_offsets[3]; /* params, config, state */ + } offsets; + struct { + u64 ptr; + } array[IMGU_ABI_PARAM_CLASS_NUM]; +}; + +struct imgu_fw_binary_xinfo { + /* Part that is of interest to the SP. */ + struct imgu_abi_binary_info sp; + + /* Rest of the binary info, only interesting to the host. */ + u32 type; /* enum imgu_fw_acc_type */ + + u32 num_output_formats __aligned(8); + u32 output_formats[IMGU_ABI_FRAME_FORMAT_NUM]; /* enum frame_format */ + + /* number of supported vf formats */ + u32 num_vf_formats __aligned(8); + /* types of supported vf formats */ + u32 vf_formats[IMGU_ABI_FRAME_FORMAT_NUM]; /* enum frame_format */ + u8 num_output_pins; + imgu_fw_ptr xmem_addr; + + u64 imgu_fw_blob_descr_ptr __aligned(8); + u32 blob_index __aligned(8); + union imgu_fw_all_memory_offsets mem_offsets __aligned(8); + struct imgu_fw_binary_xinfo *next __aligned(8); +}; + +struct imgu_fw_sp_info { + u32 init_dmem_data; /* data sect config, stored to dmem */ + u32 per_frame_data; /* Per frame data, stored to dmem */ + u32 group; /* Per pipeline data, loaded by dma */ + u32 output; /* SP output data, loaded by dmem */ + u32 host_sp_queue; /* Host <-> SP queues */ + u32 host_sp_com; /* Host <-> SP commands */ + u32 isp_started; /* P'ed from sensor thread, csim only */ + u32 sw_state; /* Polled from css, enum imgu_abi_sp_swstate */ + u32 host_sp_queues_initialized; /* Polled from the SP */ + u32 sleep_mode; /* different mode to halt SP */ + u32 invalidate_tlb; /* inform SP to invalidate mmu TLB */ + u32 debug_buffer_ddr_address; /* the addr of DDR debug queue */ + + /* input system perf count array */ + u32 perf_counter_input_system_error; + u32 threads_stack; /* sp thread's stack pointers */ + u32 threads_stack_size; /* sp thread's stack sizes */ + u32 curr_binary_id; /* current binary id */ + u32 raw_copy_line_count; /* raw copy line counter */ + u32 ddr_parameter_address; /* acc param ddrptr, sp dmem */ + u32 ddr_parameter_size; /* acc param size, sp dmem */ + /* Entry functions */ + u32 sp_entry; /* The SP entry function */ + u32 tagger_frames_addr; /* Base address of tagger state */ +}; + +struct imgu_fw_bl_info { + u32 num_dma_cmds; /* Number of cmds sent by CSS */ + u32 dma_cmd_list; /* Dma command list sent by CSS */ + u32 sw_state; /* Polled from css, enum imgu_abi_bl_swstate */ + /* Entry functions */ + u32 bl_entry; /* The SP entry function */ +}; + +struct imgu_fw_acc_info { + u32 per_frame_data; /* Dummy for now */ +}; + +union imgu_fw_union { + struct imgu_fw_binary_xinfo isp; /* ISP info */ + struct imgu_fw_sp_info sp; /* SP info */ + struct imgu_fw_sp_info sp1; /* SP1 info */ + struct imgu_fw_bl_info bl; /* Bootloader info */ + struct imgu_fw_acc_info acc; /* Accelerator info */ +}; + +struct imgu_fw_info { + size_t header_size; /* size of fw header */ + u32 type __aligned(8); /* enum imgu_fw_type */ + union imgu_fw_union info; /* Binary info */ + struct imgu_abi_blob_info blob; /* Blob info */ + /* Dynamic part */ + u64 next; + + u32 loaded __aligned(8); /* Firmware has been loaded */ + const u64 isp_code __aligned(8); /* ISP pointer to code */ + /* Firmware handle between user space and kernel */ + u32 handle __aligned(8); + /* Sections to copy from/to ISP */ + struct imgu_abi_isp_param_segments mem_initializers; + /* Initializer for local ISP memories */ +}; + +struct imgu_fw_bi_file_h { + char version[64]; /* branch tag + week day + time */ + int binary_nr; /* Number of binaries */ + unsigned int h_size; /* sizeof(struct imgu_fw_bi_file_h) */ +}; + +struct imgu_fw_header { + struct imgu_fw_bi_file_h file_header; + struct imgu_fw_info binary_header[1]; /* binary_nr items */ +}; + +/******************* Firmware functions *******************/ + +int imgu_css_fw_init(struct imgu_css *css); +void imgu_css_fw_cleanup(struct imgu_css *css); + +unsigned int imgu_css_fw_obgrid_size(const struct imgu_fw_info *bi); +void *imgu_css_fw_pipeline_params(struct imgu_css *css, unsigned int pipe, + enum imgu_abi_param_class cls, + enum imgu_abi_memories mem, + struct imgu_fw_isp_parameter *par, + size_t par_size, void *binary_params); + +#endif diff --git a/drivers/staging/media/ipu3/ipu3-css-params.c b/drivers/staging/media/ipu3/ipu3-css-params.c new file mode 100644 index 000000000000..4533dacad4be --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-css-params.c @@ -0,0 +1,2944 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 Intel Corporation + +#include <linux/device.h> + +#include "ipu3-css.h" +#include "ipu3-css-fw.h" +#include "ipu3-tables.h" +#include "ipu3-css-params.h" + +#define DIV_ROUND_CLOSEST_DOWN(a, b) (((a) + ((b) / 2) - 1) / (b)) +#define roundclosest_down(a, b) (DIV_ROUND_CLOSEST_DOWN(a, b) * (b)) + +#define IPU3_UAPI_ANR_MAX_RESET ((1 << 12) - 1) +#define IPU3_UAPI_ANR_MIN_RESET (((-1) << 12) + 1) + +struct imgu_css_scaler_info { + unsigned int phase_step; /* Same for luma/chroma */ + int exp_shift; + + unsigned int phase_init; /* luma/chroma dependent */ + int pad_left; + int pad_right; + int crop_left; + int crop_top; +}; + +static unsigned int imgu_css_scaler_get_exp(unsigned int counter, + unsigned int divider) +{ + int i = fls(divider) - fls(counter); + + if (i <= 0) + return 0; + + if (divider >> i < counter) + i = i - 1; + + return i; +} + +/* Set up the CSS scaler look up table */ +static void +imgu_css_scaler_setup_lut(unsigned int taps, unsigned int input_width, + unsigned int output_width, int phase_step_correction, + const int *coeffs, unsigned int coeffs_size, + s8 coeff_lut[], struct imgu_css_scaler_info *info) +{ + int tap, phase, phase_sum_left, phase_sum_right; + int exponent = imgu_css_scaler_get_exp(output_width, input_width); + int mantissa = (1 << exponent) * output_width; + unsigned int phase_step; + + if (input_width == output_width) { + for (phase = 0; phase < IMGU_SCALER_PHASES; phase++) { + for (tap = 0; tap < taps; tap++) { + coeff_lut[phase * IMGU_SCALER_FILTER_TAPS + tap] + = 0; + } + } + + info->phase_step = IMGU_SCALER_PHASES * + (1 << IMGU_SCALER_PHASE_COUNTER_PREC_REF); + info->exp_shift = 0; + info->pad_left = 0; + info->pad_right = 0; + info->phase_init = 0; + info->crop_left = 0; + info->crop_top = 0; + return; + } + + for (phase = 0; phase < IMGU_SCALER_PHASES; phase++) { + for (tap = 0; tap < taps; tap++) { + /* flip table to for convolution reverse indexing */ + s64 coeff = coeffs[coeffs_size - + ((tap * (coeffs_size / taps)) + phase) - 1]; + coeff *= mantissa; + coeff = div64_long(coeff, input_width); + + /* Add +"0.5" */ + coeff += 1 << (IMGU_SCALER_COEFF_BITS - 1); + coeff >>= IMGU_SCALER_COEFF_BITS; + + coeff_lut[phase * IMGU_SCALER_FILTER_TAPS + tap] = + coeff; + } + } + + phase_step = IMGU_SCALER_PHASES * + (1 << IMGU_SCALER_PHASE_COUNTER_PREC_REF) * + output_width / input_width; + phase_step += phase_step_correction; + phase_sum_left = (taps / 2 * IMGU_SCALER_PHASES * + (1 << IMGU_SCALER_PHASE_COUNTER_PREC_REF)) - + (1 << (IMGU_SCALER_PHASE_COUNTER_PREC_REF - 1)); + phase_sum_right = (taps / 2 * IMGU_SCALER_PHASES * + (1 << IMGU_SCALER_PHASE_COUNTER_PREC_REF)) + + (1 << (IMGU_SCALER_PHASE_COUNTER_PREC_REF - 1)); + + info->exp_shift = IMGU_SCALER_MAX_EXPONENT_SHIFT - exponent; + info->pad_left = (phase_sum_left % phase_step == 0) ? + phase_sum_left / phase_step - 1 : phase_sum_left / phase_step; + info->pad_right = (phase_sum_right % phase_step == 0) ? + phase_sum_right / phase_step - 1 : phase_sum_right / phase_step; + info->phase_init = phase_sum_left - phase_step * info->pad_left; + info->phase_step = phase_step; + info->crop_left = taps - 1; + info->crop_top = taps - 1; +} + +/* + * Calculates the exact output image width/height, based on phase_step setting + * (must be perfectly aligned with hardware). + */ +static unsigned int +imgu_css_scaler_calc_scaled_output(unsigned int input, + struct imgu_css_scaler_info *info) +{ + unsigned int arg1 = input * info->phase_step + + (1 - IMGU_SCALER_TAPS_Y / 2) * IMGU_SCALER_FIR_PHASES - + IMGU_SCALER_FIR_PHASES / (2 * IMGU_SCALER_PHASES); + unsigned int arg2 = ((IMGU_SCALER_TAPS_Y / 2) * IMGU_SCALER_FIR_PHASES + + IMGU_SCALER_FIR_PHASES / (2 * IMGU_SCALER_PHASES)) * + IMGU_SCALER_FIR_PHASES + info->phase_step / 2; + + return ((arg1 + (arg2 - IMGU_SCALER_FIR_PHASES * info->phase_step) / + IMGU_SCALER_FIR_PHASES) / (2 * IMGU_SCALER_FIR_PHASES)) * 2; +} + +/* + * Calculate the output width and height, given the luma + * and chroma details of a scaler + */ +static void +imgu_css_scaler_calc(u32 input_width, u32 input_height, u32 target_width, + u32 target_height, struct imgu_abi_osys_config *cfg, + struct imgu_css_scaler_info *info_luma, + struct imgu_css_scaler_info *info_chroma, + unsigned int *output_width, unsigned int *output_height, + unsigned int *procmode) +{ + u32 out_width = target_width; + u32 out_height = target_height; + const unsigned int height_alignment = 2; + int phase_step_correction = -1; + + /* + * Calculate scaled output width. If the horizontal and vertical scaling + * factor is different, then choose the biggest and crop off excess + * lines or columns after formatting. + */ + if (target_height * input_width > target_width * input_height) + target_width = DIV_ROUND_UP(target_height * input_width, + input_height); + + if (input_width == target_width) + *procmode = IMGU_ABI_OSYS_PROCMODE_BYPASS; + else + *procmode = IMGU_ABI_OSYS_PROCMODE_DOWNSCALE; + + memset(&cfg->scaler_coeffs_chroma, 0, + sizeof(cfg->scaler_coeffs_chroma)); + memset(&cfg->scaler_coeffs_luma, 0, sizeof(*cfg->scaler_coeffs_luma)); + do { + phase_step_correction++; + + imgu_css_scaler_setup_lut(IMGU_SCALER_TAPS_Y, + input_width, target_width, + phase_step_correction, + imgu_css_downscale_4taps, + IMGU_SCALER_DOWNSCALE_4TAPS_LEN, + cfg->scaler_coeffs_luma, info_luma); + + imgu_css_scaler_setup_lut(IMGU_SCALER_TAPS_UV, + input_width, target_width, + phase_step_correction, + imgu_css_downscale_2taps, + IMGU_SCALER_DOWNSCALE_2TAPS_LEN, + cfg->scaler_coeffs_chroma, + info_chroma); + + out_width = imgu_css_scaler_calc_scaled_output(input_width, + info_luma); + out_height = imgu_css_scaler_calc_scaled_output(input_height, + info_luma); + } while ((out_width < target_width || out_height < target_height || + !IS_ALIGNED(out_height, height_alignment)) && + phase_step_correction <= 5); + + *output_width = out_width; + *output_height = out_height; +} + +/********************** Osys routines for scaler****************************/ + +static void imgu_css_osys_set_format(enum imgu_abi_frame_format host_format, + unsigned int *osys_format, + unsigned int *osys_tiling) +{ + *osys_format = IMGU_ABI_OSYS_FORMAT_YUV420; + *osys_tiling = IMGU_ABI_OSYS_TILING_NONE; + + switch (host_format) { + case IMGU_ABI_FRAME_FORMAT_YUV420: + *osys_format = IMGU_ABI_OSYS_FORMAT_YUV420; + break; + case IMGU_ABI_FRAME_FORMAT_YV12: + *osys_format = IMGU_ABI_OSYS_FORMAT_YV12; + break; + case IMGU_ABI_FRAME_FORMAT_NV12: + *osys_format = IMGU_ABI_OSYS_FORMAT_NV12; + break; + case IMGU_ABI_FRAME_FORMAT_NV16: + *osys_format = IMGU_ABI_OSYS_FORMAT_NV16; + break; + case IMGU_ABI_FRAME_FORMAT_NV21: + *osys_format = IMGU_ABI_OSYS_FORMAT_NV21; + break; + case IMGU_ABI_FRAME_FORMAT_NV12_TILEY: + *osys_format = IMGU_ABI_OSYS_FORMAT_NV12; + *osys_tiling = IMGU_ABI_OSYS_TILING_Y; + break; + default: + /* For now, assume use default values */ + break; + } +} + +/* + * Function calculates input frame stripe offset, based + * on output frame stripe offset and filter parameters. + */ +static int imgu_css_osys_calc_stripe_offset(int stripe_offset_out, + int fir_phases, int phase_init, + int phase_step, int pad_left) +{ + int stripe_offset_inp = stripe_offset_out * fir_phases - + pad_left * phase_step; + + return DIV_ROUND_UP(stripe_offset_inp - phase_init, phase_step); +} + +/* + * Calculate input frame phase, given the output frame + * stripe offset and filter parameters + */ +static int imgu_css_osys_calc_stripe_phase_init(int stripe_offset_out, + int fir_phases, int phase_init, + int phase_step, int pad_left) +{ + int stripe_offset_inp = + imgu_css_osys_calc_stripe_offset(stripe_offset_out, + fir_phases, phase_init, + phase_step, pad_left); + + return phase_init + ((pad_left + stripe_offset_inp) * phase_step) - + stripe_offset_out * fir_phases; +} + +/* + * This function calculates input frame stripe width, + * based on output frame stripe offset and filter parameters + */ +static int imgu_css_osys_calc_inp_stripe_width(int stripe_width_out, + int fir_phases, int phase_init, + int phase_step, int fir_taps, + int pad_left, int pad_right) +{ + int stripe_width_inp = (stripe_width_out + fir_taps - 1) * fir_phases; + + stripe_width_inp = DIV_ROUND_UP(stripe_width_inp - phase_init, + phase_step); + + return stripe_width_inp - pad_left - pad_right; +} + +/* + * This function calculates output frame stripe width, basedi + * on output frame stripe offset and filter parameters + */ +static int imgu_css_osys_out_stripe_width(int stripe_width_inp, int fir_phases, + int phase_init, int phase_step, + int fir_taps, int pad_left, + int pad_right, int column_offset) +{ + int stripe_width_out = (pad_left + stripe_width_inp + + pad_right - column_offset) * phase_step; + + stripe_width_out = (stripe_width_out + phase_init) / fir_phases; + + return stripe_width_out - (fir_taps - 1); +} + +struct imgu_css_reso { + unsigned int input_width; + unsigned int input_height; + enum imgu_abi_frame_format input_format; + unsigned int pin_width[IMGU_ABI_OSYS_PINS]; + unsigned int pin_height[IMGU_ABI_OSYS_PINS]; + unsigned int pin_stride[IMGU_ABI_OSYS_PINS]; + enum imgu_abi_frame_format pin_format[IMGU_ABI_OSYS_PINS]; + int chunk_width; + int chunk_height; + int block_height; + int block_width; +}; + +struct imgu_css_frame_params { + /* Output pins */ + unsigned int enable; + unsigned int format; + unsigned int flip; + unsigned int mirror; + unsigned int tiling; + unsigned int reduce_range; + unsigned int width; + unsigned int height; + unsigned int stride; + unsigned int scaled; + unsigned int crop_left; + unsigned int crop_top; +}; + +struct imgu_css_stripe_params { + unsigned int processing_mode; + unsigned int phase_step; + unsigned int exp_shift; + unsigned int phase_init_left_y; + unsigned int phase_init_left_uv; + unsigned int phase_init_top_y; + unsigned int phase_init_top_uv; + unsigned int pad_left_y; + unsigned int pad_left_uv; + unsigned int pad_right_y; + unsigned int pad_right_uv; + unsigned int pad_top_y; + unsigned int pad_top_uv; + unsigned int pad_bottom_y; + unsigned int pad_bottom_uv; + unsigned int crop_left_y; + unsigned int crop_top_y; + unsigned int crop_left_uv; + unsigned int crop_top_uv; + unsigned int start_column_y; + unsigned int start_column_uv; + unsigned int chunk_width; + unsigned int chunk_height; + unsigned int block_width; + unsigned int block_height; + unsigned int input_width; + unsigned int input_height; + int output_width[IMGU_ABI_OSYS_PINS]; + int output_height[IMGU_ABI_OSYS_PINS]; + int output_offset[IMGU_ABI_OSYS_PINS]; +}; + +/* + * frame_params - size IMGU_ABI_OSYS_PINS + * stripe_params - size IPU3_UAPI_MAX_STRIPES + */ +static int imgu_css_osys_calc_frame_and_stripe_params( + struct imgu_css *css, unsigned int stripes, + struct imgu_abi_osys_config *osys, + struct imgu_css_scaler_info *scaler_luma, + struct imgu_css_scaler_info *scaler_chroma, + struct imgu_css_frame_params frame_params[], + struct imgu_css_stripe_params stripe_params[], + unsigned int pipe) +{ + struct imgu_css_reso reso; + unsigned int output_width, pin, s; + u32 input_width, input_height, target_width, target_height; + unsigned int procmode = 0; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + input_width = css_pipe->rect[IPU3_CSS_RECT_GDC].width; + input_height = css_pipe->rect[IPU3_CSS_RECT_GDC].height; + target_width = css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.width; + target_height = css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.height; + + /* Frame parameters */ + + /* Input width for Output System is output width of DVS (with GDC) */ + reso.input_width = css_pipe->rect[IPU3_CSS_RECT_GDC].width; + + /* Input height for Output System is output height of DVS (with GDC) */ + reso.input_height = css_pipe->rect[IPU3_CSS_RECT_GDC].height; + + reso.input_format = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->frame_format; + + reso.pin_width[IMGU_ABI_OSYS_PIN_OUT] = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.width; + reso.pin_height[IMGU_ABI_OSYS_PIN_OUT] = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.height; + reso.pin_stride[IMGU_ABI_OSYS_PIN_OUT] = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].width_pad; + reso.pin_format[IMGU_ABI_OSYS_PIN_OUT] = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->frame_format; + + reso.pin_width[IMGU_ABI_OSYS_PIN_VF] = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.width; + reso.pin_height[IMGU_ABI_OSYS_PIN_VF] = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.height; + reso.pin_stride[IMGU_ABI_OSYS_PIN_VF] = + css_pipe->queue[IPU3_CSS_QUEUE_VF].width_pad; + reso.pin_format[IMGU_ABI_OSYS_PIN_VF] = + css_pipe->queue[IPU3_CSS_QUEUE_VF].css_fmt->frame_format; + + /* Configure the frame parameters for all output pins */ + + frame_params[IMGU_ABI_OSYS_PIN_OUT].width = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.width; + frame_params[IMGU_ABI_OSYS_PIN_OUT].height = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.height; + frame_params[IMGU_ABI_OSYS_PIN_VF].width = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.width; + frame_params[IMGU_ABI_OSYS_PIN_VF].height = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.height; + frame_params[IMGU_ABI_OSYS_PIN_VF].crop_top = 0; + frame_params[IMGU_ABI_OSYS_PIN_VF].crop_left = 0; + + for (pin = 0; pin < IMGU_ABI_OSYS_PINS; pin++) { + int enable = 0; + int scaled = 0; + unsigned int format = 0; + unsigned int tiling = 0; + + frame_params[pin].flip = 0; + frame_params[pin].mirror = 0; + frame_params[pin].reduce_range = 0; + if (reso.pin_width[pin] != 0 && reso.pin_height[pin] != 0) { + enable = 1; + if (pin == IMGU_ABI_OSYS_PIN_OUT) { + if (reso.input_width < reso.pin_width[pin] || + reso.input_height < reso.pin_height[pin]) + return -EINVAL; + /* + * When input and output resolution is + * different instead of scaling, cropping + * should happen. Determine the crop factor + * to do the symmetric cropping + */ + frame_params[pin].crop_left = roundclosest_down( + (reso.input_width - + reso.pin_width[pin]) / 2, + IMGU_OSYS_DMA_CROP_W_LIMIT); + frame_params[pin].crop_top = roundclosest_down( + (reso.input_height - + reso.pin_height[pin]) / 2, + IMGU_OSYS_DMA_CROP_H_LIMIT); + } else { + if (reso.pin_width[pin] != reso.input_width || + reso.pin_height[pin] != reso.input_height) { + /* + * If resolution is different at input + * and output of OSYS, scaling is + * considered except when pin is MAIN. + * Later it will be decide whether + * scaler factor is 1 or other + * and cropping has to be done or not. + */ + scaled = 1; + } + } + imgu_css_osys_set_format(reso.pin_format[pin], &format, + &tiling); + } else { + enable = 0; + } + frame_params[pin].enable = enable; + frame_params[pin].format = format; + frame_params[pin].tiling = tiling; + frame_params[pin].stride = reso.pin_stride[pin]; + frame_params[pin].scaled = scaled; + } + + imgu_css_scaler_calc(input_width, input_height, target_width, + target_height, osys, scaler_luma, scaler_chroma, + &reso.pin_width[IMGU_ABI_OSYS_PIN_VF], + &reso.pin_height[IMGU_ABI_OSYS_PIN_VF], &procmode); + dev_dbg(css->dev, "osys scaler procmode is %u", procmode); + output_width = reso.pin_width[IMGU_ABI_OSYS_PIN_VF]; + + if (output_width < reso.input_width / 2) { + /* Scaling factor <= 0.5 */ + reso.chunk_width = IMGU_OSYS_BLOCK_WIDTH; + reso.block_width = IMGU_OSYS_BLOCK_WIDTH; + } else { /* 0.5 <= Scaling factor <= 1.0 */ + reso.chunk_width = IMGU_OSYS_BLOCK_WIDTH / 2; + reso.block_width = IMGU_OSYS_BLOCK_WIDTH; + } + + if (output_width <= reso.input_width * 7 / 8) { + /* Scaling factor <= 0.875 */ + reso.chunk_height = IMGU_OSYS_BLOCK_HEIGHT; + reso.block_height = IMGU_OSYS_BLOCK_HEIGHT; + } else { /* 1.0 <= Scaling factor <= 1.75 */ + reso.chunk_height = IMGU_OSYS_BLOCK_HEIGHT / 2; + reso.block_height = IMGU_OSYS_BLOCK_HEIGHT; + } + + /* + * Calculate scaler configuration parameters based on input and output + * resolution. + */ + + if (frame_params[IMGU_ABI_OSYS_PIN_VF].enable) { + /* + * When aspect ratio is different between target resolution and + * required resolution, determine the crop factor to do + * symmetric cropping + */ + u32 w = reso.pin_width[IMGU_ABI_OSYS_PIN_VF] - + frame_params[IMGU_ABI_OSYS_PIN_VF].width; + u32 h = reso.pin_height[IMGU_ABI_OSYS_PIN_VF] - + frame_params[IMGU_ABI_OSYS_PIN_VF].height; + + frame_params[IMGU_ABI_OSYS_PIN_VF].crop_left = + roundclosest_down(w / 2, IMGU_OSYS_DMA_CROP_W_LIMIT); + frame_params[IMGU_ABI_OSYS_PIN_VF].crop_top = + roundclosest_down(h / 2, IMGU_OSYS_DMA_CROP_H_LIMIT); + + if (reso.input_height % 4 || reso.input_width % 8) { + dev_err(css->dev, "OSYS input width is not multiple of 8 or\n"); + dev_err(css->dev, "height is not multiple of 4\n"); + return -EINVAL; + } + } + + /* Stripe parameters */ + + if (frame_params[IMGU_ABI_OSYS_PIN_VF].enable) { + output_width = reso.pin_width[IMGU_ABI_OSYS_PIN_VF]; + } else { + /* + * in case scaler output is not enabled + * take output width as input width since + * there is no scaling at main pin. + * Due to the fact that main pin can be different + * from input resolution to osys in the case of cropping, + * main pin resolution is not taken. + */ + output_width = reso.input_width; + } + + for (s = 0; s < stripes; s++) { + int stripe_offset_inp_y = 0; + int stripe_offset_inp_uv = 0; + int stripe_offset_out_y = 0; + int stripe_offset_out_uv = 0; + int stripe_phase_init_y = scaler_luma->phase_init; + int stripe_phase_init_uv = scaler_chroma->phase_init; + int stripe_offset_blk_y = 0; + int stripe_offset_blk_uv = 0; + int stripe_offset_col_y = 0; + int stripe_offset_col_uv = 0; + int stripe_pad_left_y = scaler_luma->pad_left; + int stripe_pad_left_uv = scaler_chroma->pad_left; + int stripe_pad_right_y = scaler_luma->pad_right; + int stripe_pad_right_uv = scaler_chroma->pad_right; + int stripe_crop_left_y = scaler_luma->crop_left; + int stripe_crop_left_uv = scaler_chroma->crop_left; + int stripe_input_width_y = reso.input_width; + int stripe_input_width_uv = 0; + int stripe_output_width_y = output_width; + int stripe_output_width_uv = 0; + int chunk_floor_y = 0; + int chunk_floor_uv = 0; + int chunk_ceil_uv = 0; + + if (stripes > 1) { + if (s > 0) { + /* Calculate stripe offsets */ + stripe_offset_out_y = + output_width * s / stripes; + stripe_offset_out_y = + rounddown(stripe_offset_out_y, + IPU3_UAPI_ISP_VEC_ELEMS); + stripe_offset_out_uv = stripe_offset_out_y / + IMGU_LUMA_TO_CHROMA_RATIO; + stripe_offset_inp_y = + imgu_css_osys_calc_stripe_offset( + stripe_offset_out_y, + IMGU_OSYS_FIR_PHASES, + scaler_luma->phase_init, + scaler_luma->phase_step, + scaler_luma->pad_left); + stripe_offset_inp_uv = + imgu_css_osys_calc_stripe_offset( + stripe_offset_out_uv, + IMGU_OSYS_FIR_PHASES, + scaler_chroma->phase_init, + scaler_chroma->phase_step, + scaler_chroma->pad_left); + + /* Calculate stripe phase init */ + stripe_phase_init_y = + imgu_css_osys_calc_stripe_phase_init( + stripe_offset_out_y, + IMGU_OSYS_FIR_PHASES, + scaler_luma->phase_init, + scaler_luma->phase_step, + scaler_luma->pad_left); + stripe_phase_init_uv = + imgu_css_osys_calc_stripe_phase_init( + stripe_offset_out_uv, + IMGU_OSYS_FIR_PHASES, + scaler_chroma->phase_init, + scaler_chroma->phase_step, + scaler_chroma->pad_left); + + /* + * Chunk boundary corner case - luma and chroma + * start from different input chunks. + */ + chunk_floor_y = rounddown(stripe_offset_inp_y, + reso.chunk_width); + chunk_floor_uv = + rounddown(stripe_offset_inp_uv, + reso.chunk_width / + IMGU_LUMA_TO_CHROMA_RATIO); + + if (chunk_floor_y != chunk_floor_uv * + IMGU_LUMA_TO_CHROMA_RATIO) { + /* + * Match starting luma/chroma chunks. + * Decrease offset for UV and add output + * cropping. + */ + stripe_offset_inp_uv -= 1; + stripe_crop_left_uv += 1; + stripe_phase_init_uv -= + scaler_luma->phase_step; + if (stripe_phase_init_uv < 0) + stripe_phase_init_uv = + stripe_phase_init_uv + + IMGU_OSYS_FIR_PHASES; + } + /* + * FW workaround for a HW bug: if the first + * chroma pixel is generated exactly at the end + * of chunck scaler HW may not output the pixel + * for downscale factors smaller than 1.5 + * (timing issue). + */ + chunk_ceil_uv = + roundup(stripe_offset_inp_uv, + reso.chunk_width / + IMGU_LUMA_TO_CHROMA_RATIO); + + if (stripe_offset_inp_uv == + chunk_ceil_uv - IMGU_OSYS_TAPS_UV) { + /* + * Decrease input offset and add + * output cropping + */ + stripe_offset_inp_uv -= 1; + stripe_phase_init_uv -= + scaler_luma->phase_step; + if (stripe_phase_init_uv < 0) { + stripe_phase_init_uv += + IMGU_OSYS_FIR_PHASES; + stripe_crop_left_uv += 1; + } + } + + /* + * Calculate block and column offsets for the + * input stripe + */ + stripe_offset_blk_y = + rounddown(stripe_offset_inp_y, + IMGU_INPUT_BLOCK_WIDTH); + stripe_offset_blk_uv = + rounddown(stripe_offset_inp_uv, + IMGU_INPUT_BLOCK_WIDTH / + IMGU_LUMA_TO_CHROMA_RATIO); + stripe_offset_col_y = stripe_offset_inp_y - + stripe_offset_blk_y; + stripe_offset_col_uv = stripe_offset_inp_uv - + stripe_offset_blk_uv; + + /* Left padding is only for the first stripe */ + stripe_pad_left_y = 0; + stripe_pad_left_uv = 0; + } + + /* Right padding is only for the last stripe */ + if (s < stripes - 1) { + int next_offset; + + stripe_pad_right_y = 0; + stripe_pad_right_uv = 0; + + next_offset = output_width * (s + 1) / stripes; + next_offset = rounddown(next_offset, 64); + stripe_output_width_y = next_offset - + stripe_offset_out_y; + } else { + stripe_output_width_y = output_width - + stripe_offset_out_y; + } + + /* Calculate target output stripe width */ + stripe_output_width_uv = stripe_output_width_y / + IMGU_LUMA_TO_CHROMA_RATIO; + /* Calculate input stripe width */ + stripe_input_width_y = stripe_offset_col_y + + imgu_css_osys_calc_inp_stripe_width( + stripe_output_width_y, + IMGU_OSYS_FIR_PHASES, + stripe_phase_init_y, + scaler_luma->phase_step, + IMGU_OSYS_TAPS_Y, + stripe_pad_left_y, + stripe_pad_right_y); + + stripe_input_width_uv = stripe_offset_col_uv + + imgu_css_osys_calc_inp_stripe_width( + stripe_output_width_uv, + IMGU_OSYS_FIR_PHASES, + stripe_phase_init_uv, + scaler_chroma->phase_step, + IMGU_OSYS_TAPS_UV, + stripe_pad_left_uv, + stripe_pad_right_uv); + + stripe_input_width_uv = max(DIV_ROUND_UP( + stripe_input_width_y, + IMGU_LUMA_TO_CHROMA_RATIO), + stripe_input_width_uv); + + stripe_input_width_y = stripe_input_width_uv * + IMGU_LUMA_TO_CHROMA_RATIO; + + if (s >= stripes - 1) { + stripe_input_width_y = reso.input_width - + stripe_offset_blk_y; + /* + * The scaler requires that the last stripe + * spans at least two input blocks. + */ + } + + /* + * Spec: input stripe width must be a multiple of 8. + * Increase the input width and recalculate the output + * width. This may produce an extra column of junk + * blocks which will be overwritten by the + * next stripe. + */ + stripe_input_width_y = ALIGN(stripe_input_width_y, 8); + stripe_output_width_y = + imgu_css_osys_out_stripe_width( + stripe_input_width_y, + IMGU_OSYS_FIR_PHASES, + stripe_phase_init_y, + scaler_luma->phase_step, + IMGU_OSYS_TAPS_Y, + stripe_pad_left_y, + stripe_pad_right_y, + stripe_offset_col_y); + + stripe_output_width_y = + rounddown(stripe_output_width_y, + IMGU_LUMA_TO_CHROMA_RATIO); + } + /* + * Following section executes and process parameters + * for both cases - Striping or No Striping. + */ + { + unsigned int i; + int pin_scale = 0; + /*Input resolution */ + + stripe_params[s].input_width = stripe_input_width_y; + stripe_params[s].input_height = reso.input_height; + + for (i = 0; i < IMGU_ABI_OSYS_PINS; i++) { + if (frame_params[i].scaled) { + /* + * Output stripe resolution and offset + * as produced by the scaler; actual + * output resolution may be slightly + * smaller. + */ + stripe_params[s].output_width[i] = + stripe_output_width_y; + stripe_params[s].output_height[i] = + reso.pin_height[i]; + stripe_params[s].output_offset[i] = + stripe_offset_out_y; + + pin_scale += frame_params[i].scaled; + } else { + /* Unscaled pin */ + stripe_params[s].output_width[i] = + stripe_params[s].input_width; + stripe_params[s].output_height[i] = + stripe_params[s].input_height; + stripe_params[s].output_offset[i] = + stripe_offset_blk_y; + } + } + + /* If no pin use scale, we use BYPASS mode */ + stripe_params[s].processing_mode = procmode; + stripe_params[s].phase_step = scaler_luma->phase_step; + stripe_params[s].exp_shift = scaler_luma->exp_shift; + stripe_params[s].phase_init_left_y = + stripe_phase_init_y; + stripe_params[s].phase_init_left_uv = + stripe_phase_init_uv; + stripe_params[s].phase_init_top_y = + scaler_luma->phase_init; + stripe_params[s].phase_init_top_uv = + scaler_chroma->phase_init; + stripe_params[s].pad_left_y = stripe_pad_left_y; + stripe_params[s].pad_left_uv = stripe_pad_left_uv; + stripe_params[s].pad_right_y = stripe_pad_right_y; + stripe_params[s].pad_right_uv = stripe_pad_right_uv; + stripe_params[s].pad_top_y = scaler_luma->pad_left; + stripe_params[s].pad_top_uv = scaler_chroma->pad_left; + stripe_params[s].pad_bottom_y = scaler_luma->pad_right; + stripe_params[s].pad_bottom_uv = + scaler_chroma->pad_right; + stripe_params[s].crop_left_y = stripe_crop_left_y; + stripe_params[s].crop_top_y = scaler_luma->crop_top; + stripe_params[s].crop_left_uv = stripe_crop_left_uv; + stripe_params[s].crop_top_uv = scaler_chroma->crop_top; + stripe_params[s].start_column_y = stripe_offset_col_y; + stripe_params[s].start_column_uv = stripe_offset_col_uv; + stripe_params[s].chunk_width = reso.chunk_width; + stripe_params[s].chunk_height = reso.chunk_height; + stripe_params[s].block_width = reso.block_width; + stripe_params[s].block_height = reso.block_height; + } + } + + return 0; +} + +/* + * This function configures the Output Formatter System, given the number of + * stripes, scaler luma and chrome parameters + */ +static int imgu_css_osys_calc(struct imgu_css *css, unsigned int pipe, + unsigned int stripes, + struct imgu_abi_osys_config *osys, + struct imgu_css_scaler_info *scaler_luma, + struct imgu_css_scaler_info *scaler_chroma, + struct imgu_abi_stripes block_stripes[]) +{ + struct imgu_css_frame_params frame_params[IMGU_ABI_OSYS_PINS]; + struct imgu_css_stripe_params stripe_params[IPU3_UAPI_MAX_STRIPES]; + struct imgu_abi_osys_formatter_params *param; + unsigned int pin, s; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + memset(osys, 0, sizeof(*osys)); + + /* Compute the frame and stripe params */ + if (imgu_css_osys_calc_frame_and_stripe_params(css, stripes, osys, + scaler_luma, + scaler_chroma, + frame_params, + stripe_params, pipe)) + return -EINVAL; + + /* Output formatter system parameters */ + + for (s = 0; s < stripes; s++) { + struct imgu_abi_osys_scaler_params *scaler = + &osys->scaler[s].param; + int fifo_addr_fmt = IMGU_FIFO_ADDR_SCALER_TO_FMT; + int fifo_addr_ack = IMGU_FIFO_ADDR_SCALER_TO_SP; + + /* OUTPUT 0 / PIN 0 is only Scaler output */ + scaler->inp_buf_y_st_addr = IMGU_VMEM1_INP_BUF_ADDR; + + /* + * = (IMGU_OSYS_BLOCK_WIDTH / IMGU_VMEM1_ELEMS_PER_VEC) + * = (2 * IPU3_UAPI_ISP_VEC_ELEMS) / + * (IMGU_HIVE_OF_SYS_OF_SYSTEM_NWAYS) + * = 2 * 64 / 32 = 4 + */ + scaler->inp_buf_y_line_stride = IMGU_VMEM1_Y_STRIDE; + /* + * = (IMGU_VMEM1_V_OFFSET + VMEM1_uv_size) + * = (IMGU_VMEM1_U_OFFSET + VMEM1_uv_size) + + * (VMEM1_y_size / 4) + * = (VMEM1_y_size) + (VMEM1_y_size / 4) + + * (IMGU_OSYS_BLOCK_HEIGHT * IMGU_VMEM1_Y_STRIDE)/4 + * = (IMGU_OSYS_BLOCK_HEIGHT * IMGU_VMEM1_Y_STRIDE) + */ + scaler->inp_buf_y_buffer_stride = IMGU_VMEM1_BUF_SIZE; + scaler->inp_buf_u_st_addr = IMGU_VMEM1_INP_BUF_ADDR + + IMGU_VMEM1_U_OFFSET; + scaler->inp_buf_v_st_addr = IMGU_VMEM1_INP_BUF_ADDR + + IMGU_VMEM1_V_OFFSET; + scaler->inp_buf_uv_line_stride = IMGU_VMEM1_UV_STRIDE; + scaler->inp_buf_uv_buffer_stride = IMGU_VMEM1_BUF_SIZE; + scaler->inp_buf_chunk_width = stripe_params[s].chunk_width; + scaler->inp_buf_nr_buffers = IMGU_OSYS_NUM_INPUT_BUFFERS; + + /* Output buffers */ + scaler->out_buf_y_st_addr = IMGU_VMEM1_INT_BUF_ADDR; + scaler->out_buf_y_line_stride = stripe_params[s].block_width / + IMGU_VMEM1_ELEMS_PER_VEC; + scaler->out_buf_y_buffer_stride = IMGU_VMEM1_BUF_SIZE; + scaler->out_buf_u_st_addr = IMGU_VMEM1_INT_BUF_ADDR + + IMGU_VMEM1_U_OFFSET; + scaler->out_buf_v_st_addr = IMGU_VMEM1_INT_BUF_ADDR + + IMGU_VMEM1_V_OFFSET; + scaler->out_buf_uv_line_stride = stripe_params[s].block_width / + IMGU_VMEM1_ELEMS_PER_VEC / 2; + scaler->out_buf_uv_buffer_stride = IMGU_VMEM1_BUF_SIZE; + scaler->out_buf_nr_buffers = IMGU_OSYS_NUM_INTERM_BUFFERS; + + /* Intermediate buffers */ + scaler->int_buf_y_st_addr = IMGU_VMEM2_BUF_Y_ADDR; + scaler->int_buf_y_line_stride = IMGU_VMEM2_BUF_Y_STRIDE; + scaler->int_buf_u_st_addr = IMGU_VMEM2_BUF_U_ADDR; + scaler->int_buf_v_st_addr = IMGU_VMEM2_BUF_V_ADDR; + scaler->int_buf_uv_line_stride = IMGU_VMEM2_BUF_UV_STRIDE; + scaler->int_buf_height = IMGU_VMEM2_LINES_PER_BLOCK; + scaler->int_buf_chunk_width = stripe_params[s].chunk_height; + scaler->int_buf_chunk_height = stripe_params[s].block_width; + + /* Context buffers */ + scaler->ctx_buf_hor_y_st_addr = IMGU_VMEM3_HOR_Y_ADDR; + scaler->ctx_buf_hor_u_st_addr = IMGU_VMEM3_HOR_U_ADDR; + scaler->ctx_buf_hor_v_st_addr = IMGU_VMEM3_HOR_V_ADDR; + scaler->ctx_buf_ver_y_st_addr = IMGU_VMEM3_VER_Y_ADDR; + scaler->ctx_buf_ver_u_st_addr = IMGU_VMEM3_VER_U_ADDR; + scaler->ctx_buf_ver_v_st_addr = IMGU_VMEM3_VER_V_ADDR; + + /* Addresses for release-input and process-output tokens */ + scaler->release_inp_buf_addr = fifo_addr_ack; + scaler->release_inp_buf_en = 1; + scaler->release_out_buf_en = 1; + scaler->process_out_buf_addr = fifo_addr_fmt; + + /* Settings dimensions, padding, cropping */ + scaler->input_image_y_width = stripe_params[s].input_width; + scaler->input_image_y_height = stripe_params[s].input_height; + scaler->input_image_y_start_column = + stripe_params[s].start_column_y; + scaler->input_image_uv_start_column = + stripe_params[s].start_column_uv; + scaler->input_image_y_left_pad = stripe_params[s].pad_left_y; + scaler->input_image_uv_left_pad = stripe_params[s].pad_left_uv; + scaler->input_image_y_right_pad = stripe_params[s].pad_right_y; + scaler->input_image_uv_right_pad = + stripe_params[s].pad_right_uv; + scaler->input_image_y_top_pad = stripe_params[s].pad_top_y; + scaler->input_image_uv_top_pad = stripe_params[s].pad_top_uv; + scaler->input_image_y_bottom_pad = + stripe_params[s].pad_bottom_y; + scaler->input_image_uv_bottom_pad = + stripe_params[s].pad_bottom_uv; + scaler->processing_mode = stripe_params[s].processing_mode; + scaler->scaling_ratio = stripe_params[s].phase_step; + scaler->y_left_phase_init = stripe_params[s].phase_init_left_y; + scaler->uv_left_phase_init = + stripe_params[s].phase_init_left_uv; + scaler->y_top_phase_init = stripe_params[s].phase_init_top_y; + scaler->uv_top_phase_init = stripe_params[s].phase_init_top_uv; + scaler->coeffs_exp_shift = stripe_params[s].exp_shift; + scaler->out_y_left_crop = stripe_params[s].crop_left_y; + scaler->out_uv_left_crop = stripe_params[s].crop_left_uv; + scaler->out_y_top_crop = stripe_params[s].crop_top_y; + scaler->out_uv_top_crop = stripe_params[s].crop_top_uv; + + for (pin = 0; pin < IMGU_ABI_OSYS_PINS; pin++) { + int in_fifo_addr; + int out_fifo_addr; + int block_width_vecs; + int input_width_s; + int input_width_vecs; + int input_buf_y_st_addr; + int input_buf_u_st_addr; + int input_buf_v_st_addr; + int input_buf_y_line_stride; + int input_buf_uv_line_stride; + int output_buf_y_line_stride; + int output_buf_uv_line_stride; + int output_buf_nr_y_lines; + int block_height; + int block_width; + struct imgu_abi_osys_frame_params *fr_pr; + + fr_pr = &osys->frame[pin].param; + + /* Frame parameters */ + fr_pr->enable = frame_params[pin].enable; + fr_pr->format = frame_params[pin].format; + fr_pr->mirror = frame_params[pin].mirror; + fr_pr->flip = frame_params[pin].flip; + fr_pr->tiling = frame_params[pin].tiling; + fr_pr->width = frame_params[pin].width; + fr_pr->height = frame_params[pin].height; + fr_pr->stride = frame_params[pin].stride; + fr_pr->scaled = frame_params[pin].scaled; + + /* Stripe parameters */ + osys->stripe[s].crop_top[pin] = + frame_params[pin].crop_top; + osys->stripe[s].input_width = + stripe_params[s].input_width; + osys->stripe[s].input_height = + stripe_params[s].input_height; + osys->stripe[s].block_height = + stripe_params[s].block_height; + osys->stripe[s].block_width = + stripe_params[s].block_width; + osys->stripe[s].output_width[pin] = + stripe_params[s].output_width[pin]; + osys->stripe[s].output_height[pin] = + stripe_params[s].output_height[pin]; + + if (s == 0) { + /* Only first stripe should do left cropping */ + osys->stripe[s].crop_left[pin] = + frame_params[pin].crop_left; + osys->stripe[s].output_offset[pin] = + stripe_params[s].output_offset[pin]; + } else { + /* + * Stripe offset for other strips should be + * adjusted according to the cropping done + * at the first strip + */ + osys->stripe[s].crop_left[pin] = 0; + osys->stripe[s].output_offset[pin] = + (stripe_params[s].output_offset[pin] - + osys->stripe[0].crop_left[pin]); + } + + if (!frame_params[pin].enable) + continue; + + /* Formatter: configurations */ + + /* + * Get the dimensions of the input blocks of the + * formatter, which is the same as the output + * blocks of the scaler. + */ + if (frame_params[pin].scaled) { + block_height = stripe_params[s].block_height; + block_width = stripe_params[s].block_width; + } else { + block_height = IMGU_OSYS_BLOCK_HEIGHT; + block_width = IMGU_OSYS_BLOCK_WIDTH; + } + block_width_vecs = + block_width / IMGU_VMEM1_ELEMS_PER_VEC; + /* + * The input/output line stride depends on the + * block size. + */ + input_buf_y_line_stride = block_width_vecs; + input_buf_uv_line_stride = block_width_vecs / 2; + output_buf_y_line_stride = block_width_vecs; + output_buf_uv_line_stride = block_width_vecs / 2; + output_buf_nr_y_lines = block_height; + if (frame_params[pin].format == + IMGU_ABI_OSYS_FORMAT_NV12 || + frame_params[pin].format == + IMGU_ABI_OSYS_FORMAT_NV21) + output_buf_uv_line_stride = + output_buf_y_line_stride; + + /* + * Tiled outputs use a different output buffer + * configuration. The input (= scaler output) block + * width translates to a tile height, and the block + * height to the tile width. The default block size of + * 128x32 maps exactly onto a 4kB tile (512x8) for Y. + * For UV, the tile width is always half. + */ + if (frame_params[pin].tiling) { + output_buf_nr_y_lines = 8; + output_buf_y_line_stride = 512 / + IMGU_VMEM1_ELEMS_PER_VEC; + output_buf_uv_line_stride = 256 / + IMGU_VMEM1_ELEMS_PER_VEC; + } + + /* + * Store the output buffer line stride. Will be + * used to compute buffer offsets in boundary + * conditions when output blocks are partially + * outside the image. + */ + osys->stripe[s].buf_stride[pin] = + output_buf_y_line_stride * + IMGU_HIVE_OF_SYS_OF_SYSTEM_NWAYS; + if (frame_params[pin].scaled) { + /* + * The input buffs are the intermediate + * buffers (scalers' output) + */ + input_buf_y_st_addr = IMGU_VMEM1_INT_BUF_ADDR; + input_buf_u_st_addr = IMGU_VMEM1_INT_BUF_ADDR + + IMGU_VMEM1_U_OFFSET; + input_buf_v_st_addr = IMGU_VMEM1_INT_BUF_ADDR + + IMGU_VMEM1_V_OFFSET; + } else { + /* + * The input bufferss are the buffers + * filled by the SP + */ + input_buf_y_st_addr = IMGU_VMEM1_INP_BUF_ADDR; + input_buf_u_st_addr = IMGU_VMEM1_INP_BUF_ADDR + + IMGU_VMEM1_U_OFFSET; + input_buf_v_st_addr = IMGU_VMEM1_INP_BUF_ADDR + + IMGU_VMEM1_V_OFFSET; + } + + /* + * The formatter input width must be rounded to + * the block width. Otherwise the formatter will + * not recognize the end of the line, resulting + * in incorrect tiling (system may hang!) and + * possibly other problems. + */ + input_width_s = + roundup(stripe_params[s].output_width[pin], + block_width); + input_width_vecs = input_width_s / + IMGU_VMEM1_ELEMS_PER_VEC; + out_fifo_addr = IMGU_FIFO_ADDR_FMT_TO_SP; + /* + * Process-output tokens must be sent to the SP. + * When scaling, the release-input tokens can be + * sent directly to the scaler, otherwise the + * formatter should send them to the SP. + */ + if (frame_params[pin].scaled) + in_fifo_addr = IMGU_FIFO_ADDR_FMT_TO_SCALER; + else + in_fifo_addr = IMGU_FIFO_ADDR_FMT_TO_SP; + + /* Formatter */ + param = &osys->formatter[s][pin].param; + + param->format = frame_params[pin].format; + param->flip = frame_params[pin].flip; + param->mirror = frame_params[pin].mirror; + param->tiling = frame_params[pin].tiling; + param->reduce_range = frame_params[pin].reduce_range; + param->alpha_blending = 0; + param->release_inp_addr = in_fifo_addr; + param->release_inp_en = 1; + param->process_out_buf_addr = out_fifo_addr; + param->image_width_vecs = input_width_vecs; + param->image_height_lines = + stripe_params[s].output_height[pin]; + param->inp_buff_y_st_addr = input_buf_y_st_addr; + param->inp_buff_y_line_stride = input_buf_y_line_stride; + param->inp_buff_y_buffer_stride = IMGU_VMEM1_BUF_SIZE; + param->int_buff_u_st_addr = input_buf_u_st_addr; + param->int_buff_v_st_addr = input_buf_v_st_addr; + param->inp_buff_uv_line_stride = + input_buf_uv_line_stride; + param->inp_buff_uv_buffer_stride = IMGU_VMEM1_BUF_SIZE; + param->out_buff_level = 0; + param->out_buff_nr_y_lines = output_buf_nr_y_lines; + param->out_buff_u_st_offset = IMGU_VMEM1_U_OFFSET; + param->out_buff_v_st_offset = IMGU_VMEM1_V_OFFSET; + param->out_buff_y_line_stride = + output_buf_y_line_stride; + param->out_buff_uv_line_stride = + output_buf_uv_line_stride; + param->hist_buff_st_addr = IMGU_VMEM1_HST_BUF_ADDR; + param->hist_buff_line_stride = + IMGU_VMEM1_HST_BUF_STRIDE; + param->hist_buff_nr_lines = IMGU_VMEM1_HST_BUF_NLINES; + } + } + + block_stripes[0].offset = 0; + if (stripes <= 1) { + block_stripes[0].width = stripe_params[0].input_width; + block_stripes[0].height = stripe_params[0].input_height; + } else { + struct imgu_fw_info *bi = + &css->fwp->binary_header[css_pipe->bindex]; + unsigned int sp_block_width = + bi->info.isp.sp.block.block_width * + IPU3_UAPI_ISP_VEC_ELEMS; + + block_stripes[0].width = roundup(stripe_params[0].input_width, + sp_block_width); + block_stripes[1].offset = + rounddown(css_pipe->rect[IPU3_CSS_RECT_GDC].width - + stripe_params[1].input_width, sp_block_width); + block_stripes[1].width = + roundup(css_pipe->rect[IPU3_CSS_RECT_GDC].width - + block_stripes[1].offset, sp_block_width); + block_stripes[0].height = css_pipe->rect[IPU3_CSS_RECT_GDC].height; + block_stripes[1].height = block_stripes[0].height; + } + + return 0; +} + +/*********************** Mostly 3A operations ******************************/ + +/* + * This function creates a "TO-DO list" (operations) for the sp code. + * + * There are 2 types of operations: + * 1. Transfer: Issue DMA transfer request for copying grid cells from DDR to + * accelerator space (NOTE that this space is limited) associated data: + * DDR address + accelerator's config set index(acc's address). + * + * 2. Issue "Process Lines Command" to shd accelerator + * associated data: #lines + which config set to use (actually, accelerator + * will use x AND (x+1)%num_of_sets - NOTE that this implies the restriction + * of not touching config sets x & (x+1)%num_of_sets when process_lines(x) + * is active). + * + * Basically there are 2 types of operations "chunks": + * 1. "initial chunk": Initially, we do as much transfers as we can (and need) + * [0 - max sets(3) ] followed by 1 or 2 "process lines" operations. + * + * 2. "regular chunk" - 1 transfer followed by 1 process line operation. + * (in some cases we might need additional transfer ate the last chunk). + * + * for some case: + * --> init + * tr (0) + * tr (1) + * tr (2) + * pl (0) + * pl (1) + * --> ack (0) + * tr (3) + * pl (2) + * --> ack (1) + * pl (3) + * --> ack (2) + * do nothing + * --> ack (3) + * do nothing + */ + +static int +imgu_css_shd_ops_calc(struct imgu_abi_shd_intra_frame_operations_data *ops, + const struct ipu3_uapi_shd_grid_config *grid, + unsigned int image_height) +{ + unsigned int block_height = 1 << grid->block_height_log2; + unsigned int grid_height_per_slice = grid->grid_height_per_slice; + unsigned int set_height = grid_height_per_slice * block_height; + + /* We currently support only abs(y_start) > grid_height_per_slice */ + unsigned int positive_y_start = (unsigned int)-grid->y_start; + unsigned int first_process_lines = + set_height - (positive_y_start % set_height); + unsigned int last_set_height; + unsigned int num_of_sets; + + struct imgu_abi_acc_operation *p_op; + struct imgu_abi_acc_process_lines_cmd_data *p_pl; + struct imgu_abi_shd_transfer_luts_set_data *p_tr; + + unsigned int op_idx, pl_idx, tr_idx; + unsigned char tr_set_num, pl_cfg_set; + + /* + * When the number of lines for the last process lines command + * is equal to a set height, we need another line of grid cell - + * additional transfer is required. + */ + unsigned char last_tr = 0; + + /* Add "process lines" command to the list of operations */ + bool add_pl; + /* Add DMA xfer (config set) command to the list of ops */ + bool add_tr; + + /* + * Available partial grid (the part that fits into #IMGU_SHD_SETS sets) + * doesn't cover whole frame - need to process in chunks + */ + if (image_height > first_process_lines) { + last_set_height = + (image_height - first_process_lines) % set_height; + num_of_sets = last_set_height > 0 ? + (image_height - first_process_lines) / set_height + 2 : + (image_height - first_process_lines) / set_height + 1; + last_tr = (set_height - last_set_height <= block_height || + last_set_height == 0) ? 1 : 0; + } else { /* partial grid covers whole frame */ + last_set_height = 0; + num_of_sets = 1; + first_process_lines = image_height; + last_tr = set_height - image_height <= block_height ? 1 : 0; + } + + /* Init operations lists and counters */ + p_op = ops->operation_list; + op_idx = 0; + p_pl = ops->process_lines_data; + pl_idx = 0; + p_tr = ops->transfer_data; + tr_idx = 0; + + memset(ops, 0, sizeof(*ops)); + + /* Cyclic counters that holds config set number [0,IMGU_SHD_SETS) */ + tr_set_num = 0; + pl_cfg_set = 0; + + /* + * Always start with a transfer - process lines command must be + * initiated only after appropriate config sets are in place + * (2 configuration sets per process line command, except for last one). + */ + add_pl = false; + add_tr = true; + + while (add_pl || add_tr) { + /* Transfer ops */ + if (add_tr) { + if (op_idx >= IMGU_ABI_SHD_MAX_OPERATIONS || + tr_idx >= IMGU_ABI_SHD_MAX_TRANSFERS) + return -EINVAL; + p_op[op_idx].op_type = + IMGU_ABI_ACC_OPTYPE_TRANSFER_DATA; + p_op[op_idx].op_indicator = IMGU_ABI_ACC_OP_IDLE; + op_idx++; + p_tr[tr_idx].set_number = tr_set_num; + tr_idx++; + tr_set_num = (tr_set_num + 1) % IMGU_SHD_SETS; + } + + /* Process-lines ops */ + if (add_pl) { + if (op_idx >= IMGU_ABI_SHD_MAX_OPERATIONS || + pl_idx >= IMGU_ABI_SHD_MAX_PROCESS_LINES) + return -EINVAL; + p_op[op_idx].op_type = + IMGU_ABI_ACC_OPTYPE_PROCESS_LINES; + + /* + * In case we have 2 process lines commands - + * don't stop after the first one + */ + if (pl_idx == 0 && num_of_sets != 1) + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_IDLE; + /* + * Initiate last process lines command - + * end of operation list. + */ + else if (pl_idx == num_of_sets - 1) + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_END_OF_OPS; + /* + * Intermediate process line command - end of operation + * "chunk" (meaning few "transfers" followed by few + * "process lines" commands). + */ + else + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_END_OF_ACK; + + op_idx++; + + /* first process line operation */ + if (pl_idx == 0) + p_pl[pl_idx].lines = first_process_lines; + /* Last process line operation */ + else if (pl_idx == num_of_sets - 1 && + last_set_height > 0) + p_pl[pl_idx].lines = last_set_height; + else /* "regular" process lines operation */ + p_pl[pl_idx].lines = set_height; + + p_pl[pl_idx].cfg_set = pl_cfg_set; + pl_idx++; + pl_cfg_set = (pl_cfg_set + 1) % IMGU_SHD_SETS; + } + + /* + * Initially, we always transfer + * min(IMGU_SHD_SETS, num_of_sets) - after that we fill in the + * corresponding process lines commands. + */ + if (tr_idx == IMGU_SHD_SETS || + tr_idx == num_of_sets + last_tr) { + add_tr = false; + add_pl = true; + } + + /* + * We have finished the "initial" operations chunk - + * be ready to get more chunks. + */ + if (pl_idx == 2) { + add_tr = true; + add_pl = true; + } + + /* Stop conditions for each operation type */ + if (tr_idx == num_of_sets + last_tr) + add_tr = false; + if (pl_idx == num_of_sets) + add_pl = false; + } + + return 0; +} + +/* + * The follow handshake procotol is the same for AF, AWB and AWB FR. + * + * for n sets of meta-data, the flow is: + * --> init + * process-lines (0) + * process-lines (1) eoc + * --> ack (0) + * read-meta-data (0) + * process-lines (2) eoc + * --> ack (1) + * read-meta-data (1) + * process-lines (3) eoc + * ... + * + * --> ack (n-3) + * read-meta-data (n-3) + * process-lines (n-1) eoc + * --> ack (n-2) + * read-meta-data (n-2) eoc + * --> ack (n-1) + * read-meta-data (n-1) eof + * + * for 2 sets we get: + * --> init + * pl (0) + * pl (1) eoc + * --> ack (0) + * pl (2) - rest of image, if applicable) + * rmd (0) eoc + * --> ack (1) + * rmd (1) eof + * --> (ack (2)) + * do nothing + * + * for only one set: + * + * --> init + * pl(0) eoc + * --> ack (0) + * rmd (0) eof + * + * grid smaller than image case + * for example 128x128 grid (block size 8x8, 16x16 num of blocks) + * start at (0,0) + * 1st set holds 160 cells - 10 blocks vertical, 16 horizontal + * => 1st process lines = 80 + * we're left with 128-80=48 lines (6 blocks vertical) + * => 2nd process lines = 48 + * last process lines to cover the image - image_height - 128 + * + * --> init + * pl (0) first + * pl (1) last-in-grid + * --> ack (0) + * rmd (0) + * pl (2) after-grid + * --> ack (1) + * rmd (1) eof + * --> ack (2) + * do nothing + */ +struct process_lines { + unsigned int image_height; + unsigned short grid_height; + unsigned short block_height; + unsigned short y_start; + unsigned char grid_height_per_slice; + + unsigned short max_op; /* max operation */ + unsigned short max_tr; /* max transaction */ + unsigned char acc_enable; +}; + +/* Helper to config intra_frame_operations_data. */ +static int +imgu_css_acc_process_lines(const struct process_lines *pl, + struct imgu_abi_acc_operation *p_op, + struct imgu_abi_acc_process_lines_cmd_data *p_pl, + struct imgu_abi_acc_transfer_op_data *p_tr) +{ + unsigned short op_idx = 0, pl_idx = 0, tr_idx = 0; + unsigned char tr_set_num = 0, pl_cfg_set = 0; + const unsigned short grid_last_line = + pl->y_start + pl->grid_height * pl->block_height; + const unsigned short process_lines = + pl->grid_height_per_slice * pl->block_height; + + unsigned int process_lines_after_grid; + unsigned short first_process_lines; + unsigned short last_process_lines_in_grid; + + unsigned short num_of_process_lines; + unsigned short num_of_sets; + + if (pl->grid_height_per_slice == 0) + return -EINVAL; + + if (pl->acc_enable && grid_last_line > pl->image_height) + return -EINVAL; + + num_of_sets = pl->grid_height / pl->grid_height_per_slice; + if (num_of_sets * pl->grid_height_per_slice < pl->grid_height) + num_of_sets++; + + /* Account for two line delay inside the FF */ + if (pl->max_op == IMGU_ABI_AF_MAX_OPERATIONS) { + first_process_lines = process_lines + pl->y_start + 2; + last_process_lines_in_grid = + (grid_last_line - first_process_lines) - + ((num_of_sets - 2) * process_lines) + 4; + process_lines_after_grid = + pl->image_height - grid_last_line - 4; + } else { + first_process_lines = process_lines + pl->y_start; + last_process_lines_in_grid = + (grid_last_line - first_process_lines) - + ((num_of_sets - 2) * process_lines); + process_lines_after_grid = pl->image_height - grid_last_line; + } + + num_of_process_lines = num_of_sets; + if (process_lines_after_grid > 0) + num_of_process_lines++; + + while (tr_idx < num_of_sets || pl_idx < num_of_process_lines) { + /* Read meta-data */ + if (pl_idx >= 2 || (pl_idx == 1 && num_of_sets == 1)) { + if (op_idx >= pl->max_op || tr_idx >= pl->max_tr) + return -EINVAL; + + p_op[op_idx].op_type = + IMGU_ABI_ACC_OPTYPE_TRANSFER_DATA; + + if (tr_idx == num_of_sets - 1) + /* The last operation is always a tr */ + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_END_OF_OPS; + else if (tr_idx == num_of_sets - 2) + if (process_lines_after_grid == 0) + /* + * No additional pl op left - + * this op is left as lats of cycle + */ + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_END_OF_ACK; + else + /* + * We still have to process-lines after + * the grid so have one more pl op + */ + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_IDLE; + else + /* Default - usually there's a pl after a tr */ + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_IDLE; + + op_idx++; + if (p_tr) { + p_tr[tr_idx].set_number = tr_set_num; + tr_set_num = 1 - tr_set_num; + } + tr_idx++; + } + + /* process_lines */ + if (pl_idx < num_of_process_lines) { + if (op_idx >= pl->max_op || pl_idx >= pl->max_tr) + return -EINVAL; + + p_op[op_idx].op_type = + IMGU_ABI_ACC_OPTYPE_PROCESS_LINES; + if (pl_idx == 0) + if (num_of_process_lines == 1) + /* Only one pl op */ + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_END_OF_ACK; + else + /* On init - do two pl ops */ + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_IDLE; + else + /* Usually pl is the end of the ack cycle */ + p_op[op_idx].op_indicator = + IMGU_ABI_ACC_OP_END_OF_ACK; + + op_idx++; + + if (pl_idx == 0) + /* First process line */ + p_pl[pl_idx].lines = first_process_lines; + else if (pl_idx == num_of_sets - 1) + /* Last in grid */ + p_pl[pl_idx].lines = last_process_lines_in_grid; + else if (pl_idx == num_of_process_lines - 1) + /* After the grid */ + p_pl[pl_idx].lines = process_lines_after_grid; + else + /* Inside the grid */ + p_pl[pl_idx].lines = process_lines; + + if (p_tr) { + p_pl[pl_idx].cfg_set = pl_cfg_set; + pl_cfg_set = 1 - pl_cfg_set; + } + pl_idx++; + } + } + + return 0; +} + +static int imgu_css_af_ops_calc(struct imgu_css *css, unsigned int pipe, + struct imgu_abi_af_config *af_config) +{ + struct imgu_abi_af_intra_frame_operations_data *to = + &af_config->operations_data; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + struct imgu_fw_info *bi = + &css->fwp->binary_header[css_pipe->bindex]; + + struct process_lines pl = { + .image_height = css_pipe->rect[IPU3_CSS_RECT_BDS].height, + .grid_height = af_config->config.grid_cfg.height, + .block_height = + 1 << af_config->config.grid_cfg.block_height_log2, + .y_start = af_config->config.grid_cfg.y_start & + IPU3_UAPI_GRID_START_MASK, + .grid_height_per_slice = + af_config->stripes[0].grid_cfg.height_per_slice, + .max_op = IMGU_ABI_AF_MAX_OPERATIONS, + .max_tr = IMGU_ABI_AF_MAX_TRANSFERS, + .acc_enable = bi->info.isp.sp.enable.af, + }; + + return imgu_css_acc_process_lines(&pl, to->ops, to->process_lines_data, + NULL); +} + +static int +imgu_css_awb_fr_ops_calc(struct imgu_css *css, unsigned int pipe, + struct imgu_abi_awb_fr_config *awb_fr_config) +{ + struct imgu_abi_awb_fr_intra_frame_operations_data *to = + &awb_fr_config->operations_data; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + struct imgu_fw_info *bi = + &css->fwp->binary_header[css_pipe->bindex]; + struct process_lines pl = { + .image_height = css_pipe->rect[IPU3_CSS_RECT_BDS].height, + .grid_height = awb_fr_config->config.grid_cfg.height, + .block_height = + 1 << awb_fr_config->config.grid_cfg.block_height_log2, + .y_start = awb_fr_config->config.grid_cfg.y_start & + IPU3_UAPI_GRID_START_MASK, + .grid_height_per_slice = + awb_fr_config->stripes[0].grid_cfg.height_per_slice, + .max_op = IMGU_ABI_AWB_FR_MAX_OPERATIONS, + .max_tr = IMGU_ABI_AWB_FR_MAX_PROCESS_LINES, + .acc_enable = bi->info.isp.sp.enable.awb_fr_acc, + }; + + return imgu_css_acc_process_lines(&pl, to->ops, to->process_lines_data, + NULL); +} + +static int imgu_css_awb_ops_calc(struct imgu_css *css, unsigned int pipe, + struct imgu_abi_awb_config *awb_config) +{ + struct imgu_abi_awb_intra_frame_operations_data *to = + &awb_config->operations_data; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + struct imgu_fw_info *bi = + &css->fwp->binary_header[css_pipe->bindex]; + + struct process_lines pl = { + .image_height = css_pipe->rect[IPU3_CSS_RECT_BDS].height, + .grid_height = awb_config->config.grid.height, + .block_height = + 1 << awb_config->config.grid.block_height_log2, + .y_start = awb_config->config.grid.y_start, + .grid_height_per_slice = + awb_config->stripes[0].grid.height_per_slice, + .max_op = IMGU_ABI_AWB_MAX_OPERATIONS, + .max_tr = IMGU_ABI_AWB_MAX_TRANSFERS, + .acc_enable = bi->info.isp.sp.enable.awb_acc, + }; + + return imgu_css_acc_process_lines(&pl, to->ops, to->process_lines_data, + to->transfer_data); +} + +static u16 imgu_css_grid_end(u16 start, u8 width, u8 block_width_log2) +{ + return (start & IPU3_UAPI_GRID_START_MASK) + + (width << block_width_log2) - 1; +} + +static void imgu_css_grid_end_calc(struct ipu3_uapi_grid_config *grid_cfg) +{ + grid_cfg->x_end = imgu_css_grid_end(grid_cfg->x_start, grid_cfg->width, + grid_cfg->block_width_log2); + grid_cfg->y_end = imgu_css_grid_end(grid_cfg->y_start, grid_cfg->height, + grid_cfg->block_height_log2); +} + +/****************** config computation *****************************/ + +static int imgu_css_cfg_acc_stripe(struct imgu_css *css, unsigned int pipe, + struct imgu_abi_acc_param *acc) +{ + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + const struct imgu_fw_info *bi = + &css->fwp->binary_header[css_pipe->bindex]; + struct imgu_css_scaler_info scaler_luma, scaler_chroma; + const unsigned int stripes = bi->info.isp.sp.iterator.num_stripes; + const unsigned int f = IPU3_UAPI_ISP_VEC_ELEMS * 2; + unsigned int bds_ds, i; + + memset(acc, 0, sizeof(*acc)); + + /* acc_param: osys_config */ + + if (imgu_css_osys_calc(css, pipe, stripes, &acc->osys, &scaler_luma, + &scaler_chroma, acc->stripe.block_stripes)) + return -EINVAL; + + /* acc_param: stripe data */ + + /* + * For the striped case the approach is as follows: + * 1. down-scaled stripes are calculated - with 128 overlap + * (this is the main limiter therefore it's first) + * 2. input stripes are derived by up-scaling the down-scaled stripes + * (there are no alignment requirements on input stripes) + * 3. output stripes are derived from down-scaled stripes too + */ + + acc->stripe.num_of_stripes = stripes; + acc->stripe.input_frame.width = + css_pipe->queue[IPU3_CSS_QUEUE_IN].fmt.mpix.width; + acc->stripe.input_frame.height = + css_pipe->queue[IPU3_CSS_QUEUE_IN].fmt.mpix.height; + acc->stripe.input_frame.bayer_order = + css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->bayer_order; + + for (i = 0; i < stripes; i++) + acc->stripe.bds_out_stripes[i].height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + acc->stripe.bds_out_stripes[0].offset = 0; + if (stripes <= 1) { + acc->stripe.bds_out_stripes[0].width = + ALIGN(css_pipe->rect[IPU3_CSS_RECT_BDS].width, f); + } else { + /* Image processing is divided into two stripes */ + acc->stripe.bds_out_stripes[0].width = + acc->stripe.bds_out_stripes[1].width = + (css_pipe->rect[IPU3_CSS_RECT_BDS].width / 2 & ~(f - 1)) + f; + /* + * Sum of width of the two stripes should not be smaller + * than output width and must be even times of overlapping + * unit f. + */ + if ((css_pipe->rect[IPU3_CSS_RECT_BDS].width / f & 1) != + !!(css_pipe->rect[IPU3_CSS_RECT_BDS].width & (f - 1))) + acc->stripe.bds_out_stripes[0].width += f; + if ((css_pipe->rect[IPU3_CSS_RECT_BDS].width / f & 1) && + (css_pipe->rect[IPU3_CSS_RECT_BDS].width & (f - 1))) { + acc->stripe.bds_out_stripes[0].width += f; + acc->stripe.bds_out_stripes[1].width += f; + } + /* Overlap between stripes is IPU3_UAPI_ISP_VEC_ELEMS * 4 */ + acc->stripe.bds_out_stripes[1].offset = + acc->stripe.bds_out_stripes[0].width - 2 * f; + } + + acc->stripe.effective_stripes[0].height = + css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].height; + acc->stripe.effective_stripes[0].offset = 0; + acc->stripe.bds_out_stripes_no_overlap[0].height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + acc->stripe.bds_out_stripes_no_overlap[0].offset = 0; + acc->stripe.output_stripes[0].height = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.height; + acc->stripe.output_stripes[0].offset = 0; + if (stripes <= 1) { + acc->stripe.down_scaled_stripes[0].width = + css_pipe->rect[IPU3_CSS_RECT_BDS].width; + acc->stripe.down_scaled_stripes[0].height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + acc->stripe.down_scaled_stripes[0].offset = 0; + + acc->stripe.effective_stripes[0].width = + css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].width; + acc->stripe.bds_out_stripes_no_overlap[0].width = + ALIGN(css_pipe->rect[IPU3_CSS_RECT_BDS].width, f); + + acc->stripe.output_stripes[0].width = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.width; + } else { /* Two stripes */ + bds_ds = css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].width * + IMGU_BDS_GRANULARITY / + css_pipe->rect[IPU3_CSS_RECT_BDS].width; + + acc->stripe.down_scaled_stripes[0] = + acc->stripe.bds_out_stripes[0]; + acc->stripe.down_scaled_stripes[1] = + acc->stripe.bds_out_stripes[1]; + if (!IS_ALIGNED(css_pipe->rect[IPU3_CSS_RECT_BDS].width, f)) + acc->stripe.down_scaled_stripes[1].width += + (css_pipe->rect[IPU3_CSS_RECT_BDS].width + & (f - 1)) - f; + + acc->stripe.effective_stripes[0].width = bds_ds * + acc->stripe.down_scaled_stripes[0].width / + IMGU_BDS_GRANULARITY; + acc->stripe.effective_stripes[1].width = bds_ds * + acc->stripe.down_scaled_stripes[1].width / + IMGU_BDS_GRANULARITY; + acc->stripe.effective_stripes[1].height = + css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].height; + acc->stripe.effective_stripes[1].offset = bds_ds * + acc->stripe.down_scaled_stripes[1].offset / + IMGU_BDS_GRANULARITY; + + acc->stripe.bds_out_stripes_no_overlap[0].width = + acc->stripe.bds_out_stripes_no_overlap[1].offset = + ALIGN(css_pipe->rect[IPU3_CSS_RECT_BDS].width, 2 * f) / 2; + acc->stripe.bds_out_stripes_no_overlap[1].width = + DIV_ROUND_UP(css_pipe->rect[IPU3_CSS_RECT_BDS].width, f) + / 2 * f; + acc->stripe.bds_out_stripes_no_overlap[1].height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + + acc->stripe.output_stripes[0].width = + acc->stripe.down_scaled_stripes[0].width - f; + acc->stripe.output_stripes[1].width = + acc->stripe.down_scaled_stripes[1].width - f; + acc->stripe.output_stripes[1].height = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.height; + acc->stripe.output_stripes[1].offset = + acc->stripe.output_stripes[0].width; + } + + acc->stripe.output_system_in_frame_width = + css_pipe->rect[IPU3_CSS_RECT_GDC].width; + acc->stripe.output_system_in_frame_height = + css_pipe->rect[IPU3_CSS_RECT_GDC].height; + + acc->stripe.effective_frame_width = + css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].width; + acc->stripe.bds_frame_width = css_pipe->rect[IPU3_CSS_RECT_BDS].width; + acc->stripe.out_frame_width = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.width; + acc->stripe.out_frame_height = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.height; + acc->stripe.gdc_in_buffer_width = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].bytesperline / + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].bytesperpixel; + acc->stripe.gdc_in_buffer_height = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].height; + acc->stripe.gdc_in_buffer_offset_x = IMGU_GDC_BUF_X; + acc->stripe.gdc_in_buffer_offset_y = IMGU_GDC_BUF_Y; + acc->stripe.display_frame_width = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.width; + acc->stripe.display_frame_height = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.height; + acc->stripe.bds_aligned_frame_width = + roundup(css_pipe->rect[IPU3_CSS_RECT_BDS].width, + 2 * IPU3_UAPI_ISP_VEC_ELEMS); + + if (stripes > 1) + acc->stripe.half_overlap_vectors = + IMGU_STRIPE_FIXED_HALF_OVERLAP; + else + acc->stripe.half_overlap_vectors = 0; + + return 0; +} + +static void imgu_css_cfg_acc_dvs(struct imgu_css *css, + struct imgu_abi_acc_param *acc, + unsigned int pipe) +{ + unsigned int i; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + /* Disable DVS statistics */ + acc->dvs_stat.operations_data.process_lines_data[0].lines = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + acc->dvs_stat.operations_data.process_lines_data[0].cfg_set = 0; + acc->dvs_stat.operations_data.ops[0].op_type = + IMGU_ABI_ACC_OPTYPE_PROCESS_LINES; + acc->dvs_stat.operations_data.ops[0].op_indicator = + IMGU_ABI_ACC_OP_NO_OPS; + for (i = 0; i < IMGU_ABI_DVS_STAT_LEVELS; i++) + acc->dvs_stat.cfg.grd_config[i].enable = 0; +} + +static void acc_bds_per_stripe_data(struct imgu_css *css, + struct imgu_abi_acc_param *acc, + const int i, unsigned int pipe) +{ + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + acc->bds.per_stripe.aligned_data[i].data.crop.hor_crop_en = 0; + acc->bds.per_stripe.aligned_data[i].data.crop.hor_crop_start = 0; + acc->bds.per_stripe.aligned_data[i].data.crop.hor_crop_end = 0; + acc->bds.per_stripe.aligned_data[i].data.hor_ctrl0 = + acc->bds.hor.hor_ctrl0; + acc->bds.per_stripe.aligned_data[i].data.hor_ctrl0.out_frame_width = + acc->stripe.down_scaled_stripes[i].width; + acc->bds.per_stripe.aligned_data[i].data.ver_ctrl1.out_frame_width = + acc->stripe.down_scaled_stripes[i].width; + acc->bds.per_stripe.aligned_data[i].data.ver_ctrl1.out_frame_height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; +} + +/* + * Configure `acc' parameters. `acc_old' contains the old values (or is NULL) + * and `acc_user' contains new prospective values. `use' contains flags + * telling which fields to take from the old values (or generate if it is NULL) + * and which to take from the new user values. + */ +int imgu_css_cfg_acc(struct imgu_css *css, unsigned int pipe, + struct ipu3_uapi_flags *use, + struct imgu_abi_acc_param *acc, + struct imgu_abi_acc_param *acc_old, + struct ipu3_uapi_acc_param *acc_user) +{ + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + const struct imgu_fw_info *bi = + &css->fwp->binary_header[css_pipe->bindex]; + const unsigned int stripes = bi->info.isp.sp.iterator.num_stripes; + const unsigned int tnr_frame_width = + acc->stripe.bds_aligned_frame_width; + const unsigned int min_overlap = 10; + const struct v4l2_pix_format_mplane *pixm = + &css_pipe->queue[IPU3_CSS_QUEUE_IN].fmt.mpix; + const struct imgu_css_bds_config *cfg_bds; + struct imgu_abi_input_feeder_data *feeder_data; + + unsigned int bds_ds, ofs_x, ofs_y, i, width, height; + u8 b_w_log2; /* Block width log2 */ + + /* Update stripe using chroma and luma */ + + if (imgu_css_cfg_acc_stripe(css, pipe, acc)) + return -EINVAL; + + /* acc_param: input_feeder_config */ + + ofs_x = ((pixm->width - + css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].width) >> 1) & ~1; + ofs_x += css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->bayer_order == + IMGU_ABI_BAYER_ORDER_RGGB || + css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->bayer_order == + IMGU_ABI_BAYER_ORDER_GBRG ? 1 : 0; + ofs_y = ((pixm->height - + css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].height) >> 1) & ~1; + ofs_y += css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->bayer_order == + IMGU_ABI_BAYER_ORDER_BGGR || + css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->bayer_order == + IMGU_ABI_BAYER_ORDER_GBRG ? 1 : 0; + acc->input_feeder.data.row_stride = pixm->plane_fmt[0].bytesperline; + acc->input_feeder.data.start_row_address = + ofs_x / IMGU_PIXELS_PER_WORD * IMGU_BYTES_PER_WORD + + ofs_y * acc->input_feeder.data.row_stride; + acc->input_feeder.data.start_pixel = ofs_x % IMGU_PIXELS_PER_WORD; + + acc->input_feeder.data_per_stripe.input_feeder_data[0].data = + acc->input_feeder.data; + + ofs_x += acc->stripe.effective_stripes[1].offset; + + feeder_data = + &acc->input_feeder.data_per_stripe.input_feeder_data[1].data; + feeder_data->row_stride = acc->input_feeder.data.row_stride; + feeder_data->start_row_address = + ofs_x / IMGU_PIXELS_PER_WORD * IMGU_BYTES_PER_WORD + + ofs_y * acc->input_feeder.data.row_stride; + feeder_data->start_pixel = ofs_x % IMGU_PIXELS_PER_WORD; + + /* acc_param: bnr_static_config */ + + /* + * Originate from user or be the original default values if user has + * never set them before, when user gives a new set of parameters, + * for each chunk in the parameter structure there is a flag use->xxx + * whether to use the user-provided parameter or not. If not, the + * parameter remains unchanged in the driver: + * it's value is taken from acc_old. + */ + if (use && use->acc_bnr) { + /* Take values from user */ + acc->bnr = acc_user->bnr; + } else if (acc_old) { + /* Use old value */ + acc->bnr = acc_old->bnr; + } else { + /* Calculate from scratch */ + acc->bnr = imgu_css_bnr_defaults; + } + + acc->bnr.column_size = tnr_frame_width; + + /* acc_param: bnr_static_config_green_disparity */ + + if (use && use->acc_green_disparity) { + /* Take values from user */ + acc->green_disparity = acc_user->green_disparity; + } else if (acc_old) { + /* Use old value */ + acc->green_disparity = acc_old->green_disparity; + } else { + /* Calculate from scratch */ + memset(&acc->green_disparity, 0, sizeof(acc->green_disparity)); + } + + /* acc_param: dm_config */ + + if (use && use->acc_dm) { + /* Take values from user */ + acc->dm = acc_user->dm; + } else if (acc_old) { + /* Use old value */ + acc->dm = acc_old->dm; + } else { + /* Calculate from scratch */ + acc->dm = imgu_css_dm_defaults; + } + + acc->dm.frame_width = tnr_frame_width; + + /* acc_param: ccm_mat_config */ + + if (use && use->acc_ccm) { + /* Take values from user */ + acc->ccm = acc_user->ccm; + } else if (acc_old) { + /* Use old value */ + acc->ccm = acc_old->ccm; + } else { + /* Calculate from scratch */ + acc->ccm = imgu_css_ccm_defaults; + } + + /* acc_param: gamma_config */ + + if (use && use->acc_gamma) { + /* Take values from user */ + acc->gamma = acc_user->gamma; + } else if (acc_old) { + /* Use old value */ + acc->gamma = acc_old->gamma; + } else { + /* Calculate from scratch */ + acc->gamma.gc_ctrl.enable = 1; + acc->gamma.gc_lut = imgu_css_gamma_lut; + } + + /* acc_param: csc_mat_config */ + + if (use && use->acc_csc) { + /* Take values from user */ + acc->csc = acc_user->csc; + } else if (acc_old) { + /* Use old value */ + acc->csc = acc_old->csc; + } else { + /* Calculate from scratch */ + acc->csc = imgu_css_csc_defaults; + } + + /* acc_param: cds_params */ + + if (use && use->acc_cds) { + /* Take values from user */ + acc->cds = acc_user->cds; + } else if (acc_old) { + /* Use old value */ + acc->cds = acc_old->cds; + } else { + /* Calculate from scratch */ + acc->cds = imgu_css_cds_defaults; + } + + /* acc_param: shd_config */ + + if (use && use->acc_shd) { + /* Take values from user */ + acc->shd.shd = acc_user->shd.shd; + acc->shd.shd_lut = acc_user->shd.shd_lut; + } else if (acc_old) { + /* Use old value */ + acc->shd.shd = acc_old->shd.shd; + acc->shd.shd_lut = acc_old->shd.shd_lut; + } else { + /* Calculate from scratch */ + acc->shd.shd = imgu_css_shd_defaults; + memset(&acc->shd.shd_lut, 0, sizeof(acc->shd.shd_lut)); + } + + if (acc->shd.shd.grid.width <= 0) + return -EINVAL; + + acc->shd.shd.grid.grid_height_per_slice = + IMGU_ABI_SHD_MAX_CELLS_PER_SET / acc->shd.shd.grid.width; + + if (acc->shd.shd.grid.grid_height_per_slice <= 0) + return -EINVAL; + + acc->shd.shd.general.init_set_vrt_offst_ul = + (-acc->shd.shd.grid.y_start >> + acc->shd.shd.grid.block_height_log2) % + acc->shd.shd.grid.grid_height_per_slice; + + if (imgu_css_shd_ops_calc(&acc->shd.shd_ops, &acc->shd.shd.grid, + css_pipe->rect[IPU3_CSS_RECT_BDS].height)) + return -EINVAL; + + /* acc_param: dvs_stat_config */ + imgu_css_cfg_acc_dvs(css, acc, pipe); + + /* acc_param: yuvp1_iefd_config */ + + if (use && use->acc_iefd) { + /* Take values from user */ + acc->iefd = acc_user->iefd; + } else if (acc_old) { + /* Use old value */ + acc->iefd = acc_old->iefd; + } else { + /* Calculate from scratch */ + acc->iefd = imgu_css_iefd_defaults; + } + + /* acc_param: yuvp1_yds_config yds_c0 */ + + if (use && use->acc_yds_c0) { + /* Take values from user */ + acc->yds_c0 = acc_user->yds_c0; + } else if (acc_old) { + /* Use old value */ + acc->yds_c0 = acc_old->yds_c0; + } else { + /* Calculate from scratch */ + acc->yds_c0 = imgu_css_yds_defaults; + } + + /* acc_param: yuvp1_chnr_config chnr_c0 */ + + if (use && use->acc_chnr_c0) { + /* Take values from user */ + acc->chnr_c0 = acc_user->chnr_c0; + } else if (acc_old) { + /* Use old value */ + acc->chnr_c0 = acc_old->chnr_c0; + } else { + /* Calculate from scratch */ + acc->chnr_c0 = imgu_css_chnr_defaults; + } + + /* acc_param: yuvp1_y_ee_nr_config */ + + if (use && use->acc_y_ee_nr) { + /* Take values from user */ + acc->y_ee_nr = acc_user->y_ee_nr; + } else if (acc_old) { + /* Use old value */ + acc->y_ee_nr = acc_old->y_ee_nr; + } else { + /* Calculate from scratch */ + acc->y_ee_nr = imgu_css_y_ee_nr_defaults; + } + + /* acc_param: yuvp1_yds_config yds */ + + if (use && use->acc_yds) { + /* Take values from user */ + acc->yds = acc_user->yds; + } else if (acc_old) { + /* Use old value */ + acc->yds = acc_old->yds; + } else { + /* Calculate from scratch */ + acc->yds = imgu_css_yds_defaults; + } + + /* acc_param: yuvp1_chnr_config chnr */ + + if (use && use->acc_chnr) { + /* Take values from user */ + acc->chnr = acc_user->chnr; + } else if (acc_old) { + /* Use old value */ + acc->chnr = acc_old->chnr; + } else { + /* Calculate from scratch */ + acc->chnr = imgu_css_chnr_defaults; + } + + /* acc_param: yuvp2_y_tm_lut_static_config */ + + for (i = 0; i < IMGU_ABI_YUVP2_YTM_LUT_ENTRIES; i++) + acc->ytm.entries[i] = i * 32; + acc->ytm.enable = 0; /* Always disabled on IPU3 */ + + /* acc_param: yuvp1_yds_config yds2 */ + + if (use && use->acc_yds2) { + /* Take values from user */ + acc->yds2 = acc_user->yds2; + } else if (acc_old) { + /* Use old value */ + acc->yds2 = acc_old->yds2; + } else { + /* Calculate from scratch */ + acc->yds2 = imgu_css_yds_defaults; + } + + /* acc_param: yuvp2_tcc_static_config */ + + if (use && use->acc_tcc) { + /* Take values from user */ + acc->tcc = acc_user->tcc; + } else if (acc_old) { + /* Use old value */ + acc->tcc = acc_old->tcc; + } else { + /* Calculate from scratch */ + memset(&acc->tcc, 0, sizeof(acc->tcc)); + + acc->tcc.gen_control.en = 1; + acc->tcc.gen_control.blend_shift = 3; + acc->tcc.gen_control.gain_according_to_y_only = 1; + acc->tcc.gen_control.gamma = 8; + acc->tcc.gen_control.delta = 0; + + for (i = 0; i < IPU3_UAPI_YUVP2_TCC_MACC_TABLE_ELEMENTS; i++) { + acc->tcc.macc_table.entries[i].a = 1024; + acc->tcc.macc_table.entries[i].b = 0; + acc->tcc.macc_table.entries[i].c = 0; + acc->tcc.macc_table.entries[i].d = 1024; + } + + acc->tcc.inv_y_lut.entries[6] = 1023; + for (i = 7; i < IPU3_UAPI_YUVP2_TCC_INV_Y_LUT_ELEMENTS; i++) + acc->tcc.inv_y_lut.entries[i] = 1024 >> (i - 6); + + acc->tcc.gain_pcwl = imgu_css_tcc_gain_pcwl_lut; + acc->tcc.r_sqr_lut = imgu_css_tcc_r_sqr_lut; + } + + /* acc_param: dpc_config */ + + if (use && use->acc_dpc) + return -EINVAL; /* Not supported yet */ + + /* Just disable by default */ + memset(&acc->dpc, 0, sizeof(acc->dpc)); + + /* acc_param: bds_config */ + + bds_ds = (css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].height * + IMGU_BDS_GRANULARITY) / css_pipe->rect[IPU3_CSS_RECT_BDS].height; + if (bds_ds < IMGU_BDS_MIN_SF_INV || + bds_ds - IMGU_BDS_MIN_SF_INV >= ARRAY_SIZE(imgu_css_bds_configs)) + return -EINVAL; + + cfg_bds = &imgu_css_bds_configs[bds_ds - IMGU_BDS_MIN_SF_INV]; + acc->bds.hor.hor_ctrl1.hor_crop_en = 0; + acc->bds.hor.hor_ctrl1.hor_crop_start = 0; + acc->bds.hor.hor_ctrl1.hor_crop_end = 0; + acc->bds.hor.hor_ctrl0.sample_patrn_length = + cfg_bds->sample_patrn_length; + acc->bds.hor.hor_ctrl0.hor_ds_en = cfg_bds->hor_ds_en; + acc->bds.hor.hor_ctrl0.min_clip_val = IMGU_BDS_MIN_CLIP_VAL; + acc->bds.hor.hor_ctrl0.max_clip_val = IMGU_BDS_MAX_CLIP_VAL; + acc->bds.hor.hor_ctrl0.out_frame_width = + css_pipe->rect[IPU3_CSS_RECT_BDS].width; + acc->bds.hor.hor_ptrn_arr = cfg_bds->ptrn_arr; + acc->bds.hor.hor_phase_arr = cfg_bds->hor_phase_arr; + acc->bds.hor.hor_ctrl2.input_frame_height = + css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].height; + acc->bds.ver.ver_ctrl0.min_clip_val = IMGU_BDS_MIN_CLIP_VAL; + acc->bds.ver.ver_ctrl0.max_clip_val = IMGU_BDS_MAX_CLIP_VAL; + acc->bds.ver.ver_ctrl0.sample_patrn_length = + cfg_bds->sample_patrn_length; + acc->bds.ver.ver_ctrl0.ver_ds_en = cfg_bds->ver_ds_en; + acc->bds.ver.ver_ptrn_arr = cfg_bds->ptrn_arr; + acc->bds.ver.ver_phase_arr = cfg_bds->ver_phase_arr; + acc->bds.ver.ver_ctrl1.out_frame_width = + css_pipe->rect[IPU3_CSS_RECT_BDS].width; + acc->bds.ver.ver_ctrl1.out_frame_height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + for (i = 0; i < stripes; i++) + acc_bds_per_stripe_data(css, acc, i, pipe); + + acc->bds.enabled = cfg_bds->hor_ds_en || cfg_bds->ver_ds_en; + + /* acc_param: anr_config */ + + if (use && use->acc_anr) { + /* Take values from user */ + acc->anr.transform = acc_user->anr.transform; + acc->anr.stitch.anr_stitch_en = + acc_user->anr.stitch.anr_stitch_en; + memcpy(acc->anr.stitch.pyramid, acc_user->anr.stitch.pyramid, + sizeof(acc->anr.stitch.pyramid)); + } else if (acc_old) { + /* Use old value */ + acc->anr.transform = acc_old->anr.transform; + acc->anr.stitch.anr_stitch_en = + acc_old->anr.stitch.anr_stitch_en; + memcpy(acc->anr.stitch.pyramid, acc_old->anr.stitch.pyramid, + sizeof(acc->anr.stitch.pyramid)); + } else { + /* Calculate from scratch */ + acc->anr = imgu_css_anr_defaults; + } + + /* Always enabled */ + acc->anr.search.enable = 1; + acc->anr.transform.enable = 1; + acc->anr.tile2strm.enable = 1; + acc->anr.tile2strm.frame_width = + ALIGN(css_pipe->rect[IPU3_CSS_RECT_BDS].width, IMGU_ISP_VMEM_ALIGN); + acc->anr.search.frame_width = acc->anr.tile2strm.frame_width; + acc->anr.stitch.frame_width = acc->anr.tile2strm.frame_width; + acc->anr.tile2strm.frame_height = css_pipe->rect[IPU3_CSS_RECT_BDS].height; + acc->anr.search.frame_height = acc->anr.tile2strm.frame_height; + acc->anr.stitch.frame_height = acc->anr.tile2strm.frame_height; + + width = ALIGN(css_pipe->rect[IPU3_CSS_RECT_BDS].width, IMGU_ISP_VMEM_ALIGN); + height = css_pipe->rect[IPU3_CSS_RECT_BDS].height; + + if (acc->anr.transform.xreset + width > IPU3_UAPI_ANR_MAX_RESET) + acc->anr.transform.xreset = IPU3_UAPI_ANR_MAX_RESET - width; + if (acc->anr.transform.xreset < IPU3_UAPI_ANR_MIN_RESET) + acc->anr.transform.xreset = IPU3_UAPI_ANR_MIN_RESET; + + if (acc->anr.transform.yreset + height > IPU3_UAPI_ANR_MAX_RESET) + acc->anr.transform.yreset = IPU3_UAPI_ANR_MAX_RESET - height; + if (acc->anr.transform.yreset < IPU3_UAPI_ANR_MIN_RESET) + acc->anr.transform.yreset = IPU3_UAPI_ANR_MIN_RESET; + + /* acc_param: awb_fr_config */ + + if (use && use->acc_awb_fr) { + /* Take values from user */ + acc->awb_fr.config = acc_user->awb_fr; + } else if (acc_old) { + /* Use old value */ + acc->awb_fr.config = acc_old->awb_fr.config; + } else { + /* Set from scratch */ + acc->awb_fr.config = imgu_css_awb_fr_defaults; + } + + imgu_css_grid_end_calc(&acc->awb_fr.config.grid_cfg); + + if (acc->awb_fr.config.grid_cfg.width <= 0) + return -EINVAL; + + acc->awb_fr.config.grid_cfg.height_per_slice = + IMGU_ABI_AWB_FR_MAX_CELLS_PER_SET / + acc->awb_fr.config.grid_cfg.width; + + for (i = 0; i < stripes; i++) + acc->awb_fr.stripes[i] = acc->awb_fr.config; + + if (acc->awb_fr.config.grid_cfg.x_start >= + acc->stripe.down_scaled_stripes[1].offset + min_overlap) { + /* Enable only for rightmost stripe, disable left */ + acc->awb_fr.stripes[0].grid_cfg.y_start &= + ~IPU3_UAPI_GRID_Y_START_EN; + } else if (acc->awb_fr.config.grid_cfg.x_end <= + acc->stripe.bds_out_stripes[0].width - min_overlap) { + /* Enable only for leftmost stripe, disable right */ + acc->awb_fr.stripes[1].grid_cfg.y_start &= + ~IPU3_UAPI_GRID_Y_START_EN; + } else { + /* Enable for both stripes */ + u16 end; /* width for grid end */ + + acc->awb_fr.stripes[0].grid_cfg.width = + (acc->stripe.bds_out_stripes[0].width - min_overlap - + acc->awb_fr.config.grid_cfg.x_start + 1) >> + acc->awb_fr.config.grid_cfg.block_width_log2; + acc->awb_fr.stripes[1].grid_cfg.width = + acc->awb_fr.config.grid_cfg.width - + acc->awb_fr.stripes[0].grid_cfg.width; + + b_w_log2 = acc->awb_fr.stripes[0].grid_cfg.block_width_log2; + end = imgu_css_grid_end(acc->awb_fr.stripes[0].grid_cfg.x_start, + acc->awb_fr.stripes[0].grid_cfg.width, + b_w_log2); + acc->awb_fr.stripes[0].grid_cfg.x_end = end; + + acc->awb_fr.stripes[1].grid_cfg.x_start = + (acc->awb_fr.stripes[0].grid_cfg.x_end + 1 - + acc->stripe.down_scaled_stripes[1].offset) & + IPU3_UAPI_GRID_START_MASK; + b_w_log2 = acc->awb_fr.stripes[1].grid_cfg.block_width_log2; + end = imgu_css_grid_end(acc->awb_fr.stripes[1].grid_cfg.x_start, + acc->awb_fr.stripes[1].grid_cfg.width, + b_w_log2); + acc->awb_fr.stripes[1].grid_cfg.x_end = end; + + /* + * To reduce complexity of debubbling and loading + * statistics fix grid_height_per_slice to 1 for both + * stripes. + */ + for (i = 0; i < stripes; i++) + acc->awb_fr.stripes[i].grid_cfg.height_per_slice = 1; + } + + if (imgu_css_awb_fr_ops_calc(css, pipe, &acc->awb_fr)) + return -EINVAL; + + /* acc_param: ae_config */ + + if (use && use->acc_ae) { + /* Take values from user */ + acc->ae.grid_cfg = acc_user->ae.grid_cfg; + acc->ae.ae_ccm = acc_user->ae.ae_ccm; + for (i = 0; i < IPU3_UAPI_AE_WEIGHTS; i++) + acc->ae.weights[i] = acc_user->ae.weights[i]; + } else if (acc_old) { + /* Use old value */ + acc->ae.grid_cfg = acc_old->ae.grid_cfg; + acc->ae.ae_ccm = acc_old->ae.ae_ccm; + for (i = 0; i < IPU3_UAPI_AE_WEIGHTS; i++) + acc->ae.weights[i] = acc_old->ae.weights[i]; + } else { + /* Set from scratch */ + static const struct ipu3_uapi_ae_weight_elem + weight_def = { 1, 1, 1, 1, 1, 1, 1, 1 }; + + acc->ae.grid_cfg = imgu_css_ae_grid_defaults; + acc->ae.ae_ccm = imgu_css_ae_ccm_defaults; + for (i = 0; i < IPU3_UAPI_AE_WEIGHTS; i++) + acc->ae.weights[i] = weight_def; + } + + b_w_log2 = acc->ae.grid_cfg.block_width_log2; + acc->ae.grid_cfg.x_end = imgu_css_grid_end(acc->ae.grid_cfg.x_start, + acc->ae.grid_cfg.width, + b_w_log2); + b_w_log2 = acc->ae.grid_cfg.block_height_log2; + acc->ae.grid_cfg.y_end = imgu_css_grid_end(acc->ae.grid_cfg.y_start, + acc->ae.grid_cfg.height, + b_w_log2); + + for (i = 0; i < stripes; i++) + acc->ae.stripes[i].grid = acc->ae.grid_cfg; + + if (acc->ae.grid_cfg.x_start >= + acc->stripe.down_scaled_stripes[1].offset) { + /* Enable only for rightmost stripe, disable left */ + acc->ae.stripes[0].grid.ae_en = 0; + } else if (acc->ae.grid_cfg.x_end <= + acc->stripe.bds_out_stripes[0].width) { + /* Enable only for leftmost stripe, disable right */ + acc->ae.stripes[1].grid.ae_en = 0; + } else { + /* Enable for both stripes */ + u8 b_w_log2; + + acc->ae.stripes[0].grid.width = + (acc->stripe.bds_out_stripes[0].width - + acc->ae.grid_cfg.x_start + 1) >> + acc->ae.grid_cfg.block_width_log2; + + acc->ae.stripes[1].grid.width = + acc->ae.grid_cfg.width - acc->ae.stripes[0].grid.width; + + b_w_log2 = acc->ae.stripes[0].grid.block_width_log2; + acc->ae.stripes[0].grid.x_end = + imgu_css_grid_end(acc->ae.stripes[0].grid.x_start, + acc->ae.stripes[0].grid.width, + b_w_log2); + + acc->ae.stripes[1].grid.x_start = + (acc->ae.stripes[0].grid.x_end + 1 - + acc->stripe.down_scaled_stripes[1].offset) & + IPU3_UAPI_GRID_START_MASK; + b_w_log2 = acc->ae.stripes[1].grid.block_width_log2; + acc->ae.stripes[1].grid.x_end = + imgu_css_grid_end(acc->ae.stripes[1].grid.x_start, + acc->ae.stripes[1].grid.width, + b_w_log2); + } + + /* acc_param: af_config */ + + if (use && use->acc_af) { + /* Take values from user */ + acc->af.config.filter_config = acc_user->af.filter_config; + acc->af.config.grid_cfg = acc_user->af.grid_cfg; + } else if (acc_old) { + /* Use old value */ + acc->af.config = acc_old->af.config; + } else { + /* Set from scratch */ + acc->af.config.filter_config = + imgu_css_af_defaults.filter_config; + acc->af.config.grid_cfg = imgu_css_af_defaults.grid_cfg; + } + + imgu_css_grid_end_calc(&acc->af.config.grid_cfg); + + if (acc->af.config.grid_cfg.width <= 0) + return -EINVAL; + + acc->af.config.grid_cfg.height_per_slice = + IMGU_ABI_AF_MAX_CELLS_PER_SET / acc->af.config.grid_cfg.width; + acc->af.config.frame_size.width = + ALIGN(css_pipe->rect[IPU3_CSS_RECT_BDS].width, IMGU_ISP_VMEM_ALIGN); + acc->af.config.frame_size.height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + + if (acc->stripe.bds_out_stripes[0].width <= min_overlap) + return -EINVAL; + + for (i = 0; i < stripes; i++) { + acc->af.stripes[i].grid_cfg = acc->af.config.grid_cfg; + acc->af.stripes[i].frame_size.height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + acc->af.stripes[i].frame_size.width = + acc->stripe.bds_out_stripes[i].width; + } + + if (acc->af.config.grid_cfg.x_start >= + acc->stripe.down_scaled_stripes[1].offset + min_overlap) { + /* Enable only for rightmost stripe, disable left */ + acc->af.stripes[0].grid_cfg.y_start &= + ~IPU3_UAPI_GRID_Y_START_EN; + } else if (acc->af.config.grid_cfg.x_end <= + acc->stripe.bds_out_stripes[0].width - min_overlap) { + /* Enable only for leftmost stripe, disable right */ + acc->af.stripes[1].grid_cfg.y_start &= + ~IPU3_UAPI_GRID_Y_START_EN; + } else { + /* Enable for both stripes */ + + acc->af.stripes[0].grid_cfg.width = + (acc->stripe.bds_out_stripes[0].width - min_overlap - + acc->af.config.grid_cfg.x_start + 1) >> + acc->af.config.grid_cfg.block_width_log2; + acc->af.stripes[1].grid_cfg.width = + acc->af.config.grid_cfg.width - + acc->af.stripes[0].grid_cfg.width; + + b_w_log2 = acc->af.stripes[0].grid_cfg.block_width_log2; + acc->af.stripes[0].grid_cfg.x_end = + imgu_css_grid_end(acc->af.stripes[0].grid_cfg.x_start, + acc->af.stripes[0].grid_cfg.width, + b_w_log2); + + acc->af.stripes[1].grid_cfg.x_start = + (acc->af.stripes[0].grid_cfg.x_end + 1 - + acc->stripe.down_scaled_stripes[1].offset) & + IPU3_UAPI_GRID_START_MASK; + + b_w_log2 = acc->af.stripes[1].grid_cfg.block_width_log2; + acc->af.stripes[1].grid_cfg.x_end = + imgu_css_grid_end(acc->af.stripes[1].grid_cfg.x_start, + acc->af.stripes[1].grid_cfg.width, + b_w_log2); + + /* + * To reduce complexity of debubbling and loading statistics + * fix grid_height_per_slice to 1 for both stripes + */ + for (i = 0; i < stripes; i++) + acc->af.stripes[i].grid_cfg.height_per_slice = 1; + } + + if (imgu_css_af_ops_calc(css, pipe, &acc->af)) + return -EINVAL; + + /* acc_param: awb_config */ + + if (use && use->acc_awb) { + /* Take values from user */ + acc->awb.config = acc_user->awb.config; + } else if (acc_old) { + /* Use old value */ + acc->awb.config = acc_old->awb.config; + } else { + /* Set from scratch */ + acc->awb.config = imgu_css_awb_defaults; + } + + if (acc->awb.config.grid.width <= 0) + return -EINVAL; + + acc->awb.config.grid.height_per_slice = + IMGU_ABI_AWB_MAX_CELLS_PER_SET / acc->awb.config.grid.width, + imgu_css_grid_end_calc(&acc->awb.config.grid); + + for (i = 0; i < stripes; i++) + acc->awb.stripes[i] = acc->awb.config; + + if (acc->awb.config.grid.x_start >= + acc->stripe.down_scaled_stripes[1].offset + min_overlap) { + /* Enable only for rightmost stripe, disable left */ + acc->awb.stripes[0].rgbs_thr_b &= ~IPU3_UAPI_AWB_RGBS_THR_B_EN; + } else if (acc->awb.config.grid.x_end <= + acc->stripe.bds_out_stripes[0].width - min_overlap) { + /* Enable only for leftmost stripe, disable right */ + acc->awb.stripes[1].rgbs_thr_b &= ~IPU3_UAPI_AWB_RGBS_THR_B_EN; + } else { + /* Enable for both stripes */ + + acc->awb.stripes[0].grid.width = + (acc->stripe.bds_out_stripes[0].width - + acc->awb.config.grid.x_start + 1) >> + acc->awb.config.grid.block_width_log2; + acc->awb.stripes[1].grid.width = acc->awb.config.grid.width - + acc->awb.stripes[0].grid.width; + + b_w_log2 = acc->awb.stripes[0].grid.block_width_log2; + acc->awb.stripes[0].grid.x_end = + imgu_css_grid_end(acc->awb.stripes[0].grid.x_start, + acc->awb.stripes[0].grid.width, + b_w_log2); + + acc->awb.stripes[1].grid.x_start = + (acc->awb.stripes[0].grid.x_end + 1 - + acc->stripe.down_scaled_stripes[1].offset) & + IPU3_UAPI_GRID_START_MASK; + + b_w_log2 = acc->awb.stripes[1].grid.block_width_log2; + acc->awb.stripes[1].grid.x_end = + imgu_css_grid_end(acc->awb.stripes[1].grid.x_start, + acc->awb.stripes[1].grid.width, + b_w_log2); + + /* + * To reduce complexity of debubbling and loading statistics + * fix grid_height_per_slice to 1 for both stripes + */ + for (i = 0; i < stripes; i++) + acc->awb.stripes[i].grid.height_per_slice = 1; + } + + if (imgu_css_awb_ops_calc(css, pipe, &acc->awb)) + return -EINVAL; + + return 0; +} + +/* + * Fill the indicated structure in `new_binary_params' from the possible + * sources based on `use_user' flag: if the flag is false, copy from + * `old_binary_params', or if the flag is true, copy from `user_setting' + * and return NULL (or error pointer on error). + * If the flag is false and `old_binary_params' is NULL, return pointer + * to the structure inside `new_binary_params'. In that case the caller + * should calculate and fill the structure from scratch. + */ +static void *imgu_css_cfg_copy(struct imgu_css *css, + unsigned int pipe, bool use_user, + void *user_setting, void *old_binary_params, + void *new_binary_params, + enum imgu_abi_memories m, + struct imgu_fw_isp_parameter *par, + size_t par_size) +{ + const enum imgu_abi_param_class c = IMGU_ABI_PARAM_CLASS_PARAM; + void *new_setting, *old_setting; + + new_setting = imgu_css_fw_pipeline_params(css, pipe, c, m, par, + par_size, new_binary_params); + if (!new_setting) + return ERR_PTR(-EPROTO); /* Corrupted firmware */ + + if (use_user) { + /* Take new user parameters */ + memcpy(new_setting, user_setting, par_size); + } else if (old_binary_params) { + /* Take previous value */ + old_setting = imgu_css_fw_pipeline_params(css, pipe, c, m, par, + par_size, + old_binary_params); + if (!old_setting) + return ERR_PTR(-EPROTO); + memcpy(new_setting, old_setting, par_size); + } else { + return new_setting; /* Need to calculate */ + } + + return NULL; /* Copied from other value */ +} + +/* + * Configure VMEM0 parameters (late binding parameters). + */ +int imgu_css_cfg_vmem0(struct imgu_css *css, unsigned int pipe, + struct ipu3_uapi_flags *use, + void *vmem0, void *vmem0_old, + struct ipu3_uapi_params *user) +{ + const struct imgu_fw_info *bi = + &css->fwp->binary_header[css->pipes[pipe].bindex]; + struct imgu_fw_param_memory_offsets *pofs = (void *)css->fwp + + bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_PARAM]; + struct ipu3_uapi_isp_lin_vmem_params *lin_vmem = NULL; + struct ipu3_uapi_isp_tnr3_vmem_params *tnr_vmem = NULL; + struct ipu3_uapi_isp_xnr3_vmem_params *xnr_vmem = NULL; + const enum imgu_abi_param_class c = IMGU_ABI_PARAM_CLASS_PARAM; + const enum imgu_abi_memories m = IMGU_ABI_MEM_ISP_VMEM0; + unsigned int i; + + /* Configure VMEM0 */ + + memset(vmem0, 0, bi->info.isp.sp.mem_initializers.params[c][m].size); + + /* Configure Linearization VMEM0 parameters */ + + lin_vmem = imgu_css_cfg_copy(css, pipe, use && use->lin_vmem_params, + &user->lin_vmem_params, vmem0_old, vmem0, + m, &pofs->vmem.lin, sizeof(*lin_vmem)); + if (!IS_ERR_OR_NULL(lin_vmem)) { + /* Generate parameter from scratch */ + for (i = 0; i < IPU3_UAPI_LIN_LUT_SIZE; i++) { + lin_vmem->lin_lutlow_gr[i] = 32 * i; + lin_vmem->lin_lutlow_r[i] = 32 * i; + lin_vmem->lin_lutlow_b[i] = 32 * i; + lin_vmem->lin_lutlow_gb[i] = 32 * i; + + lin_vmem->lin_lutdif_gr[i] = 32; + lin_vmem->lin_lutdif_r[i] = 32; + lin_vmem->lin_lutdif_b[i] = 32; + lin_vmem->lin_lutdif_gb[i] = 32; + } + } + + /* Configure TNR3 VMEM parameters */ + if (css->pipes[pipe].pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { + tnr_vmem = imgu_css_cfg_copy(css, pipe, + use && use->tnr3_vmem_params, + &user->tnr3_vmem_params, + vmem0_old, vmem0, m, + &pofs->vmem.tnr3, + sizeof(*tnr_vmem)); + if (!IS_ERR_OR_NULL(tnr_vmem)) { + /* Generate parameter from scratch */ + for (i = 0; i < IPU3_UAPI_ISP_TNR3_VMEM_LEN; i++) + tnr_vmem->sigma[i] = 256; + } + } + i = IPU3_UAPI_ISP_TNR3_VMEM_LEN; + + /* Configure XNR3 VMEM parameters */ + + xnr_vmem = imgu_css_cfg_copy(css, pipe, use && use->xnr3_vmem_params, + &user->xnr3_vmem_params, vmem0_old, vmem0, + m, &pofs->vmem.xnr3, sizeof(*xnr_vmem)); + if (!IS_ERR_OR_NULL(xnr_vmem)) { + xnr_vmem->x[i] = imgu_css_xnr3_vmem_defaults.x + [i % IMGU_XNR3_VMEM_LUT_LEN]; + xnr_vmem->a[i] = imgu_css_xnr3_vmem_defaults.a + [i % IMGU_XNR3_VMEM_LUT_LEN]; + xnr_vmem->b[i] = imgu_css_xnr3_vmem_defaults.b + [i % IMGU_XNR3_VMEM_LUT_LEN]; + xnr_vmem->c[i] = imgu_css_xnr3_vmem_defaults.c + [i % IMGU_XNR3_VMEM_LUT_LEN]; + } + + return IS_ERR(lin_vmem) || IS_ERR(tnr_vmem) || IS_ERR(xnr_vmem) ? + -EPROTO : 0; +} + +/* + * Configure DMEM0 parameters (late binding parameters). + */ +int imgu_css_cfg_dmem0(struct imgu_css *css, unsigned int pipe, + struct ipu3_uapi_flags *use, + void *dmem0, void *dmem0_old, + struct ipu3_uapi_params *user) +{ + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + const struct imgu_fw_info *bi = + &css->fwp->binary_header[css_pipe->bindex]; + struct imgu_fw_param_memory_offsets *pofs = (void *)css->fwp + + bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_PARAM]; + + struct ipu3_uapi_isp_tnr3_params *tnr_dmem = NULL; + struct ipu3_uapi_isp_xnr3_params *xnr_dmem; + + const enum imgu_abi_param_class c = IMGU_ABI_PARAM_CLASS_PARAM; + const enum imgu_abi_memories m = IMGU_ABI_MEM_ISP_DMEM0; + + /* Configure DMEM0 */ + + memset(dmem0, 0, bi->info.isp.sp.mem_initializers.params[c][m].size); + + /* Configure TNR3 DMEM0 parameters */ + if (css_pipe->pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { + tnr_dmem = imgu_css_cfg_copy(css, pipe, + use && use->tnr3_dmem_params, + &user->tnr3_dmem_params, + dmem0_old, dmem0, m, + &pofs->dmem.tnr3, + sizeof(*tnr_dmem)); + if (!IS_ERR_OR_NULL(tnr_dmem)) { + /* Generate parameter from scratch */ + tnr_dmem->knee_y1 = 768; + tnr_dmem->knee_y2 = 1280; + } + } + + /* Configure XNR3 DMEM0 parameters */ + + xnr_dmem = imgu_css_cfg_copy(css, pipe, use && use->xnr3_dmem_params, + &user->xnr3_dmem_params, dmem0_old, dmem0, + m, &pofs->dmem.xnr3, sizeof(*xnr_dmem)); + if (!IS_ERR_OR_NULL(xnr_dmem)) { + /* Generate parameter from scratch */ + xnr_dmem->alpha.y0 = 2047; + xnr_dmem->alpha.u0 = 2047; + xnr_dmem->alpha.v0 = 2047; + } + + return IS_ERR(tnr_dmem) || IS_ERR(xnr_dmem) ? -EPROTO : 0; +} + +/* Generate unity morphing table without morphing effect */ +void imgu_css_cfg_gdc_table(struct imgu_abi_gdc_warp_param *gdc, + int frame_in_x, int frame_in_y, + int frame_out_x, int frame_out_y, + int env_w, int env_h) +{ + static const unsigned int FRAC_BITS = IMGU_ABI_GDC_FRAC_BITS; + static const unsigned int XMEM_ALIGN = 1 << 4; + const unsigned int XMEM_ALIGN_MASK = ~(XMEM_ALIGN - 1); + static const unsigned int BCI_ENV = 4; + static const unsigned int BYP = 2; /* Bytes per pixel */ + const unsigned int OFFSET_X = 2 * IMGU_DVS_BLOCK_W + env_w + 1; + const unsigned int OFFSET_Y = IMGU_DVS_BLOCK_H + env_h + 1; + + struct imgu_abi_gdc_warp_param gdc_luma, gdc_chroma; + + unsigned int blocks_x = ALIGN(DIV_ROUND_UP(frame_out_x, + IMGU_DVS_BLOCK_W), 2); + unsigned int blocks_y = DIV_ROUND_UP(frame_out_y, IMGU_DVS_BLOCK_H); + unsigned int y0, x0, x1, x, y; + + /* Global luma settings */ + gdc_luma.origin_x = 0; + gdc_luma.origin_y = 0; + gdc_luma.p0_x = (OFFSET_X - (OFFSET_X & XMEM_ALIGN_MASK)) << FRAC_BITS; + gdc_luma.p0_y = 0; + gdc_luma.p1_x = gdc_luma.p0_x + (IMGU_DVS_BLOCK_W << FRAC_BITS); + gdc_luma.p1_y = gdc_luma.p0_y; + gdc_luma.p2_x = gdc_luma.p0_x; + gdc_luma.p2_y = gdc_luma.p0_y + (IMGU_DVS_BLOCK_H << FRAC_BITS); + gdc_luma.p3_x = gdc_luma.p1_x; + gdc_luma.p3_y = gdc_luma.p2_y; + + gdc_luma.in_block_width = IMGU_DVS_BLOCK_W + BCI_ENV + + OFFSET_X - (OFFSET_X & XMEM_ALIGN_MASK); + gdc_luma.in_block_width_a = DIV_ROUND_UP(gdc_luma.in_block_width, + IPU3_UAPI_ISP_VEC_ELEMS); + gdc_luma.in_block_width_b = DIV_ROUND_UP(gdc_luma.in_block_width, + IMGU_ABI_ISP_DDR_WORD_BYTES / + BYP); + gdc_luma.in_block_height = IMGU_DVS_BLOCK_H + BCI_ENV; + gdc_luma.padding = 0; + + /* Global chroma settings */ + gdc_chroma.origin_x = 0; + gdc_chroma.origin_y = 0; + gdc_chroma.p0_x = (OFFSET_X / 2 - (OFFSET_X / 2 & XMEM_ALIGN_MASK)) << + FRAC_BITS; + gdc_chroma.p0_y = 0; + gdc_chroma.p1_x = gdc_chroma.p0_x + (IMGU_DVS_BLOCK_W << FRAC_BITS); + gdc_chroma.p1_y = gdc_chroma.p0_y; + gdc_chroma.p2_x = gdc_chroma.p0_x; + gdc_chroma.p2_y = gdc_chroma.p0_y + (IMGU_DVS_BLOCK_H / 2 << FRAC_BITS); + gdc_chroma.p3_x = gdc_chroma.p1_x; + gdc_chroma.p3_y = gdc_chroma.p2_y; + + gdc_chroma.in_block_width = IMGU_DVS_BLOCK_W + BCI_ENV; + gdc_chroma.in_block_width_a = DIV_ROUND_UP(gdc_chroma.in_block_width, + IPU3_UAPI_ISP_VEC_ELEMS); + gdc_chroma.in_block_width_b = DIV_ROUND_UP(gdc_chroma.in_block_width, + IMGU_ABI_ISP_DDR_WORD_BYTES / + BYP); + gdc_chroma.in_block_height = IMGU_DVS_BLOCK_H / 2 + BCI_ENV; + gdc_chroma.padding = 0; + + /* Calculate block offsets for luma and chroma */ + for (y0 = 0; y0 < blocks_y; y0++) { + for (x0 = 0; x0 < blocks_x / 2; x0++) { + for (x1 = 0; x1 < 2; x1++) { + /* Luma blocks */ + x = (x0 * 2 + x1) * IMGU_DVS_BLOCK_W + OFFSET_X; + x &= XMEM_ALIGN_MASK; + y = y0 * IMGU_DVS_BLOCK_H + OFFSET_Y; + *gdc = gdc_luma; + gdc->in_addr_offset = + (y * frame_in_x + x) * BYP; + gdc++; + } + + /* Chroma block */ + x = x0 * IMGU_DVS_BLOCK_W + OFFSET_X / 2; + x &= XMEM_ALIGN_MASK; + y = y0 * (IMGU_DVS_BLOCK_H / 2) + OFFSET_Y / 2; + *gdc = gdc_chroma; + gdc->in_addr_offset = (y * frame_in_x + x) * BYP; + gdc++; + } + } +} diff --git a/drivers/staging/media/ipu3/ipu3-css-params.h b/drivers/staging/media/ipu3/ipu3-css-params.h new file mode 100644 index 000000000000..ffaec6b7d5cc --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-css-params.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018 Intel Corporation */ + +#ifndef __IPU3_PARAMS_H +#define __IPU3_PARAMS_H + +int imgu_css_cfg_acc(struct imgu_css *css, unsigned int pipe, + struct ipu3_uapi_flags *use, + struct imgu_abi_acc_param *acc, + struct imgu_abi_acc_param *acc_old, + struct ipu3_uapi_acc_param *acc_user); + +int imgu_css_cfg_vmem0(struct imgu_css *css, unsigned int pipe, + struct ipu3_uapi_flags *use, + void *vmem0, void *vmem0_old, + struct ipu3_uapi_params *user); + +int imgu_css_cfg_dmem0(struct imgu_css *css, unsigned int pipe, + struct ipu3_uapi_flags *use, + void *dmem0, void *dmem0_old, + struct ipu3_uapi_params *user); + +void imgu_css_cfg_gdc_table(struct imgu_abi_gdc_warp_param *gdc, + int frame_in_x, int frame_in_y, + int frame_out_x, int frame_out_y, + int env_w, int env_h); + +#endif /*__IPU3_PARAMS_H */ diff --git a/drivers/staging/media/ipu3/ipu3-css-pool.c b/drivers/staging/media/ipu3/ipu3-css-pool.c new file mode 100644 index 000000000000..fa5b7d3acef2 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-css-pool.c @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 Intel Corporation + +#include <linux/device.h> + +#include "ipu3.h" +#include "ipu3-css-pool.h" +#include "ipu3-dmamap.h" + +int imgu_css_dma_buffer_resize(struct imgu_device *imgu, + struct imgu_css_map *map, size_t size) +{ + if (map->size < size && map->vaddr) { + dev_warn(&imgu->pci_dev->dev, "dma buf resized from %zu to %zu", + map->size, size); + + imgu_dmamap_free(imgu, map); + if (!imgu_dmamap_alloc(imgu, map, size)) + return -ENOMEM; + } + + return 0; +} + +void imgu_css_pool_cleanup(struct imgu_device *imgu, struct imgu_css_pool *pool) +{ + unsigned int i; + + for (i = 0; i < IPU3_CSS_POOL_SIZE; i++) + imgu_dmamap_free(imgu, &pool->entry[i].param); +} + +int imgu_css_pool_init(struct imgu_device *imgu, struct imgu_css_pool *pool, + size_t size) +{ + unsigned int i; + + for (i = 0; i < IPU3_CSS_POOL_SIZE; i++) { + pool->entry[i].valid = false; + if (size == 0) { + pool->entry[i].param.vaddr = NULL; + continue; + } + + if (!imgu_dmamap_alloc(imgu, &pool->entry[i].param, size)) + goto fail; + } + + pool->last = IPU3_CSS_POOL_SIZE; + + return 0; + +fail: + imgu_css_pool_cleanup(imgu, pool); + return -ENOMEM; +} + +/* + * Allocate a new parameter via recycling the oldest entry in the pool. + */ +void imgu_css_pool_get(struct imgu_css_pool *pool) +{ + /* Get the oldest entry */ + u32 n = (pool->last + 1) % IPU3_CSS_POOL_SIZE; + + pool->entry[n].valid = true; + pool->last = n; +} + +/* + * Undo, for all practical purposes, the effect of pool_get(). + */ +void imgu_css_pool_put(struct imgu_css_pool *pool) +{ + pool->entry[pool->last].valid = false; + pool->last = (pool->last + IPU3_CSS_POOL_SIZE - 1) % IPU3_CSS_POOL_SIZE; +} + +/** + * imgu_css_pool_last - Retrieve the nth pool entry from last + * + * @pool: a pointer to &struct imgu_css_pool. + * @n: the distance to the last index. + * + * Returns: + * The nth entry from last or null map to indicate no frame stored. + */ +const struct imgu_css_map * +imgu_css_pool_last(struct imgu_css_pool *pool, unsigned int n) +{ + static const struct imgu_css_map null_map = { 0 }; + int i = (pool->last + IPU3_CSS_POOL_SIZE - n) % IPU3_CSS_POOL_SIZE; + + WARN_ON(n >= IPU3_CSS_POOL_SIZE); + + if (!pool->entry[i].valid) + return &null_map; + + return &pool->entry[i].param; +} diff --git a/drivers/staging/media/ipu3/ipu3-css-pool.h b/drivers/staging/media/ipu3/ipu3-css-pool.h new file mode 100644 index 000000000000..f4a60b41401b --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-css-pool.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018 Intel Corporation */ + +#ifndef __IPU3_UTIL_H +#define __IPU3_UTIL_H + +struct device; +struct imgu_device; + +#define IPU3_CSS_POOL_SIZE 4 + +/** + * imgu_css_map - store DMA mapping info for buffer + * + * @size: size of the buffer in bytes. + * @vaddr: kernel virtual address. + * @daddr: iova dma address to access IPU3. + * @vma: private, a pointer to &struct vm_struct, + * used for imgu_dmamap_free. + */ +struct imgu_css_map { + size_t size; + void *vaddr; + dma_addr_t daddr; + struct vm_struct *vma; +}; + +/** + * imgu_css_pool - circular buffer pool definition + * + * @entry: array with IPU3_CSS_POOL_SIZE elements. + * @entry.param: a &struct imgu_css_map for storing the mem mapping. + * @entry.valid: used to mark if the entry has valid data. + * @last: write pointer, initialized to IPU3_CSS_POOL_SIZE. + */ +struct imgu_css_pool { + struct { + struct imgu_css_map param; + bool valid; + } entry[IPU3_CSS_POOL_SIZE]; + u32 last; +}; + +int imgu_css_dma_buffer_resize(struct imgu_device *imgu, + struct imgu_css_map *map, size_t size); +void imgu_css_pool_cleanup(struct imgu_device *imgu, + struct imgu_css_pool *pool); +int imgu_css_pool_init(struct imgu_device *imgu, struct imgu_css_pool *pool, + size_t size); +void imgu_css_pool_get(struct imgu_css_pool *pool); +void imgu_css_pool_put(struct imgu_css_pool *pool); +const struct imgu_css_map *imgu_css_pool_last(struct imgu_css_pool *pool, + u32 last); + +#endif diff --git a/drivers/staging/media/ipu3/ipu3-css.c b/drivers/staging/media/ipu3/ipu3-css.c new file mode 100644 index 000000000000..15ab77e4b766 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-css.c @@ -0,0 +1,2391 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 Intel Corporation + +#include <linux/device.h> +#include <linux/iopoll.h> + +#include "ipu3-css.h" +#include "ipu3-css-fw.h" +#include "ipu3-css-params.h" +#include "ipu3-dmamap.h" +#include "ipu3-tables.h" + +/* IRQ configuration */ +#define IMGU_IRQCTRL_IRQ_MASK (IMGU_IRQCTRL_IRQ_SP1 | \ + IMGU_IRQCTRL_IRQ_SP2 | \ + IMGU_IRQCTRL_IRQ_SW_PIN(0) | \ + IMGU_IRQCTRL_IRQ_SW_PIN(1)) + +#define IPU3_CSS_FORMAT_BPP_DEN 50 /* Denominator */ + +/* Some sane limits for resolutions */ +#define IPU3_CSS_MIN_RES 32 +#define IPU3_CSS_MAX_H 3136 +#define IPU3_CSS_MAX_W 4224 + +/* filter size from graph settings is fixed as 4 */ +#define FILTER_SIZE 4 +#define MIN_ENVELOPE 8 + +/* + * pre-allocated buffer size for CSS ABI, auxiliary frames + * after BDS and before GDC. Those values should be tuned + * to big enough to avoid buffer re-allocation when + * streaming to lower streaming latency. + */ +#define CSS_ABI_SIZE 136 +#define CSS_BDS_SIZE (4480 * 3200 * 3) +#define CSS_GDC_SIZE (4224 * 3200 * 12 / 8) + +#define IPU3_CSS_QUEUE_TO_FLAGS(q) (1 << (q)) +#define IPU3_CSS_FORMAT_FL_IN \ + IPU3_CSS_QUEUE_TO_FLAGS(IPU3_CSS_QUEUE_IN) +#define IPU3_CSS_FORMAT_FL_OUT \ + IPU3_CSS_QUEUE_TO_FLAGS(IPU3_CSS_QUEUE_OUT) +#define IPU3_CSS_FORMAT_FL_VF \ + IPU3_CSS_QUEUE_TO_FLAGS(IPU3_CSS_QUEUE_VF) + +/* Formats supported by IPU3 Camera Sub System */ +static const struct imgu_css_format imgu_css_formats[] = { + { + .pixelformat = V4L2_PIX_FMT_NV12, + .colorspace = V4L2_COLORSPACE_SRGB, + .frame_format = IMGU_ABI_FRAME_FORMAT_NV12, + .osys_format = IMGU_ABI_OSYS_FORMAT_NV12, + .osys_tiling = IMGU_ABI_OSYS_TILING_NONE, + .bytesperpixel_num = 1 * IPU3_CSS_FORMAT_BPP_DEN, + .chroma_decim = 4, + .width_align = IPU3_UAPI_ISP_VEC_ELEMS, + .flags = IPU3_CSS_FORMAT_FL_OUT | IPU3_CSS_FORMAT_FL_VF, + }, { + /* Each 32 bytes contains 25 10-bit pixels */ + .pixelformat = V4L2_PIX_FMT_IPU3_SBGGR10, + .colorspace = V4L2_COLORSPACE_RAW, + .frame_format = IMGU_ABI_FRAME_FORMAT_RAW_PACKED, + .bayer_order = IMGU_ABI_BAYER_ORDER_BGGR, + .bit_depth = 10, + .bytesperpixel_num = 64, + .width_align = 2 * IPU3_UAPI_ISP_VEC_ELEMS, + .flags = IPU3_CSS_FORMAT_FL_IN, + }, { + .pixelformat = V4L2_PIX_FMT_IPU3_SGBRG10, + .colorspace = V4L2_COLORSPACE_RAW, + .frame_format = IMGU_ABI_FRAME_FORMAT_RAW_PACKED, + .bayer_order = IMGU_ABI_BAYER_ORDER_GBRG, + .bit_depth = 10, + .bytesperpixel_num = 64, + .width_align = 2 * IPU3_UAPI_ISP_VEC_ELEMS, + .flags = IPU3_CSS_FORMAT_FL_IN, + }, { + .pixelformat = V4L2_PIX_FMT_IPU3_SGRBG10, + .colorspace = V4L2_COLORSPACE_RAW, + .frame_format = IMGU_ABI_FRAME_FORMAT_RAW_PACKED, + .bayer_order = IMGU_ABI_BAYER_ORDER_GRBG, + .bit_depth = 10, + .bytesperpixel_num = 64, + .width_align = 2 * IPU3_UAPI_ISP_VEC_ELEMS, + .flags = IPU3_CSS_FORMAT_FL_IN, + }, { + .pixelformat = V4L2_PIX_FMT_IPU3_SRGGB10, + .colorspace = V4L2_COLORSPACE_RAW, + .frame_format = IMGU_ABI_FRAME_FORMAT_RAW_PACKED, + .bayer_order = IMGU_ABI_BAYER_ORDER_RGGB, + .bit_depth = 10, + .bytesperpixel_num = 64, + .width_align = 2 * IPU3_UAPI_ISP_VEC_ELEMS, + .flags = IPU3_CSS_FORMAT_FL_IN, + }, +}; + +static const struct { + enum imgu_abi_queue_id qid; + size_t ptr_ofs; +} imgu_css_queues[IPU3_CSS_QUEUES] = { + [IPU3_CSS_QUEUE_IN] = { + IMGU_ABI_QUEUE_C_ID, + offsetof(struct imgu_abi_buffer, payload.frame.frame_data) + }, + [IPU3_CSS_QUEUE_OUT] = { + IMGU_ABI_QUEUE_D_ID, + offsetof(struct imgu_abi_buffer, payload.frame.frame_data) + }, + [IPU3_CSS_QUEUE_VF] = { + IMGU_ABI_QUEUE_E_ID, + offsetof(struct imgu_abi_buffer, payload.frame.frame_data) + }, + [IPU3_CSS_QUEUE_STAT_3A] = { + IMGU_ABI_QUEUE_F_ID, + offsetof(struct imgu_abi_buffer, payload.s3a.data_ptr) + }, +}; + +/* Initialize queue based on given format, adjust format as needed */ +static int imgu_css_queue_init(struct imgu_css_queue *queue, + struct v4l2_pix_format_mplane *fmt, u32 flags) +{ + struct v4l2_pix_format_mplane *const f = &queue->fmt.mpix; + unsigned int i; + u32 sizeimage; + + INIT_LIST_HEAD(&queue->bufs); + + queue->css_fmt = NULL; /* Disable */ + if (!fmt) + return 0; + + for (i = 0; i < ARRAY_SIZE(imgu_css_formats); i++) { + if (!(imgu_css_formats[i].flags & flags)) + continue; + queue->css_fmt = &imgu_css_formats[i]; + if (imgu_css_formats[i].pixelformat == fmt->pixelformat) + break; + } + if (!queue->css_fmt) + return -EINVAL; /* Could not find any suitable format */ + + queue->fmt.mpix = *fmt; + + f->width = ALIGN(clamp_t(u32, f->width, + IPU3_CSS_MIN_RES, IPU3_CSS_MAX_W), 2); + f->height = ALIGN(clamp_t(u32, f->height, + IPU3_CSS_MIN_RES, IPU3_CSS_MAX_H), 2); + queue->width_pad = ALIGN(f->width, queue->css_fmt->width_align); + if (queue->css_fmt->frame_format != IMGU_ABI_FRAME_FORMAT_RAW_PACKED) + f->plane_fmt[0].bytesperline = DIV_ROUND_UP(queue->width_pad * + queue->css_fmt->bytesperpixel_num, + IPU3_CSS_FORMAT_BPP_DEN); + else + /* For packed raw, alignment for bpl is by 50 to the width */ + f->plane_fmt[0].bytesperline = + DIV_ROUND_UP(f->width, + IPU3_CSS_FORMAT_BPP_DEN) * + queue->css_fmt->bytesperpixel_num; + + sizeimage = f->height * f->plane_fmt[0].bytesperline; + if (queue->css_fmt->chroma_decim) + sizeimage += 2 * sizeimage / queue->css_fmt->chroma_decim; + + f->plane_fmt[0].sizeimage = sizeimage; + f->field = V4L2_FIELD_NONE; + f->num_planes = 1; + f->colorspace = queue->css_fmt->colorspace; + f->flags = 0; + f->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + f->quantization = V4L2_QUANTIZATION_DEFAULT; + f->xfer_func = V4L2_XFER_FUNC_DEFAULT; + memset(f->reserved, 0, sizeof(f->reserved)); + + return 0; +} + +static bool imgu_css_queue_enabled(struct imgu_css_queue *q) +{ + return q->css_fmt; +} + +/******************* css hw *******************/ + +/* In the style of writesl() defined in include/asm-generic/io.h */ +static inline void writes(const void *mem, ssize_t count, void __iomem *addr) +{ + if (count >= 4) { + const u32 *buf = mem; + + count /= 4; + do { + writel(*buf++, addr); + addr += 4; + } while (--count); + } +} + +/* Wait until register `reg', masked with `mask', becomes `cmp' */ +static int imgu_hw_wait(void __iomem *base, int reg, u32 mask, u32 cmp) +{ + u32 val; + + return readl_poll_timeout(base + reg, val, (val & mask) == cmp, + 1000, 100 * 1000); +} + +/* Initialize the IPU3 CSS hardware and associated h/w blocks */ + +int imgu_css_set_powerup(struct device *dev, void __iomem *base) +{ + static const unsigned int freq = 450; + u32 pm_ctrl, state, val; + + dev_dbg(dev, "%s\n", __func__); + /* Clear the CSS busy signal */ + readl(base + IMGU_REG_GP_BUSY); + writel(0, base + IMGU_REG_GP_BUSY); + + /* Wait for idle signal */ + if (imgu_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_IDLE_STS, + IMGU_STATE_IDLE_STS)) { + dev_err(dev, "failed to set CSS idle\n"); + goto fail; + } + + /* Reset the css */ + writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_RESET, + base + IMGU_REG_PM_CTRL); + + usleep_range(200, 300); + + /** Prepare CSS */ + + pm_ctrl = readl(base + IMGU_REG_PM_CTRL); + state = readl(base + IMGU_REG_STATE); + + dev_dbg(dev, "CSS pm_ctrl 0x%x state 0x%x (power %s)\n", + pm_ctrl, state, state & IMGU_STATE_POWER_DOWN ? "down" : "up"); + + /* Power up CSS using wrapper */ + if (state & IMGU_STATE_POWER_DOWN) { + writel(IMGU_PM_CTRL_RACE_TO_HALT | IMGU_PM_CTRL_START, + base + IMGU_REG_PM_CTRL); + if (imgu_hw_wait(base, IMGU_REG_PM_CTRL, + IMGU_PM_CTRL_START, 0)) { + dev_err(dev, "failed to power up CSS\n"); + goto fail; + } + usleep_range(2000, 3000); + } else { + writel(IMGU_PM_CTRL_RACE_TO_HALT, base + IMGU_REG_PM_CTRL); + } + + /* Set the busy bit */ + writel(readl(base + IMGU_REG_GP_BUSY) | 1, base + IMGU_REG_GP_BUSY); + + /* Set CSS clock frequency */ + pm_ctrl = readl(base + IMGU_REG_PM_CTRL); + val = pm_ctrl & ~(IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); + writel(val, base + IMGU_REG_PM_CTRL); + writel(0, base + IMGU_REG_GP_BUSY); + if (imgu_hw_wait(base, IMGU_REG_STATE, + IMGU_STATE_PWRDNM_FSM_MASK, 0)) { + dev_err(dev, "failed to pwrdn CSS\n"); + goto fail; + } + val = (freq / IMGU_SYSTEM_REQ_FREQ_DIVIDER) & IMGU_SYSTEM_REQ_FREQ_MASK; + writel(val, base + IMGU_REG_SYSTEM_REQ); + writel(1, base + IMGU_REG_GP_BUSY); + writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_HALT, + base + IMGU_REG_PM_CTRL); + if (imgu_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_HALT_STS, + IMGU_STATE_HALT_STS)) { + dev_err(dev, "failed to halt CSS\n"); + goto fail; + } + + writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_START, + base + IMGU_REG_PM_CTRL); + if (imgu_hw_wait(base, IMGU_REG_PM_CTRL, IMGU_PM_CTRL_START, 0)) { + dev_err(dev, "failed to start CSS\n"); + goto fail; + } + writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_UNHALT, + base + IMGU_REG_PM_CTRL); + + val = readl(base + IMGU_REG_PM_CTRL); /* get pm_ctrl */ + val &= ~(IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); + val |= pm_ctrl & (IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); + writel(val, base + IMGU_REG_PM_CTRL); + + return 0; + +fail: + imgu_css_set_powerdown(dev, base); + return -EIO; +} + +void imgu_css_set_powerdown(struct device *dev, void __iomem *base) +{ + dev_dbg(dev, "%s\n", __func__); + /* wait for cio idle signal */ + if (imgu_hw_wait(base, IMGU_REG_CIO_GATE_BURST_STATE, + IMGU_CIO_GATE_BURST_MASK, 0)) + dev_warn(dev, "wait cio gate idle timeout"); + + /* wait for css idle signal */ + if (imgu_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_IDLE_STS, + IMGU_STATE_IDLE_STS)) + dev_warn(dev, "wait css idle timeout\n"); + + /* do halt-halted handshake with css */ + writel(1, base + IMGU_REG_GP_HALT); + if (imgu_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_HALT_STS, + IMGU_STATE_HALT_STS)) + dev_warn(dev, "failed to halt css"); + + /* de-assert the busy bit */ + writel(0, base + IMGU_REG_GP_BUSY); +} + +static void imgu_css_hw_enable_irq(struct imgu_css *css) +{ + void __iomem *const base = css->base; + u32 val, i; + + /* Set up interrupts */ + + /* + * Enable IRQ on the SP which signals that SP goes to idle + * (aka ready state) and set trigger to pulse + */ + val = readl(base + IMGU_REG_SP_CTRL(0)) | IMGU_CTRL_IRQ_READY; + writel(val, base + IMGU_REG_SP_CTRL(0)); + writel(val | IMGU_CTRL_IRQ_CLEAR, base + IMGU_REG_SP_CTRL(0)); + + /* Enable IRQs from the IMGU wrapper */ + writel(IMGU_REG_INT_CSS_IRQ, base + IMGU_REG_INT_ENABLE); + /* Clear */ + writel(IMGU_REG_INT_CSS_IRQ, base + IMGU_REG_INT_STATUS); + + /* Enable IRQs from main IRQ controller */ + writel(~0, base + IMGU_REG_IRQCTRL_EDGE_NOT_PULSE(IMGU_IRQCTRL_MAIN)); + writel(0, base + IMGU_REG_IRQCTRL_MASK(IMGU_IRQCTRL_MAIN)); + writel(IMGU_IRQCTRL_IRQ_MASK, + base + IMGU_REG_IRQCTRL_EDGE(IMGU_IRQCTRL_MAIN)); + writel(IMGU_IRQCTRL_IRQ_MASK, + base + IMGU_REG_IRQCTRL_ENABLE(IMGU_IRQCTRL_MAIN)); + writel(IMGU_IRQCTRL_IRQ_MASK, + base + IMGU_REG_IRQCTRL_CLEAR(IMGU_IRQCTRL_MAIN)); + writel(IMGU_IRQCTRL_IRQ_MASK, + base + IMGU_REG_IRQCTRL_MASK(IMGU_IRQCTRL_MAIN)); + /* Wait for write complete */ + readl(base + IMGU_REG_IRQCTRL_ENABLE(IMGU_IRQCTRL_MAIN)); + + /* Enable IRQs from SP0 and SP1 controllers */ + for (i = IMGU_IRQCTRL_SP0; i <= IMGU_IRQCTRL_SP1; i++) { + writel(~0, base + IMGU_REG_IRQCTRL_EDGE_NOT_PULSE(i)); + writel(0, base + IMGU_REG_IRQCTRL_MASK(i)); + writel(IMGU_IRQCTRL_IRQ_MASK, base + IMGU_REG_IRQCTRL_EDGE(i)); + writel(IMGU_IRQCTRL_IRQ_MASK, + base + IMGU_REG_IRQCTRL_ENABLE(i)); + writel(IMGU_IRQCTRL_IRQ_MASK, base + IMGU_REG_IRQCTRL_CLEAR(i)); + writel(IMGU_IRQCTRL_IRQ_MASK, base + IMGU_REG_IRQCTRL_MASK(i)); + /* Wait for write complete */ + readl(base + IMGU_REG_IRQCTRL_ENABLE(i)); + } +} + +static int imgu_css_hw_init(struct imgu_css *css) +{ + /* For checking that streaming monitor statuses are valid */ + static const struct { + u32 reg; + u32 mask; + const char *name; + } stream_monitors[] = { + { + IMGU_REG_GP_SP1_STRMON_STAT, + IMGU_GP_STRMON_STAT_ISP_PORT_SP12ISP, + "ISP0 to SP0" + }, { + IMGU_REG_GP_ISP_STRMON_STAT, + IMGU_GP_STRMON_STAT_SP1_PORT_ISP2SP1, + "SP0 to ISP0" + }, { + IMGU_REG_GP_MOD_STRMON_STAT, + IMGU_GP_STRMON_STAT_MOD_PORT_ISP2DMA, + "ISP0 to DMA0" + }, { + IMGU_REG_GP_ISP_STRMON_STAT, + IMGU_GP_STRMON_STAT_ISP_PORT_DMA2ISP, + "DMA0 to ISP0" + }, { + IMGU_REG_GP_MOD_STRMON_STAT, + IMGU_GP_STRMON_STAT_MOD_PORT_CELLS2GDC, + "ISP0 to GDC0" + }, { + IMGU_REG_GP_MOD_STRMON_STAT, + IMGU_GP_STRMON_STAT_MOD_PORT_GDC2CELLS, + "GDC0 to ISP0" + }, { + IMGU_REG_GP_MOD_STRMON_STAT, + IMGU_GP_STRMON_STAT_MOD_PORT_SP12DMA, + "SP0 to DMA0" + }, { + IMGU_REG_GP_SP1_STRMON_STAT, + IMGU_GP_STRMON_STAT_SP1_PORT_DMA2SP1, + "DMA0 to SP0" + }, { + IMGU_REG_GP_MOD_STRMON_STAT, + IMGU_GP_STRMON_STAT_MOD_PORT_CELLS2GDC, + "SP0 to GDC0" + }, { + IMGU_REG_GP_MOD_STRMON_STAT, + IMGU_GP_STRMON_STAT_MOD_PORT_GDC2CELLS, + "GDC0 to SP0" + }, + }; + + struct device *dev = css->dev; + void __iomem *const base = css->base; + u32 val, i; + + /* Set instruction cache address and inv bit for ISP, SP, and SP1 */ + for (i = 0; i < IMGU_NUM_SP; i++) { + struct imgu_fw_info *bi = + &css->fwp->binary_header[css->fw_sp[i]]; + + writel(css->binary[css->fw_sp[i]].daddr, + base + IMGU_REG_SP_ICACHE_ADDR(bi->type)); + writel(readl(base + IMGU_REG_SP_CTRL(bi->type)) | + IMGU_CTRL_ICACHE_INV, + base + IMGU_REG_SP_CTRL(bi->type)); + } + writel(css->binary[css->fw_bl].daddr, base + IMGU_REG_ISP_ICACHE_ADDR); + writel(readl(base + IMGU_REG_ISP_CTRL) | IMGU_CTRL_ICACHE_INV, + base + IMGU_REG_ISP_CTRL); + + /* Check that IMGU hardware is ready */ + + if (!(readl(base + IMGU_REG_SP_CTRL(0)) & IMGU_CTRL_IDLE)) { + dev_err(dev, "SP is not idle\n"); + return -EIO; + } + if (!(readl(base + IMGU_REG_ISP_CTRL) & IMGU_CTRL_IDLE)) { + dev_err(dev, "ISP is not idle\n"); + return -EIO; + } + + for (i = 0; i < ARRAY_SIZE(stream_monitors); i++) { + val = readl(base + stream_monitors[i].reg); + if (val & stream_monitors[i].mask) { + dev_err(dev, "error: Stream monitor %s is valid\n", + stream_monitors[i].name); + return -EIO; + } + } + + /* Initialize GDC with default values */ + + for (i = 0; i < ARRAY_SIZE(imgu_css_gdc_lut[0]); i++) { + u32 val0 = imgu_css_gdc_lut[0][i] & IMGU_GDC_LUT_MASK; + u32 val1 = imgu_css_gdc_lut[1][i] & IMGU_GDC_LUT_MASK; + u32 val2 = imgu_css_gdc_lut[2][i] & IMGU_GDC_LUT_MASK; + u32 val3 = imgu_css_gdc_lut[3][i] & IMGU_GDC_LUT_MASK; + + writel(val0 | (val1 << 16), + base + IMGU_REG_GDC_LUT_BASE + i * 8); + writel(val2 | (val3 << 16), + base + IMGU_REG_GDC_LUT_BASE + i * 8 + 4); + } + + return 0; +} + +/* Boot the given IPU3 CSS SP */ +static int imgu_css_hw_start_sp(struct imgu_css *css, int sp) +{ + void __iomem *const base = css->base; + struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[sp]]; + struct imgu_abi_sp_init_dmem_cfg dmem_cfg = { + .ddr_data_addr = css->binary[css->fw_sp[sp]].daddr + + bi->blob.data_source, + .dmem_data_addr = bi->blob.data_target, + .dmem_bss_addr = bi->blob.bss_target, + .data_size = bi->blob.data_size, + .bss_size = bi->blob.bss_size, + .sp_id = sp, + }; + + writes(&dmem_cfg, sizeof(dmem_cfg), base + + IMGU_REG_SP_DMEM_BASE(sp) + bi->info.sp.init_dmem_data); + + writel(bi->info.sp.sp_entry, base + IMGU_REG_SP_START_ADDR(sp)); + + writel(readl(base + IMGU_REG_SP_CTRL(sp)) + | IMGU_CTRL_START | IMGU_CTRL_RUN, base + IMGU_REG_SP_CTRL(sp)); + + if (imgu_hw_wait(css->base, IMGU_REG_SP_DMEM_BASE(sp) + + bi->info.sp.sw_state, + ~0, IMGU_ABI_SP_SWSTATE_INITIALIZED)) + return -EIO; + + return 0; +} + +/* Start the IPU3 CSS ImgU (Imaging Unit) and all the SPs */ +static int imgu_css_hw_start(struct imgu_css *css) +{ + static const u32 event_mask = + ((1 << IMGU_ABI_EVTTYPE_OUT_FRAME_DONE) | + (1 << IMGU_ABI_EVTTYPE_2ND_OUT_FRAME_DONE) | + (1 << IMGU_ABI_EVTTYPE_VF_OUT_FRAME_DONE) | + (1 << IMGU_ABI_EVTTYPE_2ND_VF_OUT_FRAME_DONE) | + (1 << IMGU_ABI_EVTTYPE_3A_STATS_DONE) | + (1 << IMGU_ABI_EVTTYPE_DIS_STATS_DONE) | + (1 << IMGU_ABI_EVTTYPE_PIPELINE_DONE) | + (1 << IMGU_ABI_EVTTYPE_FRAME_TAGGED) | + (1 << IMGU_ABI_EVTTYPE_INPUT_FRAME_DONE) | + (1 << IMGU_ABI_EVTTYPE_METADATA_DONE) | + (1 << IMGU_ABI_EVTTYPE_ACC_STAGE_COMPLETE)) + << IMGU_ABI_SP_COMM_EVENT_IRQ_MASK_OR_SHIFT; + + void __iomem *const base = css->base; + struct imgu_fw_info *bi, *bl = &css->fwp->binary_header[css->fw_bl]; + unsigned int i; + + writel(IMGU_TLB_INVALIDATE, base + IMGU_REG_TLB_INVALIDATE); + + /* Start bootloader */ + + writel(IMGU_ABI_BL_SWSTATE_BUSY, + base + IMGU_REG_ISP_DMEM_BASE + bl->info.bl.sw_state); + writel(IMGU_NUM_SP, + base + IMGU_REG_ISP_DMEM_BASE + bl->info.bl.num_dma_cmds); + + for (i = 0; i < IMGU_NUM_SP; i++) { + int j = IMGU_NUM_SP - i - 1; /* load sp1 first, then sp0 */ + struct imgu_fw_info *sp = + &css->fwp->binary_header[css->fw_sp[j]]; + struct imgu_abi_bl_dma_cmd_entry dma_cmd = { + .src_addr = css->binary[css->fw_sp[j]].daddr + + sp->blob.text_source, + .size = sp->blob.text_size, + .dst_type = IMGU_ABI_BL_DMACMD_TYPE_SP_PMEM, + .dst_addr = IMGU_SP_PMEM_BASE(j), + }; + + writes(&dma_cmd, sizeof(dma_cmd), + base + IMGU_REG_ISP_DMEM_BASE + i * sizeof(dma_cmd) + + bl->info.bl.dma_cmd_list); + } + + writel(bl->info.bl.bl_entry, base + IMGU_REG_ISP_START_ADDR); + + writel(readl(base + IMGU_REG_ISP_CTRL) + | IMGU_CTRL_START | IMGU_CTRL_RUN, base + IMGU_REG_ISP_CTRL); + if (imgu_hw_wait(css->base, IMGU_REG_ISP_DMEM_BASE + + bl->info.bl.sw_state, ~0, + IMGU_ABI_BL_SWSTATE_OK)) { + dev_err(css->dev, "failed to start bootloader\n"); + return -EIO; + } + + /* Start ISP */ + + memset(css->xmem_sp_group_ptrs.vaddr, 0, + sizeof(struct imgu_abi_sp_group)); + + bi = &css->fwp->binary_header[css->fw_sp[0]]; + + writel(css->xmem_sp_group_ptrs.daddr, + base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.per_frame_data); + + writel(IMGU_ABI_SP_SWSTATE_TERMINATED, + base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state); + writel(1, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb); + + if (imgu_css_hw_start_sp(css, 0)) + return -EIO; + + writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.isp_started); + writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + + bi->info.sp.host_sp_queues_initialized); + writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sleep_mode); + writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb); + writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(0) + + bi->info.sp.host_sp_com + IMGU_ABI_SP_COMM_COMMAND); + + /* Enable all events for all queues */ + + for (i = 0; i < IPU3_CSS_PIPE_ID_NUM; i++) + writel(event_mask, base + IMGU_REG_SP_DMEM_BASE(0) + + bi->info.sp.host_sp_com + + IMGU_ABI_SP_COMM_EVENT_IRQ_MASK(i)); + writel(1, base + IMGU_REG_SP_DMEM_BASE(0) + + bi->info.sp.host_sp_queues_initialized); + + /* Start SP1 */ + + bi = &css->fwp->binary_header[css->fw_sp[1]]; + + writel(IMGU_ABI_SP_SWSTATE_TERMINATED, + base + IMGU_REG_SP_DMEM_BASE(1) + bi->info.sp.sw_state); + + if (imgu_css_hw_start_sp(css, 1)) + return -EIO; + + writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(1) + + bi->info.sp.host_sp_com + IMGU_ABI_SP_COMM_COMMAND); + + return 0; +} + +static void imgu_css_hw_stop(struct imgu_css *css) +{ + void __iomem *const base = css->base; + struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[0]]; + + /* Stop fw */ + writel(IMGU_ABI_SP_COMM_COMMAND_TERMINATE, + base + IMGU_REG_SP_DMEM_BASE(0) + + bi->info.sp.host_sp_com + IMGU_ABI_SP_COMM_COMMAND); + if (imgu_hw_wait(css->base, IMGU_REG_SP_CTRL(0), + IMGU_CTRL_IDLE, IMGU_CTRL_IDLE)) + dev_err(css->dev, "wait sp0 idle timeout.\n"); + if (readl(base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state) != + IMGU_ABI_SP_SWSTATE_TERMINATED) + dev_err(css->dev, "sp0 is not terminated.\n"); + if (imgu_hw_wait(css->base, IMGU_REG_ISP_CTRL, + IMGU_CTRL_IDLE, IMGU_CTRL_IDLE)) + dev_err(css->dev, "wait isp idle timeout\n"); +} + +static void imgu_css_hw_cleanup(struct imgu_css *css) +{ + void __iomem *const base = css->base; + + /** Reset CSS **/ + + /* Clear the CSS busy signal */ + readl(base + IMGU_REG_GP_BUSY); + writel(0, base + IMGU_REG_GP_BUSY); + + /* Wait for idle signal */ + if (imgu_hw_wait(css->base, IMGU_REG_STATE, IMGU_STATE_IDLE_STS, + IMGU_STATE_IDLE_STS)) + dev_err(css->dev, "failed to shut down hw cleanly\n"); + + /* Reset the css */ + writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_RESET, + base + IMGU_REG_PM_CTRL); + + usleep_range(200, 300); +} + +static void imgu_css_pipeline_cleanup(struct imgu_css *css, unsigned int pipe) +{ + struct imgu_device *imgu = dev_get_drvdata(css->dev); + unsigned int i; + + imgu_css_pool_cleanup(imgu, + &css->pipes[pipe].pool.parameter_set_info); + imgu_css_pool_cleanup(imgu, &css->pipes[pipe].pool.acc); + imgu_css_pool_cleanup(imgu, &css->pipes[pipe].pool.gdc); + imgu_css_pool_cleanup(imgu, &css->pipes[pipe].pool.obgrid); + + for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) + imgu_css_pool_cleanup(imgu, + &css->pipes[pipe].pool.binary_params_p[i]); +} + +/* + * This function initializes various stages of the + * IPU3 CSS ISP pipeline + */ +static int imgu_css_pipeline_init(struct imgu_css *css, unsigned int pipe) +{ + static const int BYPC = 2; /* Bytes per component */ + static const struct imgu_abi_buffer_sp buffer_sp_init = { + .buf_src = {.queue_id = IMGU_ABI_QUEUE_EVENT_ID}, + .buf_type = IMGU_ABI_BUFFER_TYPE_INVALID, + }; + + struct imgu_abi_isp_iterator_config *cfg_iter; + struct imgu_abi_isp_ref_config *cfg_ref; + struct imgu_abi_isp_dvs_config *cfg_dvs; + struct imgu_abi_isp_tnr3_config *cfg_tnr; + struct imgu_abi_isp_ref_dmem_state *cfg_ref_state; + struct imgu_abi_isp_tnr3_dmem_state *cfg_tnr_state; + + const int stage = 0; + unsigned int i, j; + + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + const struct imgu_fw_info *bi = + &css->fwp->binary_header[css_pipe->bindex]; + const unsigned int stripes = bi->info.isp.sp.iterator.num_stripes; + + struct imgu_fw_config_memory_offsets *cofs = (void *)css->fwp + + bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_CONFIG]; + struct imgu_fw_state_memory_offsets *sofs = (void *)css->fwp + + bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_STATE]; + + struct imgu_abi_isp_stage *isp_stage; + struct imgu_abi_sp_stage *sp_stage; + struct imgu_abi_sp_group *sp_group; + + const unsigned int bds_width_pad = + ALIGN(css_pipe->rect[IPU3_CSS_RECT_BDS].width, + 2 * IPU3_UAPI_ISP_VEC_ELEMS); + + const enum imgu_abi_memories m0 = IMGU_ABI_MEM_ISP_DMEM0; + enum imgu_abi_param_class cfg = IMGU_ABI_PARAM_CLASS_CONFIG; + void *vaddr = css_pipe->binary_params_cs[cfg - 1][m0].vaddr; + + struct imgu_device *imgu = dev_get_drvdata(css->dev); + + dev_dbg(css->dev, "%s for pipe %d", __func__, pipe); + + /* Configure iterator */ + + cfg_iter = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, + &cofs->dmem.iterator, + sizeof(*cfg_iter), vaddr); + if (!cfg_iter) + goto bad_firmware; + + cfg_iter->input_info.res.width = + css_pipe->queue[IPU3_CSS_QUEUE_IN].fmt.mpix.width; + cfg_iter->input_info.res.height = + css_pipe->queue[IPU3_CSS_QUEUE_IN].fmt.mpix.height; + cfg_iter->input_info.padded_width = + css_pipe->queue[IPU3_CSS_QUEUE_IN].width_pad; + cfg_iter->input_info.format = + css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->frame_format; + cfg_iter->input_info.raw_bit_depth = + css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->bit_depth; + cfg_iter->input_info.raw_bayer_order = + css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->bayer_order; + cfg_iter->input_info.raw_type = IMGU_ABI_RAW_TYPE_BAYER; + + cfg_iter->internal_info.res.width = css_pipe->rect[IPU3_CSS_RECT_BDS].width; + cfg_iter->internal_info.res.height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + cfg_iter->internal_info.padded_width = bds_width_pad; + cfg_iter->internal_info.format = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->frame_format; + cfg_iter->internal_info.raw_bit_depth = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->bit_depth; + cfg_iter->internal_info.raw_bayer_order = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->bayer_order; + cfg_iter->internal_info.raw_type = IMGU_ABI_RAW_TYPE_BAYER; + + cfg_iter->output_info.res.width = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.width; + cfg_iter->output_info.res.height = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.height; + cfg_iter->output_info.padded_width = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].width_pad; + cfg_iter->output_info.format = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->frame_format; + cfg_iter->output_info.raw_bit_depth = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->bit_depth; + cfg_iter->output_info.raw_bayer_order = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->bayer_order; + cfg_iter->output_info.raw_type = IMGU_ABI_RAW_TYPE_BAYER; + + cfg_iter->vf_info.res.width = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.width; + cfg_iter->vf_info.res.height = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.height; + cfg_iter->vf_info.padded_width = + css_pipe->queue[IPU3_CSS_QUEUE_VF].width_pad; + cfg_iter->vf_info.format = + css_pipe->queue[IPU3_CSS_QUEUE_VF].css_fmt->frame_format; + cfg_iter->vf_info.raw_bit_depth = + css_pipe->queue[IPU3_CSS_QUEUE_VF].css_fmt->bit_depth; + cfg_iter->vf_info.raw_bayer_order = + css_pipe->queue[IPU3_CSS_QUEUE_VF].css_fmt->bayer_order; + cfg_iter->vf_info.raw_type = IMGU_ABI_RAW_TYPE_BAYER; + + cfg_iter->dvs_envelope.width = css_pipe->rect[IPU3_CSS_RECT_ENVELOPE].width; + cfg_iter->dvs_envelope.height = + css_pipe->rect[IPU3_CSS_RECT_ENVELOPE].height; + + /* Configure reference (delay) frames */ + + cfg_ref = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, + &cofs->dmem.ref, + sizeof(*cfg_ref), vaddr); + if (!cfg_ref) + goto bad_firmware; + + cfg_ref->port_b.crop = 0; + cfg_ref->port_b.elems = IMGU_ABI_ISP_DDR_WORD_BYTES / BYPC; + cfg_ref->port_b.width = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].width; + cfg_ref->port_b.stride = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].bytesperline; + cfg_ref->width_a_over_b = + IPU3_UAPI_ISP_VEC_ELEMS / cfg_ref->port_b.elems; + cfg_ref->dvs_frame_delay = IPU3_CSS_AUX_FRAMES - 1; + for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) { + cfg_ref->ref_frame_addr_y[i] = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].mem[i].daddr; + cfg_ref->ref_frame_addr_c[i] = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].mem[i].daddr + + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].bytesperline * + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].height; + } + for (; i < IMGU_ABI_FRAMES_REF; i++) { + cfg_ref->ref_frame_addr_y[i] = 0; + cfg_ref->ref_frame_addr_c[i] = 0; + } + + /* Configure DVS (digital video stabilization) */ + + cfg_dvs = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, + &cofs->dmem.dvs, sizeof(*cfg_dvs), + vaddr); + if (!cfg_dvs) + goto bad_firmware; + + cfg_dvs->num_horizontal_blocks = + ALIGN(DIV_ROUND_UP(css_pipe->rect[IPU3_CSS_RECT_GDC].width, + IMGU_DVS_BLOCK_W), 2); + cfg_dvs->num_vertical_blocks = + DIV_ROUND_UP(css_pipe->rect[IPU3_CSS_RECT_GDC].height, + IMGU_DVS_BLOCK_H); + + /* Configure TNR (temporal noise reduction) */ + + if (css_pipe->pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { + cfg_tnr = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, + &cofs->dmem.tnr3, + sizeof(*cfg_tnr), + vaddr); + if (!cfg_tnr) + goto bad_firmware; + + cfg_tnr->port_b.crop = 0; + cfg_tnr->port_b.elems = IMGU_ABI_ISP_DDR_WORD_BYTES; + cfg_tnr->port_b.width = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].width; + cfg_tnr->port_b.stride = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].bytesperline; + cfg_tnr->width_a_over_b = + IPU3_UAPI_ISP_VEC_ELEMS / cfg_tnr->port_b.elems; + cfg_tnr->frame_height = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].height; + cfg_tnr->delay_frame = IPU3_CSS_AUX_FRAMES - 1; + for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) + cfg_tnr->frame_addr[i] = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR] + .mem[i].daddr; + for (; i < IMGU_ABI_FRAMES_TNR; i++) + cfg_tnr->frame_addr[i] = 0; + } + + /* Configure ref dmem state parameters */ + + cfg = IMGU_ABI_PARAM_CLASS_STATE; + vaddr = css_pipe->binary_params_cs[cfg - 1][m0].vaddr; + + cfg_ref_state = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, + &sofs->dmem.ref, + sizeof(*cfg_ref_state), + vaddr); + if (!cfg_ref_state) + goto bad_firmware; + + cfg_ref_state->ref_in_buf_idx = 0; + cfg_ref_state->ref_out_buf_idx = 1; + + /* Configure tnr dmem state parameters */ + if (css_pipe->pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { + cfg_tnr_state = + imgu_css_fw_pipeline_params(css, pipe, cfg, m0, + &sofs->dmem.tnr3, + sizeof(*cfg_tnr_state), + vaddr); + if (!cfg_tnr_state) + goto bad_firmware; + + cfg_tnr_state->in_bufidx = 0; + cfg_tnr_state->out_bufidx = 1; + cfg_tnr_state->bypass_filter = 0; + cfg_tnr_state->total_frame_counter = 0; + for (i = 0; i < IMGU_ABI_BUF_SETS_TNR; i++) + cfg_tnr_state->buffer_frame_counter[i] = 0; + } + + /* Configure ISP stage */ + + isp_stage = css_pipe->xmem_isp_stage_ptrs[pipe][stage].vaddr; + memset(isp_stage, 0, sizeof(*isp_stage)); + isp_stage->blob_info = bi->blob; + isp_stage->binary_info = bi->info.isp.sp; + strscpy(isp_stage->binary_name, + (char *)css->fwp + bi->blob.prog_name_offset, + sizeof(isp_stage->binary_name)); + isp_stage->mem_initializers = bi->info.isp.sp.mem_initializers; + for (i = IMGU_ABI_PARAM_CLASS_CONFIG; i < IMGU_ABI_PARAM_CLASS_NUM; i++) + for (j = 0; j < IMGU_ABI_NUM_MEMORIES; j++) + isp_stage->mem_initializers.params[i][j].address = + css_pipe->binary_params_cs[i - 1][j].daddr; + + /* Configure SP stage */ + + sp_stage = css_pipe->xmem_sp_stage_ptrs[pipe][stage].vaddr; + memset(sp_stage, 0, sizeof(*sp_stage)); + + sp_stage->frames.in.buf_attr = buffer_sp_init; + for (i = 0; i < IMGU_ABI_BINARY_MAX_OUTPUT_PORTS; i++) + sp_stage->frames.out[i].buf_attr = buffer_sp_init; + sp_stage->frames.out_vf.buf_attr = buffer_sp_init; + sp_stage->frames.s3a_buf = buffer_sp_init; + sp_stage->frames.dvs_buf = buffer_sp_init; + + sp_stage->stage_type = IMGU_ABI_STAGE_TYPE_ISP; + sp_stage->num = stage; + sp_stage->isp_online = 0; + sp_stage->isp_copy_vf = 0; + sp_stage->isp_copy_output = 0; + + sp_stage->enable.vf_output = css_pipe->vf_output_en; + + sp_stage->frames.effective_in_res.width = + css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].width; + sp_stage->frames.effective_in_res.height = + css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].height; + sp_stage->frames.in.info.res.width = + css_pipe->queue[IPU3_CSS_QUEUE_IN].fmt.mpix.width; + sp_stage->frames.in.info.res.height = + css_pipe->queue[IPU3_CSS_QUEUE_IN].fmt.mpix.height; + sp_stage->frames.in.info.padded_width = + css_pipe->queue[IPU3_CSS_QUEUE_IN].width_pad; + sp_stage->frames.in.info.format = + css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->frame_format; + sp_stage->frames.in.info.raw_bit_depth = + css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->bit_depth; + sp_stage->frames.in.info.raw_bayer_order = + css_pipe->queue[IPU3_CSS_QUEUE_IN].css_fmt->bayer_order; + sp_stage->frames.in.info.raw_type = IMGU_ABI_RAW_TYPE_BAYER; + sp_stage->frames.in.buf_attr.buf_src.queue_id = IMGU_ABI_QUEUE_C_ID; + sp_stage->frames.in.buf_attr.buf_type = + IMGU_ABI_BUFFER_TYPE_INPUT_FRAME; + + sp_stage->frames.out[0].info.res.width = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.width; + sp_stage->frames.out[0].info.res.height = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.height; + sp_stage->frames.out[0].info.padded_width = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].width_pad; + sp_stage->frames.out[0].info.format = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->frame_format; + sp_stage->frames.out[0].info.raw_bit_depth = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->bit_depth; + sp_stage->frames.out[0].info.raw_bayer_order = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->bayer_order; + sp_stage->frames.out[0].info.raw_type = IMGU_ABI_RAW_TYPE_BAYER; + sp_stage->frames.out[0].planes.nv.uv.offset = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].width_pad * + css_pipe->queue[IPU3_CSS_QUEUE_OUT].fmt.mpix.height; + sp_stage->frames.out[0].buf_attr.buf_src.queue_id = IMGU_ABI_QUEUE_D_ID; + sp_stage->frames.out[0].buf_attr.buf_type = + IMGU_ABI_BUFFER_TYPE_OUTPUT_FRAME; + + sp_stage->frames.out[1].buf_attr.buf_src.queue_id = + IMGU_ABI_QUEUE_EVENT_ID; + + sp_stage->frames.internal_frame_info.res.width = + css_pipe->rect[IPU3_CSS_RECT_BDS].width; + sp_stage->frames.internal_frame_info.res.height = + css_pipe->rect[IPU3_CSS_RECT_BDS].height; + sp_stage->frames.internal_frame_info.padded_width = bds_width_pad; + + sp_stage->frames.internal_frame_info.format = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->frame_format; + sp_stage->frames.internal_frame_info.raw_bit_depth = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->bit_depth; + sp_stage->frames.internal_frame_info.raw_bayer_order = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].css_fmt->bayer_order; + sp_stage->frames.internal_frame_info.raw_type = IMGU_ABI_RAW_TYPE_BAYER; + + sp_stage->frames.out_vf.info.res.width = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.width; + sp_stage->frames.out_vf.info.res.height = + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.height; + sp_stage->frames.out_vf.info.padded_width = + css_pipe->queue[IPU3_CSS_QUEUE_VF].width_pad; + sp_stage->frames.out_vf.info.format = + css_pipe->queue[IPU3_CSS_QUEUE_VF].css_fmt->frame_format; + sp_stage->frames.out_vf.info.raw_bit_depth = + css_pipe->queue[IPU3_CSS_QUEUE_VF].css_fmt->bit_depth; + sp_stage->frames.out_vf.info.raw_bayer_order = + css_pipe->queue[IPU3_CSS_QUEUE_VF].css_fmt->bayer_order; + sp_stage->frames.out_vf.info.raw_type = IMGU_ABI_RAW_TYPE_BAYER; + sp_stage->frames.out_vf.planes.yuv.u.offset = + css_pipe->queue[IPU3_CSS_QUEUE_VF].width_pad * + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.height; + sp_stage->frames.out_vf.planes.yuv.v.offset = + css_pipe->queue[IPU3_CSS_QUEUE_VF].width_pad * + css_pipe->queue[IPU3_CSS_QUEUE_VF].fmt.mpix.height * 5 / 4; + sp_stage->frames.out_vf.buf_attr.buf_src.queue_id = IMGU_ABI_QUEUE_E_ID; + sp_stage->frames.out_vf.buf_attr.buf_type = + IMGU_ABI_BUFFER_TYPE_VF_OUTPUT_FRAME; + + sp_stage->frames.s3a_buf.buf_src.queue_id = IMGU_ABI_QUEUE_F_ID; + sp_stage->frames.s3a_buf.buf_type = IMGU_ABI_BUFFER_TYPE_3A_STATISTICS; + + sp_stage->frames.dvs_buf.buf_src.queue_id = IMGU_ABI_QUEUE_G_ID; + sp_stage->frames.dvs_buf.buf_type = IMGU_ABI_BUFFER_TYPE_DIS_STATISTICS; + + sp_stage->dvs_envelope.width = css_pipe->rect[IPU3_CSS_RECT_ENVELOPE].width; + sp_stage->dvs_envelope.height = + css_pipe->rect[IPU3_CSS_RECT_ENVELOPE].height; + + sp_stage->isp_pipe_version = + bi->info.isp.sp.pipeline.isp_pipe_version; + sp_stage->isp_deci_log_factor = + clamp(max(fls(css_pipe->rect[IPU3_CSS_RECT_BDS].width / + IMGU_MAX_BQ_GRID_WIDTH), + fls(css_pipe->rect[IPU3_CSS_RECT_BDS].height / + IMGU_MAX_BQ_GRID_HEIGHT)) - 1, 3, 5); + sp_stage->isp_vf_downscale_bits = 0; + sp_stage->if_config_index = 255; + sp_stage->sp_enable_xnr = 0; + sp_stage->num_stripes = stripes; + sp_stage->enable.s3a = 1; + sp_stage->enable.dvs_stats = 0; + + sp_stage->xmem_bin_addr = css->binary[css_pipe->bindex].daddr; + sp_stage->xmem_map_addr = css_pipe->sp_ddr_ptrs.daddr; + sp_stage->isp_stage_addr = + css_pipe->xmem_isp_stage_ptrs[pipe][stage].daddr; + + /* Configure SP group */ + + sp_group = css->xmem_sp_group_ptrs.vaddr; + memset(&sp_group->pipe[pipe], 0, sizeof(struct imgu_abi_sp_pipeline)); + + sp_group->pipe[pipe].num_stages = 1; + sp_group->pipe[pipe].pipe_id = css_pipe->pipe_id; + sp_group->pipe[pipe].thread_id = pipe; + sp_group->pipe[pipe].pipe_num = pipe; + sp_group->pipe[pipe].num_execs = -1; + sp_group->pipe[pipe].pipe_qos_config = -1; + sp_group->pipe[pipe].required_bds_factor = 0; + sp_group->pipe[pipe].dvs_frame_delay = IPU3_CSS_AUX_FRAMES - 1; + sp_group->pipe[pipe].inout_port_config = + IMGU_ABI_PORT_CONFIG_TYPE_INPUT_HOST | + IMGU_ABI_PORT_CONFIG_TYPE_OUTPUT_HOST; + sp_group->pipe[pipe].scaler_pp_lut = 0; + sp_group->pipe[pipe].shading.internal_frame_origin_x_bqs_on_sctbl = 0; + sp_group->pipe[pipe].shading.internal_frame_origin_y_bqs_on_sctbl = 0; + sp_group->pipe[pipe].sp_stage_addr[stage] = + css_pipe->xmem_sp_stage_ptrs[pipe][stage].daddr; + sp_group->pipe[pipe].pipe_config = + bi->info.isp.sp.enable.params ? (1 << pipe) : 0; + sp_group->pipe[pipe].pipe_config |= IMGU_ABI_PIPE_CONFIG_ACQUIRE_ISP; + + /* Initialize parameter pools */ + + if (imgu_css_pool_init(imgu, &css_pipe->pool.parameter_set_info, + sizeof(struct imgu_abi_parameter_set_info)) || + imgu_css_pool_init(imgu, &css_pipe->pool.acc, + sizeof(struct imgu_abi_acc_param)) || + imgu_css_pool_init(imgu, &css_pipe->pool.gdc, + sizeof(struct imgu_abi_gdc_warp_param) * + 3 * cfg_dvs->num_horizontal_blocks / 2 * + cfg_dvs->num_vertical_blocks) || + imgu_css_pool_init(imgu, &css_pipe->pool.obgrid, + imgu_css_fw_obgrid_size( + &css->fwp->binary_header[css_pipe->bindex]))) + goto out_of_memory; + + for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) + if (imgu_css_pool_init(imgu, + &css_pipe->pool.binary_params_p[i], + bi->info.isp.sp.mem_initializers.params + [IMGU_ABI_PARAM_CLASS_PARAM][i].size)) + goto out_of_memory; + + return 0; + +bad_firmware: + imgu_css_pipeline_cleanup(css, pipe); + return -EPROTO; + +out_of_memory: + imgu_css_pipeline_cleanup(css, pipe); + return -ENOMEM; +} + +static u8 imgu_css_queue_pos(struct imgu_css *css, int queue, int thread) +{ + static const unsigned int sp; + void __iomem *const base = css->base; + struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[sp]]; + struct imgu_abi_queues __iomem *q = base + IMGU_REG_SP_DMEM_BASE(sp) + + bi->info.sp.host_sp_queue; + + return queue >= 0 ? readb(&q->host2sp_bufq_info[thread][queue].end) : + readb(&q->host2sp_evtq_info.end); +} + +/* Sent data to sp using given buffer queue, or if queue < 0, event queue. */ +static int imgu_css_queue_data(struct imgu_css *css, + int queue, int thread, u32 data) +{ + static const unsigned int sp; + void __iomem *const base = css->base; + struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[sp]]; + struct imgu_abi_queues __iomem *q = base + IMGU_REG_SP_DMEM_BASE(sp) + + bi->info.sp.host_sp_queue; + u8 size, start, end, end2; + + if (queue >= 0) { + size = readb(&q->host2sp_bufq_info[thread][queue].size); + start = readb(&q->host2sp_bufq_info[thread][queue].start); + end = readb(&q->host2sp_bufq_info[thread][queue].end); + } else { + size = readb(&q->host2sp_evtq_info.size); + start = readb(&q->host2sp_evtq_info.start); + end = readb(&q->host2sp_evtq_info.end); + } + + if (size == 0) + return -EIO; + + end2 = (end + 1) % size; + if (end2 == start) + return -EBUSY; /* Queue full */ + + if (queue >= 0) { + writel(data, &q->host2sp_bufq[thread][queue][end]); + writeb(end2, &q->host2sp_bufq_info[thread][queue].end); + } else { + writel(data, &q->host2sp_evtq[end]); + writeb(end2, &q->host2sp_evtq_info.end); + } + + return 0; +} + +/* Receive data using given buffer queue, or if queue < 0, event queue. */ +static int imgu_css_dequeue_data(struct imgu_css *css, int queue, u32 *data) +{ + static const unsigned int sp; + void __iomem *const base = css->base; + struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[sp]]; + struct imgu_abi_queues __iomem *q = base + IMGU_REG_SP_DMEM_BASE(sp) + + bi->info.sp.host_sp_queue; + u8 size, start, end, start2; + + if (queue >= 0) { + size = readb(&q->sp2host_bufq_info[queue].size); + start = readb(&q->sp2host_bufq_info[queue].start); + end = readb(&q->sp2host_bufq_info[queue].end); + } else { + size = readb(&q->sp2host_evtq_info.size); + start = readb(&q->sp2host_evtq_info.start); + end = readb(&q->sp2host_evtq_info.end); + } + + if (size == 0) + return -EIO; + + if (end == start) + return -EBUSY; /* Queue empty */ + + start2 = (start + 1) % size; + + if (queue >= 0) { + *data = readl(&q->sp2host_bufq[queue][start]); + writeb(start2, &q->sp2host_bufq_info[queue].start); + } else { + int r; + + *data = readl(&q->sp2host_evtq[start]); + writeb(start2, &q->sp2host_evtq_info.start); + + /* Acknowledge events dequeued from event queue */ + r = imgu_css_queue_data(css, queue, 0, + IMGU_ABI_EVENT_EVENT_DEQUEUED); + if (r < 0) + return r; + } + + return 0; +} + +/* Free binary-specific resources */ +static void imgu_css_binary_cleanup(struct imgu_css *css, unsigned int pipe) +{ + struct imgu_device *imgu = dev_get_drvdata(css->dev); + unsigned int i, j; + + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + for (j = 0; j < IMGU_ABI_PARAM_CLASS_NUM - 1; j++) + for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) + imgu_dmamap_free(imgu, + &css_pipe->binary_params_cs[j][i]); + + j = IPU3_CSS_AUX_FRAME_REF; + for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) + imgu_dmamap_free(imgu, + &css_pipe->aux_frames[j].mem[i]); + + j = IPU3_CSS_AUX_FRAME_TNR; + for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) + imgu_dmamap_free(imgu, + &css_pipe->aux_frames[j].mem[i]); +} + +static int imgu_css_binary_preallocate(struct imgu_css *css, unsigned int pipe) +{ + struct imgu_device *imgu = dev_get_drvdata(css->dev); + unsigned int i, j; + + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + for (j = IMGU_ABI_PARAM_CLASS_CONFIG; + j < IMGU_ABI_PARAM_CLASS_NUM; j++) + for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) + if (!imgu_dmamap_alloc(imgu, + &css_pipe->binary_params_cs[j - 1][i], + CSS_ABI_SIZE)) + goto out_of_memory; + + for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) + if (!imgu_dmamap_alloc(imgu, + &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF]. + mem[i], CSS_BDS_SIZE)) + goto out_of_memory; + + for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) + if (!imgu_dmamap_alloc(imgu, + &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR]. + mem[i], CSS_GDC_SIZE)) + goto out_of_memory; + + return 0; + +out_of_memory: + imgu_css_binary_cleanup(css, pipe); + return -ENOMEM; +} + +/* allocate binary-specific resources */ +static int imgu_css_binary_setup(struct imgu_css *css, unsigned int pipe) +{ + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + struct imgu_fw_info *bi = &css->fwp->binary_header[css_pipe->bindex]; + struct imgu_device *imgu = dev_get_drvdata(css->dev); + int i, j, size; + static const int BYPC = 2; /* Bytes per component */ + unsigned int w, h; + + /* Allocate parameter memory blocks for this binary */ + + for (j = IMGU_ABI_PARAM_CLASS_CONFIG; j < IMGU_ABI_PARAM_CLASS_NUM; j++) + for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) { + if (imgu_css_dma_buffer_resize( + imgu, + &css_pipe->binary_params_cs[j - 1][i], + bi->info.isp.sp.mem_initializers.params[j][i].size)) + goto out_of_memory; + } + + /* Allocate internal frame buffers */ + + /* Reference frames for DVS, FRAME_FORMAT_YUV420_16 */ + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].bytesperpixel = BYPC; + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].width = + css_pipe->rect[IPU3_CSS_RECT_BDS].width; + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].height = + ALIGN(css_pipe->rect[IPU3_CSS_RECT_BDS].height, + IMGU_DVS_BLOCK_H) + 2 * IMGU_GDC_BUF_Y; + h = css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].height; + w = ALIGN(css_pipe->rect[IPU3_CSS_RECT_BDS].width, + 2 * IPU3_UAPI_ISP_VEC_ELEMS) + 2 * IMGU_GDC_BUF_X; + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].bytesperline = + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].bytesperpixel * w; + size = w * h * BYPC + (w / 2) * (h / 2) * BYPC * 2; + for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) + if (imgu_css_dma_buffer_resize( + imgu, + &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].mem[i], + size)) + goto out_of_memory; + + /* TNR frames for temporal noise reduction, FRAME_FORMAT_YUV_LINE */ + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].bytesperpixel = 1; + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].width = + roundup(css_pipe->rect[IPU3_CSS_RECT_GDC].width, + bi->info.isp.sp.block.block_width * + IPU3_UAPI_ISP_VEC_ELEMS); + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].height = + roundup(css_pipe->rect[IPU3_CSS_RECT_GDC].height, + bi->info.isp.sp.block.output_block_height); + + w = css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].width; + css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].bytesperline = w; + h = css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].height; + size = w * ALIGN(h * 3 / 2 + 3, 2); /* +3 for vf_pp prefetch */ + for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) + if (imgu_css_dma_buffer_resize( + imgu, + &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].mem[i], + size)) + goto out_of_memory; + + return 0; + +out_of_memory: + imgu_css_binary_cleanup(css, pipe); + return -ENOMEM; +} + +int imgu_css_start_streaming(struct imgu_css *css) +{ + u32 data; + int r, pipe; + + if (css->streaming) + return -EPROTO; + + for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { + r = imgu_css_binary_setup(css, pipe); + if (r < 0) + return r; + } + + r = imgu_css_hw_init(css); + if (r < 0) + return r; + + r = imgu_css_hw_start(css); + if (r < 0) + goto fail; + + for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { + r = imgu_css_pipeline_init(css, pipe); + if (r < 0) + goto fail; + } + + css->streaming = true; + + imgu_css_hw_enable_irq(css); + + /* Initialize parameters to default */ + for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { + r = imgu_css_set_parameters(css, pipe, NULL); + if (r < 0) + goto fail; + } + + while (!(r = imgu_css_dequeue_data(css, IMGU_ABI_QUEUE_A_ID, &data))) + ; + if (r != -EBUSY) + goto fail; + + while (!(r = imgu_css_dequeue_data(css, IMGU_ABI_QUEUE_B_ID, &data))) + ; + if (r != -EBUSY) + goto fail; + + for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { + r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, + IMGU_ABI_EVENT_START_STREAM | + pipe << 16); + if (r < 0) + goto fail; + } + + return 0; + +fail: + css->streaming = false; + imgu_css_hw_cleanup(css); + for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { + imgu_css_pipeline_cleanup(css, pipe); + imgu_css_binary_cleanup(css, pipe); + } + + return r; +} + +void imgu_css_stop_streaming(struct imgu_css *css) +{ + struct imgu_css_buffer *b, *b0; + int q, r, pipe; + + for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { + r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, + IMGU_ABI_EVENT_STOP_STREAM); + if (r < 0) + dev_warn(css->dev, "failed on stop stream event\n"); + } + + if (!css->streaming) + return; + + imgu_css_hw_stop(css); + + imgu_css_hw_cleanup(css); + + for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + imgu_css_pipeline_cleanup(css, pipe); + + spin_lock(&css_pipe->qlock); + for (q = 0; q < IPU3_CSS_QUEUES; q++) + list_for_each_entry_safe(b, b0, + &css_pipe->queue[q].bufs, + list) { + b->state = IPU3_CSS_BUFFER_FAILED; + list_del(&b->list); + } + spin_unlock(&css_pipe->qlock); + } + + css->streaming = false; +} + +bool imgu_css_pipe_queue_empty(struct imgu_css *css, unsigned int pipe) +{ + int q; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + spin_lock(&css_pipe->qlock); + for (q = 0; q < IPU3_CSS_QUEUES; q++) + if (!list_empty(&css_pipe->queue[q].bufs)) + break; + spin_unlock(&css_pipe->qlock); + return (q == IPU3_CSS_QUEUES); +} + +bool imgu_css_queue_empty(struct imgu_css *css) +{ + unsigned int pipe; + bool ret = 0; + + for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) + ret &= imgu_css_pipe_queue_empty(css, pipe); + + return ret; +} + +bool imgu_css_is_streaming(struct imgu_css *css) +{ + return css->streaming; +} + +static int imgu_css_map_init(struct imgu_css *css, unsigned int pipe) +{ + struct imgu_device *imgu = dev_get_drvdata(css->dev); + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + unsigned int p, q, i; + + /* Allocate and map common structures with imgu hardware */ + for (p = 0; p < IPU3_CSS_PIPE_ID_NUM; p++) + for (i = 0; i < IMGU_ABI_MAX_STAGES; i++) { + if (!imgu_dmamap_alloc(imgu, + &css_pipe-> + xmem_sp_stage_ptrs[p][i], + sizeof(struct imgu_abi_sp_stage))) + return -ENOMEM; + if (!imgu_dmamap_alloc(imgu, + &css_pipe-> + xmem_isp_stage_ptrs[p][i], + sizeof(struct imgu_abi_isp_stage))) + return -ENOMEM; + } + + if (!imgu_dmamap_alloc(imgu, &css_pipe->sp_ddr_ptrs, + ALIGN(sizeof(struct imgu_abi_ddr_address_map), + IMGU_ABI_ISP_DDR_WORD_BYTES))) + return -ENOMEM; + + for (q = 0; q < IPU3_CSS_QUEUES; q++) { + unsigned int abi_buf_num = ARRAY_SIZE(css_pipe->abi_buffers[q]); + + for (i = 0; i < abi_buf_num; i++) + if (!imgu_dmamap_alloc(imgu, + &css_pipe->abi_buffers[q][i], + sizeof(struct imgu_abi_buffer))) + return -ENOMEM; + } + + if (imgu_css_binary_preallocate(css, pipe)) { + imgu_css_binary_cleanup(css, pipe); + return -ENOMEM; + } + + return 0; +} + +static void imgu_css_pipe_cleanup(struct imgu_css *css, unsigned int pipe) +{ + struct imgu_device *imgu = dev_get_drvdata(css->dev); + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + unsigned int p, q, i, abi_buf_num; + + imgu_css_binary_cleanup(css, pipe); + + for (q = 0; q < IPU3_CSS_QUEUES; q++) { + abi_buf_num = ARRAY_SIZE(css_pipe->abi_buffers[q]); + for (i = 0; i < abi_buf_num; i++) + imgu_dmamap_free(imgu, &css_pipe->abi_buffers[q][i]); + } + + for (p = 0; p < IPU3_CSS_PIPE_ID_NUM; p++) + for (i = 0; i < IMGU_ABI_MAX_STAGES; i++) { + imgu_dmamap_free(imgu, + &css_pipe->xmem_sp_stage_ptrs[p][i]); + imgu_dmamap_free(imgu, + &css_pipe->xmem_isp_stage_ptrs[p][i]); + } + + imgu_dmamap_free(imgu, &css_pipe->sp_ddr_ptrs); +} + +void imgu_css_cleanup(struct imgu_css *css) +{ + struct imgu_device *imgu = dev_get_drvdata(css->dev); + unsigned int pipe; + + imgu_css_stop_streaming(css); + for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) + imgu_css_pipe_cleanup(css, pipe); + imgu_dmamap_free(imgu, &css->xmem_sp_group_ptrs); + imgu_css_fw_cleanup(css); +} + +int imgu_css_init(struct device *dev, struct imgu_css *css, + void __iomem *base, int length) +{ + struct imgu_device *imgu = dev_get_drvdata(dev); + int r, q, pipe; + + /* Initialize main data structure */ + css->dev = dev; + css->base = base; + css->iomem_length = length; + + for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) { + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + css_pipe->vf_output_en = false; + spin_lock_init(&css_pipe->qlock); + css_pipe->bindex = IPU3_CSS_DEFAULT_BINARY; + css_pipe->pipe_id = IPU3_CSS_PIPE_ID_VIDEO; + for (q = 0; q < IPU3_CSS_QUEUES; q++) { + r = imgu_css_queue_init(&css_pipe->queue[q], NULL, 0); + if (r) + return r; + } + r = imgu_css_map_init(css, pipe); + if (r) { + imgu_css_cleanup(css); + return r; + } + } + if (!imgu_dmamap_alloc(imgu, &css->xmem_sp_group_ptrs, + sizeof(struct imgu_abi_sp_group))) + return -ENOMEM; + + r = imgu_css_fw_init(css); + if (r) + return r; + + return 0; +} + +static u32 imgu_css_adjust(u32 res, u32 align) +{ + u32 val = max_t(u32, IPU3_CSS_MIN_RES, res); + + return DIV_ROUND_CLOSEST(val, align) * align; +} + +/* Select a binary matching the required resolutions and formats */ +static int imgu_css_find_binary(struct imgu_css *css, + unsigned int pipe, + struct imgu_css_queue queue[IPU3_CSS_QUEUES], + struct v4l2_rect rects[IPU3_CSS_RECTS]) +{ + const int binary_nr = css->fwp->file_header.binary_nr; + unsigned int binary_mode = + (css->pipes[pipe].pipe_id == IPU3_CSS_PIPE_ID_CAPTURE) ? + IA_CSS_BINARY_MODE_PRIMARY : IA_CSS_BINARY_MODE_VIDEO; + const struct v4l2_pix_format_mplane *in = + &queue[IPU3_CSS_QUEUE_IN].fmt.mpix; + const struct v4l2_pix_format_mplane *out = + &queue[IPU3_CSS_QUEUE_OUT].fmt.mpix; + const struct v4l2_pix_format_mplane *vf = + &queue[IPU3_CSS_QUEUE_VF].fmt.mpix; + u32 stripe_w = 0, stripe_h = 0; + const char *name; + int i, j; + + if (!imgu_css_queue_enabled(&queue[IPU3_CSS_QUEUE_IN])) + return -EINVAL; + + /* Find out the strip size boundary */ + for (i = 0; i < binary_nr; i++) { + struct imgu_fw_info *bi = &css->fwp->binary_header[i]; + + u32 max_width = bi->info.isp.sp.output.max_width; + u32 max_height = bi->info.isp.sp.output.max_height; + + if (bi->info.isp.sp.iterator.num_stripes <= 1) { + stripe_w = stripe_w ? + min(stripe_w, max_width) : max_width; + stripe_h = stripe_h ? + min(stripe_h, max_height) : max_height; + } + } + + for (i = 0; i < binary_nr; i++) { + struct imgu_fw_info *bi = &css->fwp->binary_header[i]; + enum imgu_abi_frame_format q_fmt; + + name = (void *)css->fwp + bi->blob.prog_name_offset; + + /* Check that binary supports memory-to-memory processing */ + if (bi->info.isp.sp.input.source != + IMGU_ABI_BINARY_INPUT_SOURCE_MEMORY) + continue; + + /* Check that binary supports raw10 input */ + if (!bi->info.isp.sp.enable.input_feeder && + !bi->info.isp.sp.enable.input_raw) + continue; + + /* Check binary mode */ + if (bi->info.isp.sp.pipeline.mode != binary_mode) + continue; + + /* Since input is RGGB bayer, need to process colors */ + if (bi->info.isp.sp.enable.luma_only) + continue; + + if (in->width < bi->info.isp.sp.input.min_width || + in->width > bi->info.isp.sp.input.max_width || + in->height < bi->info.isp.sp.input.min_height || + in->height > bi->info.isp.sp.input.max_height) + continue; + + if (imgu_css_queue_enabled(&queue[IPU3_CSS_QUEUE_OUT])) { + if (bi->info.isp.num_output_pins <= 0) + continue; + + q_fmt = queue[IPU3_CSS_QUEUE_OUT].css_fmt->frame_format; + for (j = 0; j < bi->info.isp.num_output_formats; j++) + if (bi->info.isp.output_formats[j] == q_fmt) + break; + if (j >= bi->info.isp.num_output_formats) + continue; + + if (out->width < bi->info.isp.sp.output.min_width || + out->width > bi->info.isp.sp.output.max_width || + out->height < bi->info.isp.sp.output.min_height || + out->height > bi->info.isp.sp.output.max_height) + continue; + + if (out->width > bi->info.isp.sp.internal.max_width || + out->height > bi->info.isp.sp.internal.max_height) + continue; + } + + if (imgu_css_queue_enabled(&queue[IPU3_CSS_QUEUE_VF])) { + if (bi->info.isp.num_output_pins <= 1) + continue; + + q_fmt = queue[IPU3_CSS_QUEUE_VF].css_fmt->frame_format; + for (j = 0; j < bi->info.isp.num_output_formats; j++) + if (bi->info.isp.output_formats[j] == q_fmt) + break; + if (j >= bi->info.isp.num_output_formats) + continue; + + if (vf->width < bi->info.isp.sp.output.min_width || + vf->width > bi->info.isp.sp.output.max_width || + vf->height < bi->info.isp.sp.output.min_height || + vf->height > bi->info.isp.sp.output.max_height) + continue; + } + + /* All checks passed, select the binary */ + dev_dbg(css->dev, "using binary %s id = %u\n", name, + bi->info.isp.sp.id); + return i; + } + + /* Can not find suitable binary for these parameters */ + return -EINVAL; +} + +/* + * Check that there is a binary matching requirements. Parameters may be + * NULL indicating disabled input/output. Return negative if given + * parameters can not be supported or on error, zero or positive indicating + * found binary number. May modify the given parameters if not exact match + * is found. + */ +int imgu_css_fmt_try(struct imgu_css *css, + struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], + struct v4l2_rect *rects[IPU3_CSS_RECTS], + unsigned int pipe) +{ + static const u32 EFF_ALIGN_W = 2; + static const u32 BDS_ALIGN_W = 4; + static const u32 OUT_ALIGN_W = 8; + static const u32 OUT_ALIGN_H = 4; + static const u32 VF_ALIGN_W = 2; + static const char *qnames[IPU3_CSS_QUEUES] = { + [IPU3_CSS_QUEUE_IN] = "in", + [IPU3_CSS_QUEUE_PARAMS] = "params", + [IPU3_CSS_QUEUE_OUT] = "out", + [IPU3_CSS_QUEUE_VF] = "vf", + [IPU3_CSS_QUEUE_STAT_3A] = "3a", + }; + static const char *rnames[IPU3_CSS_RECTS] = { + [IPU3_CSS_RECT_EFFECTIVE] = "effective resolution", + [IPU3_CSS_RECT_BDS] = "bayer-domain scaled resolution", + [IPU3_CSS_RECT_ENVELOPE] = "DVS envelope size", + [IPU3_CSS_RECT_GDC] = "GDC output res", + }; + struct v4l2_rect r[IPU3_CSS_RECTS] = { }; + struct v4l2_rect *const eff = &r[IPU3_CSS_RECT_EFFECTIVE]; + struct v4l2_rect *const bds = &r[IPU3_CSS_RECT_BDS]; + struct v4l2_rect *const env = &r[IPU3_CSS_RECT_ENVELOPE]; + struct v4l2_rect *const gdc = &r[IPU3_CSS_RECT_GDC]; + struct imgu_css_queue q[IPU3_CSS_QUEUES]; + struct v4l2_pix_format_mplane *const in = + &q[IPU3_CSS_QUEUE_IN].fmt.mpix; + struct v4l2_pix_format_mplane *const out = + &q[IPU3_CSS_QUEUE_OUT].fmt.mpix; + struct v4l2_pix_format_mplane *const vf = + &q[IPU3_CSS_QUEUE_VF].fmt.mpix; + int i, s, ret; + + /* Adjust all formats, get statistics buffer sizes and formats */ + for (i = 0; i < IPU3_CSS_QUEUES; i++) { + if (fmts[i]) + dev_dbg(css->dev, "%s %s: (%i,%i) fmt 0x%x\n", __func__, + qnames[i], fmts[i]->width, fmts[i]->height, + fmts[i]->pixelformat); + else + dev_dbg(css->dev, "%s %s: (not set)\n", __func__, + qnames[i]); + if (imgu_css_queue_init(&q[i], fmts[i], + IPU3_CSS_QUEUE_TO_FLAGS(i))) { + dev_notice(css->dev, "can not initialize queue %s\n", + qnames[i]); + return -EINVAL; + } + } + for (i = 0; i < IPU3_CSS_RECTS; i++) { + if (rects[i]) { + dev_dbg(css->dev, "%s %s: (%i,%i)\n", __func__, + rnames[i], rects[i]->width, rects[i]->height); + r[i].width = rects[i]->width; + r[i].height = rects[i]->height; + } else { + dev_dbg(css->dev, "%s %s: (not set)\n", __func__, + rnames[i]); + } + /* For now, force known good resolutions */ + r[i].left = 0; + r[i].top = 0; + } + + /* Always require one input and vf only if out is also enabled */ + if (!imgu_css_queue_enabled(&q[IPU3_CSS_QUEUE_IN]) || + !imgu_css_queue_enabled(&q[IPU3_CSS_QUEUE_OUT])) { + dev_warn(css->dev, "required queues are disabled\n"); + return -EINVAL; + } + + if (!imgu_css_queue_enabled(&q[IPU3_CSS_QUEUE_OUT])) { + out->width = in->width; + out->height = in->height; + } + if (eff->width <= 0 || eff->height <= 0) { + eff->width = in->width; + eff->height = in->height; + } + if (bds->width <= 0 || bds->height <= 0) { + bds->width = out->width; + bds->height = out->height; + } + if (gdc->width <= 0 || gdc->height <= 0) { + gdc->width = out->width; + gdc->height = out->height; + } + + in->width = imgu_css_adjust(in->width, 1); + in->height = imgu_css_adjust(in->height, 1); + eff->width = imgu_css_adjust(eff->width, EFF_ALIGN_W); + eff->height = imgu_css_adjust(eff->height, 1); + bds->width = imgu_css_adjust(bds->width, BDS_ALIGN_W); + bds->height = imgu_css_adjust(bds->height, 1); + gdc->width = imgu_css_adjust(gdc->width, OUT_ALIGN_W); + gdc->height = imgu_css_adjust(gdc->height, OUT_ALIGN_H); + out->width = imgu_css_adjust(out->width, OUT_ALIGN_W); + out->height = imgu_css_adjust(out->height, OUT_ALIGN_H); + vf->width = imgu_css_adjust(vf->width, VF_ALIGN_W); + vf->height = imgu_css_adjust(vf->height, 1); + + s = (bds->width - gdc->width) / 2 - FILTER_SIZE; + env->width = s < MIN_ENVELOPE ? MIN_ENVELOPE : s; + s = (bds->height - gdc->height) / 2 - FILTER_SIZE; + env->height = s < MIN_ENVELOPE ? MIN_ENVELOPE : s; + + ret = imgu_css_find_binary(css, pipe, q, r); + if (ret < 0) { + dev_err(css->dev, "failed to find suitable binary\n"); + return -EINVAL; + } + css->pipes[pipe].bindex = ret; + + dev_dbg(css->dev, "Binary index %d for pipe %d found.", + css->pipes[pipe].bindex, pipe); + + /* Final adjustment and set back the queried formats */ + for (i = 0; i < IPU3_CSS_QUEUES; i++) { + if (fmts[i]) { + if (imgu_css_queue_init(&q[i], &q[i].fmt.mpix, + IPU3_CSS_QUEUE_TO_FLAGS(i))) { + dev_err(css->dev, + "final resolution adjustment failed\n"); + return -EINVAL; + } + *fmts[i] = q[i].fmt.mpix; + } + } + + for (i = 0; i < IPU3_CSS_RECTS; i++) + if (rects[i]) + *rects[i] = r[i]; + + dev_dbg(css->dev, + "in(%u,%u) if(%u,%u) ds(%u,%u) gdc(%u,%u) out(%u,%u) vf(%u,%u)", + in->width, in->height, eff->width, eff->height, + bds->width, bds->height, gdc->width, gdc->height, + out->width, out->height, vf->width, vf->height); + + return 0; +} + +int imgu_css_fmt_set(struct imgu_css *css, + struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], + struct v4l2_rect *rects[IPU3_CSS_RECTS], + unsigned int pipe) +{ + struct v4l2_rect rect_data[IPU3_CSS_RECTS]; + struct v4l2_rect *all_rects[IPU3_CSS_RECTS]; + int i, r; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + for (i = 0; i < IPU3_CSS_RECTS; i++) { + if (rects[i]) + rect_data[i] = *rects[i]; + else + memset(&rect_data[i], 0, sizeof(rect_data[i])); + all_rects[i] = &rect_data[i]; + } + r = imgu_css_fmt_try(css, fmts, all_rects, pipe); + if (r < 0) + return r; + + for (i = 0; i < IPU3_CSS_QUEUES; i++) + if (imgu_css_queue_init(&css_pipe->queue[i], fmts[i], + IPU3_CSS_QUEUE_TO_FLAGS(i))) + return -EINVAL; + for (i = 0; i < IPU3_CSS_RECTS; i++) { + css_pipe->rect[i] = rect_data[i]; + if (rects[i]) + *rects[i] = rect_data[i]; + } + + return 0; +} + +int imgu_css_meta_fmt_set(struct v4l2_meta_format *fmt) +{ + switch (fmt->dataformat) { + case V4L2_META_FMT_IPU3_PARAMS: + fmt->buffersize = sizeof(struct ipu3_uapi_params); + break; + case V4L2_META_FMT_IPU3_STAT_3A: + fmt->buffersize = sizeof(struct ipu3_uapi_stats_3a); + break; + default: + return -EINVAL; + } + + return 0; +} + +/* + * Queue given buffer to CSS. imgu_css_buf_prepare() must have been first + * called for the buffer. May be called from interrupt context. + * Returns 0 on success, -EBUSY if the buffer queue is full, or some other + * code on error conditions. + */ +int imgu_css_buf_queue(struct imgu_css *css, unsigned int pipe, + struct imgu_css_buffer *b) +{ + struct imgu_abi_buffer *abi_buf; + struct imgu_addr_t *buf_addr; + u32 data; + int r; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + + if (!css->streaming) + return -EPROTO; /* CSS or buffer in wrong state */ + + if (b->queue >= IPU3_CSS_QUEUES || !imgu_css_queues[b->queue].qid) + return -EINVAL; + + b->queue_pos = imgu_css_queue_pos(css, imgu_css_queues[b->queue].qid, + pipe); + + if (b->queue_pos >= ARRAY_SIZE(css->pipes[pipe].abi_buffers[b->queue])) + return -EIO; + abi_buf = css->pipes[pipe].abi_buffers[b->queue][b->queue_pos].vaddr; + + /* Fill struct abi_buffer for firmware */ + memset(abi_buf, 0, sizeof(*abi_buf)); + + buf_addr = (void *)abi_buf + imgu_css_queues[b->queue].ptr_ofs; + *(imgu_addr_t *)buf_addr = b->daddr; + + if (b->queue == IPU3_CSS_QUEUE_STAT_3A) + abi_buf->payload.s3a.data.dmem.s3a_tbl = b->daddr; + + if (b->queue == IPU3_CSS_QUEUE_OUT) + abi_buf->payload.frame.padded_width = + css_pipe->queue[IPU3_CSS_QUEUE_OUT].width_pad; + + if (b->queue == IPU3_CSS_QUEUE_VF) + abi_buf->payload.frame.padded_width = + css_pipe->queue[IPU3_CSS_QUEUE_VF].width_pad; + + spin_lock(&css_pipe->qlock); + list_add_tail(&b->list, &css_pipe->queue[b->queue].bufs); + spin_unlock(&css_pipe->qlock); + b->state = IPU3_CSS_BUFFER_QUEUED; + + data = css->pipes[pipe].abi_buffers[b->queue][b->queue_pos].daddr; + r = imgu_css_queue_data(css, imgu_css_queues[b->queue].qid, + pipe, data); + if (r < 0) + goto queueing_failed; + + data = IMGU_ABI_EVENT_BUFFER_ENQUEUED(pipe, + imgu_css_queues[b->queue].qid); + r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, data); + if (r < 0) + goto queueing_failed; + + dev_dbg(css->dev, "queued buffer %p to css queue %i in pipe %d\n", + b, b->queue, pipe); + + return 0; + +queueing_failed: + b->state = (r == -EBUSY || r == -EAGAIN) ? + IPU3_CSS_BUFFER_NEW : IPU3_CSS_BUFFER_FAILED; + list_del(&b->list); + + return r; +} + +/* + * Get next ready CSS buffer. Returns -EAGAIN in which case the function + * should be called again, or -EBUSY which means that there are no more + * buffers available. May be called from interrupt context. + */ +struct imgu_css_buffer *imgu_css_buf_dequeue(struct imgu_css *css) +{ + static const unsigned char evtype_to_queue[] = { + [IMGU_ABI_EVTTYPE_INPUT_FRAME_DONE] = IPU3_CSS_QUEUE_IN, + [IMGU_ABI_EVTTYPE_OUT_FRAME_DONE] = IPU3_CSS_QUEUE_OUT, + [IMGU_ABI_EVTTYPE_VF_OUT_FRAME_DONE] = IPU3_CSS_QUEUE_VF, + [IMGU_ABI_EVTTYPE_3A_STATS_DONE] = IPU3_CSS_QUEUE_STAT_3A, + }; + struct imgu_css_buffer *b = ERR_PTR(-EAGAIN); + u32 event, daddr; + int evtype, pipe, pipeid, queue, qid, r; + struct imgu_css_pipe *css_pipe; + + if (!css->streaming) + return ERR_PTR(-EPROTO); + + r = imgu_css_dequeue_data(css, IMGU_ABI_QUEUE_EVENT_ID, &event); + if (r < 0) + return ERR_PTR(r); + + evtype = (event & IMGU_ABI_EVTTYPE_EVENT_MASK) >> + IMGU_ABI_EVTTYPE_EVENT_SHIFT; + + switch (evtype) { + case IMGU_ABI_EVTTYPE_OUT_FRAME_DONE: + case IMGU_ABI_EVTTYPE_VF_OUT_FRAME_DONE: + case IMGU_ABI_EVTTYPE_3A_STATS_DONE: + case IMGU_ABI_EVTTYPE_INPUT_FRAME_DONE: + pipe = (event & IMGU_ABI_EVTTYPE_PIPE_MASK) >> + IMGU_ABI_EVTTYPE_PIPE_SHIFT; + pipeid = (event & IMGU_ABI_EVTTYPE_PIPEID_MASK) >> + IMGU_ABI_EVTTYPE_PIPEID_SHIFT; + queue = evtype_to_queue[evtype]; + qid = imgu_css_queues[queue].qid; + + if (pipe >= IMGU_MAX_PIPE_NUM) { + dev_err(css->dev, "Invalid pipe: %i\n", pipe); + return ERR_PTR(-EIO); + } + + if (qid >= IMGU_ABI_QUEUE_NUM) { + dev_err(css->dev, "Invalid qid: %i\n", qid); + return ERR_PTR(-EIO); + } + css_pipe = &css->pipes[pipe]; + dev_dbg(css->dev, + "event: buffer done 0x%x queue %i pipe %i pipeid %i\n", + event, queue, pipe, pipeid); + + r = imgu_css_dequeue_data(css, qid, &daddr); + if (r < 0) { + dev_err(css->dev, "failed to dequeue buffer\n"); + /* Force real error, not -EBUSY */ + return ERR_PTR(-EIO); + } + + r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, + IMGU_ABI_EVENT_BUFFER_DEQUEUED(qid)); + if (r < 0) { + dev_err(css->dev, "failed to queue event\n"); + return ERR_PTR(-EIO); + } + + spin_lock(&css_pipe->qlock); + if (list_empty(&css_pipe->queue[queue].bufs)) { + spin_unlock(&css_pipe->qlock); + dev_err(css->dev, "event on empty queue\n"); + return ERR_PTR(-EIO); + } + b = list_first_entry(&css_pipe->queue[queue].bufs, + struct imgu_css_buffer, list); + if (queue != b->queue || + daddr != css_pipe->abi_buffers + [b->queue][b->queue_pos].daddr) { + spin_unlock(&css_pipe->qlock); + dev_err(css->dev, "dequeued bad buffer 0x%x\n", daddr); + return ERR_PTR(-EIO); + } + + dev_dbg(css->dev, "buffer 0x%8x done from pipe %d\n", daddr, pipe); + b->pipe = pipe; + b->state = IPU3_CSS_BUFFER_DONE; + list_del(&b->list); + spin_unlock(&css_pipe->qlock); + break; + case IMGU_ABI_EVTTYPE_PIPELINE_DONE: + pipe = (event & IMGU_ABI_EVTTYPE_PIPE_MASK) >> + IMGU_ABI_EVTTYPE_PIPE_SHIFT; + if (pipe >= IMGU_MAX_PIPE_NUM) { + dev_err(css->dev, "Invalid pipe: %i\n", pipe); + return ERR_PTR(-EIO); + } + + css_pipe = &css->pipes[pipe]; + dev_dbg(css->dev, "event: pipeline done 0x%8x for pipe %d\n", + event, pipe); + break; + case IMGU_ABI_EVTTYPE_TIMER: + r = imgu_css_dequeue_data(css, IMGU_ABI_QUEUE_EVENT_ID, &event); + if (r < 0) + return ERR_PTR(r); + + if ((event & IMGU_ABI_EVTTYPE_EVENT_MASK) >> + IMGU_ABI_EVTTYPE_EVENT_SHIFT == IMGU_ABI_EVTTYPE_TIMER) + dev_dbg(css->dev, "event: timer\n"); + else + dev_warn(css->dev, "half of timer event missing\n"); + break; + case IMGU_ABI_EVTTYPE_FW_WARNING: + dev_warn(css->dev, "event: firmware warning 0x%x\n", event); + break; + case IMGU_ABI_EVTTYPE_FW_ASSERT: + dev_err(css->dev, + "event: firmware assert 0x%x module_id %i line_no %i\n", + event, + (event & IMGU_ABI_EVTTYPE_MODULEID_MASK) >> + IMGU_ABI_EVTTYPE_MODULEID_SHIFT, + swab16((event & IMGU_ABI_EVTTYPE_LINENO_MASK) >> + IMGU_ABI_EVTTYPE_LINENO_SHIFT)); + break; + default: + dev_warn(css->dev, "received unknown event 0x%x\n", event); + } + + return b; +} + +/* + * Get a new set of parameters from pool and initialize them based on + * the parameters params, gdc, and obgrid. Any of these may be NULL, + * in which case the previously set parameters are used. + * If parameters haven't been set previously, initialize from scratch. + * + * Return index to css->parameter_set_info which has the newly created + * parameters or negative value on error. + */ +int imgu_css_set_parameters(struct imgu_css *css, unsigned int pipe, + struct ipu3_uapi_params *set_params) +{ + static const unsigned int queue_id = IMGU_ABI_QUEUE_A_ID; + struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; + const int stage = 0; + const struct imgu_fw_info *bi; + int obgrid_size; + unsigned int stripes, i; + struct ipu3_uapi_flags *use = set_params ? &set_params->use : NULL; + + /* Destination buffers which are filled here */ + struct imgu_abi_parameter_set_info *param_set; + struct imgu_abi_acc_param *acc = NULL; + struct imgu_abi_gdc_warp_param *gdc = NULL; + struct ipu3_uapi_obgrid_param *obgrid = NULL; + const struct imgu_css_map *map; + void *vmem0 = NULL; + void *dmem0 = NULL; + + enum imgu_abi_memories m; + int r = -EBUSY; + + if (!css->streaming) + return -EPROTO; + + dev_dbg(css->dev, "%s for pipe %d", __func__, pipe); + + bi = &css->fwp->binary_header[css_pipe->bindex]; + obgrid_size = imgu_css_fw_obgrid_size(bi); + stripes = bi->info.isp.sp.iterator.num_stripes ? : 1; + + /* + * TODO(b/118782861): If userspace queues more than 4 buffers, the + * parameters from previous buffers will be overwritten. Fix the driver + * not to allow this. + */ + imgu_css_pool_get(&css_pipe->pool.parameter_set_info); + param_set = imgu_css_pool_last(&css_pipe->pool.parameter_set_info, + 0)->vaddr; + + /* Get a new acc only if new parameters given, or none yet */ + map = imgu_css_pool_last(&css_pipe->pool.acc, 0); + if (set_params || !map->vaddr) { + imgu_css_pool_get(&css_pipe->pool.acc); + map = imgu_css_pool_last(&css_pipe->pool.acc, 0); + acc = map->vaddr; + } + + /* Get new VMEM0 only if needed, or none yet */ + m = IMGU_ABI_MEM_ISP_VMEM0; + map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); + if (!map->vaddr || (set_params && (set_params->use.lin_vmem_params || + set_params->use.tnr3_vmem_params || + set_params->use.xnr3_vmem_params))) { + imgu_css_pool_get(&css_pipe->pool.binary_params_p[m]); + map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); + vmem0 = map->vaddr; + } + + /* Get new DMEM0 only if needed, or none yet */ + m = IMGU_ABI_MEM_ISP_DMEM0; + map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); + if (!map->vaddr || (set_params && (set_params->use.tnr3_dmem_params || + set_params->use.xnr3_dmem_params))) { + imgu_css_pool_get(&css_pipe->pool.binary_params_p[m]); + map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); + dmem0 = map->vaddr; + } + + /* Configure acc parameter cluster */ + if (acc) { + /* get acc_old */ + map = imgu_css_pool_last(&css_pipe->pool.acc, 1); + /* user acc */ + r = imgu_css_cfg_acc(css, pipe, use, acc, map->vaddr, + set_params ? &set_params->acc_param : NULL); + if (r < 0) + goto fail; + } + + /* Configure late binding parameters */ + if (vmem0) { + m = IMGU_ABI_MEM_ISP_VMEM0; + map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 1); + r = imgu_css_cfg_vmem0(css, pipe, use, vmem0, + map->vaddr, set_params); + if (r < 0) + goto fail; + } + + if (dmem0) { + m = IMGU_ABI_MEM_ISP_DMEM0; + map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 1); + r = imgu_css_cfg_dmem0(css, pipe, use, dmem0, + map->vaddr, set_params); + if (r < 0) + goto fail; + } + + /* Get a new gdc only if a new gdc is given, or none yet */ + if (bi->info.isp.sp.enable.dvs_6axis) { + unsigned int a = IPU3_CSS_AUX_FRAME_REF; + unsigned int g = IPU3_CSS_RECT_GDC; + unsigned int e = IPU3_CSS_RECT_ENVELOPE; + + map = imgu_css_pool_last(&css_pipe->pool.gdc, 0); + if (!map->vaddr) { + imgu_css_pool_get(&css_pipe->pool.gdc); + map = imgu_css_pool_last(&css_pipe->pool.gdc, 0); + gdc = map->vaddr; + imgu_css_cfg_gdc_table(map->vaddr, + css_pipe->aux_frames[a].bytesperline / + css_pipe->aux_frames[a].bytesperpixel, + css_pipe->aux_frames[a].height, + css_pipe->rect[g].width, + css_pipe->rect[g].height, + css_pipe->rect[e].width + FILTER_SIZE, + css_pipe->rect[e].height + + FILTER_SIZE); + } + } + + /* Get a new obgrid only if a new obgrid is given, or none yet */ + map = imgu_css_pool_last(&css_pipe->pool.obgrid, 0); + if (!map->vaddr || (set_params && set_params->use.obgrid_param)) { + imgu_css_pool_get(&css_pipe->pool.obgrid); + map = imgu_css_pool_last(&css_pipe->pool.obgrid, 0); + obgrid = map->vaddr; + + /* Configure optical black level grid (obgrid) */ + if (set_params && set_params->use.obgrid_param) + for (i = 0; i < obgrid_size / sizeof(*obgrid); i++) + obgrid[i] = set_params->obgrid_param; + else + memset(obgrid, 0, obgrid_size); + } + + /* Configure parameter set info, queued to `queue_id' */ + + memset(param_set, 0, sizeof(*param_set)); + map = imgu_css_pool_last(&css_pipe->pool.acc, 0); + param_set->mem_map.acc_cluster_params_for_sp = map->daddr; + + map = imgu_css_pool_last(&css_pipe->pool.gdc, 0); + param_set->mem_map.dvs_6axis_params_y = map->daddr; + + for (i = 0; i < stripes; i++) { + map = imgu_css_pool_last(&css_pipe->pool.obgrid, 0); + param_set->mem_map.obgrid_tbl[i] = + map->daddr + (obgrid_size / stripes) * i; + } + + for (m = 0; m < IMGU_ABI_NUM_MEMORIES; m++) { + map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); + param_set->mem_map.isp_mem_param[stage][m] = map->daddr; + } + + /* Then queue the new parameter buffer */ + map = imgu_css_pool_last(&css_pipe->pool.parameter_set_info, 0); + r = imgu_css_queue_data(css, queue_id, pipe, map->daddr); + if (r < 0) + goto fail; + + r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, + IMGU_ABI_EVENT_BUFFER_ENQUEUED(pipe, + queue_id)); + if (r < 0) + goto fail_no_put; + + /* Finally dequeue all old parameter buffers */ + + do { + u32 daddr; + + r = imgu_css_dequeue_data(css, queue_id, &daddr); + if (r == -EBUSY) + break; + if (r) + goto fail_no_put; + r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, + IMGU_ABI_EVENT_BUFFER_DEQUEUED + (queue_id)); + if (r < 0) { + dev_err(css->dev, "failed to queue parameter event\n"); + goto fail_no_put; + } + } while (1); + + return 0; + +fail: + /* + * A failure, most likely the parameter queue was full. + * Return error but continue streaming. User can try submitting new + * parameters again later. + */ + + imgu_css_pool_put(&css_pipe->pool.parameter_set_info); + if (acc) + imgu_css_pool_put(&css_pipe->pool.acc); + if (gdc) + imgu_css_pool_put(&css_pipe->pool.gdc); + if (obgrid) + imgu_css_pool_put(&css_pipe->pool.obgrid); + if (vmem0) + imgu_css_pool_put( + &css_pipe->pool.binary_params_p + [IMGU_ABI_MEM_ISP_VMEM0]); + if (dmem0) + imgu_css_pool_put( + &css_pipe->pool.binary_params_p + [IMGU_ABI_MEM_ISP_DMEM0]); + +fail_no_put: + return r; +} + +int imgu_css_irq_ack(struct imgu_css *css) +{ + static const int NUM_SWIRQS = 3; + struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[0]]; + void __iomem *const base = css->base; + u32 irq_status[IMGU_IRQCTRL_NUM]; + int i; + + u32 imgu_status = readl(base + IMGU_REG_INT_STATUS); + + writel(imgu_status, base + IMGU_REG_INT_STATUS); + for (i = 0; i < IMGU_IRQCTRL_NUM; i++) + irq_status[i] = readl(base + IMGU_REG_IRQCTRL_STATUS(i)); + + for (i = 0; i < NUM_SWIRQS; i++) { + if (irq_status[IMGU_IRQCTRL_SP0] & IMGU_IRQCTRL_IRQ_SW_PIN(i)) { + /* SP SW interrupt */ + u32 cnt = readl(base + IMGU_REG_SP_DMEM_BASE(0) + + bi->info.sp.output); + u32 val = readl(base + IMGU_REG_SP_DMEM_BASE(0) + + bi->info.sp.output + 4 + 4 * i); + + dev_dbg(css->dev, "%s: swirq %i cnt %i val 0x%x\n", + __func__, i, cnt, val); + } + } + + for (i = IMGU_IRQCTRL_NUM - 1; i >= 0; i--) + if (irq_status[i]) { + writel(irq_status[i], base + IMGU_REG_IRQCTRL_CLEAR(i)); + /* Wait for write to complete */ + readl(base + IMGU_REG_IRQCTRL_ENABLE(i)); + } + + dev_dbg(css->dev, "%s: imgu 0x%x main 0x%x sp0 0x%x sp1 0x%x\n", + __func__, imgu_status, irq_status[IMGU_IRQCTRL_MAIN], + irq_status[IMGU_IRQCTRL_SP0], irq_status[IMGU_IRQCTRL_SP1]); + + if (!imgu_status && !irq_status[IMGU_IRQCTRL_MAIN]) + return -ENOMSG; + + return 0; +} diff --git a/drivers/staging/media/ipu3/ipu3-css.h b/drivers/staging/media/ipu3/ipu3-css.h new file mode 100644 index 000000000000..6b8bab27ab1f --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-css.h @@ -0,0 +1,213 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018 Intel Corporation */ + +#ifndef __IPU3_CSS_H +#define __IPU3_CSS_H + +#include <linux/videodev2.h> +#include <linux/types.h> + +#include "ipu3-abi.h" +#include "ipu3-css-pool.h" + +/* 2 stages for split isp pipeline, 1 for scaling */ +#define IMGU_NUM_SP 2 +#define IMGU_MAX_PIPELINE_NUM 20 +#define IMGU_MAX_PIPE_NUM 2 + +/* For DVS etc., format FRAME_FMT_YUV420_16 */ +#define IPU3_CSS_AUX_FRAME_REF 0 +/* For temporal noise reduction DVS etc., format FRAME_FMT_YUV_LINE */ +#define IPU3_CSS_AUX_FRAME_TNR 1 +#define IPU3_CSS_AUX_FRAME_TYPES 2 /* REF and TNR */ +#define IPU3_CSS_AUX_FRAMES 2 /* 2 for REF and 2 for TNR */ + +#define IPU3_CSS_QUEUE_IN 0 +#define IPU3_CSS_QUEUE_PARAMS 1 +#define IPU3_CSS_QUEUE_OUT 2 +#define IPU3_CSS_QUEUE_VF 3 +#define IPU3_CSS_QUEUE_STAT_3A 4 +#define IPU3_CSS_QUEUES 5 + +#define IPU3_CSS_RECT_EFFECTIVE 0 /* Effective resolution */ +#define IPU3_CSS_RECT_BDS 1 /* Resolution after BDS */ +#define IPU3_CSS_RECT_ENVELOPE 2 /* DVS envelope size */ +#define IPU3_CSS_RECT_GDC 3 /* gdc output res */ +#define IPU3_CSS_RECTS 4 /* number of rects */ + +#define IA_CSS_BINARY_MODE_PRIMARY 2 +#define IA_CSS_BINARY_MODE_VIDEO 3 +#define IPU3_CSS_DEFAULT_BINARY 3 /* default binary index */ + +/* + * The pipe id type, distinguishes the kind of pipes that + * can be run in parallel. + */ +enum imgu_css_pipe_id { + IPU3_CSS_PIPE_ID_PREVIEW, + IPU3_CSS_PIPE_ID_COPY, + IPU3_CSS_PIPE_ID_VIDEO, + IPU3_CSS_PIPE_ID_CAPTURE, + IPU3_CSS_PIPE_ID_YUVPP, + IPU3_CSS_PIPE_ID_ACC, + IPU3_CSS_PIPE_ID_NUM +}; + +struct imgu_css_resolution { + u32 w; + u32 h; +}; + +enum imgu_css_buffer_state { + IPU3_CSS_BUFFER_NEW, /* Not yet queued */ + IPU3_CSS_BUFFER_QUEUED, /* Queued, waiting to be filled */ + IPU3_CSS_BUFFER_DONE, /* Finished processing, removed from queue */ + IPU3_CSS_BUFFER_FAILED, /* Was not processed, removed from queue */ +}; + +struct imgu_css_buffer { + /* Private fields: user doesn't touch */ + dma_addr_t daddr; + unsigned int queue; + enum imgu_css_buffer_state state; + struct list_head list; + u8 queue_pos; + unsigned int pipe; +}; + +struct imgu_css_format { + u32 pixelformat; + enum v4l2_colorspace colorspace; + enum imgu_abi_frame_format frame_format; + enum imgu_abi_bayer_order bayer_order; + enum imgu_abi_osys_format osys_format; + enum imgu_abi_osys_tiling osys_tiling; + u32 bytesperpixel_num; /* Bytes per pixel in first plane * 50 */ + u8 bit_depth; /* Effective bits per pixel */ + u8 chroma_decim; /* Chroma plane decimation, 0=no chroma plane */ + u8 width_align; /* Alignment requirement for width_pad */ + u8 flags; +}; + +struct imgu_css_queue { + union { + struct v4l2_pix_format_mplane mpix; + struct v4l2_meta_format meta; + + } fmt; + const struct imgu_css_format *css_fmt; + unsigned int width_pad; + struct list_head bufs; +}; + +struct imgu_css_pipe { + enum imgu_css_pipe_id pipe_id; + unsigned int bindex; + + struct imgu_css_queue queue[IPU3_CSS_QUEUES]; + struct v4l2_rect rect[IPU3_CSS_RECTS]; + + bool vf_output_en; + /* Protect access to queue[IPU3_CSS_QUEUES] */ + spinlock_t qlock; + + /* Data structures shared with IMGU and driver, always allocated */ + struct imgu_css_map sp_ddr_ptrs; + struct imgu_css_map xmem_sp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM] + [IMGU_ABI_MAX_STAGES]; + struct imgu_css_map xmem_isp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM] + [IMGU_ABI_MAX_STAGES]; + + /* + * Data structures shared with IMGU and driver, binary specific. + * PARAM_CLASS_CONFIG and PARAM_CLASS_STATE parameters. + */ + struct imgu_css_map binary_params_cs[IMGU_ABI_PARAM_CLASS_NUM - 1] + [IMGU_ABI_NUM_MEMORIES]; + + struct { + struct imgu_css_map mem[IPU3_CSS_AUX_FRAMES]; + unsigned int width; + unsigned int height; + unsigned int bytesperline; + unsigned int bytesperpixel; + } aux_frames[IPU3_CSS_AUX_FRAME_TYPES]; + + struct { + struct imgu_css_pool parameter_set_info; + struct imgu_css_pool acc; + struct imgu_css_pool gdc; + struct imgu_css_pool obgrid; + /* PARAM_CLASS_PARAM parameters for binding while streaming */ + struct imgu_css_pool binary_params_p[IMGU_ABI_NUM_MEMORIES]; + } pool; + + struct imgu_css_map abi_buffers[IPU3_CSS_QUEUES] + [IMGU_ABI_HOST2SP_BUFQ_SIZE]; +}; + +/* IPU3 Camera Sub System structure */ +struct imgu_css { + struct device *dev; + void __iomem *base; + const struct firmware *fw; + struct imgu_fw_header *fwp; + int iomem_length; + int fw_bl, fw_sp[IMGU_NUM_SP]; /* Indices of bl and SP binaries */ + struct imgu_css_map *binary; /* fw binaries mapped to device */ + bool streaming; /* true when streaming is enabled */ + + struct imgu_css_pipe pipes[IMGU_MAX_PIPE_NUM]; + struct imgu_css_map xmem_sp_group_ptrs; + + /* enabled pipe(s) */ + DECLARE_BITMAP(enabled_pipes, IMGU_MAX_PIPE_NUM); +}; + +/******************* css v4l *******************/ +int imgu_css_init(struct device *dev, struct imgu_css *css, + void __iomem *base, int length); +void imgu_css_cleanup(struct imgu_css *css); +int imgu_css_fmt_try(struct imgu_css *css, + struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], + struct v4l2_rect *rects[IPU3_CSS_RECTS], + unsigned int pipe); +int imgu_css_fmt_set(struct imgu_css *css, + struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], + struct v4l2_rect *rects[IPU3_CSS_RECTS], + unsigned int pipe); +int imgu_css_meta_fmt_set(struct v4l2_meta_format *fmt); +int imgu_css_buf_queue(struct imgu_css *css, unsigned int pipe, + struct imgu_css_buffer *b); +struct imgu_css_buffer *imgu_css_buf_dequeue(struct imgu_css *css); +int imgu_css_start_streaming(struct imgu_css *css); +void imgu_css_stop_streaming(struct imgu_css *css); +bool imgu_css_queue_empty(struct imgu_css *css); +bool imgu_css_is_streaming(struct imgu_css *css); +bool imgu_css_pipe_queue_empty(struct imgu_css *css, unsigned int pipe); + +/******************* css hw *******************/ +int imgu_css_set_powerup(struct device *dev, void __iomem *base); +void imgu_css_set_powerdown(struct device *dev, void __iomem *base); +int imgu_css_irq_ack(struct imgu_css *css); + +/******************* set parameters ************/ +int imgu_css_set_parameters(struct imgu_css *css, unsigned int pipe, + struct ipu3_uapi_params *set_params); + +/******************* auxiliary helpers *******************/ +static inline enum imgu_css_buffer_state +imgu_css_buf_state(struct imgu_css_buffer *b) +{ + return b->state; +} + +/* Initialize given buffer. May be called several times. */ +static inline void imgu_css_buf_init(struct imgu_css_buffer *b, + unsigned int queue, dma_addr_t daddr) +{ + b->state = IPU3_CSS_BUFFER_NEW; + b->queue = queue; + b->daddr = daddr; +} +#endif diff --git a/drivers/staging/media/ipu3/ipu3-dmamap.c b/drivers/staging/media/ipu3/ipu3-dmamap.c new file mode 100644 index 000000000000..d978a00e1e0b --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-dmamap.c @@ -0,0 +1,271 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 Intel Corporation + * Copyright 2018 Google LLC. + * + * Author: Tomasz Figa <tfiga@chromium.org> + * Author: Yong Zhi <yong.zhi@intel.com> + */ + +#include <linux/vmalloc.h> + +#include "ipu3.h" +#include "ipu3-css-pool.h" +#include "ipu3-mmu.h" +#include "ipu3-dmamap.h" + +/* + * Free a buffer allocated by imgu_dmamap_alloc_buffer() + */ +static void imgu_dmamap_free_buffer(struct page **pages, + size_t size) +{ + int count = size >> PAGE_SHIFT; + + while (count--) + __free_page(pages[count]); + kvfree(pages); +} + +/* + * Based on the implementation of __iommu_dma_alloc_pages() + * defined in drivers/iommu/dma-iommu.c + */ +static struct page **imgu_dmamap_alloc_buffer(size_t size, + unsigned long order_mask, + gfp_t gfp) +{ + struct page **pages; + unsigned int i = 0, count = size >> PAGE_SHIFT; + const gfp_t high_order_gfp = __GFP_NOWARN | __GFP_NORETRY; + + /* Allocate mem for array of page ptrs */ + pages = kvmalloc_array(count, sizeof(*pages), GFP_KERNEL); + + if (!pages) + return NULL; + + order_mask &= (2U << MAX_ORDER) - 1; + if (!order_mask) + return NULL; + + gfp |= __GFP_HIGHMEM | __GFP_ZERO; + + while (count) { + struct page *page = NULL; + unsigned int order_size; + + for (order_mask &= (2U << __fls(count)) - 1; + order_mask; order_mask &= ~order_size) { + unsigned int order = __fls(order_mask); + + order_size = 1U << order; + page = alloc_pages((order_mask - order_size) ? + gfp | high_order_gfp : gfp, order); + if (!page) + continue; + if (!order) + break; + if (!PageCompound(page)) { + split_page(page, order); + break; + } + + __free_pages(page, order); + } + if (!page) { + imgu_dmamap_free_buffer(pages, i << PAGE_SHIFT); + return NULL; + } + count -= order_size; + while (order_size--) + pages[i++] = page++; + } + + return pages; +} + +/** + * imgu_dmamap_alloc - allocate and map a buffer into KVA + * @imgu: struct device pointer + * @map: struct to store mapping variables + * @len: size required + * + * Returns: + * KVA on success + * %NULL on failure + */ +void *imgu_dmamap_alloc(struct imgu_device *imgu, struct imgu_css_map *map, + size_t len) +{ + unsigned long shift = iova_shift(&imgu->iova_domain); + unsigned int alloc_sizes = imgu->mmu->pgsize_bitmap; + struct device *dev = &imgu->pci_dev->dev; + size_t size = PAGE_ALIGN(len); + struct page **pages; + dma_addr_t iovaddr; + struct iova *iova; + int i, rval; + + dev_dbg(dev, "%s: allocating %zu\n", __func__, size); + + iova = alloc_iova(&imgu->iova_domain, size >> shift, + imgu->mmu->aperture_end >> shift, 0); + if (!iova) + return NULL; + + pages = imgu_dmamap_alloc_buffer(size, alloc_sizes >> PAGE_SHIFT, + GFP_KERNEL); + if (!pages) + goto out_free_iova; + + /* Call IOMMU driver to setup pgt */ + iovaddr = iova_dma_addr(&imgu->iova_domain, iova); + for (i = 0; i < size / PAGE_SIZE; ++i) { + rval = imgu_mmu_map(imgu->mmu, iovaddr, + page_to_phys(pages[i]), PAGE_SIZE); + if (rval) + goto out_unmap; + + iovaddr += PAGE_SIZE; + } + + /* Now grab a virtual region */ + map->vma = __get_vm_area(size, VM_USERMAP, VMALLOC_START, VMALLOC_END); + if (!map->vma) + goto out_unmap; + + map->vma->pages = pages; + /* And map it in KVA */ + if (map_vm_area(map->vma, PAGE_KERNEL, pages)) + goto out_vunmap; + + map->size = size; + map->daddr = iova_dma_addr(&imgu->iova_domain, iova); + map->vaddr = map->vma->addr; + + dev_dbg(dev, "%s: allocated %zu @ IOVA %pad @ VA %p\n", __func__, + size, &map->daddr, map->vma->addr); + + return map->vma->addr; + +out_vunmap: + vunmap(map->vma->addr); + +out_unmap: + imgu_dmamap_free_buffer(pages, size); + imgu_mmu_unmap(imgu->mmu, iova_dma_addr(&imgu->iova_domain, iova), + i * PAGE_SIZE); + map->vma = NULL; + +out_free_iova: + __free_iova(&imgu->iova_domain, iova); + + return NULL; +} + +void imgu_dmamap_unmap(struct imgu_device *imgu, struct imgu_css_map *map) +{ + struct iova *iova; + + iova = find_iova(&imgu->iova_domain, + iova_pfn(&imgu->iova_domain, map->daddr)); + if (WARN_ON(!iova)) + return; + + imgu_mmu_unmap(imgu->mmu, iova_dma_addr(&imgu->iova_domain, iova), + iova_size(iova) << iova_shift(&imgu->iova_domain)); + + __free_iova(&imgu->iova_domain, iova); +} + +/* + * Counterpart of imgu_dmamap_alloc + */ +void imgu_dmamap_free(struct imgu_device *imgu, struct imgu_css_map *map) +{ + struct vm_struct *area = map->vma; + + dev_dbg(&imgu->pci_dev->dev, "%s: freeing %zu @ IOVA %pad @ VA %p\n", + __func__, map->size, &map->daddr, map->vaddr); + + if (!map->vaddr) + return; + + imgu_dmamap_unmap(imgu, map); + + if (WARN_ON(!area) || WARN_ON(!area->pages)) + return; + + imgu_dmamap_free_buffer(area->pages, map->size); + vunmap(map->vaddr); + map->vaddr = NULL; +} + +int imgu_dmamap_map_sg(struct imgu_device *imgu, struct scatterlist *sglist, + int nents, struct imgu_css_map *map) +{ + unsigned long shift = iova_shift(&imgu->iova_domain); + struct scatterlist *sg; + struct iova *iova; + size_t size = 0; + int i; + + for_each_sg(sglist, sg, nents, i) { + if (sg->offset) + return -EINVAL; + + if (i != nents - 1 && !PAGE_ALIGNED(sg->length)) + return -EINVAL; + + size += sg->length; + } + + size = iova_align(&imgu->iova_domain, size); + dev_dbg(&imgu->pci_dev->dev, "dmamap: mapping sg %d entries, %zu pages\n", + nents, size >> shift); + + iova = alloc_iova(&imgu->iova_domain, size >> shift, + imgu->mmu->aperture_end >> shift, 0); + if (!iova) + return -ENOMEM; + + dev_dbg(&imgu->pci_dev->dev, "dmamap: iova low pfn %lu, high pfn %lu\n", + iova->pfn_lo, iova->pfn_hi); + + if (imgu_mmu_map_sg(imgu->mmu, iova_dma_addr(&imgu->iova_domain, iova), + sglist, nents) < size) + goto out_fail; + + memset(map, 0, sizeof(*map)); + map->daddr = iova_dma_addr(&imgu->iova_domain, iova); + map->size = size; + + return 0; + +out_fail: + __free_iova(&imgu->iova_domain, iova); + + return -EFAULT; +} + +int imgu_dmamap_init(struct imgu_device *imgu) +{ + unsigned long order, base_pfn; + int ret = iova_cache_get(); + + if (ret) + return ret; + + order = __ffs(imgu->mmu->pgsize_bitmap); + base_pfn = max_t(unsigned long, 1, imgu->mmu->aperture_start >> order); + init_iova_domain(&imgu->iova_domain, 1UL << order, base_pfn); + + return 0; +} + +void imgu_dmamap_exit(struct imgu_device *imgu) +{ + put_iova_domain(&imgu->iova_domain); + iova_cache_put(); +} diff --git a/drivers/staging/media/ipu3/ipu3-dmamap.h b/drivers/staging/media/ipu3/ipu3-dmamap.h new file mode 100644 index 000000000000..9db513b3d603 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-dmamap.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018 Intel Corporation */ +/* Copyright 2018 Google LLC. */ + +#ifndef __IPU3_DMAMAP_H +#define __IPU3_DMAMAP_H + +struct imgu_device; +struct scatterlist; + +void *imgu_dmamap_alloc(struct imgu_device *imgu, struct imgu_css_map *map, + size_t len); +void imgu_dmamap_free(struct imgu_device *imgu, struct imgu_css_map *map); + +int imgu_dmamap_map_sg(struct imgu_device *imgu, struct scatterlist *sglist, + int nents, struct imgu_css_map *map); +void imgu_dmamap_unmap(struct imgu_device *imgu, struct imgu_css_map *map); + +int imgu_dmamap_init(struct imgu_device *imgu); +void imgu_dmamap_exit(struct imgu_device *imgu); + +#endif diff --git a/drivers/staging/media/ipu3/ipu3-mmu.c b/drivers/staging/media/ipu3/ipu3-mmu.c new file mode 100644 index 000000000000..cfc2bdfb14b3 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-mmu.c @@ -0,0 +1,562 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 Intel Corporation. + * Copyright 2018 Google LLC. + * + * Author: Tuukka Toivonen <tuukka.toivonen@intel.com> + * Author: Sakari Ailus <sakari.ailus@linux.intel.com> + * Author: Samu Onkalo <samu.onkalo@intel.com> + * Author: Tomasz Figa <tfiga@chromium.org> + * + */ + +#include <linux/dma-mapping.h> +#include <linux/iopoll.h> +#include <linux/pm_runtime.h> +#include <linux/slab.h> +#include <linux/vmalloc.h> + +#include <asm/set_memory.h> + +#include "ipu3-mmu.h" + +#define IPU3_PAGE_SHIFT 12 +#define IPU3_PAGE_SIZE (1UL << IPU3_PAGE_SHIFT) + +#define IPU3_PT_BITS 10 +#define IPU3_PT_PTES (1UL << IPU3_PT_BITS) +#define IPU3_PT_SIZE (IPU3_PT_PTES << 2) +#define IPU3_PT_ORDER (IPU3_PT_SIZE >> PAGE_SHIFT) + +#define IPU3_ADDR2PTE(addr) ((addr) >> IPU3_PAGE_SHIFT) +#define IPU3_PTE2ADDR(pte) ((phys_addr_t)(pte) << IPU3_PAGE_SHIFT) + +#define IPU3_L2PT_SHIFT IPU3_PT_BITS +#define IPU3_L2PT_MASK ((1UL << IPU3_L2PT_SHIFT) - 1) + +#define IPU3_L1PT_SHIFT IPU3_PT_BITS +#define IPU3_L1PT_MASK ((1UL << IPU3_L1PT_SHIFT) - 1) + +#define IPU3_MMU_ADDRESS_BITS (IPU3_PAGE_SHIFT + \ + IPU3_L2PT_SHIFT + \ + IPU3_L1PT_SHIFT) + +#define IMGU_REG_BASE 0x4000 +#define REG_TLB_INVALIDATE (IMGU_REG_BASE + 0x300) +#define TLB_INVALIDATE 1 +#define REG_L1_PHYS (IMGU_REG_BASE + 0x304) /* 27-bit pfn */ +#define REG_GP_HALT (IMGU_REG_BASE + 0x5dc) +#define REG_GP_HALTED (IMGU_REG_BASE + 0x5e0) + +struct imgu_mmu { + struct device *dev; + void __iomem *base; + /* protect access to l2pts, l1pt */ + spinlock_t lock; + + void *dummy_page; + u32 dummy_page_pteval; + + u32 *dummy_l2pt; + u32 dummy_l2pt_pteval; + + u32 **l2pts; + u32 *l1pt; + + struct imgu_mmu_info geometry; +}; + +static inline struct imgu_mmu *to_imgu_mmu(struct imgu_mmu_info *info) +{ + return container_of(info, struct imgu_mmu, geometry); +} + +/** + * imgu_mmu_tlb_invalidate - invalidate translation look-aside buffer + * @mmu: MMU to perform the invalidate operation on + * + * This function invalidates the whole TLB. Must be called when the hardware + * is powered on. + */ +static void imgu_mmu_tlb_invalidate(struct imgu_mmu *mmu) +{ + writel(TLB_INVALIDATE, mmu->base + REG_TLB_INVALIDATE); +} + +static void call_if_imgu_is_powered(struct imgu_mmu *mmu, + void (*func)(struct imgu_mmu *mmu)) +{ + if (!pm_runtime_get_if_in_use(mmu->dev)) + return; + + func(mmu); + pm_runtime_put(mmu->dev); +} + +/** + * imgu_mmu_set_halt - set CIO gate halt bit + * @mmu: MMU to set the CIO gate bit in. + * @halt: Desired state of the gate bit. + * + * This function sets the CIO gate bit that controls whether external memory + * accesses are allowed. Must be called when the hardware is powered on. + */ +static void imgu_mmu_set_halt(struct imgu_mmu *mmu, bool halt) +{ + int ret; + u32 val; + + writel(halt, mmu->base + REG_GP_HALT); + ret = readl_poll_timeout(mmu->base + REG_GP_HALTED, + val, (val & 1) == halt, 1000, 100000); + + if (ret) + dev_err(mmu->dev, "failed to %s CIO gate halt\n", + halt ? "set" : "clear"); +} + +/** + * imgu_mmu_alloc_page_table - allocate a pre-filled page table + * @pteval: Value to initialize for page table entries with. + * + * Return: Pointer to allocated page table or NULL on failure. + */ +static u32 *imgu_mmu_alloc_page_table(u32 pteval) +{ + u32 *pt; + int pte; + + pt = (u32 *)__get_free_page(GFP_KERNEL); + if (!pt) + return NULL; + + for (pte = 0; pte < IPU3_PT_PTES; pte++) + pt[pte] = pteval; + + set_memory_uc((unsigned long int)pt, IPU3_PT_ORDER); + + return pt; +} + +/** + * imgu_mmu_free_page_table - free page table + * @pt: Page table to free. + */ +static void imgu_mmu_free_page_table(u32 *pt) +{ + set_memory_wb((unsigned long int)pt, IPU3_PT_ORDER); + free_page((unsigned long)pt); +} + +/** + * address_to_pte_idx - split IOVA into L1 and L2 page table indices + * @iova: IOVA to split. + * @l1pt_idx: Output for the L1 page table index. + * @l2pt_idx: Output for the L2 page index. + */ +static inline void address_to_pte_idx(unsigned long iova, u32 *l1pt_idx, + u32 *l2pt_idx) +{ + iova >>= IPU3_PAGE_SHIFT; + + if (l2pt_idx) + *l2pt_idx = iova & IPU3_L2PT_MASK; + + iova >>= IPU3_L2PT_SHIFT; + + if (l1pt_idx) + *l1pt_idx = iova & IPU3_L1PT_MASK; +} + +static u32 *imgu_mmu_get_l2pt(struct imgu_mmu *mmu, u32 l1pt_idx) +{ + unsigned long flags; + u32 *l2pt, *new_l2pt; + u32 pteval; + + spin_lock_irqsave(&mmu->lock, flags); + + l2pt = mmu->l2pts[l1pt_idx]; + if (l2pt) + goto done; + + spin_unlock_irqrestore(&mmu->lock, flags); + + new_l2pt = imgu_mmu_alloc_page_table(mmu->dummy_page_pteval); + if (!new_l2pt) + return NULL; + + spin_lock_irqsave(&mmu->lock, flags); + + dev_dbg(mmu->dev, "allocated page table %p for l1pt_idx %u\n", + new_l2pt, l1pt_idx); + + l2pt = mmu->l2pts[l1pt_idx]; + if (l2pt) { + imgu_mmu_free_page_table(new_l2pt); + goto done; + } + + l2pt = new_l2pt; + mmu->l2pts[l1pt_idx] = new_l2pt; + + pteval = IPU3_ADDR2PTE(virt_to_phys(new_l2pt)); + mmu->l1pt[l1pt_idx] = pteval; + +done: + spin_unlock_irqrestore(&mmu->lock, flags); + return l2pt; +} + +static int __imgu_mmu_map(struct imgu_mmu *mmu, unsigned long iova, + phys_addr_t paddr) +{ + u32 l1pt_idx, l2pt_idx; + unsigned long flags; + u32 *l2pt; + + if (!mmu) + return -ENODEV; + + address_to_pte_idx(iova, &l1pt_idx, &l2pt_idx); + + l2pt = imgu_mmu_get_l2pt(mmu, l1pt_idx); + if (!l2pt) + return -ENOMEM; + + spin_lock_irqsave(&mmu->lock, flags); + + if (l2pt[l2pt_idx] != mmu->dummy_page_pteval) { + spin_unlock_irqrestore(&mmu->lock, flags); + return -EBUSY; + } + + l2pt[l2pt_idx] = IPU3_ADDR2PTE(paddr); + + spin_unlock_irqrestore(&mmu->lock, flags); + + return 0; +} + +/* + * The following four functions are implemented based on iommu.c + * drivers/iommu/iommu.c/iommu_pgsize(). + */ +static size_t imgu_mmu_pgsize(unsigned long pgsize_bitmap, + unsigned long addr_merge, size_t size) +{ + unsigned int pgsize_idx; + size_t pgsize; + + /* Max page size that still fits into 'size' */ + pgsize_idx = __fls(size); + + /* need to consider alignment requirements ? */ + if (likely(addr_merge)) { + /* Max page size allowed by address */ + unsigned int align_pgsize_idx = __ffs(addr_merge); + + pgsize_idx = min(pgsize_idx, align_pgsize_idx); + } + + /* build a mask of acceptable page sizes */ + pgsize = (1UL << (pgsize_idx + 1)) - 1; + + /* throw away page sizes not supported by the hardware */ + pgsize &= pgsize_bitmap; + + /* make sure we're still sane */ + WARN_ON(!pgsize); + + /* pick the biggest page */ + pgsize_idx = __fls(pgsize); + pgsize = 1UL << pgsize_idx; + + return pgsize; +} + +/* drivers/iommu/iommu.c/iommu_map() */ +int imgu_mmu_map(struct imgu_mmu_info *info, unsigned long iova, + phys_addr_t paddr, size_t size) +{ + struct imgu_mmu *mmu = to_imgu_mmu(info); + unsigned int min_pagesz; + int ret = 0; + + /* find out the minimum page size supported */ + min_pagesz = 1 << __ffs(mmu->geometry.pgsize_bitmap); + + /* + * both the virtual address and the physical one, as well as + * the size of the mapping, must be aligned (at least) to the + * size of the smallest page supported by the hardware + */ + if (!IS_ALIGNED(iova | paddr | size, min_pagesz)) { + dev_err(mmu->dev, "unaligned: iova 0x%lx pa %pa size 0x%zx min_pagesz 0x%x\n", + iova, &paddr, size, min_pagesz); + return -EINVAL; + } + + dev_dbg(mmu->dev, "map: iova 0x%lx pa %pa size 0x%zx\n", + iova, &paddr, size); + + while (size) { + size_t pgsize = imgu_mmu_pgsize(mmu->geometry.pgsize_bitmap, + iova | paddr, size); + + dev_dbg(mmu->dev, "mapping: iova 0x%lx pa %pa pgsize 0x%zx\n", + iova, &paddr, pgsize); + + ret = __imgu_mmu_map(mmu, iova, paddr); + if (ret) + break; + + iova += pgsize; + paddr += pgsize; + size -= pgsize; + } + + call_if_imgu_is_powered(mmu, imgu_mmu_tlb_invalidate); + + return ret; +} + +/* drivers/iommu/iommu.c/default_iommu_map_sg() */ +size_t imgu_mmu_map_sg(struct imgu_mmu_info *info, unsigned long iova, + struct scatterlist *sg, unsigned int nents) +{ + struct imgu_mmu *mmu = to_imgu_mmu(info); + struct scatterlist *s; + size_t s_length, mapped = 0; + unsigned int i, min_pagesz; + int ret; + + min_pagesz = 1 << __ffs(mmu->geometry.pgsize_bitmap); + + for_each_sg(sg, s, nents, i) { + phys_addr_t phys = page_to_phys(sg_page(s)) + s->offset; + + s_length = s->length; + + if (!IS_ALIGNED(s->offset, min_pagesz)) + goto out_err; + + /* must be min_pagesz aligned to be mapped singlely */ + if (i == nents - 1 && !IS_ALIGNED(s->length, min_pagesz)) + s_length = PAGE_ALIGN(s->length); + + ret = imgu_mmu_map(info, iova + mapped, phys, s_length); + if (ret) + goto out_err; + + mapped += s_length; + } + + call_if_imgu_is_powered(mmu, imgu_mmu_tlb_invalidate); + + return mapped; + +out_err: + /* undo mappings already done */ + imgu_mmu_unmap(info, iova, mapped); + + return 0; +} + +static size_t __imgu_mmu_unmap(struct imgu_mmu *mmu, + unsigned long iova, size_t size) +{ + u32 l1pt_idx, l2pt_idx; + unsigned long flags; + size_t unmap = size; + u32 *l2pt; + + if (!mmu) + return 0; + + address_to_pte_idx(iova, &l1pt_idx, &l2pt_idx); + + spin_lock_irqsave(&mmu->lock, flags); + + l2pt = mmu->l2pts[l1pt_idx]; + if (!l2pt) { + spin_unlock_irqrestore(&mmu->lock, flags); + return 0; + } + + if (l2pt[l2pt_idx] == mmu->dummy_page_pteval) + unmap = 0; + + l2pt[l2pt_idx] = mmu->dummy_page_pteval; + + spin_unlock_irqrestore(&mmu->lock, flags); + + return unmap; +} + +/* drivers/iommu/iommu.c/iommu_unmap() */ +size_t imgu_mmu_unmap(struct imgu_mmu_info *info, unsigned long iova, + size_t size) +{ + struct imgu_mmu *mmu = to_imgu_mmu(info); + size_t unmapped_page, unmapped = 0; + unsigned int min_pagesz; + + /* find out the minimum page size supported */ + min_pagesz = 1 << __ffs(mmu->geometry.pgsize_bitmap); + + /* + * The virtual address, as well as the size of the mapping, must be + * aligned (at least) to the size of the smallest page supported + * by the hardware + */ + if (!IS_ALIGNED(iova | size, min_pagesz)) { + dev_err(mmu->dev, "unaligned: iova 0x%lx size 0x%zx min_pagesz 0x%x\n", + iova, size, min_pagesz); + return -EINVAL; + } + + dev_dbg(mmu->dev, "unmap this: iova 0x%lx size 0x%zx\n", iova, size); + + /* + * Keep iterating until we either unmap 'size' bytes (or more) + * or we hit an area that isn't mapped. + */ + while (unmapped < size) { + size_t pgsize = imgu_mmu_pgsize(mmu->geometry.pgsize_bitmap, + iova, size - unmapped); + + unmapped_page = __imgu_mmu_unmap(mmu, iova, pgsize); + if (!unmapped_page) + break; + + dev_dbg(mmu->dev, "unmapped: iova 0x%lx size 0x%zx\n", + iova, unmapped_page); + + iova += unmapped_page; + unmapped += unmapped_page; + } + + call_if_imgu_is_powered(mmu, imgu_mmu_tlb_invalidate); + + return unmapped; +} + +/** + * imgu_mmu_init() - initialize IPU3 MMU block + * @parent: struct device parent + * @base: IOMEM base of hardware registers. + * + * Return: Pointer to IPU3 MMU private data pointer or ERR_PTR() on error. + */ +struct imgu_mmu_info *imgu_mmu_init(struct device *parent, void __iomem *base) +{ + struct imgu_mmu *mmu; + u32 pteval; + + mmu = kzalloc(sizeof(*mmu), GFP_KERNEL); + if (!mmu) + return ERR_PTR(-ENOMEM); + + mmu->dev = parent; + mmu->base = base; + spin_lock_init(&mmu->lock); + + /* Disallow external memory access when having no valid page tables. */ + imgu_mmu_set_halt(mmu, true); + + /* + * The MMU does not have a "valid" bit, so we have to use a dummy + * page for invalid entries. + */ + mmu->dummy_page = (void *)__get_free_page(GFP_KERNEL); + if (!mmu->dummy_page) + goto fail_group; + pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->dummy_page)); + mmu->dummy_page_pteval = pteval; + + /* + * Allocate a dummy L2 page table with all entries pointing to + * the dummy page. + */ + mmu->dummy_l2pt = imgu_mmu_alloc_page_table(pteval); + if (!mmu->dummy_l2pt) + goto fail_dummy_page; + pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->dummy_l2pt)); + mmu->dummy_l2pt_pteval = pteval; + + /* + * Allocate the array of L2PT CPU pointers, initialized to zero, + * which means the dummy L2PT allocated above. + */ + mmu->l2pts = vzalloc(IPU3_PT_PTES * sizeof(*mmu->l2pts)); + if (!mmu->l2pts) + goto fail_l2pt; + + /* Allocate the L1 page table. */ + mmu->l1pt = imgu_mmu_alloc_page_table(mmu->dummy_l2pt_pteval); + if (!mmu->l1pt) + goto fail_l2pts; + + pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->l1pt)); + writel(pteval, mmu->base + REG_L1_PHYS); + imgu_mmu_tlb_invalidate(mmu); + imgu_mmu_set_halt(mmu, false); + + mmu->geometry.aperture_start = 0; + mmu->geometry.aperture_end = DMA_BIT_MASK(IPU3_MMU_ADDRESS_BITS); + mmu->geometry.pgsize_bitmap = IPU3_PAGE_SIZE; + + return &mmu->geometry; + +fail_l2pts: + vfree(mmu->l2pts); +fail_l2pt: + imgu_mmu_free_page_table(mmu->dummy_l2pt); +fail_dummy_page: + free_page((unsigned long)mmu->dummy_page); +fail_group: + kfree(mmu); + + return ERR_PTR(-ENOMEM); +} + +/** + * imgu_mmu_exit() - clean up IPU3 MMU block + * @info: IPU3 MMU private data + */ +void imgu_mmu_exit(struct imgu_mmu_info *info) +{ + struct imgu_mmu *mmu = to_imgu_mmu(info); + + /* We are going to free our page tables, no more memory access. */ + imgu_mmu_set_halt(mmu, true); + imgu_mmu_tlb_invalidate(mmu); + + imgu_mmu_free_page_table(mmu->l1pt); + vfree(mmu->l2pts); + imgu_mmu_free_page_table(mmu->dummy_l2pt); + free_page((unsigned long)mmu->dummy_page); + kfree(mmu); +} + +void imgu_mmu_suspend(struct imgu_mmu_info *info) +{ + struct imgu_mmu *mmu = to_imgu_mmu(info); + + imgu_mmu_set_halt(mmu, true); +} + +void imgu_mmu_resume(struct imgu_mmu_info *info) +{ + struct imgu_mmu *mmu = to_imgu_mmu(info); + u32 pteval; + + imgu_mmu_set_halt(mmu, true); + + pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->l1pt)); + writel(pteval, mmu->base + REG_L1_PHYS); + + imgu_mmu_tlb_invalidate(mmu); + imgu_mmu_set_halt(mmu, false); +} diff --git a/drivers/staging/media/ipu3/ipu3-mmu.h b/drivers/staging/media/ipu3/ipu3-mmu.h new file mode 100644 index 000000000000..fa58827eb19c --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-mmu.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018 Intel Corporation */ +/* Copyright 2018 Google LLC. */ + +#ifndef __IPU3_MMU_H +#define __IPU3_MMU_H + +/** + * struct imgu_mmu_info - Describes mmu geometry + * + * @aperture_start: First address that can be mapped + * @aperture_end: Last address that can be mapped + * @pgsize_bitmap: Bitmap of page sizes in use + */ +struct imgu_mmu_info { + dma_addr_t aperture_start; + dma_addr_t aperture_end; + unsigned long pgsize_bitmap; +}; + +struct device; +struct scatterlist; + +struct imgu_mmu_info *imgu_mmu_init(struct device *parent, void __iomem *base); +void imgu_mmu_exit(struct imgu_mmu_info *info); +void imgu_mmu_suspend(struct imgu_mmu_info *info); +void imgu_mmu_resume(struct imgu_mmu_info *info); + +int imgu_mmu_map(struct imgu_mmu_info *info, unsigned long iova, + phys_addr_t paddr, size_t size); +size_t imgu_mmu_unmap(struct imgu_mmu_info *info, unsigned long iova, + size_t size); +size_t imgu_mmu_map_sg(struct imgu_mmu_info *info, unsigned long iova, + struct scatterlist *sg, unsigned int nents); +#endif diff --git a/drivers/staging/media/ipu3/ipu3-tables.c b/drivers/staging/media/ipu3/ipu3-tables.c new file mode 100644 index 000000000000..3a3730bd4395 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-tables.c @@ -0,0 +1,9609 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 Intel Corporation + +#include "ipu3-tables.h" + +#define X 0 /* Don't care value */ + +const struct imgu_css_bds_config + imgu_css_bds_configs[IMGU_BDS_CONFIG_LEN] = { { + /* Scale factor 32 / (32 + 0) = 1 */ + .hor_phase_arr = { + .even = { { 0, 0, 64, 6, 0, 0, 0 } }, + .odd = { { 0, 0, 64, 6, 0, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 0, 64, 6, 0, 0, 0 } }, + .odd = { { 0, 0, 64, 6, 0, 0, 0 } } }, + .ptrn_arr = { { 0x3 } }, + .sample_patrn_length = 2, + .hor_ds_en = 0, + .ver_ds_en = 0 +}, { + /* Scale factor 32 / (32 + 1) = 0.969697 */ + .hor_phase_arr = { + .even = { { 0, 3, 122, 7, 3, 0, 0 }, + { 0, 0, 122, 7, 7, -1, 0 }, + { 0, -3, 122, 7, 10, -1, 0 }, + { 0, -5, 121, 7, 14, -2, 0 }, + { 0, -7, 120, 7, 18, -3, 0 }, + { 0, -9, 118, 7, 23, -4, 0 }, + { 0, -11, 116, 7, 27, -4, 0 }, + { 0, -12, 113, 7, 32, -5, 0 }, + { 0, -13, 110, 7, 37, -6, 0 }, + { 0, -14, 107, 7, 42, -7, 0 }, + { 0, -14, 103, 7, 47, -8, 0 }, + { 0, -15, 100, 7, 52, -9, 0 }, + { 0, -15, 96, 7, 57, -10, 0 }, + { 0, -15, 92, 7, 62, -11, 0 }, + { 0, -14, 86, 7, 68, -12, 0 }, + { 0, -14, 82, 7, 73, -13, 0 }, + { 0, -14, 78, 7, 78, -14, 0 }, + { 0, -13, 73, 7, 82, -14, 0 }, + { 0, -12, 68, 7, 86, -14, 0 }, + { 0, -11, 62, 7, 92, -15, 0 }, + { 0, -10, 57, 7, 96, -15, 0 }, + { 0, -9, 52, 7, 100, -15, 0 }, + { 0, -8, 47, 7, 103, -14, 0 }, + { 0, -7, 42, 7, 107, -14, 0 }, + { 0, -6, 37, 7, 110, -13, 0 }, + { 0, -5, 32, 7, 113, -12, 0 }, + { 0, -4, 27, 7, 116, -11, 0 }, + { 0, -4, 23, 7, 118, -9, 0 }, + { 0, -3, 18, 7, 120, -7, 0 }, + { 0, -2, 14, 7, 121, -5, 0 }, + { 0, -1, 10, 7, 122, -3, 0 }, + { 0, -1, 7, 7, 122, 0, 0 } }, + .odd = { { 0, 2, 122, 7, 5, -1, 0 }, + { 0, -1, 122, 7, 8, -1, 0 }, + { 0, -4, 122, 7, 12, -2, 0 }, + { 0, -6, 120, 7, 16, -2, 0 }, + { 0, -8, 118, 7, 21, -3, 0 }, + { 0, -10, 117, 7, 25, -4, 0 }, + { 0, -11, 114, 7, 30, -5, 0 }, + { 0, -13, 112, 7, 35, -6, 0 }, + { 0, -14, 109, 7, 40, -7, 0 }, + { 0, -14, 105, 7, 45, -8, 0 }, + { 0, -15, 102, 7, 50, -9, 0 }, + { 0, -15, 98, 7, 55, -10, 0 }, + { 0, -15, 94, 7, 60, -11, 0 }, + { 0, -15, 90, 7, 65, -12, 0 }, + { 0, -14, 85, 7, 70, -13, 0 }, + { 0, -14, 80, 7, 75, -13, 0 }, + { 0, -13, 75, 7, 80, -14, 0 }, + { 0, -13, 70, 7, 85, -14, 0 }, + { 0, -12, 65, 7, 90, -15, 0 }, + { 0, -11, 60, 7, 94, -15, 0 }, + { 0, -10, 55, 7, 98, -15, 0 }, + { 0, -9, 50, 7, 102, -15, 0 }, + { 0, -8, 45, 7, 105, -14, 0 }, + { 0, -7, 40, 7, 109, -14, 0 }, + { 0, -6, 35, 7, 112, -13, 0 }, + { 0, -5, 30, 7, 114, -11, 0 }, + { 0, -4, 25, 7, 117, -10, 0 }, + { 0, -3, 21, 7, 118, -8, 0 }, + { 0, -2, 16, 7, 120, -6, 0 }, + { 0, -2, 12, 7, 122, -4, 0 }, + { 0, -1, 8, 7, 122, -1, 0 }, + { 0, -1, 5, 7, 122, 2, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 3, 122, 7, 3, 0, 0 }, + { 0, 0, 122, 7, 7, -1, 0 }, + { 0, -3, 122, 7, 10, -1, 0 }, + { 0, -5, 121, 7, 14, -2, 0 }, + { 0, -7, 120, 7, 18, -3, 0 }, + { 0, -9, 118, 7, 23, -4, 0 }, + { 0, -11, 116, 7, 27, -4, 0 }, + { 0, -12, 113, 7, 32, -5, 0 }, + { 0, -13, 110, 7, 37, -6, 0 }, + { 0, -14, 107, 7, 42, -7, 0 }, + { 0, -14, 103, 7, 47, -8, 0 }, + { 0, -15, 100, 7, 52, -9, 0 }, + { 0, -15, 96, 7, 57, -10, 0 }, + { 0, -15, 92, 7, 62, -11, 0 }, + { 0, -14, 86, 7, 68, -12, 0 }, + { 0, -14, 82, 7, 73, -13, 0 }, + { 0, -14, 78, 7, 78, -14, 0 }, + { 0, -13, 73, 7, 82, -14, 0 }, + { 0, -12, 68, 7, 86, -14, 0 }, + { 0, -11, 62, 7, 92, -15, 0 }, + { 0, -10, 57, 7, 96, -15, 0 }, + { 0, -9, 52, 7, 100, -15, 0 }, + { 0, -8, 47, 7, 103, -14, 0 }, + { 0, -7, 42, 7, 107, -14, 0 }, + { 0, -6, 37, 7, 110, -13, 0 }, + { 0, -5, 32, 7, 113, -12, 0 }, + { 0, -4, 27, 7, 116, -11, 0 }, + { 0, -4, 23, 7, 118, -9, 0 }, + { 0, -3, 18, 7, 120, -7, 0 }, + { 0, -2, 14, 7, 121, -5, 0 }, + { 0, -1, 10, 7, 122, -3, 0 }, + { 0, -1, 7, 7, 122, 0, 0 } }, + .odd = { { 0, 2, 122, 7, 5, -1, 0 }, + { 0, -1, 122, 7, 8, -1, 0 }, + { 0, -4, 122, 7, 12, -2, 0 }, + { 0, -6, 120, 7, 16, -2, 0 }, + { 0, -8, 118, 7, 21, -3, 0 }, + { 0, -10, 117, 7, 25, -4, 0 }, + { 0, -11, 114, 7, 30, -5, 0 }, + { 0, -13, 112, 7, 35, -6, 0 }, + { 0, -14, 109, 7, 40, -7, 0 }, + { 0, -14, 105, 7, 45, -8, 0 }, + { 0, -15, 102, 7, 50, -9, 0 }, + { 0, -15, 98, 7, 55, -10, 0 }, + { 0, -15, 94, 7, 60, -11, 0 }, + { 0, -15, 90, 7, 65, -12, 0 }, + { 0, -14, 85, 7, 70, -13, 0 }, + { 0, -14, 80, 7, 75, -13, 0 }, + { 0, -13, 75, 7, 80, -14, 0 }, + { 0, -13, 70, 7, 85, -14, 0 }, + { 0, -12, 65, 7, 90, -15, 0 }, + { 0, -11, 60, 7, 94, -15, 0 }, + { 0, -10, 55, 7, 98, -15, 0 }, + { 0, -9, 50, 7, 102, -15, 0 }, + { 0, -8, 45, 7, 105, -14, 0 }, + { 0, -7, 40, 7, 109, -14, 0 }, + { 0, -6, 35, 7, 112, -13, 0 }, + { 0, -5, 30, 7, 114, -11, 0 }, + { 0, -4, 25, 7, 117, -10, 0 }, + { 0, -3, 21, 7, 118, -8, 0 }, + { 0, -2, 16, 7, 120, -6, 0 }, + { 0, -2, 12, 7, 122, -4, 0 }, + { 0, -1, 8, 7, 122, -1, 0 }, + { 0, -1, 5, 7, 122, 2, 0 } } }, + .ptrn_arr = { { 0xffffffff, 0xffffffff } }, + .sample_patrn_length = 66, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 2) = 0.941176 */ + .hor_phase_arr = { + .even = { { -1, 6, 118, 7, 6, -1, 0 }, + { 0, 0, 117, 7, 13, -2, 0 }, + { 0, -5, 116, 7, 21, -4, 0 }, + { 0, -9, 113, 7, 30, -6, 0 }, + { 0, -12, 109, 7, 39, -8, 0 }, + { 0, -13, 102, 7, 49, -10, 0 }, + { 0, -14, 94, 7, 59, -11, 0 }, + { 0, -14, 86, 7, 69, -13, 0 }, + { 0, -14, 78, 7, 78, -14, 0 }, + { 0, -13, 69, 7, 86, -14, 0 }, + { 0, -11, 59, 7, 94, -14, 0 }, + { 0, -10, 49, 7, 102, -13, 0 }, + { 0, -8, 39, 7, 109, -12, 0 }, + { 0, -6, 30, 7, 113, -9, 0 }, + { 0, -4, 21, 7, 116, -5, 0 }, + { 0, -2, 13, 7, 117, 0, 0 } }, + .odd = { { -1, 3, 118, 7, 10, -2, 0 }, + { 0, -3, 117, 7, 17, -3, 0 }, + { 0, -7, 114, 7, 26, -5, 0 }, + { 0, -10, 110, 7, 35, -7, 0 }, + { 0, -13, 106, 7, 44, -9, 0 }, + { 0, -14, 99, 7, 54, -11, 0 }, + { 0, -14, 90, 7, 64, -12, 0 }, + { 0, -14, 82, 7, 73, -13, 0 }, + { 0, -13, 73, 7, 82, -14, 0 }, + { 0, -12, 64, 7, 90, -14, 0 }, + { 0, -11, 54, 7, 99, -14, 0 }, + { 0, -9, 44, 7, 106, -13, 0 }, + { 0, -7, 35, 7, 110, -10, 0 }, + { 0, -5, 26, 7, 114, -7, 0 }, + { 0, -3, 17, 7, 117, -3, 0 }, + { 0, -2, 10, 7, 118, 3, -1 } } }, + .ver_phase_arr = { + .even = { { -1, 6, 118, 7, 6, -1, 0 }, + { 0, 0, 117, 7, 13, -2, 0 }, + { 0, -5, 116, 7, 21, -4, 0 }, + { 0, -9, 113, 7, 30, -6, 0 }, + { 0, -12, 109, 7, 39, -8, 0 }, + { 0, -13, 102, 7, 49, -10, 0 }, + { 0, -14, 94, 7, 59, -11, 0 }, + { 0, -14, 86, 7, 69, -13, 0 }, + { 0, -14, 78, 7, 78, -14, 0 }, + { 0, -13, 69, 7, 86, -14, 0 }, + { 0, -11, 59, 7, 94, -14, 0 }, + { 0, -10, 49, 7, 102, -13, 0 }, + { 0, -8, 39, 7, 109, -12, 0 }, + { 0, -6, 30, 7, 113, -9, 0 }, + { 0, -4, 21, 7, 116, -5, 0 }, + { 0, -2, 13, 7, 117, 0, 0 } }, + .odd = { { -1, 3, 118, 7, 10, -2, 0 }, + { 0, -3, 117, 7, 17, -3, 0 }, + { 0, -7, 114, 7, 26, -5, 0 }, + { 0, -10, 110, 7, 35, -7, 0 }, + { 0, -13, 106, 7, 44, -9, 0 }, + { 0, -14, 99, 7, 54, -11, 0 }, + { 0, -14, 90, 7, 64, -12, 0 }, + { 0, -14, 82, 7, 73, -13, 0 }, + { 0, -13, 73, 7, 82, -14, 0 }, + { 0, -12, 64, 7, 90, -14, 0 }, + { 0, -11, 54, 7, 99, -14, 0 }, + { 0, -9, 44, 7, 106, -13, 0 }, + { 0, -7, 35, 7, 110, -10, 0 }, + { 0, -5, 26, 7, 114, -7, 0 }, + { 0, -3, 17, 7, 117, -3, 0 }, + { 0, -2, 10, 7, 118, 3, -1 } } }, + .ptrn_arr = { { 0xffffffff } }, + .sample_patrn_length = 34, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 3) = 0.914286 */ + .hor_phase_arr = { + .even = { { -2, 9, 114, 7, 9, -2, 0 }, + { -1, 0, 114, 7, 20, -5, 0 }, + { 0, -7, 110, 7, 32, -7, 0 }, + { 0, -11, 103, 7, 46, -10, 0 }, + { 0, -13, 93, 7, 60, -12, 0 }, + { 0, -14, 82, 7, 74, -14, 0 }, + { 0, -13, 69, 7, 86, -14, 0 }, + { 0, -11, 55, 7, 97, -13, 0 }, + { 0, -9, 41, 7, 106, -10, 0 }, + { 0, -6, 28, 7, 111, -5, 0 }, + { 0, -4, 16, 7, 114, 3, -1 }, + { -2, 6, 115, 7, 12, -3, 0 }, + { 0, -2, 111, 7, 24, -5, 0 }, + { 0, -8, 107, 7, 37, -8, 0 }, + { 0, -12, 100, 7, 51, -11, 0 }, + { 0, -14, 90, 7, 65, -13, 0 }, + { 0, -14, 78, 7, 78, -14, 0 }, + { 0, -13, 65, 7, 90, -14, 0 }, + { 0, -11, 51, 7, 100, -12, 0 }, + { 0, -8, 37, 7, 107, -8, 0 }, + { 0, -5, 24, 7, 111, -2, 0 }, + { 0, -3, 12, 7, 115, 6, -2 }, + { -1, 3, 114, 7, 16, -4, 0 }, + { 0, -5, 111, 7, 28, -6, 0 }, + { 0, -10, 106, 7, 41, -9, 0 }, + { 0, -13, 97, 7, 55, -11, 0 }, + { 0, -14, 86, 7, 69, -13, 0 }, + { 0, -14, 74, 7, 82, -14, 0 }, + { 0, -12, 60, 7, 93, -13, 0 }, + { 0, -10, 46, 7, 103, -11, 0 }, + { 0, -7, 32, 7, 110, -7, 0 }, + { 0, -5, 20, 7, 114, 0, -1 } }, + .odd = { { -1, 4, 114, 7, 14, -3, 0 }, + { 0, -4, 112, 7, 26, -6, 0 }, + { 0, -9, 107, 7, 39, -9, 0 }, + { 0, -13, 99, 7, 53, -11, 0 }, + { 0, -14, 88, 7, 67, -13, 0 }, + { 0, -14, 76, 7, 80, -14, 0 }, + { 0, -13, 62, 7, 93, -14, 0 }, + { 0, -10, 48, 7, 102, -12, 0 }, + { 0, -8, 35, 7, 109, -8, 0 }, + { 0, -5, 22, 7, 112, -1, 0 }, + { 0, -3, 11, 7, 115, 7, -2 }, + { -1, 1, 114, 7, 18, -4, 0 }, + { 0, -6, 111, 7, 30, -7, 0 }, + { 0, -10, 103, 7, 44, -9, 0 }, + { 0, -13, 95, 7, 58, -12, 0 }, + { 0, -14, 85, 7, 71, -14, 0 }, + { 0, -14, 71, 7, 85, -14, 0 }, + { 0, -12, 58, 7, 95, -13, 0 }, + { 0, -9, 44, 7, 103, -10, 0 }, + { 0, -7, 30, 7, 111, -6, 0 }, + { 0, -4, 18, 7, 114, 1, -1 }, + { -2, 7, 115, 7, 11, -3, 0 }, + { 0, -1, 112, 7, 22, -5, 0 }, + { 0, -8, 109, 7, 35, -8, 0 }, + { 0, -12, 102, 7, 48, -10, 0 }, + { 0, -14, 93, 7, 62, -13, 0 }, + { 0, -14, 80, 7, 76, -14, 0 }, + { 0, -13, 67, 7, 88, -14, 0 }, + { 0, -11, 53, 7, 99, -13, 0 }, + { 0, -9, 39, 7, 107, -9, 0 }, + { 0, -6, 26, 7, 112, -4, 0 }, + { 0, -3, 14, 7, 114, 4, -1 } } }, + .ver_phase_arr = { + .even = { { -2, 9, 114, 7, 9, -2, 0 }, + { -1, 0, 114, 7, 20, -5, 0 }, + { 0, -7, 110, 7, 32, -7, 0 }, + { 0, -11, 103, 7, 46, -10, 0 }, + { 0, -13, 93, 7, 60, -12, 0 }, + { 0, -14, 82, 7, 74, -14, 0 }, + { 0, -13, 69, 7, 86, -14, 0 }, + { 0, -11, 55, 7, 97, -13, 0 }, + { 0, -9, 41, 7, 106, -10, 0 }, + { 0, -6, 28, 7, 111, -5, 0 }, + { 0, -4, 16, 7, 114, 3, -1 }, + { -2, 6, 115, 7, 12, -3, 0 }, + { 0, -2, 111, 7, 24, -5, 0 }, + { 0, -8, 107, 7, 37, -8, 0 }, + { 0, -12, 100, 7, 51, -11, 0 }, + { 0, -14, 90, 7, 65, -13, 0 }, + { 0, -14, 78, 7, 78, -14, 0 }, + { 0, -13, 65, 7, 90, -14, 0 }, + { 0, -11, 51, 7, 100, -12, 0 }, + { 0, -8, 37, 7, 107, -8, 0 }, + { 0, -5, 24, 7, 111, -2, 0 }, + { 0, -3, 12, 7, 115, 6, -2 }, + { -1, 3, 114, 7, 16, -4, 0 }, + { 0, -5, 111, 7, 28, -6, 0 }, + { 0, -10, 106, 7, 41, -9, 0 }, + { 0, -13, 97, 7, 55, -11, 0 }, + { 0, -14, 86, 7, 69, -13, 0 }, + { 0, -14, 74, 7, 82, -14, 0 }, + { 0, -12, 60, 7, 93, -13, 0 }, + { 0, -10, 46, 7, 103, -11, 0 }, + { 0, -7, 32, 7, 110, -7, 0 }, + { 0, -5, 20, 7, 114, 0, -1 } }, + .odd = { { -1, 4, 114, 7, 14, -3, 0 }, + { 0, -4, 112, 7, 26, -6, 0 }, + { 0, -9, 107, 7, 39, -9, 0 }, + { 0, -13, 99, 7, 53, -11, 0 }, + { 0, -14, 88, 7, 67, -13, 0 }, + { 0, -14, 76, 7, 80, -14, 0 }, + { 0, -13, 62, 7, 93, -14, 0 }, + { 0, -10, 48, 7, 102, -12, 0 }, + { 0, -8, 35, 7, 109, -8, 0 }, + { 0, -5, 22, 7, 112, -1, 0 }, + { 0, -3, 11, 7, 115, 7, -2 }, + { -1, 1, 114, 7, 18, -4, 0 }, + { 0, -6, 111, 7, 30, -7, 0 }, + { 0, -10, 103, 7, 44, -9, 0 }, + { 0, -13, 95, 7, 58, -12, 0 }, + { 0, -14, 85, 7, 71, -14, 0 }, + { 0, -14, 71, 7, 85, -14, 0 }, + { 0, -12, 58, 7, 95, -13, 0 }, + { 0, -9, 44, 7, 103, -10, 0 }, + { 0, -7, 30, 7, 111, -6, 0 }, + { 0, -4, 18, 7, 114, 1, -1 }, + { -2, 7, 115, 7, 11, -3, 0 }, + { 0, -1, 112, 7, 22, -5, 0 }, + { 0, -8, 109, 7, 35, -8, 0 }, + { 0, -12, 102, 7, 48, -10, 0 }, + { 0, -14, 93, 7, 62, -13, 0 }, + { 0, -14, 80, 7, 76, -14, 0 }, + { 0, -13, 67, 7, 88, -14, 0 }, + { 0, -11, 53, 7, 99, -13, 0 }, + { 0, -9, 39, 7, 107, -9, 0 }, + { 0, -6, 26, 7, 112, -4, 0 }, + { 0, -3, 14, 7, 114, 4, -1 } } }, + .ptrn_arr = { { 0xff3fffff, 0xffff9fff, 0xf } }, + .sample_patrn_length = 70, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 4) = 0.888889 */ + .hor_phase_arr = { + .even = { { -3, 12, 110, 7, 12, -3, 0 }, + { -1, 0, 110, 7, 26, -7, 0 }, + { 0, -8, 103, 7, 43, -10, 0 }, + { 0, -12, 92, 7, 61, -13, 0 }, + { 0, -14, 78, 7, 78, -14, 0 }, + { 0, -13, 61, 7, 92, -12, 0 }, + { 0, -10, 43, 7, 103, -8, 0 }, + { 0, -7, 26, 7, 110, 0, -1 } }, + .odd = { { -2, 5, 111, 7, 19, -5, 0 }, + { 0, -4, 106, 7, 34, -8, 0 }, + { 0, -11, 98, 7, 52, -11, 0 }, + { 0, -13, 85, 7, 69, -13, 0 }, + { 0, -13, 69, 7, 85, -13, 0 }, + { 0, -11, 52, 7, 98, -11, 0 }, + { 0, -8, 34, 7, 106, -4, 0 }, + { 0, -5, 19, 7, 111, 5, -2 } } }, + .ver_phase_arr = { + .even = { { -3, 12, 110, 7, 12, -3, 0 }, + { -1, 0, 110, 7, 26, -7, 0 }, + { 0, -8, 103, 7, 43, -10, 0 }, + { 0, -12, 92, 7, 61, -13, 0 }, + { 0, -14, 78, 7, 78, -14, 0 }, + { 0, -13, 61, 7, 92, -12, 0 }, + { 0, -10, 43, 7, 103, -8, 0 }, + { 0, -7, 26, 7, 110, 0, -1 } }, + .odd = { { -2, 5, 111, 7, 19, -5, 0 }, + { 0, -4, 106, 7, 34, -8, 0 }, + { 0, -11, 98, 7, 52, -11, 0 }, + { 0, -13, 85, 7, 69, -13, 0 }, + { 0, -13, 69, 7, 85, -13, 0 }, + { 0, -11, 52, 7, 98, -11, 0 }, + { 0, -8, 34, 7, 106, -4, 0 }, + { 0, -5, 19, 7, 111, 5, -2 } } }, + .ptrn_arr = { { 0xffff } }, + .sample_patrn_length = 18, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 5) = 0.864865 */ + .hor_phase_arr = { + .even = { { -5, 14, 110, 7, 14, -5, 0 }, + { -1, 0, 106, 7, 32, -9, 0 }, + { 0, -9, 96, 7, 53, -12, 0 }, + { 0, -13, 81, 7, 73, -13, 0 }, + { 0, -13, 61, 7, 91, -11, 0 }, + { 0, -10, 40, 7, 103, -4, -1 }, + { 0, -6, 21, 7, 108, 8, -3 }, + { -3, 5, 108, 7, 25, -7, 0 }, + { 0, -6, 101, 7, 44, -11, 0 }, + { 0, -12, 88, 7, 65, -13, 0 }, + { 0, -13, 69, 7, 85, -13, 0 }, + { 0, -11, 49, 7, 98, -8, 0 }, + { 0, -8, 28, 7, 108, 2, -2 }, + { -4, 11, 108, 7, 18, -5, 0 }, + { -1, -2, 104, 7, 36, -9, 0 }, + { 0, -10, 93, 7, 57, -12, 0 }, + { 0, -13, 77, 7, 77, -13, 0 }, + { 0, -12, 57, 7, 93, -10, 0 }, + { 0, -9, 36, 7, 104, -2, -1 }, + { 0, -5, 18, 7, 108, 11, -4 }, + { -2, 2, 108, 7, 28, -8, 0 }, + { 0, -8, 98, 7, 49, -11, 0 }, + { 0, -13, 85, 7, 69, -13, 0 }, + { 0, -13, 65, 7, 88, -12, 0 }, + { 0, -11, 44, 7, 101, -6, 0 }, + { 0, -7, 25, 7, 108, 5, -3 }, + { -3, 8, 108, 7, 21, -6, 0 }, + { -1, -4, 103, 7, 40, -10, 0 }, + { 0, -11, 91, 7, 61, -13, 0 }, + { 0, -13, 73, 7, 81, -13, 0 }, + { 0, -12, 53, 7, 96, -9, 0 }, + { 0, -9, 32, 7, 106, 0, -1 } }, + .odd = { { -3, 7, 108, 7, 23, -7, 0 }, + { 0, -5, 101, 7, 42, -10, 0 }, + { 0, -12, 90, 7, 63, -13, 0 }, + { 0, -13, 71, 7, 83, -13, 0 }, + { 0, -12, 51, 7, 97, -8, 0 }, + { 0, -8, 30, 7, 107, 1, -2 }, + { -4, 13, 108, 7, 16, -5, 0 }, + { -1, -1, 105, 7, 34, -9, 0 }, + { 0, -10, 95, 7, 55, -12, 0 }, + { 0, -13, 79, 7, 75, -13, 0 }, + { 0, -13, 59, 7, 93, -11, 0 }, + { 0, -10, 38, 7, 104, -3, -1 }, + { 0, -6, 19, 7, 110, 9, -4 }, + { -2, 4, 106, 7, 27, -7, 0 }, + { 0, -7, 99, 7, 47, -11, 0 }, + { 0, -12, 86, 7, 67, -13, 0 }, + { 0, -13, 67, 7, 86, -12, 0 }, + { 0, -11, 47, 7, 99, -7, 0 }, + { 0, -7, 27, 7, 106, 4, -2 }, + { -4, 9, 110, 7, 19, -6, 0 }, + { -1, -3, 104, 7, 38, -10, 0 }, + { 0, -11, 93, 7, 59, -13, 0 }, + { 0, -13, 75, 7, 79, -13, 0 }, + { 0, -12, 55, 7, 95, -10, 0 }, + { 0, -9, 34, 7, 105, -1, -1 }, + { 0, -5, 16, 7, 108, 13, -4 }, + { -2, 1, 107, 7, 30, -8, 0 }, + { 0, -8, 97, 7, 51, -12, 0 }, + { 0, -13, 83, 7, 71, -13, 0 }, + { 0, -13, 63, 7, 90, -12, 0 }, + { 0, -10, 42, 7, 101, -5, 0 }, + { 0, -7, 23, 7, 108, 7, -3 } } }, + .ver_phase_arr = { + .even = { { -5, 14, 110, 7, 14, -5, 0 }, + { -1, 0, 106, 7, 32, -9, 0 }, + { 0, -9, 96, 7, 53, -12, 0 }, + { 0, -13, 81, 7, 73, -13, 0 }, + { 0, -13, 61, 7, 91, -11, 0 }, + { 0, -10, 40, 7, 103, -4, -1 }, + { 0, -6, 21, 7, 108, 8, -3 }, + { -3, 5, 108, 7, 25, -7, 0 }, + { 0, -6, 101, 7, 44, -11, 0 }, + { 0, -12, 88, 7, 65, -13, 0 }, + { 0, -13, 69, 7, 85, -13, 0 }, + { 0, -11, 49, 7, 98, -8, 0 }, + { 0, -8, 28, 7, 108, 2, -2 }, + { -4, 11, 108, 7, 18, -5, 0 }, + { -1, -2, 104, 7, 36, -9, 0 }, + { 0, -10, 93, 7, 57, -12, 0 }, + { 0, -13, 77, 7, 77, -13, 0 }, + { 0, -12, 57, 7, 93, -10, 0 }, + { 0, -9, 36, 7, 104, -2, -1 }, + { 0, -5, 18, 7, 108, 11, -4 }, + { -2, 2, 108, 7, 28, -8, 0 }, + { 0, -8, 98, 7, 49, -11, 0 }, + { 0, -13, 85, 7, 69, -13, 0 }, + { 0, -13, 65, 7, 88, -12, 0 }, + { 0, -11, 44, 7, 101, -6, 0 }, + { 0, -7, 25, 7, 108, 5, -3 }, + { -3, 8, 108, 7, 21, -6, 0 }, + { -1, -4, 103, 7, 40, -10, 0 }, + { 0, -11, 91, 7, 61, -13, 0 }, + { 0, -13, 73, 7, 81, -13, 0 }, + { 0, -12, 53, 7, 96, -9, 0 }, + { 0, -9, 32, 7, 106, 0, -1 } }, + .odd = { { -3, 7, 108, 7, 23, -7, 0 }, + { 0, -5, 101, 7, 42, -10, 0 }, + { 0, -12, 90, 7, 63, -13, 0 }, + { 0, -13, 71, 7, 83, -13, 0 }, + { 0, -12, 51, 7, 97, -8, 0 }, + { 0, -8, 30, 7, 107, 1, -2 }, + { -4, 13, 108, 7, 16, -5, 0 }, + { -1, -1, 105, 7, 34, -9, 0 }, + { 0, -10, 95, 7, 55, -12, 0 }, + { 0, -13, 79, 7, 75, -13, 0 }, + { 0, -13, 59, 7, 93, -11, 0 }, + { 0, -10, 38, 7, 104, -3, -1 }, + { 0, -6, 19, 7, 110, 9, -4 }, + { -2, 4, 106, 7, 27, -7, 0 }, + { 0, -7, 99, 7, 47, -11, 0 }, + { 0, -12, 86, 7, 67, -13, 0 }, + { 0, -13, 67, 7, 86, -12, 0 }, + { 0, -11, 47, 7, 99, -7, 0 }, + { 0, -7, 27, 7, 106, 4, -2 }, + { -4, 9, 110, 7, 19, -6, 0 }, + { -1, -3, 104, 7, 38, -10, 0 }, + { 0, -11, 93, 7, 59, -13, 0 }, + { 0, -13, 75, 7, 79, -13, 0 }, + { 0, -12, 55, 7, 95, -10, 0 }, + { 0, -9, 34, 7, 105, -1, -1 }, + { 0, -5, 16, 7, 108, 13, -4 }, + { -2, 1, 107, 7, 30, -8, 0 }, + { 0, -8, 97, 7, 51, -12, 0 }, + { 0, -13, 83, 7, 71, -13, 0 }, + { 0, -13, 63, 7, 90, -12, 0 }, + { 0, -10, 42, 7, 101, -5, 0 }, + { 0, -7, 23, 7, 108, 7, -3 } } }, + .ptrn_arr = { { 0xcfff9fff, 0xf3ffe7ff, 0xff } }, + .sample_patrn_length = 74, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 6) = 0.842105 */ + .hor_phase_arr = { + .even = { { -6, 17, 106, 7, 17, -6, 0 }, + { -2, 0, 102, 7, 38, -10, 0 }, + { 0, -10, 89, 7, 62, -13, 0 }, + { 0, -13, 69, 7, 83, -11, 0 }, + { 0, -11, 46, 7, 98, -4, -1 }, + { 0, -7, 23, 7, 106, 10, -4 }, + { -3, 5, 104, 7, 31, -9, 0 }, + { 0, -7, 93, 7, 54, -12, 0 }, + { 0, -12, 76, 7, 76, -12, 0 }, + { 0, -12, 54, 7, 93, -7, 0 }, + { 0, -9, 31, 7, 104, 5, -3 }, + { -4, 10, 106, 7, 23, -7, 0 }, + { -1, -4, 98, 7, 46, -11, 0 }, + { 0, -11, 83, 7, 69, -13, 0 }, + { 0, -13, 62, 7, 89, -10, 0 }, + { 0, -10, 38, 7, 102, 0, -2 } }, + .odd = { { -4, 8, 105, 7, 27, -8, 0 }, + { 0, -6, 96, 7, 50, -12, 0 }, + { 0, -12, 80, 7, 73, -13, 0 }, + { 0, -13, 58, 7, 92, -9, 0 }, + { 0, -9, 34, 7, 103, 2, -2 }, + { -5, 13, 107, 7, 20, -7, 0 }, + { -1, -2, 100, 7, 42, -11, 0 }, + { 0, -11, 87, 7, 65, -13, 0 }, + { 0, -13, 65, 7, 87, -11, 0 }, + { 0, -11, 42, 7, 100, -2, -1 }, + { 0, -7, 20, 7, 107, 13, -5 }, + { -2, 2, 103, 7, 34, -9, 0 }, + { 0, -9, 92, 7, 58, -13, 0 }, + { 0, -13, 73, 7, 80, -12, 0 }, + { 0, -12, 50, 7, 96, -6, 0 }, + { 0, -8, 27, 7, 105, 8, -4 } } }, + .ver_phase_arr = { + .even = { { -6, 17, 106, 7, 17, -6, 0 }, + { -2, 0, 102, 7, 38, -10, 0 }, + { 0, -10, 89, 7, 62, -13, 0 }, + { 0, -13, 69, 7, 83, -11, 0 }, + { 0, -11, 46, 7, 98, -4, -1 }, + { 0, -7, 23, 7, 106, 10, -4 }, + { -3, 5, 104, 7, 31, -9, 0 }, + { 0, -7, 93, 7, 54, -12, 0 }, + { 0, -12, 76, 7, 76, -12, 0 }, + { 0, -12, 54, 7, 93, -7, 0 }, + { 0, -9, 31, 7, 104, 5, -3 }, + { -4, 10, 106, 7, 23, -7, 0 }, + { -1, -4, 98, 7, 46, -11, 0 }, + { 0, -11, 83, 7, 69, -13, 0 }, + { 0, -13, 62, 7, 89, -10, 0 }, + { 0, -10, 38, 7, 102, 0, -2 } }, + .odd = { { -4, 8, 105, 7, 27, -8, 0 }, + { 0, -6, 96, 7, 50, -12, 0 }, + { 0, -12, 80, 7, 73, -13, 0 }, + { 0, -13, 58, 7, 92, -9, 0 }, + { 0, -9, 34, 7, 103, 2, -2 }, + { -5, 13, 107, 7, 20, -7, 0 }, + { -1, -2, 100, 7, 42, -11, 0 }, + { 0, -11, 87, 7, 65, -13, 0 }, + { 0, -13, 65, 7, 87, -11, 0 }, + { 0, -11, 42, 7, 100, -2, -1 }, + { 0, -7, 20, 7, 107, 13, -5 }, + { -2, 2, 103, 7, 34, -9, 0 }, + { 0, -9, 92, 7, 58, -13, 0 }, + { 0, -13, 73, 7, 80, -12, 0 }, + { 0, -12, 50, 7, 96, -6, 0 }, + { 0, -8, 27, 7, 105, 8, -4 } } }, + .ptrn_arr = { { 0xfcffe7ff, 0xf } }, + .sample_patrn_length = 38, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 7) = 0.820513 */ + .hor_phase_arr = { + .even = { { -7, 19, 104, 7, 19, -7, 0 }, + { -2, 0, 98, 7, 43, -11, 0 }, + { 0, -10, 81, 7, 69, -12, 0 }, + { 0, -12, 58, 7, 89, -7, 0 }, + { 0, -10, 32, 7, 103, 7, -4 }, + { -5, 10, 103, 7, 29, -9, 0 }, + { -1, -6, 93, 7, 54, -12, 0 }, + { 0, -12, 72, 7, 79, -11, 0 }, + { 0, -12, 47, 7, 97, -2, -2 }, + { 0, -8, 22, 7, 104, 16, -6 }, + { -3, 2, 100, 7, 40, -11, 0 }, + { 0, -9, 84, 7, 65, -12, 0 }, + { 0, -13, 62, 7, 87, -8, 0 }, + { 0, -10, 36, 7, 100, 5, -3 }, + { -5, 13, 103, 7, 25, -8, 0 }, + { -1, -4, 94, 7, 51, -12, 0 }, + { 0, -12, 76, 7, 76, -12, 0 }, + { 0, -12, 51, 7, 94, -4, -1 }, + { 0, -8, 25, 7, 103, 13, -5 }, + { -3, 5, 100, 7, 36, -10, 0 }, + { 0, -8, 87, 7, 62, -13, 0 }, + { 0, -12, 65, 7, 84, -9, 0 }, + { 0, -11, 40, 7, 100, 2, -3 }, + { -6, 16, 104, 7, 22, -8, 0 }, + { -2, -2, 97, 7, 47, -12, 0 }, + { 0, -11, 79, 7, 72, -12, 0 }, + { 0, -12, 54, 7, 93, -6, -1 }, + { 0, -9, 29, 7, 103, 10, -5 }, + { -4, 7, 103, 7, 32, -10, 0 }, + { 0, -7, 89, 7, 58, -12, 0 }, + { 0, -12, 69, 7, 81, -10, 0 }, + { 0, -11, 43, 7, 98, 0, -2 } }, + .odd = { { -4, 9, 101, 7, 31, -9, 0 }, + { -1, -6, 91, 7, 56, -12, 0 }, + { 0, -12, 71, 7, 80, -11, 0 }, + { 0, -11, 45, 7, 97, -1, -2 }, + { 0, -7, 20, 7, 105, 17, -7 }, + { -3, 1, 100, 7, 41, -11, 0 }, + { 0, -10, 83, 7, 67, -12, 0 }, + { 0, -13, 60, 7, 89, -8, 0 }, + { 0, -10, 34, 7, 102, 6, -4 }, + { -5, 11, 104, 7, 27, -9, 0 }, + { -1, -5, 94, 7, 52, -12, 0 }, + { 0, -12, 74, 7, 77, -11, 0 }, + { 0, -12, 49, 7, 95, -3, -1 }, + { 0, -8, 24, 7, 104, 14, -6 }, + { -3, 3, 100, 7, 38, -10, 0 }, + { 0, -9, 87, 7, 63, -13, 0 }, + { 0, -13, 63, 7, 87, -9, 0 }, + { 0, -10, 38, 7, 100, 3, -3 }, + { -6, 14, 104, 7, 24, -8, 0 }, + { -1, -3, 95, 7, 49, -12, 0 }, + { 0, -11, 77, 7, 74, -12, 0 }, + { 0, -12, 52, 7, 94, -5, -1 }, + { 0, -9, 27, 7, 104, 11, -5 }, + { -4, 6, 102, 7, 34, -10, 0 }, + { 0, -8, 89, 7, 60, -13, 0 }, + { 0, -12, 67, 7, 83, -10, 0 }, + { 0, -11, 41, 7, 100, 1, -3 }, + { -7, 17, 105, 7, 20, -7, 0 }, + { -2, -1, 97, 7, 45, -11, 0 }, + { 0, -11, 80, 7, 71, -12, 0 }, + { 0, -12, 56, 7, 91, -6, -1 }, + { 0, -9, 31, 7, 101, 9, -4 } } }, + .ver_phase_arr = { + .even = { { -7, 19, 104, 7, 19, -7, 0 }, + { -2, 0, 98, 7, 43, -11, 0 }, + { 0, -10, 81, 7, 69, -12, 0 }, + { 0, -12, 58, 7, 89, -7, 0 }, + { 0, -10, 32, 7, 103, 7, -4 }, + { -5, 10, 103, 7, 29, -9, 0 }, + { -1, -6, 93, 7, 54, -12, 0 }, + { 0, -12, 72, 7, 79, -11, 0 }, + { 0, -12, 47, 7, 97, -2, -2 }, + { 0, -8, 22, 7, 104, 16, -6 }, + { -3, 2, 100, 7, 40, -11, 0 }, + { 0, -9, 84, 7, 65, -12, 0 }, + { 0, -13, 62, 7, 87, -8, 0 }, + { 0, -10, 36, 7, 100, 5, -3 }, + { -5, 13, 103, 7, 25, -8, 0 }, + { -1, -4, 94, 7, 51, -12, 0 }, + { 0, -12, 76, 7, 76, -12, 0 }, + { 0, -12, 51, 7, 94, -4, -1 }, + { 0, -8, 25, 7, 103, 13, -5 }, + { -3, 5, 100, 7, 36, -10, 0 }, + { 0, -8, 87, 7, 62, -13, 0 }, + { 0, -12, 65, 7, 84, -9, 0 }, + { 0, -11, 40, 7, 100, 2, -3 }, + { -6, 16, 104, 7, 22, -8, 0 }, + { -2, -2, 97, 7, 47, -12, 0 }, + { 0, -11, 79, 7, 72, -12, 0 }, + { 0, -12, 54, 7, 93, -6, -1 }, + { 0, -9, 29, 7, 103, 10, -5 }, + { -4, 7, 103, 7, 32, -10, 0 }, + { 0, -7, 89, 7, 58, -12, 0 }, + { 0, -12, 69, 7, 81, -10, 0 }, + { 0, -11, 43, 7, 98, 0, -2 } }, + .odd = { { -4, 9, 101, 7, 31, -9, 0 }, + { -1, -6, 91, 7, 56, -12, 0 }, + { 0, -12, 71, 7, 80, -11, 0 }, + { 0, -11, 45, 7, 97, -1, -2 }, + { 0, -7, 20, 7, 105, 17, -7 }, + { -3, 1, 100, 7, 41, -11, 0 }, + { 0, -10, 83, 7, 67, -12, 0 }, + { 0, -13, 60, 7, 89, -8, 0 }, + { 0, -10, 34, 7, 102, 6, -4 }, + { -5, 11, 104, 7, 27, -9, 0 }, + { -1, -5, 94, 7, 52, -12, 0 }, + { 0, -12, 74, 7, 77, -11, 0 }, + { 0, -12, 49, 7, 95, -3, -1 }, + { 0, -8, 24, 7, 104, 14, -6 }, + { -3, 3, 100, 7, 38, -10, 0 }, + { 0, -9, 87, 7, 63, -13, 0 }, + { 0, -13, 63, 7, 87, -9, 0 }, + { 0, -10, 38, 7, 100, 3, -3 }, + { -6, 14, 104, 7, 24, -8, 0 }, + { -1, -3, 95, 7, 49, -12, 0 }, + { 0, -11, 77, 7, 74, -12, 0 }, + { 0, -12, 52, 7, 94, -5, -1 }, + { 0, -9, 27, 7, 104, 11, -5 }, + { -4, 6, 102, 7, 34, -10, 0 }, + { 0, -8, 89, 7, 60, -13, 0 }, + { 0, -12, 67, 7, 83, -10, 0 }, + { 0, -11, 41, 7, 100, 1, -3 }, + { -7, 17, 105, 7, 20, -7, 0 }, + { -2, -1, 97, 7, 45, -11, 0 }, + { 0, -11, 80, 7, 71, -12, 0 }, + { 0, -12, 56, 7, 91, -6, -1 }, + { 0, -9, 31, 7, 101, 9, -4 } } }, + .ptrn_arr = { { 0xff9ff3ff, 0xff3fe7fc, 0xff9 } }, + .sample_patrn_length = 78, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 8) = 0.8 */ + .hor_phase_arr = { + .even = { { -8, 21, 102, 7, 21, -8, 0 }, + { -3, 0, 95, 7, 48, -12, 0 }, + { 0, -11, 75, 7, 75, -11, 0 }, + { 0, -12, 48, 7, 95, 0, -3 } }, + .odd = { { -5, 9, 100, 7, 34, -10, 0 }, + { -1, -7, 86, 7, 62, -12, 0 }, + { 0, -12, 62, 7, 86, -7, -1 }, + { 0, -10, 34, 7, 100, 9, -5 } } }, + .ver_phase_arr = { + .even = { { -8, 21, 102, 7, 21, -8, 0 }, + { -3, 0, 95, 7, 48, -12, 0 }, + { 0, -11, 75, 7, 75, -11, 0 }, + { 0, -12, 48, 7, 95, 0, -3 } }, + .odd = { { -5, 9, 100, 7, 34, -10, 0 }, + { -1, -7, 86, 7, 62, -12, 0 }, + { 0, -12, 62, 7, 86, -7, -1 }, + { 0, -10, 34, 7, 100, 9, -5 } } }, + .ptrn_arr = { { 0xff } }, + .sample_patrn_length = 10, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 9) = 0.780488 */ + .hor_phase_arr = { + .even = { { -9, 23, 100, 7, 23, -9, 0 }, + { -3, 0, 91, 7, 52, -12, 0 }, + { 0, -11, 68, 7, 80, -8, -1 }, + { 0, -11, 39, 7, 96, 9, -5 }, + { -6, 12, 98, 7, 35, -11, 0 }, + { -1, -6, 81, 7, 65, -11, 0 }, + { 0, -12, 55, 7, 89, -2, -2 }, + { 0, -9, 26, 7, 99, 20, -8 }, + { -4, 2, 93, 7, 49, -12, 0 }, + { 0, -10, 71, 7, 76, -9, 0 }, + { 0, -11, 42, 7, 95, 7, -5 }, + { -7, 14, 99, 7, 32, -10, 0 }, + { -1, -5, 84, 7, 62, -12, 0 }, + { 0, -12, 59, 7, 87, -4, -2 }, + { 0, -10, 29, 7, 99, 17, -7 }, + { -4, 4, 95, 7, 45, -12, 0 }, + { 0, -9, 72, 7, 74, -9, 0 }, + { 0, -12, 45, 7, 95, 4, -4 }, + { -7, 17, 99, 7, 29, -10, 0 }, + { -2, -4, 87, 7, 59, -12, 0 }, + { 0, -12, 62, 7, 84, -5, -1 }, + { 0, -10, 32, 7, 99, 14, -7 }, + { -5, 7, 95, 7, 42, -11, 0 }, + { 0, -9, 76, 7, 71, -10, 0 }, + { 0, -12, 49, 7, 93, 2, -4 }, + { -8, 20, 99, 7, 26, -9, 0 }, + { -2, -2, 89, 7, 55, -12, 0 }, + { 0, -11, 65, 7, 81, -6, -1 }, + { 0, -11, 35, 7, 98, 12, -6 }, + { -5, 9, 96, 7, 39, -11, 0 }, + { -1, -8, 80, 7, 68, -11, 0 }, + { 0, -12, 52, 7, 91, 0, -3 } }, + .odd = { { -6, 10, 98, 7, 37, -11, 0 }, + { -1, -7, 81, 7, 66, -11, 0 }, + { 0, -12, 54, 7, 90, -1, -3 }, + { 0, -9, 24, 7, 100, 21, -8 }, + { -3, 1, 92, 7, 50, -12, 0 }, + { 0, -10, 69, 7, 78, -8, -1 }, + { 0, -11, 40, 7, 96, 8, -5 }, + { -6, 13, 97, 7, 34, -10, 0 }, + { -1, -6, 83, 7, 63, -11, 0 }, + { 0, -12, 57, 7, 88, -3, -2 }, + { 0, -9, 27, 7, 100, 18, -8 }, + { -4, 3, 94, 7, 47, -12, 0 }, + { 0, -10, 72, 7, 75, -9, 0 }, + { 0, -11, 44, 7, 95, 5, -5 }, + { -7, 16, 98, 7, 31, -10, 0 }, + { -2, -4, 86, 7, 60, -12, 0 }, + { 0, -12, 60, 7, 86, -4, -2 }, + { 0, -10, 31, 7, 98, 16, -7 }, + { -5, 5, 95, 7, 44, -11, 0 }, + { 0, -9, 75, 7, 72, -10, 0 }, + { 0, -12, 47, 7, 94, 3, -4 }, + { -8, 18, 100, 7, 27, -9, 0 }, + { -2, -3, 88, 7, 57, -12, 0 }, + { 0, -11, 63, 7, 83, -6, -1 }, + { 0, -10, 34, 7, 97, 13, -6 }, + { -5, 8, 96, 7, 40, -11, 0 }, + { -1, -8, 78, 7, 69, -10, 0 }, + { 0, -12, 50, 7, 92, 1, -3 }, + { -8, 21, 100, 7, 24, -9, 0 }, + { -3, -1, 90, 7, 54, -12, 0 }, + { 0, -11, 66, 7, 81, -7, -1 }, + { 0, -11, 37, 7, 98, 10, -6 } } }, + .ver_phase_arr = { + .even = { { -9, 23, 100, 7, 23, -9, 0 }, + { -3, 0, 91, 7, 52, -12, 0 }, + { 0, -11, 68, 7, 80, -8, -1 }, + { 0, -11, 39, 7, 96, 9, -5 }, + { -6, 12, 98, 7, 35, -11, 0 }, + { -1, -6, 81, 7, 65, -11, 0 }, + { 0, -12, 55, 7, 89, -2, -2 }, + { 0, -9, 26, 7, 99, 20, -8 }, + { -4, 2, 93, 7, 49, -12, 0 }, + { 0, -10, 71, 7, 76, -9, 0 }, + { 0, -11, 42, 7, 95, 7, -5 }, + { -7, 14, 99, 7, 32, -10, 0 }, + { -1, -5, 84, 7, 62, -12, 0 }, + { 0, -12, 59, 7, 87, -4, -2 }, + { 0, -10, 29, 7, 99, 17, -7 }, + { -4, 4, 95, 7, 45, -12, 0 }, + { 0, -9, 72, 7, 74, -9, 0 }, + { 0, -12, 45, 7, 95, 4, -4 }, + { -7, 17, 99, 7, 29, -10, 0 }, + { -2, -4, 87, 7, 59, -12, 0 }, + { 0, -12, 62, 7, 84, -5, -1 }, + { 0, -10, 32, 7, 99, 14, -7 }, + { -5, 7, 95, 7, 42, -11, 0 }, + { 0, -9, 76, 7, 71, -10, 0 }, + { 0, -12, 49, 7, 93, 2, -4 }, + { -8, 20, 99, 7, 26, -9, 0 }, + { -2, -2, 89, 7, 55, -12, 0 }, + { 0, -11, 65, 7, 81, -6, -1 }, + { 0, -11, 35, 7, 98, 12, -6 }, + { -5, 9, 96, 7, 39, -11, 0 }, + { -1, -8, 80, 7, 68, -11, 0 }, + { 0, -12, 52, 7, 91, 0, -3 } }, + .odd = { { -6, 10, 98, 7, 37, -11, 0 }, + { -1, -7, 81, 7, 66, -11, 0 }, + { 0, -12, 54, 7, 90, -1, -3 }, + { 0, -9, 24, 7, 100, 21, -8 }, + { -3, 1, 92, 7, 50, -12, 0 }, + { 0, -10, 69, 7, 78, -8, -1 }, + { 0, -11, 40, 7, 96, 8, -5 }, + { -6, 13, 97, 7, 34, -10, 0 }, + { -1, -6, 83, 7, 63, -11, 0 }, + { 0, -12, 57, 7, 88, -3, -2 }, + { 0, -9, 27, 7, 100, 18, -8 }, + { -4, 3, 94, 7, 47, -12, 0 }, + { 0, -10, 72, 7, 75, -9, 0 }, + { 0, -11, 44, 7, 95, 5, -5 }, + { -7, 16, 98, 7, 31, -10, 0 }, + { -2, -4, 86, 7, 60, -12, 0 }, + { 0, -12, 60, 7, 86, -4, -2 }, + { 0, -10, 31, 7, 98, 16, -7 }, + { -5, 5, 95, 7, 44, -11, 0 }, + { 0, -9, 75, 7, 72, -10, 0 }, + { 0, -12, 47, 7, 94, 3, -4 }, + { -8, 18, 100, 7, 27, -9, 0 }, + { -2, -3, 88, 7, 57, -12, 0 }, + { 0, -11, 63, 7, 83, -6, -1 }, + { 0, -10, 34, 7, 97, 13, -6 }, + { -5, 8, 96, 7, 40, -11, 0 }, + { -1, -8, 78, 7, 69, -10, 0 }, + { 0, -12, 50, 7, 92, 1, -3 }, + { -8, 21, 100, 7, 24, -9, 0 }, + { -3, -1, 90, 7, 54, -12, 0 }, + { 0, -11, 66, 7, 81, -7, -1 }, + { 0, -11, 37, 7, 98, 10, -6 } } }, + .ptrn_arr = { { 0xf3f9fcff, 0x3f9fcfe7, 0xfe7f } }, + .sample_patrn_length = 82, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 10) = 0.761905 */ + .hor_phase_arr = { + .even = { { -9, 25, 96, 7, 25, -9, 0 }, + { -3, 0, 86, 7, 56, -11, 0 }, + { 0, -11, 62, 7, 82, -3, -2 }, + { 0, -10, 31, 7, 96, 19, -8 }, + { -5, 4, 92, 7, 49, -12, 0 }, + { 0, -10, 67, 7, 78, -6, -1 }, + { 0, -11, 37, 7, 95, 14, -7 }, + { -6, 9, 93, 7, 43, -11, 0 }, + { -1, -8, 73, 7, 73, -8, -1 }, + { 0, -11, 43, 7, 93, 9, -6 }, + { -7, 14, 95, 7, 37, -11, 0 }, + { -1, -6, 78, 7, 67, -10, 0 }, + { 0, -12, 49, 7, 92, 4, -5 }, + { -8, 19, 96, 7, 31, -10, 0 }, + { -2, -3, 82, 7, 62, -11, 0 }, + { 0, -11, 56, 7, 86, 0, -3 } }, + .odd = { { -6, 11, 94, 7, 40, -11, 0 }, + { -1, -7, 75, 7, 70, -9, 0 }, + { 0, -12, 46, 7, 93, 6, -5 }, + { -8, 16, 97, 7, 34, -11, 0 }, + { -2, -5, 81, 7, 64, -10, 0 }, + { 0, -12, 53, 7, 89, 2, -4 }, + { -9, 22, 97, 7, 28, -10, 0 }, + { -3, -2, 85, 7, 59, -11, 0 }, + { 0, -11, 59, 7, 85, -2, -3 }, + { 0, -10, 28, 7, 97, 22, -9 }, + { -4, 2, 89, 7, 53, -12, 0 }, + { 0, -10, 64, 7, 81, -5, -2 }, + { 0, -11, 34, 7, 97, 16, -8 }, + { -5, 6, 93, 7, 46, -12, 0 }, + { 0, -9, 70, 7, 75, -7, -1 }, + { 0, -11, 40, 7, 94, 11, -6 } } }, + .ver_phase_arr = { + .even = { { -9, 25, 96, 7, 25, -9, 0 }, + { -3, 0, 86, 7, 56, -11, 0 }, + { 0, -11, 62, 7, 82, -3, -2 }, + { 0, -10, 31, 7, 96, 19, -8 }, + { -5, 4, 92, 7, 49, -12, 0 }, + { 0, -10, 67, 7, 78, -6, -1 }, + { 0, -11, 37, 7, 95, 14, -7 }, + { -6, 9, 93, 7, 43, -11, 0 }, + { -1, -8, 73, 7, 73, -8, -1 }, + { 0, -11, 43, 7, 93, 9, -6 }, + { -7, 14, 95, 7, 37, -11, 0 }, + { -1, -6, 78, 7, 67, -10, 0 }, + { 0, -12, 49, 7, 92, 4, -5 }, + { -8, 19, 96, 7, 31, -10, 0 }, + { -2, -3, 82, 7, 62, -11, 0 }, + { 0, -11, 56, 7, 86, 0, -3 } }, + .odd = { { -6, 11, 94, 7, 40, -11, 0 }, + { -1, -7, 75, 7, 70, -9, 0 }, + { 0, -12, 46, 7, 93, 6, -5 }, + { -8, 16, 97, 7, 34, -11, 0 }, + { -2, -5, 81, 7, 64, -10, 0 }, + { 0, -12, 53, 7, 89, 2, -4 }, + { -9, 22, 97, 7, 28, -10, 0 }, + { -3, -2, 85, 7, 59, -11, 0 }, + { 0, -11, 59, 7, 85, -2, -3 }, + { 0, -10, 28, 7, 97, 22, -9 }, + { -4, 2, 89, 7, 53, -12, 0 }, + { 0, -10, 64, 7, 81, -5, -2 }, + { 0, -11, 34, 7, 97, 16, -8 }, + { -5, 6, 93, 7, 46, -12, 0 }, + { 0, -9, 70, 7, 75, -7, -1 }, + { 0, -11, 40, 7, 94, 11, -6 } } }, + .ptrn_arr = { { 0xfcfe7e7f, 0xfc } }, + .sample_patrn_length = 42, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 11) = 0.744186 */ + .hor_phase_arr = { + .even = { { -10, 26, 96, 7, 26, -10, 0 }, + { -4, 0, 83, 7, 59, -10, 0 }, + { 0, -11, 56, 7, 85, 2, -4 }, + { -9, 23, 95, 7, 29, -10, 0 }, + { -3, -2, 82, 7, 61, -10, 0 }, + { 0, -11, 53, 7, 87, 4, -5 }, + { -9, 21, 94, 7, 32, -10, 0 }, + { -3, -3, 79, 7, 64, -9, 0 }, + { 0, -11, 50, 7, 88, 6, -5 }, + { -8, 18, 94, 7, 35, -11, 0 }, + { -2, -5, 78, 7, 67, -9, -1 }, + { 0, -11, 47, 7, 90, 8, -6 }, + { -8, 15, 94, 7, 38, -11, 0 }, + { -2, -6, 75, 7, 70, -8, -1 }, + { 0, -11, 44, 7, 92, 10, -7 }, + { -7, 13, 92, 7, 41, -11, 0 }, + { -1, -7, 72, 7, 72, -7, -1 }, + { 0, -11, 41, 7, 92, 13, -7 }, + { -7, 10, 92, 7, 44, -11, 0 }, + { -1, -8, 70, 7, 75, -6, -2 }, + { 0, -11, 38, 7, 94, 15, -8 }, + { -6, 8, 90, 7, 47, -11, 0 }, + { -1, -9, 67, 7, 78, -5, -2 }, + { 0, -11, 35, 7, 94, 18, -8 }, + { -5, 6, 88, 7, 50, -11, 0 }, + { 0, -9, 64, 7, 79, -3, -3 }, + { 0, -10, 32, 7, 94, 21, -9 }, + { -5, 4, 87, 7, 53, -11, 0 }, + { 0, -10, 61, 7, 82, -2, -3 }, + { 0, -10, 29, 7, 95, 23, -9 }, + { -4, 2, 85, 7, 56, -11, 0 }, + { 0, -10, 59, 7, 83, 0, -4 } }, + .odd = { { -7, 12, 92, 7, 42, -11, 0 }, + { -1, -7, 71, 7, 72, -6, -1 }, + { 0, -11, 39, 7, 93, 14, -7 }, + { -6, 9, 91, 7, 45, -11, 0 }, + { -1, -8, 68, 7, 76, -5, -2 }, + { 0, -11, 36, 7, 94, 17, -8 }, + { -6, 7, 90, 7, 48, -11, 0 }, + { 0, -9, 66, 7, 77, -4, -2 }, + { 0, -11, 33, 7, 96, 19, -9 }, + { -5, 5, 88, 7, 51, -11, 0 }, + { 0, -10, 63, 7, 80, -2, -3 }, + { 0, -10, 31, 7, 94, 22, -9 }, + { -5, 3, 87, 7, 54, -11, 0 }, + { 0, -10, 60, 7, 82, -1, -3 }, + { 0, -10, 28, 7, 94, 25, -9 }, + { -4, 1, 85, 7, 57, -11, 0 }, + { 0, -11, 57, 7, 85, 1, -4 }, + { -9, 25, 94, 7, 28, -10, 0 }, + { -3, -1, 82, 7, 60, -10, 0 }, + { 0, -11, 54, 7, 87, 3, -5 }, + { -9, 22, 94, 7, 31, -10, 0 }, + { -3, -2, 80, 7, 63, -10, 0 }, + { 0, -11, 51, 7, 88, 5, -5 }, + { -9, 19, 96, 7, 33, -11, 0 }, + { -2, -4, 77, 7, 66, -9, 0 }, + { 0, -11, 48, 7, 90, 7, -6 }, + { -8, 17, 94, 7, 36, -11, 0 }, + { -2, -5, 76, 7, 68, -8, -1 }, + { 0, -11, 45, 7, 91, 9, -6 }, + { -7, 14, 93, 7, 39, -11, 0 }, + { -1, -6, 72, 7, 71, -7, -1 }, + { 0, -11, 42, 7, 92, 12, -7 } } }, + .ver_phase_arr = { + .even = { { -10, 26, 96, 7, 26, -10, 0 }, + { -4, 0, 83, 7, 59, -10, 0 }, + { 0, -11, 56, 7, 85, 2, -4 }, + { -9, 23, 95, 7, 29, -10, 0 }, + { -3, -2, 82, 7, 61, -10, 0 }, + { 0, -11, 53, 7, 87, 4, -5 }, + { -9, 21, 94, 7, 32, -10, 0 }, + { -3, -3, 79, 7, 64, -9, 0 }, + { 0, -11, 50, 7, 88, 6, -5 }, + { -8, 18, 94, 7, 35, -11, 0 }, + { -2, -5, 78, 7, 67, -9, -1 }, + { 0, -11, 47, 7, 90, 8, -6 }, + { -8, 15, 94, 7, 38, -11, 0 }, + { -2, -6, 75, 7, 70, -8, -1 }, + { 0, -11, 44, 7, 92, 10, -7 }, + { -7, 13, 92, 7, 41, -11, 0 }, + { -1, -7, 72, 7, 72, -7, -1 }, + { 0, -11, 41, 7, 92, 13, -7 }, + { -7, 10, 92, 7, 44, -11, 0 }, + { -1, -8, 70, 7, 75, -6, -2 }, + { 0, -11, 38, 7, 94, 15, -8 }, + { -6, 8, 90, 7, 47, -11, 0 }, + { -1, -9, 67, 7, 78, -5, -2 }, + { 0, -11, 35, 7, 94, 18, -8 }, + { -5, 6, 88, 7, 50, -11, 0 }, + { 0, -9, 64, 7, 79, -3, -3 }, + { 0, -10, 32, 7, 94, 21, -9 }, + { -5, 4, 87, 7, 53, -11, 0 }, + { 0, -10, 61, 7, 82, -2, -3 }, + { 0, -10, 29, 7, 95, 23, -9 }, + { -4, 2, 85, 7, 56, -11, 0 }, + { 0, -10, 59, 7, 83, 0, -4 } }, + .odd = { { -7, 12, 92, 7, 42, -11, 0 }, + { -1, -7, 71, 7, 72, -6, -1 }, + { 0, -11, 39, 7, 93, 14, -7 }, + { -6, 9, 91, 7, 45, -11, 0 }, + { -1, -8, 68, 7, 76, -5, -2 }, + { 0, -11, 36, 7, 94, 17, -8 }, + { -6, 7, 90, 7, 48, -11, 0 }, + { 0, -9, 66, 7, 77, -4, -2 }, + { 0, -11, 33, 7, 96, 19, -9 }, + { -5, 5, 88, 7, 51, -11, 0 }, + { 0, -10, 63, 7, 80, -2, -3 }, + { 0, -10, 31, 7, 94, 22, -9 }, + { -5, 3, 87, 7, 54, -11, 0 }, + { 0, -10, 60, 7, 82, -1, -3 }, + { 0, -10, 28, 7, 94, 25, -9 }, + { -4, 1, 85, 7, 57, -11, 0 }, + { 0, -11, 57, 7, 85, 1, -4 }, + { -9, 25, 94, 7, 28, -10, 0 }, + { -3, -1, 82, 7, 60, -10, 0 }, + { 0, -11, 54, 7, 87, 3, -5 }, + { -9, 22, 94, 7, 31, -10, 0 }, + { -3, -2, 80, 7, 63, -10, 0 }, + { 0, -11, 51, 7, 88, 5, -5 }, + { -9, 19, 96, 7, 33, -11, 0 }, + { -2, -4, 77, 7, 66, -9, 0 }, + { 0, -11, 48, 7, 90, 7, -6 }, + { -8, 17, 94, 7, 36, -11, 0 }, + { -2, -5, 76, 7, 68, -8, -1 }, + { 0, -11, 45, 7, 91, 9, -6 }, + { -7, 14, 93, 7, 39, -11, 0 }, + { -1, -6, 72, 7, 71, -7, -1 }, + { 0, -11, 42, 7, 92, 12, -7 } } }, + .ptrn_arr = { { 0x3f3f3f3f, 0x9f9f9f3f, 0xf9f9f } }, + .sample_patrn_length = 86, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 12) = 0.727273 */ + .hor_phase_arr = { + .even = { { -10, 28, 92, 7, 28, -10, 0 }, + { -4, 0, 81, 7, 61, -9, -1 }, + { 0, -11, 50, 7, 87, 8, -6 }, + { -8, 17, 91, 7, 39, -11, 0 }, + { -2, -6, 72, 7, 72, -6, -2 }, + { 0, -11, 39, 7, 91, 17, -8 }, + { -6, 8, 87, 7, 50, -11, 0 }, + { -1, -9, 61, 7, 81, 0, -4 } }, + .odd = { { -7, 12, 89, 7, 45, -11, 0 }, + { -1, -8, 67, 7, 76, -3, -3 }, + { 0, -11, 33, 7, 93, 22, -9 }, + { -5, 4, 83, 7, 56, -10, 0 }, + { 0, -10, 56, 7, 83, 4, -5 }, + { -9, 22, 93, 7, 33, -11, 0 }, + { -3, -3, 76, 7, 67, -8, -1 }, + { 0, -11, 45, 7, 89, 12, -7 } } }, + .ver_phase_arr = { + .even = { { -10, 28, 92, 7, 28, -10, 0 }, + { -4, 0, 81, 7, 61, -9, -1 }, + { 0, -11, 50, 7, 87, 8, -6 }, + { -8, 17, 91, 7, 39, -11, 0 }, + { -2, -6, 72, 7, 72, -6, -2 }, + { 0, -11, 39, 7, 91, 17, -8 }, + { -6, 8, 87, 7, 50, -11, 0 }, + { -1, -9, 61, 7, 81, 0, -4 } }, + .odd = { { -7, 12, 89, 7, 45, -11, 0 }, + { -1, -8, 67, 7, 76, -3, -3 }, + { 0, -11, 33, 7, 93, 22, -9 }, + { -5, 4, 83, 7, 56, -10, 0 }, + { 0, -10, 56, 7, 83, 4, -5 }, + { -9, 22, 93, 7, 33, -11, 0 }, + { -3, -3, 76, 7, 67, -8, -1 }, + { 0, -11, 45, 7, 89, 12, -7 } } }, + .ptrn_arr = { { 0xf9f3f } }, + .sample_patrn_length = 22, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 13) = 0.711111 */ + .hor_phase_arr = { + .even = { { -10, 29, 90, 7, 29, -10, 0 }, + { -4, 0, 76, 7, 64, -7, -1 }, + { 0, -11, 45, 7, 88, 14, -8 }, + { -7, 12, 85, 7, 48, -10, 0 }, + { -1, -8, 61, 7, 79, 2, -5 }, + { -10, 26, 90, 7, 32, -10, 0 }, + { -4, -2, 76, 7, 66, -6, -2 }, + { 0, -11, 42, 7, 89, 16, -8 }, + { -7, 10, 84, 7, 51, -10, 0 }, + { -1, -9, 59, 7, 81, 3, -5 }, + { -10, 24, 91, 7, 34, -11, 0 }, + { -3, -3, 72, 7, 69, -5, -2 }, + { 0, -11, 40, 7, 89, 19, -9 }, + { -6, 7, 84, 7, 53, -10, 0 }, + { -1, -9, 56, 7, 83, 5, -6 }, + { -9, 21, 90, 7, 37, -11, 0 }, + { -3, -4, 71, 7, 71, -4, -3 }, + { 0, -11, 37, 7, 90, 21, -9 }, + { -6, 5, 83, 7, 56, -9, -1 }, + { 0, -10, 53, 7, 84, 7, -6 }, + { -9, 19, 89, 7, 40, -11, 0 }, + { -2, -5, 69, 7, 72, -3, -3 }, + { 0, -11, 34, 7, 91, 24, -10 }, + { -5, 3, 81, 7, 59, -9, -1 }, + { 0, -10, 51, 7, 84, 10, -7 }, + { -8, 16, 89, 7, 42, -11, 0 }, + { -2, -6, 66, 7, 76, -2, -4 }, + { 0, -10, 32, 7, 90, 26, -10 }, + { -5, 2, 79, 7, 61, -8, -1 }, + { 0, -10, 48, 7, 85, 12, -7 }, + { -8, 14, 88, 7, 45, -11, 0 }, + { -1, -7, 64, 7, 76, 0, -4 } }, + .odd = { { -8, 13, 88, 7, 46, -11, 0 }, + { -1, -8, 63, 7, 78, 1, -5 }, + { -10, 28, 90, 7, 30, -10, 0 }, + { -4, -1, 77, 7, 65, -7, -2 }, + { 0, -11, 44, 7, 88, 15, -8 }, + { -7, 11, 85, 7, 49, -10, 0 }, + { -1, -8, 60, 7, 79, 3, -5 }, + { -10, 25, 91, 7, 33, -11, 0 }, + { -4, -2, 74, 7, 68, -6, -2 }, + { 0, -11, 41, 7, 89, 18, -9 }, + { -7, 8, 85, 7, 52, -10, 0 }, + { -1, -9, 57, 7, 83, 4, -6 }, + { -9, 22, 90, 7, 36, -11, 0 }, + { -3, -4, 73, 7, 70, -5, -3 }, + { 0, -11, 38, 7, 90, 20, -9 }, + { -6, 6, 83, 7, 55, -10, 0 }, + { 0, -10, 55, 7, 83, 6, -6 }, + { -9, 20, 90, 7, 38, -11, 0 }, + { -3, -5, 70, 7, 73, -4, -3 }, + { 0, -11, 36, 7, 90, 22, -9 }, + { -6, 4, 83, 7, 57, -9, -1 }, + { 0, -10, 52, 7, 85, 8, -7 }, + { -9, 18, 89, 7, 41, -11, 0 }, + { -2, -6, 68, 7, 74, -2, -4 }, + { 0, -11, 33, 7, 91, 25, -10 }, + { -5, 3, 79, 7, 60, -8, -1 }, + { 0, -10, 49, 7, 85, 11, -7 }, + { -8, 15, 88, 7, 44, -11, 0 }, + { -2, -7, 65, 7, 77, -1, -4 }, + { 0, -10, 30, 7, 90, 28, -10 }, + { -5, 1, 78, 7, 63, -8, -1 }, + { 0, -11, 46, 7, 88, 13, -8 } } }, + .ver_phase_arr = { + .even = { { -10, 29, 90, 7, 29, -10, 0 }, + { -4, 0, 76, 7, 64, -7, -1 }, + { 0, -11, 45, 7, 88, 14, -8 }, + { -7, 12, 85, 7, 48, -10, 0 }, + { -1, -8, 61, 7, 79, 2, -5 }, + { -10, 26, 90, 7, 32, -10, 0 }, + { -4, -2, 76, 7, 66, -6, -2 }, + { 0, -11, 42, 7, 89, 16, -8 }, + { -7, 10, 84, 7, 51, -10, 0 }, + { -1, -9, 59, 7, 81, 3, -5 }, + { -10, 24, 91, 7, 34, -11, 0 }, + { -3, -3, 72, 7, 69, -5, -2 }, + { 0, -11, 40, 7, 89, 19, -9 }, + { -6, 7, 84, 7, 53, -10, 0 }, + { -1, -9, 56, 7, 83, 5, -6 }, + { -9, 21, 90, 7, 37, -11, 0 }, + { -3, -4, 71, 7, 71, -4, -3 }, + { 0, -11, 37, 7, 90, 21, -9 }, + { -6, 5, 83, 7, 56, -9, -1 }, + { 0, -10, 53, 7, 84, 7, -6 }, + { -9, 19, 89, 7, 40, -11, 0 }, + { -2, -5, 69, 7, 72, -3, -3 }, + { 0, -11, 34, 7, 91, 24, -10 }, + { -5, 3, 81, 7, 59, -9, -1 }, + { 0, -10, 51, 7, 84, 10, -7 }, + { -8, 16, 89, 7, 42, -11, 0 }, + { -2, -6, 66, 7, 76, -2, -4 }, + { 0, -10, 32, 7, 90, 26, -10 }, + { -5, 2, 79, 7, 61, -8, -1 }, + { 0, -10, 48, 7, 85, 12, -7 }, + { -8, 14, 88, 7, 45, -11, 0 }, + { -1, -7, 64, 7, 76, 0, -4 } }, + .odd = { { -8, 13, 88, 7, 46, -11, 0 }, + { -1, -8, 63, 7, 78, 1, -5 }, + { -10, 28, 90, 7, 30, -10, 0 }, + { -4, -1, 77, 7, 65, -7, -2 }, + { 0, -11, 44, 7, 88, 15, -8 }, + { -7, 11, 85, 7, 49, -10, 0 }, + { -1, -8, 60, 7, 79, 3, -5 }, + { -10, 25, 91, 7, 33, -11, 0 }, + { -4, -2, 74, 7, 68, -6, -2 }, + { 0, -11, 41, 7, 89, 18, -9 }, + { -7, 8, 85, 7, 52, -10, 0 }, + { -1, -9, 57, 7, 83, 4, -6 }, + { -9, 22, 90, 7, 36, -11, 0 }, + { -3, -4, 73, 7, 70, -5, -3 }, + { 0, -11, 38, 7, 90, 20, -9 }, + { -6, 6, 83, 7, 55, -10, 0 }, + { 0, -10, 55, 7, 83, 6, -6 }, + { -9, 20, 90, 7, 38, -11, 0 }, + { -3, -5, 70, 7, 73, -4, -3 }, + { 0, -11, 36, 7, 90, 22, -9 }, + { -6, 4, 83, 7, 57, -9, -1 }, + { 0, -10, 52, 7, 85, 8, -7 }, + { -9, 18, 89, 7, 41, -11, 0 }, + { -2, -6, 68, 7, 74, -2, -4 }, + { 0, -11, 33, 7, 91, 25, -10 }, + { -5, 3, 79, 7, 60, -8, -1 }, + { 0, -10, 49, 7, 85, 11, -7 }, + { -8, 15, 88, 7, 44, -11, 0 }, + { -2, -7, 65, 7, 77, -1, -4 }, + { 0, -10, 30, 7, 90, 28, -10 }, + { -5, 1, 78, 7, 63, -8, -1 }, + { 0, -11, 46, 7, 88, 13, -8 } } }, + .ptrn_arr = { { 0xf3e7cf9f, 0x9f3e7cf9, 0xf3e7cf } }, + .sample_patrn_length = 90, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 14) = 0.695652 */ + .hor_phase_arr = { + .even = { { -10, 30, 88, 7, 30, -10, 0 }, + { -5, 0, 75, 7, 66, -5, -3 }, + { 0, -10, 40, 7, 87, 20, -9 }, + { -7, 7, 81, 7, 56, -8, -1 }, + { 0, -9, 51, 7, 83, 11, -8 }, + { -8, 16, 84, 7, 46, -10, 0 }, + { -2, -7, 61, 7, 79, 3, -6 }, + { -10, 25, 88, 7, 35, -10, 0 }, + { -4, -3, 72, 7, 70, -3, -4 }, + { 0, -10, 35, 7, 88, 25, -10 }, + { -6, 3, 79, 7, 61, -7, -2 }, + { 0, -10, 46, 7, 84, 16, -8 }, + { -8, 11, 83, 7, 51, -9, 0 }, + { -1, -8, 56, 7, 81, 7, -7 }, + { -9, 20, 87, 7, 40, -10, 0 }, + { -3, -5, 66, 7, 75, 0, -5 } }, + .odd = { { -8, 13, 85, 7, 48, -10, 0 }, + { -1, -8, 59, 7, 79, 5, -6 }, + { -10, 23, 87, 7, 38, -10, 0 }, + { -3, -4, 68, 7, 72, -1, -4 }, + { 0, -10, 33, 7, 87, 28, -10 }, + { -5, 2, 75, 7, 64, -6, -2 }, + { 0, -10, 43, 7, 86, 18, -9 }, + { -7, 9, 83, 7, 53, -9, -1 }, + { -1, -9, 53, 7, 83, 9, -7 }, + { -9, 18, 86, 7, 43, -10, 0 }, + { -2, -6, 64, 7, 75, 2, -5 }, + { -10, 28, 87, 7, 33, -10, 0 }, + { -4, -1, 72, 7, 68, -4, -3 }, + { 0, -10, 38, 7, 87, 23, -10 }, + { -6, 5, 79, 7, 59, -8, -1 }, + { 0, -10, 48, 7, 85, 13, -8 } } }, + .ver_phase_arr = { + .even = { { -10, 30, 88, 7, 30, -10, 0 }, + { -5, 0, 75, 7, 66, -5, -3 }, + { 0, -10, 40, 7, 87, 20, -9 }, + { -7, 7, 81, 7, 56, -8, -1 }, + { 0, -9, 51, 7, 83, 11, -8 }, + { -8, 16, 84, 7, 46, -10, 0 }, + { -2, -7, 61, 7, 79, 3, -6 }, + { -10, 25, 88, 7, 35, -10, 0 }, + { -4, -3, 72, 7, 70, -3, -4 }, + { 0, -10, 35, 7, 88, 25, -10 }, + { -6, 3, 79, 7, 61, -7, -2 }, + { 0, -10, 46, 7, 84, 16, -8 }, + { -8, 11, 83, 7, 51, -9, 0 }, + { -1, -8, 56, 7, 81, 7, -7 }, + { -9, 20, 87, 7, 40, -10, 0 }, + { -3, -5, 66, 7, 75, 0, -5 } }, + .odd = { { -8, 13, 85, 7, 48, -10, 0 }, + { -1, -8, 59, 7, 79, 5, -6 }, + { -10, 23, 87, 7, 38, -10, 0 }, + { -3, -4, 68, 7, 72, -1, -4 }, + { 0, -10, 33, 7, 87, 28, -10 }, + { -5, 2, 75, 7, 64, -6, -2 }, + { 0, -10, 43, 7, 86, 18, -9 }, + { -7, 9, 83, 7, 53, -9, -1 }, + { -1, -9, 53, 7, 83, 9, -7 }, + { -9, 18, 86, 7, 43, -10, 0 }, + { -2, -6, 64, 7, 75, 2, -5 }, + { -10, 28, 87, 7, 33, -10, 0 }, + { -4, -1, 72, 7, 68, -4, -3 }, + { 0, -10, 38, 7, 87, 23, -10 }, + { -6, 5, 79, 7, 59, -8, -1 }, + { 0, -10, 48, 7, 85, 13, -8 } } }, + .ptrn_arr = { { 0x79f3cf9f, 0xf3e } }, + .sample_patrn_length = 46, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 15) = 0.680851 */ + .hor_phase_arr = { + .even = { { -10, 31, 86, 7, 31, -10, 0 }, + { -5, 0, 72, 7, 68, -3, -4 }, + { 0, -10, 36, 7, 86, 26, -10 }, + { -6, 3, 76, 7, 63, -5, -3 }, + { 0, -10, 41, 7, 85, 21, -9 }, + { -7, 7, 78, 7, 59, -7, -2 }, + { 0, -10, 46, 7, 84, 17, -9 }, + { -8, 11, 80, 7, 54, -8, -1 }, + { -1, -9, 51, 7, 82, 13, -8 }, + { -9, 15, 83, 7, 49, -9, -1 }, + { -2, -8, 56, 7, 80, 9, -7 }, + { -9, 19, 85, 7, 43, -10, 0 }, + { -3, -6, 61, 7, 77, 5, -6 }, + { -10, 24, 86, 7, 38, -10, 0 }, + { -3, -4, 66, 7, 72, 2, -5 }, + { -10, 29, 86, 7, 33, -10, 0 }, + { -4, -1, 68, 7, 70, -1, -4 }, + { 0, -10, 33, 7, 86, 29, -10 }, + { -5, 2, 72, 7, 66, -4, -3 }, + { 0, -10, 38, 7, 86, 24, -10 }, + { -6, 5, 77, 7, 61, -6, -3 }, + { 0, -10, 43, 7, 85, 19, -9 }, + { -7, 9, 80, 7, 56, -8, -2 }, + { -1, -9, 49, 7, 83, 15, -9 }, + { -8, 13, 82, 7, 51, -9, -1 }, + { -1, -8, 54, 7, 80, 11, -8 }, + { -9, 17, 84, 7, 46, -10, 0 }, + { -2, -7, 59, 7, 78, 7, -7 }, + { -9, 21, 85, 7, 41, -10, 0 }, + { -3, -5, 63, 7, 76, 3, -6 }, + { -10, 26, 86, 7, 36, -10, 0 }, + { -4, -3, 68, 7, 72, 0, -5 } }, + .odd = { { -8, 14, 82, 7, 50, -9, -1 }, + { -1, -8, 55, 7, 79, 10, -7 }, + { -9, 18, 84, 7, 45, -10, 0 }, + { -2, -6, 60, 7, 77, 6, -7 }, + { -10, 23, 85, 7, 40, -10, 0 }, + { -3, -4, 64, 7, 75, 2, -6 }, + { -10, 27, 86, 7, 35, -10, 0 }, + { -4, -2, 69, 7, 71, -1, -5 }, + { 0, -10, 32, 7, 86, 30, -10 }, + { -5, 1, 72, 7, 67, -3, -4 }, + { 0, -10, 37, 7, 86, 25, -10 }, + { -6, 4, 77, 7, 62, -6, -3 }, + { 0, -10, 42, 7, 85, 20, -9 }, + { -7, 8, 79, 7, 57, -7, -2 }, + { -1, -9, 47, 7, 84, 16, -9 }, + { -8, 12, 81, 7, 52, -8, -1 }, + { -1, -8, 52, 7, 81, 12, -8 }, + { -9, 16, 84, 7, 47, -9, -1 }, + { -2, -7, 57, 7, 79, 8, -7 }, + { -9, 20, 85, 7, 42, -10, 0 }, + { -3, -6, 62, 7, 77, 4, -6 }, + { -10, 25, 86, 7, 37, -10, 0 }, + { -4, -3, 67, 7, 72, 1, -5 }, + { -10, 30, 86, 7, 32, -10, 0 }, + { -5, -1, 71, 7, 69, -2, -4 }, + { 0, -10, 35, 7, 86, 27, -10 }, + { -6, 2, 75, 7, 64, -4, -3 }, + { 0, -10, 40, 7, 85, 23, -10 }, + { -7, 6, 77, 7, 60, -6, -2 }, + { 0, -10, 45, 7, 84, 18, -9 }, + { -7, 10, 79, 7, 55, -8, -1 }, + { -1, -9, 50, 7, 82, 14, -8 } } }, + .ver_phase_arr = { + .even = { { -10, 31, 86, 7, 31, -10, 0 }, + { -5, 0, 72, 7, 68, -3, -4 }, + { 0, -10, 36, 7, 86, 26, -10 }, + { -6, 3, 76, 7, 63, -5, -3 }, + { 0, -10, 41, 7, 85, 21, -9 }, + { -7, 7, 78, 7, 59, -7, -2 }, + { 0, -10, 46, 7, 84, 17, -9 }, + { -8, 11, 80, 7, 54, -8, -1 }, + { -1, -9, 51, 7, 82, 13, -8 }, + { -9, 15, 83, 7, 49, -9, -1 }, + { -2, -8, 56, 7, 80, 9, -7 }, + { -9, 19, 85, 7, 43, -10, 0 }, + { -3, -6, 61, 7, 77, 5, -6 }, + { -10, 24, 86, 7, 38, -10, 0 }, + { -3, -4, 66, 7, 72, 2, -5 }, + { -10, 29, 86, 7, 33, -10, 0 }, + { -4, -1, 68, 7, 70, -1, -4 }, + { 0, -10, 33, 7, 86, 29, -10 }, + { -5, 2, 72, 7, 66, -4, -3 }, + { 0, -10, 38, 7, 86, 24, -10 }, + { -6, 5, 77, 7, 61, -6, -3 }, + { 0, -10, 43, 7, 85, 19, -9 }, + { -7, 9, 80, 7, 56, -8, -2 }, + { -1, -9, 49, 7, 83, 15, -9 }, + { -8, 13, 82, 7, 51, -9, -1 }, + { -1, -8, 54, 7, 80, 11, -8 }, + { -9, 17, 84, 7, 46, -10, 0 }, + { -2, -7, 59, 7, 78, 7, -7 }, + { -9, 21, 85, 7, 41, -10, 0 }, + { -3, -5, 63, 7, 76, 3, -6 }, + { -10, 26, 86, 7, 36, -10, 0 }, + { -4, -3, 68, 7, 72, 0, -5 } }, + .odd = { { -8, 14, 82, 7, 50, -9, -1 }, + { -1, -8, 55, 7, 79, 10, -7 }, + { -9, 18, 84, 7, 45, -10, 0 }, + { -2, -6, 60, 7, 77, 6, -7 }, + { -10, 23, 85, 7, 40, -10, 0 }, + { -3, -4, 64, 7, 75, 2, -6 }, + { -10, 27, 86, 7, 35, -10, 0 }, + { -4, -2, 69, 7, 71, -1, -5 }, + { 0, -10, 32, 7, 86, 30, -10 }, + { -5, 1, 72, 7, 67, -3, -4 }, + { 0, -10, 37, 7, 86, 25, -10 }, + { -6, 4, 77, 7, 62, -6, -3 }, + { 0, -10, 42, 7, 85, 20, -9 }, + { -7, 8, 79, 7, 57, -7, -2 }, + { -1, -9, 47, 7, 84, 16, -9 }, + { -8, 12, 81, 7, 52, -8, -1 }, + { -1, -8, 52, 7, 81, 12, -8 }, + { -9, 16, 84, 7, 47, -9, -1 }, + { -2, -7, 57, 7, 79, 8, -7 }, + { -9, 20, 85, 7, 42, -10, 0 }, + { -3, -6, 62, 7, 77, 4, -6 }, + { -10, 25, 86, 7, 37, -10, 0 }, + { -4, -3, 67, 7, 72, 1, -5 }, + { -10, 30, 86, 7, 32, -10, 0 }, + { -5, -1, 71, 7, 69, -2, -4 }, + { 0, -10, 35, 7, 86, 27, -10 }, + { -6, 2, 75, 7, 64, -4, -3 }, + { 0, -10, 40, 7, 85, 23, -10 }, + { -7, 6, 77, 7, 60, -6, -2 }, + { 0, -10, 45, 7, 84, 18, -9 }, + { -7, 10, 79, 7, 55, -8, -1 }, + { -1, -9, 50, 7, 82, 14, -8 } } }, + .ptrn_arr = { { 0x3cf9e79f, 0x9e79f3cf, 0xf3cf3e7 } }, + .sample_patrn_length = 94, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 16) = 0.666667 */ + .hor_phase_arr = { + .even = { { -10, 32, 84, 7, 32, -10, 0 }, + { -5, 0, 69, 7, 69, 0, -5 } }, + .odd = { { -9, 14, 82, 7, 51, -8, -2 }, + { -2, -8, 51, 7, 82, 14, -9 } } }, + .ver_phase_arr = { + .even = { { -10, 32, 84, 7, 32, -10, 0 }, + { -5, 0, 69, 7, 69, 0, -5 } }, + .odd = { { -9, 14, 82, 7, 51, -8, -2 }, + { -2, -8, 51, 7, 82, 14, -9 } } }, + .ptrn_arr = { { 0xf } }, + .sample_patrn_length = 6, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 17) = 0.653061 */ + .hor_phase_arr = { + .even = { { -10, 33, 82, 7, 33, -10, 0 }, + { -5, 0, 66, 7, 70, 3, -6 }, + { -10, 28, 82, 7, 37, -9, 0 }, + { -4, -3, 62, 7, 74, 6, -7 }, + { -10, 24, 82, 7, 42, -9, -1 }, + { -3, -5, 58, 7, 76, 10, -8 }, + { -9, 20, 79, 7, 47, -8, -1 }, + { -3, -6, 54, 7, 78, 14, -9 }, + { -9, 16, 79, 7, 51, -7, -2 }, + { -2, -8, 49, 7, 80, 18, -9 }, + { -8, 12, 77, 7, 56, -6, -3 }, + { -1, -9, 44, 7, 81, 22, -9 }, + { -7, 8, 75, 7, 60, -4, -4 }, + { -1, -9, 40, 7, 82, 26, -10 }, + { -7, 5, 71, 7, 65, -1, -5 }, + { 0, -10, 35, 7, 83, 30, -10 }, + { -6, 1, 70, 7, 68, 1, -6 }, + { -10, 30, 83, 7, 35, -10, 0 }, + { -5, -1, 65, 7, 71, 5, -7 }, + { -10, 26, 82, 7, 40, -9, -1 }, + { -4, -4, 60, 7, 75, 8, -7 }, + { -9, 22, 81, 7, 44, -9, -1 }, + { -3, -6, 56, 7, 77, 12, -8 }, + { -9, 18, 80, 7, 49, -8, -2 }, + { -2, -7, 51, 7, 79, 16, -9 }, + { -9, 14, 78, 7, 54, -6, -3 }, + { -1, -8, 47, 7, 79, 20, -9 }, + { -8, 10, 76, 7, 58, -5, -3 }, + { -1, -9, 42, 7, 82, 24, -10 }, + { -7, 6, 74, 7, 62, -3, -4 }, + { 0, -9, 37, 7, 82, 28, -10 }, + { -6, 3, 70, 7, 66, 0, -5 } }, + .odd = { { -9, 15, 79, 7, 52, -7, -2 }, + { -2, -8, 48, 7, 80, 19, -9 }, + { -8, 11, 76, 7, 57, -5, -3 }, + { -1, -9, 43, 7, 82, 23, -10 }, + { -7, 7, 74, 7, 61, -3, -4 }, + { -1, -9, 38, 7, 83, 27, -10 }, + { -6, 4, 70, 7, 66, -1, -5 }, + { 0, -10, 34, 7, 83, 31, -10 }, + { -6, 1, 67, 7, 70, 2, -6 }, + { -10, 29, 83, 7, 36, -10, 0 }, + { -5, -2, 64, 7, 73, 5, -7 }, + { -10, 25, 82, 7, 41, -9, -1 }, + { -4, -4, 59, 7, 76, 9, -8 }, + { -9, 21, 80, 7, 45, -8, -1 }, + { -3, -6, 55, 7, 77, 13, -8 }, + { -9, 17, 79, 7, 50, -7, -2 }, + { -2, -7, 50, 7, 79, 17, -9 }, + { -8, 13, 77, 7, 55, -6, -3 }, + { -1, -8, 45, 7, 80, 21, -9 }, + { -8, 9, 76, 7, 59, -4, -4 }, + { -1, -9, 41, 7, 82, 25, -10 }, + { -7, 5, 73, 7, 64, -2, -5 }, + { 0, -10, 36, 7, 83, 29, -10 }, + { -6, 2, 70, 7, 67, 1, -6 }, + { -10, 31, 83, 7, 34, -10, 0 }, + { -5, -1, 66, 7, 70, 4, -6 }, + { -10, 27, 83, 7, 38, -9, -1 }, + { -4, -3, 61, 7, 74, 7, -7 }, + { -10, 23, 82, 7, 43, -9, -1 }, + { -3, -5, 57, 7, 76, 11, -8 }, + { -9, 19, 80, 7, 48, -8, -2 }, + { -2, -7, 52, 7, 79, 15, -9 } } }, + .ver_phase_arr = { + .even = { { -10, 33, 82, 7, 33, -10, 0 }, + { -5, 0, 66, 7, 70, 3, -6 }, + { -10, 28, 82, 7, 37, -9, 0 }, + { -4, -3, 62, 7, 74, 6, -7 }, + { -10, 24, 82, 7, 42, -9, -1 }, + { -3, -5, 58, 7, 76, 10, -8 }, + { -9, 20, 79, 7, 47, -8, -1 }, + { -3, -6, 54, 7, 78, 14, -9 }, + { -9, 16, 79, 7, 51, -7, -2 }, + { -2, -8, 49, 7, 80, 18, -9 }, + { -8, 12, 77, 7, 56, -6, -3 }, + { -1, -9, 44, 7, 81, 22, -9 }, + { -7, 8, 75, 7, 60, -4, -4 }, + { -1, -9, 40, 7, 82, 26, -10 }, + { -7, 5, 71, 7, 65, -1, -5 }, + { 0, -10, 35, 7, 83, 30, -10 }, + { -6, 1, 70, 7, 68, 1, -6 }, + { -10, 30, 83, 7, 35, -10, 0 }, + { -5, -1, 65, 7, 71, 5, -7 }, + { -10, 26, 82, 7, 40, -9, -1 }, + { -4, -4, 60, 7, 75, 8, -7 }, + { -9, 22, 81, 7, 44, -9, -1 }, + { -3, -6, 56, 7, 77, 12, -8 }, + { -9, 18, 80, 7, 49, -8, -2 }, + { -2, -7, 51, 7, 79, 16, -9 }, + { -9, 14, 78, 7, 54, -6, -3 }, + { -1, -8, 47, 7, 79, 20, -9 }, + { -8, 10, 76, 7, 58, -5, -3 }, + { -1, -9, 42, 7, 82, 24, -10 }, + { -7, 6, 74, 7, 62, -3, -4 }, + { 0, -9, 37, 7, 82, 28, -10 }, + { -6, 3, 70, 7, 66, 0, -5 } }, + .odd = { { -9, 15, 79, 7, 52, -7, -2 }, + { -2, -8, 48, 7, 80, 19, -9 }, + { -8, 11, 76, 7, 57, -5, -3 }, + { -1, -9, 43, 7, 82, 23, -10 }, + { -7, 7, 74, 7, 61, -3, -4 }, + { -1, -9, 38, 7, 83, 27, -10 }, + { -6, 4, 70, 7, 66, -1, -5 }, + { 0, -10, 34, 7, 83, 31, -10 }, + { -6, 1, 67, 7, 70, 2, -6 }, + { -10, 29, 83, 7, 36, -10, 0 }, + { -5, -2, 64, 7, 73, 5, -7 }, + { -10, 25, 82, 7, 41, -9, -1 }, + { -4, -4, 59, 7, 76, 9, -8 }, + { -9, 21, 80, 7, 45, -8, -1 }, + { -3, -6, 55, 7, 77, 13, -8 }, + { -9, 17, 79, 7, 50, -7, -2 }, + { -2, -7, 50, 7, 79, 17, -9 }, + { -8, 13, 77, 7, 55, -6, -3 }, + { -1, -8, 45, 7, 80, 21, -9 }, + { -8, 9, 76, 7, 59, -4, -4 }, + { -1, -9, 41, 7, 82, 25, -10 }, + { -7, 5, 73, 7, 64, -2, -5 }, + { 0, -10, 36, 7, 83, 29, -10 }, + { -6, 2, 70, 7, 67, 1, -6 }, + { -10, 31, 83, 7, 34, -10, 0 }, + { -5, -1, 66, 7, 70, 4, -6 }, + { -10, 27, 83, 7, 38, -9, -1 }, + { -4, -3, 61, 7, 74, 7, -7 }, + { -10, 23, 82, 7, 43, -9, -1 }, + { -3, -5, 57, 7, 76, 11, -8 }, + { -9, 19, 80, 7, 48, -8, -2 }, + { -2, -7, 52, 7, 79, 15, -9 } } }, + .ptrn_arr = { { 0xe73cf3cf, 0x3cf39e79, 0xe79e79cf } }, + .sample_patrn_length = 98, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 18) = 0.64 */ + .hor_phase_arr = { + .even = { { -9, 33, 80, 7, 33, -9, 0 }, + { -6, 0, 64, 7, 71, 6, -7 }, + { -10, 25, 80, 7, 42, -8, -1 }, + { -4, -4, 56, 7, 76, 13, -9 }, + { -9, 17, 78, 7, 51, -6, -3 }, + { -2, -7, 47, 7, 78, 21, -9 }, + { -8, 9, 74, 7, 60, -2, -5 }, + { -1, -9, 38, 7, 81, 29, -10 }, + { -6, 3, 66, 7, 68, 3, -6 }, + { -10, 29, 81, 7, 38, -9, -1 }, + { -5, -2, 60, 7, 74, 9, -8 }, + { -9, 21, 78, 7, 47, -7, -2 }, + { -3, -6, 51, 7, 78, 17, -9 }, + { -9, 13, 76, 7, 56, -4, -4 }, + { -1, -8, 42, 7, 80, 25, -10 }, + { -7, 6, 71, 7, 64, 0, -6 } }, + .odd = { { -9, 15, 76, 7, 54, -5, -3 }, + { -2, -8, 45, 7, 80, 23, -10 }, + { -8, 8, 72, 7, 62, -1, -5 }, + { -1, -9, 36, 7, 80, 31, -9 }, + { -6, 1, 66, 7, 70, 4, -7 }, + { -10, 27, 81, 7, 40, -9, -1 }, + { -4, -4, 58, 7, 75, 11, -8 }, + { -9, 19, 78, 7, 49, -7, -2 }, + { -2, -7, 49, 7, 78, 19, -9 }, + { -8, 11, 75, 7, 58, -4, -4 }, + { -1, -9, 40, 7, 81, 27, -10 }, + { -7, 4, 70, 7, 66, 1, -6 }, + { -9, 31, 80, 7, 36, -9, -1 }, + { -5, -1, 62, 7, 72, 8, -8 }, + { -10, 23, 80, 7, 45, -8, -2 }, + { -3, -5, 54, 7, 76, 15, -9 } } }, + .ver_phase_arr = { + .even = { { -9, 33, 80, 7, 33, -9, 0 }, + { -6, 0, 64, 7, 71, 6, -7 }, + { -10, 25, 80, 7, 42, -8, -1 }, + { -4, -4, 56, 7, 76, 13, -9 }, + { -9, 17, 78, 7, 51, -6, -3 }, + { -2, -7, 47, 7, 78, 21, -9 }, + { -8, 9, 74, 7, 60, -2, -5 }, + { -1, -9, 38, 7, 81, 29, -10 }, + { -6, 3, 66, 7, 68, 3, -6 }, + { -10, 29, 81, 7, 38, -9, -1 }, + { -5, -2, 60, 7, 74, 9, -8 }, + { -9, 21, 78, 7, 47, -7, -2 }, + { -3, -6, 51, 7, 78, 17, -9 }, + { -9, 13, 76, 7, 56, -4, -4 }, + { -1, -8, 42, 7, 80, 25, -10 }, + { -7, 6, 71, 7, 64, 0, -6 } }, + .odd = { { -9, 15, 76, 7, 54, -5, -3 }, + { -2, -8, 45, 7, 80, 23, -10 }, + { -8, 8, 72, 7, 62, -1, -5 }, + { -1, -9, 36, 7, 80, 31, -9 }, + { -6, 1, 66, 7, 70, 4, -7 }, + { -10, 27, 81, 7, 40, -9, -1 }, + { -4, -4, 58, 7, 75, 11, -8 }, + { -9, 19, 78, 7, 49, -7, -2 }, + { -2, -7, 49, 7, 78, 19, -9 }, + { -8, 11, 75, 7, 58, -4, -4 }, + { -1, -9, 40, 7, 81, 27, -10 }, + { -7, 4, 70, 7, 66, 1, -6 }, + { -9, 31, 80, 7, 36, -9, -1 }, + { -5, -1, 62, 7, 72, 8, -8 }, + { -10, 23, 80, 7, 45, -8, -2 }, + { -3, -5, 54, 7, 76, 15, -9 } } }, + .ptrn_arr = { { 0xf39e73cf, 0xe79c } }, + .sample_patrn_length = 50, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 19) = 0.627451 */ + .hor_phase_arr = { + .even = { { -9, 34, 79, 7, 34, -9, -1 }, + { -6, 0, 61, 7, 72, 9, -8 }, + { -9, 22, 78, 7, 47, -7, -3 }, + { -3, -6, 49, 7, 77, 20, -9 }, + { -8, 11, 72, 7, 59, -1, -5 }, + { -1, -9, 36, 7, 79, 32, -9 }, + { -6, 1, 63, 7, 71, 7, -8 }, + { -9, 24, 77, 7, 45, -7, -2 }, + { -4, -5, 51, 7, 77, 18, -9 }, + { -9, 13, 73, 7, 58, -2, -5 }, + { -1, -8, 38, 7, 78, 30, -9 }, + { -6, 3, 65, 7, 67, 6, -7 }, + { -9, 26, 78, 7, 43, -8, -2 }, + { -4, -4, 53, 7, 76, 16, -9 }, + { -9, 14, 75, 7, 55, -3, -4 }, + { -2, -8, 40, 7, 79, 28, -9 }, + { -7, 4, 67, 7, 67, 4, -7 }, + { -9, 28, 79, 7, 40, -8, -2 }, + { -4, -3, 55, 7, 75, 14, -9 }, + { -9, 16, 76, 7, 53, -4, -4 }, + { -2, -8, 43, 7, 78, 26, -9 }, + { -7, 6, 67, 7, 65, 3, -6 }, + { -9, 30, 78, 7, 38, -8, -1 }, + { -5, -2, 58, 7, 73, 13, -9 }, + { -9, 18, 77, 7, 51, -5, -4 }, + { -2, -7, 45, 7, 77, 24, -9 }, + { -8, 7, 71, 7, 63, 1, -6 }, + { -9, 32, 79, 7, 36, -9, -1 }, + { -5, -1, 59, 7, 72, 11, -8 }, + { -9, 20, 77, 7, 49, -6, -3 }, + { -3, -7, 47, 7, 78, 22, -9 }, + { -8, 9, 72, 7, 61, 0, -6 } }, + .odd = { { -9, 15, 76, 7, 54, -4, -4 }, + { -2, -8, 41, 7, 79, 27, -9 }, + { -7, 5, 68, 7, 66, 3, -7 }, + { -9, 29, 78, 7, 39, -8, -1 }, + { -5, -3, 56, 7, 76, 13, -9 }, + { -9, 17, 77, 7, 52, -5, -4 }, + { -2, -7, 44, 7, 77, 25, -9 }, + { -7, 7, 68, 7, 64, 2, -6 }, + { -9, 31, 79, 7, 37, -9, -1 }, + { -5, -2, 59, 7, 72, 12, -8 }, + { -9, 19, 77, 7, 50, -6, -3 }, + { -3, -7, 46, 7, 78, 23, -9 }, + { -8, 8, 71, 7, 62, 1, -6 }, + { -9, 33, 79, 7, 35, -9, -1 }, + { -5, -1, 60, 7, 72, 10, -8 }, + { -9, 21, 77, 7, 48, -6, -3 }, + { -3, -6, 48, 7, 77, 21, -9 }, + { -8, 10, 72, 7, 60, -1, -5 }, + { -1, -9, 35, 7, 79, 33, -9 }, + { -6, 1, 62, 7, 71, 8, -8 }, + { -9, 23, 78, 7, 46, -7, -3 }, + { -3, -6, 50, 7, 77, 19, -9 }, + { -8, 12, 72, 7, 59, -2, -5 }, + { -1, -9, 37, 7, 79, 31, -9 }, + { -6, 2, 64, 7, 68, 7, -7 }, + { -9, 25, 77, 7, 44, -7, -2 }, + { -4, -5, 52, 7, 77, 17, -9 }, + { -9, 13, 76, 7, 56, -3, -5 }, + { -1, -8, 39, 7, 78, 29, -9 }, + { -7, 3, 66, 7, 68, 5, -7 }, + { -9, 27, 79, 7, 41, -8, -2 }, + { -4, -4, 54, 7, 76, 15, -9 } } }, + .ver_phase_arr = { + .even = { { -9, 34, 79, 7, 34, -9, -1 }, + { -6, 0, 61, 7, 72, 9, -8 }, + { -9, 22, 78, 7, 47, -7, -3 }, + { -3, -6, 49, 7, 77, 20, -9 }, + { -8, 11, 72, 7, 59, -1, -5 }, + { -1, -9, 36, 7, 79, 32, -9 }, + { -6, 1, 63, 7, 71, 7, -8 }, + { -9, 24, 77, 7, 45, -7, -2 }, + { -4, -5, 51, 7, 77, 18, -9 }, + { -9, 13, 73, 7, 58, -2, -5 }, + { -1, -8, 38, 7, 78, 30, -9 }, + { -6, 3, 65, 7, 67, 6, -7 }, + { -9, 26, 78, 7, 43, -8, -2 }, + { -4, -4, 53, 7, 76, 16, -9 }, + { -9, 14, 75, 7, 55, -3, -4 }, + { -2, -8, 40, 7, 79, 28, -9 }, + { -7, 4, 67, 7, 67, 4, -7 }, + { -9, 28, 79, 7, 40, -8, -2 }, + { -4, -3, 55, 7, 75, 14, -9 }, + { -9, 16, 76, 7, 53, -4, -4 }, + { -2, -8, 43, 7, 78, 26, -9 }, + { -7, 6, 67, 7, 65, 3, -6 }, + { -9, 30, 78, 7, 38, -8, -1 }, + { -5, -2, 58, 7, 73, 13, -9 }, + { -9, 18, 77, 7, 51, -5, -4 }, + { -2, -7, 45, 7, 77, 24, -9 }, + { -8, 7, 71, 7, 63, 1, -6 }, + { -9, 32, 79, 7, 36, -9, -1 }, + { -5, -1, 59, 7, 72, 11, -8 }, + { -9, 20, 77, 7, 49, -6, -3 }, + { -3, -7, 47, 7, 78, 22, -9 }, + { -8, 9, 72, 7, 61, 0, -6 } }, + .odd = { { -9, 15, 76, 7, 54, -4, -4 }, + { -2, -8, 41, 7, 79, 27, -9 }, + { -7, 5, 68, 7, 66, 3, -7 }, + { -9, 29, 78, 7, 39, -8, -1 }, + { -5, -3, 56, 7, 76, 13, -9 }, + { -9, 17, 77, 7, 52, -5, -4 }, + { -2, -7, 44, 7, 77, 25, -9 }, + { -7, 7, 68, 7, 64, 2, -6 }, + { -9, 31, 79, 7, 37, -9, -1 }, + { -5, -2, 59, 7, 72, 12, -8 }, + { -9, 19, 77, 7, 50, -6, -3 }, + { -3, -7, 46, 7, 78, 23, -9 }, + { -8, 8, 71, 7, 62, 1, -6 }, + { -9, 33, 79, 7, 35, -9, -1 }, + { -5, -1, 60, 7, 72, 10, -8 }, + { -9, 21, 77, 7, 48, -6, -3 }, + { -3, -6, 48, 7, 77, 21, -9 }, + { -8, 10, 72, 7, 60, -1, -5 }, + { -1, -9, 35, 7, 79, 33, -9 }, + { -6, 1, 62, 7, 71, 8, -8 }, + { -9, 23, 78, 7, 46, -7, -3 }, + { -3, -6, 50, 7, 77, 19, -9 }, + { -8, 12, 72, 7, 59, -2, -5 }, + { -1, -9, 37, 7, 79, 31, -9 }, + { -6, 2, 64, 7, 68, 7, -7 }, + { -9, 25, 77, 7, 44, -7, -2 }, + { -4, -5, 52, 7, 77, 17, -9 }, + { -9, 13, 76, 7, 56, -3, -5 }, + { -1, -8, 39, 7, 78, 29, -9 }, + { -7, 3, 66, 7, 68, 5, -7 }, + { -9, 27, 79, 7, 41, -8, -2 }, + { -4, -4, 54, 7, 76, 15, -9 } } }, + .ptrn_arr = { { 0x79ce79cf, 0x73ce79ce, 0x73ce73ce, 0xe } }, + .sample_patrn_length = 102, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 20) = 0.615385 */ + .hor_phase_arr = { + .even = { { -8, 34, 77, 7, 34, -8, -1 }, + { -6, 0, 59, 7, 71, 12, -8 }, + { -9, 19, 75, 7, 51, -4, -4 }, + { -3, -7, 43, 7, 77, 27, -9 }, + { -7, 6, 64, 7, 66, 6, -7 }, + { -9, 27, 77, 7, 43, -7, -3 }, + { -4, -4, 51, 7, 75, 19, -9 }, + { -8, 12, 71, 7, 59, 0, -6 } }, + .odd = { { -9, 16, 73, 7, 55, -2, -5 }, + { -2, -8, 39, 7, 77, 31, -9 }, + { -7, 3, 63, 7, 68, 9, -8 }, + { -9, 23, 76, 7, 47, -6, -3 }, + { -3, -6, 47, 7, 76, 23, -9 }, + { -8, 9, 68, 7, 63, 3, -7 }, + { -9, 31, 77, 7, 39, -8, -2 }, + { -5, -2, 55, 7, 73, 16, -9 } } }, + .ver_phase_arr = { + .even = { { -8, 34, 77, 7, 34, -8, -1 }, + { -6, 0, 59, 7, 71, 12, -8 }, + { -9, 19, 75, 7, 51, -4, -4 }, + { -3, -7, 43, 7, 77, 27, -9 }, + { -7, 6, 64, 7, 66, 6, -7 }, + { -9, 27, 77, 7, 43, -7, -3 }, + { -4, -4, 51, 7, 75, 19, -9 }, + { -8, 12, 71, 7, 59, 0, -6 } }, + .odd = { { -9, 16, 73, 7, 55, -2, -5 }, + { -2, -8, 39, 7, 77, 31, -9 }, + { -7, 3, 63, 7, 68, 9, -8 }, + { -9, 23, 76, 7, 47, -6, -3 }, + { -3, -6, 47, 7, 76, 23, -9 }, + { -8, 9, 68, 7, 63, 3, -7 }, + { -9, 31, 77, 7, 39, -8, -2 }, + { -5, -2, 55, 7, 73, 16, -9 } } }, + .ptrn_arr = { { 0xe739cf } }, + .sample_patrn_length = 26, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 21) = 0.603774 */ + .hor_phase_arr = { + .even = { { -8, 35, 76, 7, 35, -8, -2 }, + { -6, 0, 57, 7, 71, 15, -9 }, + { -9, 17, 71, 7, 55, -1, -5 }, + { -2, -8, 37, 7, 76, 33, -8 }, + { -6, 1, 58, 7, 71, 13, -9 }, + { -9, 18, 73, 7, 53, -2, -5 }, + { -2, -7, 39, 7, 75, 31, -8 }, + { -7, 2, 60, 7, 69, 12, -8 }, + { -9, 20, 74, 7, 51, -3, -5 }, + { -3, -7, 41, 7, 77, 29, -9 }, + { -7, 4, 62, 7, 67, 10, -8 }, + { -9, 22, 74, 7, 49, -4, -4 }, + { -3, -6, 43, 7, 75, 28, -9 }, + { -7, 5, 63, 7, 67, 8, -8 }, + { -9, 24, 75, 7, 47, -5, -4 }, + { -4, -5, 45, 7, 75, 26, -9 }, + { -8, 7, 65, 7, 65, 7, -8 }, + { -9, 26, 75, 7, 45, -5, -4 }, + { -4, -5, 47, 7, 75, 24, -9 }, + { -8, 8, 67, 7, 63, 5, -7 }, + { -9, 28, 75, 7, 43, -6, -3 }, + { -4, -4, 49, 7, 74, 22, -9 }, + { -8, 10, 67, 7, 62, 4, -7 }, + { -9, 29, 77, 7, 41, -7, -3 }, + { -5, -3, 51, 7, 74, 20, -9 }, + { -8, 12, 69, 7, 60, 2, -7 }, + { -8, 31, 75, 7, 39, -7, -2 }, + { -5, -2, 53, 7, 73, 18, -9 }, + { -9, 13, 71, 7, 58, 1, -6 }, + { -8, 33, 76, 7, 37, -8, -2 }, + { -5, -1, 55, 7, 71, 17, -9 }, + { -9, 15, 71, 7, 57, 0, -6 } }, + .odd = { { -9, 16, 72, 7, 56, -1, -6 }, + { -2, -8, 36, 7, 76, 34, -8 }, + { -6, 1, 58, 7, 70, 14, -9 }, + { -9, 18, 72, 7, 54, -2, -5 }, + { -2, -7, 38, 7, 75, 32, -8 }, + { -6, 2, 59, 7, 70, 12, -9 }, + { -9, 19, 74, 7, 52, -3, -5 }, + { -3, -7, 40, 7, 77, 30, -9 }, + { -7, 3, 61, 7, 68, 11, -8 }, + { -9, 21, 75, 7, 50, -4, -5 }, + { -3, -6, 42, 7, 75, 29, -9 }, + { -7, 5, 63, 7, 66, 9, -8 }, + { -9, 23, 74, 7, 48, -4, -4 }, + { -3, -6, 44, 7, 75, 27, -9 }, + { -7, 6, 64, 7, 65, 8, -8 }, + { -9, 25, 75, 7, 46, -5, -4 }, + { -4, -5, 46, 7, 75, 25, -9 }, + { -8, 8, 65, 7, 64, 6, -7 }, + { -9, 27, 75, 7, 44, -6, -3 }, + { -4, -4, 48, 7, 74, 23, -9 }, + { -8, 9, 66, 7, 63, 5, -7 }, + { -9, 29, 75, 7, 42, -6, -3 }, + { -5, -4, 50, 7, 75, 21, -9 }, + { -8, 11, 68, 7, 61, 3, -7 }, + { -9, 30, 77, 7, 40, -7, -3 }, + { -5, -3, 52, 7, 74, 19, -9 }, + { -9, 12, 70, 7, 59, 2, -6 }, + { -8, 32, 75, 7, 38, -7, -2 }, + { -5, -2, 54, 7, 72, 18, -9 }, + { -9, 14, 70, 7, 58, 1, -6 }, + { -8, 34, 76, 7, 36, -8, -2 }, + { -6, -1, 56, 7, 72, 16, -9 } } }, + .ver_phase_arr = { + .even = { { -8, 35, 76, 7, 35, -8, -2 }, + { -6, 0, 57, 7, 71, 15, -9 }, + { -9, 17, 71, 7, 55, -1, -5 }, + { -2, -8, 37, 7, 76, 33, -8 }, + { -6, 1, 58, 7, 71, 13, -9 }, + { -9, 18, 73, 7, 53, -2, -5 }, + { -2, -7, 39, 7, 75, 31, -8 }, + { -7, 2, 60, 7, 69, 12, -8 }, + { -9, 20, 74, 7, 51, -3, -5 }, + { -3, -7, 41, 7, 77, 29, -9 }, + { -7, 4, 62, 7, 67, 10, -8 }, + { -9, 22, 74, 7, 49, -4, -4 }, + { -3, -6, 43, 7, 75, 28, -9 }, + { -7, 5, 63, 7, 67, 8, -8 }, + { -9, 24, 75, 7, 47, -5, -4 }, + { -4, -5, 45, 7, 75, 26, -9 }, + { -8, 7, 65, 7, 65, 7, -8 }, + { -9, 26, 75, 7, 45, -5, -4 }, + { -4, -5, 47, 7, 75, 24, -9 }, + { -8, 8, 67, 7, 63, 5, -7 }, + { -9, 28, 75, 7, 43, -6, -3 }, + { -4, -4, 49, 7, 74, 22, -9 }, + { -8, 10, 67, 7, 62, 4, -7 }, + { -9, 29, 77, 7, 41, -7, -3 }, + { -5, -3, 51, 7, 74, 20, -9 }, + { -8, 12, 69, 7, 60, 2, -7 }, + { -8, 31, 75, 7, 39, -7, -2 }, + { -5, -2, 53, 7, 73, 18, -9 }, + { -9, 13, 71, 7, 58, 1, -6 }, + { -8, 33, 76, 7, 37, -8, -2 }, + { -5, -1, 55, 7, 71, 17, -9 }, + { -9, 15, 71, 7, 57, 0, -6 } }, + .odd = { { -9, 16, 72, 7, 56, -1, -6 }, + { -2, -8, 36, 7, 76, 34, -8 }, + { -6, 1, 58, 7, 70, 14, -9 }, + { -9, 18, 72, 7, 54, -2, -5 }, + { -2, -7, 38, 7, 75, 32, -8 }, + { -6, 2, 59, 7, 70, 12, -9 }, + { -9, 19, 74, 7, 52, -3, -5 }, + { -3, -7, 40, 7, 77, 30, -9 }, + { -7, 3, 61, 7, 68, 11, -8 }, + { -9, 21, 75, 7, 50, -4, -5 }, + { -3, -6, 42, 7, 75, 29, -9 }, + { -7, 5, 63, 7, 66, 9, -8 }, + { -9, 23, 74, 7, 48, -4, -4 }, + { -3, -6, 44, 7, 75, 27, -9 }, + { -7, 6, 64, 7, 65, 8, -8 }, + { -9, 25, 75, 7, 46, -5, -4 }, + { -4, -5, 46, 7, 75, 25, -9 }, + { -8, 8, 65, 7, 64, 6, -7 }, + { -9, 27, 75, 7, 44, -6, -3 }, + { -4, -4, 48, 7, 74, 23, -9 }, + { -8, 9, 66, 7, 63, 5, -7 }, + { -9, 29, 75, 7, 42, -6, -3 }, + { -5, -4, 50, 7, 75, 21, -9 }, + { -8, 11, 68, 7, 61, 3, -7 }, + { -9, 30, 77, 7, 40, -7, -3 }, + { -5, -3, 52, 7, 74, 19, -9 }, + { -9, 12, 70, 7, 59, 2, -6 }, + { -8, 32, 75, 7, 38, -7, -2 }, + { -5, -2, 54, 7, 72, 18, -9 }, + { -9, 14, 70, 7, 58, 1, -6 }, + { -8, 34, 76, 7, 36, -8, -2 }, + { -6, -1, 56, 7, 72, 16, -9 } } }, + .ptrn_arr = { { 0x9ce739cf, 0xe739ce73, 0x39ce739c, 0xe7 } }, + .sample_patrn_length = 106, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 22) = 0.592593 */ + .hor_phase_arr = { + .even = { { -7, 35, 74, 7, 35, -7, -2 }, + { -6, 0, 54, 7, 71, 18, -9 }, + { -9, 14, 70, 7, 58, 2, -7 }, + { -8, 32, 74, 7, 39, -6, -3 }, + { -5, -2, 51, 7, 72, 21, -9 }, + { -8, 11, 66, 7, 61, 5, -7 }, + { -9, 28, 75, 7, 43, -5, -4 }, + { -4, -4, 47, 7, 73, 25, -9 }, + { -8, 8, 64, 7, 64, 8, -8 }, + { -9, 25, 73, 7, 47, -4, -4 }, + { -4, -5, 43, 7, 75, 28, -9 }, + { -7, 5, 61, 7, 66, 11, -8 }, + { -9, 21, 72, 7, 51, -2, -5 }, + { -3, -6, 39, 7, 74, 32, -8 }, + { -7, 2, 58, 7, 70, 14, -9 }, + { -9, 18, 71, 7, 54, 0, -6 } }, + .odd = { { -9, 16, 70, 7, 56, 1, -6 }, + { -8, 34, 75, 7, 37, -7, -3 }, + { -6, -1, 53, 7, 72, 19, -9 }, + { -9, 13, 68, 7, 59, 4, -7 }, + { -8, 30, 74, 7, 41, -6, -3 }, + { -5, -3, 49, 7, 73, 23, -9 }, + { -8, 10, 66, 7, 62, 6, -8 }, + { -9, 27, 74, 7, 45, -5, -4 }, + { -4, -5, 45, 7, 74, 27, -9 }, + { -8, 6, 62, 7, 66, 10, -8 }, + { -9, 23, 73, 7, 49, -3, -5 }, + { -3, -6, 41, 7, 74, 30, -8 }, + { -7, 4, 59, 7, 68, 13, -9 }, + { -9, 19, 72, 7, 53, -1, -6 }, + { -3, -7, 37, 7, 75, 34, -8 }, + { -6, 1, 56, 7, 70, 16, -9 } } }, + .ver_phase_arr = { + .even = { { -7, 35, 74, 7, 35, -7, -2 }, + { -6, 0, 54, 7, 71, 18, -9 }, + { -9, 14, 70, 7, 58, 2, -7 }, + { -8, 32, 74, 7, 39, -6, -3 }, + { -5, -2, 51, 7, 72, 21, -9 }, + { -8, 11, 66, 7, 61, 5, -7 }, + { -9, 28, 75, 7, 43, -5, -4 }, + { -4, -4, 47, 7, 73, 25, -9 }, + { -8, 8, 64, 7, 64, 8, -8 }, + { -9, 25, 73, 7, 47, -4, -4 }, + { -4, -5, 43, 7, 75, 28, -9 }, + { -7, 5, 61, 7, 66, 11, -8 }, + { -9, 21, 72, 7, 51, -2, -5 }, + { -3, -6, 39, 7, 74, 32, -8 }, + { -7, 2, 58, 7, 70, 14, -9 }, + { -9, 18, 71, 7, 54, 0, -6 } }, + .odd = { { -9, 16, 70, 7, 56, 1, -6 }, + { -8, 34, 75, 7, 37, -7, -3 }, + { -6, -1, 53, 7, 72, 19, -9 }, + { -9, 13, 68, 7, 59, 4, -7 }, + { -8, 30, 74, 7, 41, -6, -3 }, + { -5, -3, 49, 7, 73, 23, -9 }, + { -8, 10, 66, 7, 62, 6, -8 }, + { -9, 27, 74, 7, 45, -5, -4 }, + { -4, -5, 45, 7, 74, 27, -9 }, + { -8, 6, 62, 7, 66, 10, -8 }, + { -9, 23, 73, 7, 49, -3, -5 }, + { -3, -6, 41, 7, 74, 30, -8 }, + { -7, 4, 59, 7, 68, 13, -9 }, + { -9, 19, 72, 7, 53, -1, -6 }, + { -3, -7, 37, 7, 75, 34, -8 }, + { -6, 1, 56, 7, 70, 16, -9 } } }, + .ptrn_arr = { { 0xce739ce7, 0xce739 } }, + .sample_patrn_length = 54, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 23) = 0.581818 */ + .hor_phase_arr = { + .even = { { -7, 36, 73, 7, 36, -7, -3 }, + { -6, 0, 52, 7, 71, 20, -9 }, + { -8, 12, 66, 7, 60, 6, -8 }, + { -8, 27, 73, 7, 45, -4, -5 }, + { -4, -4, 43, 7, 72, 29, -8 }, + { -7, 5, 59, 7, 66, 14, -9 }, + { -9, 19, 69, 7, 54, 1, -6 }, + { -7, 34, 72, 7, 38, -6, -3 }, + { -6, -1, 50, 7, 72, 22, -9 }, + { -8, 11, 63, 7, 62, 8, -8 }, + { -9, 26, 72, 7, 47, -3, -5 }, + { -4, -5, 41, 7, 73, 31, -8 }, + { -7, 4, 57, 7, 68, 15, -9 }, + { -9, 17, 69, 7, 56, 2, -7 }, + { -7, 32, 74, 7, 39, -6, -4 }, + { -5, -2, 49, 7, 71, 24, -9 }, + { -8, 9, 63, 7, 63, 9, -8 }, + { -9, 24, 71, 7, 49, -2, -5 }, + { -4, -6, 39, 7, 74, 32, -7 }, + { -7, 2, 56, 7, 69, 17, -9 }, + { -9, 15, 68, 7, 57, 4, -7 }, + { -8, 31, 73, 7, 41, -5, -4 }, + { -5, -3, 47, 7, 72, 26, -9 }, + { -8, 8, 62, 7, 63, 11, -8 }, + { -9, 22, 72, 7, 50, -1, -6 }, + { -3, -6, 38, 7, 72, 34, -7 }, + { -6, 1, 54, 7, 69, 19, -9 }, + { -9, 14, 66, 7, 59, 5, -7 }, + { -8, 29, 72, 7, 43, -4, -4 }, + { -5, -4, 45, 7, 73, 27, -8 }, + { -8, 6, 60, 7, 66, 12, -8 }, + { -9, 20, 71, 7, 52, 0, -6 } }, + .odd = { { -9, 16, 69, 7, 56, 3, -7 }, + { -8, 31, 74, 7, 40, -5, -4 }, + { -5, -2, 48, 7, 71, 25, -9 }, + { -8, 8, 62, 7, 64, 10, -8 }, + { -9, 23, 72, 7, 50, -2, -6 }, + { -3, -6, 39, 7, 72, 33, -7 }, + { -7, 2, 55, 7, 69, 18, -9 }, + { -9, 15, 67, 7, 58, 4, -7 }, + { -8, 30, 73, 7, 42, -5, -4 }, + { -5, -3, 46, 7, 72, 26, -8 }, + { -8, 7, 61, 7, 65, 11, -8 }, + { -9, 21, 72, 7, 51, -1, -6 }, + { -3, -6, 37, 7, 72, 35, -7 }, + { -6, 1, 53, 7, 69, 20, -9 }, + { -9, 13, 66, 7, 59, 6, -7 }, + { -8, 28, 72, 7, 44, -4, -4 }, + { -4, -4, 44, 7, 72, 28, -8 }, + { -7, 6, 59, 7, 66, 13, -9 }, + { -9, 20, 69, 7, 53, 1, -6 }, + { -7, 35, 72, 7, 37, -6, -3 }, + { -6, -1, 51, 7, 72, 21, -9 }, + { -8, 11, 65, 7, 61, 7, -8 }, + { -8, 26, 72, 7, 46, -3, -5 }, + { -4, -5, 42, 7, 73, 30, -8 }, + { -7, 4, 58, 7, 67, 15, -9 }, + { -9, 18, 69, 7, 55, 2, -7 }, + { -7, 33, 72, 7, 39, -6, -3 }, + { -6, -2, 50, 7, 72, 23, -9 }, + { -8, 10, 64, 7, 62, 8, -8 }, + { -9, 25, 71, 7, 48, -2, -5 }, + { -4, -5, 40, 7, 74, 31, -8 }, + { -7, 3, 56, 7, 69, 16, -9 } } }, + .ver_phase_arr = { + .even = { { -7, 36, 73, 7, 36, -7, -3 }, + { -6, 0, 52, 7, 71, 20, -9 }, + { -8, 12, 66, 7, 60, 6, -8 }, + { -8, 27, 73, 7, 45, -4, -5 }, + { -4, -4, 43, 7, 72, 29, -8 }, + { -7, 5, 59, 7, 66, 14, -9 }, + { -9, 19, 69, 7, 54, 1, -6 }, + { -7, 34, 72, 7, 38, -6, -3 }, + { -6, -1, 50, 7, 72, 22, -9 }, + { -8, 11, 63, 7, 62, 8, -8 }, + { -9, 26, 72, 7, 47, -3, -5 }, + { -4, -5, 41, 7, 73, 31, -8 }, + { -7, 4, 57, 7, 68, 15, -9 }, + { -9, 17, 69, 7, 56, 2, -7 }, + { -7, 32, 74, 7, 39, -6, -4 }, + { -5, -2, 49, 7, 71, 24, -9 }, + { -8, 9, 63, 7, 63, 9, -8 }, + { -9, 24, 71, 7, 49, -2, -5 }, + { -4, -6, 39, 7, 74, 32, -7 }, + { -7, 2, 56, 7, 69, 17, -9 }, + { -9, 15, 68, 7, 57, 4, -7 }, + { -8, 31, 73, 7, 41, -5, -4 }, + { -5, -3, 47, 7, 72, 26, -9 }, + { -8, 8, 62, 7, 63, 11, -8 }, + { -9, 22, 72, 7, 50, -1, -6 }, + { -3, -6, 38, 7, 72, 34, -7 }, + { -6, 1, 54, 7, 69, 19, -9 }, + { -9, 14, 66, 7, 59, 5, -7 }, + { -8, 29, 72, 7, 43, -4, -4 }, + { -5, -4, 45, 7, 73, 27, -8 }, + { -8, 6, 60, 7, 66, 12, -8 }, + { -9, 20, 71, 7, 52, 0, -6 } }, + .odd = { { -9, 16, 69, 7, 56, 3, -7 }, + { -8, 31, 74, 7, 40, -5, -4 }, + { -5, -2, 48, 7, 71, 25, -9 }, + { -8, 8, 62, 7, 64, 10, -8 }, + { -9, 23, 72, 7, 50, -2, -6 }, + { -3, -6, 39, 7, 72, 33, -7 }, + { -7, 2, 55, 7, 69, 18, -9 }, + { -9, 15, 67, 7, 58, 4, -7 }, + { -8, 30, 73, 7, 42, -5, -4 }, + { -5, -3, 46, 7, 72, 26, -8 }, + { -8, 7, 61, 7, 65, 11, -8 }, + { -9, 21, 72, 7, 51, -1, -6 }, + { -3, -6, 37, 7, 72, 35, -7 }, + { -6, 1, 53, 7, 69, 20, -9 }, + { -9, 13, 66, 7, 59, 6, -7 }, + { -8, 28, 72, 7, 44, -4, -4 }, + { -4, -4, 44, 7, 72, 28, -8 }, + { -7, 6, 59, 7, 66, 13, -9 }, + { -9, 20, 69, 7, 53, 1, -6 }, + { -7, 35, 72, 7, 37, -6, -3 }, + { -6, -1, 51, 7, 72, 21, -9 }, + { -8, 11, 65, 7, 61, 7, -8 }, + { -8, 26, 72, 7, 46, -3, -5 }, + { -4, -5, 42, 7, 73, 30, -8 }, + { -7, 4, 58, 7, 67, 15, -9 }, + { -9, 18, 69, 7, 55, 2, -7 }, + { -7, 33, 72, 7, 39, -6, -3 }, + { -6, -2, 50, 7, 72, 23, -9 }, + { -8, 10, 64, 7, 62, 8, -8 }, + { -9, 25, 71, 7, 48, -2, -5 }, + { -4, -5, 40, 7, 74, 31, -8 }, + { -7, 3, 56, 7, 69, 16, -9 } } }, + .ptrn_arr = { { 0xe7339ce7, 0x9ce7339c, 0x399ce739, 0xce7 } }, + .sample_patrn_length = 110, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 24) = 0.571429 */ + .hor_phase_arr = { + .even = { { -6, 36, 71, 7, 36, -6, -3 }, + { -6, 0, 50, 7, 69, 23, -8 }, + { -8, 10, 62, 7, 62, 10, -8 }, + { -8, 23, 69, 7, 50, 0, -6 } }, + .odd = { { -9, 16, 67, 7, 56, 5, -7 }, + { -8, 29, 73, 7, 43, -4, -5 }, + { -5, -4, 43, 7, 73, 29, -8 }, + { -7, 5, 56, 7, 67, 16, -9 } } }, + .ver_phase_arr = { + .even = { { -6, 36, 71, 7, 36, -6, -3 }, + { -6, 0, 50, 7, 69, 23, -8 }, + { -8, 10, 62, 7, 62, 10, -8 }, + { -8, 23, 69, 7, 50, 0, -6 } }, + .odd = { { -9, 16, 67, 7, 56, 5, -7 }, + { -8, 29, 73, 7, 43, -4, -5 }, + { -5, -4, 43, 7, 73, 29, -8 }, + { -7, 5, 56, 7, 67, 16, -9 } } }, + .ptrn_arr = { { 0xce7 } }, + .sample_patrn_length = 14, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 25) = 0.561404 */ + .hor_phase_arr = { + .even = { { -5, 36, 70, 7, 36, -5, -4 }, + { -6, 0, 48, 7, 69, 25, -8 }, + { -8, 8, 59, 7, 63, 14, -8 }, + { -8, 19, 66, 7, 54, 4, -7 }, + { -7, 30, 70, 7, 43, -3, -5 }, + { -5, -3, 41, 7, 70, 32, -7 }, + { -7, 3, 53, 7, 67, 20, -8 }, + { -8, 13, 61, 7, 60, 10, -8 }, + { -8, 24, 67, 7, 50, 1, -6 }, + { -6, 35, 70, 7, 38, -5, -4 }, + { -6, -1, 46, 7, 70, 27, -8 }, + { -8, 7, 57, 7, 64, 16, -8 }, + { -8, 17, 64, 7, 56, 6, -7 }, + { -7, 28, 69, 7, 45, -2, -5 }, + { -4, -4, 40, 7, 69, 33, -6 }, + { -7, 2, 51, 7, 68, 22, -8 }, + { -8, 11, 61, 7, 61, 11, -8 }, + { -8, 22, 68, 7, 51, 2, -7 }, + { -6, 33, 69, 7, 40, -4, -4 }, + { -5, -2, 45, 7, 69, 28, -7 }, + { -7, 6, 56, 7, 64, 17, -8 }, + { -8, 16, 64, 7, 57, 7, -8 }, + { -8, 27, 70, 7, 46, -1, -6 }, + { -4, -5, 38, 7, 70, 35, -6 }, + { -6, 1, 50, 7, 67, 24, -8 }, + { -8, 10, 60, 7, 61, 13, -8 }, + { -8, 20, 67, 7, 53, 3, -7 }, + { -7, 32, 70, 7, 41, -3, -5 }, + { -5, -3, 43, 7, 70, 30, -7 }, + { -7, 4, 54, 7, 66, 19, -8 }, + { -8, 14, 63, 7, 59, 8, -8 }, + { -8, 25, 69, 7, 48, 0, -6 } }, + .odd = { { -8, 16, 66, 7, 56, 6, -8 }, + { -8, 28, 69, 7, 46, -1, -6 }, + { -4, -4, 39, 7, 69, 34, -6 }, + { -7, 2, 51, 7, 67, 23, -8 }, + { -8, 10, 60, 7, 62, 12, -8 }, + { -8, 21, 67, 7, 52, 3, -7 }, + { -7, 32, 71, 7, 41, -4, -5 }, + { -5, -2, 44, 7, 69, 29, -7 }, + { -7, 5, 55, 7, 65, 18, -8 }, + { -8, 15, 63, 7, 58, 8, -8 }, + { -8, 26, 69, 7, 47, 0, -6 }, + { -4, -5, 37, 7, 71, 35, -6 }, + { -6, 1, 49, 7, 68, 24, -8 }, + { -8, 9, 59, 7, 63, 13, -8 }, + { -8, 20, 65, 7, 54, 4, -7 }, + { -7, 31, 70, 7, 42, -3, -5 }, + { -5, -3, 42, 7, 70, 31, -7 }, + { -7, 4, 54, 7, 65, 20, -8 }, + { -8, 13, 63, 7, 59, 9, -8 }, + { -8, 24, 68, 7, 49, 1, -6 }, + { -6, 35, 71, 7, 37, -5, -4 }, + { -6, 0, 47, 7, 69, 26, -8 }, + { -8, 8, 58, 7, 63, 15, -8 }, + { -8, 18, 65, 7, 55, 5, -7 }, + { -7, 29, 69, 7, 44, -2, -5 }, + { -5, -4, 41, 7, 71, 32, -7 }, + { -7, 3, 52, 7, 67, 21, -8 }, + { -8, 12, 62, 7, 60, 10, -8 }, + { -8, 23, 67, 7, 51, 2, -7 }, + { -6, 34, 69, 7, 39, -4, -4 }, + { -6, -1, 46, 7, 69, 28, -8 }, + { -8, 6, 56, 7, 66, 16, -8 } } }, + .ver_phase_arr = { + .even = { { -5, 36, 70, 7, 36, -5, -4 }, + { -6, 0, 48, 7, 69, 25, -8 }, + { -8, 8, 59, 7, 63, 14, -8 }, + { -8, 19, 66, 7, 54, 4, -7 }, + { -7, 30, 70, 7, 43, -3, -5 }, + { -5, -3, 41, 7, 70, 32, -7 }, + { -7, 3, 53, 7, 67, 20, -8 }, + { -8, 13, 61, 7, 60, 10, -8 }, + { -8, 24, 67, 7, 50, 1, -6 }, + { -6, 35, 70, 7, 38, -5, -4 }, + { -6, -1, 46, 7, 70, 27, -8 }, + { -8, 7, 57, 7, 64, 16, -8 }, + { -8, 17, 64, 7, 56, 6, -7 }, + { -7, 28, 69, 7, 45, -2, -5 }, + { -4, -4, 40, 7, 69, 33, -6 }, + { -7, 2, 51, 7, 68, 22, -8 }, + { -8, 11, 61, 7, 61, 11, -8 }, + { -8, 22, 68, 7, 51, 2, -7 }, + { -6, 33, 69, 7, 40, -4, -4 }, + { -5, -2, 45, 7, 69, 28, -7 }, + { -7, 6, 56, 7, 64, 17, -8 }, + { -8, 16, 64, 7, 57, 7, -8 }, + { -8, 27, 70, 7, 46, -1, -6 }, + { -4, -5, 38, 7, 70, 35, -6 }, + { -6, 1, 50, 7, 67, 24, -8 }, + { -8, 10, 60, 7, 61, 13, -8 }, + { -8, 20, 67, 7, 53, 3, -7 }, + { -7, 32, 70, 7, 41, -3, -5 }, + { -5, -3, 43, 7, 70, 30, -7 }, + { -7, 4, 54, 7, 66, 19, -8 }, + { -8, 14, 63, 7, 59, 8, -8 }, + { -8, 25, 69, 7, 48, 0, -6 } }, + .odd = { { -8, 16, 66, 7, 56, 6, -8 }, + { -8, 28, 69, 7, 46, -1, -6 }, + { -4, -4, 39, 7, 69, 34, -6 }, + { -7, 2, 51, 7, 67, 23, -8 }, + { -8, 10, 60, 7, 62, 12, -8 }, + { -8, 21, 67, 7, 52, 3, -7 }, + { -7, 32, 71, 7, 41, -4, -5 }, + { -5, -2, 44, 7, 69, 29, -7 }, + { -7, 5, 55, 7, 65, 18, -8 }, + { -8, 15, 63, 7, 58, 8, -8 }, + { -8, 26, 69, 7, 47, 0, -6 }, + { -4, -5, 37, 7, 71, 35, -6 }, + { -6, 1, 49, 7, 68, 24, -8 }, + { -8, 9, 59, 7, 63, 13, -8 }, + { -8, 20, 65, 7, 54, 4, -7 }, + { -7, 31, 70, 7, 42, -3, -5 }, + { -5, -3, 42, 7, 70, 31, -7 }, + { -7, 4, 54, 7, 65, 20, -8 }, + { -8, 13, 63, 7, 59, 9, -8 }, + { -8, 24, 68, 7, 49, 1, -6 }, + { -6, 35, 71, 7, 37, -5, -4 }, + { -6, 0, 47, 7, 69, 26, -8 }, + { -8, 8, 58, 7, 63, 15, -8 }, + { -8, 18, 65, 7, 55, 5, -7 }, + { -7, 29, 69, 7, 44, -2, -5 }, + { -5, -4, 41, 7, 71, 32, -7 }, + { -7, 3, 52, 7, 67, 21, -8 }, + { -8, 12, 62, 7, 60, 10, -8 }, + { -8, 23, 67, 7, 51, 2, -7 }, + { -6, 34, 69, 7, 39, -4, -4 }, + { -6, -1, 46, 7, 69, 28, -8 }, + { -8, 6, 56, 7, 66, 16, -8 } } }, + .ptrn_arr = { { 0x3399cce7, 0x3399cce7, 0x3399ce67, 0xce67 } }, + .sample_patrn_length = 114, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 26) = 0.551724 */ + .hor_phase_arr = { + .even = { { -5, 36, 70, 7, 36, -5, -4 }, + { -6, 0, 46, 7, 68, 27, -7 }, + { -8, 7, 55, 7, 64, 18, -8 }, + { -8, 15, 62, 7, 58, 9, -8 }, + { -8, 24, 68, 7, 49, 2, -7 }, + { -6, 33, 69, 7, 40, -3, -5 }, + { -6, -2, 43, 7, 70, 30, -7 }, + { -7, 4, 52, 7, 66, 21, -8 }, + { -8, 12, 60, 7, 60, 12, -8 }, + { -8, 21, 66, 7, 52, 4, -7 }, + { -7, 30, 70, 7, 43, -2, -6 }, + { -5, -3, 40, 7, 69, 33, -6 }, + { -7, 2, 49, 7, 68, 24, -8 }, + { -8, 9, 58, 7, 62, 15, -8 }, + { -8, 18, 64, 7, 55, 7, -8 }, + { -7, 27, 68, 7, 46, 0, -6 } }, + .odd = { { -8, 17, 63, 7, 56, 8, -8 }, + { -8, 26, 67, 7, 48, 1, -6 }, + { -5, 35, 69, 7, 38, -4, -5 }, + { -6, -1, 45, 7, 68, 29, -7 }, + { -7, 5, 54, 7, 64, 20, -8 }, + { -8, 14, 60, 7, 59, 11, -8 }, + { -8, 23, 66, 7, 51, 3, -7 }, + { -6, 32, 69, 7, 41, -3, -5 }, + { -5, -3, 41, 7, 69, 32, -6 }, + { -7, 3, 51, 7, 66, 23, -8 }, + { -8, 11, 59, 7, 60, 14, -8 }, + { -8, 20, 64, 7, 54, 5, -7 }, + { -7, 29, 68, 7, 45, -1, -6 }, + { -5, -4, 38, 7, 69, 35, -5 }, + { -6, 1, 48, 7, 67, 26, -8 }, + { -8, 8, 56, 7, 63, 17, -8 } } }, + .ver_phase_arr = { + .even = { { -5, 36, 70, 7, 36, -5, -4 }, + { -6, 0, 46, 7, 68, 27, -7 }, + { -8, 7, 55, 7, 64, 18, -8 }, + { -8, 15, 62, 7, 58, 9, -8 }, + { -8, 24, 68, 7, 49, 2, -7 }, + { -6, 33, 69, 7, 40, -3, -5 }, + { -6, -2, 43, 7, 70, 30, -7 }, + { -7, 4, 52, 7, 66, 21, -8 }, + { -8, 12, 60, 7, 60, 12, -8 }, + { -8, 21, 66, 7, 52, 4, -7 }, + { -7, 30, 70, 7, 43, -2, -6 }, + { -5, -3, 40, 7, 69, 33, -6 }, + { -7, 2, 49, 7, 68, 24, -8 }, + { -8, 9, 58, 7, 62, 15, -8 }, + { -8, 18, 64, 7, 55, 7, -8 }, + { -7, 27, 68, 7, 46, 0, -6 } }, + .odd = { { -8, 17, 63, 7, 56, 8, -8 }, + { -8, 26, 67, 7, 48, 1, -6 }, + { -5, 35, 69, 7, 38, -4, -5 }, + { -6, -1, 45, 7, 68, 29, -7 }, + { -7, 5, 54, 7, 64, 20, -8 }, + { -8, 14, 60, 7, 59, 11, -8 }, + { -8, 23, 66, 7, 51, 3, -7 }, + { -6, 32, 69, 7, 41, -3, -5 }, + { -5, -3, 41, 7, 69, 32, -6 }, + { -7, 3, 51, 7, 66, 23, -8 }, + { -8, 11, 59, 7, 60, 14, -8 }, + { -8, 20, 64, 7, 54, 5, -7 }, + { -7, 29, 68, 7, 45, -1, -6 }, + { -5, -4, 38, 7, 69, 35, -5 }, + { -6, 1, 48, 7, 67, 26, -8 }, + { -8, 8, 56, 7, 63, 17, -8 } } }, + .ptrn_arr = { { 0x399cce67, 0xcce673 } }, + .sample_patrn_length = 58, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 27) = 0.542373 */ + .hor_phase_arr = { + .even = { { -4, 37, 67, 7, 37, -4, -5 }, + { -6, 0, 44, 7, 67, 29, -6 }, + { -7, 5, 52, 7, 64, 22, -8 }, + { -8, 12, 58, 7, 60, 14, -8 }, + { -8, 19, 63, 7, 54, 8, -8 }, + { -7, 26, 67, 7, 47, 2, -7 }, + { -5, 34, 66, 7, 40, -2, -5 }, + { -6, -2, 41, 7, 68, 32, -5 }, + { -7, 3, 49, 7, 65, 25, -7 }, + { -8, 9, 56, 7, 62, 17, -8 }, + { -8, 16, 61, 7, 57, 10, -8 }, + { -8, 23, 66, 7, 50, 4, -7 }, + { -6, 31, 67, 7, 43, -1, -6 }, + { -5, -3, 38, 7, 67, 35, -4 }, + { -6, 1, 46, 7, 66, 28, -7 }, + { -8, 6, 53, 7, 65, 20, -8 }, + { -8, 13, 59, 7, 59, 13, -8 }, + { -8, 20, 65, 7, 53, 6, -8 }, + { -7, 28, 66, 7, 46, 1, -6 }, + { -4, 35, 67, 7, 38, -3, -5 }, + { -6, -1, 43, 7, 67, 31, -6 }, + { -7, 4, 50, 7, 66, 23, -8 }, + { -8, 10, 57, 7, 61, 16, -8 }, + { -8, 17, 62, 7, 56, 9, -8 }, + { -7, 25, 65, 7, 49, 3, -7 }, + { -5, 32, 68, 7, 41, -2, -6 }, + { -5, -2, 40, 7, 66, 34, -5 }, + { -7, 2, 47, 7, 67, 26, -7 }, + { -8, 8, 54, 7, 63, 19, -8 }, + { -8, 14, 60, 7, 58, 12, -8 }, + { -8, 22, 64, 7, 52, 5, -7 }, + { -6, 29, 67, 7, 44, 0, -6 } }, + .odd = { { -8, 17, 61, 7, 56, 10, -8 }, + { -7, 24, 64, 7, 50, 4, -7 }, + { -6, 31, 68, 7, 42, -1, -6 }, + { -5, -3, 39, 7, 68, 34, -5 }, + { -7, 1, 47, 7, 67, 27, -7 }, + { -8, 7, 54, 7, 64, 19, -8 }, + { -8, 14, 59, 7, 59, 12, -8 }, + { -8, 21, 64, 7, 52, 6, -7 }, + { -7, 28, 68, 7, 45, 0, -6 }, + { -4, 36, 68, 7, 37, -4, -5 }, + { -6, 0, 44, 7, 66, 30, -6 }, + { -7, 5, 51, 7, 65, 22, -8 }, + { -8, 11, 57, 7, 61, 15, -8 }, + { -8, 18, 63, 7, 55, 8, -8 }, + { -7, 25, 67, 7, 48, 2, -7 }, + { -5, 33, 66, 7, 41, -2, -5 }, + { -5, -2, 41, 7, 66, 33, -5 }, + { -7, 2, 48, 7, 67, 25, -7 }, + { -8, 8, 55, 7, 63, 18, -8 }, + { -8, 15, 61, 7, 57, 11, -8 }, + { -8, 22, 65, 7, 51, 5, -7 }, + { -6, 30, 66, 7, 44, 0, -6 }, + { -5, -4, 37, 7, 68, 36, -4 }, + { -6, 0, 45, 7, 68, 28, -7 }, + { -7, 6, 52, 7, 64, 21, -8 }, + { -8, 12, 59, 7, 59, 14, -8 }, + { -8, 19, 64, 7, 54, 7, -8 }, + { -7, 27, 67, 7, 47, 1, -7 }, + { -5, 34, 68, 7, 39, -3, -5 }, + { -6, -1, 42, 7, 68, 31, -6 }, + { -7, 4, 50, 7, 64, 24, -7 }, + { -8, 10, 56, 7, 61, 17, -8 } } }, + .ver_phase_arr = { + .even = { { -4, 37, 67, 7, 37, -4, -5 }, + { -6, 0, 44, 7, 67, 29, -6 }, + { -7, 5, 52, 7, 64, 22, -8 }, + { -8, 12, 58, 7, 60, 14, -8 }, + { -8, 19, 63, 7, 54, 8, -8 }, + { -7, 26, 67, 7, 47, 2, -7 }, + { -5, 34, 66, 7, 40, -2, -5 }, + { -6, -2, 41, 7, 68, 32, -5 }, + { -7, 3, 49, 7, 65, 25, -7 }, + { -8, 9, 56, 7, 62, 17, -8 }, + { -8, 16, 61, 7, 57, 10, -8 }, + { -8, 23, 66, 7, 50, 4, -7 }, + { -6, 31, 67, 7, 43, -1, -6 }, + { -5, -3, 38, 7, 67, 35, -4 }, + { -6, 1, 46, 7, 66, 28, -7 }, + { -8, 6, 53, 7, 65, 20, -8 }, + { -8, 13, 59, 7, 59, 13, -8 }, + { -8, 20, 65, 7, 53, 6, -8 }, + { -7, 28, 66, 7, 46, 1, -6 }, + { -4, 35, 67, 7, 38, -3, -5 }, + { -6, -1, 43, 7, 67, 31, -6 }, + { -7, 4, 50, 7, 66, 23, -8 }, + { -8, 10, 57, 7, 61, 16, -8 }, + { -8, 17, 62, 7, 56, 9, -8 }, + { -7, 25, 65, 7, 49, 3, -7 }, + { -5, 32, 68, 7, 41, -2, -6 }, + { -5, -2, 40, 7, 66, 34, -5 }, + { -7, 2, 47, 7, 67, 26, -7 }, + { -8, 8, 54, 7, 63, 19, -8 }, + { -8, 14, 60, 7, 58, 12, -8 }, + { -8, 22, 64, 7, 52, 5, -7 }, + { -6, 29, 67, 7, 44, 0, -6 } }, + .odd = { { -8, 17, 61, 7, 56, 10, -8 }, + { -7, 24, 64, 7, 50, 4, -7 }, + { -6, 31, 68, 7, 42, -1, -6 }, + { -5, -3, 39, 7, 68, 34, -5 }, + { -7, 1, 47, 7, 67, 27, -7 }, + { -8, 7, 54, 7, 64, 19, -8 }, + { -8, 14, 59, 7, 59, 12, -8 }, + { -8, 21, 64, 7, 52, 6, -7 }, + { -7, 28, 68, 7, 45, 0, -6 }, + { -4, 36, 68, 7, 37, -4, -5 }, + { -6, 0, 44, 7, 66, 30, -6 }, + { -7, 5, 51, 7, 65, 22, -8 }, + { -8, 11, 57, 7, 61, 15, -8 }, + { -8, 18, 63, 7, 55, 8, -8 }, + { -7, 25, 67, 7, 48, 2, -7 }, + { -5, 33, 66, 7, 41, -2, -5 }, + { -5, -2, 41, 7, 66, 33, -5 }, + { -7, 2, 48, 7, 67, 25, -7 }, + { -8, 8, 55, 7, 63, 18, -8 }, + { -8, 15, 61, 7, 57, 11, -8 }, + { -8, 22, 65, 7, 51, 5, -7 }, + { -6, 30, 66, 7, 44, 0, -6 }, + { -5, -4, 37, 7, 68, 36, -4 }, + { -6, 0, 45, 7, 68, 28, -7 }, + { -7, 6, 52, 7, 64, 21, -8 }, + { -8, 12, 59, 7, 59, 14, -8 }, + { -8, 19, 64, 7, 54, 7, -8 }, + { -7, 27, 67, 7, 47, 1, -7 }, + { -5, 34, 68, 7, 39, -3, -5 }, + { -6, -1, 42, 7, 68, 31, -6 }, + { -7, 4, 50, 7, 64, 24, -7 }, + { -8, 10, 56, 7, 61, 17, -8 } } }, + .ptrn_arr = { { 0x99ccce67, 0xce667339, 0x733399cc, 0xcce66 } }, + .sample_patrn_length = 118, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 28) = 0.533333 */ + .hor_phase_arr = { + .even = { { -3, 37, 65, 7, 37, -3, -5 }, + { -6, 0, 43, 7, 65, 31, -5 }, + { -7, 4, 48, 7, 65, 25, -7 }, + { -8, 9, 54, 7, 62, 19, -8 }, + { -8, 14, 58, 7, 58, 14, -8 }, + { -8, 19, 62, 7, 54, 9, -8 }, + { -7, 25, 65, 7, 48, 4, -7 }, + { -5, 31, 65, 7, 43, 0, -6 } }, + .odd = { { -8, 17, 60, 7, 56, 11, -8 }, + { -7, 22, 63, 7, 51, 6, -7 }, + { -6, 28, 65, 7, 46, 2, -7 }, + { -4, 34, 66, 7, 40, -2, -6 }, + { -6, -2, 40, 7, 66, 34, -4 }, + { -7, 2, 46, 7, 65, 28, -6 }, + { -7, 6, 51, 7, 63, 22, -7 }, + { -8, 11, 56, 7, 60, 17, -8 } } }, + .ver_phase_arr = { + .even = { { -3, 37, 65, 7, 37, -3, -5 }, + { -6, 0, 43, 7, 65, 31, -5 }, + { -7, 4, 48, 7, 65, 25, -7 }, + { -8, 9, 54, 7, 62, 19, -8 }, + { -8, 14, 58, 7, 58, 14, -8 }, + { -8, 19, 62, 7, 54, 9, -8 }, + { -7, 25, 65, 7, 48, 4, -7 }, + { -5, 31, 65, 7, 43, 0, -6 } }, + .odd = { { -8, 17, 60, 7, 56, 11, -8 }, + { -7, 22, 63, 7, 51, 6, -7 }, + { -6, 28, 65, 7, 46, 2, -7 }, + { -4, 34, 66, 7, 40, -2, -6 }, + { -6, -2, 40, 7, 66, 34, -4 }, + { -7, 2, 46, 7, 65, 28, -6 }, + { -7, 6, 51, 7, 63, 22, -7 }, + { -8, 11, 56, 7, 60, 17, -8 } } }, + .ptrn_arr = { { 0xccce667 } }, + .sample_patrn_length = 30, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 29) = 0.52459 */ + .hor_phase_arr = { + .even = { { -2, 37, 63, 7, 37, -2, -5 }, + { -6, 0, 41, 7, 64, 33, -4 }, + { -7, 3, 45, 7, 65, 28, -6 }, + { -7, 6, 49, 7, 63, 24, -7 }, + { -8, 9, 53, 7, 61, 20, -7 }, + { -8, 13, 56, 7, 59, 16, -8 }, + { -8, 17, 60, 7, 55, 12, -8 }, + { -7, 21, 62, 7, 52, 8, -8 }, + { -6, 26, 62, 7, 48, 5, -7 }, + { -5, 30, 64, 7, 44, 2, -7 }, + { -4, 34, 65, 7, 40, -1, -6 }, + { -6, -2, 38, 7, 66, 35, -3 }, + { -6, 1, 42, 7, 65, 31, -5 }, + { -7, 4, 47, 7, 63, 27, -6 }, + { -7, 7, 50, 7, 62, 23, -7 }, + { -8, 11, 54, 7, 59, 19, -7 }, + { -8, 15, 57, 7, 57, 15, -8 }, + { -7, 19, 59, 7, 54, 11, -8 }, + { -7, 23, 62, 7, 50, 7, -7 }, + { -6, 27, 63, 7, 47, 4, -7 }, + { -5, 31, 65, 7, 42, 1, -6 }, + { -3, 35, 66, 7, 38, -2, -6 }, + { -6, -1, 40, 7, 65, 34, -4 }, + { -7, 2, 44, 7, 64, 30, -5 }, + { -7, 5, 48, 7, 62, 26, -6 }, + { -8, 8, 52, 7, 62, 21, -7 }, + { -8, 12, 55, 7, 60, 17, -8 }, + { -8, 16, 59, 7, 56, 13, -8 }, + { -7, 20, 61, 7, 53, 9, -8 }, + { -7, 24, 63, 7, 49, 6, -7 }, + { -6, 28, 65, 7, 45, 3, -7 }, + { -4, 33, 64, 7, 41, 0, -6 } }, + .odd = { { -8, 17, 58, 7, 56, 13, -8 }, + { -7, 21, 61, 7, 52, 9, -8 }, + { -6, 25, 62, 7, 49, 5, -7 }, + { -5, 29, 64, 7, 45, 2, -7 }, + { -4, 33, 65, 7, 40, 0, -6 }, + { -6, -2, 37, 7, 66, 36, -3 }, + { -6, 0, 42, 7, 64, 32, -4 }, + { -7, 3, 46, 7, 64, 28, -6 }, + { -7, 7, 50, 7, 61, 24, -7 }, + { -8, 10, 53, 7, 61, 19, -7 }, + { -8, 14, 57, 7, 58, 15, -8 }, + { -8, 18, 60, 7, 55, 11, -8 }, + { -7, 22, 62, 7, 51, 8, -8 }, + { -6, 26, 64, 7, 47, 4, -7 }, + { -5, 31, 65, 7, 43, 1, -7 }, + { -3, 35, 64, 7, 39, -1, -6 }, + { -6, -1, 39, 7, 64, 35, -3 }, + { -7, 1, 43, 7, 65, 31, -5 }, + { -7, 4, 47, 7, 64, 26, -6 }, + { -8, 8, 51, 7, 62, 22, -7 }, + { -8, 11, 55, 7, 60, 18, -8 }, + { -8, 15, 58, 7, 57, 14, -8 }, + { -7, 19, 61, 7, 53, 10, -8 }, + { -7, 24, 61, 7, 50, 7, -7 }, + { -6, 28, 64, 7, 46, 3, -7 }, + { -4, 32, 64, 7, 42, 0, -6 }, + { -3, 36, 66, 7, 37, -2, -6 }, + { -6, 0, 40, 7, 65, 33, -4 }, + { -7, 2, 45, 7, 64, 29, -5 }, + { -7, 5, 49, 7, 62, 25, -6 }, + { -8, 9, 52, 7, 61, 21, -7 }, + { -8, 13, 56, 7, 58, 17, -8 } } }, + .ver_phase_arr = { + .even = { { -2, 37, 63, 7, 37, -2, -5 }, + { -6, 0, 41, 7, 64, 33, -4 }, + { -7, 3, 45, 7, 65, 28, -6 }, + { -7, 6, 49, 7, 63, 24, -7 }, + { -8, 9, 53, 7, 61, 20, -7 }, + { -8, 13, 56, 7, 59, 16, -8 }, + { -8, 17, 60, 7, 55, 12, -8 }, + { -7, 21, 62, 7, 52, 8, -8 }, + { -6, 26, 62, 7, 48, 5, -7 }, + { -5, 30, 64, 7, 44, 2, -7 }, + { -4, 34, 65, 7, 40, -1, -6 }, + { -6, -2, 38, 7, 66, 35, -3 }, + { -6, 1, 42, 7, 65, 31, -5 }, + { -7, 4, 47, 7, 63, 27, -6 }, + { -7, 7, 50, 7, 62, 23, -7 }, + { -8, 11, 54, 7, 59, 19, -7 }, + { -8, 15, 57, 7, 57, 15, -8 }, + { -7, 19, 59, 7, 54, 11, -8 }, + { -7, 23, 62, 7, 50, 7, -7 }, + { -6, 27, 63, 7, 47, 4, -7 }, + { -5, 31, 65, 7, 42, 1, -6 }, + { -3, 35, 66, 7, 38, -2, -6 }, + { -6, -1, 40, 7, 65, 34, -4 }, + { -7, 2, 44, 7, 64, 30, -5 }, + { -7, 5, 48, 7, 62, 26, -6 }, + { -8, 8, 52, 7, 62, 21, -7 }, + { -8, 12, 55, 7, 60, 17, -8 }, + { -8, 16, 59, 7, 56, 13, -8 }, + { -7, 20, 61, 7, 53, 9, -8 }, + { -7, 24, 63, 7, 49, 6, -7 }, + { -6, 28, 65, 7, 45, 3, -7 }, + { -4, 33, 64, 7, 41, 0, -6 } }, + .odd = { { -8, 17, 58, 7, 56, 13, -8 }, + { -7, 21, 61, 7, 52, 9, -8 }, + { -6, 25, 62, 7, 49, 5, -7 }, + { -5, 29, 64, 7, 45, 2, -7 }, + { -4, 33, 65, 7, 40, 0, -6 }, + { -6, -2, 37, 7, 66, 36, -3 }, + { -6, 0, 42, 7, 64, 32, -4 }, + { -7, 3, 46, 7, 64, 28, -6 }, + { -7, 7, 50, 7, 61, 24, -7 }, + { -8, 10, 53, 7, 61, 19, -7 }, + { -8, 14, 57, 7, 58, 15, -8 }, + { -8, 18, 60, 7, 55, 11, -8 }, + { -7, 22, 62, 7, 51, 8, -8 }, + { -6, 26, 64, 7, 47, 4, -7 }, + { -5, 31, 65, 7, 43, 1, -7 }, + { -3, 35, 64, 7, 39, -1, -6 }, + { -6, -1, 39, 7, 64, 35, -3 }, + { -7, 1, 43, 7, 65, 31, -5 }, + { -7, 4, 47, 7, 64, 26, -6 }, + { -8, 8, 51, 7, 62, 22, -7 }, + { -8, 11, 55, 7, 60, 18, -8 }, + { -8, 15, 58, 7, 57, 14, -8 }, + { -7, 19, 61, 7, 53, 10, -8 }, + { -7, 24, 61, 7, 50, 7, -7 }, + { -6, 28, 64, 7, 46, 3, -7 }, + { -4, 32, 64, 7, 42, 0, -6 }, + { -3, 36, 66, 7, 37, -2, -6 }, + { -6, 0, 40, 7, 65, 33, -4 }, + { -7, 2, 45, 7, 64, 29, -5 }, + { -7, 5, 49, 7, 62, 25, -6 }, + { -8, 9, 52, 7, 61, 21, -7 }, + { -8, 13, 56, 7, 58, 17, -8 } } }, + .ptrn_arr = { { 0xccce6667, 0x399999cc, 0x66673333, 0xcccce6 } }, + .sample_patrn_length = 122, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 30) = 0.516129 */ + .hor_phase_arr = { + .even = { { -2, 37, 64, 7, 37, -2, -6 }, + { -6, 0, 39, 7, 64, 34, -3 }, + { -7, 2, 42, 7, 64, 31, -4 }, + { -7, 4, 45, 7, 62, 29, -5 }, + { -7, 6, 47, 7, 62, 26, -6 }, + { -7, 8, 50, 7, 60, 23, -6 }, + { -8, 10, 52, 7, 60, 21, -7 }, + { -8, 13, 54, 7, 58, 18, -7 }, + { -8, 15, 58, 7, 56, 15, -8 }, + { -7, 18, 58, 7, 54, 13, -8 }, + { -7, 21, 60, 7, 52, 10, -8 }, + { -6, 23, 60, 7, 50, 8, -7 }, + { -6, 26, 62, 7, 47, 6, -7 }, + { -5, 29, 62, 7, 45, 4, -7 }, + { -4, 31, 64, 7, 42, 2, -7 }, + { -3, 34, 64, 7, 39, 0, -6 } }, + .odd = { { -7, 17, 57, 7, 55, 14, -8 }, + { -7, 19, 59, 7, 53, 12, -8 }, + { -7, 22, 61, 7, 51, 9, -8 }, + { -6, 25, 60, 7, 49, 7, -7 }, + { -5, 27, 62, 7, 46, 5, -7 }, + { -5, 30, 63, 7, 44, 3, -7 }, + { -3, 33, 62, 7, 41, 1, -6 }, + { -2, 35, 64, 7, 38, -1, -6 }, + { -6, -1, 38, 7, 64, 35, -2 }, + { -6, 1, 41, 7, 62, 33, -3 }, + { -7, 3, 44, 7, 63, 30, -5 }, + { -7, 5, 46, 7, 62, 27, -5 }, + { -7, 7, 49, 7, 60, 25, -6 }, + { -8, 9, 51, 7, 61, 22, -7 }, + { -8, 12, 53, 7, 59, 19, -7 }, + { -8, 14, 55, 7, 57, 17, -7 } } }, + .ver_phase_arr = { + .even = { { -2, 37, 64, 7, 37, -2, -6 }, + { -6, 0, 39, 7, 64, 34, -3 }, + { -7, 2, 42, 7, 64, 31, -4 }, + { -7, 4, 45, 7, 62, 29, -5 }, + { -7, 6, 47, 7, 62, 26, -6 }, + { -7, 8, 50, 7, 60, 23, -6 }, + { -8, 10, 52, 7, 60, 21, -7 }, + { -8, 13, 54, 7, 58, 18, -7 }, + { -8, 15, 58, 7, 56, 15, -8 }, + { -7, 18, 58, 7, 54, 13, -8 }, + { -7, 21, 60, 7, 52, 10, -8 }, + { -6, 23, 60, 7, 50, 8, -7 }, + { -6, 26, 62, 7, 47, 6, -7 }, + { -5, 29, 62, 7, 45, 4, -7 }, + { -4, 31, 64, 7, 42, 2, -7 }, + { -3, 34, 64, 7, 39, 0, -6 } }, + .odd = { { -7, 17, 57, 7, 55, 14, -8 }, + { -7, 19, 59, 7, 53, 12, -8 }, + { -7, 22, 61, 7, 51, 9, -8 }, + { -6, 25, 60, 7, 49, 7, -7 }, + { -5, 27, 62, 7, 46, 5, -7 }, + { -5, 30, 63, 7, 44, 3, -7 }, + { -3, 33, 62, 7, 41, 1, -6 }, + { -2, 35, 64, 7, 38, -1, -6 }, + { -6, -1, 38, 7, 64, 35, -2 }, + { -6, 1, 41, 7, 62, 33, -3 }, + { -7, 3, 44, 7, 63, 30, -5 }, + { -7, 5, 46, 7, 62, 27, -5 }, + { -7, 7, 49, 7, 60, 25, -6 }, + { -8, 9, 51, 7, 61, 22, -7 }, + { -8, 12, 53, 7, 59, 19, -7 }, + { -8, 14, 55, 7, 57, 17, -7 } } }, + .ptrn_arr = { { 0xe6666667, 0xccccccc } }, + .sample_patrn_length = 62, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 31) = 0.507937 */ + .hor_phase_arr = { + .even = { { -1, 37, 62, 7, 37, -1, -6 }, + { -6, 0, 38, 7, 62, 35, -1 }, + { -6, 1, 39, 7, 62, 34, -2 }, + { -7, 2, 41, 7, 62, 33, -3 }, + { -7, 3, 42, 7, 61, 32, -3 }, + { -7, 4, 43, 7, 62, 30, -4 }, + { -7, 4, 44, 7, 62, 29, -4 }, + { -7, 6, 46, 7, 60, 28, -5 }, + { -7, 7, 47, 7, 60, 26, -5 }, + { -7, 8, 48, 7, 60, 25, -6 }, + { -7, 9, 49, 7, 59, 24, -6 }, + { -7, 10, 50, 7, 59, 22, -6 }, + { -7, 11, 51, 7, 59, 21, -7 }, + { -7, 12, 52, 7, 58, 20, -7 }, + { -7, 13, 53, 7, 57, 19, -7 }, + { -7, 15, 54, 7, 56, 17, -7 }, + { -7, 16, 55, 7, 55, 16, -7 }, + { -7, 17, 56, 7, 54, 15, -7 }, + { -7, 19, 57, 7, 53, 13, -7 }, + { -7, 20, 58, 7, 52, 12, -7 }, + { -7, 21, 59, 7, 51, 11, -7 }, + { -6, 22, 59, 7, 50, 10, -7 }, + { -6, 24, 59, 7, 49, 9, -7 }, + { -6, 25, 60, 7, 48, 8, -7 }, + { -5, 26, 60, 7, 47, 7, -7 }, + { -5, 28, 60, 7, 46, 6, -7 }, + { -4, 29, 62, 7, 44, 4, -7 }, + { -4, 30, 62, 7, 43, 4, -7 }, + { -3, 32, 61, 7, 42, 3, -7 }, + { -3, 33, 62, 7, 41, 2, -7 }, + { -2, 34, 62, 7, 39, 1, -6 }, + { -1, 35, 62, 7, 38, 0, -6 } }, + .odd = { { -7, 17, 55, 7, 55, 15, -7 }, + { -7, 18, 56, 7, 54, 14, -7 }, + { -7, 19, 57, 7, 53, 13, -7 }, + { -7, 20, 58, 7, 52, 12, -7 }, + { -6, 22, 58, 7, 51, 10, -7 }, + { -6, 23, 59, 7, 50, 9, -7 }, + { -6, 24, 60, 7, 49, 8, -7 }, + { -5, 26, 60, 7, 47, 7, -7 }, + { -5, 27, 61, 7, 46, 6, -7 }, + { -5, 28, 62, 7, 45, 5, -7 }, + { -4, 30, 61, 7, 44, 4, -7 }, + { -4, 31, 62, 7, 43, 3, -7 }, + { -3, 32, 63, 7, 41, 2, -7 }, + { -2, 34, 61, 7, 40, 1, -6 }, + { -2, 35, 62, 7, 39, 0, -6 }, + { -1, 36, 62, 7, 37, 0, -6 }, + { -6, 0, 37, 7, 62, 36, -1 }, + { -6, 0, 39, 7, 62, 35, -2 }, + { -6, 1, 40, 7, 61, 34, -2 }, + { -7, 2, 41, 7, 63, 32, -3 }, + { -7, 3, 43, 7, 62, 31, -4 }, + { -7, 4, 44, 7, 61, 30, -4 }, + { -7, 5, 45, 7, 62, 28, -5 }, + { -7, 6, 46, 7, 61, 27, -5 }, + { -7, 7, 47, 7, 60, 26, -5 }, + { -7, 8, 49, 7, 60, 24, -6 }, + { -7, 9, 50, 7, 59, 23, -6 }, + { -7, 10, 51, 7, 58, 22, -6 }, + { -7, 12, 52, 7, 58, 20, -7 }, + { -7, 13, 53, 7, 57, 19, -7 }, + { -7, 14, 54, 7, 56, 18, -7 }, + { -7, 15, 55, 7, 55, 17, -7 } } }, + .ver_phase_arr = { + .even = { { -1, 37, 62, 7, 37, -1, -6 }, + { -6, 0, 38, 7, 62, 35, -1 }, + { -6, 1, 39, 7, 62, 34, -2 }, + { -7, 2, 41, 7, 62, 33, -3 }, + { -7, 3, 42, 7, 61, 32, -3 }, + { -7, 4, 43, 7, 62, 30, -4 }, + { -7, 4, 44, 7, 62, 29, -4 }, + { -7, 6, 46, 7, 60, 28, -5 }, + { -7, 7, 47, 7, 60, 26, -5 }, + { -7, 8, 48, 7, 60, 25, -6 }, + { -7, 9, 49, 7, 59, 24, -6 }, + { -7, 10, 50, 7, 59, 22, -6 }, + { -7, 11, 51, 7, 59, 21, -7 }, + { -7, 12, 52, 7, 58, 20, -7 }, + { -7, 13, 53, 7, 57, 19, -7 }, + { -7, 15, 54, 7, 56, 17, -7 }, + { -7, 16, 55, 7, 55, 16, -7 }, + { -7, 17, 56, 7, 54, 15, -7 }, + { -7, 19, 57, 7, 53, 13, -7 }, + { -7, 20, 58, 7, 52, 12, -7 }, + { -7, 21, 59, 7, 51, 11, -7 }, + { -6, 22, 59, 7, 50, 10, -7 }, + { -6, 24, 59, 7, 49, 9, -7 }, + { -6, 25, 60, 7, 48, 8, -7 }, + { -5, 26, 60, 7, 47, 7, -7 }, + { -5, 28, 60, 7, 46, 6, -7 }, + { -4, 29, 62, 7, 44, 4, -7 }, + { -4, 30, 62, 7, 43, 4, -7 }, + { -3, 32, 61, 7, 42, 3, -7 }, + { -3, 33, 62, 7, 41, 2, -7 }, + { -2, 34, 62, 7, 39, 1, -6 }, + { -1, 35, 62, 7, 38, 0, -6 } }, + .odd = { { -7, 17, 55, 7, 55, 15, -7 }, + { -7, 18, 56, 7, 54, 14, -7 }, + { -7, 19, 57, 7, 53, 13, -7 }, + { -7, 20, 58, 7, 52, 12, -7 }, + { -6, 22, 58, 7, 51, 10, -7 }, + { -6, 23, 59, 7, 50, 9, -7 }, + { -6, 24, 60, 7, 49, 8, -7 }, + { -5, 26, 60, 7, 47, 7, -7 }, + { -5, 27, 61, 7, 46, 6, -7 }, + { -5, 28, 62, 7, 45, 5, -7 }, + { -4, 30, 61, 7, 44, 4, -7 }, + { -4, 31, 62, 7, 43, 3, -7 }, + { -3, 32, 63, 7, 41, 2, -7 }, + { -2, 34, 61, 7, 40, 1, -6 }, + { -2, 35, 62, 7, 39, 0, -6 }, + { -1, 36, 62, 7, 37, 0, -6 }, + { -6, 0, 37, 7, 62, 36, -1 }, + { -6, 0, 39, 7, 62, 35, -2 }, + { -6, 1, 40, 7, 61, 34, -2 }, + { -7, 2, 41, 7, 63, 32, -3 }, + { -7, 3, 43, 7, 62, 31, -4 }, + { -7, 4, 44, 7, 61, 30, -4 }, + { -7, 5, 45, 7, 62, 28, -5 }, + { -7, 6, 46, 7, 61, 27, -5 }, + { -7, 7, 47, 7, 60, 26, -5 }, + { -7, 8, 49, 7, 60, 24, -6 }, + { -7, 9, 50, 7, 59, 23, -6 }, + { -7, 10, 51, 7, 58, 22, -6 }, + { -7, 12, 52, 7, 58, 20, -7 }, + { -7, 13, 53, 7, 57, 19, -7 }, + { -7, 14, 54, 7, 56, 18, -7 }, + { -7, 15, 55, 7, 55, 17, -7 } } }, + .ptrn_arr = { { 0x66666667, 0xe6666666, 0xcccccccc, 0xccccccc } }, + .sample_patrn_length = 126, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 32) = 0.5 */ + .hor_phase_arr = { + .even = { { 0, 8, 112, 7, 8, 0, 0 } }, + .odd = { { 0, 0, 64, 7, 64, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 8, 112, 7, 8, 0, 0 } }, + .odd = { { 0, 0, 64, 7, 64, 0, 0 } } }, + .ptrn_arr = { { 0x3 } }, + .sample_patrn_length = 4, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 33) = 0.492308 */ + .hor_phase_arr = { + .even = { { 0, 9, 110, 7, 9, 0, 0 }, + { 0, 8, 109, 7, 11, 0, 0 }, + { 0, 7, 109, 7, 12, 0, 0 }, + { 0, 6, 108, 7, 14, 0, 0 }, + { 0, 5, 107, 7, 16, 0, 0 }, + { 0, 4, 105, 7, 19, 0, 0 }, + { 0, 3, 103, 7, 22, 0, 0 }, + { 0, 3, 100, 7, 25, 0, 0 }, + { 0, 2, 98, 7, 28, 0, 0 }, + { 0, 2, 94, 7, 32, 0, 0 }, + { 0, 2, 90, 7, 36, 0, 0 }, + { 0, 1, 87, 7, 40, 0, 0 }, + { 0, 1, 83, 7, 44, 0, 0 }, + { 0, 1, 78, 7, 49, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 }, + { 0, 1, 68, 7, 59, 0, 0 }, + { 0, 0, 64, 7, 64, 0, 0 }, + { 0, 0, 59, 7, 68, 1, 0 }, + { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 49, 7, 78, 1, 0 }, + { 0, 0, 44, 7, 83, 1, 0 }, + { 0, 0, 40, 7, 87, 1, 0 }, + { 0, 0, 36, 7, 90, 2, 0 }, + { 0, 0, 32, 7, 94, 2, 0 }, + { 0, 0, 28, 7, 98, 2, 0 }, + { 0, 0, 25, 7, 100, 3, 0 }, + { 0, 0, 22, 7, 103, 3, 0 }, + { 0, 0, 19, 7, 105, 4, 0 }, + { 0, 0, 16, 7, 107, 5, 0 }, + { 0, 0, 14, 7, 108, 6, 0 }, + { 0, 0, 12, 7, 109, 7, 0 }, + { 0, 0, 11, 7, 109, 8, 0 } }, + .odd = { { 0, 0, 61, 7, 67, 0, 0 }, + { 0, 0, 56, 7, 71, 1, 0 }, + { 0, 0, 51, 7, 76, 1, 0 }, + { 0, 0, 46, 7, 81, 1, 0 }, + { 0, 0, 42, 7, 85, 1, 0 }, + { 0, 0, 38, 7, 89, 1, 0 }, + { 0, 0, 34, 7, 92, 2, 0 }, + { 0, 0, 30, 7, 96, 2, 0 }, + { 0, 0, 26, 7, 99, 3, 0 }, + { 0, 0, 23, 7, 102, 3, 0 }, + { 0, 0, 20, 7, 104, 4, 0 }, + { 0, 0, 18, 7, 106, 4, 0 }, + { 0, 0, 15, 7, 108, 5, 0 }, + { 0, 0, 13, 7, 109, 6, 0 }, + { 0, 0, 11, 7, 110, 7, 0 }, + { 0, 0, 10, 7, 110, 8, 0 }, + { 0, 8, 110, 7, 10, 0, 0 }, + { 0, 7, 110, 7, 11, 0, 0 }, + { 0, 6, 109, 7, 13, 0, 0 }, + { 0, 5, 108, 7, 15, 0, 0 }, + { 0, 4, 106, 7, 18, 0, 0 }, + { 0, 4, 104, 7, 20, 0, 0 }, + { 0, 3, 102, 7, 23, 0, 0 }, + { 0, 3, 99, 7, 26, 0, 0 }, + { 0, 2, 96, 7, 30, 0, 0 }, + { 0, 2, 92, 7, 34, 0, 0 }, + { 0, 1, 89, 7, 38, 0, 0 }, + { 0, 1, 85, 7, 42, 0, 0 }, + { 0, 1, 81, 7, 46, 0, 0 }, + { 0, 1, 76, 7, 51, 0, 0 }, + { 0, 1, 71, 7, 56, 0, 0 }, + { 0, 0, 67, 7, 61, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 9, 110, 7, 9, 0, 0 }, + { 0, 8, 109, 7, 11, 0, 0 }, + { 0, 7, 109, 7, 12, 0, 0 }, + { 0, 6, 108, 7, 14, 0, 0 }, + { 0, 5, 107, 7, 16, 0, 0 }, + { 0, 4, 105, 7, 19, 0, 0 }, + { 0, 3, 103, 7, 22, 0, 0 }, + { 0, 3, 100, 7, 25, 0, 0 }, + { 0, 2, 98, 7, 28, 0, 0 }, + { 0, 2, 94, 7, 32, 0, 0 }, + { 0, 2, 90, 7, 36, 0, 0 }, + { 0, 1, 87, 7, 40, 0, 0 }, + { 0, 1, 83, 7, 44, 0, 0 }, + { 0, 1, 78, 7, 49, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 }, + { 0, 1, 68, 7, 59, 0, 0 }, + { 0, 0, 64, 7, 64, 0, 0 }, + { 0, 0, 59, 7, 68, 1, 0 }, + { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 49, 7, 78, 1, 0 }, + { 0, 0, 44, 7, 83, 1, 0 }, + { 0, 0, 40, 7, 87, 1, 0 }, + { 0, 0, 36, 7, 90, 2, 0 }, + { 0, 0, 32, 7, 94, 2, 0 }, + { 0, 0, 28, 7, 98, 2, 0 }, + { 0, 0, 25, 7, 100, 3, 0 }, + { 0, 0, 22, 7, 103, 3, 0 }, + { 0, 0, 19, 7, 105, 4, 0 }, + { 0, 0, 16, 7, 107, 5, 0 }, + { 0, 0, 14, 7, 108, 6, 0 }, + { 0, 0, 12, 7, 109, 7, 0 }, + { 0, 0, 11, 7, 109, 8, 0 } }, + .odd = { { 0, 0, 61, 7, 67, 0, 0 }, + { 0, 0, 56, 7, 71, 1, 0 }, + { 0, 0, 51, 7, 76, 1, 0 }, + { 0, 0, 46, 7, 81, 1, 0 }, + { 0, 0, 42, 7, 85, 1, 0 }, + { 0, 0, 38, 7, 89, 1, 0 }, + { 0, 0, 34, 7, 92, 2, 0 }, + { 0, 0, 30, 7, 96, 2, 0 }, + { 0, 0, 26, 7, 99, 3, 0 }, + { 0, 0, 23, 7, 102, 3, 0 }, + { 0, 0, 20, 7, 104, 4, 0 }, + { 0, 0, 18, 7, 106, 4, 0 }, + { 0, 0, 15, 7, 108, 5, 0 }, + { 0, 0, 13, 7, 109, 6, 0 }, + { 0, 0, 11, 7, 110, 7, 0 }, + { 0, 0, 10, 7, 110, 8, 0 }, + { 0, 8, 110, 7, 10, 0, 0 }, + { 0, 7, 110, 7, 11, 0, 0 }, + { 0, 6, 109, 7, 13, 0, 0 }, + { 0, 5, 108, 7, 15, 0, 0 }, + { 0, 4, 106, 7, 18, 0, 0 }, + { 0, 4, 104, 7, 20, 0, 0 }, + { 0, 3, 102, 7, 23, 0, 0 }, + { 0, 3, 99, 7, 26, 0, 0 }, + { 0, 2, 96, 7, 30, 0, 0 }, + { 0, 2, 92, 7, 34, 0, 0 }, + { 0, 1, 89, 7, 38, 0, 0 }, + { 0, 1, 85, 7, 42, 0, 0 }, + { 0, 1, 81, 7, 46, 0, 0 }, + { 0, 1, 76, 7, 51, 0, 0 }, + { 0, 1, 71, 7, 56, 0, 0 }, + { 0, 0, 67, 7, 61, 0, 0 } } }, + .ptrn_arr = { { 0x33333333, 0x33333333, 0x99999999, 0x99999999 } }, + .sample_patrn_length = 130, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 34) = 0.484848 */ + .hor_phase_arr = { + .even = { { 0, 10, 108, 7, 10, 0, 0 }, + { 0, 7, 108, 7, 13, 0, 0 }, + { 0, 5, 106, 7, 17, 0, 0 }, + { 0, 4, 102, 7, 22, 0, 0 }, + { 0, 3, 96, 7, 29, 0, 0 }, + { 0, 2, 90, 7, 36, 0, 0 }, + { 0, 1, 82, 7, 45, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 }, + { 0, 0, 64, 7, 64, 0, 0 }, + { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 45, 7, 82, 1, 0 }, + { 0, 0, 36, 7, 90, 2, 0 }, + { 0, 0, 29, 7, 96, 3, 0 }, + { 0, 0, 22, 7, 102, 4, 0 }, + { 0, 0, 17, 7, 106, 5, 0 }, + { 0, 0, 13, 7, 108, 7, 0 } }, + .odd = { { 0, 0, 59, 7, 68, 1, 0 }, + { 0, 0, 49, 7, 78, 1, 0 }, + { 0, 0, 40, 7, 87, 1, 0 }, + { 0, 0, 32, 7, 94, 2, 0 }, + { 0, 0, 25, 7, 100, 3, 0 }, + { 0, 0, 20, 7, 104, 4, 0 }, + { 0, 0, 15, 7, 107, 6, 0 }, + { 0, 0, 11, 7, 109, 8, 0 }, + { 0, 8, 109, 7, 11, 0, 0 }, + { 0, 6, 107, 7, 15, 0, 0 }, + { 0, 4, 104, 7, 20, 0, 0 }, + { 0, 3, 100, 7, 25, 0, 0 }, + { 0, 2, 94, 7, 32, 0, 0 }, + { 0, 1, 87, 7, 40, 0, 0 }, + { 0, 1, 78, 7, 49, 0, 0 }, + { 0, 1, 68, 7, 59, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 10, 108, 7, 10, 0, 0 }, + { 0, 7, 108, 7, 13, 0, 0 }, + { 0, 5, 106, 7, 17, 0, 0 }, + { 0, 4, 102, 7, 22, 0, 0 }, + { 0, 3, 96, 7, 29, 0, 0 }, + { 0, 2, 90, 7, 36, 0, 0 }, + { 0, 1, 82, 7, 45, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 }, + { 0, 0, 64, 7, 64, 0, 0 }, + { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 45, 7, 82, 1, 0 }, + { 0, 0, 36, 7, 90, 2, 0 }, + { 0, 0, 29, 7, 96, 3, 0 }, + { 0, 0, 22, 7, 102, 4, 0 }, + { 0, 0, 17, 7, 106, 5, 0 }, + { 0, 0, 13, 7, 108, 7, 0 } }, + .odd = { { 0, 0, 59, 7, 68, 1, 0 }, + { 0, 0, 49, 7, 78, 1, 0 }, + { 0, 0, 40, 7, 87, 1, 0 }, + { 0, 0, 32, 7, 94, 2, 0 }, + { 0, 0, 25, 7, 100, 3, 0 }, + { 0, 0, 20, 7, 104, 4, 0 }, + { 0, 0, 15, 7, 107, 6, 0 }, + { 0, 0, 11, 7, 109, 8, 0 }, + { 0, 8, 109, 7, 11, 0, 0 }, + { 0, 6, 107, 7, 15, 0, 0 }, + { 0, 4, 104, 7, 20, 0, 0 }, + { 0, 3, 100, 7, 25, 0, 0 }, + { 0, 2, 94, 7, 32, 0, 0 }, + { 0, 1, 87, 7, 40, 0, 0 }, + { 0, 1, 78, 7, 49, 0, 0 }, + { 0, 1, 68, 7, 59, 0, 0 } } }, + .ptrn_arr = { { 0x33333333, 0x99999999 } }, + .sample_patrn_length = 66, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 35) = 0.477612 */ + .hor_phase_arr = { + .even = { { 0, 10, 108, 7, 10, 0, 0 }, + { 0, 6, 106, 7, 16, 0, 0 }, + { 0, 4, 101, 7, 23, 0, 0 }, + { 0, 2, 93, 7, 33, 0, 0 }, + { 0, 1, 82, 7, 45, 0, 0 }, + { 0, 1, 68, 7, 59, 0, 0 }, + { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 41, 7, 85, 2, 0 }, + { 0, 0, 29, 7, 96, 3, 0 }, + { 0, 0, 20, 7, 103, 5, 0 }, + { 0, 0, 14, 7, 106, 8, 0 }, + { 0, 9, 107, 7, 12, 0, 0 }, + { 0, 5, 105, 7, 18, 0, 0 }, + { 0, 3, 99, 7, 26, 0, 0 }, + { 0, 2, 89, 7, 37, 0, 0 }, + { 0, 1, 77, 7, 50, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 50, 7, 77, 1, 0 }, + { 0, 0, 37, 7, 89, 2, 0 }, + { 0, 0, 26, 7, 99, 3, 0 }, + { 0, 0, 18, 7, 105, 5, 0 }, + { 0, 0, 12, 7, 107, 9, 0 }, + { 0, 8, 106, 7, 14, 0, 0 }, + { 0, 5, 103, 7, 20, 0, 0 }, + { 0, 3, 96, 7, 29, 0, 0 }, + { 0, 2, 85, 7, 41, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 }, + { 0, 0, 59, 7, 68, 1, 0 }, + { 0, 0, 45, 7, 82, 1, 0 }, + { 0, 0, 33, 7, 93, 2, 0 }, + { 0, 0, 23, 7, 101, 4, 0 }, + { 0, 0, 16, 7, 106, 6, 0 } }, + .odd = { { 0, 0, 56, 7, 71, 1, 0 }, + { 0, 0, 43, 7, 84, 1, 0 }, + { 0, 0, 31, 7, 94, 3, 0 }, + { 0, 0, 22, 7, 102, 4, 0 }, + { 0, 0, 15, 7, 106, 7, 0 }, + { 0, 9, 108, 7, 11, 0, 0 }, + { 0, 6, 105, 7, 17, 0, 0 }, + { 0, 4, 99, 7, 25, 0, 0 }, + { 0, 2, 91, 7, 35, 0, 0 }, + { 0, 1, 80, 7, 47, 0, 0 }, + { 0, 1, 65, 7, 61, 1, 0 }, + { 0, 0, 52, 7, 75, 1, 0 }, + { 0, 0, 39, 7, 87, 2, 0 }, + { 0, 0, 28, 7, 97, 3, 0 }, + { 0, 0, 19, 7, 104, 5, 0 }, + { 0, 0, 13, 7, 107, 8, 0 }, + { 0, 8, 107, 7, 13, 0, 0 }, + { 0, 5, 104, 7, 19, 0, 0 }, + { 0, 3, 97, 7, 28, 0, 0 }, + { 0, 2, 87, 7, 39, 0, 0 }, + { 0, 1, 75, 7, 52, 0, 0 }, + { 0, 1, 61, 7, 65, 1, 0 }, + { 0, 0, 47, 7, 80, 1, 0 }, + { 0, 0, 35, 7, 91, 2, 0 }, + { 0, 0, 25, 7, 99, 4, 0 }, + { 0, 0, 17, 7, 105, 6, 0 }, + { 0, 0, 11, 7, 108, 9, 0 }, + { 0, 7, 106, 7, 15, 0, 0 }, + { 0, 4, 102, 7, 22, 0, 0 }, + { 0, 3, 94, 7, 31, 0, 0 }, + { 0, 1, 84, 7, 43, 0, 0 }, + { 0, 1, 71, 7, 56, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 10, 108, 7, 10, 0, 0 }, + { 0, 6, 106, 7, 16, 0, 0 }, + { 0, 4, 101, 7, 23, 0, 0 }, + { 0, 2, 93, 7, 33, 0, 0 }, + { 0, 1, 82, 7, 45, 0, 0 }, + { 0, 1, 68, 7, 59, 0, 0 }, + { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 41, 7, 85, 2, 0 }, + { 0, 0, 29, 7, 96, 3, 0 }, + { 0, 0, 20, 7, 103, 5, 0 }, + { 0, 0, 14, 7, 106, 8, 0 }, + { 0, 9, 107, 7, 12, 0, 0 }, + { 0, 5, 105, 7, 18, 0, 0 }, + { 0, 3, 99, 7, 26, 0, 0 }, + { 0, 2, 89, 7, 37, 0, 0 }, + { 0, 1, 77, 7, 50, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 50, 7, 77, 1, 0 }, + { 0, 0, 37, 7, 89, 2, 0 }, + { 0, 0, 26, 7, 99, 3, 0 }, + { 0, 0, 18, 7, 105, 5, 0 }, + { 0, 0, 12, 7, 107, 9, 0 }, + { 0, 8, 106, 7, 14, 0, 0 }, + { 0, 5, 103, 7, 20, 0, 0 }, + { 0, 3, 96, 7, 29, 0, 0 }, + { 0, 2, 85, 7, 41, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 }, + { 0, 0, 59, 7, 68, 1, 0 }, + { 0, 0, 45, 7, 82, 1, 0 }, + { 0, 0, 33, 7, 93, 2, 0 }, + { 0, 0, 23, 7, 101, 4, 0 }, + { 0, 0, 16, 7, 106, 6, 0 } }, + .odd = { { 0, 0, 56, 7, 71, 1, 0 }, + { 0, 0, 43, 7, 84, 1, 0 }, + { 0, 0, 31, 7, 94, 3, 0 }, + { 0, 0, 22, 7, 102, 4, 0 }, + { 0, 0, 15, 7, 106, 7, 0 }, + { 0, 9, 108, 7, 11, 0, 0 }, + { 0, 6, 105, 7, 17, 0, 0 }, + { 0, 4, 99, 7, 25, 0, 0 }, + { 0, 2, 91, 7, 35, 0, 0 }, + { 0, 1, 80, 7, 47, 0, 0 }, + { 0, 1, 65, 7, 61, 1, 0 }, + { 0, 0, 52, 7, 75, 1, 0 }, + { 0, 0, 39, 7, 87, 2, 0 }, + { 0, 0, 28, 7, 97, 3, 0 }, + { 0, 0, 19, 7, 104, 5, 0 }, + { 0, 0, 13, 7, 107, 8, 0 }, + { 0, 8, 107, 7, 13, 0, 0 }, + { 0, 5, 104, 7, 19, 0, 0 }, + { 0, 3, 97, 7, 28, 0, 0 }, + { 0, 2, 87, 7, 39, 0, 0 }, + { 0, 1, 75, 7, 52, 0, 0 }, + { 0, 1, 61, 7, 65, 1, 0 }, + { 0, 0, 47, 7, 80, 1, 0 }, + { 0, 0, 35, 7, 91, 2, 0 }, + { 0, 0, 25, 7, 99, 4, 0 }, + { 0, 0, 17, 7, 105, 6, 0 }, + { 0, 0, 11, 7, 108, 9, 0 }, + { 0, 7, 106, 7, 15, 0, 0 }, + { 0, 4, 102, 7, 22, 0, 0 }, + { 0, 3, 94, 7, 31, 0, 0 }, + { 0, 1, 84, 7, 43, 0, 0 }, + { 0, 1, 71, 7, 56, 0, 0 } } }, + .ptrn_arr = { { 0x99933333, 0xccccc999, 0x32666664, 0x99993333, + 0x9 } }, + .sample_patrn_length = 134, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 36) = 0.470588 */ + .hor_phase_arr = { + .even = { { 0, 11, 106, 7, 11, 0, 0 }, + { 0, 6, 103, 7, 19, 0, 0 }, + { 0, 3, 95, 7, 30, 0, 0 }, + { 0, 1, 81, 7, 46, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 46, 7, 81, 1, 0 }, + { 0, 0, 30, 7, 95, 3, 0 }, + { 0, 0, 19, 7, 103, 6, 0 } }, + .odd = { { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 37, 7, 89, 2, 0 }, + { 0, 0, 24, 7, 100, 4, 0 }, + { 0, 0, 14, 7, 106, 8, 0 }, + { 0, 8, 106, 7, 14, 0, 0 }, + { 0, 4, 100, 7, 24, 0, 0 }, + { 0, 2, 89, 7, 37, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 11, 106, 7, 11, 0, 0 }, + { 0, 6, 103, 7, 19, 0, 0 }, + { 0, 3, 95, 7, 30, 0, 0 }, + { 0, 1, 81, 7, 46, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 46, 7, 81, 1, 0 }, + { 0, 0, 30, 7, 95, 3, 0 }, + { 0, 0, 19, 7, 103, 6, 0 } }, + .odd = { { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 37, 7, 89, 2, 0 }, + { 0, 0, 24, 7, 100, 4, 0 }, + { 0, 0, 14, 7, 106, 8, 0 }, + { 0, 8, 106, 7, 14, 0, 0 }, + { 0, 4, 100, 7, 24, 0, 0 }, + { 0, 2, 89, 7, 37, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 } } }, + .ptrn_arr = { { 0x99993333 } }, + .sample_patrn_length = 34, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 37) = 0.463768 */ + .hor_phase_arr = { + .even = { { 0, 11, 106, 7, 11, 0, 0 }, + { 0, 5, 101, 7, 22, 0, 0 }, + { 0, 2, 88, 7, 38, 0, 0 }, + { 0, 1, 67, 7, 59, 1, 0 }, + { 0, 0, 46, 7, 80, 2, 0 }, + { 0, 0, 28, 7, 96, 4, 0 }, + { 0, 0, 15, 7, 104, 9, 0 }, + { 0, 7, 104, 7, 17, 0, 0 }, + { 0, 3, 94, 7, 31, 0, 0 }, + { 0, 1, 77, 7, 50, 0, 0 }, + { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 34, 7, 91, 3, 0 }, + { 0, 0, 19, 7, 103, 6, 0 }, + { 0, 10, 105, 7, 13, 0, 0 }, + { 0, 5, 98, 7, 25, 0, 0 }, + { 0, 2, 84, 7, 42, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 42, 7, 84, 2, 0 }, + { 0, 0, 25, 7, 98, 5, 0 }, + { 0, 0, 13, 7, 105, 10, 0 }, + { 0, 6, 103, 7, 19, 0, 0 }, + { 0, 3, 91, 7, 34, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 }, + { 0, 0, 50, 7, 77, 1, 0 }, + { 0, 0, 31, 7, 94, 3, 0 }, + { 0, 0, 17, 7, 104, 7, 0 }, + { 0, 9, 104, 7, 15, 0, 0 }, + { 0, 4, 96, 7, 28, 0, 0 }, + { 0, 2, 80, 7, 46, 0, 0 }, + { 0, 1, 59, 7, 67, 1, 0 }, + { 0, 0, 38, 7, 88, 2, 0 }, + { 0, 0, 22, 7, 101, 5, 0 } }, + .odd = { { 0, 0, 52, 7, 75, 1, 0 }, + { 0, 0, 33, 7, 92, 3, 0 }, + { 0, 0, 18, 7, 103, 7, 0 }, + { 0, 9, 105, 7, 14, 0, 0 }, + { 0, 4, 98, 7, 26, 0, 0 }, + { 0, 2, 82, 7, 44, 0, 0 }, + { 0, 1, 61, 7, 65, 1, 0 }, + { 0, 0, 40, 7, 86, 2, 0 }, + { 0, 0, 23, 7, 100, 5, 0 }, + { 0, 0, 12, 7, 105, 11, 0 }, + { 0, 6, 101, 7, 21, 0, 0 }, + { 0, 3, 89, 7, 36, 0, 0 }, + { 0, 1, 69, 7, 57, 1, 0 }, + { 0, 0, 48, 7, 79, 1, 0 }, + { 0, 0, 29, 7, 95, 4, 0 }, + { 0, 0, 16, 7, 104, 8, 0 }, + { 0, 8, 104, 7, 16, 0, 0 }, + { 0, 4, 95, 7, 29, 0, 0 }, + { 0, 1, 79, 7, 48, 0, 0 }, + { 0, 1, 57, 7, 69, 1, 0 }, + { 0, 0, 36, 7, 89, 3, 0 }, + { 0, 0, 21, 7, 101, 6, 0 }, + { 0, 11, 105, 7, 12, 0, 0 }, + { 0, 5, 100, 7, 23, 0, 0 }, + { 0, 2, 86, 7, 40, 0, 0 }, + { 0, 1, 65, 7, 61, 1, 0 }, + { 0, 0, 44, 7, 82, 2, 0 }, + { 0, 0, 26, 7, 98, 4, 0 }, + { 0, 0, 14, 7, 105, 9, 0 }, + { 0, 7, 103, 7, 18, 0, 0 }, + { 0, 3, 92, 7, 33, 0, 0 }, + { 0, 1, 75, 7, 52, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 11, 106, 7, 11, 0, 0 }, + { 0, 5, 101, 7, 22, 0, 0 }, + { 0, 2, 88, 7, 38, 0, 0 }, + { 0, 1, 67, 7, 59, 1, 0 }, + { 0, 0, 46, 7, 80, 2, 0 }, + { 0, 0, 28, 7, 96, 4, 0 }, + { 0, 0, 15, 7, 104, 9, 0 }, + { 0, 7, 104, 7, 17, 0, 0 }, + { 0, 3, 94, 7, 31, 0, 0 }, + { 0, 1, 77, 7, 50, 0, 0 }, + { 0, 0, 54, 7, 73, 1, 0 }, + { 0, 0, 34, 7, 91, 3, 0 }, + { 0, 0, 19, 7, 103, 6, 0 }, + { 0, 10, 105, 7, 13, 0, 0 }, + { 0, 5, 98, 7, 25, 0, 0 }, + { 0, 2, 84, 7, 42, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 42, 7, 84, 2, 0 }, + { 0, 0, 25, 7, 98, 5, 0 }, + { 0, 0, 13, 7, 105, 10, 0 }, + { 0, 6, 103, 7, 19, 0, 0 }, + { 0, 3, 91, 7, 34, 0, 0 }, + { 0, 1, 73, 7, 54, 0, 0 }, + { 0, 0, 50, 7, 77, 1, 0 }, + { 0, 0, 31, 7, 94, 3, 0 }, + { 0, 0, 17, 7, 104, 7, 0 }, + { 0, 9, 104, 7, 15, 0, 0 }, + { 0, 4, 96, 7, 28, 0, 0 }, + { 0, 2, 80, 7, 46, 0, 0 }, + { 0, 1, 59, 7, 67, 1, 0 }, + { 0, 0, 38, 7, 88, 2, 0 }, + { 0, 0, 22, 7, 101, 5, 0 } }, + .odd = { { 0, 0, 52, 7, 75, 1, 0 }, + { 0, 0, 33, 7, 92, 3, 0 }, + { 0, 0, 18, 7, 103, 7, 0 }, + { 0, 9, 105, 7, 14, 0, 0 }, + { 0, 4, 98, 7, 26, 0, 0 }, + { 0, 2, 82, 7, 44, 0, 0 }, + { 0, 1, 61, 7, 65, 1, 0 }, + { 0, 0, 40, 7, 86, 2, 0 }, + { 0, 0, 23, 7, 100, 5, 0 }, + { 0, 0, 12, 7, 105, 11, 0 }, + { 0, 6, 101, 7, 21, 0, 0 }, + { 0, 3, 89, 7, 36, 0, 0 }, + { 0, 1, 69, 7, 57, 1, 0 }, + { 0, 0, 48, 7, 79, 1, 0 }, + { 0, 0, 29, 7, 95, 4, 0 }, + { 0, 0, 16, 7, 104, 8, 0 }, + { 0, 8, 104, 7, 16, 0, 0 }, + { 0, 4, 95, 7, 29, 0, 0 }, + { 0, 1, 79, 7, 48, 0, 0 }, + { 0, 1, 57, 7, 69, 1, 0 }, + { 0, 0, 36, 7, 89, 3, 0 }, + { 0, 0, 21, 7, 101, 6, 0 }, + { 0, 11, 105, 7, 12, 0, 0 }, + { 0, 5, 100, 7, 23, 0, 0 }, + { 0, 2, 86, 7, 40, 0, 0 }, + { 0, 1, 65, 7, 61, 1, 0 }, + { 0, 0, 44, 7, 82, 2, 0 }, + { 0, 0, 26, 7, 98, 4, 0 }, + { 0, 0, 14, 7, 105, 9, 0 }, + { 0, 7, 103, 7, 18, 0, 0 }, + { 0, 3, 92, 7, 33, 0, 0 }, + { 0, 1, 75, 7, 52, 0, 0 } } }, + .ptrn_arr = { { 0xc9999333, 0x332664cc, 0x4cc99993, 0x93332666, + 0x99 } }, + .sample_patrn_length = 138, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 38) = 0.457143 */ + .hor_phase_arr = { + .even = { { 0, 12, 104, 7, 12, 0, 0 }, + { 0, 5, 98, 7, 25, 0, 0 }, + { 0, 2, 80, 7, 46, 0, 0 }, + { 0, 1, 55, 7, 71, 1, 0 }, + { 0, 0, 32, 7, 92, 4, 0 }, + { 0, 0, 16, 7, 103, 9, 0 }, + { 0, 7, 101, 7, 20, 0, 0 }, + { 0, 3, 86, 7, 39, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 39, 7, 86, 3, 0 }, + { 0, 0, 20, 7, 101, 7, 0 }, + { 0, 9, 103, 7, 16, 0, 0 }, + { 0, 4, 92, 7, 32, 0, 0 }, + { 0, 1, 71, 7, 55, 1, 0 }, + { 0, 0, 46, 7, 80, 2, 0 }, + { 0, 0, 25, 7, 98, 5, 0 } }, + .odd = { { 0, 0, 50, 7, 76, 2, 0 }, + { 0, 0, 28, 7, 96, 4, 0 }, + { 0, 0, 14, 7, 104, 10, 0 }, + { 0, 6, 99, 7, 23, 0, 0 }, + { 0, 2, 84, 7, 42, 0, 0 }, + { 0, 1, 59, 7, 67, 1, 0 }, + { 0, 0, 35, 7, 90, 3, 0 }, + { 0, 0, 18, 7, 102, 8, 0 }, + { 0, 8, 102, 7, 18, 0, 0 }, + { 0, 3, 90, 7, 35, 0, 0 }, + { 0, 1, 67, 7, 59, 1, 0 }, + { 0, 0, 42, 7, 84, 2, 0 }, + { 0, 0, 23, 7, 99, 6, 0 }, + { 0, 10, 104, 7, 14, 0, 0 }, + { 0, 4, 96, 7, 28, 0, 0 }, + { 0, 2, 76, 7, 50, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 12, 104, 7, 12, 0, 0 }, + { 0, 5, 98, 7, 25, 0, 0 }, + { 0, 2, 80, 7, 46, 0, 0 }, + { 0, 1, 55, 7, 71, 1, 0 }, + { 0, 0, 32, 7, 92, 4, 0 }, + { 0, 0, 16, 7, 103, 9, 0 }, + { 0, 7, 101, 7, 20, 0, 0 }, + { 0, 3, 86, 7, 39, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 39, 7, 86, 3, 0 }, + { 0, 0, 20, 7, 101, 7, 0 }, + { 0, 9, 103, 7, 16, 0, 0 }, + { 0, 4, 92, 7, 32, 0, 0 }, + { 0, 1, 71, 7, 55, 1, 0 }, + { 0, 0, 46, 7, 80, 2, 0 }, + { 0, 0, 25, 7, 98, 5, 0 } }, + .odd = { { 0, 0, 50, 7, 76, 2, 0 }, + { 0, 0, 28, 7, 96, 4, 0 }, + { 0, 0, 14, 7, 104, 10, 0 }, + { 0, 6, 99, 7, 23, 0, 0 }, + { 0, 2, 84, 7, 42, 0, 0 }, + { 0, 1, 59, 7, 67, 1, 0 }, + { 0, 0, 35, 7, 90, 3, 0 }, + { 0, 0, 18, 7, 102, 8, 0 }, + { 0, 8, 102, 7, 18, 0, 0 }, + { 0, 3, 90, 7, 35, 0, 0 }, + { 0, 1, 67, 7, 59, 1, 0 }, + { 0, 0, 42, 7, 84, 2, 0 }, + { 0, 0, 23, 7, 99, 6, 0 }, + { 0, 10, 104, 7, 14, 0, 0 }, + { 0, 4, 96, 7, 28, 0, 0 }, + { 0, 2, 76, 7, 50, 0, 0 } } }, + .ptrn_arr = { { 0xcc999333, 0x99332664, 0x9 } }, + .sample_patrn_length = 70, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 39) = 0.450704 */ + .hor_phase_arr = { + .even = { { 0, 13, 102, 7, 13, 0, 0 }, + { 0, 5, 94, 7, 29, 0, 0 }, + { 0, 1, 71, 7, 55, 1, 0 }, + { 0, 0, 43, 7, 83, 2, 0 }, + { 0, 0, 21, 7, 100, 7, 0 }, + { 0, 8, 102, 7, 18, 0, 0 }, + { 0, 3, 86, 7, 39, 0, 0 }, + { 0, 1, 59, 7, 67, 1, 0 }, + { 0, 0, 32, 7, 92, 4, 0 }, + { 0, 0, 14, 7, 103, 11, 0 }, + { 0, 5, 97, 7, 26, 0, 0 }, + { 0, 2, 74, 7, 51, 1, 0 }, + { 0, 0, 47, 7, 79, 2, 0 }, + { 0, 0, 23, 7, 99, 6, 0 }, + { 0, 10, 102, 7, 16, 0, 0 }, + { 0, 3, 89, 7, 36, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 36, 7, 89, 3, 0 }, + { 0, 0, 16, 7, 102, 10, 0 }, + { 0, 6, 99, 7, 23, 0, 0 }, + { 0, 2, 79, 7, 47, 0, 0 }, + { 0, 1, 51, 7, 74, 2, 0 }, + { 0, 0, 26, 7, 97, 5, 0 }, + { 0, 11, 103, 7, 14, 0, 0 }, + { 0, 4, 92, 7, 32, 0, 0 }, + { 0, 1, 67, 7, 59, 1, 0 }, + { 0, 0, 39, 7, 86, 3, 0 }, + { 0, 0, 18, 7, 102, 8, 0 }, + { 0, 7, 100, 7, 21, 0, 0 }, + { 0, 2, 83, 7, 43, 0, 0 }, + { 0, 1, 55, 7, 71, 1, 0 }, + { 0, 0, 29, 7, 94, 5, 0 } }, + .odd = { { 0, 0, 49, 7, 77, 2, 0 }, + { 0, 0, 25, 7, 97, 6, 0 }, + { 0, 10, 103, 7, 15, 0, 0 }, + { 0, 4, 90, 7, 34, 0, 0 }, + { 0, 1, 65, 7, 61, 1, 0 }, + { 0, 0, 37, 7, 88, 3, 0 }, + { 0, 0, 17, 7, 102, 9, 0 }, + { 0, 7, 99, 7, 22, 0, 0 }, + { 0, 2, 81, 7, 45, 0, 0 }, + { 0, 1, 53, 7, 72, 2, 0 }, + { 0, 0, 27, 7, 96, 5, 0 }, + { 0, 12, 103, 7, 13, 0, 0 }, + { 0, 4, 93, 7, 31, 0, 0 }, + { 0, 1, 69, 7, 57, 1, 0 }, + { 0, 0, 41, 7, 84, 3, 0 }, + { 0, 0, 20, 7, 100, 8, 0 }, + { 0, 8, 100, 7, 20, 0, 0 }, + { 0, 3, 84, 7, 41, 0, 0 }, + { 0, 1, 57, 7, 69, 1, 0 }, + { 0, 0, 31, 7, 93, 4, 0 }, + { 0, 0, 13, 7, 103, 12, 0 }, + { 0, 5, 96, 7, 27, 0, 0 }, + { 0, 2, 72, 7, 53, 1, 0 }, + { 0, 0, 45, 7, 81, 2, 0 }, + { 0, 0, 22, 7, 99, 7, 0 }, + { 0, 9, 102, 7, 17, 0, 0 }, + { 0, 3, 88, 7, 37, 0, 0 }, + { 0, 1, 61, 7, 65, 1, 0 }, + { 0, 0, 34, 7, 90, 4, 0 }, + { 0, 0, 15, 7, 103, 10, 0 }, + { 0, 6, 97, 7, 25, 0, 0 }, + { 0, 2, 77, 7, 49, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 13, 102, 7, 13, 0, 0 }, + { 0, 5, 94, 7, 29, 0, 0 }, + { 0, 1, 71, 7, 55, 1, 0 }, + { 0, 0, 43, 7, 83, 2, 0 }, + { 0, 0, 21, 7, 100, 7, 0 }, + { 0, 8, 102, 7, 18, 0, 0 }, + { 0, 3, 86, 7, 39, 0, 0 }, + { 0, 1, 59, 7, 67, 1, 0 }, + { 0, 0, 32, 7, 92, 4, 0 }, + { 0, 0, 14, 7, 103, 11, 0 }, + { 0, 5, 97, 7, 26, 0, 0 }, + { 0, 2, 74, 7, 51, 1, 0 }, + { 0, 0, 47, 7, 79, 2, 0 }, + { 0, 0, 23, 7, 99, 6, 0 }, + { 0, 10, 102, 7, 16, 0, 0 }, + { 0, 3, 89, 7, 36, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 36, 7, 89, 3, 0 }, + { 0, 0, 16, 7, 102, 10, 0 }, + { 0, 6, 99, 7, 23, 0, 0 }, + { 0, 2, 79, 7, 47, 0, 0 }, + { 0, 1, 51, 7, 74, 2, 0 }, + { 0, 0, 26, 7, 97, 5, 0 }, + { 0, 11, 103, 7, 14, 0, 0 }, + { 0, 4, 92, 7, 32, 0, 0 }, + { 0, 1, 67, 7, 59, 1, 0 }, + { 0, 0, 39, 7, 86, 3, 0 }, + { 0, 0, 18, 7, 102, 8, 0 }, + { 0, 7, 100, 7, 21, 0, 0 }, + { 0, 2, 83, 7, 43, 0, 0 }, + { 0, 1, 55, 7, 71, 1, 0 }, + { 0, 0, 29, 7, 94, 5, 0 } }, + .odd = { { 0, 0, 49, 7, 77, 2, 0 }, + { 0, 0, 25, 7, 97, 6, 0 }, + { 0, 10, 103, 7, 15, 0, 0 }, + { 0, 4, 90, 7, 34, 0, 0 }, + { 0, 1, 65, 7, 61, 1, 0 }, + { 0, 0, 37, 7, 88, 3, 0 }, + { 0, 0, 17, 7, 102, 9, 0 }, + { 0, 7, 99, 7, 22, 0, 0 }, + { 0, 2, 81, 7, 45, 0, 0 }, + { 0, 1, 53, 7, 72, 2, 0 }, + { 0, 0, 27, 7, 96, 5, 0 }, + { 0, 12, 103, 7, 13, 0, 0 }, + { 0, 4, 93, 7, 31, 0, 0 }, + { 0, 1, 69, 7, 57, 1, 0 }, + { 0, 0, 41, 7, 84, 3, 0 }, + { 0, 0, 20, 7, 100, 8, 0 }, + { 0, 8, 100, 7, 20, 0, 0 }, + { 0, 3, 84, 7, 41, 0, 0 }, + { 0, 1, 57, 7, 69, 1, 0 }, + { 0, 0, 31, 7, 93, 4, 0 }, + { 0, 0, 13, 7, 103, 12, 0 }, + { 0, 5, 96, 7, 27, 0, 0 }, + { 0, 2, 72, 7, 53, 1, 0 }, + { 0, 0, 45, 7, 81, 2, 0 }, + { 0, 0, 22, 7, 99, 7, 0 }, + { 0, 9, 102, 7, 17, 0, 0 }, + { 0, 3, 88, 7, 37, 0, 0 }, + { 0, 1, 61, 7, 65, 1, 0 }, + { 0, 0, 34, 7, 90, 4, 0 }, + { 0, 0, 15, 7, 103, 10, 0 }, + { 0, 6, 97, 7, 25, 0, 0 }, + { 0, 2, 77, 7, 49, 0, 0 } } }, + .ptrn_arr = { { 0x4cc99933, 0xc9993266, 0x9332664c, 0x32664cc9, + 0x993 } }, + .sample_patrn_length = 142, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 40) = 0.444444 */ + .hor_phase_arr = { + .even = { { 0, 13, 102, 7, 13, 0, 0 }, + { 0, 4, 91, 7, 33, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 33, 7, 91, 4, 0 } }, + .odd = { { 0, 0, 47, 7, 79, 2, 0 }, + { 0, 0, 21, 7, 99, 8, 0 }, + { 0, 8, 99, 7, 21, 0, 0 }, + { 0, 2, 79, 7, 47, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 13, 102, 7, 13, 0, 0 }, + { 0, 4, 91, 7, 33, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 33, 7, 91, 4, 0 } }, + .odd = { { 0, 0, 47, 7, 79, 2, 0 }, + { 0, 0, 21, 7, 99, 8, 0 }, + { 0, 8, 99, 7, 21, 0, 0 }, + { 0, 2, 79, 7, 47, 0, 0 } } }, + .ptrn_arr = { { 0x9933 } }, + .sample_patrn_length = 18, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 41) = 0.438356 */ + .hor_phase_arr = { + .even = { { 0, 14, 100, 7, 14, 0, 0 }, + { 0, 4, 87, 7, 37, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 25, 7, 96, 7, 0 }, + { 0, 8, 98, 7, 22, 0, 0 }, + { 0, 2, 74, 7, 51, 1, 0 }, + { 0, 0, 40, 7, 85, 3, 0 }, + { 0, 0, 16, 7, 100, 12, 0 }, + { 0, 5, 90, 7, 33, 0, 0 }, + { 0, 1, 59, 7, 67, 1, 0 }, + { 0, 0, 27, 7, 95, 6, 0 }, + { 0, 9, 99, 7, 20, 0, 0 }, + { 0, 2, 78, 7, 47, 1, 0 }, + { 0, 0, 44, 7, 81, 3, 0 }, + { 0, 0, 18, 7, 99, 11, 0 }, + { 0, 5, 93, 7, 30, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 30, 7, 93, 5, 0 }, + { 0, 11, 99, 7, 18, 0, 0 }, + { 0, 3, 81, 7, 44, 0, 0 }, + { 0, 1, 47, 7, 78, 2, 0 }, + { 0, 0, 20, 7, 99, 9, 0 }, + { 0, 6, 95, 7, 27, 0, 0 }, + { 0, 1, 67, 7, 59, 1, 0 }, + { 0, 0, 33, 7, 90, 5, 0 }, + { 0, 12, 100, 7, 16, 0, 0 }, + { 0, 3, 85, 7, 40, 0, 0 }, + { 0, 1, 51, 7, 74, 2, 0 }, + { 0, 0, 22, 7, 98, 8, 0 }, + { 0, 7, 96, 7, 25, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 37, 7, 87, 4, 0 } }, + .odd = { { 0, 0, 45, 7, 80, 3, 0 }, + { 0, 0, 19, 7, 99, 10, 0 }, + { 0, 6, 93, 7, 29, 0, 0 }, + { 0, 1, 65, 7, 61, 1, 0 }, + { 0, 0, 32, 7, 91, 5, 0 }, + { 0, 11, 100, 7, 17, 0, 0 }, + { 0, 3, 83, 7, 42, 0, 0 }, + { 0, 1, 49, 7, 76, 2, 0 }, + { 0, 0, 21, 7, 98, 9, 0 }, + { 0, 7, 95, 7, 26, 0, 0 }, + { 0, 2, 68, 7, 57, 1, 0 }, + { 0, 0, 35, 7, 89, 4, 0 }, + { 0, 13, 100, 7, 15, 0, 0 }, + { 0, 4, 86, 7, 38, 0, 0 }, + { 0, 1, 53, 7, 72, 2, 0 }, + { 0, 0, 23, 7, 97, 8, 0 }, + { 0, 8, 97, 7, 23, 0, 0 }, + { 0, 2, 72, 7, 53, 1, 0 }, + { 0, 0, 38, 7, 86, 4, 0 }, + { 0, 0, 15, 7, 100, 13, 0 }, + { 0, 4, 89, 7, 35, 0, 0 }, + { 0, 1, 57, 7, 68, 2, 0 }, + { 0, 0, 26, 7, 95, 7, 0 }, + { 0, 9, 98, 7, 21, 0, 0 }, + { 0, 2, 76, 7, 49, 1, 0 }, + { 0, 0, 42, 7, 83, 3, 0 }, + { 0, 0, 17, 7, 100, 11, 0 }, + { 0, 5, 91, 7, 32, 0, 0 }, + { 0, 1, 61, 7, 65, 1, 0 }, + { 0, 0, 29, 7, 93, 6, 0 }, + { 0, 10, 99, 7, 19, 0, 0 }, + { 0, 3, 80, 7, 45, 0, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 14, 100, 7, 14, 0, 0 }, + { 0, 4, 87, 7, 37, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 25, 7, 96, 7, 0 }, + { 0, 8, 98, 7, 22, 0, 0 }, + { 0, 2, 74, 7, 51, 1, 0 }, + { 0, 0, 40, 7, 85, 3, 0 }, + { 0, 0, 16, 7, 100, 12, 0 }, + { 0, 5, 90, 7, 33, 0, 0 }, + { 0, 1, 59, 7, 67, 1, 0 }, + { 0, 0, 27, 7, 95, 6, 0 }, + { 0, 9, 99, 7, 20, 0, 0 }, + { 0, 2, 78, 7, 47, 1, 0 }, + { 0, 0, 44, 7, 81, 3, 0 }, + { 0, 0, 18, 7, 99, 11, 0 }, + { 0, 5, 93, 7, 30, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 30, 7, 93, 5, 0 }, + { 0, 11, 99, 7, 18, 0, 0 }, + { 0, 3, 81, 7, 44, 0, 0 }, + { 0, 1, 47, 7, 78, 2, 0 }, + { 0, 0, 20, 7, 99, 9, 0 }, + { 0, 6, 95, 7, 27, 0, 0 }, + { 0, 1, 67, 7, 59, 1, 0 }, + { 0, 0, 33, 7, 90, 5, 0 }, + { 0, 12, 100, 7, 16, 0, 0 }, + { 0, 3, 85, 7, 40, 0, 0 }, + { 0, 1, 51, 7, 74, 2, 0 }, + { 0, 0, 22, 7, 98, 8, 0 }, + { 0, 7, 96, 7, 25, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 37, 7, 87, 4, 0 } }, + .odd = { { 0, 0, 45, 7, 80, 3, 0 }, + { 0, 0, 19, 7, 99, 10, 0 }, + { 0, 6, 93, 7, 29, 0, 0 }, + { 0, 1, 65, 7, 61, 1, 0 }, + { 0, 0, 32, 7, 91, 5, 0 }, + { 0, 11, 100, 7, 17, 0, 0 }, + { 0, 3, 83, 7, 42, 0, 0 }, + { 0, 1, 49, 7, 76, 2, 0 }, + { 0, 0, 21, 7, 98, 9, 0 }, + { 0, 7, 95, 7, 26, 0, 0 }, + { 0, 2, 68, 7, 57, 1, 0 }, + { 0, 0, 35, 7, 89, 4, 0 }, + { 0, 13, 100, 7, 15, 0, 0 }, + { 0, 4, 86, 7, 38, 0, 0 }, + { 0, 1, 53, 7, 72, 2, 0 }, + { 0, 0, 23, 7, 97, 8, 0 }, + { 0, 8, 97, 7, 23, 0, 0 }, + { 0, 2, 72, 7, 53, 1, 0 }, + { 0, 0, 38, 7, 86, 4, 0 }, + { 0, 0, 15, 7, 100, 13, 0 }, + { 0, 4, 89, 7, 35, 0, 0 }, + { 0, 1, 57, 7, 68, 2, 0 }, + { 0, 0, 26, 7, 95, 7, 0 }, + { 0, 9, 98, 7, 21, 0, 0 }, + { 0, 2, 76, 7, 49, 1, 0 }, + { 0, 0, 42, 7, 83, 3, 0 }, + { 0, 0, 17, 7, 100, 11, 0 }, + { 0, 5, 91, 7, 32, 0, 0 }, + { 0, 1, 61, 7, 65, 1, 0 }, + { 0, 0, 29, 7, 93, 6, 0 }, + { 0, 10, 99, 7, 19, 0, 0 }, + { 0, 3, 80, 7, 45, 0, 0 } } }, + .ptrn_arr = { { 0x664c9933, 0x664c9932, 0x64cc9932, 0x64cc9932, + 0x9932 } }, + .sample_patrn_length = 146, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 42) = 0.432432 */ + .hor_phase_arr = { + .even = { { 0, 14, 100, 7, 14, 0, 0 }, + { 0, 4, 84, 7, 40, 0, 0 }, + { 0, 1, 48, 7, 76, 3, 0 }, + { 0, 0, 18, 7, 99, 11, 0 }, + { 0, 5, 89, 7, 34, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 23, 7, 96, 9, 0 }, + { 0, 7, 93, 7, 28, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 28, 7, 93, 7, 0 }, + { 0, 9, 96, 7, 23, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 34, 7, 89, 5, 0 }, + { 0, 11, 99, 7, 18, 0, 0 }, + { 0, 3, 76, 7, 48, 1, 0 }, + { 0, 0, 40, 7, 84, 4, 0 } }, + .odd = { { 0, 1, 44, 7, 80, 3, 0 }, + { 0, 0, 16, 7, 99, 13, 0 }, + { 0, 4, 87, 7, 37, 0, 0 }, + { 0, 1, 51, 7, 74, 2, 0 }, + { 0, 0, 20, 7, 98, 10, 0 }, + { 0, 6, 91, 7, 31, 0, 0 }, + { 0, 1, 59, 7, 66, 2, 0 }, + { 0, 0, 25, 7, 95, 8, 0 }, + { 0, 8, 95, 7, 25, 0, 0 }, + { 0, 2, 66, 7, 59, 1, 0 }, + { 0, 0, 31, 7, 91, 6, 0 }, + { 0, 10, 98, 7, 20, 0, 0 }, + { 0, 2, 74, 7, 51, 1, 0 }, + { 0, 0, 37, 7, 87, 4, 0 }, + { 0, 13, 99, 7, 16, 0, 0 }, + { 0, 3, 80, 7, 44, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 14, 100, 7, 14, 0, 0 }, + { 0, 4, 84, 7, 40, 0, 0 }, + { 0, 1, 48, 7, 76, 3, 0 }, + { 0, 0, 18, 7, 99, 11, 0 }, + { 0, 5, 89, 7, 34, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 23, 7, 96, 9, 0 }, + { 0, 7, 93, 7, 28, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 28, 7, 93, 7, 0 }, + { 0, 9, 96, 7, 23, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 34, 7, 89, 5, 0 }, + { 0, 11, 99, 7, 18, 0, 0 }, + { 0, 3, 76, 7, 48, 1, 0 }, + { 0, 0, 40, 7, 84, 4, 0 } }, + .odd = { { 0, 1, 44, 7, 80, 3, 0 }, + { 0, 0, 16, 7, 99, 13, 0 }, + { 0, 4, 87, 7, 37, 0, 0 }, + { 0, 1, 51, 7, 74, 2, 0 }, + { 0, 0, 20, 7, 98, 10, 0 }, + { 0, 6, 91, 7, 31, 0, 0 }, + { 0, 1, 59, 7, 66, 2, 0 }, + { 0, 0, 25, 7, 95, 8, 0 }, + { 0, 8, 95, 7, 25, 0, 0 }, + { 0, 2, 66, 7, 59, 1, 0 }, + { 0, 0, 31, 7, 91, 6, 0 }, + { 0, 10, 98, 7, 20, 0, 0 }, + { 0, 2, 74, 7, 51, 1, 0 }, + { 0, 0, 37, 7, 87, 4, 0 }, + { 0, 13, 99, 7, 16, 0, 0 }, + { 0, 3, 80, 7, 44, 1, 0 } } }, + .ptrn_arr = { { 0x264c9933, 0x3264c993, 0x99 } }, + .sample_patrn_length = 74, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 43) = 0.426667 */ + .hor_phase_arr = { + .even = { { 0, 15, 98, 7, 15, 0, 0 }, + { 0, 3, 80, 7, 44, 1, 0 }, + { 0, 0, 41, 7, 83, 4, 0 }, + { 0, 13, 98, 7, 17, 0, 0 }, + { 0, 3, 76, 7, 48, 1, 0 }, + { 0, 0, 38, 7, 85, 5, 0 }, + { 0, 12, 97, 7, 19, 0, 0 }, + { 0, 2, 74, 7, 51, 1, 0 }, + { 0, 0, 34, 7, 89, 5, 0 }, + { 0, 10, 97, 7, 21, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 31, 7, 91, 6, 0 }, + { 0, 9, 96, 7, 23, 0, 0 }, + { 0, 2, 66, 7, 59, 1, 0 }, + { 0, 0, 29, 7, 92, 7, 0 }, + { 0, 8, 94, 7, 26, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 26, 7, 94, 8, 0 }, + { 0, 7, 92, 7, 29, 0, 0 }, + { 0, 1, 59, 7, 66, 2, 0 }, + { 0, 0, 23, 7, 96, 9, 0 }, + { 0, 6, 91, 7, 31, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 21, 7, 97, 10, 0 }, + { 0, 5, 89, 7, 34, 0, 0 }, + { 0, 1, 51, 7, 74, 2, 0 }, + { 0, 0, 19, 7, 97, 12, 0 }, + { 0, 5, 85, 7, 38, 0, 0 }, + { 0, 1, 48, 7, 76, 3, 0 }, + { 0, 0, 17, 7, 98, 13, 0 }, + { 0, 4, 83, 7, 41, 0, 0 }, + { 0, 1, 44, 7, 80, 3, 0 } }, + .odd = { { 0, 1, 43, 7, 80, 4, 0 }, + { 0, 14, 98, 7, 16, 0, 0 }, + { 0, 3, 78, 7, 46, 1, 0 }, + { 0, 0, 39, 7, 85, 4, 0 }, + { 0, 12, 98, 7, 18, 0, 0 }, + { 0, 3, 74, 7, 50, 1, 0 }, + { 0, 0, 36, 7, 87, 5, 0 }, + { 0, 11, 97, 7, 20, 0, 0 }, + { 0, 2, 72, 7, 53, 1, 0 }, + { 0, 0, 33, 7, 89, 6, 0 }, + { 0, 10, 96, 7, 22, 0, 0 }, + { 0, 2, 68, 7, 57, 1, 0 }, + { 0, 0, 30, 7, 92, 6, 0 }, + { 0, 9, 94, 7, 25, 0, 0 }, + { 0, 2, 64, 7, 61, 1, 0 }, + { 0, 0, 27, 7, 94, 7, 0 }, + { 0, 7, 94, 7, 27, 0, 0 }, + { 0, 1, 61, 7, 64, 2, 0 }, + { 0, 0, 25, 7, 94, 9, 0 }, + { 0, 6, 92, 7, 30, 0, 0 }, + { 0, 1, 57, 7, 68, 2, 0 }, + { 0, 0, 22, 7, 96, 10, 0 }, + { 0, 6, 89, 7, 33, 0, 0 }, + { 0, 1, 53, 7, 72, 2, 0 }, + { 0, 0, 20, 7, 97, 11, 0 }, + { 0, 5, 87, 7, 36, 0, 0 }, + { 0, 1, 50, 7, 74, 3, 0 }, + { 0, 0, 18, 7, 98, 12, 0 }, + { 0, 4, 85, 7, 39, 0, 0 }, + { 0, 1, 46, 7, 78, 3, 0 }, + { 0, 0, 16, 7, 98, 14, 0 }, + { 0, 4, 80, 7, 43, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 15, 98, 7, 15, 0, 0 }, + { 0, 3, 80, 7, 44, 1, 0 }, + { 0, 0, 41, 7, 83, 4, 0 }, + { 0, 13, 98, 7, 17, 0, 0 }, + { 0, 3, 76, 7, 48, 1, 0 }, + { 0, 0, 38, 7, 85, 5, 0 }, + { 0, 12, 97, 7, 19, 0, 0 }, + { 0, 2, 74, 7, 51, 1, 0 }, + { 0, 0, 34, 7, 89, 5, 0 }, + { 0, 10, 97, 7, 21, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 31, 7, 91, 6, 0 }, + { 0, 9, 96, 7, 23, 0, 0 }, + { 0, 2, 66, 7, 59, 1, 0 }, + { 0, 0, 29, 7, 92, 7, 0 }, + { 0, 8, 94, 7, 26, 0, 0 }, + { 0, 1, 63, 7, 63, 1, 0 }, + { 0, 0, 26, 7, 94, 8, 0 }, + { 0, 7, 92, 7, 29, 0, 0 }, + { 0, 1, 59, 7, 66, 2, 0 }, + { 0, 0, 23, 7, 96, 9, 0 }, + { 0, 6, 91, 7, 31, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 21, 7, 97, 10, 0 }, + { 0, 5, 89, 7, 34, 0, 0 }, + { 0, 1, 51, 7, 74, 2, 0 }, + { 0, 0, 19, 7, 97, 12, 0 }, + { 0, 5, 85, 7, 38, 0, 0 }, + { 0, 1, 48, 7, 76, 3, 0 }, + { 0, 0, 17, 7, 98, 13, 0 }, + { 0, 4, 83, 7, 41, 0, 0 }, + { 0, 1, 44, 7, 80, 3, 0 } }, + .odd = { { 0, 1, 43, 7, 80, 4, 0 }, + { 0, 14, 98, 7, 16, 0, 0 }, + { 0, 3, 78, 7, 46, 1, 0 }, + { 0, 0, 39, 7, 85, 4, 0 }, + { 0, 12, 98, 7, 18, 0, 0 }, + { 0, 3, 74, 7, 50, 1, 0 }, + { 0, 0, 36, 7, 87, 5, 0 }, + { 0, 11, 97, 7, 20, 0, 0 }, + { 0, 2, 72, 7, 53, 1, 0 }, + { 0, 0, 33, 7, 89, 6, 0 }, + { 0, 10, 96, 7, 22, 0, 0 }, + { 0, 2, 68, 7, 57, 1, 0 }, + { 0, 0, 30, 7, 92, 6, 0 }, + { 0, 9, 94, 7, 25, 0, 0 }, + { 0, 2, 64, 7, 61, 1, 0 }, + { 0, 0, 27, 7, 94, 7, 0 }, + { 0, 7, 94, 7, 27, 0, 0 }, + { 0, 1, 61, 7, 64, 2, 0 }, + { 0, 0, 25, 7, 94, 9, 0 }, + { 0, 6, 92, 7, 30, 0, 0 }, + { 0, 1, 57, 7, 68, 2, 0 }, + { 0, 0, 22, 7, 96, 10, 0 }, + { 0, 6, 89, 7, 33, 0, 0 }, + { 0, 1, 53, 7, 72, 2, 0 }, + { 0, 0, 20, 7, 97, 11, 0 }, + { 0, 5, 87, 7, 36, 0, 0 }, + { 0, 1, 50, 7, 74, 3, 0 }, + { 0, 0, 18, 7, 98, 12, 0 }, + { 0, 4, 85, 7, 39, 0, 0 }, + { 0, 1, 46, 7, 78, 3, 0 }, + { 0, 0, 16, 7, 98, 14, 0 }, + { 0, 4, 80, 7, 43, 1, 0 } } }, + .ptrn_arr = { { 0x3264c993, 0x93264c99, 0x993264c9, 0xc993264c, + 0x93264 } }, + .sample_patrn_length = 150, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 44) = 0.421053 */ + .hor_phase_arr = { + .even = { { 0, 16, 96, 7, 16, 0, 0 }, + { 0, 3, 76, 7, 48, 1, 0 }, + { 0, 0, 35, 7, 87, 6, 0 }, + { 0, 10, 94, 7, 24, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 0, 24, 7, 94, 10, 0 }, + { 0, 6, 87, 7, 35, 0, 0 }, + { 0, 1, 48, 7, 76, 3, 0 } }, + .odd = { { 0, 1, 41, 7, 82, 4, 0 }, + { 0, 12, 97, 7, 19, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 29, 7, 92, 7, 0 }, + { 0, 7, 92, 7, 29, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 19, 7, 97, 12, 0 }, + { 0, 4, 82, 7, 41, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 16, 96, 7, 16, 0, 0 }, + { 0, 3, 76, 7, 48, 1, 0 }, + { 0, 0, 35, 7, 87, 6, 0 }, + { 0, 10, 94, 7, 24, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 0, 24, 7, 94, 10, 0 }, + { 0, 6, 87, 7, 35, 0, 0 }, + { 0, 1, 48, 7, 76, 3, 0 } }, + .odd = { { 0, 1, 41, 7, 82, 4, 0 }, + { 0, 12, 97, 7, 19, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 29, 7, 92, 7, 0 }, + { 0, 7, 92, 7, 29, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 19, 7, 97, 12, 0 }, + { 0, 4, 82, 7, 41, 1, 0 } } }, + .ptrn_arr = { { 0x3264c993, 0x9 } }, + .sample_patrn_length = 38, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 45) = 0.415584 */ + .hor_phase_arr = { + .even = { { 0, 16, 96, 7, 16, 0, 0 }, + { 0, 3, 72, 7, 52, 1, 0 }, + { 0, 0, 30, 7, 90, 8, 0 }, + { 0, 7, 89, 7, 32, 0, 0 }, + { 0, 1, 48, 7, 76, 3, 0 }, + { 0, 14, 96, 7, 18, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 27, 7, 92, 9, 0 }, + { 0, 6, 87, 7, 35, 0, 0 }, + { 0, 1, 45, 7, 78, 4, 0 }, + { 0, 13, 95, 7, 20, 0, 0 }, + { 0, 2, 66, 7, 59, 1, 0 }, + { 0, 0, 24, 7, 94, 10, 0 }, + { 0, 5, 85, 7, 38, 0, 0 }, + { 0, 1, 42, 7, 81, 4, 0 }, + { 0, 11, 95, 7, 22, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 0, 22, 7, 95, 11, 0 }, + { 0, 4, 81, 7, 42, 1, 0 }, + { 0, 0, 38, 7, 85, 5, 0 }, + { 0, 10, 94, 7, 24, 0, 0 }, + { 0, 1, 59, 7, 66, 2, 0 }, + { 0, 0, 20, 7, 95, 13, 0 }, + { 0, 4, 78, 7, 45, 1, 0 }, + { 0, 0, 35, 7, 87, 6, 0 }, + { 0, 9, 92, 7, 27, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 18, 7, 96, 14, 0 }, + { 0, 3, 76, 7, 48, 1, 0 }, + { 0, 0, 32, 7, 89, 7, 0 }, + { 0, 8, 90, 7, 30, 0, 0 }, + { 0, 1, 52, 7, 72, 3, 0 } }, + .odd = { { 0, 1, 40, 7, 82, 5, 0 }, + { 0, 11, 94, 7, 23, 0, 0 }, + { 0, 2, 61, 7, 63, 2, 0 }, + { 0, 0, 21, 7, 95, 12, 0 }, + { 0, 4, 80, 7, 43, 1, 0 }, + { 0, 0, 37, 7, 85, 6, 0 }, + { 0, 9, 93, 7, 26, 0, 0 }, + { 0, 1, 57, 7, 68, 2, 0 }, + { 0, 0, 19, 7, 95, 14, 0 }, + { 0, 4, 76, 7, 47, 1, 0 }, + { 0, 0, 34, 7, 88, 6, 0 }, + { 0, 8, 92, 7, 28, 0, 0 }, + { 0, 1, 54, 7, 70, 3, 0 }, + { 0, 0, 17, 7, 96, 15, 0 }, + { 0, 3, 74, 7, 50, 1, 0 }, + { 0, 0, 31, 7, 90, 7, 0 }, + { 0, 7, 90, 7, 31, 0, 0 }, + { 0, 1, 50, 7, 74, 3, 0 }, + { 0, 15, 96, 7, 17, 0, 0 }, + { 0, 3, 70, 7, 54, 1, 0 }, + { 0, 0, 28, 7, 92, 8, 0 }, + { 0, 6, 88, 7, 34, 0, 0 }, + { 0, 1, 47, 7, 76, 4, 0 }, + { 0, 14, 95, 7, 19, 0, 0 }, + { 0, 2, 68, 7, 57, 1, 0 }, + { 0, 0, 26, 7, 93, 9, 0 }, + { 0, 6, 85, 7, 37, 0, 0 }, + { 0, 1, 43, 7, 80, 4, 0 }, + { 0, 12, 95, 7, 21, 0, 0 }, + { 0, 2, 63, 7, 61, 2, 0 }, + { 0, 0, 23, 7, 94, 11, 0 }, + { 0, 5, 82, 7, 40, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 16, 96, 7, 16, 0, 0 }, + { 0, 3, 72, 7, 52, 1, 0 }, + { 0, 0, 30, 7, 90, 8, 0 }, + { 0, 7, 89, 7, 32, 0, 0 }, + { 0, 1, 48, 7, 76, 3, 0 }, + { 0, 14, 96, 7, 18, 0, 0 }, + { 0, 2, 70, 7, 55, 1, 0 }, + { 0, 0, 27, 7, 92, 9, 0 }, + { 0, 6, 87, 7, 35, 0, 0 }, + { 0, 1, 45, 7, 78, 4, 0 }, + { 0, 13, 95, 7, 20, 0, 0 }, + { 0, 2, 66, 7, 59, 1, 0 }, + { 0, 0, 24, 7, 94, 10, 0 }, + { 0, 5, 85, 7, 38, 0, 0 }, + { 0, 1, 42, 7, 81, 4, 0 }, + { 0, 11, 95, 7, 22, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 0, 22, 7, 95, 11, 0 }, + { 0, 4, 81, 7, 42, 1, 0 }, + { 0, 0, 38, 7, 85, 5, 0 }, + { 0, 10, 94, 7, 24, 0, 0 }, + { 0, 1, 59, 7, 66, 2, 0 }, + { 0, 0, 20, 7, 95, 13, 0 }, + { 0, 4, 78, 7, 45, 1, 0 }, + { 0, 0, 35, 7, 87, 6, 0 }, + { 0, 9, 92, 7, 27, 0, 0 }, + { 0, 1, 55, 7, 70, 2, 0 }, + { 0, 0, 18, 7, 96, 14, 0 }, + { 0, 3, 76, 7, 48, 1, 0 }, + { 0, 0, 32, 7, 89, 7, 0 }, + { 0, 8, 90, 7, 30, 0, 0 }, + { 0, 1, 52, 7, 72, 3, 0 } }, + .odd = { { 0, 1, 40, 7, 82, 5, 0 }, + { 0, 11, 94, 7, 23, 0, 0 }, + { 0, 2, 61, 7, 63, 2, 0 }, + { 0, 0, 21, 7, 95, 12, 0 }, + { 0, 4, 80, 7, 43, 1, 0 }, + { 0, 0, 37, 7, 85, 6, 0 }, + { 0, 9, 93, 7, 26, 0, 0 }, + { 0, 1, 57, 7, 68, 2, 0 }, + { 0, 0, 19, 7, 95, 14, 0 }, + { 0, 4, 76, 7, 47, 1, 0 }, + { 0, 0, 34, 7, 88, 6, 0 }, + { 0, 8, 92, 7, 28, 0, 0 }, + { 0, 1, 54, 7, 70, 3, 0 }, + { 0, 0, 17, 7, 96, 15, 0 }, + { 0, 3, 74, 7, 50, 1, 0 }, + { 0, 0, 31, 7, 90, 7, 0 }, + { 0, 7, 90, 7, 31, 0, 0 }, + { 0, 1, 50, 7, 74, 3, 0 }, + { 0, 15, 96, 7, 17, 0, 0 }, + { 0, 3, 70, 7, 54, 1, 0 }, + { 0, 0, 28, 7, 92, 8, 0 }, + { 0, 6, 88, 7, 34, 0, 0 }, + { 0, 1, 47, 7, 76, 4, 0 }, + { 0, 14, 95, 7, 19, 0, 0 }, + { 0, 2, 68, 7, 57, 1, 0 }, + { 0, 0, 26, 7, 93, 9, 0 }, + { 0, 6, 85, 7, 37, 0, 0 }, + { 0, 1, 43, 7, 80, 4, 0 }, + { 0, 12, 95, 7, 21, 0, 0 }, + { 0, 2, 63, 7, 61, 2, 0 }, + { 0, 0, 23, 7, 94, 11, 0 }, + { 0, 5, 82, 7, 40, 1, 0 } } }, + .ptrn_arr = { { 0x9324c993, 0xc99324c9, 0x26499324, 0x93264993, + 0x932649 } }, + .sample_patrn_length = 154, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 46) = 0.410256 */ + .hor_phase_arr = { + .even = { { 0, 17, 94, 7, 17, 0, 0 }, + { 0, 3, 69, 7, 55, 1, 0 }, + { 0, 0, 25, 7, 93, 10, 0 }, + { 0, 5, 80, 7, 42, 1, 0 }, + { 0, 0, 36, 7, 86, 6, 0 }, + { 0, 8, 90, 7, 30, 0, 0 }, + { 0, 1, 49, 7, 74, 4, 0 }, + { 0, 13, 94, 7, 21, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 0, 21, 7, 94, 13, 0 }, + { 0, 4, 74, 7, 49, 1, 0 }, + { 0, 0, 30, 7, 90, 8, 0 }, + { 0, 6, 86, 7, 36, 0, 0 }, + { 0, 1, 42, 7, 80, 5, 0 }, + { 0, 10, 93, 7, 25, 0, 0 }, + { 0, 1, 55, 7, 69, 3, 0 } }, + .odd = { { 0, 1, 39, 7, 83, 5, 0 }, + { 0, 9, 91, 7, 28, 0, 0 }, + { 0, 1, 52, 7, 72, 3, 0 }, + { 0, 15, 94, 7, 19, 0, 0 }, + { 0, 2, 65, 7, 59, 2, 0 }, + { 0, 0, 23, 7, 93, 12, 0 }, + { 0, 4, 78, 7, 45, 1, 0 }, + { 0, 0, 33, 7, 88, 7, 0 }, + { 0, 7, 88, 7, 33, 0, 0 }, + { 0, 1, 45, 7, 78, 4, 0 }, + { 0, 12, 93, 7, 23, 0, 0 }, + { 0, 2, 59, 7, 65, 2, 0 }, + { 0, 0, 19, 7, 94, 15, 0 }, + { 0, 3, 72, 7, 52, 1, 0 }, + { 0, 0, 28, 7, 91, 9, 0 }, + { 0, 5, 83, 7, 39, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 17, 94, 7, 17, 0, 0 }, + { 0, 3, 69, 7, 55, 1, 0 }, + { 0, 0, 25, 7, 93, 10, 0 }, + { 0, 5, 80, 7, 42, 1, 0 }, + { 0, 0, 36, 7, 86, 6, 0 }, + { 0, 8, 90, 7, 30, 0, 0 }, + { 0, 1, 49, 7, 74, 4, 0 }, + { 0, 13, 94, 7, 21, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 0, 21, 7, 94, 13, 0 }, + { 0, 4, 74, 7, 49, 1, 0 }, + { 0, 0, 30, 7, 90, 8, 0 }, + { 0, 6, 86, 7, 36, 0, 0 }, + { 0, 1, 42, 7, 80, 5, 0 }, + { 0, 10, 93, 7, 25, 0, 0 }, + { 0, 1, 55, 7, 69, 3, 0 } }, + .odd = { { 0, 1, 39, 7, 83, 5, 0 }, + { 0, 9, 91, 7, 28, 0, 0 }, + { 0, 1, 52, 7, 72, 3, 0 }, + { 0, 15, 94, 7, 19, 0, 0 }, + { 0, 2, 65, 7, 59, 2, 0 }, + { 0, 0, 23, 7, 93, 12, 0 }, + { 0, 4, 78, 7, 45, 1, 0 }, + { 0, 0, 33, 7, 88, 7, 0 }, + { 0, 7, 88, 7, 33, 0, 0 }, + { 0, 1, 45, 7, 78, 4, 0 }, + { 0, 12, 93, 7, 23, 0, 0 }, + { 0, 2, 59, 7, 65, 2, 0 }, + { 0, 0, 19, 7, 94, 15, 0 }, + { 0, 3, 72, 7, 52, 1, 0 }, + { 0, 0, 28, 7, 91, 9, 0 }, + { 0, 5, 83, 7, 39, 1, 0 } } }, + .ptrn_arr = { { 0x93264993, 0x4c99264c, 0x932 } }, + .sample_patrn_length = 78, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 47) = 0.405063 */ + .hor_phase_arr = { + .even = { { 0, 17, 94, 7, 17, 0, 0 }, + { 0, 2, 65, 7, 59, 2, 0 }, + { 0, 0, 21, 7, 93, 14, 0 }, + { 0, 3, 72, 7, 52, 1, 0 }, + { 0, 0, 26, 7, 91, 11, 0 }, + { 0, 4, 78, 7, 45, 1, 0 }, + { 0, 0, 31, 7, 88, 9, 0 }, + { 0, 6, 82, 7, 39, 1, 0 }, + { 0, 1, 36, 7, 84, 7, 0 }, + { 0, 8, 87, 7, 33, 0, 0 }, + { 0, 1, 42, 7, 80, 5, 0 }, + { 0, 10, 90, 7, 28, 0, 0 }, + { 0, 1, 49, 7, 74, 4, 0 }, + { 0, 12, 93, 7, 23, 0, 0 }, + { 0, 2, 55, 7, 68, 3, 0 }, + { 0, 15, 94, 7, 19, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 0, 19, 7, 94, 15, 0 }, + { 0, 3, 68, 7, 55, 2, 0 }, + { 0, 0, 23, 7, 93, 12, 0 }, + { 0, 4, 74, 7, 49, 1, 0 }, + { 0, 0, 28, 7, 90, 10, 0 }, + { 0, 5, 80, 7, 42, 1, 0 }, + { 0, 0, 33, 7, 87, 8, 0 }, + { 0, 7, 84, 7, 36, 1, 0 }, + { 0, 1, 39, 7, 82, 6, 0 }, + { 0, 9, 88, 7, 31, 0, 0 }, + { 0, 1, 45, 7, 78, 4, 0 }, + { 0, 11, 91, 7, 26, 0, 0 }, + { 0, 1, 52, 7, 72, 3, 0 }, + { 0, 14, 93, 7, 21, 0, 0 }, + { 0, 2, 59, 7, 65, 2, 0 } }, + .odd = { { 0, 1, 38, 7, 83, 6, 0 }, + { 0, 8, 88, 7, 32, 0, 0 }, + { 0, 1, 44, 7, 78, 5, 0 }, + { 0, 10, 91, 7, 27, 0, 0 }, + { 0, 1, 50, 7, 73, 4, 0 }, + { 0, 13, 93, 7, 22, 0, 0 }, + { 0, 2, 57, 7, 66, 3, 0 }, + { 0, 16, 94, 7, 18, 0, 0 }, + { 0, 2, 64, 7, 60, 2, 0 }, + { 0, 0, 20, 7, 93, 15, 0 }, + { 0, 3, 70, 7, 54, 1, 0 }, + { 0, 0, 24, 7, 92, 12, 0 }, + { 0, 4, 76, 7, 47, 1, 0 }, + { 0, 0, 29, 7, 90, 9, 0 }, + { 0, 5, 81, 7, 41, 1, 0 }, + { 0, 0, 35, 7, 86, 7, 0 }, + { 0, 7, 86, 7, 35, 0, 0 }, + { 0, 1, 41, 7, 81, 5, 0 }, + { 0, 9, 90, 7, 29, 0, 0 }, + { 0, 1, 47, 7, 76, 4, 0 }, + { 0, 12, 92, 7, 24, 0, 0 }, + { 0, 1, 54, 7, 70, 3, 0 }, + { 0, 15, 93, 7, 20, 0, 0 }, + { 0, 2, 60, 7, 64, 2, 0 }, + { 0, 0, 18, 7, 94, 16, 0 }, + { 0, 3, 66, 7, 57, 2, 0 }, + { 0, 0, 22, 7, 93, 13, 0 }, + { 0, 4, 73, 7, 50, 1, 0 }, + { 0, 0, 27, 7, 91, 10, 0 }, + { 0, 5, 78, 7, 44, 1, 0 }, + { 0, 0, 32, 7, 88, 8, 0 }, + { 0, 6, 83, 7, 38, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 17, 94, 7, 17, 0, 0 }, + { 0, 2, 65, 7, 59, 2, 0 }, + { 0, 0, 21, 7, 93, 14, 0 }, + { 0, 3, 72, 7, 52, 1, 0 }, + { 0, 0, 26, 7, 91, 11, 0 }, + { 0, 4, 78, 7, 45, 1, 0 }, + { 0, 0, 31, 7, 88, 9, 0 }, + { 0, 6, 82, 7, 39, 1, 0 }, + { 0, 1, 36, 7, 84, 7, 0 }, + { 0, 8, 87, 7, 33, 0, 0 }, + { 0, 1, 42, 7, 80, 5, 0 }, + { 0, 10, 90, 7, 28, 0, 0 }, + { 0, 1, 49, 7, 74, 4, 0 }, + { 0, 12, 93, 7, 23, 0, 0 }, + { 0, 2, 55, 7, 68, 3, 0 }, + { 0, 15, 94, 7, 19, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 0, 19, 7, 94, 15, 0 }, + { 0, 3, 68, 7, 55, 2, 0 }, + { 0, 0, 23, 7, 93, 12, 0 }, + { 0, 4, 74, 7, 49, 1, 0 }, + { 0, 0, 28, 7, 90, 10, 0 }, + { 0, 5, 80, 7, 42, 1, 0 }, + { 0, 0, 33, 7, 87, 8, 0 }, + { 0, 7, 84, 7, 36, 1, 0 }, + { 0, 1, 39, 7, 82, 6, 0 }, + { 0, 9, 88, 7, 31, 0, 0 }, + { 0, 1, 45, 7, 78, 4, 0 }, + { 0, 11, 91, 7, 26, 0, 0 }, + { 0, 1, 52, 7, 72, 3, 0 }, + { 0, 14, 93, 7, 21, 0, 0 }, + { 0, 2, 59, 7, 65, 2, 0 } }, + .odd = { { 0, 1, 38, 7, 83, 6, 0 }, + { 0, 8, 88, 7, 32, 0, 0 }, + { 0, 1, 44, 7, 78, 5, 0 }, + { 0, 10, 91, 7, 27, 0, 0 }, + { 0, 1, 50, 7, 73, 4, 0 }, + { 0, 13, 93, 7, 22, 0, 0 }, + { 0, 2, 57, 7, 66, 3, 0 }, + { 0, 16, 94, 7, 18, 0, 0 }, + { 0, 2, 64, 7, 60, 2, 0 }, + { 0, 0, 20, 7, 93, 15, 0 }, + { 0, 3, 70, 7, 54, 1, 0 }, + { 0, 0, 24, 7, 92, 12, 0 }, + { 0, 4, 76, 7, 47, 1, 0 }, + { 0, 0, 29, 7, 90, 9, 0 }, + { 0, 5, 81, 7, 41, 1, 0 }, + { 0, 0, 35, 7, 86, 7, 0 }, + { 0, 7, 86, 7, 35, 0, 0 }, + { 0, 1, 41, 7, 81, 5, 0 }, + { 0, 9, 90, 7, 29, 0, 0 }, + { 0, 1, 47, 7, 76, 4, 0 }, + { 0, 12, 92, 7, 24, 0, 0 }, + { 0, 1, 54, 7, 70, 3, 0 }, + { 0, 15, 93, 7, 20, 0, 0 }, + { 0, 2, 60, 7, 64, 2, 0 }, + { 0, 0, 18, 7, 94, 16, 0 }, + { 0, 3, 66, 7, 57, 2, 0 }, + { 0, 0, 22, 7, 93, 13, 0 }, + { 0, 4, 73, 7, 50, 1, 0 }, + { 0, 0, 27, 7, 91, 10, 0 }, + { 0, 5, 78, 7, 44, 1, 0 }, + { 0, 0, 32, 7, 88, 8, 0 }, + { 0, 6, 83, 7, 38, 1, 0 } } }, + .ptrn_arr = { { 0x99264993, 0x24c93264, 0x99264c93, 0x24c99264, + 0x9324c93 } }, + .sample_patrn_length = 158, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 48) = 0.4 */ + .hor_phase_arr = { + .even = { { 0, 18, 92, 7, 18, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 } }, + .odd = { { 0, 1, 37, 7, 83, 7, 0 }, + { 0, 7, 83, 7, 37, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 18, 92, 7, 18, 0, 0 }, + { 0, 2, 62, 7, 62, 2, 0 } }, + .odd = { { 0, 1, 37, 7, 83, 7, 0 }, + { 0, 7, 83, 7, 37, 1, 0 } } }, + .ptrn_arr = { { 0x93 } }, + .sample_patrn_length = 10, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 49) = 0.395062 */ + .hor_phase_arr = { + .even = { { 0, 18, 92, 7, 18, 0, 0 }, + { 0, 2, 58, 7, 65, 3, 0 }, + { 0, 15, 91, 7, 22, 0, 0 }, + { 0, 2, 52, 7, 70, 4, 0 }, + { 0, 12, 89, 7, 27, 0, 0 }, + { 0, 1, 46, 7, 76, 5, 0 }, + { 0, 9, 87, 7, 32, 0, 0 }, + { 0, 1, 40, 7, 80, 7, 0 }, + { 0, 7, 83, 7, 37, 1, 0 }, + { 0, 1, 34, 7, 85, 8, 0 }, + { 0, 6, 78, 7, 43, 1, 0 }, + { 0, 0, 29, 7, 88, 11, 0 }, + { 0, 4, 74, 7, 49, 1, 0 }, + { 0, 0, 24, 7, 91, 13, 0 }, + { 0, 3, 68, 7, 55, 2, 0 }, + { 0, 0, 20, 7, 92, 16, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 16, 92, 7, 20, 0, 0 }, + { 0, 2, 55, 7, 68, 3, 0 }, + { 0, 13, 91, 7, 24, 0, 0 }, + { 0, 1, 49, 7, 74, 4, 0 }, + { 0, 11, 88, 7, 29, 0, 0 }, + { 0, 1, 43, 7, 78, 6, 0 }, + { 0, 8, 85, 7, 34, 1, 0 }, + { 0, 1, 37, 7, 83, 7, 0 }, + { 0, 7, 80, 7, 40, 1, 0 }, + { 0, 0, 32, 7, 87, 9, 0 }, + { 0, 5, 76, 7, 46, 1, 0 }, + { 0, 0, 27, 7, 89, 12, 0 }, + { 0, 4, 70, 7, 52, 2, 0 }, + { 0, 0, 22, 7, 91, 15, 0 }, + { 0, 3, 65, 7, 58, 2, 0 } }, + .odd = { { 0, 1, 36, 7, 83, 8, 0 }, + { 0, 6, 80, 7, 41, 1, 0 }, + { 0, 0, 30, 7, 88, 10, 0 }, + { 0, 5, 75, 7, 47, 1, 0 }, + { 0, 0, 25, 7, 90, 13, 0 }, + { 0, 4, 68, 7, 54, 2, 0 }, + { 0, 0, 21, 7, 91, 16, 0 }, + { 0, 3, 63, 7, 60, 2, 0 }, + { 0, 17, 92, 7, 19, 0, 0 }, + { 0, 2, 57, 7, 66, 3, 0 }, + { 0, 14, 91, 7, 23, 0, 0 }, + { 0, 1, 51, 7, 72, 4, 0 }, + { 0, 11, 89, 7, 28, 0, 0 }, + { 0, 1, 44, 7, 78, 5, 0 }, + { 0, 9, 85, 7, 33, 1, 0 }, + { 0, 1, 38, 7, 82, 7, 0 }, + { 0, 7, 82, 7, 38, 1, 0 }, + { 0, 1, 33, 7, 85, 9, 0 }, + { 0, 5, 78, 7, 44, 1, 0 }, + { 0, 0, 28, 7, 89, 11, 0 }, + { 0, 4, 72, 7, 51, 1, 0 }, + { 0, 0, 23, 7, 91, 14, 0 }, + { 0, 3, 66, 7, 57, 2, 0 }, + { 0, 0, 19, 7, 92, 17, 0 }, + { 0, 2, 60, 7, 63, 3, 0 }, + { 0, 16, 91, 7, 21, 0, 0 }, + { 0, 2, 54, 7, 68, 4, 0 }, + { 0, 13, 90, 7, 25, 0, 0 }, + { 0, 1, 47, 7, 75, 5, 0 }, + { 0, 10, 88, 7, 30, 0, 0 }, + { 0, 1, 41, 7, 80, 6, 0 }, + { 0, 8, 83, 7, 36, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 18, 92, 7, 18, 0, 0 }, + { 0, 2, 58, 7, 65, 3, 0 }, + { 0, 15, 91, 7, 22, 0, 0 }, + { 0, 2, 52, 7, 70, 4, 0 }, + { 0, 12, 89, 7, 27, 0, 0 }, + { 0, 1, 46, 7, 76, 5, 0 }, + { 0, 9, 87, 7, 32, 0, 0 }, + { 0, 1, 40, 7, 80, 7, 0 }, + { 0, 7, 83, 7, 37, 1, 0 }, + { 0, 1, 34, 7, 85, 8, 0 }, + { 0, 6, 78, 7, 43, 1, 0 }, + { 0, 0, 29, 7, 88, 11, 0 }, + { 0, 4, 74, 7, 49, 1, 0 }, + { 0, 0, 24, 7, 91, 13, 0 }, + { 0, 3, 68, 7, 55, 2, 0 }, + { 0, 0, 20, 7, 92, 16, 0 }, + { 0, 2, 62, 7, 62, 2, 0 }, + { 0, 16, 92, 7, 20, 0, 0 }, + { 0, 2, 55, 7, 68, 3, 0 }, + { 0, 13, 91, 7, 24, 0, 0 }, + { 0, 1, 49, 7, 74, 4, 0 }, + { 0, 11, 88, 7, 29, 0, 0 }, + { 0, 1, 43, 7, 78, 6, 0 }, + { 0, 8, 85, 7, 34, 1, 0 }, + { 0, 1, 37, 7, 83, 7, 0 }, + { 0, 7, 80, 7, 40, 1, 0 }, + { 0, 0, 32, 7, 87, 9, 0 }, + { 0, 5, 76, 7, 46, 1, 0 }, + { 0, 0, 27, 7, 89, 12, 0 }, + { 0, 4, 70, 7, 52, 2, 0 }, + { 0, 0, 22, 7, 91, 15, 0 }, + { 0, 3, 65, 7, 58, 2, 0 } }, + .odd = { { 0, 1, 36, 7, 83, 8, 0 }, + { 0, 6, 80, 7, 41, 1, 0 }, + { 0, 0, 30, 7, 88, 10, 0 }, + { 0, 5, 75, 7, 47, 1, 0 }, + { 0, 0, 25, 7, 90, 13, 0 }, + { 0, 4, 68, 7, 54, 2, 0 }, + { 0, 0, 21, 7, 91, 16, 0 }, + { 0, 3, 63, 7, 60, 2, 0 }, + { 0, 17, 92, 7, 19, 0, 0 }, + { 0, 2, 57, 7, 66, 3, 0 }, + { 0, 14, 91, 7, 23, 0, 0 }, + { 0, 1, 51, 7, 72, 4, 0 }, + { 0, 11, 89, 7, 28, 0, 0 }, + { 0, 1, 44, 7, 78, 5, 0 }, + { 0, 9, 85, 7, 33, 1, 0 }, + { 0, 1, 38, 7, 82, 7, 0 }, + { 0, 7, 82, 7, 38, 1, 0 }, + { 0, 1, 33, 7, 85, 9, 0 }, + { 0, 5, 78, 7, 44, 1, 0 }, + { 0, 0, 28, 7, 89, 11, 0 }, + { 0, 4, 72, 7, 51, 1, 0 }, + { 0, 0, 23, 7, 91, 14, 0 }, + { 0, 3, 66, 7, 57, 2, 0 }, + { 0, 0, 19, 7, 92, 17, 0 }, + { 0, 2, 60, 7, 63, 3, 0 }, + { 0, 16, 91, 7, 21, 0, 0 }, + { 0, 2, 54, 7, 68, 4, 0 }, + { 0, 13, 90, 7, 25, 0, 0 }, + { 0, 1, 47, 7, 75, 5, 0 }, + { 0, 10, 88, 7, 30, 0, 0 }, + { 0, 1, 41, 7, 80, 6, 0 }, + { 0, 8, 83, 7, 36, 1, 0 } } }, + .ptrn_arr = { { 0xc9324c93, 0x92649924, 0x24c92649, 0x49324c93, + 0x92649926 } }, + .sample_patrn_length = 162, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 50) = 0.390244 */ + .hor_phase_arr = { + .even = { { 0, 19, 90, 7, 19, 0, 0 }, + { 0, 2, 55, 7, 67, 4, 0 }, + { 0, 12, 89, 7, 27, 0, 0 }, + { 0, 1, 43, 7, 78, 6, 0 }, + { 0, 8, 82, 7, 37, 1, 0 }, + { 0, 1, 32, 7, 85, 10, 0 }, + { 0, 5, 73, 7, 49, 1, 0 }, + { 0, 0, 23, 7, 90, 15, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 15, 90, 7, 23, 0, 0 }, + { 0, 1, 49, 7, 73, 5, 0 }, + { 0, 10, 85, 7, 32, 1, 0 }, + { 0, 1, 37, 7, 82, 8, 0 }, + { 0, 6, 78, 7, 43, 1, 0 }, + { 0, 0, 27, 7, 89, 12, 0 }, + { 0, 4, 67, 7, 55, 2, 0 } }, + .odd = { { 0, 1, 35, 7, 83, 9, 0 }, + { 0, 5, 76, 7, 46, 1, 0 }, + { 0, 0, 25, 7, 89, 14, 0 }, + { 0, 3, 65, 7, 58, 2, 0 }, + { 0, 17, 90, 7, 21, 0, 0 }, + { 0, 2, 52, 7, 70, 4, 0 }, + { 0, 11, 88, 7, 29, 0, 0 }, + { 0, 1, 40, 7, 80, 7, 0 }, + { 0, 7, 80, 7, 40, 1, 0 }, + { 0, 0, 29, 7, 88, 11, 0 }, + { 0, 4, 70, 7, 52, 2, 0 }, + { 0, 0, 21, 7, 90, 17, 0 }, + { 0, 2, 58, 7, 65, 3, 0 }, + { 0, 14, 89, 7, 25, 0, 0 }, + { 0, 1, 46, 7, 76, 5, 0 }, + { 0, 9, 83, 7, 35, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 19, 90, 7, 19, 0, 0 }, + { 0, 2, 55, 7, 67, 4, 0 }, + { 0, 12, 89, 7, 27, 0, 0 }, + { 0, 1, 43, 7, 78, 6, 0 }, + { 0, 8, 82, 7, 37, 1, 0 }, + { 0, 1, 32, 7, 85, 10, 0 }, + { 0, 5, 73, 7, 49, 1, 0 }, + { 0, 0, 23, 7, 90, 15, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 15, 90, 7, 23, 0, 0 }, + { 0, 1, 49, 7, 73, 5, 0 }, + { 0, 10, 85, 7, 32, 1, 0 }, + { 0, 1, 37, 7, 82, 8, 0 }, + { 0, 6, 78, 7, 43, 1, 0 }, + { 0, 0, 27, 7, 89, 12, 0 }, + { 0, 4, 67, 7, 55, 2, 0 } }, + .odd = { { 0, 1, 35, 7, 83, 9, 0 }, + { 0, 5, 76, 7, 46, 1, 0 }, + { 0, 0, 25, 7, 89, 14, 0 }, + { 0, 3, 65, 7, 58, 2, 0 }, + { 0, 17, 90, 7, 21, 0, 0 }, + { 0, 2, 52, 7, 70, 4, 0 }, + { 0, 11, 88, 7, 29, 0, 0 }, + { 0, 1, 40, 7, 80, 7, 0 }, + { 0, 7, 80, 7, 40, 1, 0 }, + { 0, 0, 29, 7, 88, 11, 0 }, + { 0, 4, 70, 7, 52, 2, 0 }, + { 0, 0, 21, 7, 90, 17, 0 }, + { 0, 2, 58, 7, 65, 3, 0 }, + { 0, 14, 89, 7, 25, 0, 0 }, + { 0, 1, 46, 7, 76, 5, 0 }, + { 0, 9, 83, 7, 35, 1, 0 } } }, + .ptrn_arr = { { 0x49924c93, 0x9324c926, 0x9264 } }, + .sample_patrn_length = 82, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 51) = 0.385542 */ + .hor_phase_arr = { + .even = { { 0, 19, 90, 7, 19, 0, 0 }, + { 0, 2, 52, 7, 70, 4, 0 }, + { 0, 10, 85, 7, 32, 1, 0 }, + { 0, 1, 35, 7, 83, 9, 0 }, + { 0, 5, 72, 7, 49, 2, 0 }, + { 0, 0, 21, 7, 90, 17, 0 }, + { 0, 2, 55, 7, 67, 4, 0 }, + { 0, 11, 87, 7, 30, 0, 0 }, + { 0, 1, 38, 7, 81, 8, 0 }, + { 0, 6, 75, 7, 46, 1, 0 }, + { 0, 0, 23, 7, 89, 16, 0 }, + { 0, 2, 58, 7, 65, 3, 0 }, + { 0, 13, 87, 7, 28, 0, 0 }, + { 0, 1, 41, 7, 79, 7, 0 }, + { 0, 6, 78, 7, 43, 1, 0 }, + { 0, 0, 25, 7, 89, 14, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 14, 89, 7, 25, 0, 0 }, + { 0, 1, 43, 7, 78, 6, 0 }, + { 0, 7, 79, 7, 41, 1, 0 }, + { 0, 0, 28, 7, 87, 13, 0 }, + { 0, 3, 65, 7, 58, 2, 0 }, + { 0, 16, 89, 7, 23, 0, 0 }, + { 0, 1, 46, 7, 75, 6, 0 }, + { 0, 8, 81, 7, 38, 1, 0 }, + { 0, 0, 30, 7, 87, 11, 0 }, + { 0, 4, 67, 7, 55, 2, 0 }, + { 0, 17, 90, 7, 21, 0, 0 }, + { 0, 2, 49, 7, 72, 5, 0 }, + { 0, 9, 83, 7, 35, 1, 0 }, + { 0, 1, 32, 7, 85, 10, 0 }, + { 0, 4, 70, 7, 52, 2, 0 } }, + .odd = { { 0, 1, 34, 7, 83, 10, 0 }, + { 0, 5, 70, 7, 51, 2, 0 }, + { 0, 0, 20, 7, 90, 18, 0 }, + { 0, 2, 54, 7, 68, 4, 0 }, + { 0, 11, 85, 7, 31, 1, 0 }, + { 0, 1, 36, 7, 82, 9, 0 }, + { 0, 5, 74, 7, 48, 1, 0 }, + { 0, 0, 22, 7, 89, 17, 0 }, + { 0, 2, 57, 7, 65, 4, 0 }, + { 0, 12, 87, 7, 29, 0, 0 }, + { 0, 1, 39, 7, 80, 8, 0 }, + { 0, 6, 76, 7, 45, 1, 0 }, + { 0, 0, 24, 7, 89, 15, 0 }, + { 0, 3, 60, 7, 62, 3, 0 }, + { 0, 13, 89, 7, 26, 0, 0 }, + { 0, 1, 42, 7, 78, 7, 0 }, + { 0, 7, 78, 7, 42, 1, 0 }, + { 0, 0, 26, 7, 89, 13, 0 }, + { 0, 3, 62, 7, 60, 3, 0 }, + { 0, 15, 89, 7, 24, 0, 0 }, + { 0, 1, 45, 7, 76, 6, 0 }, + { 0, 8, 80, 7, 39, 1, 0 }, + { 0, 0, 29, 7, 87, 12, 0 }, + { 0, 4, 65, 7, 57, 2, 0 }, + { 0, 17, 89, 7, 22, 0, 0 }, + { 0, 1, 48, 7, 74, 5, 0 }, + { 0, 9, 82, 7, 36, 1, 0 }, + { 0, 1, 31, 7, 85, 11, 0 }, + { 0, 4, 68, 7, 54, 2, 0 }, + { 0, 18, 90, 7, 20, 0, 0 }, + { 0, 2, 51, 7, 70, 5, 0 }, + { 0, 10, 83, 7, 34, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 19, 90, 7, 19, 0, 0 }, + { 0, 2, 52, 7, 70, 4, 0 }, + { 0, 10, 85, 7, 32, 1, 0 }, + { 0, 1, 35, 7, 83, 9, 0 }, + { 0, 5, 72, 7, 49, 2, 0 }, + { 0, 0, 21, 7, 90, 17, 0 }, + { 0, 2, 55, 7, 67, 4, 0 }, + { 0, 11, 87, 7, 30, 0, 0 }, + { 0, 1, 38, 7, 81, 8, 0 }, + { 0, 6, 75, 7, 46, 1, 0 }, + { 0, 0, 23, 7, 89, 16, 0 }, + { 0, 2, 58, 7, 65, 3, 0 }, + { 0, 13, 87, 7, 28, 0, 0 }, + { 0, 1, 41, 7, 79, 7, 0 }, + { 0, 6, 78, 7, 43, 1, 0 }, + { 0, 0, 25, 7, 89, 14, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 14, 89, 7, 25, 0, 0 }, + { 0, 1, 43, 7, 78, 6, 0 }, + { 0, 7, 79, 7, 41, 1, 0 }, + { 0, 0, 28, 7, 87, 13, 0 }, + { 0, 3, 65, 7, 58, 2, 0 }, + { 0, 16, 89, 7, 23, 0, 0 }, + { 0, 1, 46, 7, 75, 6, 0 }, + { 0, 8, 81, 7, 38, 1, 0 }, + { 0, 0, 30, 7, 87, 11, 0 }, + { 0, 4, 67, 7, 55, 2, 0 }, + { 0, 17, 90, 7, 21, 0, 0 }, + { 0, 2, 49, 7, 72, 5, 0 }, + { 0, 9, 83, 7, 35, 1, 0 }, + { 0, 1, 32, 7, 85, 10, 0 }, + { 0, 4, 70, 7, 52, 2, 0 } }, + .odd = { { 0, 1, 34, 7, 83, 10, 0 }, + { 0, 5, 70, 7, 51, 2, 0 }, + { 0, 0, 20, 7, 90, 18, 0 }, + { 0, 2, 54, 7, 68, 4, 0 }, + { 0, 11, 85, 7, 31, 1, 0 }, + { 0, 1, 36, 7, 82, 9, 0 }, + { 0, 5, 74, 7, 48, 1, 0 }, + { 0, 0, 22, 7, 89, 17, 0 }, + { 0, 2, 57, 7, 65, 4, 0 }, + { 0, 12, 87, 7, 29, 0, 0 }, + { 0, 1, 39, 7, 80, 8, 0 }, + { 0, 6, 76, 7, 45, 1, 0 }, + { 0, 0, 24, 7, 89, 15, 0 }, + { 0, 3, 60, 7, 62, 3, 0 }, + { 0, 13, 89, 7, 26, 0, 0 }, + { 0, 1, 42, 7, 78, 7, 0 }, + { 0, 7, 78, 7, 42, 1, 0 }, + { 0, 0, 26, 7, 89, 13, 0 }, + { 0, 3, 62, 7, 60, 3, 0 }, + { 0, 15, 89, 7, 24, 0, 0 }, + { 0, 1, 45, 7, 76, 6, 0 }, + { 0, 8, 80, 7, 39, 1, 0 }, + { 0, 0, 29, 7, 87, 12, 0 }, + { 0, 4, 65, 7, 57, 2, 0 }, + { 0, 17, 89, 7, 22, 0, 0 }, + { 0, 1, 48, 7, 74, 5, 0 }, + { 0, 9, 82, 7, 36, 1, 0 }, + { 0, 1, 31, 7, 85, 11, 0 }, + { 0, 4, 68, 7, 54, 2, 0 }, + { 0, 18, 90, 7, 20, 0, 0 }, + { 0, 2, 51, 7, 70, 5, 0 }, + { 0, 10, 83, 7, 34, 1, 0 } } }, + .ptrn_arr = { { 0x49924c93, 0xc9264932, 0x93249924, 0x924c9264, + 0x26493249, 0x9 } }, + .sample_patrn_length = 166, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 52) = 0.380952 */ + .hor_phase_arr = { + .even = { { 0, 20, 88, 7, 20, 0, 0 }, + { 0, 2, 49, 7, 72, 5, 0 }, + { 0, 8, 81, 7, 38, 1, 0 }, + { 0, 0, 28, 7, 87, 13, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 13, 87, 7, 28, 0, 0 }, + { 0, 1, 38, 7, 81, 8, 0 }, + { 0, 5, 72, 7, 49, 2, 0 } }, + .odd = { { 0, 1, 33, 7, 83, 11, 0 }, + { 0, 4, 67, 7, 55, 2, 0 }, + { 0, 16, 88, 7, 24, 0, 0 }, + { 0, 1, 44, 7, 76, 7, 0 }, + { 0, 7, 76, 7, 44, 1, 0 }, + { 0, 0, 24, 7, 88, 16, 0 }, + { 0, 2, 55, 7, 67, 4, 0 }, + { 0, 11, 83, 7, 33, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 20, 88, 7, 20, 0, 0 }, + { 0, 2, 49, 7, 72, 5, 0 }, + { 0, 8, 81, 7, 38, 1, 0 }, + { 0, 0, 28, 7, 87, 13, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 13, 87, 7, 28, 0, 0 }, + { 0, 1, 38, 7, 81, 8, 0 }, + { 0, 5, 72, 7, 49, 2, 0 } }, + .odd = { { 0, 1, 33, 7, 83, 11, 0 }, + { 0, 4, 67, 7, 55, 2, 0 }, + { 0, 16, 88, 7, 24, 0, 0 }, + { 0, 1, 44, 7, 76, 7, 0 }, + { 0, 7, 76, 7, 44, 1, 0 }, + { 0, 0, 24, 7, 88, 16, 0 }, + { 0, 2, 55, 7, 67, 4, 0 }, + { 0, 11, 83, 7, 33, 1, 0 } } }, + .ptrn_arr = { { 0x4c926493, 0x92 } }, + .sample_patrn_length = 42, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 53) = 0.376471 */ + .hor_phase_arr = { + .even = { { 0, 20, 88, 7, 20, 0, 0 }, + { 0, 2, 47, 7, 73, 6, 0 }, + { 0, 7, 76, 7, 44, 1, 0 }, + { 0, 0, 22, 7, 88, 18, 0 }, + { 0, 2, 49, 7, 72, 5, 0 }, + { 0, 8, 78, 7, 41, 1, 0 }, + { 0, 0, 24, 7, 87, 17, 0 }, + { 0, 2, 52, 7, 69, 5, 0 }, + { 0, 9, 80, 7, 38, 1, 0 }, + { 0, 0, 26, 7, 87, 15, 0 }, + { 0, 2, 55, 7, 67, 4, 0 }, + { 0, 10, 81, 7, 36, 1, 0 }, + { 0, 1, 28, 7, 85, 14, 0 }, + { 0, 3, 58, 7, 63, 4, 0 }, + { 0, 11, 83, 7, 33, 1, 0 }, + { 0, 1, 31, 7, 84, 12, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 12, 84, 7, 31, 1, 0 }, + { 0, 1, 33, 7, 83, 11, 0 }, + { 0, 4, 63, 7, 58, 3, 0 }, + { 0, 14, 85, 7, 28, 1, 0 }, + { 0, 1, 36, 7, 81, 10, 0 }, + { 0, 4, 67, 7, 55, 2, 0 }, + { 0, 15, 87, 7, 26, 0, 0 }, + { 0, 1, 38, 7, 80, 9, 0 }, + { 0, 5, 69, 7, 52, 2, 0 }, + { 0, 17, 87, 7, 24, 0, 0 }, + { 0, 1, 41, 7, 78, 8, 0 }, + { 0, 5, 72, 7, 49, 2, 0 }, + { 0, 18, 88, 7, 22, 0, 0 }, + { 0, 1, 44, 7, 76, 7, 0 }, + { 0, 6, 73, 7, 47, 2, 0 } }, + .odd = { { 0, 1, 32, 7, 83, 12, 0 }, + { 0, 3, 63, 7, 59, 3, 0 }, + { 0, 13, 84, 7, 30, 1, 0 }, + { 0, 1, 34, 7, 83, 10, 0 }, + { 0, 4, 64, 7, 57, 3, 0 }, + { 0, 14, 87, 7, 27, 0, 0 }, + { 0, 1, 37, 7, 81, 9, 0 }, + { 0, 5, 67, 7, 54, 2, 0 }, + { 0, 16, 87, 7, 25, 0, 0 }, + { 0, 1, 40, 7, 79, 8, 0 }, + { 0, 5, 70, 7, 51, 2, 0 }, + { 0, 18, 87, 7, 23, 0, 0 }, + { 0, 1, 42, 7, 78, 7, 0 }, + { 0, 6, 72, 7, 48, 2, 0 }, + { 0, 19, 88, 7, 21, 0, 0 }, + { 0, 1, 45, 7, 75, 7, 0 }, + { 0, 7, 75, 7, 45, 1, 0 }, + { 0, 0, 21, 7, 88, 19, 0 }, + { 0, 2, 48, 7, 72, 6, 0 }, + { 0, 7, 78, 7, 42, 1, 0 }, + { 0, 0, 23, 7, 87, 18, 0 }, + { 0, 2, 51, 7, 70, 5, 0 }, + { 0, 8, 79, 7, 40, 1, 0 }, + { 0, 0, 25, 7, 87, 16, 0 }, + { 0, 2, 54, 7, 67, 5, 0 }, + { 0, 9, 81, 7, 37, 1, 0 }, + { 0, 0, 27, 7, 87, 14, 0 }, + { 0, 3, 57, 7, 64, 4, 0 }, + { 0, 10, 83, 7, 34, 1, 0 }, + { 0, 1, 30, 7, 84, 13, 0 }, + { 0, 3, 59, 7, 63, 3, 0 }, + { 0, 12, 83, 7, 32, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 20, 88, 7, 20, 0, 0 }, + { 0, 2, 47, 7, 73, 6, 0 }, + { 0, 7, 76, 7, 44, 1, 0 }, + { 0, 0, 22, 7, 88, 18, 0 }, + { 0, 2, 49, 7, 72, 5, 0 }, + { 0, 8, 78, 7, 41, 1, 0 }, + { 0, 0, 24, 7, 87, 17, 0 }, + { 0, 2, 52, 7, 69, 5, 0 }, + { 0, 9, 80, 7, 38, 1, 0 }, + { 0, 0, 26, 7, 87, 15, 0 }, + { 0, 2, 55, 7, 67, 4, 0 }, + { 0, 10, 81, 7, 36, 1, 0 }, + { 0, 1, 28, 7, 85, 14, 0 }, + { 0, 3, 58, 7, 63, 4, 0 }, + { 0, 11, 83, 7, 33, 1, 0 }, + { 0, 1, 31, 7, 84, 12, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 12, 84, 7, 31, 1, 0 }, + { 0, 1, 33, 7, 83, 11, 0 }, + { 0, 4, 63, 7, 58, 3, 0 }, + { 0, 14, 85, 7, 28, 1, 0 }, + { 0, 1, 36, 7, 81, 10, 0 }, + { 0, 4, 67, 7, 55, 2, 0 }, + { 0, 15, 87, 7, 26, 0, 0 }, + { 0, 1, 38, 7, 80, 9, 0 }, + { 0, 5, 69, 7, 52, 2, 0 }, + { 0, 17, 87, 7, 24, 0, 0 }, + { 0, 1, 41, 7, 78, 8, 0 }, + { 0, 5, 72, 7, 49, 2, 0 }, + { 0, 18, 88, 7, 22, 0, 0 }, + { 0, 1, 44, 7, 76, 7, 0 }, + { 0, 6, 73, 7, 47, 2, 0 } }, + .odd = { { 0, 1, 32, 7, 83, 12, 0 }, + { 0, 3, 63, 7, 59, 3, 0 }, + { 0, 13, 84, 7, 30, 1, 0 }, + { 0, 1, 34, 7, 83, 10, 0 }, + { 0, 4, 64, 7, 57, 3, 0 }, + { 0, 14, 87, 7, 27, 0, 0 }, + { 0, 1, 37, 7, 81, 9, 0 }, + { 0, 5, 67, 7, 54, 2, 0 }, + { 0, 16, 87, 7, 25, 0, 0 }, + { 0, 1, 40, 7, 79, 8, 0 }, + { 0, 5, 70, 7, 51, 2, 0 }, + { 0, 18, 87, 7, 23, 0, 0 }, + { 0, 1, 42, 7, 78, 7, 0 }, + { 0, 6, 72, 7, 48, 2, 0 }, + { 0, 19, 88, 7, 21, 0, 0 }, + { 0, 1, 45, 7, 75, 7, 0 }, + { 0, 7, 75, 7, 45, 1, 0 }, + { 0, 0, 21, 7, 88, 19, 0 }, + { 0, 2, 48, 7, 72, 6, 0 }, + { 0, 7, 78, 7, 42, 1, 0 }, + { 0, 0, 23, 7, 87, 18, 0 }, + { 0, 2, 51, 7, 70, 5, 0 }, + { 0, 8, 79, 7, 40, 1, 0 }, + { 0, 0, 25, 7, 87, 16, 0 }, + { 0, 2, 54, 7, 67, 5, 0 }, + { 0, 9, 81, 7, 37, 1, 0 }, + { 0, 0, 27, 7, 87, 14, 0 }, + { 0, 3, 57, 7, 64, 4, 0 }, + { 0, 10, 83, 7, 34, 1, 0 }, + { 0, 1, 30, 7, 84, 13, 0 }, + { 0, 3, 59, 7, 63, 3, 0 }, + { 0, 12, 83, 7, 32, 1, 0 } } }, + .ptrn_arr = { { 0x64926493, 0x64926492, 0x4c926492, 0x4c924c92, + 0x4c924c92, 0x92 } }, + .sample_patrn_length = 170, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 54) = 0.372093 */ + .hor_phase_arr = { + .even = { { 0, 21, 86, 7, 21, 0, 0 }, + { 0, 1, 44, 7, 76, 7, 0 }, + { 0, 6, 71, 7, 49, 2, 0 }, + { 0, 17, 86, 7, 25, 0, 0 }, + { 0, 1, 39, 7, 79, 9, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 14, 84, 7, 29, 1, 0 }, + { 0, 1, 34, 7, 82, 11, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 11, 82, 7, 34, 1, 0 }, + { 0, 1, 29, 7, 84, 14, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 9, 79, 7, 39, 1, 0 }, + { 0, 0, 25, 7, 86, 17, 0 }, + { 0, 2, 49, 7, 71, 6, 0 }, + { 0, 7, 76, 7, 44, 1, 0 } }, + .odd = { { 0, 1, 31, 7, 83, 13, 0 }, + { 0, 3, 58, 7, 63, 4, 0 }, + { 0, 10, 81, 7, 36, 1, 0 }, + { 0, 0, 27, 7, 85, 16, 0 }, + { 0, 2, 52, 7, 69, 5, 0 }, + { 0, 8, 78, 7, 41, 1, 0 }, + { 0, 0, 23, 7, 86, 19, 0 }, + { 0, 2, 47, 7, 72, 7, 0 }, + { 0, 7, 72, 7, 47, 2, 0 }, + { 0, 19, 86, 7, 23, 0, 0 }, + { 0, 1, 41, 7, 78, 8, 0 }, + { 0, 5, 69, 7, 52, 2, 0 }, + { 0, 16, 85, 7, 27, 0, 0 }, + { 0, 1, 36, 7, 81, 10, 0 }, + { 0, 4, 63, 7, 58, 3, 0 }, + { 0, 13, 83, 7, 31, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 21, 86, 7, 21, 0, 0 }, + { 0, 1, 44, 7, 76, 7, 0 }, + { 0, 6, 71, 7, 49, 2, 0 }, + { 0, 17, 86, 7, 25, 0, 0 }, + { 0, 1, 39, 7, 79, 9, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 14, 84, 7, 29, 1, 0 }, + { 0, 1, 34, 7, 82, 11, 0 }, + { 0, 3, 61, 7, 61, 3, 0 }, + { 0, 11, 82, 7, 34, 1, 0 }, + { 0, 1, 29, 7, 84, 14, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 9, 79, 7, 39, 1, 0 }, + { 0, 0, 25, 7, 86, 17, 0 }, + { 0, 2, 49, 7, 71, 6, 0 }, + { 0, 7, 76, 7, 44, 1, 0 } }, + .odd = { { 0, 1, 31, 7, 83, 13, 0 }, + { 0, 3, 58, 7, 63, 4, 0 }, + { 0, 10, 81, 7, 36, 1, 0 }, + { 0, 0, 27, 7, 85, 16, 0 }, + { 0, 2, 52, 7, 69, 5, 0 }, + { 0, 8, 78, 7, 41, 1, 0 }, + { 0, 0, 23, 7, 86, 19, 0 }, + { 0, 2, 47, 7, 72, 7, 0 }, + { 0, 7, 72, 7, 47, 2, 0 }, + { 0, 19, 86, 7, 23, 0, 0 }, + { 0, 1, 41, 7, 78, 8, 0 }, + { 0, 5, 69, 7, 52, 2, 0 }, + { 0, 16, 85, 7, 27, 0, 0 }, + { 0, 1, 36, 7, 81, 10, 0 }, + { 0, 4, 63, 7, 58, 3, 0 }, + { 0, 13, 83, 7, 31, 1, 0 } } }, + .ptrn_arr = { { 0x24932493, 0x24992493, 0x92499 } }, + .sample_patrn_length = 86, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 55) = 0.367816 */ + .hor_phase_arr = { + .even = { { 0, 21, 86, 7, 21, 0, 0 }, + { 0, 1, 41, 7, 77, 9, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 13, 82, 7, 32, 1, 0 }, + { 0, 1, 29, 7, 83, 15, 0 }, + { 0, 2, 52, 7, 69, 5, 0 }, + { 0, 8, 74, 7, 44, 2, 0 }, + { 0, 19, 86, 7, 23, 0, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 4, 63, 7, 58, 3, 0 }, + { 0, 12, 81, 7, 34, 1, 0 }, + { 0, 1, 27, 7, 84, 16, 0 }, + { 0, 2, 50, 7, 70, 6, 0 }, + { 0, 7, 72, 7, 47, 2, 0 }, + { 0, 18, 85, 7, 25, 0, 0 }, + { 0, 1, 36, 7, 80, 11, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 11, 80, 7, 36, 1, 0 }, + { 0, 0, 25, 7, 85, 18, 0 }, + { 0, 2, 47, 7, 72, 7, 0 }, + { 0, 6, 70, 7, 50, 2, 0 }, + { 0, 16, 84, 7, 27, 1, 0 }, + { 0, 1, 34, 7, 81, 12, 0 }, + { 0, 3, 58, 7, 63, 4, 0 }, + { 0, 10, 78, 7, 39, 1, 0 }, + { 0, 0, 23, 7, 86, 19, 0 }, + { 0, 2, 44, 7, 74, 8, 0 }, + { 0, 5, 69, 7, 52, 2, 0 }, + { 0, 15, 83, 7, 29, 1, 0 }, + { 0, 1, 32, 7, 82, 13, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 9, 77, 7, 41, 1, 0 } }, + .odd = { { 0, 1, 30, 7, 83, 14, 0 }, + { 0, 3, 54, 7, 66, 5, 0 }, + { 0, 8, 76, 7, 43, 1, 0 }, + { 0, 20, 86, 7, 22, 0, 0 }, + { 0, 1, 40, 7, 78, 9, 0 }, + { 0, 4, 65, 7, 56, 3, 0 }, + { 0, 13, 81, 7, 33, 1, 0 }, + { 0, 1, 28, 7, 84, 15, 0 }, + { 0, 2, 51, 7, 69, 6, 0 }, + { 0, 7, 74, 7, 45, 2, 0 }, + { 0, 18, 86, 7, 24, 0, 0 }, + { 0, 1, 38, 7, 79, 10, 0 }, + { 0, 4, 62, 7, 59, 3, 0 }, + { 0, 11, 81, 7, 35, 1, 0 }, + { 0, 0, 26, 7, 85, 17, 0 }, + { 0, 2, 48, 7, 72, 6, 0 }, + { 0, 6, 72, 7, 48, 2, 0 }, + { 0, 17, 85, 7, 26, 0, 0 }, + { 0, 1, 35, 7, 81, 11, 0 }, + { 0, 3, 59, 7, 62, 4, 0 }, + { 0, 10, 79, 7, 38, 1, 0 }, + { 0, 0, 24, 7, 86, 18, 0 }, + { 0, 2, 45, 7, 74, 7, 0 }, + { 0, 6, 69, 7, 51, 2, 0 }, + { 0, 15, 84, 7, 28, 1, 0 }, + { 0, 1, 33, 7, 81, 13, 0 }, + { 0, 3, 56, 7, 65, 4, 0 }, + { 0, 9, 78, 7, 40, 1, 0 }, + { 0, 0, 22, 7, 86, 20, 0 }, + { 0, 1, 43, 7, 76, 8, 0 }, + { 0, 5, 66, 7, 54, 3, 0 }, + { 0, 14, 83, 7, 30, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 21, 86, 7, 21, 0, 0 }, + { 0, 1, 41, 7, 77, 9, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 13, 82, 7, 32, 1, 0 }, + { 0, 1, 29, 7, 83, 15, 0 }, + { 0, 2, 52, 7, 69, 5, 0 }, + { 0, 8, 74, 7, 44, 2, 0 }, + { 0, 19, 86, 7, 23, 0, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 4, 63, 7, 58, 3, 0 }, + { 0, 12, 81, 7, 34, 1, 0 }, + { 0, 1, 27, 7, 84, 16, 0 }, + { 0, 2, 50, 7, 70, 6, 0 }, + { 0, 7, 72, 7, 47, 2, 0 }, + { 0, 18, 85, 7, 25, 0, 0 }, + { 0, 1, 36, 7, 80, 11, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 11, 80, 7, 36, 1, 0 }, + { 0, 0, 25, 7, 85, 18, 0 }, + { 0, 2, 47, 7, 72, 7, 0 }, + { 0, 6, 70, 7, 50, 2, 0 }, + { 0, 16, 84, 7, 27, 1, 0 }, + { 0, 1, 34, 7, 81, 12, 0 }, + { 0, 3, 58, 7, 63, 4, 0 }, + { 0, 10, 78, 7, 39, 1, 0 }, + { 0, 0, 23, 7, 86, 19, 0 }, + { 0, 2, 44, 7, 74, 8, 0 }, + { 0, 5, 69, 7, 52, 2, 0 }, + { 0, 15, 83, 7, 29, 1, 0 }, + { 0, 1, 32, 7, 82, 13, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 9, 77, 7, 41, 1, 0 } }, + .odd = { { 0, 1, 30, 7, 83, 14, 0 }, + { 0, 3, 54, 7, 66, 5, 0 }, + { 0, 8, 76, 7, 43, 1, 0 }, + { 0, 20, 86, 7, 22, 0, 0 }, + { 0, 1, 40, 7, 78, 9, 0 }, + { 0, 4, 65, 7, 56, 3, 0 }, + { 0, 13, 81, 7, 33, 1, 0 }, + { 0, 1, 28, 7, 84, 15, 0 }, + { 0, 2, 51, 7, 69, 6, 0 }, + { 0, 7, 74, 7, 45, 2, 0 }, + { 0, 18, 86, 7, 24, 0, 0 }, + { 0, 1, 38, 7, 79, 10, 0 }, + { 0, 4, 62, 7, 59, 3, 0 }, + { 0, 11, 81, 7, 35, 1, 0 }, + { 0, 0, 26, 7, 85, 17, 0 }, + { 0, 2, 48, 7, 72, 6, 0 }, + { 0, 6, 72, 7, 48, 2, 0 }, + { 0, 17, 85, 7, 26, 0, 0 }, + { 0, 1, 35, 7, 81, 11, 0 }, + { 0, 3, 59, 7, 62, 4, 0 }, + { 0, 10, 79, 7, 38, 1, 0 }, + { 0, 0, 24, 7, 86, 18, 0 }, + { 0, 2, 45, 7, 74, 7, 0 }, + { 0, 6, 69, 7, 51, 2, 0 }, + { 0, 15, 84, 7, 28, 1, 0 }, + { 0, 1, 33, 7, 81, 13, 0 }, + { 0, 3, 56, 7, 65, 4, 0 }, + { 0, 9, 78, 7, 40, 1, 0 }, + { 0, 0, 22, 7, 86, 20, 0 }, + { 0, 1, 43, 7, 76, 8, 0 }, + { 0, 5, 66, 7, 54, 3, 0 }, + { 0, 14, 83, 7, 30, 1, 0 } } }, + .ptrn_arr = { { 0x24992493, 0x264924c9, 0x92493249, 0x924c9249, + 0x93249264, 0x924 } }, + .sample_patrn_length = 174, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 56) = 0.363636 */ + .hor_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 10, 78, 7, 39, 1, 0 } }, + .odd = { { 0, 1, 30, 7, 82, 15, 0 }, + { 0, 2, 50, 7, 70, 6, 0 }, + { 0, 6, 70, 7, 50, 2, 0 }, + { 0, 15, 82, 7, 30, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 10, 78, 7, 39, 1, 0 } }, + .odd = { { 0, 1, 30, 7, 82, 15, 0 }, + { 0, 2, 50, 7, 70, 6, 0 }, + { 0, 6, 70, 7, 50, 2, 0 }, + { 0, 15, 82, 7, 30, 1, 0 } } }, + .ptrn_arr = { { 0x92493 } }, + .sample_patrn_length = 22, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 57) = 0.359551 */ + .hor_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 1, 37, 7, 79, 11, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 7, 72, 7, 47, 2, 0 }, + { 0, 15, 82, 7, 30, 1, 0 }, + { 0, 1, 28, 7, 82, 17, 0 }, + { 0, 2, 44, 7, 74, 8, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 10, 78, 7, 39, 1, 0 }, + { 0, 20, 84, 7, 24, 0, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 7, 69, 7, 50, 2, 0 }, + { 0, 14, 81, 7, 32, 1, 0 }, + { 0, 1, 26, 7, 83, 18, 0 }, + { 0, 2, 42, 7, 75, 9, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 9, 75, 7, 42, 2, 0 }, + { 0, 18, 83, 7, 26, 1, 0 }, + { 0, 1, 32, 7, 81, 14, 0 }, + { 0, 2, 50, 7, 69, 7, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 0, 24, 7, 84, 20, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 8, 74, 7, 44, 2, 0 }, + { 0, 17, 82, 7, 28, 1, 0 }, + { 0, 1, 30, 7, 82, 15, 0 }, + { 0, 2, 47, 7, 72, 7, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 11, 79, 7, 37, 1, 0 } }, + .odd = { { 0, 1, 29, 7, 82, 16, 0 }, + { 0, 2, 46, 7, 72, 8, 0 }, + { 0, 5, 64, 7, 56, 3, 0 }, + { 0, 11, 78, 7, 38, 1, 0 }, + { 0, 21, 84, 7, 23, 0, 0 }, + { 0, 1, 36, 7, 79, 12, 0 }, + { 0, 3, 53, 7, 66, 6, 0 }, + { 0, 7, 71, 7, 48, 2, 0 }, + { 0, 15, 81, 7, 31, 1, 0 }, + { 0, 1, 27, 7, 82, 18, 0 }, + { 0, 2, 43, 7, 74, 9, 0 }, + { 0, 4, 61, 7, 59, 4, 0 }, + { 0, 10, 75, 7, 41, 2, 0 }, + { 0, 19, 83, 7, 25, 1, 0 }, + { 0, 1, 33, 7, 81, 13, 0 }, + { 0, 3, 51, 7, 68, 6, 0 }, + { 0, 6, 68, 7, 51, 3, 0 }, + { 0, 13, 81, 7, 33, 1, 0 }, + { 0, 1, 25, 7, 83, 19, 0 }, + { 0, 2, 41, 7, 75, 10, 0 }, + { 0, 4, 59, 7, 61, 4, 0 }, + { 0, 9, 74, 7, 43, 2, 0 }, + { 0, 18, 82, 7, 27, 1, 0 }, + { 0, 1, 31, 7, 81, 15, 0 }, + { 0, 2, 48, 7, 71, 7, 0 }, + { 0, 6, 66, 7, 53, 3, 0 }, + { 0, 12, 79, 7, 36, 1, 0 }, + { 0, 0, 23, 7, 84, 21, 0 }, + { 0, 1, 38, 7, 78, 11, 0 }, + { 0, 3, 56, 7, 64, 5, 0 }, + { 0, 8, 72, 7, 46, 2, 0 }, + { 0, 16, 82, 7, 29, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 1, 37, 7, 79, 11, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 7, 72, 7, 47, 2, 0 }, + { 0, 15, 82, 7, 30, 1, 0 }, + { 0, 1, 28, 7, 82, 17, 0 }, + { 0, 2, 44, 7, 74, 8, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 10, 78, 7, 39, 1, 0 }, + { 0, 20, 84, 7, 24, 0, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 7, 69, 7, 50, 2, 0 }, + { 0, 14, 81, 7, 32, 1, 0 }, + { 0, 1, 26, 7, 83, 18, 0 }, + { 0, 2, 42, 7, 75, 9, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 9, 75, 7, 42, 2, 0 }, + { 0, 18, 83, 7, 26, 1, 0 }, + { 0, 1, 32, 7, 81, 14, 0 }, + { 0, 2, 50, 7, 69, 7, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 0, 24, 7, 84, 20, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 8, 74, 7, 44, 2, 0 }, + { 0, 17, 82, 7, 28, 1, 0 }, + { 0, 1, 30, 7, 82, 15, 0 }, + { 0, 2, 47, 7, 72, 7, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 11, 79, 7, 37, 1, 0 } }, + .odd = { { 0, 1, 29, 7, 82, 16, 0 }, + { 0, 2, 46, 7, 72, 8, 0 }, + { 0, 5, 64, 7, 56, 3, 0 }, + { 0, 11, 78, 7, 38, 1, 0 }, + { 0, 21, 84, 7, 23, 0, 0 }, + { 0, 1, 36, 7, 79, 12, 0 }, + { 0, 3, 53, 7, 66, 6, 0 }, + { 0, 7, 71, 7, 48, 2, 0 }, + { 0, 15, 81, 7, 31, 1, 0 }, + { 0, 1, 27, 7, 82, 18, 0 }, + { 0, 2, 43, 7, 74, 9, 0 }, + { 0, 4, 61, 7, 59, 4, 0 }, + { 0, 10, 75, 7, 41, 2, 0 }, + { 0, 19, 83, 7, 25, 1, 0 }, + { 0, 1, 33, 7, 81, 13, 0 }, + { 0, 3, 51, 7, 68, 6, 0 }, + { 0, 6, 68, 7, 51, 3, 0 }, + { 0, 13, 81, 7, 33, 1, 0 }, + { 0, 1, 25, 7, 83, 19, 0 }, + { 0, 2, 41, 7, 75, 10, 0 }, + { 0, 4, 59, 7, 61, 4, 0 }, + { 0, 9, 74, 7, 43, 2, 0 }, + { 0, 18, 82, 7, 27, 1, 0 }, + { 0, 1, 31, 7, 81, 15, 0 }, + { 0, 2, 48, 7, 71, 7, 0 }, + { 0, 6, 66, 7, 53, 3, 0 }, + { 0, 12, 79, 7, 36, 1, 0 }, + { 0, 0, 23, 7, 84, 21, 0 }, + { 0, 1, 38, 7, 78, 11, 0 }, + { 0, 3, 56, 7, 64, 5, 0 }, + { 0, 8, 72, 7, 46, 2, 0 }, + { 0, 16, 82, 7, 29, 1, 0 } } }, + .ptrn_arr = { { 0x26492493, 0x924c9249, 0x49249924, 0x64924932, + 0x24c92492, 0x9249 } }, + .sample_patrn_length = 178, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 58) = 0.355556 */ + .hor_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 3, 50, 7, 68, 7, 0 }, + { 0, 6, 64, 7, 55, 3, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 19, 82, 7, 26, 1, 0 }, + { 0, 1, 30, 7, 81, 16, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 16, 81, 7, 30, 1, 0 }, + { 0, 1, 26, 7, 82, 19, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 3, 55, 7, 64, 6, 0 }, + { 0, 7, 68, 7, 50, 3, 0 }, + { 0, 13, 79, 7, 35, 1, 0 } }, + .odd = { { 0, 1, 28, 7, 82, 17, 0 }, + { 0, 2, 42, 7, 74, 10, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 8, 71, 7, 47, 2, 0 }, + { 0, 14, 80, 7, 33, 1, 0 }, + { 0, 1, 24, 7, 82, 21, 0 }, + { 0, 1, 37, 7, 78, 12, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 12, 78, 7, 37, 1, 0 }, + { 0, 21, 82, 7, 24, 1, 0 }, + { 0, 1, 33, 7, 80, 14, 0 }, + { 0, 2, 47, 7, 71, 8, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 10, 74, 7, 42, 2, 0 }, + { 0, 17, 82, 7, 28, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 3, 50, 7, 68, 7, 0 }, + { 0, 6, 64, 7, 55, 3, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 19, 82, 7, 26, 1, 0 }, + { 0, 1, 30, 7, 81, 16, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 16, 81, 7, 30, 1, 0 }, + { 0, 1, 26, 7, 82, 19, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 3, 55, 7, 64, 6, 0 }, + { 0, 7, 68, 7, 50, 3, 0 }, + { 0, 13, 79, 7, 35, 1, 0 } }, + .odd = { { 0, 1, 28, 7, 82, 17, 0 }, + { 0, 2, 42, 7, 74, 10, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 8, 71, 7, 47, 2, 0 }, + { 0, 14, 80, 7, 33, 1, 0 }, + { 0, 1, 24, 7, 82, 21, 0 }, + { 0, 1, 37, 7, 78, 12, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 12, 78, 7, 37, 1, 0 }, + { 0, 21, 82, 7, 24, 1, 0 }, + { 0, 1, 33, 7, 80, 14, 0 }, + { 0, 2, 47, 7, 71, 8, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 10, 74, 7, 42, 2, 0 }, + { 0, 17, 82, 7, 28, 1, 0 } } }, + .ptrn_arr = { { 0x32492493, 0x99249249, 0x924924 } }, + .sample_patrn_length = 90, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 59) = 0.351648 */ + .hor_phase_arr = { + .even = { { 0, 23, 82, 7, 23, 0, 0 }, + { 0, 1, 33, 7, 79, 15, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 7, 68, 7, 50, 3, 0 }, + { 0, 12, 78, 7, 37, 1, 0 }, + { 0, 19, 81, 7, 27, 1, 0 }, + { 0, 1, 29, 7, 80, 18, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 3, 52, 7, 66, 7, 0 }, + { 0, 6, 63, 7, 55, 4, 0 }, + { 0, 10, 74, 7, 42, 2, 0 }, + { 0, 16, 80, 7, 31, 1, 0 }, + { 0, 1, 25, 7, 81, 21, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 2, 47, 7, 71, 8, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 8, 71, 7, 47, 2, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 21, 81, 7, 25, 1, 0 }, + { 0, 1, 31, 7, 80, 16, 0 }, + { 0, 2, 42, 7, 74, 10, 0 }, + { 0, 4, 55, 7, 63, 6, 0 }, + { 0, 7, 66, 7, 52, 3, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 18, 80, 7, 29, 1, 0 }, + { 0, 1, 27, 7, 81, 19, 0 }, + { 0, 1, 37, 7, 78, 12, 0 }, + { 0, 3, 50, 7, 68, 7, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 15, 79, 7, 33, 1, 0 } }, + .odd = { { 0, 1, 28, 7, 81, 18, 0 }, + { 0, 2, 39, 7, 75, 12, 0 }, + { 0, 3, 51, 7, 67, 7, 0 }, + { 0, 6, 62, 7, 56, 4, 0 }, + { 0, 10, 73, 7, 43, 2, 0 }, + { 0, 15, 80, 7, 32, 1, 0 }, + { 0, 1, 24, 7, 81, 22, 0 }, + { 0, 1, 34, 7, 79, 14, 0 }, + { 0, 2, 46, 7, 71, 9, 0 }, + { 0, 4, 58, 7, 61, 5, 0 }, + { 0, 8, 69, 7, 48, 3, 0 }, + { 0, 13, 78, 7, 36, 1, 0 }, + { 0, 20, 81, 7, 26, 1, 0 }, + { 0, 1, 30, 7, 80, 17, 0 }, + { 0, 2, 41, 7, 74, 11, 0 }, + { 0, 3, 53, 7, 66, 6, 0 }, + { 0, 6, 66, 7, 53, 3, 0 }, + { 0, 11, 74, 7, 41, 2, 0 }, + { 0, 17, 80, 7, 30, 1, 0 }, + { 0, 1, 26, 7, 81, 20, 0 }, + { 0, 1, 36, 7, 78, 13, 0 }, + { 0, 3, 48, 7, 69, 8, 0 }, + { 0, 5, 61, 7, 58, 4, 0 }, + { 0, 9, 71, 7, 46, 2, 0 }, + { 0, 14, 79, 7, 34, 1, 0 }, + { 0, 22, 81, 7, 24, 1, 0 }, + { 0, 1, 32, 7, 80, 15, 0 }, + { 0, 2, 43, 7, 73, 10, 0 }, + { 0, 4, 56, 7, 62, 6, 0 }, + { 0, 7, 67, 7, 51, 3, 0 }, + { 0, 12, 75, 7, 39, 2, 0 }, + { 0, 18, 81, 7, 28, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 23, 82, 7, 23, 0, 0 }, + { 0, 1, 33, 7, 79, 15, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 7, 68, 7, 50, 3, 0 }, + { 0, 12, 78, 7, 37, 1, 0 }, + { 0, 19, 81, 7, 27, 1, 0 }, + { 0, 1, 29, 7, 80, 18, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 3, 52, 7, 66, 7, 0 }, + { 0, 6, 63, 7, 55, 4, 0 }, + { 0, 10, 74, 7, 42, 2, 0 }, + { 0, 16, 80, 7, 31, 1, 0 }, + { 0, 1, 25, 7, 81, 21, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 2, 47, 7, 71, 8, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 8, 71, 7, 47, 2, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 21, 81, 7, 25, 1, 0 }, + { 0, 1, 31, 7, 80, 16, 0 }, + { 0, 2, 42, 7, 74, 10, 0 }, + { 0, 4, 55, 7, 63, 6, 0 }, + { 0, 7, 66, 7, 52, 3, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 18, 80, 7, 29, 1, 0 }, + { 0, 1, 27, 7, 81, 19, 0 }, + { 0, 1, 37, 7, 78, 12, 0 }, + { 0, 3, 50, 7, 68, 7, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 15, 79, 7, 33, 1, 0 } }, + .odd = { { 0, 1, 28, 7, 81, 18, 0 }, + { 0, 2, 39, 7, 75, 12, 0 }, + { 0, 3, 51, 7, 67, 7, 0 }, + { 0, 6, 62, 7, 56, 4, 0 }, + { 0, 10, 73, 7, 43, 2, 0 }, + { 0, 15, 80, 7, 32, 1, 0 }, + { 0, 1, 24, 7, 81, 22, 0 }, + { 0, 1, 34, 7, 79, 14, 0 }, + { 0, 2, 46, 7, 71, 9, 0 }, + { 0, 4, 58, 7, 61, 5, 0 }, + { 0, 8, 69, 7, 48, 3, 0 }, + { 0, 13, 78, 7, 36, 1, 0 }, + { 0, 20, 81, 7, 26, 1, 0 }, + { 0, 1, 30, 7, 80, 17, 0 }, + { 0, 2, 41, 7, 74, 11, 0 }, + { 0, 3, 53, 7, 66, 6, 0 }, + { 0, 6, 66, 7, 53, 3, 0 }, + { 0, 11, 74, 7, 41, 2, 0 }, + { 0, 17, 80, 7, 30, 1, 0 }, + { 0, 1, 26, 7, 81, 20, 0 }, + { 0, 1, 36, 7, 78, 13, 0 }, + { 0, 3, 48, 7, 69, 8, 0 }, + { 0, 5, 61, 7, 58, 4, 0 }, + { 0, 9, 71, 7, 46, 2, 0 }, + { 0, 14, 79, 7, 34, 1, 0 }, + { 0, 22, 81, 7, 24, 1, 0 }, + { 0, 1, 32, 7, 80, 15, 0 }, + { 0, 2, 43, 7, 73, 10, 0 }, + { 0, 4, 56, 7, 62, 6, 0 }, + { 0, 7, 67, 7, 51, 3, 0 }, + { 0, 12, 75, 7, 39, 2, 0 }, + { 0, 18, 81, 7, 28, 1, 0 } } }, + .ptrn_arr = { { 0x92492493, 0x4924924c, 0x24924992, 0x92493249, + 0x49264924, 0x92492 } }, + .sample_patrn_length = 182, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 60) = 0.347826 */ + .hor_phase_arr = { + .even = { { 1, 23, 80, 7, 23, 1, 0 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 17, 79, 7, 31, 1, 0 } }, + .odd = { { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 1, 35, 7, 78, 14, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 4, 54, 7, 64, 6, 0 }, + { 0, 6, 64, 7, 54, 4, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 14, 78, 7, 35, 1, 0 }, + { 0, 20, 80, 7, 27, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 23, 80, 7, 23, 1, 0 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 17, 79, 7, 31, 1, 0 } }, + .odd = { { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 1, 35, 7, 78, 14, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 4, 54, 7, 64, 6, 0 }, + { 0, 6, 64, 7, 54, 4, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 14, 78, 7, 35, 1, 0 }, + { 0, 20, 80, 7, 27, 1, 0 } } }, + .ptrn_arr = { { 0x92492493, 0x924 } }, + .sample_patrn_length = 46, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 61) = 0.344086 */ + .hor_phase_arr = { + .even = { { 1, 23, 80, 7, 23, 1, 0 }, + { 0, 1, 29, 7, 80, 18, 0 }, + { 0, 1, 36, 7, 77, 14, 0 }, + { 0, 2, 42, 7, 73, 11, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 5, 57, 7, 60, 6, 0 }, + { 0, 6, 64, 7, 54, 4, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 16, 78, 7, 33, 1, 0 }, + { 0, 20, 80, 7, 27, 1, 0 }, + { 0, 1, 25, 7, 79, 22, 1 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 2, 38, 7, 75, 13, 0 }, + { 0, 2, 45, 7, 71, 10, 0 }, + { 0, 4, 52, 7, 65, 7, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 7, 65, 7, 52, 4, 0 }, + { 0, 10, 71, 7, 45, 2, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 17, 79, 7, 31, 1, 0 }, + { 1, 22, 79, 7, 25, 1, 0 }, + { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 1, 33, 7, 78, 16, 0 }, + { 0, 2, 40, 7, 74, 12, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 4, 54, 7, 64, 6, 0 }, + { 0, 6, 60, 7, 57, 5, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 11, 73, 7, 42, 2, 0 }, + { 0, 14, 77, 7, 36, 1, 0 }, + { 0, 18, 80, 7, 29, 1, 0 } }, + .odd = { { 0, 1, 26, 7, 80, 21, 0 }, + { 0, 1, 32, 7, 79, 16, 0 }, + { 0, 2, 39, 7, 75, 12, 0 }, + { 0, 3, 46, 7, 70, 9, 0 }, + { 0, 4, 53, 7, 64, 7, 0 }, + { 0, 5, 60, 7, 58, 5, 0 }, + { 0, 8, 66, 7, 51, 3, 0 }, + { 0, 10, 72, 7, 44, 2, 0 }, + { 0, 14, 75, 7, 37, 2, 0 }, + { 0, 18, 79, 7, 30, 1, 0 }, + { 1, 23, 79, 7, 24, 1, 0 }, + { 0, 1, 28, 7, 80, 19, 0 }, + { 0, 1, 35, 7, 77, 15, 0 }, + { 0, 2, 41, 7, 74, 11, 0 }, + { 0, 3, 48, 7, 69, 8, 0 }, + { 0, 4, 55, 7, 63, 6, 0 }, + { 0, 6, 63, 7, 55, 4, 0 }, + { 0, 8, 69, 7, 48, 3, 0 }, + { 0, 11, 74, 7, 41, 2, 0 }, + { 0, 15, 77, 7, 35, 1, 0 }, + { 0, 19, 80, 7, 28, 1, 0 }, + { 0, 1, 24, 7, 79, 23, 1 }, + { 0, 1, 30, 7, 79, 18, 0 }, + { 0, 2, 37, 7, 75, 14, 0 }, + { 0, 2, 44, 7, 72, 10, 0 }, + { 0, 3, 51, 7, 66, 8, 0 }, + { 0, 5, 58, 7, 60, 5, 0 }, + { 0, 7, 64, 7, 53, 4, 0 }, + { 0, 9, 70, 7, 46, 3, 0 }, + { 0, 12, 75, 7, 39, 2, 0 }, + { 0, 16, 79, 7, 32, 1, 0 }, + { 0, 21, 80, 7, 26, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 23, 80, 7, 23, 1, 0 }, + { 0, 1, 29, 7, 80, 18, 0 }, + { 0, 1, 36, 7, 77, 14, 0 }, + { 0, 2, 42, 7, 73, 11, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 5, 57, 7, 60, 6, 0 }, + { 0, 6, 64, 7, 54, 4, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 16, 78, 7, 33, 1, 0 }, + { 0, 20, 80, 7, 27, 1, 0 }, + { 0, 1, 25, 7, 79, 22, 1 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 2, 38, 7, 75, 13, 0 }, + { 0, 2, 45, 7, 71, 10, 0 }, + { 0, 4, 52, 7, 65, 7, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 7, 65, 7, 52, 4, 0 }, + { 0, 10, 71, 7, 45, 2, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 17, 79, 7, 31, 1, 0 }, + { 1, 22, 79, 7, 25, 1, 0 }, + { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 1, 33, 7, 78, 16, 0 }, + { 0, 2, 40, 7, 74, 12, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 4, 54, 7, 64, 6, 0 }, + { 0, 6, 60, 7, 57, 5, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 11, 73, 7, 42, 2, 0 }, + { 0, 14, 77, 7, 36, 1, 0 }, + { 0, 18, 80, 7, 29, 1, 0 } }, + .odd = { { 0, 1, 26, 7, 80, 21, 0 }, + { 0, 1, 32, 7, 79, 16, 0 }, + { 0, 2, 39, 7, 75, 12, 0 }, + { 0, 3, 46, 7, 70, 9, 0 }, + { 0, 4, 53, 7, 64, 7, 0 }, + { 0, 5, 60, 7, 58, 5, 0 }, + { 0, 8, 66, 7, 51, 3, 0 }, + { 0, 10, 72, 7, 44, 2, 0 }, + { 0, 14, 75, 7, 37, 2, 0 }, + { 0, 18, 79, 7, 30, 1, 0 }, + { 1, 23, 79, 7, 24, 1, 0 }, + { 0, 1, 28, 7, 80, 19, 0 }, + { 0, 1, 35, 7, 77, 15, 0 }, + { 0, 2, 41, 7, 74, 11, 0 }, + { 0, 3, 48, 7, 69, 8, 0 }, + { 0, 4, 55, 7, 63, 6, 0 }, + { 0, 6, 63, 7, 55, 4, 0 }, + { 0, 8, 69, 7, 48, 3, 0 }, + { 0, 11, 74, 7, 41, 2, 0 }, + { 0, 15, 77, 7, 35, 1, 0 }, + { 0, 19, 80, 7, 28, 1, 0 }, + { 0, 1, 24, 7, 79, 23, 1 }, + { 0, 1, 30, 7, 79, 18, 0 }, + { 0, 2, 37, 7, 75, 14, 0 }, + { 0, 2, 44, 7, 72, 10, 0 }, + { 0, 3, 51, 7, 66, 8, 0 }, + { 0, 5, 58, 7, 60, 5, 0 }, + { 0, 7, 64, 7, 53, 4, 0 }, + { 0, 9, 70, 7, 46, 3, 0 }, + { 0, 12, 75, 7, 39, 2, 0 }, + { 0, 16, 79, 7, 32, 1, 0 }, + { 0, 21, 80, 7, 26, 1, 0 } } }, + .ptrn_arr = { { 0x92492493, 0x64924924, 0x92492492, 0x4c924924, + 0x92492492, 0x924924 } }, + .sample_patrn_length = 186, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 62) = 0.340426 */ + .hor_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 1, 28, 7, 79, 20, 0 }, + { 0, 1, 32, 7, 78, 17, 0 }, + { 0, 2, 36, 7, 75, 15, 0 }, + { 0, 2, 40, 7, 74, 12, 0 }, + { 0, 3, 45, 7, 70, 10, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 4, 54, 7, 63, 7, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 7, 63, 7, 54, 4, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 10, 70, 7, 45, 3, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 15, 75, 7, 36, 2, 0 }, + { 0, 17, 78, 7, 32, 1, 0 }, + { 0, 20, 79, 7, 28, 1, 0 } }, + .odd = { { 0, 1, 26, 7, 78, 22, 1 }, + { 0, 1, 30, 7, 78, 19, 0 }, + { 0, 1, 34, 7, 77, 16, 0 }, + { 0, 2, 38, 7, 75, 13, 0 }, + { 0, 2, 43, 7, 72, 11, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 4, 52, 7, 65, 7, 0 }, + { 0, 5, 56, 7, 61, 6, 0 }, + { 0, 6, 61, 7, 56, 5, 0 }, + { 0, 7, 65, 7, 52, 4, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 11, 72, 7, 43, 2, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 16, 77, 7, 34, 1, 0 }, + { 0, 19, 78, 7, 30, 1, 0 }, + { 1, 22, 78, 7, 26, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 1, 28, 7, 79, 20, 0 }, + { 0, 1, 32, 7, 78, 17, 0 }, + { 0, 2, 36, 7, 75, 15, 0 }, + { 0, 2, 40, 7, 74, 12, 0 }, + { 0, 3, 45, 7, 70, 10, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 4, 54, 7, 63, 7, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 7, 63, 7, 54, 4, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 10, 70, 7, 45, 3, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 15, 75, 7, 36, 2, 0 }, + { 0, 17, 78, 7, 32, 1, 0 }, + { 0, 20, 79, 7, 28, 1, 0 } }, + .odd = { { 0, 1, 26, 7, 78, 22, 1 }, + { 0, 1, 30, 7, 78, 19, 0 }, + { 0, 1, 34, 7, 77, 16, 0 }, + { 0, 2, 38, 7, 75, 13, 0 }, + { 0, 2, 43, 7, 72, 11, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 4, 52, 7, 65, 7, 0 }, + { 0, 5, 56, 7, 61, 6, 0 }, + { 0, 6, 61, 7, 56, 5, 0 }, + { 0, 7, 65, 7, 52, 4, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 11, 72, 7, 43, 2, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 16, 77, 7, 34, 1, 0 }, + { 0, 19, 78, 7, 30, 1, 0 }, + { 1, 22, 78, 7, 26, 1, 0 } } }, + .ptrn_arr = { { 0x92492493, 0x24924924, 0x9249249 } }, + .sample_patrn_length = 94, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 63) = 0.336842 */ + .hor_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 1, 26, 7, 78, 22, 1 }, + { 0, 1, 28, 7, 77, 21, 1 }, + { 0, 1, 30, 7, 78, 19, 0 }, + { 0, 1, 32, 7, 77, 18, 0 }, + { 0, 1, 34, 7, 77, 16, 0 }, + { 0, 2, 36, 7, 75, 15, 0 }, + { 0, 2, 38, 7, 74, 14, 0 }, + { 0, 2, 40, 7, 73, 13, 0 }, + { 0, 2, 43, 7, 72, 11, 0 }, + { 0, 3, 45, 7, 70, 10, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 4, 49, 7, 66, 9, 0 }, + { 0, 4, 52, 7, 64, 8, 0 }, + { 0, 4, 54, 7, 63, 7, 0 }, + { 0, 5, 56, 7, 61, 6, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 6, 61, 7, 56, 5, 0 }, + { 0, 7, 63, 7, 54, 4, 0 }, + { 0, 8, 64, 7, 52, 4, 0 }, + { 0, 9, 66, 7, 49, 4, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 10, 70, 7, 45, 3, 0 }, + { 0, 11, 72, 7, 43, 2, 0 }, + { 0, 13, 73, 7, 40, 2, 0 }, + { 0, 14, 74, 7, 38, 2, 0 }, + { 0, 15, 75, 7, 36, 2, 0 }, + { 0, 16, 77, 7, 34, 1, 0 }, + { 0, 18, 77, 7, 32, 1, 0 }, + { 0, 19, 78, 7, 30, 1, 0 }, + { 1, 21, 77, 7, 28, 1, 0 }, + { 1, 22, 78, 7, 26, 1, 0 } }, + .odd = { { 0, 1, 25, 7, 78, 23, 1 }, + { 0, 1, 27, 7, 77, 22, 1 }, + { 0, 1, 29, 7, 78, 20, 0 }, + { 0, 1, 31, 7, 78, 18, 0 }, + { 0, 1, 33, 7, 77, 17, 0 }, + { 0, 2, 35, 7, 75, 16, 0 }, + { 0, 2, 37, 7, 75, 14, 0 }, + { 0, 2, 39, 7, 74, 13, 0 }, + { 0, 2, 42, 7, 72, 12, 0 }, + { 0, 3, 44, 7, 70, 11, 0 }, + { 0, 3, 46, 7, 69, 10, 0 }, + { 0, 3, 48, 7, 68, 9, 0 }, + { 0, 4, 51, 7, 65, 8, 0 }, + { 0, 4, 53, 7, 64, 7, 0 }, + { 0, 5, 55, 7, 61, 7, 0 }, + { 0, 5, 57, 7, 60, 6, 0 }, + { 0, 6, 60, 7, 57, 5, 0 }, + { 0, 7, 61, 7, 55, 5, 0 }, + { 0, 7, 64, 7, 53, 4, 0 }, + { 0, 8, 65, 7, 51, 4, 0 }, + { 0, 9, 68, 7, 48, 3, 0 }, + { 0, 10, 69, 7, 46, 3, 0 }, + { 0, 11, 70, 7, 44, 3, 0 }, + { 0, 12, 72, 7, 42, 2, 0 }, + { 0, 13, 74, 7, 39, 2, 0 }, + { 0, 14, 75, 7, 37, 2, 0 }, + { 0, 16, 75, 7, 35, 2, 0 }, + { 0, 17, 77, 7, 33, 1, 0 }, + { 0, 18, 78, 7, 31, 1, 0 }, + { 0, 20, 78, 7, 29, 1, 0 }, + { 1, 22, 77, 7, 27, 1, 0 }, + { 1, 23, 78, 7, 25, 1, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 1, 26, 7, 78, 22, 1 }, + { 0, 1, 28, 7, 77, 21, 1 }, + { 0, 1, 30, 7, 78, 19, 0 }, + { 0, 1, 32, 7, 77, 18, 0 }, + { 0, 1, 34, 7, 77, 16, 0 }, + { 0, 2, 36, 7, 75, 15, 0 }, + { 0, 2, 38, 7, 74, 14, 0 }, + { 0, 2, 40, 7, 73, 13, 0 }, + { 0, 2, 43, 7, 72, 11, 0 }, + { 0, 3, 45, 7, 70, 10, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 4, 49, 7, 66, 9, 0 }, + { 0, 4, 52, 7, 64, 8, 0 }, + { 0, 4, 54, 7, 63, 7, 0 }, + { 0, 5, 56, 7, 61, 6, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 6, 61, 7, 56, 5, 0 }, + { 0, 7, 63, 7, 54, 4, 0 }, + { 0, 8, 64, 7, 52, 4, 0 }, + { 0, 9, 66, 7, 49, 4, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 10, 70, 7, 45, 3, 0 }, + { 0, 11, 72, 7, 43, 2, 0 }, + { 0, 13, 73, 7, 40, 2, 0 }, + { 0, 14, 74, 7, 38, 2, 0 }, + { 0, 15, 75, 7, 36, 2, 0 }, + { 0, 16, 77, 7, 34, 1, 0 }, + { 0, 18, 77, 7, 32, 1, 0 }, + { 0, 19, 78, 7, 30, 1, 0 }, + { 1, 21, 77, 7, 28, 1, 0 }, + { 1, 22, 78, 7, 26, 1, 0 } }, + .odd = { { 0, 1, 25, 7, 78, 23, 1 }, + { 0, 1, 27, 7, 77, 22, 1 }, + { 0, 1, 29, 7, 78, 20, 0 }, + { 0, 1, 31, 7, 78, 18, 0 }, + { 0, 1, 33, 7, 77, 17, 0 }, + { 0, 2, 35, 7, 75, 16, 0 }, + { 0, 2, 37, 7, 75, 14, 0 }, + { 0, 2, 39, 7, 74, 13, 0 }, + { 0, 2, 42, 7, 72, 12, 0 }, + { 0, 3, 44, 7, 70, 11, 0 }, + { 0, 3, 46, 7, 69, 10, 0 }, + { 0, 3, 48, 7, 68, 9, 0 }, + { 0, 4, 51, 7, 65, 8, 0 }, + { 0, 4, 53, 7, 64, 7, 0 }, + { 0, 5, 55, 7, 61, 7, 0 }, + { 0, 5, 57, 7, 60, 6, 0 }, + { 0, 6, 60, 7, 57, 5, 0 }, + { 0, 7, 61, 7, 55, 5, 0 }, + { 0, 7, 64, 7, 53, 4, 0 }, + { 0, 8, 65, 7, 51, 4, 0 }, + { 0, 9, 68, 7, 48, 3, 0 }, + { 0, 10, 69, 7, 46, 3, 0 }, + { 0, 11, 70, 7, 44, 3, 0 }, + { 0, 12, 72, 7, 42, 2, 0 }, + { 0, 13, 74, 7, 39, 2, 0 }, + { 0, 14, 75, 7, 37, 2, 0 }, + { 0, 16, 75, 7, 35, 2, 0 }, + { 0, 17, 77, 7, 33, 1, 0 }, + { 0, 18, 78, 7, 31, 1, 0 }, + { 0, 20, 78, 7, 29, 1, 0 }, + { 1, 22, 77, 7, 27, 1, 0 }, + { 1, 23, 78, 7, 25, 1, 0 } } }, + .ptrn_arr = { { 0x92492493, 0x24924924, 0x49249249, 0x92492492, + 0x24924924, 0x9249249 } }, + .sample_patrn_length = 190, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 64) = 0.333333 */ + .hor_phase_arr = { + .even = { { 0, 21, 86, 7, 21, 0, 0 } }, + .odd = { { 0, 4, 60, 7, 60, 4, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 21, 86, 7, 21, 0, 0 } }, + .odd = { { 0, 4, 60, 7, 60, 4, 0 } } }, + .ptrn_arr = { { 0x9 } }, + .sample_patrn_length = 6, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 65) = 0.329897 */ + .hor_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 20, 85, 7, 23, 0, 0 }, + { 0, 18, 84, 7, 25, 1, 0 }, + { 0, 17, 82, 7, 28, 1, 0 }, + { 0, 15, 82, 7, 30, 1, 0 }, + { 0, 14, 81, 7, 32, 1, 0 }, + { 0, 12, 81, 7, 34, 1, 0 }, + { 0, 11, 79, 7, 37, 1, 0 }, + { 0, 10, 78, 7, 39, 1, 0 }, + { 0, 9, 75, 7, 42, 2, 0 }, + { 0, 8, 74, 7, 44, 2, 0 }, + { 0, 7, 72, 7, 47, 2, 0 }, + { 0, 6, 70, 7, 50, 2, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 4, 64, 7, 57, 3, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 3, 57, 7, 64, 4, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 2, 50, 7, 70, 6, 0 }, + { 0, 2, 47, 7, 72, 7, 0 }, + { 0, 2, 44, 7, 74, 8, 0 }, + { 0, 2, 42, 7, 75, 9, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 1, 37, 7, 79, 11, 0 }, + { 0, 1, 34, 7, 81, 12, 0 }, + { 0, 1, 32, 7, 81, 14, 0 }, + { 0, 1, 30, 7, 82, 15, 0 }, + { 0, 1, 28, 7, 82, 17, 0 }, + { 0, 1, 25, 7, 84, 18, 0 }, + { 0, 0, 23, 7, 85, 20, 0 } }, + .odd = { { 0, 21, 84, 7, 23, 0, 0 }, + { 0, 19, 85, 7, 24, 0, 0 }, + { 0, 17, 84, 7, 26, 1, 0 }, + { 0, 16, 82, 7, 29, 1, 0 }, + { 0, 14, 82, 7, 31, 1, 0 }, + { 0, 13, 81, 7, 33, 1, 0 }, + { 0, 12, 80, 7, 35, 1, 0 }, + { 0, 11, 78, 7, 38, 1, 0 }, + { 0, 10, 77, 7, 40, 1, 0 }, + { 0, 9, 74, 7, 43, 2, 0 }, + { 0, 8, 72, 7, 46, 2, 0 }, + { 0, 7, 71, 7, 48, 2, 0 }, + { 0, 6, 69, 7, 51, 2, 0 }, + { 0, 5, 66, 7, 54, 3, 0 }, + { 0, 5, 64, 7, 56, 3, 0 }, + { 0, 4, 61, 7, 59, 4, 0 }, + { 0, 4, 59, 7, 61, 4, 0 }, + { 0, 3, 56, 7, 64, 5, 0 }, + { 0, 3, 54, 7, 66, 5, 0 }, + { 0, 2, 51, 7, 69, 6, 0 }, + { 0, 2, 48, 7, 71, 7, 0 }, + { 0, 2, 46, 7, 72, 8, 0 }, + { 0, 2, 43, 7, 74, 9, 0 }, + { 0, 1, 40, 7, 77, 10, 0 }, + { 0, 1, 38, 7, 78, 11, 0 }, + { 0, 1, 35, 7, 80, 12, 0 }, + { 0, 1, 33, 7, 81, 13, 0 }, + { 0, 1, 31, 7, 82, 14, 0 }, + { 0, 1, 29, 7, 82, 16, 0 }, + { 0, 1, 26, 7, 84, 17, 0 }, + { 0, 0, 24, 7, 85, 19, 0 }, + { 0, 0, 23, 7, 84, 21, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 20, 85, 7, 23, 0, 0 }, + { 0, 18, 84, 7, 25, 1, 0 }, + { 0, 17, 82, 7, 28, 1, 0 }, + { 0, 15, 82, 7, 30, 1, 0 }, + { 0, 14, 81, 7, 32, 1, 0 }, + { 0, 12, 81, 7, 34, 1, 0 }, + { 0, 11, 79, 7, 37, 1, 0 }, + { 0, 10, 78, 7, 39, 1, 0 }, + { 0, 9, 75, 7, 42, 2, 0 }, + { 0, 8, 74, 7, 44, 2, 0 }, + { 0, 7, 72, 7, 47, 2, 0 }, + { 0, 6, 70, 7, 50, 2, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 4, 64, 7, 57, 3, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 3, 57, 7, 64, 4, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 2, 50, 7, 70, 6, 0 }, + { 0, 2, 47, 7, 72, 7, 0 }, + { 0, 2, 44, 7, 74, 8, 0 }, + { 0, 2, 42, 7, 75, 9, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 1, 37, 7, 79, 11, 0 }, + { 0, 1, 34, 7, 81, 12, 0 }, + { 0, 1, 32, 7, 81, 14, 0 }, + { 0, 1, 30, 7, 82, 15, 0 }, + { 0, 1, 28, 7, 82, 17, 0 }, + { 0, 1, 25, 7, 84, 18, 0 }, + { 0, 0, 23, 7, 85, 20, 0 } }, + .odd = { { 0, 21, 84, 7, 23, 0, 0 }, + { 0, 19, 85, 7, 24, 0, 0 }, + { 0, 17, 84, 7, 26, 1, 0 }, + { 0, 16, 82, 7, 29, 1, 0 }, + { 0, 14, 82, 7, 31, 1, 0 }, + { 0, 13, 81, 7, 33, 1, 0 }, + { 0, 12, 80, 7, 35, 1, 0 }, + { 0, 11, 78, 7, 38, 1, 0 }, + { 0, 10, 77, 7, 40, 1, 0 }, + { 0, 9, 74, 7, 43, 2, 0 }, + { 0, 8, 72, 7, 46, 2, 0 }, + { 0, 7, 71, 7, 48, 2, 0 }, + { 0, 6, 69, 7, 51, 2, 0 }, + { 0, 5, 66, 7, 54, 3, 0 }, + { 0, 5, 64, 7, 56, 3, 0 }, + { 0, 4, 61, 7, 59, 4, 0 }, + { 0, 4, 59, 7, 61, 4, 0 }, + { 0, 3, 56, 7, 64, 5, 0 }, + { 0, 3, 54, 7, 66, 5, 0 }, + { 0, 2, 51, 7, 69, 6, 0 }, + { 0, 2, 48, 7, 71, 7, 0 }, + { 0, 2, 46, 7, 72, 8, 0 }, + { 0, 2, 43, 7, 74, 9, 0 }, + { 0, 1, 40, 7, 77, 10, 0 }, + { 0, 1, 38, 7, 78, 11, 0 }, + { 0, 1, 35, 7, 80, 12, 0 }, + { 0, 1, 33, 7, 81, 13, 0 }, + { 0, 1, 31, 7, 82, 14, 0 }, + { 0, 1, 29, 7, 82, 16, 0 }, + { 0, 1, 26, 7, 84, 17, 0 }, + { 0, 0, 24, 7, 85, 19, 0 }, + { 0, 0, 23, 7, 84, 21, 0 } } }, + .ptrn_arr = { { 0x49249249, 0x92492492, 0x24924924, 0x49249249, + 0x92492492, 0x24924924 } }, + .sample_patrn_length = 194, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 66) = 0.326531 */ + .hor_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 18, 83, 7, 26, 1, 0 }, + { 0, 15, 82, 7, 30, 1, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 10, 78, 7, 39, 1, 0 }, + { 0, 8, 74, 7, 44, 2, 0 }, + { 0, 7, 69, 7, 50, 2, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 2, 50, 7, 69, 7, 0 }, + { 0, 2, 44, 7, 74, 8, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 1, 30, 7, 82, 15, 0 }, + { 0, 1, 26, 7, 83, 18, 0 } }, + .odd = { { 0, 20, 84, 7, 24, 0, 0 }, + { 0, 17, 82, 7, 28, 1, 0 }, + { 0, 14, 81, 7, 32, 1, 0 }, + { 0, 12, 78, 7, 37, 1, 0 }, + { 0, 9, 75, 7, 42, 2, 0 }, + { 0, 8, 71, 7, 47, 2, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 2, 47, 7, 71, 8, 0 }, + { 0, 2, 42, 7, 75, 9, 0 }, + { 0, 1, 37, 7, 78, 12, 0 }, + { 0, 1, 32, 7, 81, 14, 0 }, + { 0, 1, 28, 7, 82, 17, 0 }, + { 0, 0, 24, 7, 84, 20, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 18, 83, 7, 26, 1, 0 }, + { 0, 15, 82, 7, 30, 1, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 10, 78, 7, 39, 1, 0 }, + { 0, 8, 74, 7, 44, 2, 0 }, + { 0, 7, 69, 7, 50, 2, 0 }, + { 0, 5, 65, 7, 55, 3, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 3, 55, 7, 65, 5, 0 }, + { 0, 2, 50, 7, 69, 7, 0 }, + { 0, 2, 44, 7, 74, 8, 0 }, + { 0, 1, 39, 7, 78, 10, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 1, 30, 7, 82, 15, 0 }, + { 0, 1, 26, 7, 83, 18, 0 } }, + .odd = { { 0, 20, 84, 7, 24, 0, 0 }, + { 0, 17, 82, 7, 28, 1, 0 }, + { 0, 14, 81, 7, 32, 1, 0 }, + { 0, 12, 78, 7, 37, 1, 0 }, + { 0, 9, 75, 7, 42, 2, 0 }, + { 0, 8, 71, 7, 47, 2, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 2, 47, 7, 71, 8, 0 }, + { 0, 2, 42, 7, 75, 9, 0 }, + { 0, 1, 37, 7, 78, 12, 0 }, + { 0, 1, 32, 7, 81, 14, 0 }, + { 0, 1, 28, 7, 82, 17, 0 }, + { 0, 0, 24, 7, 84, 20, 0 } } }, + .ptrn_arr = { { 0x49249249, 0x92492492, 0x24924924 } }, + .sample_patrn_length = 98, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 67) = 0.323232 */ + .hor_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 17, 82, 7, 28, 1, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 10, 74, 7, 42, 2, 0 }, + { 0, 7, 68, 7, 50, 3, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 3, 55, 7, 64, 6, 0 }, + { 0, 2, 47, 7, 71, 8, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 1, 33, 7, 80, 14, 0 }, + { 0, 1, 26, 7, 82, 19, 0 }, + { 0, 21, 82, 7, 24, 1, 0 }, + { 0, 16, 81, 7, 30, 1, 0 }, + { 0, 12, 78, 7, 37, 1, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 1, 37, 7, 78, 12, 0 }, + { 0, 1, 30, 7, 81, 16, 0 }, + { 0, 1, 24, 7, 82, 21, 0 }, + { 0, 19, 82, 7, 26, 1, 0 }, + { 0, 14, 80, 7, 33, 1, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 8, 71, 7, 47, 2, 0 }, + { 0, 6, 64, 7, 55, 3, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 3, 50, 7, 68, 7, 0 }, + { 0, 2, 42, 7, 74, 10, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 1, 28, 7, 82, 17, 0 } }, + .odd = { { 0, 20, 82, 7, 25, 1, 0 }, + { 0, 15, 81, 7, 31, 1, 0 }, + { 0, 11, 78, 7, 38, 1, 0 }, + { 0, 8, 72, 7, 46, 2, 0 }, + { 0, 6, 66, 7, 53, 3, 0 }, + { 0, 4, 58, 7, 61, 5, 0 }, + { 0, 3, 51, 7, 67, 7, 0 }, + { 0, 2, 43, 7, 74, 9, 0 }, + { 0, 1, 36, 7, 79, 12, 0 }, + { 0, 1, 29, 7, 81, 17, 0 }, + { 0, 0, 23, 7, 84, 21, 0 }, + { 0, 18, 82, 7, 27, 1, 0 }, + { 0, 14, 79, 7, 34, 1, 0 }, + { 0, 10, 75, 7, 41, 2, 0 }, + { 0, 7, 71, 7, 48, 2, 0 }, + { 0, 5, 63, 7, 56, 4, 0 }, + { 0, 4, 56, 7, 63, 5, 0 }, + { 0, 2, 48, 7, 71, 7, 0 }, + { 0, 2, 41, 7, 75, 10, 0 }, + { 0, 1, 34, 7, 79, 14, 0 }, + { 0, 1, 27, 7, 82, 18, 0 }, + { 0, 21, 84, 7, 23, 0, 0 }, + { 0, 17, 81, 7, 29, 1, 0 }, + { 0, 12, 79, 7, 36, 1, 0 }, + { 0, 9, 74, 7, 43, 2, 0 }, + { 0, 7, 67, 7, 51, 3, 0 }, + { 0, 5, 61, 7, 58, 4, 0 }, + { 0, 3, 53, 7, 66, 6, 0 }, + { 0, 2, 46, 7, 72, 8, 0 }, + { 0, 1, 38, 7, 78, 11, 0 }, + { 0, 1, 31, 7, 81, 15, 0 }, + { 0, 1, 25, 7, 82, 20, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 22, 84, 7, 22, 0, 0 }, + { 0, 17, 82, 7, 28, 1, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 10, 74, 7, 42, 2, 0 }, + { 0, 7, 68, 7, 50, 3, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 3, 55, 7, 64, 6, 0 }, + { 0, 2, 47, 7, 71, 8, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 1, 33, 7, 80, 14, 0 }, + { 0, 1, 26, 7, 82, 19, 0 }, + { 0, 21, 82, 7, 24, 1, 0 }, + { 0, 16, 81, 7, 30, 1, 0 }, + { 0, 12, 78, 7, 37, 1, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 6, 67, 7, 52, 3, 0 }, + { 0, 4, 60, 7, 60, 4, 0 }, + { 0, 3, 52, 7, 67, 6, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 1, 37, 7, 78, 12, 0 }, + { 0, 1, 30, 7, 81, 16, 0 }, + { 0, 1, 24, 7, 82, 21, 0 }, + { 0, 19, 82, 7, 26, 1, 0 }, + { 0, 14, 80, 7, 33, 1, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 8, 71, 7, 47, 2, 0 }, + { 0, 6, 64, 7, 55, 3, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 3, 50, 7, 68, 7, 0 }, + { 0, 2, 42, 7, 74, 10, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 1, 28, 7, 82, 17, 0 } }, + .odd = { { 0, 20, 82, 7, 25, 1, 0 }, + { 0, 15, 81, 7, 31, 1, 0 }, + { 0, 11, 78, 7, 38, 1, 0 }, + { 0, 8, 72, 7, 46, 2, 0 }, + { 0, 6, 66, 7, 53, 3, 0 }, + { 0, 4, 58, 7, 61, 5, 0 }, + { 0, 3, 51, 7, 67, 7, 0 }, + { 0, 2, 43, 7, 74, 9, 0 }, + { 0, 1, 36, 7, 79, 12, 0 }, + { 0, 1, 29, 7, 81, 17, 0 }, + { 0, 0, 23, 7, 84, 21, 0 }, + { 0, 18, 82, 7, 27, 1, 0 }, + { 0, 14, 79, 7, 34, 1, 0 }, + { 0, 10, 75, 7, 41, 2, 0 }, + { 0, 7, 71, 7, 48, 2, 0 }, + { 0, 5, 63, 7, 56, 4, 0 }, + { 0, 4, 56, 7, 63, 5, 0 }, + { 0, 2, 48, 7, 71, 7, 0 }, + { 0, 2, 41, 7, 75, 10, 0 }, + { 0, 1, 34, 7, 79, 14, 0 }, + { 0, 1, 27, 7, 82, 18, 0 }, + { 0, 21, 84, 7, 23, 0, 0 }, + { 0, 17, 81, 7, 29, 1, 0 }, + { 0, 12, 79, 7, 36, 1, 0 }, + { 0, 9, 74, 7, 43, 2, 0 }, + { 0, 7, 67, 7, 51, 3, 0 }, + { 0, 5, 61, 7, 58, 4, 0 }, + { 0, 3, 53, 7, 66, 6, 0 }, + { 0, 2, 46, 7, 72, 8, 0 }, + { 0, 1, 38, 7, 78, 11, 0 }, + { 0, 1, 31, 7, 81, 15, 0 }, + { 0, 1, 25, 7, 82, 20, 0 } } }, + .ptrn_arr = { { 0x49249249, 0x92492492, 0x92492490, 0x24924924, + 0x24924921, 0x49249249, 0x2 } }, + .sample_patrn_length = 198, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 68) = 0.32 */ + .hor_phase_arr = { + .even = { { 0, 23, 82, 7, 23, 0, 0 }, + { 0, 16, 80, 7, 31, 1, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 7, 68, 7, 50, 3, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 3, 50, 7, 68, 7, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 1, 31, 7, 80, 16, 0 } }, + .odd = { { 0, 19, 81, 7, 27, 1, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 6, 63, 7, 55, 4, 0 }, + { 0, 4, 55, 7, 63, 6, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 1, 27, 7, 81, 19, 0 } } }, + .ver_phase_arr = { + .even = { { 0, 23, 82, 7, 23, 0, 0 }, + { 0, 16, 80, 7, 31, 1, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 7, 68, 7, 50, 3, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 3, 50, 7, 68, 7, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 1, 31, 7, 80, 16, 0 } }, + .odd = { { 0, 19, 81, 7, 27, 1, 0 }, + { 0, 13, 79, 7, 35, 1, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 6, 63, 7, 55, 4, 0 }, + { 0, 4, 55, 7, 63, 6, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 1, 35, 7, 79, 13, 0 }, + { 0, 1, 27, 7, 81, 19, 0 } } }, + .ptrn_arr = { { 0x49249249, 0x2492 } }, + .sample_patrn_length = 50, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 69) = 0.316832 */ + .hor_phase_arr = { + .even = { { 1, 23, 80, 7, 23, 1, 0 }, + { 0, 15, 79, 7, 33, 1, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 2, 38, 7, 75, 13, 0 }, + { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 18, 80, 7, 29, 1, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 7, 66, 7, 52, 3, 0 }, + { 0, 4, 54, 7, 64, 6, 0 }, + { 0, 2, 42, 7, 74, 10, 0 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 21, 81, 7, 25, 1, 0 }, + { 0, 14, 78, 7, 35, 1, 0 }, + { 0, 8, 70, 7, 47, 3, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 3, 47, 7, 70, 8, 0 }, + { 0, 1, 35, 7, 78, 14, 0 }, + { 0, 1, 25, 7, 81, 21, 0 }, + { 0, 17, 79, 7, 31, 1, 0 }, + { 0, 10, 74, 7, 42, 2, 0 }, + { 0, 6, 64, 7, 54, 4, 0 }, + { 0, 3, 52, 7, 66, 7, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 1, 29, 7, 80, 18, 0 }, + { 0, 20, 80, 7, 27, 1, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 1, 33, 7, 79, 15, 0 } }, + .odd = { { 0, 19, 80, 7, 28, 1, 0 }, + { 0, 12, 75, 7, 39, 2, 0 }, + { 0, 7, 67, 7, 51, 3, 0 }, + { 0, 4, 56, 7, 62, 6, 0 }, + { 0, 2, 44, 7, 72, 10, 0 }, + { 0, 1, 32, 7, 79, 16, 0 }, + { 0, 22, 81, 7, 24, 1, 0 }, + { 0, 14, 79, 7, 34, 1, 0 }, + { 0, 9, 71, 7, 46, 2, 0 }, + { 0, 5, 60, 7, 58, 5, 0 }, + { 0, 3, 48, 7, 69, 8, 0 }, + { 0, 1, 36, 7, 78, 13, 0 }, + { 0, 1, 26, 7, 81, 20, 0 }, + { 0, 17, 80, 7, 30, 1, 0 }, + { 0, 11, 74, 7, 41, 2, 0 }, + { 0, 6, 65, 7, 53, 4, 0 }, + { 0, 4, 53, 7, 65, 6, 0 }, + { 0, 2, 41, 7, 74, 11, 0 }, + { 0, 1, 30, 7, 80, 17, 0 }, + { 0, 20, 81, 7, 26, 1, 0 }, + { 0, 13, 78, 7, 36, 1, 0 }, + { 0, 8, 69, 7, 48, 3, 0 }, + { 0, 5, 58, 7, 60, 5, 0 }, + { 0, 2, 46, 7, 71, 9, 0 }, + { 0, 1, 34, 7, 79, 14, 0 }, + { 0, 1, 24, 7, 81, 22, 0 }, + { 0, 16, 79, 7, 32, 1, 0 }, + { 0, 10, 72, 7, 44, 2, 0 }, + { 0, 6, 62, 7, 56, 4, 0 }, + { 0, 3, 51, 7, 67, 7, 0 }, + { 0, 2, 39, 7, 75, 12, 0 }, + { 0, 1, 28, 7, 80, 19, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 23, 80, 7, 23, 1, 0 }, + { 0, 15, 79, 7, 33, 1, 0 }, + { 0, 9, 72, 7, 45, 2, 0 }, + { 0, 5, 62, 7, 57, 4, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 2, 38, 7, 75, 13, 0 }, + { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 18, 80, 7, 29, 1, 0 }, + { 0, 11, 75, 7, 40, 2, 0 }, + { 0, 7, 66, 7, 52, 3, 0 }, + { 0, 4, 54, 7, 64, 6, 0 }, + { 0, 2, 42, 7, 74, 10, 0 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 21, 81, 7, 25, 1, 0 }, + { 0, 14, 78, 7, 35, 1, 0 }, + { 0, 8, 70, 7, 47, 3, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 3, 47, 7, 70, 8, 0 }, + { 0, 1, 35, 7, 78, 14, 0 }, + { 0, 1, 25, 7, 81, 21, 0 }, + { 0, 17, 79, 7, 31, 1, 0 }, + { 0, 10, 74, 7, 42, 2, 0 }, + { 0, 6, 64, 7, 54, 4, 0 }, + { 0, 3, 52, 7, 66, 7, 0 }, + { 0, 2, 40, 7, 75, 11, 0 }, + { 0, 1, 29, 7, 80, 18, 0 }, + { 0, 20, 80, 7, 27, 1, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 4, 57, 7, 62, 5, 0 }, + { 0, 2, 45, 7, 72, 9, 0 }, + { 0, 1, 33, 7, 79, 15, 0 } }, + .odd = { { 0, 19, 80, 7, 28, 1, 0 }, + { 0, 12, 75, 7, 39, 2, 0 }, + { 0, 7, 67, 7, 51, 3, 0 }, + { 0, 4, 56, 7, 62, 6, 0 }, + { 0, 2, 44, 7, 72, 10, 0 }, + { 0, 1, 32, 7, 79, 16, 0 }, + { 0, 22, 81, 7, 24, 1, 0 }, + { 0, 14, 79, 7, 34, 1, 0 }, + { 0, 9, 71, 7, 46, 2, 0 }, + { 0, 5, 60, 7, 58, 5, 0 }, + { 0, 3, 48, 7, 69, 8, 0 }, + { 0, 1, 36, 7, 78, 13, 0 }, + { 0, 1, 26, 7, 81, 20, 0 }, + { 0, 17, 80, 7, 30, 1, 0 }, + { 0, 11, 74, 7, 41, 2, 0 }, + { 0, 6, 65, 7, 53, 4, 0 }, + { 0, 4, 53, 7, 65, 6, 0 }, + { 0, 2, 41, 7, 74, 11, 0 }, + { 0, 1, 30, 7, 80, 17, 0 }, + { 0, 20, 81, 7, 26, 1, 0 }, + { 0, 13, 78, 7, 36, 1, 0 }, + { 0, 8, 69, 7, 48, 3, 0 }, + { 0, 5, 58, 7, 60, 5, 0 }, + { 0, 2, 46, 7, 71, 9, 0 }, + { 0, 1, 34, 7, 79, 14, 0 }, + { 0, 1, 24, 7, 81, 22, 0 }, + { 0, 16, 79, 7, 32, 1, 0 }, + { 0, 10, 72, 7, 44, 2, 0 }, + { 0, 6, 62, 7, 56, 4, 0 }, + { 0, 3, 51, 7, 67, 7, 0 }, + { 0, 2, 39, 7, 75, 12, 0 }, + { 0, 1, 28, 7, 80, 19, 0 } } }, + .ptrn_arr = { { 0x49249249, 0x49249212, 0x49242492, 0x48492492, + 0x92492492, 0x92492490, 0x24 } }, + .sample_patrn_length = 202, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 70) = 0.313725 */ + .hor_phase_arr = { + .even = { { 1, 23, 80, 7, 23, 1, 0 }, + { 0, 14, 77, 7, 36, 1, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 4, 54, 7, 64, 6, 0 }, + { 0, 2, 40, 7, 74, 12, 0 }, + { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 17, 79, 7, 31, 1, 0 }, + { 0, 10, 71, 7, 45, 2, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 2, 45, 7, 71, 10, 0 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 20, 80, 7, 27, 1, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 6, 64, 7, 54, 4, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 1, 36, 7, 77, 14, 0 } }, + .odd = { { 0, 18, 80, 7, 29, 1, 0 }, + { 0, 11, 73, 7, 42, 2, 0 }, + { 0, 6, 61, 7, 57, 4, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 1, 33, 7, 79, 15, 0 }, + { 0, 22, 80, 7, 25, 1, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 7, 65, 7, 52, 4, 0 }, + { 0, 4, 52, 7, 65, 7, 0 }, + { 0, 2, 38, 7, 75, 13, 0 }, + { 0, 1, 25, 7, 80, 22, 0 }, + { 0, 15, 79, 7, 33, 1, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 4, 57, 7, 61, 6, 0 }, + { 0, 2, 42, 7, 73, 11, 0 }, + { 0, 1, 29, 7, 80, 18, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 23, 80, 7, 23, 1, 0 }, + { 0, 14, 77, 7, 36, 1, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 4, 54, 7, 64, 6, 0 }, + { 0, 2, 40, 7, 74, 12, 0 }, + { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 17, 79, 7, 31, 1, 0 }, + { 0, 10, 71, 7, 45, 2, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 2, 45, 7, 71, 10, 0 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 20, 80, 7, 27, 1, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 6, 64, 7, 54, 4, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 1, 36, 7, 77, 14, 0 } }, + .odd = { { 0, 18, 80, 7, 29, 1, 0 }, + { 0, 11, 73, 7, 42, 2, 0 }, + { 0, 6, 61, 7, 57, 4, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 1, 33, 7, 79, 15, 0 }, + { 0, 22, 80, 7, 25, 1, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 7, 65, 7, 52, 4, 0 }, + { 0, 4, 52, 7, 65, 7, 0 }, + { 0, 2, 38, 7, 75, 13, 0 }, + { 0, 1, 25, 7, 80, 22, 0 }, + { 0, 15, 79, 7, 33, 1, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 4, 57, 7, 61, 6, 0 }, + { 0, 2, 42, 7, 73, 11, 0 }, + { 0, 1, 29, 7, 80, 18, 0 } } }, + .ptrn_arr = { { 0x49249249, 0x49249248, 0x49249242, 0x2 } }, + .sample_patrn_length = 102, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 71) = 0.31068 */ + .hor_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 7, 63, 7, 54, 4, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 19, 79, 7, 29, 1, 0 }, + { 0, 10, 70, 7, 45, 3, 0 }, + { 0, 5, 56, 7, 61, 6, 0 }, + { 0, 2, 40, 7, 74, 12, 0 }, + { 0, 1, 26, 7, 78, 22, 1 }, + { 0, 14, 76, 7, 36, 2, 0 }, + { 0, 7, 65, 7, 52, 4, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 1, 34, 7, 77, 16, 0 }, + { 0, 20, 80, 7, 27, 1, 0 }, + { 0, 11, 72, 7, 43, 2, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 2, 43, 7, 72, 11, 0 }, + { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 16, 77, 7, 34, 1, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 4, 52, 7, 65, 7, 0 }, + { 0, 2, 36, 7, 76, 14, 0 }, + { 1, 22, 78, 7, 26, 1, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 6, 61, 7, 56, 5, 0 }, + { 0, 3, 45, 7, 70, 10, 0 }, + { 0, 1, 29, 7, 79, 19, 0 }, + { 0, 17, 79, 7, 31, 1, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 4, 54, 7, 63, 7, 0 }, + { 0, 2, 38, 7, 75, 13, 0 } }, + .odd = { { 0, 18, 79, 7, 30, 1, 0 }, + { 0, 9, 70, 7, 46, 3, 0 }, + { 0, 4, 55, 7, 63, 6, 0 }, + { 0, 2, 39, 7, 74, 13, 0 }, + { 0, 1, 25, 7, 78, 23, 1 }, + { 0, 14, 75, 7, 37, 2, 0 }, + { 0, 7, 64, 7, 53, 4, 0 }, + { 0, 3, 48, 7, 68, 9, 0 }, + { 0, 1, 33, 7, 77, 17, 0 }, + { 0, 20, 79, 7, 28, 1, 0 }, + { 0, 10, 72, 7, 44, 2, 0 }, + { 0, 5, 58, 7, 59, 6, 0 }, + { 0, 2, 41, 7, 74, 11, 0 }, + { 0, 1, 26, 7, 79, 21, 1 }, + { 0, 15, 77, 7, 35, 1, 0 }, + { 0, 8, 66, 7, 51, 3, 0 }, + { 0, 3, 51, 7, 66, 8, 0 }, + { 0, 1, 35, 7, 77, 15, 0 }, + { 1, 21, 79, 7, 26, 1, 0 }, + { 0, 11, 74, 7, 41, 2, 0 }, + { 0, 6, 59, 7, 58, 5, 0 }, + { 0, 2, 44, 7, 72, 10, 0 }, + { 0, 1, 28, 7, 79, 20, 0 }, + { 0, 17, 77, 7, 33, 1, 0 }, + { 0, 9, 68, 7, 48, 3, 0 }, + { 0, 4, 53, 7, 64, 7, 0 }, + { 0, 2, 37, 7, 75, 14, 0 }, + { 1, 23, 78, 7, 25, 1, 0 }, + { 0, 13, 74, 7, 39, 2, 0 }, + { 0, 6, 63, 7, 55, 4, 0 }, + { 0, 3, 46, 7, 70, 9, 0 }, + { 0, 1, 30, 7, 79, 18, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 13, 75, 7, 38, 2, 0 }, + { 0, 7, 63, 7, 54, 4, 0 }, + { 0, 3, 47, 7, 69, 9, 0 }, + { 0, 1, 31, 7, 79, 17, 0 }, + { 0, 19, 79, 7, 29, 1, 0 }, + { 0, 10, 70, 7, 45, 3, 0 }, + { 0, 5, 56, 7, 61, 6, 0 }, + { 0, 2, 40, 7, 74, 12, 0 }, + { 0, 1, 26, 7, 78, 22, 1 }, + { 0, 14, 76, 7, 36, 2, 0 }, + { 0, 7, 65, 7, 52, 4, 0 }, + { 0, 3, 50, 7, 67, 8, 0 }, + { 0, 1, 34, 7, 77, 16, 0 }, + { 0, 20, 80, 7, 27, 1, 0 }, + { 0, 11, 72, 7, 43, 2, 0 }, + { 0, 5, 59, 7, 59, 5, 0 }, + { 0, 2, 43, 7, 72, 11, 0 }, + { 0, 1, 27, 7, 80, 20, 0 }, + { 0, 16, 77, 7, 34, 1, 0 }, + { 0, 8, 67, 7, 50, 3, 0 }, + { 0, 4, 52, 7, 65, 7, 0 }, + { 0, 2, 36, 7, 76, 14, 0 }, + { 1, 22, 78, 7, 26, 1, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 6, 61, 7, 56, 5, 0 }, + { 0, 3, 45, 7, 70, 10, 0 }, + { 0, 1, 29, 7, 79, 19, 0 }, + { 0, 17, 79, 7, 31, 1, 0 }, + { 0, 9, 69, 7, 47, 3, 0 }, + { 0, 4, 54, 7, 63, 7, 0 }, + { 0, 2, 38, 7, 75, 13, 0 } }, + .odd = { { 0, 18, 79, 7, 30, 1, 0 }, + { 0, 9, 70, 7, 46, 3, 0 }, + { 0, 4, 55, 7, 63, 6, 0 }, + { 0, 2, 39, 7, 74, 13, 0 }, + { 0, 1, 25, 7, 78, 23, 1 }, + { 0, 14, 75, 7, 37, 2, 0 }, + { 0, 7, 64, 7, 53, 4, 0 }, + { 0, 3, 48, 7, 68, 9, 0 }, + { 0, 1, 33, 7, 77, 17, 0 }, + { 0, 20, 79, 7, 28, 1, 0 }, + { 0, 10, 72, 7, 44, 2, 0 }, + { 0, 5, 58, 7, 59, 6, 0 }, + { 0, 2, 41, 7, 74, 11, 0 }, + { 0, 1, 26, 7, 79, 21, 1 }, + { 0, 15, 77, 7, 35, 1, 0 }, + { 0, 8, 66, 7, 51, 3, 0 }, + { 0, 3, 51, 7, 66, 8, 0 }, + { 0, 1, 35, 7, 77, 15, 0 }, + { 1, 21, 79, 7, 26, 1, 0 }, + { 0, 11, 74, 7, 41, 2, 0 }, + { 0, 6, 59, 7, 58, 5, 0 }, + { 0, 2, 44, 7, 72, 10, 0 }, + { 0, 1, 28, 7, 79, 20, 0 }, + { 0, 17, 77, 7, 33, 1, 0 }, + { 0, 9, 68, 7, 48, 3, 0 }, + { 0, 4, 53, 7, 64, 7, 0 }, + { 0, 2, 37, 7, 75, 14, 0 }, + { 1, 23, 78, 7, 25, 1, 0 }, + { 0, 13, 74, 7, 39, 2, 0 }, + { 0, 6, 63, 7, 55, 4, 0 }, + { 0, 3, 46, 7, 70, 9, 0 }, + { 0, 1, 30, 7, 79, 18, 0 } } }, + .ptrn_arr = { { 0x9249249, 0x21249249, 0x24249249, 0x24849249, + 0x24909249, 0x24921249, 0x249 } }, + .sample_patrn_length = 206, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 72) = 0.307692 */ + .hor_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 5, 60, 7, 58, 5, 0 }, + { 0, 2, 40, 7, 74, 12, 0 } }, + .odd = { { 0, 18, 77, 7, 32, 1, 0 }, + { 0, 8, 68, 7, 49, 3, 0 }, + { 0, 3, 49, 7, 68, 8, 0 }, + { 0, 1, 32, 7, 77, 18, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 12, 74, 7, 40, 2, 0 }, + { 0, 5, 60, 7, 58, 5, 0 }, + { 0, 2, 40, 7, 74, 12, 0 } }, + .odd = { { 0, 18, 77, 7, 32, 1, 0 }, + { 0, 8, 68, 7, 49, 3, 0 }, + { 0, 3, 49, 7, 68, 8, 0 }, + { 0, 1, 32, 7, 77, 18, 0 } } }, + .ptrn_arr = { { 0x249249 } }, + .sample_patrn_length = 26, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 73) = 0.304762 */ + .hor_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 12, 70, 7, 43, 3, 0 }, + { 0, 5, 54, 7, 62, 7, 0 }, + { 0, 2, 34, 7, 76, 16, 0 }, + { 0, 18, 77, 7, 32, 1, 0 }, + { 0, 8, 64, 7, 52, 4, 0 }, + { 0, 3, 45, 7, 69, 11, 0 }, + { 0, 1, 26, 7, 77, 23, 1 }, + { 0, 13, 73, 7, 40, 2, 0 }, + { 0, 5, 56, 7, 61, 6, 0 }, + { 0, 2, 36, 7, 75, 15, 0 }, + { 0, 19, 78, 7, 30, 1, 0 }, + { 0, 9, 66, 7, 49, 4, 0 }, + { 0, 3, 47, 7, 68, 10, 0 }, + { 0, 1, 28, 7, 77, 21, 1 }, + { 0, 14, 74, 7, 38, 2, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 2, 38, 7, 74, 14, 0 }, + { 1, 21, 77, 7, 28, 1, 0 }, + { 0, 10, 68, 7, 47, 3, 0 }, + { 0, 4, 49, 7, 66, 9, 0 }, + { 0, 1, 30, 7, 78, 19, 0 }, + { 0, 15, 75, 7, 36, 2, 0 }, + { 0, 6, 61, 7, 56, 5, 0 }, + { 0, 2, 40, 7, 73, 13, 0 }, + { 1, 23, 77, 7, 26, 1, 0 }, + { 0, 11, 69, 7, 45, 3, 0 }, + { 0, 4, 52, 7, 64, 8, 0 }, + { 0, 1, 32, 7, 77, 18, 0 }, + { 0, 16, 76, 7, 34, 2, 0 }, + { 0, 7, 62, 7, 54, 5, 0 }, + { 0, 3, 43, 7, 70, 12, 0 } }, + .odd = { { 0, 17, 77, 7, 33, 1, 0 }, + { 0, 7, 64, 7, 53, 4, 0 }, + { 0, 3, 44, 7, 70, 11, 0 }, + { 0, 1, 25, 7, 78, 23, 1 }, + { 0, 12, 72, 7, 42, 2, 0 }, + { 0, 5, 55, 7, 61, 7, 0 }, + { 0, 2, 35, 7, 75, 16, 0 }, + { 0, 19, 77, 7, 31, 1, 0 }, + { 0, 8, 65, 7, 51, 4, 0 }, + { 0, 3, 46, 7, 69, 10, 0 }, + { 0, 1, 27, 7, 77, 22, 1 }, + { 0, 13, 74, 7, 39, 2, 0 }, + { 0, 5, 57, 7, 60, 6, 0 }, + { 0, 2, 37, 7, 75, 14, 0 }, + { 1, 20, 77, 7, 29, 1, 0 }, + { 0, 9, 68, 7, 48, 3, 0 }, + { 0, 3, 48, 7, 68, 9, 0 }, + { 0, 1, 29, 7, 77, 20, 1 }, + { 0, 14, 75, 7, 37, 2, 0 }, + { 0, 6, 60, 7, 57, 5, 0 }, + { 0, 2, 39, 7, 74, 13, 0 }, + { 1, 22, 77, 7, 27, 1, 0 }, + { 0, 10, 69, 7, 46, 3, 0 }, + { 0, 4, 51, 7, 65, 8, 0 }, + { 0, 1, 31, 7, 77, 19, 0 }, + { 0, 16, 75, 7, 35, 2, 0 }, + { 0, 7, 61, 7, 55, 5, 0 }, + { 0, 2, 42, 7, 72, 12, 0 }, + { 1, 23, 78, 7, 25, 1, 0 }, + { 0, 11, 70, 7, 44, 3, 0 }, + { 0, 4, 53, 7, 64, 7, 0 }, + { 0, 1, 33, 7, 77, 17, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 24, 78, 7, 24, 1, 0 }, + { 0, 12, 70, 7, 43, 3, 0 }, + { 0, 5, 54, 7, 62, 7, 0 }, + { 0, 2, 34, 7, 76, 16, 0 }, + { 0, 18, 77, 7, 32, 1, 0 }, + { 0, 8, 64, 7, 52, 4, 0 }, + { 0, 3, 45, 7, 69, 11, 0 }, + { 0, 1, 26, 7, 77, 23, 1 }, + { 0, 13, 73, 7, 40, 2, 0 }, + { 0, 5, 56, 7, 61, 6, 0 }, + { 0, 2, 36, 7, 75, 15, 0 }, + { 0, 19, 78, 7, 30, 1, 0 }, + { 0, 9, 66, 7, 49, 4, 0 }, + { 0, 3, 47, 7, 68, 10, 0 }, + { 0, 1, 28, 7, 77, 21, 1 }, + { 0, 14, 74, 7, 38, 2, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 2, 38, 7, 74, 14, 0 }, + { 1, 21, 77, 7, 28, 1, 0 }, + { 0, 10, 68, 7, 47, 3, 0 }, + { 0, 4, 49, 7, 66, 9, 0 }, + { 0, 1, 30, 7, 78, 19, 0 }, + { 0, 15, 75, 7, 36, 2, 0 }, + { 0, 6, 61, 7, 56, 5, 0 }, + { 0, 2, 40, 7, 73, 13, 0 }, + { 1, 23, 77, 7, 26, 1, 0 }, + { 0, 11, 69, 7, 45, 3, 0 }, + { 0, 4, 52, 7, 64, 8, 0 }, + { 0, 1, 32, 7, 77, 18, 0 }, + { 0, 16, 76, 7, 34, 2, 0 }, + { 0, 7, 62, 7, 54, 5, 0 }, + { 0, 3, 43, 7, 70, 12, 0 } }, + .odd = { { 0, 17, 77, 7, 33, 1, 0 }, + { 0, 7, 64, 7, 53, 4, 0 }, + { 0, 3, 44, 7, 70, 11, 0 }, + { 0, 1, 25, 7, 78, 23, 1 }, + { 0, 12, 72, 7, 42, 2, 0 }, + { 0, 5, 55, 7, 61, 7, 0 }, + { 0, 2, 35, 7, 75, 16, 0 }, + { 0, 19, 77, 7, 31, 1, 0 }, + { 0, 8, 65, 7, 51, 4, 0 }, + { 0, 3, 46, 7, 69, 10, 0 }, + { 0, 1, 27, 7, 77, 22, 1 }, + { 0, 13, 74, 7, 39, 2, 0 }, + { 0, 5, 57, 7, 60, 6, 0 }, + { 0, 2, 37, 7, 75, 14, 0 }, + { 1, 20, 77, 7, 29, 1, 0 }, + { 0, 9, 68, 7, 48, 3, 0 }, + { 0, 3, 48, 7, 68, 9, 0 }, + { 0, 1, 29, 7, 77, 20, 1 }, + { 0, 14, 75, 7, 37, 2, 0 }, + { 0, 6, 60, 7, 57, 5, 0 }, + { 0, 2, 39, 7, 74, 13, 0 }, + { 1, 22, 77, 7, 27, 1, 0 }, + { 0, 10, 69, 7, 46, 3, 0 }, + { 0, 4, 51, 7, 65, 8, 0 }, + { 0, 1, 31, 7, 77, 19, 0 }, + { 0, 16, 75, 7, 35, 2, 0 }, + { 0, 7, 61, 7, 55, 5, 0 }, + { 0, 2, 42, 7, 72, 12, 0 }, + { 1, 23, 78, 7, 25, 1, 0 }, + { 0, 11, 70, 7, 44, 3, 0 }, + { 0, 4, 53, 7, 64, 7, 0 }, + { 0, 1, 33, 7, 77, 17, 0 } } }, + .ptrn_arr = { { 0x24249249, 0x24921249, 0x84924909, 0x92424924, + 0x92492124, 0x48492490, 0x2492 } }, + .sample_patrn_length = 210, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 74) = 0.301887 */ + .hor_phase_arr = { + .even = { { 1, 25, 76, 7, 25, 1, 0 }, + { 0, 11, 69, 7, 45, 3, 0 }, + { 0, 4, 49, 7, 66, 9, 0 }, + { 0, 1, 28, 7, 77, 21, 1 }, + { 0, 13, 72, 7, 41, 2, 0 }, + { 0, 5, 54, 7, 62, 7, 0 }, + { 0, 1, 32, 7, 77, 18, 0 }, + { 0, 15, 75, 7, 36, 2, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 2, 36, 7, 75, 15, 0 }, + { 0, 18, 77, 7, 32, 1, 0 }, + { 0, 7, 62, 7, 54, 5, 0 }, + { 0, 2, 41, 7, 72, 13, 0 }, + { 1, 21, 77, 7, 28, 1, 0 }, + { 0, 9, 66, 7, 49, 4, 0 }, + { 0, 3, 45, 7, 69, 11, 0 } }, + .odd = { { 0, 17, 75, 7, 34, 2, 0 }, + { 0, 7, 60, 7, 56, 5, 0 }, + { 0, 2, 38, 7, 74, 14, 0 }, + { 1, 20, 76, 7, 30, 1, 0 }, + { 0, 8, 64, 7, 52, 4, 0 }, + { 0, 3, 43, 7, 70, 12, 0 }, + { 1, 23, 77, 7, 26, 1, 0 }, + { 0, 10, 68, 7, 47, 3, 0 }, + { 0, 3, 47, 7, 68, 10, 0 }, + { 0, 1, 26, 7, 77, 23, 1 }, + { 0, 12, 70, 7, 43, 3, 0 }, + { 0, 4, 52, 7, 64, 8, 0 }, + { 0, 1, 30, 7, 76, 20, 1 }, + { 0, 14, 74, 7, 38, 2, 0 }, + { 0, 5, 56, 7, 60, 7, 0 }, + { 0, 2, 34, 7, 75, 17, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 25, 76, 7, 25, 1, 0 }, + { 0, 11, 69, 7, 45, 3, 0 }, + { 0, 4, 49, 7, 66, 9, 0 }, + { 0, 1, 28, 7, 77, 21, 1 }, + { 0, 13, 72, 7, 41, 2, 0 }, + { 0, 5, 54, 7, 62, 7, 0 }, + { 0, 1, 32, 7, 77, 18, 0 }, + { 0, 15, 75, 7, 36, 2, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 2, 36, 7, 75, 15, 0 }, + { 0, 18, 77, 7, 32, 1, 0 }, + { 0, 7, 62, 7, 54, 5, 0 }, + { 0, 2, 41, 7, 72, 13, 0 }, + { 1, 21, 77, 7, 28, 1, 0 }, + { 0, 9, 66, 7, 49, 4, 0 }, + { 0, 3, 45, 7, 69, 11, 0 } }, + .odd = { { 0, 17, 75, 7, 34, 2, 0 }, + { 0, 7, 60, 7, 56, 5, 0 }, + { 0, 2, 38, 7, 74, 14, 0 }, + { 1, 20, 76, 7, 30, 1, 0 }, + { 0, 8, 64, 7, 52, 4, 0 }, + { 0, 3, 43, 7, 70, 12, 0 }, + { 1, 23, 77, 7, 26, 1, 0 }, + { 0, 10, 68, 7, 47, 3, 0 }, + { 0, 3, 47, 7, 68, 10, 0 }, + { 0, 1, 26, 7, 77, 23, 1 }, + { 0, 12, 70, 7, 43, 3, 0 }, + { 0, 4, 52, 7, 64, 8, 0 }, + { 0, 1, 30, 7, 76, 20, 1 }, + { 0, 14, 74, 7, 38, 2, 0 }, + { 0, 5, 56, 7, 60, 7, 0 }, + { 0, 2, 34, 7, 75, 17, 0 } } }, + .ptrn_arr = { { 0x24849249, 0x24924849, 0x92424924, 0x24 } }, + .sample_patrn_length = 106, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 75) = 0.299065 */ + .hor_phase_arr = { + .even = { { 1, 25, 76, 7, 25, 1, 0 }, + { 0, 10, 67, 7, 47, 4, 0 }, + { 0, 3, 45, 7, 69, 11, 0 }, + { 1, 23, 76, 7, 27, 1, 0 }, + { 0, 9, 66, 7, 49, 4, 0 }, + { 0, 3, 43, 7, 70, 12, 0 }, + { 1, 22, 75, 7, 29, 1, 0 }, + { 0, 8, 65, 7, 51, 4, 0 }, + { 0, 2, 41, 7, 72, 13, 0 }, + { 1, 20, 76, 7, 30, 1, 0 }, + { 0, 8, 61, 7, 54, 5, 0 }, + { 0, 2, 39, 7, 72, 15, 0 }, + { 0, 19, 76, 7, 32, 1, 0 }, + { 0, 7, 59, 7, 56, 6, 0 }, + { 0, 2, 36, 7, 74, 16, 0 }, + { 0, 17, 75, 7, 34, 2, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 2, 34, 7, 75, 17, 0 }, + { 0, 16, 74, 7, 36, 2, 0 }, + { 0, 6, 56, 7, 59, 7, 0 }, + { 0, 1, 32, 7, 76, 19, 0 }, + { 0, 15, 72, 7, 39, 2, 0 }, + { 0, 5, 54, 7, 61, 8, 0 }, + { 0, 1, 30, 7, 76, 20, 1 }, + { 0, 13, 72, 7, 41, 2, 0 }, + { 0, 4, 51, 7, 65, 8, 0 }, + { 0, 1, 29, 7, 75, 22, 1 }, + { 0, 12, 70, 7, 43, 3, 0 }, + { 0, 4, 49, 7, 66, 9, 0 }, + { 0, 1, 27, 7, 76, 23, 1 }, + { 0, 11, 69, 7, 45, 3, 0 }, + { 0, 4, 47, 7, 67, 10, 0 } }, + .odd = { { 0, 16, 75, 7, 35, 2, 0 }, + { 0, 6, 57, 7, 58, 7, 0 }, + { 0, 2, 33, 7, 75, 18, 0 }, + { 0, 15, 73, 7, 38, 2, 0 }, + { 0, 5, 55, 7, 61, 7, 0 }, + { 0, 1, 31, 7, 76, 19, 1 }, + { 0, 14, 72, 7, 40, 2, 0 }, + { 0, 5, 53, 7, 62, 8, 0 }, + { 0, 1, 30, 7, 75, 21, 1 }, + { 0, 13, 70, 7, 42, 3, 0 }, + { 0, 4, 50, 7, 65, 9, 0 }, + { 0, 1, 28, 7, 76, 22, 1 }, + { 0, 12, 69, 7, 44, 3, 0 }, + { 0, 4, 48, 7, 66, 10, 0 }, + { 0, 1, 26, 7, 76, 24, 1 }, + { 0, 11, 68, 7, 46, 3, 0 }, + { 0, 3, 46, 7, 68, 11, 0 }, + { 1, 24, 76, 7, 26, 1, 0 }, + { 0, 10, 66, 7, 48, 4, 0 }, + { 0, 3, 44, 7, 69, 12, 0 }, + { 1, 22, 76, 7, 28, 1, 0 }, + { 0, 9, 65, 7, 50, 4, 0 }, + { 0, 3, 42, 7, 70, 13, 0 }, + { 1, 21, 75, 7, 30, 1, 0 }, + { 0, 8, 62, 7, 53, 5, 0 }, + { 0, 2, 40, 7, 72, 14, 0 }, + { 1, 19, 76, 7, 31, 1, 0 }, + { 0, 7, 61, 7, 55, 5, 0 }, + { 0, 2, 38, 7, 73, 15, 0 }, + { 0, 18, 75, 7, 33, 2, 0 }, + { 0, 7, 58, 7, 57, 6, 0 }, + { 0, 2, 35, 7, 75, 16, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 25, 76, 7, 25, 1, 0 }, + { 0, 10, 67, 7, 47, 4, 0 }, + { 0, 3, 45, 7, 69, 11, 0 }, + { 1, 23, 76, 7, 27, 1, 0 }, + { 0, 9, 66, 7, 49, 4, 0 }, + { 0, 3, 43, 7, 70, 12, 0 }, + { 1, 22, 75, 7, 29, 1, 0 }, + { 0, 8, 65, 7, 51, 4, 0 }, + { 0, 2, 41, 7, 72, 13, 0 }, + { 1, 20, 76, 7, 30, 1, 0 }, + { 0, 8, 61, 7, 54, 5, 0 }, + { 0, 2, 39, 7, 72, 15, 0 }, + { 0, 19, 76, 7, 32, 1, 0 }, + { 0, 7, 59, 7, 56, 6, 0 }, + { 0, 2, 36, 7, 74, 16, 0 }, + { 0, 17, 75, 7, 34, 2, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 2, 34, 7, 75, 17, 0 }, + { 0, 16, 74, 7, 36, 2, 0 }, + { 0, 6, 56, 7, 59, 7, 0 }, + { 0, 1, 32, 7, 76, 19, 0 }, + { 0, 15, 72, 7, 39, 2, 0 }, + { 0, 5, 54, 7, 61, 8, 0 }, + { 0, 1, 30, 7, 76, 20, 1 }, + { 0, 13, 72, 7, 41, 2, 0 }, + { 0, 4, 51, 7, 65, 8, 0 }, + { 0, 1, 29, 7, 75, 22, 1 }, + { 0, 12, 70, 7, 43, 3, 0 }, + { 0, 4, 49, 7, 66, 9, 0 }, + { 0, 1, 27, 7, 76, 23, 1 }, + { 0, 11, 69, 7, 45, 3, 0 }, + { 0, 4, 47, 7, 67, 10, 0 } }, + .odd = { { 0, 16, 75, 7, 35, 2, 0 }, + { 0, 6, 57, 7, 58, 7, 0 }, + { 0, 2, 33, 7, 75, 18, 0 }, + { 0, 15, 73, 7, 38, 2, 0 }, + { 0, 5, 55, 7, 61, 7, 0 }, + { 0, 1, 31, 7, 76, 19, 1 }, + { 0, 14, 72, 7, 40, 2, 0 }, + { 0, 5, 53, 7, 62, 8, 0 }, + { 0, 1, 30, 7, 75, 21, 1 }, + { 0, 13, 70, 7, 42, 3, 0 }, + { 0, 4, 50, 7, 65, 9, 0 }, + { 0, 1, 28, 7, 76, 22, 1 }, + { 0, 12, 69, 7, 44, 3, 0 }, + { 0, 4, 48, 7, 66, 10, 0 }, + { 0, 1, 26, 7, 76, 24, 1 }, + { 0, 11, 68, 7, 46, 3, 0 }, + { 0, 3, 46, 7, 68, 11, 0 }, + { 1, 24, 76, 7, 26, 1, 0 }, + { 0, 10, 66, 7, 48, 4, 0 }, + { 0, 3, 44, 7, 69, 12, 0 }, + { 1, 22, 76, 7, 28, 1, 0 }, + { 0, 9, 65, 7, 50, 4, 0 }, + { 0, 3, 42, 7, 70, 13, 0 }, + { 1, 21, 75, 7, 30, 1, 0 }, + { 0, 8, 62, 7, 53, 5, 0 }, + { 0, 2, 40, 7, 72, 14, 0 }, + { 1, 19, 76, 7, 31, 1, 0 }, + { 0, 7, 61, 7, 55, 5, 0 }, + { 0, 2, 38, 7, 73, 15, 0 }, + { 0, 18, 75, 7, 33, 2, 0 }, + { 0, 7, 58, 7, 57, 6, 0 }, + { 0, 2, 35, 7, 75, 16, 0 } } }, + .ptrn_arr = { { 0x24909249, 0x90924909, 0x92490924, 0x49212490, + 0x21249212, 0x24921249, 0x24921 } }, + .sample_patrn_length = 214, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 76) = 0.296296 */ + .hor_phase_arr = { + .even = { { 1, 25, 76, 7, 25, 1, 0 }, + { 0, 10, 65, 7, 49, 4, 0 }, + { 0, 3, 41, 7, 70, 14, 0 }, + { 1, 19, 73, 7, 33, 2, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 2, 33, 7, 73, 19, 1 }, + { 0, 14, 70, 7, 41, 3, 0 }, + { 0, 4, 49, 7, 65, 10, 0 } }, + .odd = { { 0, 16, 73, 7, 37, 2, 0 }, + { 0, 5, 53, 7, 62, 8, 0 }, + { 0, 1, 29, 7, 75, 22, 1 }, + { 0, 11, 69, 7, 45, 3, 0 }, + { 0, 3, 45, 7, 69, 11, 0 }, + { 1, 22, 75, 7, 29, 1, 0 }, + { 0, 8, 62, 7, 53, 5, 0 }, + { 0, 2, 37, 7, 73, 16, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 25, 76, 7, 25, 1, 0 }, + { 0, 10, 65, 7, 49, 4, 0 }, + { 0, 3, 41, 7, 70, 14, 0 }, + { 1, 19, 73, 7, 33, 2, 0 }, + { 0, 6, 58, 7, 58, 6, 0 }, + { 0, 2, 33, 7, 73, 19, 1 }, + { 0, 14, 70, 7, 41, 3, 0 }, + { 0, 4, 49, 7, 65, 10, 0 } }, + .odd = { { 0, 16, 73, 7, 37, 2, 0 }, + { 0, 5, 53, 7, 62, 8, 0 }, + { 0, 1, 29, 7, 75, 22, 1 }, + { 0, 11, 69, 7, 45, 3, 0 }, + { 0, 3, 45, 7, 69, 11, 0 }, + { 1, 22, 75, 7, 29, 1, 0 }, + { 0, 8, 62, 7, 53, 5, 0 }, + { 0, 2, 37, 7, 73, 16, 0 } } }, + .ptrn_arr = { { 0x24909249, 0x24921 } }, + .sample_patrn_length = 54, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 77) = 0.293578 */ + .hor_phase_arr = { + .even = { { 1, 26, 74, 7, 26, 1, 0 }, + { 0, 9, 63, 7, 51, 5, 0 }, + { 0, 2, 37, 7, 73, 16, 0 }, + { 0, 15, 72, 7, 39, 2, 0 }, + { 0, 4, 49, 7, 65, 10, 0 }, + { 1, 24, 75, 7, 27, 1, 0 }, + { 0, 8, 62, 7, 53, 5, 0 }, + { 0, 2, 35, 7, 72, 18, 1 }, + { 0, 14, 70, 7, 41, 3, 0 }, + { 0, 4, 47, 7, 66, 11, 0 }, + { 1, 22, 75, 7, 29, 1, 0 }, + { 0, 7, 60, 7, 55, 6, 0 }, + { 0, 2, 33, 7, 73, 19, 1 }, + { 0, 13, 69, 7, 43, 3, 0 }, + { 0, 3, 45, 7, 68, 12, 0 }, + { 1, 21, 74, 7, 31, 1, 0 }, + { 0, 7, 57, 7, 57, 7, 0 }, + { 0, 1, 31, 7, 74, 21, 1 }, + { 0, 12, 68, 7, 45, 3, 0 }, + { 0, 3, 43, 7, 69, 13, 0 }, + { 1, 19, 73, 7, 33, 2, 0 }, + { 0, 6, 55, 7, 60, 7, 0 }, + { 0, 1, 29, 7, 75, 22, 1 }, + { 0, 11, 66, 7, 47, 4, 0 }, + { 0, 3, 41, 7, 70, 14, 0 }, + { 1, 18, 72, 7, 35, 2, 0 }, + { 0, 5, 53, 7, 62, 8, 0 }, + { 0, 1, 27, 7, 75, 24, 1 }, + { 0, 10, 65, 7, 49, 4, 0 }, + { 0, 2, 39, 7, 72, 15, 0 }, + { 0, 16, 73, 7, 37, 2, 0 }, + { 0, 5, 51, 7, 63, 9, 0 } }, + .odd = { { 0, 16, 72, 7, 38, 2, 0 }, + { 0, 5, 50, 7, 64, 9, 0 }, + { 1, 25, 75, 7, 26, 1, 0 }, + { 0, 8, 63, 7, 52, 5, 0 }, + { 0, 2, 36, 7, 73, 17, 0 }, + { 0, 15, 70, 7, 40, 3, 0 }, + { 0, 4, 48, 7, 66, 10, 0 }, + { 1, 23, 75, 7, 28, 1, 0 }, + { 0, 8, 60, 7, 54, 6, 0 }, + { 0, 2, 34, 7, 73, 18, 1 }, + { 0, 13, 70, 7, 42, 3, 0 }, + { 0, 4, 46, 7, 67, 11, 0 }, + { 1, 21, 75, 7, 30, 1, 0 }, + { 0, 7, 59, 7, 56, 6, 0 }, + { 0, 2, 32, 7, 73, 20, 1 }, + { 0, 12, 69, 7, 44, 3, 0 }, + { 0, 3, 44, 7, 69, 12, 0 }, + { 1, 20, 73, 7, 32, 2, 0 }, + { 0, 6, 56, 7, 59, 7, 0 }, + { 0, 1, 30, 7, 75, 21, 1 }, + { 0, 11, 67, 7, 46, 4, 0 }, + { 0, 3, 42, 7, 70, 13, 0 }, + { 1, 18, 73, 7, 34, 2, 0 }, + { 0, 6, 54, 7, 60, 8, 0 }, + { 0, 1, 28, 7, 75, 23, 1 }, + { 0, 10, 66, 7, 48, 4, 0 }, + { 0, 3, 40, 7, 70, 15, 0 }, + { 0, 17, 73, 7, 36, 2, 0 }, + { 0, 5, 52, 7, 63, 8, 0 }, + { 0, 1, 26, 7, 75, 25, 1 }, + { 0, 9, 64, 7, 50, 5, 0 }, + { 0, 2, 38, 7, 72, 16, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 26, 74, 7, 26, 1, 0 }, + { 0, 9, 63, 7, 51, 5, 0 }, + { 0, 2, 37, 7, 73, 16, 0 }, + { 0, 15, 72, 7, 39, 2, 0 }, + { 0, 4, 49, 7, 65, 10, 0 }, + { 1, 24, 75, 7, 27, 1, 0 }, + { 0, 8, 62, 7, 53, 5, 0 }, + { 0, 2, 35, 7, 72, 18, 1 }, + { 0, 14, 70, 7, 41, 3, 0 }, + { 0, 4, 47, 7, 66, 11, 0 }, + { 1, 22, 75, 7, 29, 1, 0 }, + { 0, 7, 60, 7, 55, 6, 0 }, + { 0, 2, 33, 7, 73, 19, 1 }, + { 0, 13, 69, 7, 43, 3, 0 }, + { 0, 3, 45, 7, 68, 12, 0 }, + { 1, 21, 74, 7, 31, 1, 0 }, + { 0, 7, 57, 7, 57, 7, 0 }, + { 0, 1, 31, 7, 74, 21, 1 }, + { 0, 12, 68, 7, 45, 3, 0 }, + { 0, 3, 43, 7, 69, 13, 0 }, + { 1, 19, 73, 7, 33, 2, 0 }, + { 0, 6, 55, 7, 60, 7, 0 }, + { 0, 1, 29, 7, 75, 22, 1 }, + { 0, 11, 66, 7, 47, 4, 0 }, + { 0, 3, 41, 7, 70, 14, 0 }, + { 1, 18, 72, 7, 35, 2, 0 }, + { 0, 5, 53, 7, 62, 8, 0 }, + { 0, 1, 27, 7, 75, 24, 1 }, + { 0, 10, 65, 7, 49, 4, 0 }, + { 0, 2, 39, 7, 72, 15, 0 }, + { 0, 16, 73, 7, 37, 2, 0 }, + { 0, 5, 51, 7, 63, 9, 0 } }, + .odd = { { 0, 16, 72, 7, 38, 2, 0 }, + { 0, 5, 50, 7, 64, 9, 0 }, + { 1, 25, 75, 7, 26, 1, 0 }, + { 0, 8, 63, 7, 52, 5, 0 }, + { 0, 2, 36, 7, 73, 17, 0 }, + { 0, 15, 70, 7, 40, 3, 0 }, + { 0, 4, 48, 7, 66, 10, 0 }, + { 1, 23, 75, 7, 28, 1, 0 }, + { 0, 8, 60, 7, 54, 6, 0 }, + { 0, 2, 34, 7, 73, 18, 1 }, + { 0, 13, 70, 7, 42, 3, 0 }, + { 0, 4, 46, 7, 67, 11, 0 }, + { 1, 21, 75, 7, 30, 1, 0 }, + { 0, 7, 59, 7, 56, 6, 0 }, + { 0, 2, 32, 7, 73, 20, 1 }, + { 0, 12, 69, 7, 44, 3, 0 }, + { 0, 3, 44, 7, 69, 12, 0 }, + { 1, 20, 73, 7, 32, 2, 0 }, + { 0, 6, 56, 7, 59, 7, 0 }, + { 0, 1, 30, 7, 75, 21, 1 }, + { 0, 11, 67, 7, 46, 4, 0 }, + { 0, 3, 42, 7, 70, 13, 0 }, + { 1, 18, 73, 7, 34, 2, 0 }, + { 0, 6, 54, 7, 60, 8, 0 }, + { 0, 1, 28, 7, 75, 23, 1 }, + { 0, 10, 66, 7, 48, 4, 0 }, + { 0, 3, 40, 7, 70, 15, 0 }, + { 0, 17, 73, 7, 36, 2, 0 }, + { 0, 5, 52, 7, 63, 8, 0 }, + { 0, 1, 26, 7, 75, 25, 1 }, + { 0, 9, 64, 7, 50, 5, 0 }, + { 0, 2, 38, 7, 72, 16, 0 } } }, + .ptrn_arr = { { 0x24921249, 0x92484924, 0x49212490, 0x24849242, + 0x92124909, 0x48492424, 0x249092 } }, + .sample_patrn_length = 218, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 78) = 0.290909 */ + .hor_phase_arr = { + .even = { { 1, 26, 74, 7, 26, 1, 0 }, + { 0, 8, 61, 7, 53, 6, 0 }, + { 0, 2, 33, 7, 73, 19, 1 }, + { 0, 12, 67, 7, 45, 4, 0 }, + { 0, 3, 41, 7, 70, 14, 0 }, + { 0, 17, 72, 7, 37, 2, 0 }, + { 0, 5, 49, 7, 64, 10, 0 }, + { 1, 22, 75, 7, 29, 1, 0 }, + { 0, 7, 57, 7, 57, 7, 0 }, + { 0, 1, 29, 7, 75, 22, 1 }, + { 0, 10, 64, 7, 49, 5, 0 }, + { 0, 2, 37, 7, 72, 17, 0 }, + { 0, 14, 70, 7, 41, 3, 0 }, + { 0, 4, 45, 7, 67, 12, 0 }, + { 1, 19, 73, 7, 33, 2, 0 }, + { 0, 6, 53, 7, 61, 8, 0 } }, + .odd = { { 0, 15, 71, 7, 39, 3, 0 }, + { 0, 4, 47, 7, 66, 11, 0 }, + { 1, 21, 73, 7, 31, 2, 0 }, + { 0, 6, 55, 7, 59, 8, 0 }, + { 0, 1, 28, 7, 74, 24, 1 }, + { 0, 9, 63, 7, 51, 5, 0 }, + { 0, 2, 35, 7, 72, 18, 1 }, + { 0, 13, 69, 7, 43, 3, 0 }, + { 0, 3, 43, 7, 69, 13, 0 }, + { 1, 18, 72, 7, 35, 2, 0 }, + { 0, 5, 51, 7, 63, 9, 0 }, + { 1, 24, 74, 7, 28, 1, 0 }, + { 0, 8, 59, 7, 55, 6, 0 }, + { 0, 2, 31, 7, 73, 21, 1 }, + { 0, 11, 66, 7, 47, 4, 0 }, + { 0, 3, 39, 7, 71, 15, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 26, 74, 7, 26, 1, 0 }, + { 0, 8, 61, 7, 53, 6, 0 }, + { 0, 2, 33, 7, 73, 19, 1 }, + { 0, 12, 67, 7, 45, 4, 0 }, + { 0, 3, 41, 7, 70, 14, 0 }, + { 0, 17, 72, 7, 37, 2, 0 }, + { 0, 5, 49, 7, 64, 10, 0 }, + { 1, 22, 75, 7, 29, 1, 0 }, + { 0, 7, 57, 7, 57, 7, 0 }, + { 0, 1, 29, 7, 75, 22, 1 }, + { 0, 10, 64, 7, 49, 5, 0 }, + { 0, 2, 37, 7, 72, 17, 0 }, + { 0, 14, 70, 7, 41, 3, 0 }, + { 0, 4, 45, 7, 67, 12, 0 }, + { 1, 19, 73, 7, 33, 2, 0 }, + { 0, 6, 53, 7, 61, 8, 0 } }, + .odd = { { 0, 15, 71, 7, 39, 3, 0 }, + { 0, 4, 47, 7, 66, 11, 0 }, + { 1, 21, 73, 7, 31, 2, 0 }, + { 0, 6, 55, 7, 59, 8, 0 }, + { 0, 1, 28, 7, 74, 24, 1 }, + { 0, 9, 63, 7, 51, 5, 0 }, + { 0, 2, 35, 7, 72, 18, 1 }, + { 0, 13, 69, 7, 43, 3, 0 }, + { 0, 3, 43, 7, 69, 13, 0 }, + { 1, 18, 72, 7, 35, 2, 0 }, + { 0, 5, 51, 7, 63, 9, 0 }, + { 1, 24, 74, 7, 28, 1, 0 }, + { 0, 8, 59, 7, 55, 6, 0 }, + { 0, 2, 31, 7, 73, 21, 1 }, + { 0, 11, 66, 7, 47, 4, 0 }, + { 0, 3, 39, 7, 71, 15, 0 } } }, + .ptrn_arr = { { 0x24921249, 0x12490924, 0x9248492, 0x249 } }, + .sample_patrn_length = 110, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 79) = 0.288288 */ + .hor_phase_arr = { + .even = { { 1, 26, 74, 7, 26, 1, 0 }, + { 0, 8, 59, 7, 55, 6, 0 }, + { 0, 1, 30, 7, 73, 23, 1 }, + { 0, 9, 63, 7, 51, 5, 0 }, + { 0, 2, 33, 7, 72, 20, 1 }, + { 0, 11, 66, 7, 47, 4, 0 }, + { 0, 2, 37, 7, 71, 17, 1 }, + { 0, 13, 69, 7, 43, 3, 0 }, + { 0, 3, 41, 7, 69, 15, 0 }, + { 0, 16, 70, 7, 39, 3, 0 }, + { 0, 4, 45, 7, 67, 12, 0 }, + { 1, 18, 72, 7, 35, 2, 0 }, + { 0, 5, 49, 7, 64, 10, 0 }, + { 1, 21, 73, 7, 31, 2, 0 }, + { 0, 6, 53, 7, 60, 9, 0 }, + { 1, 24, 74, 7, 28, 1, 0 }, + { 0, 7, 57, 7, 57, 7, 0 }, + { 0, 1, 28, 7, 74, 24, 1 }, + { 0, 9, 60, 7, 53, 6, 0 }, + { 0, 2, 31, 7, 73, 21, 1 }, + { 0, 10, 64, 7, 49, 5, 0 }, + { 0, 2, 35, 7, 72, 18, 1 }, + { 0, 12, 67, 7, 45, 4, 0 }, + { 0, 3, 39, 7, 70, 16, 0 }, + { 0, 15, 69, 7, 41, 3, 0 }, + { 0, 3, 43, 7, 69, 13, 0 }, + { 1, 17, 71, 7, 37, 2, 0 }, + { 0, 4, 47, 7, 66, 11, 0 }, + { 1, 20, 72, 7, 33, 2, 0 }, + { 0, 5, 51, 7, 63, 9, 0 }, + { 1, 23, 73, 7, 30, 1, 0 }, + { 0, 6, 55, 7, 59, 8, 0 } }, + .odd = { { 0, 15, 70, 7, 40, 3, 0 }, + { 0, 4, 44, 7, 67, 13, 0 }, + { 1, 18, 71, 7, 36, 2, 0 }, + { 0, 4, 48, 7, 65, 11, 0 }, + { 1, 20, 73, 7, 32, 2, 0 }, + { 0, 6, 52, 7, 61, 9, 0 }, + { 1, 24, 73, 7, 29, 1, 0 }, + { 0, 7, 56, 7, 58, 7, 0 }, + { 0, 1, 27, 7, 74, 25, 1 }, + { 0, 8, 60, 7, 54, 6, 0 }, + { 0, 2, 30, 7, 73, 22, 1 }, + { 0, 10, 63, 7, 50, 5, 0 }, + { 0, 2, 34, 7, 72, 19, 1 }, + { 0, 12, 66, 7, 46, 4, 0 }, + { 0, 3, 38, 7, 71, 16, 0 }, + { 0, 14, 69, 7, 42, 3, 0 }, + { 0, 3, 42, 7, 69, 14, 0 }, + { 0, 16, 71, 7, 38, 3, 0 }, + { 0, 4, 46, 7, 66, 12, 0 }, + { 1, 19, 72, 7, 34, 2, 0 }, + { 0, 5, 50, 7, 63, 10, 0 }, + { 1, 22, 73, 7, 30, 2, 0 }, + { 0, 6, 54, 7, 60, 8, 0 }, + { 1, 25, 74, 7, 27, 1, 0 }, + { 0, 7, 58, 7, 56, 7, 0 }, + { 0, 1, 29, 7, 73, 24, 1 }, + { 0, 9, 61, 7, 52, 6, 0 }, + { 0, 2, 32, 7, 73, 20, 1 }, + { 0, 11, 65, 7, 48, 4, 0 }, + { 0, 2, 36, 7, 71, 18, 1 }, + { 0, 13, 67, 7, 44, 4, 0 }, + { 0, 3, 40, 7, 70, 15, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 26, 74, 7, 26, 1, 0 }, + { 0, 8, 59, 7, 55, 6, 0 }, + { 0, 1, 30, 7, 73, 23, 1 }, + { 0, 9, 63, 7, 51, 5, 0 }, + { 0, 2, 33, 7, 72, 20, 1 }, + { 0, 11, 66, 7, 47, 4, 0 }, + { 0, 2, 37, 7, 71, 17, 1 }, + { 0, 13, 69, 7, 43, 3, 0 }, + { 0, 3, 41, 7, 69, 15, 0 }, + { 0, 16, 70, 7, 39, 3, 0 }, + { 0, 4, 45, 7, 67, 12, 0 }, + { 1, 18, 72, 7, 35, 2, 0 }, + { 0, 5, 49, 7, 64, 10, 0 }, + { 1, 21, 73, 7, 31, 2, 0 }, + { 0, 6, 53, 7, 60, 9, 0 }, + { 1, 24, 74, 7, 28, 1, 0 }, + { 0, 7, 57, 7, 57, 7, 0 }, + { 0, 1, 28, 7, 74, 24, 1 }, + { 0, 9, 60, 7, 53, 6, 0 }, + { 0, 2, 31, 7, 73, 21, 1 }, + { 0, 10, 64, 7, 49, 5, 0 }, + { 0, 2, 35, 7, 72, 18, 1 }, + { 0, 12, 67, 7, 45, 4, 0 }, + { 0, 3, 39, 7, 70, 16, 0 }, + { 0, 15, 69, 7, 41, 3, 0 }, + { 0, 3, 43, 7, 69, 13, 0 }, + { 1, 17, 71, 7, 37, 2, 0 }, + { 0, 4, 47, 7, 66, 11, 0 }, + { 1, 20, 72, 7, 33, 2, 0 }, + { 0, 5, 51, 7, 63, 9, 0 }, + { 1, 23, 73, 7, 30, 1, 0 }, + { 0, 6, 55, 7, 59, 8, 0 } }, + .odd = { { 0, 15, 70, 7, 40, 3, 0 }, + { 0, 4, 44, 7, 67, 13, 0 }, + { 1, 18, 71, 7, 36, 2, 0 }, + { 0, 4, 48, 7, 65, 11, 0 }, + { 1, 20, 73, 7, 32, 2, 0 }, + { 0, 6, 52, 7, 61, 9, 0 }, + { 1, 24, 73, 7, 29, 1, 0 }, + { 0, 7, 56, 7, 58, 7, 0 }, + { 0, 1, 27, 7, 74, 25, 1 }, + { 0, 8, 60, 7, 54, 6, 0 }, + { 0, 2, 30, 7, 73, 22, 1 }, + { 0, 10, 63, 7, 50, 5, 0 }, + { 0, 2, 34, 7, 72, 19, 1 }, + { 0, 12, 66, 7, 46, 4, 0 }, + { 0, 3, 38, 7, 71, 16, 0 }, + { 0, 14, 69, 7, 42, 3, 0 }, + { 0, 3, 42, 7, 69, 14, 0 }, + { 0, 16, 71, 7, 38, 3, 0 }, + { 0, 4, 46, 7, 66, 12, 0 }, + { 1, 19, 72, 7, 34, 2, 0 }, + { 0, 5, 50, 7, 63, 10, 0 }, + { 1, 22, 73, 7, 30, 2, 0 }, + { 0, 6, 54, 7, 60, 8, 0 }, + { 1, 25, 74, 7, 27, 1, 0 }, + { 0, 7, 58, 7, 56, 7, 0 }, + { 0, 1, 29, 7, 73, 24, 1 }, + { 0, 9, 61, 7, 52, 6, 0 }, + { 0, 2, 32, 7, 73, 20, 1 }, + { 0, 11, 65, 7, 48, 4, 0 }, + { 0, 2, 36, 7, 71, 18, 1 }, + { 0, 13, 67, 7, 44, 4, 0 }, + { 0, 3, 40, 7, 70, 15, 0 } } }, + .ptrn_arr = { { 0x84921249, 0x42492124, 0x24249092, 0x92124909, + 0x49212484, 0x24909248, 0x2490924 } }, + .sample_patrn_length = 222, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 80) = 0.285714 */ + .hor_phase_arr = { + .even = { { 1, 26, 74, 7, 26, 1, 0 }, + { 0, 7, 57, 7, 57, 7, 0 } }, + .odd = { { 0, 15, 69, 7, 41, 3, 0 }, + { 0, 3, 41, 7, 69, 15, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 26, 74, 7, 26, 1, 0 }, + { 0, 7, 57, 7, 57, 7, 0 } }, + .odd = { { 0, 15, 69, 7, 41, 3, 0 }, + { 0, 3, 41, 7, 69, 15, 0 } } }, + .ptrn_arr = { { 0x249 } }, + .sample_patrn_length = 14, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 81) = 0.283186 */ + .hor_phase_arr = { + .even = { { 1, 27, 72, 7, 27, 1, 0 }, + { 0, 7, 54, 7, 59, 8, 0 }, + { 1, 23, 72, 7, 30, 2, 0 }, + { 0, 6, 51, 7, 61, 10, 0 }, + { 1, 20, 71, 7, 34, 2, 0 }, + { 0, 5, 47, 7, 64, 12, 0 }, + { 1, 18, 69, 7, 37, 3, 0 }, + { 0, 4, 43, 7, 67, 14, 0 }, + { 0, 15, 69, 7, 41, 3, 0 }, + { 0, 3, 39, 7, 69, 16, 1 }, + { 0, 13, 66, 7, 45, 4, 0 }, + { 0, 2, 35, 7, 71, 19, 1 }, + { 0, 11, 63, 7, 49, 5, 0 }, + { 0, 2, 32, 7, 71, 22, 1 }, + { 0, 9, 60, 7, 53, 6, 0 }, + { 0, 1, 28, 7, 73, 25, 1 }, + { 0, 8, 56, 7, 56, 8, 0 }, + { 1, 25, 73, 7, 28, 1, 0 }, + { 0, 6, 53, 7, 60, 9, 0 }, + { 1, 22, 71, 7, 32, 2, 0 }, + { 0, 5, 49, 7, 63, 11, 0 }, + { 1, 19, 71, 7, 35, 2, 0 }, + { 0, 4, 45, 7, 66, 13, 0 }, + { 1, 16, 69, 7, 39, 3, 0 }, + { 0, 3, 41, 7, 69, 15, 0 }, + { 0, 14, 67, 7, 43, 4, 0 }, + { 0, 3, 37, 7, 69, 18, 1 }, + { 0, 12, 64, 7, 47, 5, 0 }, + { 0, 2, 34, 7, 71, 20, 1 }, + { 0, 10, 61, 7, 51, 6, 0 }, + { 0, 2, 30, 7, 72, 23, 1 }, + { 0, 8, 59, 7, 54, 7, 0 } }, + .odd = { { 0, 15, 67, 7, 42, 4, 0 }, + { 0, 3, 38, 7, 69, 17, 1 }, + { 0, 12, 66, 7, 46, 4, 0 }, + { 0, 2, 34, 7, 71, 20, 1 }, + { 0, 10, 63, 7, 50, 5, 0 }, + { 0, 2, 31, 7, 71, 23, 1 }, + { 0, 9, 58, 7, 54, 7, 0 }, + { 0, 1, 27, 7, 73, 26, 1 }, + { 0, 7, 55, 7, 58, 8, 0 }, + { 1, 24, 72, 7, 29, 2, 0 }, + { 0, 6, 52, 7, 60, 10, 0 }, + { 1, 21, 71, 7, 33, 2, 0 }, + { 0, 5, 48, 7, 64, 11, 0 }, + { 1, 18, 70, 7, 36, 3, 0 }, + { 0, 4, 44, 7, 67, 13, 0 }, + { 0, 16, 69, 7, 40, 3, 0 }, + { 0, 3, 40, 7, 69, 16, 0 }, + { 0, 13, 67, 7, 44, 4, 0 }, + { 0, 3, 36, 7, 70, 18, 1 }, + { 0, 11, 64, 7, 48, 5, 0 }, + { 0, 2, 33, 7, 71, 21, 1 }, + { 0, 10, 60, 7, 52, 6, 0 }, + { 0, 2, 29, 7, 72, 24, 1 }, + { 0, 8, 58, 7, 55, 7, 0 }, + { 1, 26, 73, 7, 27, 1, 0 }, + { 0, 7, 54, 7, 58, 9, 0 }, + { 1, 23, 71, 7, 31, 2, 0 }, + { 0, 5, 50, 7, 63, 10, 0 }, + { 1, 20, 71, 7, 34, 2, 0 }, + { 0, 4, 46, 7, 66, 12, 0 }, + { 1, 17, 69, 7, 38, 3, 0 }, + { 0, 4, 42, 7, 67, 15, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 27, 72, 7, 27, 1, 0 }, + { 0, 7, 54, 7, 59, 8, 0 }, + { 1, 23, 72, 7, 30, 2, 0 }, + { 0, 6, 51, 7, 61, 10, 0 }, + { 1, 20, 71, 7, 34, 2, 0 }, + { 0, 5, 47, 7, 64, 12, 0 }, + { 1, 18, 69, 7, 37, 3, 0 }, + { 0, 4, 43, 7, 67, 14, 0 }, + { 0, 15, 69, 7, 41, 3, 0 }, + { 0, 3, 39, 7, 69, 16, 1 }, + { 0, 13, 66, 7, 45, 4, 0 }, + { 0, 2, 35, 7, 71, 19, 1 }, + { 0, 11, 63, 7, 49, 5, 0 }, + { 0, 2, 32, 7, 71, 22, 1 }, + { 0, 9, 60, 7, 53, 6, 0 }, + { 0, 1, 28, 7, 73, 25, 1 }, + { 0, 8, 56, 7, 56, 8, 0 }, + { 1, 25, 73, 7, 28, 1, 0 }, + { 0, 6, 53, 7, 60, 9, 0 }, + { 1, 22, 71, 7, 32, 2, 0 }, + { 0, 5, 49, 7, 63, 11, 0 }, + { 1, 19, 71, 7, 35, 2, 0 }, + { 0, 4, 45, 7, 66, 13, 0 }, + { 1, 16, 69, 7, 39, 3, 0 }, + { 0, 3, 41, 7, 69, 15, 0 }, + { 0, 14, 67, 7, 43, 4, 0 }, + { 0, 3, 37, 7, 69, 18, 1 }, + { 0, 12, 64, 7, 47, 5, 0 }, + { 0, 2, 34, 7, 71, 20, 1 }, + { 0, 10, 61, 7, 51, 6, 0 }, + { 0, 2, 30, 7, 72, 23, 1 }, + { 0, 8, 59, 7, 54, 7, 0 } }, + .odd = { { 0, 15, 67, 7, 42, 4, 0 }, + { 0, 3, 38, 7, 69, 17, 1 }, + { 0, 12, 66, 7, 46, 4, 0 }, + { 0, 2, 34, 7, 71, 20, 1 }, + { 0, 10, 63, 7, 50, 5, 0 }, + { 0, 2, 31, 7, 71, 23, 1 }, + { 0, 9, 58, 7, 54, 7, 0 }, + { 0, 1, 27, 7, 73, 26, 1 }, + { 0, 7, 55, 7, 58, 8, 0 }, + { 1, 24, 72, 7, 29, 2, 0 }, + { 0, 6, 52, 7, 60, 10, 0 }, + { 1, 21, 71, 7, 33, 2, 0 }, + { 0, 5, 48, 7, 64, 11, 0 }, + { 1, 18, 70, 7, 36, 3, 0 }, + { 0, 4, 44, 7, 67, 13, 0 }, + { 0, 16, 69, 7, 40, 3, 0 }, + { 0, 3, 40, 7, 69, 16, 0 }, + { 0, 13, 67, 7, 44, 4, 0 }, + { 0, 3, 36, 7, 70, 18, 1 }, + { 0, 11, 64, 7, 48, 5, 0 }, + { 0, 2, 33, 7, 71, 21, 1 }, + { 0, 10, 60, 7, 52, 6, 0 }, + { 0, 2, 29, 7, 72, 24, 1 }, + { 0, 8, 58, 7, 55, 7, 0 }, + { 1, 26, 73, 7, 27, 1, 0 }, + { 0, 7, 54, 7, 58, 9, 0 }, + { 1, 23, 71, 7, 31, 2, 0 }, + { 0, 5, 50, 7, 63, 10, 0 }, + { 1, 20, 71, 7, 34, 2, 0 }, + { 0, 4, 46, 7, 66, 12, 0 }, + { 1, 17, 69, 7, 38, 3, 0 }, + { 0, 4, 42, 7, 67, 15, 0 } } }, + .ptrn_arr = { { 0x90924249, 0x49092424, 0x84921248, 0x49092124, + 0x24909242, 0x48492124, 0x24849212 } }, + .sample_patrn_length = 226, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 82) = 0.280702 */ + .hor_phase_arr = { + .even = { { 1, 27, 72, 7, 27, 1, 0 }, + { 0, 6, 52, 7, 61, 9, 0 }, + { 1, 21, 70, 7, 34, 2, 0 }, + { 0, 4, 45, 7, 66, 13, 0 }, + { 0, 15, 68, 7, 41, 4, 0 }, + { 0, 3, 37, 7, 69, 18, 1 }, + { 0, 11, 63, 7, 49, 5, 0 }, + { 0, 2, 30, 7, 71, 24, 1 }, + { 0, 8, 56, 7, 56, 8, 0 }, + { 1, 24, 71, 7, 30, 2, 0 }, + { 0, 5, 49, 7, 63, 11, 0 }, + { 1, 18, 69, 7, 37, 3, 0 }, + { 0, 4, 41, 7, 68, 15, 0 }, + { 0, 13, 66, 7, 45, 4, 0 }, + { 0, 2, 34, 7, 70, 21, 1 }, + { 0, 9, 61, 7, 52, 6, 0 } }, + .odd = { { 0, 14, 67, 7, 43, 4, 0 }, + { 0, 3, 36, 7, 69, 19, 1 }, + { 0, 10, 61, 7, 51, 6, 0 }, + { 0, 2, 28, 7, 72, 25, 1 }, + { 0, 7, 54, 7, 58, 9, 0 }, + { 1, 22, 71, 7, 32, 2, 0 }, + { 0, 5, 47, 7, 64, 12, 0 }, + { 1, 17, 68, 7, 39, 3, 0 }, + { 0, 3, 39, 7, 68, 17, 1 }, + { 0, 12, 64, 7, 47, 5, 0 }, + { 0, 2, 32, 7, 71, 22, 1 }, + { 0, 9, 58, 7, 54, 7, 0 }, + { 1, 25, 72, 7, 28, 2, 0 }, + { 0, 6, 51, 7, 61, 10, 0 }, + { 1, 19, 69, 7, 36, 3, 0 }, + { 0, 4, 43, 7, 67, 14, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 27, 72, 7, 27, 1, 0 }, + { 0, 6, 52, 7, 61, 9, 0 }, + { 1, 21, 70, 7, 34, 2, 0 }, + { 0, 4, 45, 7, 66, 13, 0 }, + { 0, 15, 68, 7, 41, 4, 0 }, + { 0, 3, 37, 7, 69, 18, 1 }, + { 0, 11, 63, 7, 49, 5, 0 }, + { 0, 2, 30, 7, 71, 24, 1 }, + { 0, 8, 56, 7, 56, 8, 0 }, + { 1, 24, 71, 7, 30, 2, 0 }, + { 0, 5, 49, 7, 63, 11, 0 }, + { 1, 18, 69, 7, 37, 3, 0 }, + { 0, 4, 41, 7, 68, 15, 0 }, + { 0, 13, 66, 7, 45, 4, 0 }, + { 0, 2, 34, 7, 70, 21, 1 }, + { 0, 9, 61, 7, 52, 6, 0 } }, + .odd = { { 0, 14, 67, 7, 43, 4, 0 }, + { 0, 3, 36, 7, 69, 19, 1 }, + { 0, 10, 61, 7, 51, 6, 0 }, + { 0, 2, 28, 7, 72, 25, 1 }, + { 0, 7, 54, 7, 58, 9, 0 }, + { 1, 22, 71, 7, 32, 2, 0 }, + { 0, 5, 47, 7, 64, 12, 0 }, + { 1, 17, 68, 7, 39, 3, 0 }, + { 0, 3, 39, 7, 68, 17, 1 }, + { 0, 12, 64, 7, 47, 5, 0 }, + { 0, 2, 32, 7, 71, 22, 1 }, + { 0, 9, 58, 7, 54, 7, 0 }, + { 1, 25, 72, 7, 28, 2, 0 }, + { 0, 6, 51, 7, 61, 10, 0 }, + { 1, 19, 69, 7, 36, 3, 0 }, + { 0, 4, 43, 7, 67, 14, 0 } } }, + .ptrn_arr = { { 0x90924249, 0x9212484, 0x92124249, 0x2484 } }, + .sample_patrn_length = 114, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 83) = 0.278261 */ + .hor_phase_arr = { + .even = { { 1, 27, 72, 7, 27, 1, 0 }, + { 0, 6, 51, 7, 61, 10, 0 }, + { 1, 18, 68, 7, 38, 3, 0 }, + { 0, 3, 39, 7, 68, 17, 1 }, + { 0, 11, 62, 7, 49, 6, 0 }, + { 0, 2, 29, 7, 71, 25, 1 }, + { 0, 7, 52, 7, 59, 10, 0 }, + { 1, 19, 69, 7, 36, 3, 0 }, + { 0, 4, 41, 7, 66, 16, 1 }, + { 0, 12, 64, 7, 47, 5, 0 }, + { 0, 2, 30, 7, 71, 24, 1 }, + { 0, 7, 54, 7, 58, 9, 0 }, + { 1, 21, 70, 7, 34, 2, 0 }, + { 0, 4, 43, 7, 66, 15, 0 }, + { 0, 13, 65, 7, 45, 5, 0 }, + { 0, 2, 32, 7, 71, 22, 1 }, + { 0, 8, 56, 7, 56, 8, 0 }, + { 1, 22, 71, 7, 32, 2, 0 }, + { 0, 5, 45, 7, 65, 13, 0 }, + { 0, 15, 66, 7, 43, 4, 0 }, + { 0, 2, 34, 7, 70, 21, 1 }, + { 0, 9, 58, 7, 54, 7, 0 }, + { 1, 24, 71, 7, 30, 2, 0 }, + { 0, 5, 47, 7, 64, 12, 0 }, + { 1, 16, 66, 7, 41, 4, 0 }, + { 0, 3, 36, 7, 69, 19, 1 }, + { 0, 10, 59, 7, 52, 7, 0 }, + { 1, 25, 71, 7, 29, 2, 0 }, + { 0, 6, 49, 7, 62, 11, 0 }, + { 1, 17, 68, 7, 39, 3, 0 }, + { 0, 3, 38, 7, 68, 18, 1 }, + { 0, 10, 61, 7, 51, 6, 0 } }, + .odd = { { 0, 14, 66, 7, 44, 4, 0 }, + { 0, 2, 33, 7, 70, 22, 1 }, + { 0, 8, 57, 7, 55, 8, 0 }, + { 1, 23, 71, 7, 31, 2, 0 }, + { 0, 5, 46, 7, 64, 13, 0 }, + { 0, 15, 67, 7, 42, 4, 0 }, + { 0, 3, 35, 7, 69, 20, 1 }, + { 0, 9, 59, 7, 53, 7, 0 }, + { 1, 25, 71, 7, 29, 2, 0 }, + { 0, 5, 48, 7, 63, 12, 0 }, + { 1, 16, 68, 7, 40, 3, 0 }, + { 0, 3, 37, 7, 68, 19, 1 }, + { 0, 10, 61, 7, 51, 6, 0 }, + { 1, 26, 71, 7, 28, 2, 0 }, + { 0, 6, 50, 7, 61, 11, 0 }, + { 1, 18, 68, 7, 38, 3, 0 }, + { 0, 3, 38, 7, 68, 18, 1 }, + { 0, 11, 61, 7, 50, 6, 0 }, + { 0, 2, 28, 7, 71, 26, 1 }, + { 0, 6, 51, 7, 61, 10, 0 }, + { 1, 19, 68, 7, 37, 3, 0 }, + { 0, 3, 40, 7, 68, 16, 1 }, + { 0, 12, 63, 7, 48, 5, 0 }, + { 0, 2, 29, 7, 71, 25, 1 }, + { 0, 7, 53, 7, 59, 9, 0 }, + { 1, 20, 69, 7, 35, 3, 0 }, + { 0, 4, 42, 7, 67, 15, 0 }, + { 0, 13, 64, 7, 46, 5, 0 }, + { 0, 2, 31, 7, 71, 23, 1 }, + { 0, 8, 55, 7, 57, 8, 0 }, + { 1, 22, 70, 7, 33, 2, 0 }, + { 0, 4, 44, 7, 66, 14, 0 } } }, + .ver_phase_arr = { + .even = { { 1, 27, 72, 7, 27, 1, 0 }, + { 0, 6, 51, 7, 61, 10, 0 }, + { 1, 18, 68, 7, 38, 3, 0 }, + { 0, 3, 39, 7, 68, 17, 1 }, + { 0, 11, 62, 7, 49, 6, 0 }, + { 0, 2, 29, 7, 71, 25, 1 }, + { 0, 7, 52, 7, 59, 10, 0 }, + { 1, 19, 69, 7, 36, 3, 0 }, + { 0, 4, 41, 7, 66, 16, 1 }, + { 0, 12, 64, 7, 47, 5, 0 }, + { 0, 2, 30, 7, 71, 24, 1 }, + { 0, 7, 54, 7, 58, 9, 0 }, + { 1, 21, 70, 7, 34, 2, 0 }, + { 0, 4, 43, 7, 66, 15, 0 }, + { 0, 13, 65, 7, 45, 5, 0 }, + { 0, 2, 32, 7, 71, 22, 1 }, + { 0, 8, 56, 7, 56, 8, 0 }, + { 1, 22, 71, 7, 32, 2, 0 }, + { 0, 5, 45, 7, 65, 13, 0 }, + { 0, 15, 66, 7, 43, 4, 0 }, + { 0, 2, 34, 7, 70, 21, 1 }, + { 0, 9, 58, 7, 54, 7, 0 }, + { 1, 24, 71, 7, 30, 2, 0 }, + { 0, 5, 47, 7, 64, 12, 0 }, + { 1, 16, 66, 7, 41, 4, 0 }, + { 0, 3, 36, 7, 69, 19, 1 }, + { 0, 10, 59, 7, 52, 7, 0 }, + { 1, 25, 71, 7, 29, 2, 0 }, + { 0, 6, 49, 7, 62, 11, 0 }, + { 1, 17, 68, 7, 39, 3, 0 }, + { 0, 3, 38, 7, 68, 18, 1 }, + { 0, 10, 61, 7, 51, 6, 0 } }, + .odd = { { 0, 14, 66, 7, 44, 4, 0 }, + { 0, 2, 33, 7, 70, 22, 1 }, + { 0, 8, 57, 7, 55, 8, 0 }, + { 1, 23, 71, 7, 31, 2, 0 }, + { 0, 5, 46, 7, 64, 13, 0 }, + { 0, 15, 67, 7, 42, 4, 0 }, + { 0, 3, 35, 7, 69, 20, 1 }, + { 0, 9, 59, 7, 53, 7, 0 }, + { 1, 25, 71, 7, 29, 2, 0 }, + { 0, 5, 48, 7, 63, 12, 0 }, + { 1, 16, 68, 7, 40, 3, 0 }, + { 0, 3, 37, 7, 68, 19, 1 }, + { 0, 10, 61, 7, 51, 6, 0 }, + { 1, 26, 71, 7, 28, 2, 0 }, + { 0, 6, 50, 7, 61, 11, 0 }, + { 1, 18, 68, 7, 38, 3, 0 }, + { 0, 3, 38, 7, 68, 18, 1 }, + { 0, 11, 61, 7, 50, 6, 0 }, + { 0, 2, 28, 7, 71, 26, 1 }, + { 0, 6, 51, 7, 61, 10, 0 }, + { 1, 19, 68, 7, 37, 3, 0 }, + { 0, 3, 40, 7, 68, 16, 1 }, + { 0, 12, 63, 7, 48, 5, 0 }, + { 0, 2, 29, 7, 71, 25, 1 }, + { 0, 7, 53, 7, 59, 9, 0 }, + { 1, 20, 69, 7, 35, 3, 0 }, + { 0, 4, 42, 7, 67, 15, 0 }, + { 0, 13, 64, 7, 46, 5, 0 }, + { 0, 2, 31, 7, 71, 23, 1 }, + { 0, 8, 55, 7, 57, 8, 0 }, + { 1, 22, 70, 7, 33, 2, 0 }, + { 0, 4, 44, 7, 66, 14, 0 } } }, + .ptrn_arr = { { 0x92124249, 0x21242484, 0x12424849, 0x24248492, + 0x42484909, 0x24849092, 0x48490924, 0x2 } }, + .sample_patrn_length = 230, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 84) = 0.275862 */ + .hor_phase_arr = { + .even = { { 2, 27, 70, 7, 27, 2, 0 }, + { 0, 6, 49, 7, 61, 12, 0 }, + { 1, 16, 66, 7, 41, 4, 0 }, + { 0, 2, 34, 7, 70, 21, 1 }, + { 0, 8, 56, 7, 56, 8, 0 }, + { 1, 21, 70, 7, 34, 2, 0 }, + { 0, 4, 41, 7, 66, 16, 1 }, + { 0, 12, 61, 7, 49, 6, 0 } }, + .odd = { { 0, 14, 64, 7, 45, 5, 0 }, + { 0, 2, 31, 7, 70, 24, 1 }, + { 0, 7, 52, 7, 59, 10, 0 }, + { 1, 18, 68, 7, 38, 3, 0 }, + { 0, 3, 38, 7, 68, 18, 1 }, + { 0, 10, 59, 7, 52, 7, 0 }, + { 1, 24, 70, 7, 31, 2, 0 }, + { 0, 5, 45, 7, 64, 14, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 27, 70, 7, 27, 2, 0 }, + { 0, 6, 49, 7, 61, 12, 0 }, + { 1, 16, 66, 7, 41, 4, 0 }, + { 0, 2, 34, 7, 70, 21, 1 }, + { 0, 8, 56, 7, 56, 8, 0 }, + { 1, 21, 70, 7, 34, 2, 0 }, + { 0, 4, 41, 7, 66, 16, 1 }, + { 0, 12, 61, 7, 49, 6, 0 } }, + .odd = { { 0, 14, 64, 7, 45, 5, 0 }, + { 0, 2, 31, 7, 70, 24, 1 }, + { 0, 7, 52, 7, 59, 10, 0 }, + { 1, 18, 68, 7, 38, 3, 0 }, + { 0, 3, 38, 7, 68, 18, 1 }, + { 0, 10, 59, 7, 52, 7, 0 }, + { 1, 24, 70, 7, 31, 2, 0 }, + { 0, 5, 45, 7, 64, 14, 0 } } }, + .ptrn_arr = { { 0x92124249, 0x248490 } }, + .sample_patrn_length = 58, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 85) = 0.273504 */ + .hor_phase_arr = { + .even = { { 2, 27, 70, 7, 27, 2, 0 }, + { 0, 5, 47, 7, 63, 13, 0 }, + { 0, 14, 64, 7, 45, 5, 0 }, + { 0, 2, 29, 7, 70, 26, 1 }, + { 0, 6, 48, 7, 62, 12, 0 }, + { 1, 15, 65, 7, 43, 4, 0 }, + { 0, 2, 31, 7, 70, 24, 1 }, + { 0, 6, 50, 7, 61, 11, 0 }, + { 1, 16, 66, 7, 41, 4, 0 }, + { 0, 2, 32, 7, 70, 23, 1 }, + { 0, 7, 52, 7, 59, 10, 0 }, + { 1, 17, 67, 7, 39, 4, 0 }, + { 0, 3, 34, 7, 69, 21, 1 }, + { 0, 8, 54, 7, 57, 9, 0 }, + { 1, 19, 67, 7, 38, 3, 0 }, + { 0, 3, 36, 7, 68, 20, 1 }, + { 0, 9, 55, 7, 55, 9, 0 }, + { 1, 20, 68, 7, 36, 3, 0 }, + { 0, 3, 38, 7, 67, 19, 1 }, + { 0, 9, 57, 7, 54, 8, 0 }, + { 1, 21, 69, 7, 34, 3, 0 }, + { 0, 4, 39, 7, 67, 17, 1 }, + { 0, 10, 59, 7, 52, 7, 0 }, + { 1, 23, 70, 7, 32, 2, 0 }, + { 0, 4, 41, 7, 66, 16, 1 }, + { 0, 11, 61, 7, 50, 6, 0 }, + { 1, 24, 70, 7, 31, 2, 0 }, + { 0, 4, 43, 7, 65, 15, 1 }, + { 0, 12, 62, 7, 48, 6, 0 }, + { 1, 26, 70, 7, 29, 2, 0 }, + { 0, 5, 45, 7, 64, 14, 0 }, + { 0, 13, 63, 7, 47, 5, 0 } }, + .odd = { { 0, 13, 64, 7, 46, 5, 0 }, + { 0, 2, 28, 7, 69, 27, 2 }, + { 0, 6, 48, 7, 62, 12, 0 }, + { 1, 14, 64, 7, 44, 5, 0 }, + { 0, 2, 30, 7, 70, 25, 1 }, + { 0, 6, 49, 7, 62, 11, 0 }, + { 1, 16, 65, 7, 42, 4, 0 }, + { 0, 2, 32, 7, 69, 24, 1 }, + { 0, 7, 51, 7, 59, 11, 0 }, + { 1, 17, 66, 7, 40, 4, 0 }, + { 0, 2, 33, 7, 70, 22, 1 }, + { 0, 7, 53, 7, 58, 10, 0 }, + { 1, 18, 67, 7, 39, 3, 0 }, + { 0, 3, 35, 7, 68, 21, 1 }, + { 0, 8, 54, 7, 57, 9, 0 }, + { 1, 19, 68, 7, 37, 3, 0 }, + { 0, 3, 37, 7, 68, 19, 1 }, + { 0, 9, 57, 7, 54, 8, 0 }, + { 1, 21, 68, 7, 35, 3, 0 }, + { 0, 3, 39, 7, 67, 18, 1 }, + { 0, 10, 58, 7, 53, 7, 0 }, + { 1, 22, 70, 7, 33, 2, 0 }, + { 0, 4, 40, 7, 66, 17, 1 }, + { 0, 11, 59, 7, 51, 7, 0 }, + { 1, 24, 69, 7, 32, 2, 0 }, + { 0, 4, 42, 7, 65, 16, 1 }, + { 0, 11, 62, 7, 49, 6, 0 }, + { 1, 25, 70, 7, 30, 2, 0 }, + { 0, 5, 44, 7, 64, 14, 1 }, + { 0, 12, 62, 7, 48, 6, 0 }, + { 2, 27, 69, 7, 28, 2, 0 }, + { 0, 5, 46, 7, 64, 13, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 27, 70, 7, 27, 2, 0 }, + { 0, 5, 47, 7, 63, 13, 0 }, + { 0, 14, 64, 7, 45, 5, 0 }, + { 0, 2, 29, 7, 70, 26, 1 }, + { 0, 6, 48, 7, 62, 12, 0 }, + { 1, 15, 65, 7, 43, 4, 0 }, + { 0, 2, 31, 7, 70, 24, 1 }, + { 0, 6, 50, 7, 61, 11, 0 }, + { 1, 16, 66, 7, 41, 4, 0 }, + { 0, 2, 32, 7, 70, 23, 1 }, + { 0, 7, 52, 7, 59, 10, 0 }, + { 1, 17, 67, 7, 39, 4, 0 }, + { 0, 3, 34, 7, 69, 21, 1 }, + { 0, 8, 54, 7, 57, 9, 0 }, + { 1, 19, 67, 7, 38, 3, 0 }, + { 0, 3, 36, 7, 68, 20, 1 }, + { 0, 9, 55, 7, 55, 9, 0 }, + { 1, 20, 68, 7, 36, 3, 0 }, + { 0, 3, 38, 7, 67, 19, 1 }, + { 0, 9, 57, 7, 54, 8, 0 }, + { 1, 21, 69, 7, 34, 3, 0 }, + { 0, 4, 39, 7, 67, 17, 1 }, + { 0, 10, 59, 7, 52, 7, 0 }, + { 1, 23, 70, 7, 32, 2, 0 }, + { 0, 4, 41, 7, 66, 16, 1 }, + { 0, 11, 61, 7, 50, 6, 0 }, + { 1, 24, 70, 7, 31, 2, 0 }, + { 0, 4, 43, 7, 65, 15, 1 }, + { 0, 12, 62, 7, 48, 6, 0 }, + { 1, 26, 70, 7, 29, 2, 0 }, + { 0, 5, 45, 7, 64, 14, 0 }, + { 0, 13, 63, 7, 47, 5, 0 } }, + .odd = { { 0, 13, 64, 7, 46, 5, 0 }, + { 0, 2, 28, 7, 69, 27, 2 }, + { 0, 6, 48, 7, 62, 12, 0 }, + { 1, 14, 64, 7, 44, 5, 0 }, + { 0, 2, 30, 7, 70, 25, 1 }, + { 0, 6, 49, 7, 62, 11, 0 }, + { 1, 16, 65, 7, 42, 4, 0 }, + { 0, 2, 32, 7, 69, 24, 1 }, + { 0, 7, 51, 7, 59, 11, 0 }, + { 1, 17, 66, 7, 40, 4, 0 }, + { 0, 2, 33, 7, 70, 22, 1 }, + { 0, 7, 53, 7, 58, 10, 0 }, + { 1, 18, 67, 7, 39, 3, 0 }, + { 0, 3, 35, 7, 68, 21, 1 }, + { 0, 8, 54, 7, 57, 9, 0 }, + { 1, 19, 68, 7, 37, 3, 0 }, + { 0, 3, 37, 7, 68, 19, 1 }, + { 0, 9, 57, 7, 54, 8, 0 }, + { 1, 21, 68, 7, 35, 3, 0 }, + { 0, 3, 39, 7, 67, 18, 1 }, + { 0, 10, 58, 7, 53, 7, 0 }, + { 1, 22, 70, 7, 33, 2, 0 }, + { 0, 4, 40, 7, 66, 17, 1 }, + { 0, 11, 59, 7, 51, 7, 0 }, + { 1, 24, 69, 7, 32, 2, 0 }, + { 0, 4, 42, 7, 65, 16, 1 }, + { 0, 11, 62, 7, 49, 6, 0 }, + { 1, 25, 70, 7, 30, 2, 0 }, + { 0, 5, 44, 7, 64, 14, 1 }, + { 0, 12, 62, 7, 48, 6, 0 }, + { 2, 27, 69, 7, 28, 2, 0 }, + { 0, 5, 46, 7, 64, 13, 0 } } }, + .ptrn_arr = { { 0x92124249, 0x24248490, 0x48490921, 0x90921242, + 0x21242484, 0x42484909, 0x84909212, 0x24 } }, + .sample_patrn_length = 234, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 86) = 0.271186 */ + .hor_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 5, 45, 7, 63, 14, 1 }, + { 0, 12, 62, 7, 48, 6, 0 }, + { 1, 25, 69, 7, 31, 2, 0 }, + { 0, 4, 41, 7, 66, 16, 1 }, + { 0, 10, 59, 7, 52, 7, 0 }, + { 1, 22, 68, 7, 34, 3, 0 }, + { 0, 3, 38, 7, 67, 19, 1 }, + { 0, 9, 55, 7, 55, 9, 0 }, + { 1, 19, 67, 7, 38, 3, 0 }, + { 0, 3, 34, 7, 68, 22, 1 }, + { 0, 7, 52, 7, 59, 10, 0 }, + { 1, 16, 66, 7, 41, 4, 0 }, + { 0, 2, 31, 7, 69, 25, 1 }, + { 0, 6, 48, 7, 62, 12, 0 }, + { 1, 14, 63, 7, 45, 5, 0 } }, + .odd = { { 0, 13, 62, 7, 47, 6, 0 }, + { 2, 26, 69, 7, 29, 2, 0 }, + { 0, 5, 43, 7, 64, 15, 1 }, + { 0, 11, 60, 7, 50, 7, 0 }, + { 1, 23, 69, 7, 33, 2, 0 }, + { 0, 4, 40, 7, 65, 18, 1 }, + { 0, 10, 57, 7, 53, 8, 0 }, + { 1, 20, 68, 7, 36, 3, 0 }, + { 0, 3, 36, 7, 68, 20, 1 }, + { 0, 8, 53, 7, 57, 10, 0 }, + { 1, 18, 65, 7, 40, 4, 0 }, + { 0, 2, 33, 7, 69, 23, 1 }, + { 0, 7, 50, 7, 60, 11, 0 }, + { 1, 15, 64, 7, 43, 5, 0 }, + { 0, 2, 29, 7, 69, 26, 2 }, + { 0, 6, 47, 7, 62, 13, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 5, 45, 7, 63, 14, 1 }, + { 0, 12, 62, 7, 48, 6, 0 }, + { 1, 25, 69, 7, 31, 2, 0 }, + { 0, 4, 41, 7, 66, 16, 1 }, + { 0, 10, 59, 7, 52, 7, 0 }, + { 1, 22, 68, 7, 34, 3, 0 }, + { 0, 3, 38, 7, 67, 19, 1 }, + { 0, 9, 55, 7, 55, 9, 0 }, + { 1, 19, 67, 7, 38, 3, 0 }, + { 0, 3, 34, 7, 68, 22, 1 }, + { 0, 7, 52, 7, 59, 10, 0 }, + { 1, 16, 66, 7, 41, 4, 0 }, + { 0, 2, 31, 7, 69, 25, 1 }, + { 0, 6, 48, 7, 62, 12, 0 }, + { 1, 14, 63, 7, 45, 5, 0 } }, + .odd = { { 0, 13, 62, 7, 47, 6, 0 }, + { 2, 26, 69, 7, 29, 2, 0 }, + { 0, 5, 43, 7, 64, 15, 1 }, + { 0, 11, 60, 7, 50, 7, 0 }, + { 1, 23, 69, 7, 33, 2, 0 }, + { 0, 4, 40, 7, 65, 18, 1 }, + { 0, 10, 57, 7, 53, 8, 0 }, + { 1, 20, 68, 7, 36, 3, 0 }, + { 0, 3, 36, 7, 68, 20, 1 }, + { 0, 8, 53, 7, 57, 10, 0 }, + { 1, 18, 65, 7, 40, 4, 0 }, + { 0, 2, 33, 7, 69, 23, 1 }, + { 0, 7, 50, 7, 60, 11, 0 }, + { 1, 15, 64, 7, 43, 5, 0 }, + { 0, 2, 29, 7, 69, 26, 2 }, + { 0, 6, 47, 7, 62, 13, 0 } } }, + .ptrn_arr = { { 0x12424849, 0x24849092, 0x49092124, 0x24248 } }, + .sample_patrn_length = 118, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 87) = 0.268908 */ + .hor_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 5, 43, 7, 63, 16, 1 }, + { 0, 11, 57, 7, 52, 8, 0 }, + { 1, 21, 67, 7, 36, 3, 0 }, + { 0, 3, 34, 7, 68, 22, 1 }, + { 0, 7, 50, 7, 60, 11, 0 }, + { 1, 14, 63, 7, 45, 5, 0 }, + { 2, 26, 69, 7, 29, 2, 0 }, + { 0, 4, 41, 7, 65, 17, 1 }, + { 0, 10, 57, 7, 53, 8, 0 }, + { 1, 19, 66, 7, 38, 4, 0 }, + { 0, 3, 33, 7, 68, 23, 1 }, + { 0, 6, 48, 7, 62, 12, 0 }, + { 0, 13, 62, 7, 47, 6, 0 }, + { 1, 25, 69, 7, 31, 2, 0 }, + { 0, 4, 40, 7, 65, 18, 1 }, + { 0, 9, 55, 7, 55, 9, 0 }, + { 1, 18, 65, 7, 40, 4, 0 }, + { 0, 2, 31, 7, 69, 25, 1 }, + { 0, 6, 47, 7, 62, 13, 0 }, + { 0, 12, 62, 7, 48, 6, 0 }, + { 1, 23, 68, 7, 33, 3, 0 }, + { 0, 4, 38, 7, 66, 19, 1 }, + { 0, 8, 53, 7, 57, 10, 0 }, + { 1, 17, 65, 7, 41, 4, 0 }, + { 0, 2, 29, 7, 69, 26, 2 }, + { 0, 5, 45, 7, 63, 14, 1 }, + { 0, 11, 60, 7, 50, 7, 0 }, + { 1, 22, 68, 7, 34, 3, 0 }, + { 0, 3, 36, 7, 67, 21, 1 }, + { 0, 8, 52, 7, 57, 11, 0 }, + { 1, 16, 63, 7, 43, 5, 0 } }, + .odd = { { 0, 13, 62, 7, 47, 6, 0 }, + { 1, 24, 69, 7, 32, 2, 0 }, + { 0, 4, 39, 7, 65, 19, 1 }, + { 0, 9, 54, 7, 56, 9, 0 }, + { 1, 17, 66, 7, 40, 4, 0 }, + { 0, 2, 30, 7, 69, 25, 2 }, + { 0, 5, 46, 7, 62, 14, 1 }, + { 0, 12, 60, 7, 49, 7, 0 }, + { 1, 23, 67, 7, 34, 3, 0 }, + { 0, 3, 37, 7, 67, 20, 1 }, + { 0, 8, 52, 7, 58, 10, 0 }, + { 1, 16, 64, 7, 42, 5, 0 }, + { 0, 2, 29, 7, 68, 27, 2 }, + { 0, 5, 44, 7, 63, 15, 1 }, + { 0, 11, 59, 7, 51, 7, 0 }, + { 1, 21, 68, 7, 35, 3, 0 }, + { 0, 3, 35, 7, 68, 21, 1 }, + { 0, 7, 51, 7, 59, 11, 0 }, + { 1, 15, 63, 7, 44, 5, 0 }, + { 2, 27, 68, 7, 29, 2, 0 }, + { 0, 5, 42, 7, 64, 16, 1 }, + { 0, 10, 58, 7, 52, 8, 0 }, + { 1, 20, 67, 7, 37, 3, 0 }, + { 0, 3, 34, 7, 67, 23, 1 }, + { 0, 7, 49, 7, 60, 12, 0 }, + { 1, 14, 62, 7, 46, 5, 0 }, + { 2, 25, 69, 7, 30, 2, 0 }, + { 0, 4, 40, 7, 66, 17, 1 }, + { 0, 9, 56, 7, 54, 9, 0 }, + { 1, 19, 65, 7, 39, 4, 0 }, + { 0, 2, 32, 7, 69, 24, 1 }, + { 0, 6, 47, 7, 62, 13, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 5, 43, 7, 63, 16, 1 }, + { 0, 11, 57, 7, 52, 8, 0 }, + { 1, 21, 67, 7, 36, 3, 0 }, + { 0, 3, 34, 7, 68, 22, 1 }, + { 0, 7, 50, 7, 60, 11, 0 }, + { 1, 14, 63, 7, 45, 5, 0 }, + { 2, 26, 69, 7, 29, 2, 0 }, + { 0, 4, 41, 7, 65, 17, 1 }, + { 0, 10, 57, 7, 53, 8, 0 }, + { 1, 19, 66, 7, 38, 4, 0 }, + { 0, 3, 33, 7, 68, 23, 1 }, + { 0, 6, 48, 7, 62, 12, 0 }, + { 0, 13, 62, 7, 47, 6, 0 }, + { 1, 25, 69, 7, 31, 2, 0 }, + { 0, 4, 40, 7, 65, 18, 1 }, + { 0, 9, 55, 7, 55, 9, 0 }, + { 1, 18, 65, 7, 40, 4, 0 }, + { 0, 2, 31, 7, 69, 25, 1 }, + { 0, 6, 47, 7, 62, 13, 0 }, + { 0, 12, 62, 7, 48, 6, 0 }, + { 1, 23, 68, 7, 33, 3, 0 }, + { 0, 4, 38, 7, 66, 19, 1 }, + { 0, 8, 53, 7, 57, 10, 0 }, + { 1, 17, 65, 7, 41, 4, 0 }, + { 0, 2, 29, 7, 69, 26, 2 }, + { 0, 5, 45, 7, 63, 14, 1 }, + { 0, 11, 60, 7, 50, 7, 0 }, + { 1, 22, 68, 7, 34, 3, 0 }, + { 0, 3, 36, 7, 67, 21, 1 }, + { 0, 8, 52, 7, 57, 11, 0 }, + { 1, 16, 63, 7, 43, 5, 0 } }, + .odd = { { 0, 13, 62, 7, 47, 6, 0 }, + { 1, 24, 69, 7, 32, 2, 0 }, + { 0, 4, 39, 7, 65, 19, 1 }, + { 0, 9, 54, 7, 56, 9, 0 }, + { 1, 17, 66, 7, 40, 4, 0 }, + { 0, 2, 30, 7, 69, 25, 2 }, + { 0, 5, 46, 7, 62, 14, 1 }, + { 0, 12, 60, 7, 49, 7, 0 }, + { 1, 23, 67, 7, 34, 3, 0 }, + { 0, 3, 37, 7, 67, 20, 1 }, + { 0, 8, 52, 7, 58, 10, 0 }, + { 1, 16, 64, 7, 42, 5, 0 }, + { 0, 2, 29, 7, 68, 27, 2 }, + { 0, 5, 44, 7, 63, 15, 1 }, + { 0, 11, 59, 7, 51, 7, 0 }, + { 1, 21, 68, 7, 35, 3, 0 }, + { 0, 3, 35, 7, 68, 21, 1 }, + { 0, 7, 51, 7, 59, 11, 0 }, + { 1, 15, 63, 7, 44, 5, 0 }, + { 2, 27, 68, 7, 29, 2, 0 }, + { 0, 5, 42, 7, 64, 16, 1 }, + { 0, 10, 58, 7, 52, 8, 0 }, + { 1, 20, 67, 7, 37, 3, 0 }, + { 0, 3, 34, 7, 67, 23, 1 }, + { 0, 7, 49, 7, 60, 12, 0 }, + { 1, 14, 62, 7, 46, 5, 0 }, + { 2, 25, 69, 7, 30, 2, 0 }, + { 0, 4, 40, 7, 66, 17, 1 }, + { 0, 9, 56, 7, 54, 9, 0 }, + { 1, 19, 65, 7, 39, 4, 0 }, + { 0, 2, 32, 7, 69, 24, 1 }, + { 0, 6, 47, 7, 62, 13, 0 } } }, + .ptrn_arr = { { 0x12424849, 0x84909092, 0x9212424, 0x42484909, + 0x90921212, 0x21242484, 0x48490921, 0x242 } }, + .sample_patrn_length = 238, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 88) = 0.266667 */ + .hor_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 4, 41, 7, 65, 17, 1 }, + { 0, 9, 55, 7, 55, 9, 0 }, + { 1, 17, 65, 7, 41, 4, 0 } }, + .odd = { { 0, 13, 60, 7, 48, 7, 0 }, + { 1, 22, 68, 7, 34, 3, 0 }, + { 0, 3, 34, 7, 68, 22, 1 }, + { 0, 7, 48, 7, 60, 13, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 4, 41, 7, 65, 17, 1 }, + { 0, 9, 55, 7, 55, 9, 0 }, + { 1, 17, 65, 7, 41, 4, 0 } }, + .odd = { { 0, 13, 60, 7, 48, 7, 0 }, + { 1, 22, 68, 7, 34, 3, 0 }, + { 0, 3, 34, 7, 68, 22, 1 }, + { 0, 7, 48, 7, 60, 13, 0 } } }, + .ptrn_arr = { { 0x2424849 } }, + .sample_patrn_length = 30, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 89) = 0.264463 */ + .hor_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 4, 40, 7, 65, 18, 1 }, + { 0, 8, 51, 7, 58, 11, 0 }, + { 1, 14, 61, 7, 46, 6, 0 }, + { 1, 22, 67, 7, 35, 3, 0 }, + { 0, 3, 33, 7, 67, 24, 1 }, + { 0, 6, 45, 7, 61, 15, 1 }, + { 0, 10, 56, 7, 53, 9, 0 }, + { 1, 17, 64, 7, 41, 5, 0 }, + { 2, 27, 67, 7, 30, 2, 0 }, + { 0, 4, 38, 7, 65, 20, 1 }, + { 0, 7, 50, 7, 59, 12, 0 }, + { 0, 13, 60, 7, 48, 7, 0 }, + { 1, 21, 67, 7, 36, 3, 0 }, + { 0, 3, 31, 7, 67, 25, 2 }, + { 0, 5, 43, 7, 63, 16, 1 }, + { 0, 9, 56, 7, 54, 9, 0 }, + { 1, 16, 63, 7, 43, 5, 0 }, + { 2, 25, 67, 7, 31, 3, 0 }, + { 0, 3, 36, 7, 67, 21, 1 }, + { 0, 7, 48, 7, 60, 13, 0 }, + { 0, 12, 59, 7, 50, 7, 0 }, + { 1, 20, 65, 7, 38, 4, 0 }, + { 0, 2, 30, 7, 67, 27, 2 }, + { 0, 5, 41, 7, 64, 17, 1 }, + { 0, 9, 53, 7, 56, 10, 0 }, + { 1, 15, 61, 7, 45, 6, 0 }, + { 1, 24, 67, 7, 33, 3, 0 }, + { 0, 3, 35, 7, 67, 22, 1 }, + { 0, 6, 46, 7, 61, 14, 1 }, + { 0, 11, 58, 7, 51, 8, 0 }, + { 1, 18, 65, 7, 40, 4, 0 } }, + .odd = { { 0, 12, 60, 7, 49, 7, 0 }, + { 1, 20, 66, 7, 37, 4, 0 }, + { 0, 2, 31, 7, 67, 26, 2 }, + { 0, 5, 42, 7, 63, 17, 1 }, + { 0, 9, 54, 7, 55, 10, 0 }, + { 1, 16, 62, 7, 44, 5, 0 }, + { 2, 24, 67, 7, 32, 3, 0 }, + { 0, 3, 35, 7, 67, 22, 1 }, + { 0, 6, 47, 7, 61, 13, 1 }, + { 0, 12, 58, 7, 50, 8, 0 }, + { 1, 19, 65, 7, 39, 4, 0 }, + { 0, 2, 29, 7, 68, 27, 2 }, + { 0, 4, 40, 7, 65, 18, 1 }, + { 0, 8, 52, 7, 57, 11, 0 }, + { 1, 14, 61, 7, 46, 6, 0 }, + { 1, 23, 67, 7, 34, 3, 0 }, + { 0, 3, 34, 7, 67, 23, 1 }, + { 0, 6, 46, 7, 61, 14, 1 }, + { 0, 11, 57, 7, 52, 8, 0 }, + { 1, 18, 65, 7, 40, 4, 0 }, + { 2, 27, 68, 7, 29, 2, 0 }, + { 0, 4, 39, 7, 65, 19, 1 }, + { 0, 8, 50, 7, 58, 12, 0 }, + { 1, 13, 61, 7, 47, 6, 0 }, + { 1, 22, 67, 7, 35, 3, 0 }, + { 0, 3, 32, 7, 67, 24, 2 }, + { 0, 5, 44, 7, 62, 16, 1 }, + { 0, 10, 55, 7, 54, 9, 0 }, + { 1, 17, 63, 7, 42, 5, 0 }, + { 2, 26, 67, 7, 31, 2, 0 }, + { 0, 4, 37, 7, 66, 20, 1 }, + { 0, 7, 49, 7, 60, 12, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 4, 40, 7, 65, 18, 1 }, + { 0, 8, 51, 7, 58, 11, 0 }, + { 1, 14, 61, 7, 46, 6, 0 }, + { 1, 22, 67, 7, 35, 3, 0 }, + { 0, 3, 33, 7, 67, 24, 1 }, + { 0, 6, 45, 7, 61, 15, 1 }, + { 0, 10, 56, 7, 53, 9, 0 }, + { 1, 17, 64, 7, 41, 5, 0 }, + { 2, 27, 67, 7, 30, 2, 0 }, + { 0, 4, 38, 7, 65, 20, 1 }, + { 0, 7, 50, 7, 59, 12, 0 }, + { 0, 13, 60, 7, 48, 7, 0 }, + { 1, 21, 67, 7, 36, 3, 0 }, + { 0, 3, 31, 7, 67, 25, 2 }, + { 0, 5, 43, 7, 63, 16, 1 }, + { 0, 9, 56, 7, 54, 9, 0 }, + { 1, 16, 63, 7, 43, 5, 0 }, + { 2, 25, 67, 7, 31, 3, 0 }, + { 0, 3, 36, 7, 67, 21, 1 }, + { 0, 7, 48, 7, 60, 13, 0 }, + { 0, 12, 59, 7, 50, 7, 0 }, + { 1, 20, 65, 7, 38, 4, 0 }, + { 0, 2, 30, 7, 67, 27, 2 }, + { 0, 5, 41, 7, 64, 17, 1 }, + { 0, 9, 53, 7, 56, 10, 0 }, + { 1, 15, 61, 7, 45, 6, 0 }, + { 1, 24, 67, 7, 33, 3, 0 }, + { 0, 3, 35, 7, 67, 22, 1 }, + { 0, 6, 46, 7, 61, 14, 1 }, + { 0, 11, 58, 7, 51, 8, 0 }, + { 1, 18, 65, 7, 40, 4, 0 } }, + .odd = { { 0, 12, 60, 7, 49, 7, 0 }, + { 1, 20, 66, 7, 37, 4, 0 }, + { 0, 2, 31, 7, 67, 26, 2 }, + { 0, 5, 42, 7, 63, 17, 1 }, + { 0, 9, 54, 7, 55, 10, 0 }, + { 1, 16, 62, 7, 44, 5, 0 }, + { 2, 24, 67, 7, 32, 3, 0 }, + { 0, 3, 35, 7, 67, 22, 1 }, + { 0, 6, 47, 7, 61, 13, 1 }, + { 0, 12, 58, 7, 50, 8, 0 }, + { 1, 19, 65, 7, 39, 4, 0 }, + { 0, 2, 29, 7, 68, 27, 2 }, + { 0, 4, 40, 7, 65, 18, 1 }, + { 0, 8, 52, 7, 57, 11, 0 }, + { 1, 14, 61, 7, 46, 6, 0 }, + { 1, 23, 67, 7, 34, 3, 0 }, + { 0, 3, 34, 7, 67, 23, 1 }, + { 0, 6, 46, 7, 61, 14, 1 }, + { 0, 11, 57, 7, 52, 8, 0 }, + { 1, 18, 65, 7, 40, 4, 0 }, + { 2, 27, 68, 7, 29, 2, 0 }, + { 0, 4, 39, 7, 65, 19, 1 }, + { 0, 8, 50, 7, 58, 12, 0 }, + { 1, 13, 61, 7, 47, 6, 0 }, + { 1, 22, 67, 7, 35, 3, 0 }, + { 0, 3, 32, 7, 67, 24, 2 }, + { 0, 5, 44, 7, 62, 16, 1 }, + { 0, 10, 55, 7, 54, 9, 0 }, + { 1, 17, 63, 7, 42, 5, 0 }, + { 2, 26, 67, 7, 31, 2, 0 }, + { 0, 4, 37, 7, 66, 20, 1 }, + { 0, 7, 49, 7, 60, 12, 0 } } }, + .ptrn_arr = { { 0x42424849, 0x90921212, 0x24248490, 0x9212124, + 0x48484909, 0x92121242, 0x84849090, 0x2424 } }, + .sample_patrn_length = 242, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 90) = 0.262295 */ + .hor_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 4, 38, 7, 65, 20, 1 }, + { 0, 7, 48, 7, 59, 13, 1 }, + { 0, 11, 58, 7, 51, 8, 0 }, + { 1, 17, 64, 7, 41, 5, 0 }, + { 2, 25, 67, 7, 31, 3, 0 }, + { 0, 3, 35, 7, 66, 23, 1 }, + { 0, 6, 45, 7, 61, 15, 1 }, + { 0, 10, 54, 7, 54, 10, 0 }, + { 1, 15, 61, 7, 45, 6, 0 }, + { 1, 23, 66, 7, 35, 3, 0 }, + { 0, 3, 31, 7, 67, 25, 2 }, + { 0, 5, 41, 7, 64, 17, 1 }, + { 0, 8, 51, 7, 58, 11, 0 }, + { 1, 13, 59, 7, 48, 7, 0 }, + { 1, 20, 65, 7, 38, 4, 0 } }, + .odd = { { 0, 12, 59, 7, 49, 8, 0 }, + { 1, 19, 64, 7, 40, 4, 0 }, + { 2, 27, 67, 7, 30, 2, 0 }, + { 0, 4, 36, 7, 66, 21, 1 }, + { 0, 6, 46, 7, 61, 14, 1 }, + { 0, 10, 56, 7, 53, 9, 0 }, + { 1, 16, 63, 7, 43, 5, 0 }, + { 2, 24, 66, 7, 33, 3, 0 }, + { 0, 3, 33, 7, 66, 24, 2 }, + { 0, 5, 43, 7, 63, 16, 1 }, + { 0, 9, 53, 7, 56, 10, 0 }, + { 1, 14, 61, 7, 46, 6, 0 }, + { 1, 21, 66, 7, 36, 4, 0 }, + { 0, 2, 30, 7, 67, 27, 2 }, + { 0, 4, 40, 7, 64, 19, 1 }, + { 0, 8, 49, 7, 59, 12, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 28, 68, 7, 28, 2, 0 }, + { 0, 4, 38, 7, 65, 20, 1 }, + { 0, 7, 48, 7, 59, 13, 1 }, + { 0, 11, 58, 7, 51, 8, 0 }, + { 1, 17, 64, 7, 41, 5, 0 }, + { 2, 25, 67, 7, 31, 3, 0 }, + { 0, 3, 35, 7, 66, 23, 1 }, + { 0, 6, 45, 7, 61, 15, 1 }, + { 0, 10, 54, 7, 54, 10, 0 }, + { 1, 15, 61, 7, 45, 6, 0 }, + { 1, 23, 66, 7, 35, 3, 0 }, + { 0, 3, 31, 7, 67, 25, 2 }, + { 0, 5, 41, 7, 64, 17, 1 }, + { 0, 8, 51, 7, 58, 11, 0 }, + { 1, 13, 59, 7, 48, 7, 0 }, + { 1, 20, 65, 7, 38, 4, 0 } }, + .odd = { { 0, 12, 59, 7, 49, 8, 0 }, + { 1, 19, 64, 7, 40, 4, 0 }, + { 2, 27, 67, 7, 30, 2, 0 }, + { 0, 4, 36, 7, 66, 21, 1 }, + { 0, 6, 46, 7, 61, 14, 1 }, + { 0, 10, 56, 7, 53, 9, 0 }, + { 1, 16, 63, 7, 43, 5, 0 }, + { 2, 24, 66, 7, 33, 3, 0 }, + { 0, 3, 33, 7, 66, 24, 2 }, + { 0, 5, 43, 7, 63, 16, 1 }, + { 0, 9, 53, 7, 56, 10, 0 }, + { 1, 14, 61, 7, 46, 6, 0 }, + { 1, 21, 66, 7, 36, 4, 0 }, + { 0, 2, 30, 7, 67, 27, 2 }, + { 0, 4, 40, 7, 64, 19, 1 }, + { 0, 8, 49, 7, 59, 12, 0 } } }, + .ptrn_arr = { { 0x42484849, 0x92121242, 0x84849090, 0x242424 } }, + .sample_patrn_length = 122, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 91) = 0.260163 */ + .hor_phase_arr = { + .even = { { 2, 29, 66, 7, 29, 2, 0 }, + { 0, 4, 36, 7, 66, 21, 1 }, + { 0, 6, 45, 7, 61, 15, 1 }, + { 0, 9, 52, 7, 56, 11, 0 }, + { 1, 13, 59, 7, 48, 7, 0 }, + { 1, 19, 63, 7, 40, 5, 0 }, + { 2, 26, 65, 7, 32, 3, 0 }, + { 0, 3, 33, 7, 66, 24, 2 }, + { 0, 5, 41, 7, 63, 18, 1 }, + { 0, 8, 49, 7, 59, 12, 0 }, + { 0, 12, 57, 7, 51, 8, 0 }, + { 1, 17, 62, 7, 43, 5, 0 }, + { 1, 23, 66, 7, 35, 3, 0 }, + { 0, 3, 30, 7, 66, 27, 2 }, + { 0, 4, 38, 7, 65, 20, 1 }, + { 0, 7, 46, 7, 60, 14, 1 }, + { 0, 10, 54, 7, 54, 10, 0 }, + { 1, 14, 60, 7, 46, 7, 0 }, + { 1, 20, 65, 7, 38, 4, 0 }, + { 2, 27, 66, 7, 30, 3, 0 }, + { 0, 3, 35, 7, 66, 23, 1 }, + { 0, 5, 43, 7, 62, 17, 1 }, + { 0, 8, 51, 7, 57, 12, 0 }, + { 0, 12, 59, 7, 49, 8, 0 }, + { 1, 18, 63, 7, 41, 5, 0 }, + { 2, 24, 66, 7, 33, 3, 0 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 5, 40, 7, 63, 19, 1 }, + { 0, 7, 48, 7, 59, 13, 1 }, + { 0, 11, 56, 7, 52, 9, 0 }, + { 1, 15, 61, 7, 45, 6, 0 }, + { 1, 21, 66, 7, 36, 4, 0 } }, + .odd = { { 0, 12, 58, 7, 50, 8, 0 }, + { 1, 17, 63, 7, 42, 5, 0 }, + { 2, 23, 66, 7, 34, 3, 0 }, + { 0, 3, 31, 7, 66, 26, 2 }, + { 0, 4, 39, 7, 64, 20, 1 }, + { 0, 7, 47, 7, 59, 14, 1 }, + { 0, 10, 55, 7, 53, 10, 0 }, + { 1, 15, 61, 7, 45, 6, 0 }, + { 1, 21, 65, 7, 37, 4, 0 }, + { 2, 28, 67, 7, 29, 2, 0 }, + { 0, 4, 36, 7, 65, 22, 1 }, + { 0, 6, 44, 7, 61, 16, 1 }, + { 0, 9, 52, 7, 56, 11, 0 }, + { 1, 13, 58, 7, 49, 7, 0 }, + { 1, 18, 64, 7, 40, 5, 0 }, + { 2, 25, 66, 7, 32, 3, 0 }, + { 0, 3, 32, 7, 66, 25, 2 }, + { 0, 5, 40, 7, 64, 18, 1 }, + { 0, 7, 49, 7, 58, 13, 1 }, + { 0, 11, 56, 7, 52, 9, 0 }, + { 1, 16, 61, 7, 44, 6, 0 }, + { 1, 22, 65, 7, 36, 4, 0 }, + { 0, 2, 29, 7, 67, 28, 2 }, + { 0, 4, 37, 7, 65, 21, 1 }, + { 0, 6, 45, 7, 61, 15, 1 }, + { 0, 10, 53, 7, 55, 10, 0 }, + { 1, 14, 59, 7, 47, 7, 0 }, + { 1, 20, 64, 7, 39, 4, 0 }, + { 2, 26, 66, 7, 31, 3, 0 }, + { 0, 3, 34, 7, 66, 23, 2 }, + { 0, 5, 42, 7, 63, 17, 1 }, + { 0, 8, 50, 7, 58, 12, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 29, 66, 7, 29, 2, 0 }, + { 0, 4, 36, 7, 66, 21, 1 }, + { 0, 6, 45, 7, 61, 15, 1 }, + { 0, 9, 52, 7, 56, 11, 0 }, + { 1, 13, 59, 7, 48, 7, 0 }, + { 1, 19, 63, 7, 40, 5, 0 }, + { 2, 26, 65, 7, 32, 3, 0 }, + { 0, 3, 33, 7, 66, 24, 2 }, + { 0, 5, 41, 7, 63, 18, 1 }, + { 0, 8, 49, 7, 59, 12, 0 }, + { 0, 12, 57, 7, 51, 8, 0 }, + { 1, 17, 62, 7, 43, 5, 0 }, + { 1, 23, 66, 7, 35, 3, 0 }, + { 0, 3, 30, 7, 66, 27, 2 }, + { 0, 4, 38, 7, 65, 20, 1 }, + { 0, 7, 46, 7, 60, 14, 1 }, + { 0, 10, 54, 7, 54, 10, 0 }, + { 1, 14, 60, 7, 46, 7, 0 }, + { 1, 20, 65, 7, 38, 4, 0 }, + { 2, 27, 66, 7, 30, 3, 0 }, + { 0, 3, 35, 7, 66, 23, 1 }, + { 0, 5, 43, 7, 62, 17, 1 }, + { 0, 8, 51, 7, 57, 12, 0 }, + { 0, 12, 59, 7, 49, 8, 0 }, + { 1, 18, 63, 7, 41, 5, 0 }, + { 2, 24, 66, 7, 33, 3, 0 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 5, 40, 7, 63, 19, 1 }, + { 0, 7, 48, 7, 59, 13, 1 }, + { 0, 11, 56, 7, 52, 9, 0 }, + { 1, 15, 61, 7, 45, 6, 0 }, + { 1, 21, 66, 7, 36, 4, 0 } }, + .odd = { { 0, 12, 58, 7, 50, 8, 0 }, + { 1, 17, 63, 7, 42, 5, 0 }, + { 2, 23, 66, 7, 34, 3, 0 }, + { 0, 3, 31, 7, 66, 26, 2 }, + { 0, 4, 39, 7, 64, 20, 1 }, + { 0, 7, 47, 7, 59, 14, 1 }, + { 0, 10, 55, 7, 53, 10, 0 }, + { 1, 15, 61, 7, 45, 6, 0 }, + { 1, 21, 65, 7, 37, 4, 0 }, + { 2, 28, 67, 7, 29, 2, 0 }, + { 0, 4, 36, 7, 65, 22, 1 }, + { 0, 6, 44, 7, 61, 16, 1 }, + { 0, 9, 52, 7, 56, 11, 0 }, + { 1, 13, 58, 7, 49, 7, 0 }, + { 1, 18, 64, 7, 40, 5, 0 }, + { 2, 25, 66, 7, 32, 3, 0 }, + { 0, 3, 32, 7, 66, 25, 2 }, + { 0, 5, 40, 7, 64, 18, 1 }, + { 0, 7, 49, 7, 58, 13, 1 }, + { 0, 11, 56, 7, 52, 9, 0 }, + { 1, 16, 61, 7, 44, 6, 0 }, + { 1, 22, 65, 7, 36, 4, 0 }, + { 0, 2, 29, 7, 67, 28, 2 }, + { 0, 4, 37, 7, 65, 21, 1 }, + { 0, 6, 45, 7, 61, 15, 1 }, + { 0, 10, 53, 7, 55, 10, 0 }, + { 1, 14, 59, 7, 47, 7, 0 }, + { 1, 20, 64, 7, 39, 4, 0 }, + { 2, 26, 66, 7, 31, 3, 0 }, + { 0, 3, 34, 7, 66, 23, 2 }, + { 0, 5, 42, 7, 63, 17, 1 }, + { 0, 8, 50, 7, 58, 12, 0 } } }, + .ptrn_arr = { { 0x42484849, 0x12124242, 0x90909212, 0x24848484, + 0x21242424, 0x9090921, 0x48484849, 0x24242 } }, + .sample_patrn_length = 246, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 92) = 0.258065 */ + .hor_phase_arr = { + .even = { { 2, 29, 66, 7, 29, 2, 0 }, + { 0, 4, 35, 7, 64, 23, 2 }, + { 0, 5, 41, 7, 63, 18, 1 }, + { 0, 7, 48, 7, 58, 14, 1 }, + { 0, 10, 54, 7, 54, 10, 0 }, + { 1, 14, 58, 7, 48, 7, 0 }, + { 1, 18, 63, 7, 41, 5, 0 }, + { 2, 23, 64, 7, 35, 4, 0 } }, + .odd = { { 0, 12, 56, 7, 51, 9, 0 }, + { 1, 16, 61, 7, 44, 6, 0 }, + { 1, 20, 65, 7, 38, 4, 0 }, + { 2, 26, 65, 7, 32, 3, 0 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 4, 38, 7, 65, 20, 1 }, + { 0, 6, 44, 7, 61, 16, 1 }, + { 0, 9, 51, 7, 56, 12, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 29, 66, 7, 29, 2, 0 }, + { 0, 4, 35, 7, 64, 23, 2 }, + { 0, 5, 41, 7, 63, 18, 1 }, + { 0, 7, 48, 7, 58, 14, 1 }, + { 0, 10, 54, 7, 54, 10, 0 }, + { 1, 14, 58, 7, 48, 7, 0 }, + { 1, 18, 63, 7, 41, 5, 0 }, + { 2, 23, 64, 7, 35, 4, 0 } }, + .odd = { { 0, 12, 56, 7, 51, 9, 0 }, + { 1, 16, 61, 7, 44, 6, 0 }, + { 1, 20, 65, 7, 38, 4, 0 }, + { 2, 26, 65, 7, 32, 3, 0 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 4, 38, 7, 65, 20, 1 }, + { 0, 6, 44, 7, 61, 16, 1 }, + { 0, 9, 51, 7, 56, 12, 0 } } }, + .ptrn_arr = { { 0x48484849, 0x2424242 } }, + .sample_patrn_length = 62, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 93) = 0.256 */ + .hor_phase_arr = { + .even = { { 2, 29, 66, 7, 29, 2, 0 }, + { 0, 3, 33, 7, 65, 25, 2 }, + { 0, 4, 38, 7, 64, 21, 1 }, + { 0, 6, 43, 7, 61, 17, 1 }, + { 0, 8, 47, 7, 58, 14, 1 }, + { 0, 10, 52, 7, 55, 11, 0 }, + { 1, 12, 56, 7, 50, 9, 0 }, + { 1, 15, 59, 7, 46, 7, 0 }, + { 1, 18, 63, 7, 41, 5, 0 }, + { 1, 22, 65, 7, 36, 4, 0 }, + { 2, 26, 65, 7, 32, 3, 0 }, + { 0, 3, 30, 7, 66, 27, 2 }, + { 0, 4, 35, 7, 64, 23, 2 }, + { 0, 5, 40, 7, 63, 19, 1 }, + { 0, 6, 44, 7, 61, 16, 1 }, + { 0, 8, 49, 7, 57, 13, 1 }, + { 0, 10, 55, 7, 53, 10, 0 }, + { 1, 13, 57, 7, 49, 8, 0 }, + { 1, 16, 61, 7, 44, 6, 0 }, + { 1, 19, 63, 7, 40, 5, 0 }, + { 2, 23, 64, 7, 35, 4, 0 }, + { 2, 27, 66, 7, 30, 3, 0 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 4, 36, 7, 65, 22, 1 }, + { 0, 5, 41, 7, 63, 18, 1 }, + { 0, 7, 46, 7, 59, 15, 1 }, + { 0, 9, 50, 7, 56, 12, 1 }, + { 0, 11, 55, 7, 52, 10, 0 }, + { 1, 14, 58, 7, 47, 8, 0 }, + { 1, 17, 61, 7, 43, 6, 0 }, + { 1, 21, 64, 7, 38, 4, 0 }, + { 2, 25, 65, 7, 33, 3, 0 } }, + .odd = { { 0, 12, 56, 7, 51, 9, 0 }, + { 1, 14, 59, 7, 47, 7, 0 }, + { 1, 18, 61, 7, 42, 6, 0 }, + { 1, 21, 65, 7, 37, 4, 0 }, + { 2, 25, 65, 7, 33, 3, 0 }, + { 0, 3, 30, 7, 65, 28, 2 }, + { 0, 3, 34, 7, 65, 24, 2 }, + { 0, 5, 39, 7, 63, 20, 1 }, + { 0, 6, 44, 7, 61, 16, 1 }, + { 0, 8, 48, 7, 58, 13, 1 }, + { 0, 10, 53, 7, 54, 11, 0 }, + { 1, 12, 57, 7, 50, 8, 0 }, + { 1, 15, 60, 7, 45, 7, 0 }, + { 1, 19, 63, 7, 40, 5, 0 }, + { 2, 23, 63, 7, 36, 4, 0 }, + { 2, 27, 65, 7, 31, 3, 0 }, + { 0, 3, 31, 7, 65, 27, 2 }, + { 0, 4, 36, 7, 63, 23, 2 }, + { 0, 5, 40, 7, 63, 19, 1 }, + { 0, 7, 45, 7, 60, 15, 1 }, + { 0, 8, 50, 7, 57, 12, 1 }, + { 0, 11, 54, 7, 53, 10, 0 }, + { 1, 13, 58, 7, 48, 8, 0 }, + { 1, 16, 61, 7, 44, 6, 0 }, + { 1, 20, 63, 7, 39, 5, 0 }, + { 2, 24, 65, 7, 34, 3, 0 }, + { 2, 28, 65, 7, 30, 3, 0 }, + { 0, 3, 33, 7, 65, 25, 2 }, + { 0, 4, 37, 7, 65, 21, 1 }, + { 0, 6, 42, 7, 61, 18, 1 }, + { 0, 7, 47, 7, 59, 14, 1 }, + { 0, 9, 51, 7, 56, 12, 0 } } }, + .ver_phase_arr = { + .even = { { 2, 29, 66, 7, 29, 2, 0 }, + { 0, 3, 33, 7, 65, 25, 2 }, + { 0, 4, 38, 7, 64, 21, 1 }, + { 0, 6, 43, 7, 61, 17, 1 }, + { 0, 8, 47, 7, 58, 14, 1 }, + { 0, 10, 52, 7, 55, 11, 0 }, + { 1, 12, 56, 7, 50, 9, 0 }, + { 1, 15, 59, 7, 46, 7, 0 }, + { 1, 18, 63, 7, 41, 5, 0 }, + { 1, 22, 65, 7, 36, 4, 0 }, + { 2, 26, 65, 7, 32, 3, 0 }, + { 0, 3, 30, 7, 66, 27, 2 }, + { 0, 4, 35, 7, 64, 23, 2 }, + { 0, 5, 40, 7, 63, 19, 1 }, + { 0, 6, 44, 7, 61, 16, 1 }, + { 0, 8, 49, 7, 57, 13, 1 }, + { 0, 10, 55, 7, 53, 10, 0 }, + { 1, 13, 57, 7, 49, 8, 0 }, + { 1, 16, 61, 7, 44, 6, 0 }, + { 1, 19, 63, 7, 40, 5, 0 }, + { 2, 23, 64, 7, 35, 4, 0 }, + { 2, 27, 66, 7, 30, 3, 0 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 4, 36, 7, 65, 22, 1 }, + { 0, 5, 41, 7, 63, 18, 1 }, + { 0, 7, 46, 7, 59, 15, 1 }, + { 0, 9, 50, 7, 56, 12, 1 }, + { 0, 11, 55, 7, 52, 10, 0 }, + { 1, 14, 58, 7, 47, 8, 0 }, + { 1, 17, 61, 7, 43, 6, 0 }, + { 1, 21, 64, 7, 38, 4, 0 }, + { 2, 25, 65, 7, 33, 3, 0 } }, + .odd = { { 0, 12, 56, 7, 51, 9, 0 }, + { 1, 14, 59, 7, 47, 7, 0 }, + { 1, 18, 61, 7, 42, 6, 0 }, + { 1, 21, 65, 7, 37, 4, 0 }, + { 2, 25, 65, 7, 33, 3, 0 }, + { 0, 3, 30, 7, 65, 28, 2 }, + { 0, 3, 34, 7, 65, 24, 2 }, + { 0, 5, 39, 7, 63, 20, 1 }, + { 0, 6, 44, 7, 61, 16, 1 }, + { 0, 8, 48, 7, 58, 13, 1 }, + { 0, 10, 53, 7, 54, 11, 0 }, + { 1, 12, 57, 7, 50, 8, 0 }, + { 1, 15, 60, 7, 45, 7, 0 }, + { 1, 19, 63, 7, 40, 5, 0 }, + { 2, 23, 63, 7, 36, 4, 0 }, + { 2, 27, 65, 7, 31, 3, 0 }, + { 0, 3, 31, 7, 65, 27, 2 }, + { 0, 4, 36, 7, 63, 23, 2 }, + { 0, 5, 40, 7, 63, 19, 1 }, + { 0, 7, 45, 7, 60, 15, 1 }, + { 0, 8, 50, 7, 57, 12, 1 }, + { 0, 11, 54, 7, 53, 10, 0 }, + { 1, 13, 58, 7, 48, 8, 0 }, + { 1, 16, 61, 7, 44, 6, 0 }, + { 1, 20, 63, 7, 39, 5, 0 }, + { 2, 24, 65, 7, 34, 3, 0 }, + { 2, 28, 65, 7, 30, 3, 0 }, + { 0, 3, 33, 7, 65, 25, 2 }, + { 0, 4, 37, 7, 65, 21, 1 }, + { 0, 6, 42, 7, 61, 18, 1 }, + { 0, 7, 47, 7, 59, 14, 1 }, + { 0, 9, 51, 7, 56, 12, 0 } } }, + .ptrn_arr = { { 0x48484849, 0x42424248, 0x12124242, 0x92121212, + 0x90909090, 0x84848490, 0x24248484, 0x242424 } }, + .sample_patrn_length = 250, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 94) = 0.253968 */ + .hor_phase_arr = { + .even = { { 3, 29, 64, 7, 29, 3, 0 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 4, 35, 7, 64, 23, 2 }, + { 0, 5, 38, 7, 63, 21, 1 }, + { 0, 5, 41, 7, 63, 18, 1 }, + { 0, 7, 44, 7, 60, 16, 1 }, + { 0, 8, 47, 7, 58, 14, 1 }, + { 0, 9, 50, 7, 56, 12, 1 }, + { 0, 11, 53, 7, 53, 11, 0 }, + { 1, 12, 56, 7, 50, 9, 0 }, + { 1, 14, 58, 7, 47, 8, 0 }, + { 1, 16, 60, 7, 44, 7, 0 }, + { 1, 18, 63, 7, 41, 5, 0 }, + { 1, 21, 63, 7, 38, 5, 0 }, + { 2, 23, 64, 7, 35, 4, 0 }, + { 2, 26, 65, 7, 32, 3, 0 } }, + .odd = { { 0, 11, 55, 7, 52, 10, 0 }, + { 1, 13, 57, 7, 49, 8, 0 }, + { 1, 15, 59, 7, 46, 7, 0 }, + { 1, 17, 61, 7, 43, 6, 0 }, + { 1, 20, 62, 7, 40, 5, 0 }, + { 2, 22, 63, 7, 37, 4, 0 }, + { 2, 25, 65, 7, 33, 3, 0 }, + { 2, 28, 65, 7, 30, 3, 0 }, + { 0, 3, 30, 7, 65, 28, 2 }, + { 0, 3, 33, 7, 65, 25, 2 }, + { 0, 4, 37, 7, 63, 22, 2 }, + { 0, 5, 40, 7, 62, 20, 1 }, + { 0, 6, 43, 7, 61, 17, 1 }, + { 0, 7, 46, 7, 59, 15, 1 }, + { 0, 8, 49, 7, 57, 13, 1 }, + { 0, 10, 52, 7, 55, 11, 0 } } }, + .ver_phase_arr = { + .even = { { 3, 29, 64, 7, 29, 3, 0 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 4, 35, 7, 64, 23, 2 }, + { 0, 5, 38, 7, 63, 21, 1 }, + { 0, 5, 41, 7, 63, 18, 1 }, + { 0, 7, 44, 7, 60, 16, 1 }, + { 0, 8, 47, 7, 58, 14, 1 }, + { 0, 9, 50, 7, 56, 12, 1 }, + { 0, 11, 53, 7, 53, 11, 0 }, + { 1, 12, 56, 7, 50, 9, 0 }, + { 1, 14, 58, 7, 47, 8, 0 }, + { 1, 16, 60, 7, 44, 7, 0 }, + { 1, 18, 63, 7, 41, 5, 0 }, + { 1, 21, 63, 7, 38, 5, 0 }, + { 2, 23, 64, 7, 35, 4, 0 }, + { 2, 26, 65, 7, 32, 3, 0 } }, + .odd = { { 0, 11, 55, 7, 52, 10, 0 }, + { 1, 13, 57, 7, 49, 8, 0 }, + { 1, 15, 59, 7, 46, 7, 0 }, + { 1, 17, 61, 7, 43, 6, 0 }, + { 1, 20, 62, 7, 40, 5, 0 }, + { 2, 22, 63, 7, 37, 4, 0 }, + { 2, 25, 65, 7, 33, 3, 0 }, + { 2, 28, 65, 7, 30, 3, 0 }, + { 0, 3, 30, 7, 65, 28, 2 }, + { 0, 3, 33, 7, 65, 25, 2 }, + { 0, 4, 37, 7, 63, 22, 2 }, + { 0, 5, 40, 7, 62, 20, 1 }, + { 0, 6, 43, 7, 61, 17, 1 }, + { 0, 7, 46, 7, 59, 15, 1 }, + { 0, 8, 49, 7, 57, 13, 1 }, + { 0, 10, 52, 7, 55, 11, 0 } } }, + .ptrn_arr = { { 0x48484849, 0x48484848, 0x42424242, 0x2424242 } }, + .sample_patrn_length = 126, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 95) = 0.251969 */ + .hor_phase_arr = { + .even = { { 3, 29, 64, 7, 29, 3, 0 }, + { 0, 3, 31, 7, 64, 28, 2 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 4, 34, 7, 63, 25, 2 }, + { 0, 4, 35, 7, 63, 24, 2 }, + { 0, 4, 37, 7, 63, 22, 2 }, + { 0, 5, 38, 7, 63, 21, 1 }, + { 0, 5, 40, 7, 62, 20, 1 }, + { 0, 6, 41, 7, 61, 19, 1 }, + { 0, 6, 43, 7, 61, 17, 1 }, + { 0, 7, 44, 7, 60, 16, 1 }, + { 0, 7, 46, 7, 59, 15, 1 }, + { 0, 8, 47, 7, 58, 14, 1 }, + { 0, 9, 49, 7, 56, 13, 1 }, + { 0, 9, 50, 7, 56, 12, 1 }, + { 0, 10, 51, 7, 54, 12, 1 }, + { 0, 11, 53, 7, 53, 11, 0 }, + { 1, 12, 54, 7, 51, 10, 0 }, + { 1, 12, 56, 7, 50, 9, 0 }, + { 1, 13, 56, 7, 49, 9, 0 }, + { 1, 14, 58, 7, 47, 8, 0 }, + { 1, 15, 59, 7, 46, 7, 0 }, + { 1, 16, 60, 7, 44, 7, 0 }, + { 1, 17, 61, 7, 43, 6, 0 }, + { 1, 19, 61, 7, 41, 6, 0 }, + { 1, 20, 62, 7, 40, 5, 0 }, + { 1, 21, 63, 7, 38, 5, 0 }, + { 2, 22, 63, 7, 37, 4, 0 }, + { 2, 24, 63, 7, 35, 4, 0 }, + { 2, 25, 63, 7, 34, 4, 0 }, + { 2, 26, 65, 7, 32, 3, 0 }, + { 2, 28, 64, 7, 31, 3, 0 } }, + .odd = { { 0, 11, 55, 7, 52, 10, 0 }, + { 1, 12, 54, 7, 51, 10, 0 }, + { 1, 13, 56, 7, 49, 9, 0 }, + { 1, 14, 57, 7, 48, 8, 0 }, + { 1, 15, 58, 7, 46, 8, 0 }, + { 1, 16, 59, 7, 45, 7, 0 }, + { 1, 17, 61, 7, 43, 6, 0 }, + { 1, 18, 61, 7, 42, 6, 0 }, + { 1, 19, 63, 7, 40, 5, 0 }, + { 1, 20, 63, 7, 39, 5, 0 }, + { 2, 22, 62, 7, 37, 5, 0 }, + { 2, 23, 63, 7, 36, 4, 0 }, + { 2, 24, 64, 7, 34, 4, 0 }, + { 2, 26, 64, 7, 33, 3, 0 }, + { 2, 27, 65, 7, 31, 3, 0 }, + { 3, 28, 64, 7, 30, 3, 0 }, + { 0, 3, 30, 7, 64, 28, 3 }, + { 0, 3, 31, 7, 65, 27, 2 }, + { 0, 3, 33, 7, 64, 26, 2 }, + { 0, 4, 34, 7, 64, 24, 2 }, + { 0, 4, 36, 7, 63, 23, 2 }, + { 0, 5, 37, 7, 62, 22, 2 }, + { 0, 5, 39, 7, 63, 20, 1 }, + { 0, 5, 40, 7, 63, 19, 1 }, + { 0, 6, 42, 7, 61, 18, 1 }, + { 0, 6, 43, 7, 61, 17, 1 }, + { 0, 7, 45, 7, 59, 16, 1 }, + { 0, 8, 46, 7, 58, 15, 1 }, + { 0, 8, 48, 7, 57, 14, 1 }, + { 0, 9, 49, 7, 56, 13, 1 }, + { 0, 10, 51, 7, 54, 12, 1 }, + { 0, 10, 52, 7, 55, 11, 0 } } }, + .ver_phase_arr = { + .even = { { 3, 29, 64, 7, 29, 3, 0 }, + { 0, 3, 31, 7, 64, 28, 2 }, + { 0, 3, 32, 7, 65, 26, 2 }, + { 0, 4, 34, 7, 63, 25, 2 }, + { 0, 4, 35, 7, 63, 24, 2 }, + { 0, 4, 37, 7, 63, 22, 2 }, + { 0, 5, 38, 7, 63, 21, 1 }, + { 0, 5, 40, 7, 62, 20, 1 }, + { 0, 6, 41, 7, 61, 19, 1 }, + { 0, 6, 43, 7, 61, 17, 1 }, + { 0, 7, 44, 7, 60, 16, 1 }, + { 0, 7, 46, 7, 59, 15, 1 }, + { 0, 8, 47, 7, 58, 14, 1 }, + { 0, 9, 49, 7, 56, 13, 1 }, + { 0, 9, 50, 7, 56, 12, 1 }, + { 0, 10, 51, 7, 54, 12, 1 }, + { 0, 11, 53, 7, 53, 11, 0 }, + { 1, 12, 54, 7, 51, 10, 0 }, + { 1, 12, 56, 7, 50, 9, 0 }, + { 1, 13, 56, 7, 49, 9, 0 }, + { 1, 14, 58, 7, 47, 8, 0 }, + { 1, 15, 59, 7, 46, 7, 0 }, + { 1, 16, 60, 7, 44, 7, 0 }, + { 1, 17, 61, 7, 43, 6, 0 }, + { 1, 19, 61, 7, 41, 6, 0 }, + { 1, 20, 62, 7, 40, 5, 0 }, + { 1, 21, 63, 7, 38, 5, 0 }, + { 2, 22, 63, 7, 37, 4, 0 }, + { 2, 24, 63, 7, 35, 4, 0 }, + { 2, 25, 63, 7, 34, 4, 0 }, + { 2, 26, 65, 7, 32, 3, 0 }, + { 2, 28, 64, 7, 31, 3, 0 } }, + .odd = { { 0, 11, 55, 7, 52, 10, 0 }, + { 1, 12, 54, 7, 51, 10, 0 }, + { 1, 13, 56, 7, 49, 9, 0 }, + { 1, 14, 57, 7, 48, 8, 0 }, + { 1, 15, 58, 7, 46, 8, 0 }, + { 1, 16, 59, 7, 45, 7, 0 }, + { 1, 17, 61, 7, 43, 6, 0 }, + { 1, 18, 61, 7, 42, 6, 0 }, + { 1, 19, 63, 7, 40, 5, 0 }, + { 1, 20, 63, 7, 39, 5, 0 }, + { 2, 22, 62, 7, 37, 5, 0 }, + { 2, 23, 63, 7, 36, 4, 0 }, + { 2, 24, 64, 7, 34, 4, 0 }, + { 2, 26, 64, 7, 33, 3, 0 }, + { 2, 27, 65, 7, 31, 3, 0 }, + { 3, 28, 64, 7, 30, 3, 0 }, + { 0, 3, 30, 7, 64, 28, 3 }, + { 0, 3, 31, 7, 65, 27, 2 }, + { 0, 3, 33, 7, 64, 26, 2 }, + { 0, 4, 34, 7, 64, 24, 2 }, + { 0, 4, 36, 7, 63, 23, 2 }, + { 0, 5, 37, 7, 62, 22, 2 }, + { 0, 5, 39, 7, 63, 20, 1 }, + { 0, 5, 40, 7, 63, 19, 1 }, + { 0, 6, 42, 7, 61, 18, 1 }, + { 0, 6, 43, 7, 61, 17, 1 }, + { 0, 7, 45, 7, 59, 16, 1 }, + { 0, 8, 46, 7, 58, 15, 1 }, + { 0, 8, 48, 7, 57, 14, 1 }, + { 0, 9, 49, 7, 56, 13, 1 }, + { 0, 10, 51, 7, 54, 12, 1 }, + { 0, 10, 52, 7, 55, 11, 0 } } }, + .ptrn_arr = { { 0x48484849, 0x48484848, 0x48484848, 0x48484848, + 0x42424242, 0x42424242, 0x42424242, 0x2424242 } }, + .sample_patrn_length = 254, + .hor_ds_en = 1, + .ver_ds_en = 1 +}, { + /* Scale factor 32 / (32 + 96) = 0.25 */ + .hor_phase_arr = { + .even = { { 3, 29, 64, 7, 29, 3, 0 } }, + .odd = { { 0, 11, 53, 7, 53, 11, 0 } } }, + .ver_phase_arr = { + .even = { { 3, 29, 64, 7, 29, 3, 0 } }, + .odd = { { 0, 11, 53, 7, 53, 11, 0 } } }, + .ptrn_arr = { { 0x9 } }, + .sample_patrn_length = 8, + .hor_ds_en = 1, + .ver_ds_en = 1 +} }; + +const s32 imgu_css_downscale_4taps[IMGU_SCALER_DOWNSCALE_4TAPS_LEN] = { + IMGU_SCALER_FP * -0.000000000000000, + IMGU_SCALER_FP * -0.000249009327023, + IMGU_SCALER_FP * -0.001022241683322, + IMGU_SCALER_FP * -0.002352252699175, + IMGU_SCALER_FP * -0.004261594242362, + IMGU_SCALER_FP * -0.006761648795689, + IMGU_SCALER_FP * -0.009851589454154, + IMGU_SCALER_FP * -0.013517488475013, + IMGU_SCALER_FP * -0.017731595701026, + IMGU_SCALER_FP * -0.022451806160682, + IMGU_SCALER_FP * -0.027621333752351, + IMGU_SCALER_FP * -0.033168605172067, + IMGU_SCALER_FP * -0.039007385183627, + IMGU_SCALER_FP * -0.045037140997445, + IMGU_SCALER_FP * -0.051143649969349, + IMGU_SCALER_FP * -0.057199851105019, + IMGU_SCALER_FP * -0.063066937016941, + IMGU_SCALER_FP * -0.068595679088417, + IMGU_SCALER_FP * -0.073627974715370, + IMGU_SCALER_FP * -0.077998601684588, + IMGU_SCALER_FP * -0.081537161069780, + IMGU_SCALER_FP * -0.084070186546763, + IMGU_SCALER_FP * -0.085423394806327, + IMGU_SCALER_FP * -0.085424048835192, + IMGU_SCALER_FP * -0.083903403294908, + IMGU_SCALER_FP * -0.080699199103829, + IMGU_SCALER_FP * -0.075658172660608, + IMGU_SCALER_FP * -0.068638543974523, + IMGU_SCALER_FP * -0.059512447316781, + IMGU_SCALER_FP * -0.048168267897836, + IMGU_SCALER_FP * -0.034512848520921, + IMGU_SCALER_FP * -0.018473531164409, + IMGU_SCALER_FP * 0.000000000000000, + IMGU_SCALER_FP * 0.020934105554674, + IMGU_SCALER_FP * 0.044329836544650, + IMGU_SCALER_FP * 0.070161864654994, + IMGU_SCALER_FP * 0.098377719033862, + IMGU_SCALER_FP * 0.128897348012514, + IMGU_SCALER_FP * 0.161613019706978, + IMGU_SCALER_FP * 0.196389570939079, + IMGU_SCALER_FP * 0.233065009152522, + IMGU_SCALER_FP * 0.271451467092549, + IMGU_SCALER_FP * 0.311336505037934, + IMGU_SCALER_FP * 0.352484750396743, + IMGU_SCALER_FP * 0.394639859577736, + IMGU_SCALER_FP * 0.437526782302744, + IMGU_SCALER_FP * 0.480854304005320, + IMGU_SCALER_FP * 0.524317837738108, + IMGU_SCALER_FP * 0.567602433152471, + IMGU_SCALER_FP * 0.610385966680669, + IMGU_SCALER_FP * 0.652342474098843, + IMGU_SCALER_FP * 0.693145584226952, + IMGU_SCALER_FP * 0.732472010670320, + IMGU_SCALER_FP * 0.770005057258970, + IMGU_SCALER_FP * 0.805438092218553, + IMGU_SCALER_FP * 0.838477946124244, + IMGU_SCALER_FP * 0.868848189350256, + IMGU_SCALER_FP * 0.896292246026874, + IMGU_SCALER_FP * 0.920576303438191, + IMGU_SCALER_FP * 0.941491978311745, + IMGU_SCALER_FP * 0.958858704531378, + IMGU_SCALER_FP * 0.972525810403401, + IMGU_SCALER_FP * 0.982374257672165, + IMGU_SCALER_FP * 0.988318018955586, + IMGU_SCALER_FP * 0.990305075088925, + IMGU_SCALER_FP * 0.988318018955586, + IMGU_SCALER_FP * 0.982374257672165, + IMGU_SCALER_FP * 0.972525810403401, + IMGU_SCALER_FP * 0.958858704531378, + IMGU_SCALER_FP * 0.941491978311745, + IMGU_SCALER_FP * 0.920576303438191, + IMGU_SCALER_FP * 0.896292246026874, + IMGU_SCALER_FP * 0.868848189350256, + IMGU_SCALER_FP * 0.838477946124244, + IMGU_SCALER_FP * 0.805438092218553, + IMGU_SCALER_FP * 0.770005057258970, + IMGU_SCALER_FP * 0.732472010670320, + IMGU_SCALER_FP * 0.693145584226952, + IMGU_SCALER_FP * 0.652342474098843, + IMGU_SCALER_FP * 0.610385966680669, + IMGU_SCALER_FP * 0.567602433152471, + IMGU_SCALER_FP * 0.524317837738108, + IMGU_SCALER_FP * 0.480854304005320, + IMGU_SCALER_FP * 0.437526782302744, + IMGU_SCALER_FP * 0.394639859577736, + IMGU_SCALER_FP * 0.352484750396743, + IMGU_SCALER_FP * 0.311336505037934, + IMGU_SCALER_FP * 0.271451467092549, + IMGU_SCALER_FP * 0.233065009152522, + IMGU_SCALER_FP * 0.196389570939079, + IMGU_SCALER_FP * 0.161613019706978, + IMGU_SCALER_FP * 0.128897348012514, + IMGU_SCALER_FP * 0.098377719033862, + IMGU_SCALER_FP * 0.070161864654994, + IMGU_SCALER_FP * 0.044329836544650, + IMGU_SCALER_FP * 0.020934105554674, + IMGU_SCALER_FP * 0.000000000000000, + IMGU_SCALER_FP * -0.018473531164409, + IMGU_SCALER_FP * -0.034512848520921, + IMGU_SCALER_FP * -0.048168267897836, + IMGU_SCALER_FP * -0.059512447316781, + IMGU_SCALER_FP * -0.068638543974523, + IMGU_SCALER_FP * -0.075658172660608, + IMGU_SCALER_FP * -0.080699199103829, + IMGU_SCALER_FP * -0.083903403294908, + IMGU_SCALER_FP * -0.085424048835192, + IMGU_SCALER_FP * -0.085423394806327, + IMGU_SCALER_FP * -0.084070186546763, + IMGU_SCALER_FP * -0.081537161069780, + IMGU_SCALER_FP * -0.077998601684588, + IMGU_SCALER_FP * -0.073627974715370, + IMGU_SCALER_FP * -0.068595679088417, + IMGU_SCALER_FP * -0.063066937016941, + IMGU_SCALER_FP * -0.057199851105019, + IMGU_SCALER_FP * -0.051143649969349, + IMGU_SCALER_FP * -0.045037140997445, + IMGU_SCALER_FP * -0.039007385183627, + IMGU_SCALER_FP * -0.033168605172067, + IMGU_SCALER_FP * -0.027621333752351, + IMGU_SCALER_FP * -0.022451806160682, + IMGU_SCALER_FP * -0.017731595701026, + IMGU_SCALER_FP * -0.013517488475013, + IMGU_SCALER_FP * -0.009851589454154, + IMGU_SCALER_FP * -0.006761648795689, + IMGU_SCALER_FP * -0.004261594242362, + IMGU_SCALER_FP * -0.002352252699175, + IMGU_SCALER_FP * -0.001022241683322, + IMGU_SCALER_FP * -0.000249009327023 +}; + +const s32 imgu_css_downscale_2taps[IMGU_SCALER_DOWNSCALE_2TAPS_LEN] = { + IMGU_SCALER_FP * 0.074300676367033, + IMGU_SCALER_FP * 0.094030234498392, + IMGU_SCALER_FP * 0.115522859526596, + IMGU_SCALER_FP * 0.138778551451644, + IMGU_SCALER_FP * 0.163629399140505, + IMGU_SCALER_FP * 0.190075402593178, + IMGU_SCALER_FP * 0.217864695110113, + IMGU_SCALER_FP * 0.247081232257828, + IMGU_SCALER_FP * 0.277389191770256, + IMGU_SCALER_FP * 0.308704618080881, + IMGU_SCALER_FP * 0.340859600056670, + IMGU_SCALER_FP * 0.373602270998074, + IMGU_SCALER_FP * 0.406848675338577, + IMGU_SCALER_FP * 0.440346946378629, + IMGU_SCALER_FP * 0.473845217418681, + IMGU_SCALER_FP * 0.507091621759184, + IMGU_SCALER_FP * 0.540002203833621, + IMGU_SCALER_FP * 0.572157185809410, + IMGU_SCALER_FP * 0.603472612120036, + IMGU_SCALER_FP * 0.633612660499431, + IMGU_SCALER_FP * 0.662493375381080, + IMGU_SCALER_FP * 0.689778934498917, + IMGU_SCALER_FP * 0.715301426719909, + IMGU_SCALER_FP * 0.738892940911023, + IMGU_SCALER_FP * 0.760385565939227, + IMGU_SCALER_FP * 0.779527435104971, + IMGU_SCALER_FP * 0.796234592841739, + IMGU_SCALER_FP * 0.810339128016497, + IMGU_SCALER_FP * 0.821841040629247, + IMGU_SCALER_FP * 0.830488463980438, + IMGU_SCALER_FP * 0.836281398070072, + IMGU_SCALER_FP * 0.839219842898146, + IMGU_SCALER_FP * 0.839219842898146, + IMGU_SCALER_FP * 0.836281398070072, + IMGU_SCALER_FP * 0.830488463980438, + IMGU_SCALER_FP * 0.821841040629247, + IMGU_SCALER_FP * 0.810339128016497, + IMGU_SCALER_FP * 0.796234592841739, + IMGU_SCALER_FP * 0.779527435104971, + IMGU_SCALER_FP * 0.760385565939227, + IMGU_SCALER_FP * 0.738892940911023, + IMGU_SCALER_FP * 0.715301426719909, + IMGU_SCALER_FP * 0.689778934498917, + IMGU_SCALER_FP * 0.662493375381080, + IMGU_SCALER_FP * 0.633612660499431, + IMGU_SCALER_FP * 0.603472612120036, + IMGU_SCALER_FP * 0.572157185809410, + IMGU_SCALER_FP * 0.540002203833621, + IMGU_SCALER_FP * 0.507091621759184, + IMGU_SCALER_FP * 0.473845217418681, + IMGU_SCALER_FP * 0.440346946378629, + IMGU_SCALER_FP * 0.406848675338577, + IMGU_SCALER_FP * 0.373602270998074, + IMGU_SCALER_FP * 0.340859600056670, + IMGU_SCALER_FP * 0.308704618080881, + IMGU_SCALER_FP * 0.277389191770256, + IMGU_SCALER_FP * 0.247081232257828, + IMGU_SCALER_FP * 0.217864695110113, + IMGU_SCALER_FP * 0.190075402593178, + IMGU_SCALER_FP * 0.163629399140505, + IMGU_SCALER_FP * 0.138778551451644, + IMGU_SCALER_FP * 0.115522859526596, + IMGU_SCALER_FP * 0.094030234498392, + IMGU_SCALER_FP * 0.074300676367033 +}; + +/* settings for Geometric Distortion Correction */ +const s16 imgu_css_gdc_lut[4][256] = { { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -3, -3, -3, -4, -4, -4, -5, -5, -5, -6, -6, -7, -7, -7, -8, -8, + -9, -9, -10, -10, -11, -11, -12, -12, -13, -13, -14, -14, -15, -15, + -16, -16, -17, -17, -18, -19, -19, -20, -20, -21, -22, -22, -23, -24, + -24, -25, -25, -26, -27, -27, -28, -29, -29, -30, -31, -31, -32, -33, + -33, -34, -35, -35, -36, -37, -37, -38, -39, -39, -40, -41, -41, -42, + -43, -43, -44, -45, -45, -46, -46, -47, -48, -48, -49, -50, -50, -51, + -52, -52, -53, -53, -54, -55, -55, -56, -56, -57, -58, -58, -59, -59, + -60, -60, -61, -61, -62, -62, -63, -64, -64, -64, -65, -65, -66, -66, + -67, -67, -68, -68, -68, -69, -69, -70, -70, -70, -71, -71, -71, -72, + -72, -72, -73, -73, -73, -73, -74, -74, -74, -74, -74, -75, -75, -75, + -75, -75, -75, -75, -75, -75, -75, -75, -75, -75, -75, -75, -75, -75, + -75, -75, -75, -75, -74, -74, -74, -74, -74, -73, -73, -73, -73, -72, + -72, -72, -71, -71, -70, -70, -69, -69, -68, -68, -67, -67, -66, -66, + -65, -64, -64, -63, -62, -61, -61, -60, -59, -58, -57, -56, -56, -55, + -54, -53, -52, -51, -50, -49, -47, -46, -45, -44, -43, -41, -40, -39, + -38, -36, -35, -33, -32, -31, -29, -28, -26, -25, -23, -21, -20, -18, + -16, -15, -13, -11, -9, -7, -5, -3, -1 +}, { + 0, 2, 4, 6, 8, 10, 13, 15, 17, 20, 23, 25, 28, 31, 33, 36, 39, 42, 45, + 48, 51, 54, 58, 61, 64, 68, 71, 74, 78, 82, 85, 89, 93, 96, 100, 104, + 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 162, + 166, 171, 175, 180, 184, 189, 193, 198, 203, 207, 212, 217, 222, 227, + 232, 236, 241, 246, 251, 256, 261, 266, 271, 276, 282, 287, 292, 297, + 302, 307, 313, 318, 323, 328, 334, 339, 344, 350, 355, 360, 366, 371, + 377, 382, 388, 393, 399, 404, 409, 415, 420, 426, 431, 437, 443, 448, + 454, 459, 465, 470, 476, 481, 487, 492, 498, 504, 509, 515, 520, 526, + 531, 537, 542, 548, 553, 559, 564, 570, 576, 581, 586, 592, 597, 603, + 608, 614, 619, 625, 630, 635, 641, 646, 651, 657, 662, 667, 673, 678, + 683, 688, 694, 699, 704, 709, 714, 719, 724, 729, 735, 740, 745, 749, + 754, 759, 764, 769, 774, 779, 783, 788, 793, 797, 802, 807, 811, 816, + 820, 825, 829, 834, 838, 842, 847, 851, 855, 859, 863, 868, 872, 876, + 880, 884, 888, 891, 895, 899, 903, 906, 910, 914, 917, 921, 924, 927, + 931, 934, 937, 940, 944, 947, 950, 953, 956, 959, 961, 964, 967, 970, + 972, 975, 977, 980, 982, 984, 987, 989, 991, 993, 995, 997, 999, 1001, + 1002, 1004, 1006, 1007, 1009, 1010, 1011, 1013, 1014, 1015, 1016, 1017, + 1018, 1019, 1020, 1020, 1021, 1022, 1022, 1023, 1023, 1023, 1023, 1023 +}, { + 1024, 1023, 1023, 1023, 1023, 1023, 1022, 1022, 1021, 1020, 1020, 1019, + 1018, 1017, 1016, 1015, 1014, 1013, 1011, 1010, 1009, 1007, 1006, 1004, + 1002, 1001, 999, 997, 995, 993, 991, 989, 987, 984, 982, 980, 977, 975, + 972, 970, 967, 964, 961, 959, 956, 953, 950, 947, 944, 940, 937, 934, + 931, 927, 924, 921, 917, 914, 910, 906, 903, 899, 895, 891, 888, 884, + 880, 876, 872, 868, 863, 859, 855, 851, 847, 842, 838, 834, 829, 825, + 820, 816, 811, 807, 802, 797, 793, 788, 783, 779, 774, 769, 764, 759, + 754, 749, 745, 740, 735, 729, 724, 719, 714, 709, 704, 699, 694, 688, + 683, 678, 673, 667, 662, 657, 651, 646, 641, 635, 630, 625, 619, 614, + 608, 603, 597, 592, 586, 581, 576, 570, 564, 559, 553, 548, 542, 537, + 531, 526, 520, 515, 509, 504, 498, 492, 487, 481, 476, 470, 465, 459, + 454, 448, 443, 437, 431, 426, 420, 415, 409, 404, 399, 393, 388, 382, + 377, 371, 366, 360, 355, 350, 344, 339, 334, 328, 323, 318, 313, 307, + 302, 297, 292, 287, 282, 276, 271, 266, 261, 256, 251, 246, 241, 236, + 232, 227, 222, 217, 212, 207, 203, 198, 193, 189, 184, 180, 175, 171, + 166, 162, 157, 153, 149, 144, 140, 136, 132, 128, 124, 120, 116, 112, + 108, 104, 100, 96, 93, 89, 85, 82, 78, 74, 71, 68, 64, 61, 58, 54, 51, + 48, 45, 42, 39, 36, 33, 31, 28, 25, 23, 20, 17, 15, 13, 10, 8, 6, 4, 2 +}, { + 0, -1, -3, -5, -7, -9, -11, -13, -14, -16, -19, -20, -21, -23, -24, -26, + -28, -29, -30, -32, -34, -34, -37, -38, -38, -41, -42, -42, -44, -46, + -46, -48, -49, -49, -51, -52, -53, -54, -55, -56, -57, -57, -58, -59, + -60, -60, -62, -62, -63, -63, -64, -65, -66, -66, -67, -68, -67, -69, + -69, -69, -70, -70, -71, -71, -72, -72, -72, -73, -73, -73, -73, -73, + -73, -74, -75, -74, -75, -75, -74, -75, -75, -75, -75, -75, -75, -75, + -75, -75, -75, -75, -75, -75, -75, -74, -75, -74, -75, -75, -74, -74, + -73, -73, -73, -73, -73, -73, -73, -71, -72, -71, -72, -70, -70, -70, + -69, -70, -69, -68, -68, -68, -67, -67, -66, -66, -65, -65, -64, -64, + -64, -63, -62, -62, -61, -61, -60, -60, -59, -59, -58, -58, -57, -57, + -55, -55, -55, -53, -54, -53, -52, -51, -52, -50, -50, -49, -48, -47, + -46, -46, -46, -46, -45, -43, -43, -42, -42, -41, -41, -40, -39, -39, + -38, -37, -37, -36, -35, -35, -34, -33, -32, -32, -31, -31, -31, -29, + -28, -27, -27, -27, -26, -25, -25, -24, -24, -23, -22, -22, -21, -20, + -20, -20, -18, -19, -17, -17, -16, -16, -15, -14, -14, -14, -14, -12, + -12, -12, -11, -11, -11, -10, -9, -9, -8, -8, -7, -6, -7, -7, -6, -6, + -5, -4, -5, -5, -3, -3, -4, -2, -3, -2, -1, -2, -1, -1, 0, -1, -1, 0, + -1, 0, 1, 0, 0, 0, 0, 0, 0, 0 +} }; + +const struct imgu_css_xnr3_vmem_defaults imgu_css_xnr3_vmem_defaults = { + .x = { + 1024, 1164, 1320, 1492, 1680, 1884, 2108, 2352, + 2616, 2900, 3208, 3540, 3896, 4276, 4684, 5120 + }, + .a = { + -7213, -5580, -4371, -3421, -2722, -2159, -6950, -5585, + -4529, -3697, -3010, -2485, -2070, -1727, -1428, 0 + }, + .b = { + 4096, 3603, 3178, 2811, 2497, 2226, 1990, 1783, + 1603, 1446, 1307, 1185, 1077, 981, 895, 819 + }, + .c = { + 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 + }, +}; + +/* settings for Bayer Noise Reduction */ +const struct ipu3_uapi_bnr_static_config imgu_css_bnr_defaults = { + { 16, 16, 16, 16 }, /* wb_gains */ + { 16, 16, 16, 16 }, /* wb_gains_thr */ + { 0, X, 8, 6, X, 14 }, /* thr_coeffs */ + { 0, 0, 0, 0 }, /* thr_ctrl_shd */ + { -128, X, -128, X }, /* opt_center */ + { /* lut */ + { 17, 23, 28, 32, 36, 39, 42, 45, + 48, 51, 53, 55, 58, 60, 62, 64, + 66, 68, 70, 72, 73, 75, 77, 78, + 80, 82, 83, 85, 86, 88, 89, 90 } + }, + { 4, X, 1, 8, X, 8, X, 8, X }, /* bp_ctrl */ + { 8, 4, 4, X, 8, X, 1, 1, 1, 1 }, /* dn_detect_ctrl */ +}; + +const struct ipu3_uapi_dm_config imgu_css_dm_defaults = { + 1, 1, 1, X, X, 8, X, 7, X, 8, X, 8, X, 4, X +}; + +const struct ipu3_uapi_ccm_mat_config imgu_css_ccm_defaults = { + 9775, -2671, 1087, 0, + -1071, 8303, 815, 0, + -23, -7887, 16103, 0 +}; + +/* settings for Gamma correction */ +const struct ipu3_uapi_gamma_corr_lut imgu_css_gamma_lut = { { + 63, 79, 95, 111, 127, 143, 159, 175, 191, 207, 223, 239, 255, 271, 287, + 303, 319, 335, 351, 367, 383, 399, 415, 431, 447, 463, 479, 495, 511, + 527, 543, 559, 575, 591, 607, 623, 639, 655, 671, 687, 703, 719, 735, + 751, 767, 783, 799, 815, 831, 847, 863, 879, 895, 911, 927, 943, 959, + 975, 991, 1007, 1023, 1039, 1055, 1071, 1087, 1103, 1119, 1135, 1151, + 1167, 1183, 1199, 1215, 1231, 1247, 1263, 1279, 1295, 1311, 1327, 1343, + 1359, 1375, 1391, 1407, 1423, 1439, 1455, 1471, 1487, 1503, 1519, 1535, + 1551, 1567, 1583, 1599, 1615, 1631, 1647, 1663, 1679, 1695, 1711, 1727, + 1743, 1759, 1775, 1791, 1807, 1823, 1839, 1855, 1871, 1887, 1903, 1919, + 1935, 1951, 1967, 1983, 1999, 2015, 2031, 2047, 2063, 2079, 2095, 2111, + 2143, 2175, 2207, 2239, 2271, 2303, 2335, 2367, 2399, 2431, 2463, 2495, + 2527, 2559, 2591, 2623, 2655, 2687, 2719, 2751, 2783, 2815, 2847, 2879, + 2911, 2943, 2975, 3007, 3039, 3071, 3103, 3135, 3167, 3199, 3231, 3263, + 3295, 3327, 3359, 3391, 3423, 3455, 3487, 3519, 3551, 3583, 3615, 3647, + 3679, 3711, 3743, 3775, 3807, 3839, 3871, 3903, 3935, 3967, 3999, 4031, + 4063, 4095, 4127, 4159, 4223, 4287, 4351, 4415, 4479, 4543, 4607, 4671, + 4735, 4799, 4863, 4927, 4991, 5055, 5119, 5183, 5247, 5311, 5375, 5439, + 5503, 5567, 5631, 5695, 5759, 5823, 5887, 5951, 6015, 6079, 6143, 6207, + 6271, 6335, 6399, 6463, 6527, 6591, 6655, 6719, 6783, 6847, 6911, 6975, + 7039, 7103, 7167, 7231, 7295, 7359, 7423, 7487, 7551, 7615, 7679, 7743, + 7807, 7871, 7935, 7999, 8063, 8127, 8191 +} }; + +const struct ipu3_uapi_csc_mat_config imgu_css_csc_defaults = { + 4898, 9617, 1867, 0, + -2410, -4732, 7143, 0, + 10076, -8437, -1638, 0 +}; + +const struct ipu3_uapi_cds_params imgu_css_cds_defaults = { + 1, 3, 3, 1, + 1, 3, 3, 1, + 4, X, /* ds_nf */ + 1, /* csc_en */ + 0, X /* uv_bin_output */ +}; + +const struct ipu3_uapi_shd_config_static imgu_css_shd_defaults = { + .grid = { + .width = 73, + .height = 55, + .block_width_log2 = 7, + .block_height_log2 = 7, + .x_start = 0, + .y_start = 0, + }, + .general = { + .shd_enable = 1, + .gain_factor = 0, + }, + .black_level = { + .bl_r = 0, + .bl_gr = 0 | (0 << IPU3_UAPI_SHD_BLGR_NF_SHIFT), + .bl_gb = 0, + .bl_b = 0, + }, +}; + +const struct ipu3_uapi_yuvp1_iefd_config imgu_css_iefd_defaults = { + .units = { + .cu_1 = { 0, 150, 7, 0 }, + .cu_ed = { 7, 110, 244, X, 307, 409, 511, X, + 184, 255, 255, X, 0, 0, X, + 7, 81, 255, X, 255, 255, X }, + .cu_3 = { 148, 251, 10, 0 }, + .cu_5 = { 25, 70, 501, X, 32, X }, + .cu_6 = { 32, 63, 183, X, 397, + 33, 0, X, 0, + 0, 64, X, 64, X }, + .cu_7 = { 200, 303, + 10, 0 }, + .cu_unsharp = { 10, 64, 110, X, 511, + 66, 12, X, 0, + 0, 56, X, 64, X }, + .cu_radial = { 6, 203, 255, 255, 255, 255, X, + 84, 444, 397, 288, 300, X, + 4, 69, 207, X, 369, 448, X }, + .cu_vssnlm = { 61, 100, 25, 0} + }, + .config = { 45, X, 0, X, 16, X, 45, X }, + .control = { 1, 1, 1, 1, 1, X }, + .sharp = { { 50, X, 511, X, 50, X, 50, X }, + { 64, X, 0, X, 0, X}, + { 56, X, 56, X } }, + .unsharp = { { 36, 17, 8, X }, + { 13, 7, 3, X } }, + .rad = { { -2104, X, -1559, X }, + { 4426816, X }, + { 2430481, X }, + { 6, X, 79, X }, + { 64, 0, 0, X }, + { 1, X, 2, X, 0, X, 0, X }, + { 40, X, 62, X } }, + .vsslnm = { { 16, 32, 64, X }, + { 1, X, 2, X, 8, X } }, +}; + +const struct ipu3_uapi_yuvp1_yds_config imgu_css_yds_defaults = { + 0, 1, 1, 0, 0, 1, 1, 0, 2, X, 0, X +}; + +const struct ipu3_uapi_yuvp1_chnr_config imgu_css_chnr_defaults = { + .coring = { 0, X, 0, X }, + .sense_gain = { 6, 6, 6, X, 4, 4, 4, X }, + .iir_fir = { 8, X, 12, X, 0, 256 - 127, X }, +}; + +const struct ipu3_uapi_yuvp1_y_ee_nr_config imgu_css_y_ee_nr_defaults = { + .lpf = { 4, X, 8, X, 16, X, 0 }, + .sense = { 8191, X, 0, X, 8191, X, 0, X }, + .gain = { 8, X, 0, X, 8, X, 0, X }, + .clip = { 8, X, 0, X, 8, X, 0, X }, + .frng = { 2, X, 200, X, 2, X, 1, 1, X }, + .diag = { 1, X, 4, 1, 1, 4, X }, + .fc_coring = { 0, X, 0, X, 0, X, 0, X } +}; + +const struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config + imgu_css_tcc_gain_pcwl_lut = { { + 1024, 1032, 1040, 1048, 1057, 1065, 1073, 1081, 1089, 1097, 1105, 1113, + 1122, 1130, 1138, 1146, 1154, 1162, 1170, 1178, 1187, 1195, 1203, 1211, + 1219, 1227, 1235, 1243, 1252, 1260, 1268, 1276, 1284, 1292, 1300, 1308, + 1317, 1325, 1333, 1341, 1349, 1357, 1365, 1373, 1382, 1390, 1398, 1406, + 1414, 1422, 1430, 1438, 1447, 1455, 1463, 1471, 1479, 1487, 1495, 1503, + 1512, 1520, 1528, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, 1536, + 1536, 1536, 1528, 1520, 1512, 1503, 1495, 1487, 1479, 1471, 1463, 1455, + 1447, 1438, 1430, 1422, 1414, 1406, 1398, 1390, 1382, 1373, 1365, 1357, + 1349, 1341, 1333, 1325, 1317, 1308, 1300, 1292, 1284, 1276, 1268, 1260, + 1252, 1243, 1235, 1227, 1219, 1211, 1203, 1195, 1187, 1178, 1170, 1162, + 1154, 1146, 1138, 1130, 1122, 1113, 1105, 1097, 1089, 1081, 1073, 1065, + 1057, 1048, 1040, 1032, 1024 +} }; + +const struct ipu3_uapi_yuvp2_tcc_r_sqr_lut_static_config + imgu_css_tcc_r_sqr_lut = { { + 32, 44, 64, 92, 128, 180, 256, 364, 512, 628, 724, 808, 888, + 956, 1024, 1088, 1144, 1200, 1256, 1304, 1356, 1404, 1448 +} }; + +const struct imgu_abi_anr_config imgu_css_anr_defaults = { + .transform = { + .adaptive_treshhold_en = 1, + .alpha = { { 13, 13, 13, 13, 0, 0, 0, 0}, + { 11, 11, 11, 11, 0, 0, 0, 0}, + { 14, 14, 14, 14, 0, 0, 0, 0} }, + .beta = { { 24, 24, 24, 24}, + { 21, 20, 20, 21}, + { 25, 25, 25, 25} }, + .color = { { { 166, 173, 149, 166, 161, 146, 145, 173, + 145, 150, 141, 149, 145, 141, 142 }, + { 166, 173, 149, 165, 161, 145, 145, 173, + 145, 150, 141, 149, 145, 141, 142 }, + { 166, 174, 149, 166, 162, 146, 146, 173, + 145, 150, 141, 149, 145, 141, 142 }, + { 166, 173, 149, 165, 161, 145, 145, 173, + 146, 150, 141, 149, 145, 141, 142 } }, + { { 141, 131, 140, 141, 144, 143, 144, 131, + 143, 137, 140, 140, 144, 140, 141 }, + { 141, 131, 140, 141, 143, 143, 144, 131, + 143, 137, 140, 140, 144, 140, 141 }, + { 141, 131, 141, 141, 144, 144, 144, 131, + 143, 137, 140, 140, 144, 140, 141 }, + { 140, 131, 140, 141, 143, 143, 144, 131, + 143, 137, 140, 140, 144, 140, 141 } }, + { { 184, 173, 188, 184, 182, 182, 181, 173, + 182, 179, 182, 188, 181, 182, 180 }, + { 184, 173, 188, 184, 183, 182, 181, 173, + 182, 178, 182, 188, 181, 182, 180 }, + { 184, 173, 188, 184, 182, 182, 181, 173, + 182, 178, 182, 188, 181, 182, 181 }, + { 184, 172, 188, 184, 182, 182, 181, 173, + 182, 178, 182, 188, 182, 182, 180 } } }, + .sqrt_lut = { 724, 768, 810, 849, 887, 923, 958, 991, 1024, + 1056, 1086, 1116, 1145, 1173, 1201, 1228, 1254, + 1280, 1305, 1330, 1355, 1379, 1402, 1425, 1448 }, + .xreset = -1632, + .yreset = -1224, + .x_sqr_reset = 2663424, + .r_normfactor = 14, + .y_sqr_reset = 1498176, + .gain_scale = 115 + }, + .stitch = { + .anr_stitch_en = 1, + .pyramid = { { 1, 3, 5 }, { 7, 7, 5 }, { 3, 1, 3 }, + { 9, 15, 21 }, { 21, 15, 9 }, { 3, 5, 15 }, + { 25, 35, 35 }, { 25, 15, 5 }, { 7, 21, 35 }, + { 49, 49, 35 }, { 21, 7, 7 }, { 21, 35, 49 }, + { 49, 35, 21 }, { 7, 5, 15 }, { 25, 35, 35 }, + { 25, 15, 5 }, { 3, 9, 15 }, { 21, 21, 15 }, + { 9, 3, 1 }, { 3, 5, 7 }, { 7, 5, 3}, { 1 } + } + } +}; + +/* frame settings for Auto White Balance */ +const struct ipu3_uapi_awb_fr_config_s imgu_css_awb_fr_defaults = { + .grid_cfg = { + .width = 16, + .height = 16, + .block_width_log2 = 3, + .block_height_log2 = 3, + .x_start = 10, + .y_start = 2 | IPU3_UAPI_GRID_Y_START_EN, + }, + .bayer_coeff = { 0, 0, 0, 0, 0, 128 }, + .bayer_sign = 0, + .bayer_nf = 7 +}; + +/* settings for Auto Exposure */ +const struct ipu3_uapi_ae_grid_config imgu_css_ae_grid_defaults = { + .width = 16, + .height = 16, + .block_width_log2 = 3, + .block_height_log2 = 3, + .ae_en = 1, + .x_start = 0, + .y_start = 0, +}; + +/* settings for Auto Exposure color correction matrix */ +const struct ipu3_uapi_ae_ccm imgu_css_ae_ccm_defaults = { + 256, 256, 256, 256, /* gain_gr/r/b/gb */ + .mat = { 128, 0, 0, 0, 0, 128, 0, 0, 0, 0, 128, 0, 0, 0, 0, 128 }, +}; + +/* settings for Auto Focus */ +const struct ipu3_uapi_af_config_s imgu_css_af_defaults = { + .filter_config = { + { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 128 }, 0, + { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 128 }, 0, + .y_calc = { 8, 8, 8, 8 }, + .nf = { X, 7, X, 7 }, + }, + .grid_cfg = { + .width = 16, + .height = 16, + .block_width_log2 = 3, + .block_height_log2 = 3, + .x_start = 10, + .y_start = 2 | IPU3_UAPI_GRID_Y_START_EN, + }, +}; + +/* settings for Auto White Balance */ +const struct ipu3_uapi_awb_config_s imgu_css_awb_defaults = { + 8191, 8191, 8191, 8191 | /* rgbs_thr_gr/r/gb/b */ + IPU3_UAPI_AWB_RGBS_THR_B_EN | IPU3_UAPI_AWB_RGBS_THR_B_INCL_SAT, + .grid = { + .width = 16, + .height = 16, + .block_width_log2 = 3, + .block_height_log2 = 3, + .x_start = 0, + .y_start = 0, + }, +}; diff --git a/drivers/staging/media/ipu3/ipu3-tables.h b/drivers/staging/media/ipu3/ipu3-tables.h new file mode 100644 index 000000000000..a1bf3286f380 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-tables.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018 Intel Corporation */ + +#ifndef __IPU3_TABLES_H +#define __IPU3_TABLES_H + +#include "ipu3-abi.h" + +#define IMGU_BDS_GRANULARITY 32 /* Downscaling granularity */ +#define IMGU_BDS_MIN_SF_INV IMGU_BDS_GRANULARITY +#define IMGU_BDS_CONFIG_LEN 97 + +#define IMGU_SCALER_DOWNSCALE_4TAPS_LEN 128 +#define IMGU_SCALER_DOWNSCALE_2TAPS_LEN 64 +#define IMGU_SCALER_FP ((u32)1 << 31) /* 1.0 in fixed point */ + +#define IMGU_XNR3_VMEM_LUT_LEN 16 + +#define IMGU_GDC_LUT_UNIT 4 +#define IMGU_GDC_LUT_LEN 256 + +struct imgu_css_bds_config { + struct imgu_abi_bds_phase_arr hor_phase_arr; + struct imgu_abi_bds_phase_arr ver_phase_arr; + struct imgu_abi_bds_ptrn_arr ptrn_arr; + u16 sample_patrn_length; + u8 hor_ds_en; + u8 ver_ds_en; +}; + +struct imgu_css_xnr3_vmem_defaults { + s16 x[IMGU_XNR3_VMEM_LUT_LEN]; + s16 a[IMGU_XNR3_VMEM_LUT_LEN]; + s16 b[IMGU_XNR3_VMEM_LUT_LEN]; + s16 c[IMGU_XNR3_VMEM_LUT_LEN]; +}; + +extern const struct imgu_css_bds_config + imgu_css_bds_configs[IMGU_BDS_CONFIG_LEN]; +extern const s32 imgu_css_downscale_4taps[IMGU_SCALER_DOWNSCALE_4TAPS_LEN]; +extern const s32 imgu_css_downscale_2taps[IMGU_SCALER_DOWNSCALE_2TAPS_LEN]; +extern const s16 imgu_css_gdc_lut[IMGU_GDC_LUT_UNIT][IMGU_GDC_LUT_LEN]; +extern const struct imgu_css_xnr3_vmem_defaults imgu_css_xnr3_vmem_defaults; +extern const struct ipu3_uapi_bnr_static_config imgu_css_bnr_defaults; +extern const struct ipu3_uapi_dm_config imgu_css_dm_defaults; +extern const struct ipu3_uapi_ccm_mat_config imgu_css_ccm_defaults; +extern const struct ipu3_uapi_gamma_corr_lut imgu_css_gamma_lut; +extern const struct ipu3_uapi_csc_mat_config imgu_css_csc_defaults; +extern const struct ipu3_uapi_cds_params imgu_css_cds_defaults; +extern const struct ipu3_uapi_shd_config_static imgu_css_shd_defaults; +extern const struct ipu3_uapi_yuvp1_iefd_config imgu_css_iefd_defaults; +extern const struct ipu3_uapi_yuvp1_yds_config imgu_css_yds_defaults; +extern const struct ipu3_uapi_yuvp1_chnr_config imgu_css_chnr_defaults; +extern const struct ipu3_uapi_yuvp1_y_ee_nr_config imgu_css_y_ee_nr_defaults; +extern const struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config + imgu_css_tcc_gain_pcwl_lut; +extern const struct ipu3_uapi_yuvp2_tcc_r_sqr_lut_static_config + imgu_css_tcc_r_sqr_lut; +extern const struct imgu_abi_anr_config imgu_css_anr_defaults; +extern const struct ipu3_uapi_awb_fr_config_s imgu_css_awb_fr_defaults; +extern const struct ipu3_uapi_ae_grid_config imgu_css_ae_grid_defaults; +extern const struct ipu3_uapi_ae_ccm imgu_css_ae_ccm_defaults; +extern const struct ipu3_uapi_af_config_s imgu_css_af_defaults; +extern const struct ipu3_uapi_awb_config_s imgu_css_awb_defaults; + +#endif diff --git a/drivers/staging/media/ipu3/ipu3-v4l2.c b/drivers/staging/media/ipu3/ipu3-v4l2.c new file mode 100644 index 000000000000..9c0352b193a7 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3-v4l2.c @@ -0,0 +1,1426 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 Intel Corporation + +#include <linux/module.h> +#include <linux/pm_runtime.h> + +#include <media/v4l2-event.h> +#include <media/v4l2-ioctl.h> + +#include "ipu3.h" +#include "ipu3-dmamap.h" + +/******************** v4l2_subdev_ops ********************/ + +#define IPU3_RUNNING_MODE_VIDEO 0 +#define IPU3_RUNNING_MODE_STILL 1 + +static int imgu_subdev_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +{ + struct imgu_v4l2_subdev *imgu_sd = container_of(sd, + struct imgu_v4l2_subdev, + subdev); + struct imgu_device *imgu = v4l2_get_subdevdata(sd); + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[imgu_sd->pipe]; + struct v4l2_rect try_crop = { + .top = 0, + .left = 0, + }; + unsigned int i; + + try_crop.width = + imgu_pipe->nodes[IMGU_NODE_IN].vdev_fmt.fmt.pix_mp.width; + try_crop.height = + imgu_pipe->nodes[IMGU_NODE_IN].vdev_fmt.fmt.pix_mp.height; + + /* Initialize try_fmt */ + for (i = 0; i < IMGU_NODE_NUM; i++) { + struct v4l2_mbus_framefmt *try_fmt = + v4l2_subdev_get_try_format(sd, fh->pad, i); + + try_fmt->width = try_crop.width; + try_fmt->height = try_crop.height; + try_fmt->code = imgu_pipe->nodes[i].pad_fmt.code; + try_fmt->field = V4L2_FIELD_NONE; + } + + *v4l2_subdev_get_try_crop(sd, fh->pad, IMGU_NODE_IN) = try_crop; + *v4l2_subdev_get_try_compose(sd, fh->pad, IMGU_NODE_IN) = try_crop; + + return 0; +} + +static int imgu_subdev_s_stream(struct v4l2_subdev *sd, int enable) +{ + int i; + unsigned int node; + int r = 0; + struct imgu_device *imgu = v4l2_get_subdevdata(sd); + struct imgu_v4l2_subdev *imgu_sd = container_of(sd, + struct imgu_v4l2_subdev, + subdev); + unsigned int pipe = imgu_sd->pipe; + struct device *dev = &imgu->pci_dev->dev; + struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES] = { NULL }; + struct v4l2_rect *rects[IPU3_CSS_RECTS] = { NULL }; + struct imgu_css_pipe *css_pipe = &imgu->css.pipes[pipe]; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + dev_dbg(dev, "%s %d for pipe %d", __func__, enable, pipe); + /* grab ctrl after streamon and return after off */ + v4l2_ctrl_grab(imgu_sd->ctrl, enable); + + if (!enable) { + imgu_sd->active = false; + return 0; + } + + for (i = 0; i < IMGU_NODE_NUM; i++) + imgu_pipe->queue_enabled[i] = imgu_pipe->nodes[i].enabled; + + /* This is handled specially */ + imgu_pipe->queue_enabled[IPU3_CSS_QUEUE_PARAMS] = false; + + /* Initialize CSS formats */ + for (i = 0; i < IPU3_CSS_QUEUES; i++) { + node = imgu_map_node(imgu, i); + /* No need to reconfig meta nodes */ + if (node == IMGU_NODE_STAT_3A || node == IMGU_NODE_PARAMS) + continue; + fmts[i] = imgu_pipe->queue_enabled[node] ? + &imgu_pipe->nodes[node].vdev_fmt.fmt.pix_mp : NULL; + } + + /* Enable VF output only when VF queue requested by user */ + css_pipe->vf_output_en = false; + if (imgu_pipe->nodes[IMGU_NODE_VF].enabled) + css_pipe->vf_output_en = true; + + if (atomic_read(&imgu_sd->running_mode) == IPU3_RUNNING_MODE_VIDEO) + css_pipe->pipe_id = IPU3_CSS_PIPE_ID_VIDEO; + else + css_pipe->pipe_id = IPU3_CSS_PIPE_ID_CAPTURE; + + dev_dbg(dev, "IPU3 pipe %d pipe_id %d", pipe, css_pipe->pipe_id); + + rects[IPU3_CSS_RECT_EFFECTIVE] = &imgu_sd->rect.eff; + rects[IPU3_CSS_RECT_BDS] = &imgu_sd->rect.bds; + rects[IPU3_CSS_RECT_GDC] = &imgu_sd->rect.gdc; + + r = imgu_css_fmt_set(&imgu->css, fmts, rects, pipe); + if (r) { + dev_err(dev, "failed to set initial formats pipe %d with (%d)", + pipe, r); + return r; + } + + imgu_sd->active = true; + + return 0; +} + +static int imgu_subdev_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + struct imgu_device *imgu = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt *mf; + struct imgu_media_pipe *imgu_pipe; + u32 pad = fmt->pad; + struct imgu_v4l2_subdev *imgu_sd = container_of(sd, + struct imgu_v4l2_subdev, + subdev); + unsigned int pipe = imgu_sd->pipe; + + imgu_pipe = &imgu->imgu_pipe[pipe]; + if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { + fmt->format = imgu_pipe->nodes[pad].pad_fmt; + } else { + mf = v4l2_subdev_get_try_format(sd, cfg, pad); + fmt->format = *mf; + } + + return 0; +} + +static int imgu_subdev_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + struct imgu_media_pipe *imgu_pipe; + struct imgu_device *imgu = v4l2_get_subdevdata(sd); + struct imgu_v4l2_subdev *imgu_sd = container_of(sd, + struct imgu_v4l2_subdev, + subdev); + + struct v4l2_mbus_framefmt *mf; + u32 pad = fmt->pad; + unsigned int pipe = imgu_sd->pipe; + + dev_dbg(&imgu->pci_dev->dev, "set subdev %d pad %d fmt to [%dx%d]", + pipe, pad, fmt->format.width, fmt->format.height); + + imgu_pipe = &imgu->imgu_pipe[pipe]; + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) + mf = v4l2_subdev_get_try_format(sd, cfg, pad); + else + mf = &imgu_pipe->nodes[pad].pad_fmt; + + fmt->format.code = mf->code; + /* Clamp the w and h based on the hardware capabilities */ + if (imgu_sd->subdev_pads[pad].flags & MEDIA_PAD_FL_SOURCE) { + fmt->format.width = clamp(fmt->format.width, + IPU3_OUTPUT_MIN_WIDTH, + IPU3_OUTPUT_MAX_WIDTH); + fmt->format.height = clamp(fmt->format.height, + IPU3_OUTPUT_MIN_HEIGHT, + IPU3_OUTPUT_MAX_HEIGHT); + } else { + fmt->format.width = clamp(fmt->format.width, + IPU3_INPUT_MIN_WIDTH, + IPU3_INPUT_MAX_WIDTH); + fmt->format.height = clamp(fmt->format.height, + IPU3_INPUT_MIN_HEIGHT, + IPU3_INPUT_MAX_HEIGHT); + } + + *mf = fmt->format; + + return 0; +} + +static int imgu_subdev_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + struct v4l2_rect *try_sel, *r; + struct imgu_v4l2_subdev *imgu_sd = container_of(sd, + struct imgu_v4l2_subdev, + subdev); + + if (sel->pad != IMGU_NODE_IN) + return -EINVAL; + + switch (sel->target) { + case V4L2_SEL_TGT_CROP: + try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad); + r = &imgu_sd->rect.eff; + break; + case V4L2_SEL_TGT_COMPOSE: + try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad); + r = &imgu_sd->rect.bds; + break; + default: + return -EINVAL; + } + + if (sel->which == V4L2_SUBDEV_FORMAT_TRY) + sel->r = *try_sel; + else + sel->r = *r; + + return 0; +} + +static int imgu_subdev_set_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + struct imgu_device *imgu = v4l2_get_subdevdata(sd); + struct imgu_v4l2_subdev *imgu_sd = container_of(sd, + struct imgu_v4l2_subdev, + subdev); + struct v4l2_rect *rect, *try_sel; + + dev_dbg(&imgu->pci_dev->dev, + "set subdev %d sel which %d target 0x%4x rect [%dx%d]", + imgu_sd->pipe, sel->which, sel->target, + sel->r.width, sel->r.height); + + if (sel->pad != IMGU_NODE_IN) + return -EINVAL; + + switch (sel->target) { + case V4L2_SEL_TGT_CROP: + try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad); + rect = &imgu_sd->rect.eff; + break; + case V4L2_SEL_TGT_COMPOSE: + try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad); + rect = &imgu_sd->rect.bds; + break; + default: + return -EINVAL; + } + + if (sel->which == V4L2_SUBDEV_FORMAT_TRY) + *try_sel = sel->r; + else + *rect = sel->r; + + return 0; +} + +/******************** media_entity_operations ********************/ + +static int imgu_link_setup(struct media_entity *entity, + const struct media_pad *local, + const struct media_pad *remote, u32 flags) +{ + struct imgu_media_pipe *imgu_pipe; + struct v4l2_subdev *sd = container_of(entity, struct v4l2_subdev, + entity); + struct imgu_device *imgu = v4l2_get_subdevdata(sd); + struct imgu_v4l2_subdev *imgu_sd = container_of(sd, + struct imgu_v4l2_subdev, + subdev); + unsigned int pipe = imgu_sd->pipe; + u32 pad = local->index; + + WARN_ON(pad >= IMGU_NODE_NUM); + + dev_dbg(&imgu->pci_dev->dev, "pipe %d pad %d is %s", pipe, pad, + flags & MEDIA_LNK_FL_ENABLED ? "enabled" : "disabled"); + + imgu_pipe = &imgu->imgu_pipe[pipe]; + imgu_pipe->nodes[pad].enabled = flags & MEDIA_LNK_FL_ENABLED; + + /* enable input node to enable the pipe */ + if (pad != IMGU_NODE_IN) + return 0; + + if (flags & MEDIA_LNK_FL_ENABLED) + __set_bit(pipe, imgu->css.enabled_pipes); + else + __clear_bit(pipe, imgu->css.enabled_pipes); + + dev_dbg(&imgu->pci_dev->dev, "pipe %d is %s", pipe, + flags & MEDIA_LNK_FL_ENABLED ? "enabled" : "disabled"); + + return 0; +} + +/******************** vb2_ops ********************/ + +static int imgu_vb2_buf_init(struct vb2_buffer *vb) +{ + struct sg_table *sg = vb2_dma_sg_plane_desc(vb, 0); + struct imgu_device *imgu = vb2_get_drv_priv(vb->vb2_queue); + struct imgu_buffer *buf = container_of(vb, + struct imgu_buffer, vid_buf.vbb.vb2_buf); + struct imgu_video_device *node = + container_of(vb->vb2_queue, struct imgu_video_device, vbq); + unsigned int queue = imgu_node_to_queue(node->id); + + if (queue == IPU3_CSS_QUEUE_PARAMS) + return 0; + + return imgu_dmamap_map_sg(imgu, sg->sgl, sg->nents, &buf->map); +} + +/* Called when each buffer is freed */ +static void imgu_vb2_buf_cleanup(struct vb2_buffer *vb) +{ + struct imgu_device *imgu = vb2_get_drv_priv(vb->vb2_queue); + struct imgu_buffer *buf = container_of(vb, + struct imgu_buffer, vid_buf.vbb.vb2_buf); + struct imgu_video_device *node = + container_of(vb->vb2_queue, struct imgu_video_device, vbq); + unsigned int queue = imgu_node_to_queue(node->id); + + if (queue == IPU3_CSS_QUEUE_PARAMS) + return; + + imgu_dmamap_unmap(imgu, &buf->map); +} + +/* Transfer buffer ownership to me */ +static void imgu_vb2_buf_queue(struct vb2_buffer *vb) +{ + struct imgu_device *imgu = vb2_get_drv_priv(vb->vb2_queue); + struct imgu_video_device *node = + container_of(vb->vb2_queue, struct imgu_video_device, vbq); + unsigned int queue = imgu_node_to_queue(node->id); + unsigned long need_bytes; + unsigned int pipe = node->pipe; + + if (vb->vb2_queue->type == V4L2_BUF_TYPE_META_CAPTURE || + vb->vb2_queue->type == V4L2_BUF_TYPE_META_OUTPUT) + need_bytes = node->vdev_fmt.fmt.meta.buffersize; + else + need_bytes = node->vdev_fmt.fmt.pix_mp.plane_fmt[0].sizeimage; + + if (queue == IPU3_CSS_QUEUE_PARAMS) { + unsigned long payload = vb2_get_plane_payload(vb, 0); + struct vb2_v4l2_buffer *buf = + container_of(vb, struct vb2_v4l2_buffer, vb2_buf); + int r = -EINVAL; + + if (payload == 0) { + payload = need_bytes; + vb2_set_plane_payload(vb, 0, payload); + } + if (payload >= need_bytes) + r = imgu_css_set_parameters(&imgu->css, pipe, + vb2_plane_vaddr(vb, 0)); + buf->flags = V4L2_BUF_FLAG_DONE; + vb2_buffer_done(vb, r == 0 ? VB2_BUF_STATE_DONE + : VB2_BUF_STATE_ERROR); + + } else { + struct imgu_buffer *buf = container_of(vb, struct imgu_buffer, + vid_buf.vbb.vb2_buf); + + mutex_lock(&imgu->lock); + imgu_css_buf_init(&buf->css_buf, queue, buf->map.daddr); + list_add_tail(&buf->vid_buf.list, + &node->buffers); + mutex_unlock(&imgu->lock); + + vb2_set_plane_payload(&buf->vid_buf.vbb.vb2_buf, 0, need_bytes); + + if (imgu->streaming) + imgu_queue_buffers(imgu, false, pipe); + } + + dev_dbg(&imgu->pci_dev->dev, "%s for pipe %d node %d", __func__, + node->pipe, node->id); + +} + +static int imgu_vb2_queue_setup(struct vb2_queue *vq, + unsigned int *num_buffers, + unsigned int *num_planes, + unsigned int sizes[], + struct device *alloc_devs[]) +{ + struct imgu_device *imgu = vb2_get_drv_priv(vq); + struct imgu_video_device *node = + container_of(vq, struct imgu_video_device, vbq); + const struct v4l2_format *fmt = &node->vdev_fmt; + unsigned int size; + + *num_buffers = clamp_val(*num_buffers, 1, VB2_MAX_FRAME); + alloc_devs[0] = &imgu->pci_dev->dev; + + if (vq->type == V4L2_BUF_TYPE_META_CAPTURE || + vq->type == V4L2_BUF_TYPE_META_OUTPUT) + size = fmt->fmt.meta.buffersize; + else + size = fmt->fmt.pix_mp.plane_fmt[0].sizeimage; + + if (*num_planes) { + if (sizes[0] < size) + return -EINVAL; + size = sizes[0]; + } + + *num_planes = 1; + sizes[0] = size; + + /* Initialize buffer queue */ + INIT_LIST_HEAD(&node->buffers); + + return 0; +} + +/* Check if all enabled video nodes are streaming, exception ignored */ +static bool imgu_all_nodes_streaming(struct imgu_device *imgu, + struct imgu_video_device *except) +{ + unsigned int i, pipe, p; + struct imgu_video_device *node; + struct device *dev = &imgu->pci_dev->dev; + + pipe = except->pipe; + if (!test_bit(pipe, imgu->css.enabled_pipes)) { + dev_warn(&imgu->pci_dev->dev, + "pipe %d link is not ready yet", pipe); + return false; + } + + for_each_set_bit(p, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) { + for (i = 0; i < IMGU_NODE_NUM; i++) { + node = &imgu->imgu_pipe[p].nodes[i]; + dev_dbg(dev, "%s pipe %u queue %u name %s enabled = %u", + __func__, p, i, node->name, node->enabled); + if (node == except) + continue; + if (node->enabled && !vb2_start_streaming_called(&node->vbq)) + return false; + } + } + + return true; +} + +static void imgu_return_all_buffers(struct imgu_device *imgu, + struct imgu_video_device *node, + enum vb2_buffer_state state) +{ + struct imgu_vb2_buffer *b, *b0; + + /* Return all buffers */ + mutex_lock(&imgu->lock); + list_for_each_entry_safe(b, b0, &node->buffers, list) { + list_del(&b->list); + vb2_buffer_done(&b->vbb.vb2_buf, state); + } + mutex_unlock(&imgu->lock); +} + +static int imgu_vb2_start_streaming(struct vb2_queue *vq, unsigned int count) +{ + struct imgu_media_pipe *imgu_pipe; + struct imgu_device *imgu = vb2_get_drv_priv(vq); + struct device *dev = &imgu->pci_dev->dev; + struct imgu_video_device *node = + container_of(vq, struct imgu_video_device, vbq); + int r; + unsigned int pipe; + + dev_dbg(dev, "%s node name %s pipe %d id %u", __func__, + node->name, node->pipe, node->id); + + if (imgu->streaming) { + r = -EBUSY; + goto fail_return_bufs; + } + + if (!node->enabled) { + dev_err(dev, "IMGU node is not enabled"); + r = -EINVAL; + goto fail_return_bufs; + } + + pipe = node->pipe; + imgu_pipe = &imgu->imgu_pipe[pipe]; + r = media_pipeline_start(&node->vdev.entity, &imgu_pipe->pipeline); + if (r < 0) + goto fail_return_bufs; + + + if (!imgu_all_nodes_streaming(imgu, node)) + return 0; + + for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) { + r = v4l2_subdev_call(&imgu->imgu_pipe[pipe].imgu_sd.subdev, + video, s_stream, 1); + if (r < 0) + goto fail_stop_pipeline; + } + + /* Start streaming of the whole pipeline now */ + dev_dbg(dev, "IMGU streaming is ready to start"); + r = imgu_s_stream(imgu, true); + if (!r) + imgu->streaming = true; + + return 0; + +fail_stop_pipeline: + media_pipeline_stop(&node->vdev.entity); +fail_return_bufs: + imgu_return_all_buffers(imgu, node, VB2_BUF_STATE_QUEUED); + + return r; +} + +static void imgu_vb2_stop_streaming(struct vb2_queue *vq) +{ + struct imgu_media_pipe *imgu_pipe; + struct imgu_device *imgu = vb2_get_drv_priv(vq); + struct device *dev = &imgu->pci_dev->dev; + struct imgu_video_device *node = + container_of(vq, struct imgu_video_device, vbq); + int r; + unsigned int pipe; + + WARN_ON(!node->enabled); + + pipe = node->pipe; + dev_dbg(dev, "Try to stream off node [%d][%d]", pipe, node->id); + imgu_pipe = &imgu->imgu_pipe[pipe]; + r = v4l2_subdev_call(&imgu_pipe->imgu_sd.subdev, video, s_stream, 0); + if (r) + dev_err(&imgu->pci_dev->dev, + "failed to stop subdev streaming\n"); + + /* Was this the first node with streaming disabled? */ + if (imgu->streaming && imgu_all_nodes_streaming(imgu, node)) { + /* Yes, really stop streaming now */ + dev_dbg(dev, "IMGU streaming is ready to stop"); + r = imgu_s_stream(imgu, false); + if (!r) + imgu->streaming = false; + } + + imgu_return_all_buffers(imgu, node, VB2_BUF_STATE_ERROR); + media_pipeline_stop(&node->vdev.entity); +} + +/******************** v4l2_ioctl_ops ********************/ + +#define VID_CAPTURE 0 +#define VID_OUTPUT 1 +#define DEF_VID_CAPTURE 0 +#define DEF_VID_OUTPUT 1 + +struct imgu_fmt { + u32 fourcc; + u16 type; /* VID_CAPTURE or VID_OUTPUT not both */ +}; + +/* format descriptions for capture and preview */ +static const struct imgu_fmt formats[] = { + { V4L2_PIX_FMT_NV12, VID_CAPTURE }, + { V4L2_PIX_FMT_IPU3_SGRBG10, VID_OUTPUT }, + { V4L2_PIX_FMT_IPU3_SBGGR10, VID_OUTPUT }, + { V4L2_PIX_FMT_IPU3_SGBRG10, VID_OUTPUT }, + { V4L2_PIX_FMT_IPU3_SRGGB10, VID_OUTPUT }, +}; + +/* Find the first matched format, return default if not found */ +static const struct imgu_fmt *find_format(struct v4l2_format *f, u32 type) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(formats); i++) { + if (formats[i].fourcc == f->fmt.pix_mp.pixelformat && + formats[i].type == type) + return &formats[i]; + } + + return type == VID_CAPTURE ? &formats[DEF_VID_CAPTURE] : + &formats[DEF_VID_OUTPUT]; +} + +static int imgu_vidioc_querycap(struct file *file, void *fh, + struct v4l2_capability *cap) +{ + struct imgu_video_device *node = file_to_intel_imgu_node(file); + + strscpy(cap->driver, IMGU_NAME, sizeof(cap->driver)); + strscpy(cap->card, IMGU_NAME, sizeof(cap->card)); + snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s", node->name); + + return 0; +} + +static int enum_fmts(struct v4l2_fmtdesc *f, u32 type) +{ + unsigned int i, j; + + for (i = j = 0; i < ARRAY_SIZE(formats); ++i) { + if (formats[i].type == type) { + if (j == f->index) + break; + ++j; + } + } + + if (i < ARRAY_SIZE(formats)) { + f->pixelformat = formats[i].fourcc; + return 0; + } + + return -EINVAL; +} + +static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) + return -EINVAL; + + return enum_fmts(f, VID_CAPTURE); +} + +static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + if (f->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) + return -EINVAL; + + return enum_fmts(f, VID_OUTPUT); +} + +/* Propagate forward always the format from the CIO2 subdev */ +static int imgu_vidioc_g_fmt(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct imgu_video_device *node = file_to_intel_imgu_node(file); + + f->fmt = node->vdev_fmt.fmt; + + return 0; +} + +/* + * Set input/output format. Unless it is just a try, this also resets + * selections (ie. effective and BDS resolutions) to defaults. + */ +static int imgu_fmt(struct imgu_device *imgu, unsigned int pipe, int node, + struct v4l2_format *f, bool try) +{ + struct device *dev = &imgu->pci_dev->dev; + struct v4l2_pix_format_mplane try_fmts[IPU3_CSS_QUEUES]; + struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES] = { NULL }; + struct v4l2_rect *rects[IPU3_CSS_RECTS] = { NULL }; + struct v4l2_mbus_framefmt pad_fmt; + unsigned int i, css_q; + int r; + struct imgu_css_pipe *css_pipe = &imgu->css.pipes[pipe]; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + struct imgu_v4l2_subdev *imgu_sd = &imgu_pipe->imgu_sd; + + dev_dbg(dev, "set fmt node [%u][%u](try = %d)", pipe, node, try); + + for (i = 0; i < IMGU_NODE_NUM; i++) + dev_dbg(dev, "IMGU pipe %d node %d enabled = %d", + pipe, i, imgu_pipe->nodes[i].enabled); + + if (imgu_pipe->nodes[IMGU_NODE_VF].enabled) + css_pipe->vf_output_en = true; + + if (atomic_read(&imgu_sd->running_mode) == IPU3_RUNNING_MODE_VIDEO) + css_pipe->pipe_id = IPU3_CSS_PIPE_ID_VIDEO; + else + css_pipe->pipe_id = IPU3_CSS_PIPE_ID_CAPTURE; + + dev_dbg(dev, "IPU3 pipe %d pipe_id = %d", pipe, css_pipe->pipe_id); + + for (i = 0; i < IPU3_CSS_QUEUES; i++) { + unsigned int inode = imgu_map_node(imgu, i); + + /* Skip the meta node */ + if (inode == IMGU_NODE_STAT_3A || inode == IMGU_NODE_PARAMS) + continue; + + if (try) { + try_fmts[i] = + imgu_pipe->nodes[inode].vdev_fmt.fmt.pix_mp; + fmts[i] = &try_fmts[i]; + } else { + fmts[i] = &imgu_pipe->nodes[inode].vdev_fmt.fmt.pix_mp; + } + + /* CSS expects some format on OUT queue */ + if (i != IPU3_CSS_QUEUE_OUT && + !imgu_pipe->nodes[inode].enabled) + fmts[i] = NULL; + } + + if (!try) { + /* eff and bds res got by imgu_s_sel */ + struct imgu_v4l2_subdev *imgu_sd = &imgu_pipe->imgu_sd; + + rects[IPU3_CSS_RECT_EFFECTIVE] = &imgu_sd->rect.eff; + rects[IPU3_CSS_RECT_BDS] = &imgu_sd->rect.bds; + rects[IPU3_CSS_RECT_GDC] = &imgu_sd->rect.gdc; + + /* suppose that pad fmt was set by subdev s_fmt before */ + pad_fmt = imgu_pipe->nodes[IMGU_NODE_IN].pad_fmt; + rects[IPU3_CSS_RECT_GDC]->width = pad_fmt.width; + rects[IPU3_CSS_RECT_GDC]->height = pad_fmt.height; + } + + /* + * imgu doesn't set the node to the value given by user + * before we return success from this function, so set it here. + */ + css_q = imgu_node_to_queue(node); + if (fmts[css_q]) + *fmts[css_q] = f->fmt.pix_mp; + else + return -EINVAL; + + if (try) + r = imgu_css_fmt_try(&imgu->css, fmts, rects, pipe); + else + r = imgu_css_fmt_set(&imgu->css, fmts, rects, pipe); + + /* r is the binary number in the firmware blob */ + if (r < 0) + return r; + + if (try) + f->fmt.pix_mp = *fmts[css_q]; + else + f->fmt = imgu_pipe->nodes[node].vdev_fmt.fmt; + + return 0; +} + +static int imgu_try_fmt(struct file *file, void *fh, struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; + const struct imgu_fmt *fmt; + + if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) + fmt = find_format(f, VID_CAPTURE); + else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) + fmt = find_format(f, VID_OUTPUT); + else + return -EINVAL; + + pixm->pixelformat = fmt->fourcc; + + memset(pixm->plane_fmt[0].reserved, 0, + sizeof(pixm->plane_fmt[0].reserved)); + + return 0; +} + +static int imgu_vidioc_try_fmt(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct imgu_device *imgu = video_drvdata(file); + struct device *dev = &imgu->pci_dev->dev; + struct imgu_video_device *node = file_to_intel_imgu_node(file); + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + int r; + + dev_dbg(dev, "%s [%ux%u] for node %d\n", __func__, + pix_mp->width, pix_mp->height, node->id); + + r = imgu_try_fmt(file, fh, f); + if (r) + return r; + + return imgu_fmt(imgu, node->pipe, node->id, f, true); +} + +static int imgu_vidioc_s_fmt(struct file *file, void *fh, struct v4l2_format *f) +{ + struct imgu_device *imgu = video_drvdata(file); + struct device *dev = &imgu->pci_dev->dev; + struct imgu_video_device *node = file_to_intel_imgu_node(file); + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + int r; + + dev_dbg(dev, "%s [%ux%u] for node %d\n", __func__, + pix_mp->width, pix_mp->height, node->id); + + r = imgu_try_fmt(file, fh, f); + if (r) + return r; + + return imgu_fmt(imgu, node->pipe, node->id, f, false); +} + +struct imgu_meta_fmt { + __u32 fourcc; + char *name; +}; + +/* From drivers/media/v4l2-core/v4l2-ioctl.c */ +static const struct imgu_meta_fmt meta_fmts[] = { + { V4L2_META_FMT_IPU3_PARAMS, "IPU3 processing parameters" }, + { V4L2_META_FMT_IPU3_STAT_3A, "IPU3 3A statistics" }, +}; + +static int imgu_meta_enum_format(struct file *file, void *fh, + struct v4l2_fmtdesc *fmt) +{ + struct imgu_video_device *node = file_to_intel_imgu_node(file); + unsigned int i = fmt->type == V4L2_BUF_TYPE_META_OUTPUT ? 0 : 1; + + /* Each node is dedicated to only one meta format */ + if (fmt->index > 0 || fmt->type != node->vbq.type) + return -EINVAL; + + strscpy(fmt->description, meta_fmts[i].name, sizeof(fmt->description)); + fmt->pixelformat = meta_fmts[i].fourcc; + + return 0; +} + +static int imgu_vidioc_g_meta_fmt(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct imgu_video_device *node = file_to_intel_imgu_node(file); + + if (f->type != node->vbq.type) + return -EINVAL; + + f->fmt = node->vdev_fmt.fmt; + + return 0; +} + +static int imgu_vidioc_enum_input(struct file *file, void *fh, + struct v4l2_input *input) +{ + if (input->index > 0) + return -EINVAL; + strscpy(input->name, "camera", sizeof(input->name)); + input->type = V4L2_INPUT_TYPE_CAMERA; + + return 0; +} + +static int imgu_vidioc_g_input(struct file *file, void *fh, unsigned int *input) +{ + *input = 0; + + return 0; +} + +static int imgu_vidioc_s_input(struct file *file, void *fh, unsigned int input) +{ + return input == 0 ? 0 : -EINVAL; +} + +static int imgu_vidioc_enum_output(struct file *file, void *fh, + struct v4l2_output *output) +{ + if (output->index > 0) + return -EINVAL; + strscpy(output->name, "camera", sizeof(output->name)); + output->type = V4L2_INPUT_TYPE_CAMERA; + + return 0; +} + +static int imgu_vidioc_g_output(struct file *file, void *fh, + unsigned int *output) +{ + *output = 0; + + return 0; +} + +static int imgu_vidioc_s_output(struct file *file, void *fh, + unsigned int output) +{ + return output == 0 ? 0 : -EINVAL; +} + +/******************** function pointers ********************/ + +static struct v4l2_subdev_internal_ops imgu_subdev_internal_ops = { + .open = imgu_subdev_open, +}; + +static const struct v4l2_subdev_core_ops imgu_subdev_core_ops = { + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, +}; + +static const struct v4l2_subdev_video_ops imgu_subdev_video_ops = { + .s_stream = imgu_subdev_s_stream, +}; + +static const struct v4l2_subdev_pad_ops imgu_subdev_pad_ops = { + .link_validate = v4l2_subdev_link_validate_default, + .get_fmt = imgu_subdev_get_fmt, + .set_fmt = imgu_subdev_set_fmt, + .get_selection = imgu_subdev_get_selection, + .set_selection = imgu_subdev_set_selection, +}; + +static const struct v4l2_subdev_ops imgu_subdev_ops = { + .core = &imgu_subdev_core_ops, + .video = &imgu_subdev_video_ops, + .pad = &imgu_subdev_pad_ops, +}; + +static const struct media_entity_operations imgu_media_ops = { + .link_setup = imgu_link_setup, + .link_validate = v4l2_subdev_link_validate, +}; + +/****************** vb2_ops of the Q ********************/ + +static const struct vb2_ops imgu_vb2_ops = { + .buf_init = imgu_vb2_buf_init, + .buf_cleanup = imgu_vb2_buf_cleanup, + .buf_queue = imgu_vb2_buf_queue, + .queue_setup = imgu_vb2_queue_setup, + .start_streaming = imgu_vb2_start_streaming, + .stop_streaming = imgu_vb2_stop_streaming, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, +}; + +/****************** v4l2_file_operations *****************/ + +static const struct v4l2_file_operations imgu_v4l2_fops = { + .unlocked_ioctl = video_ioctl2, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .poll = vb2_fop_poll, + .mmap = vb2_fop_mmap, +}; + +/******************** v4l2_ioctl_ops ********************/ + +static const struct v4l2_ioctl_ops imgu_v4l2_ioctl_ops = { + .vidioc_querycap = imgu_vidioc_querycap, + + .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap, + .vidioc_g_fmt_vid_cap_mplane = imgu_vidioc_g_fmt, + .vidioc_s_fmt_vid_cap_mplane = imgu_vidioc_s_fmt, + .vidioc_try_fmt_vid_cap_mplane = imgu_vidioc_try_fmt, + + .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out, + .vidioc_g_fmt_vid_out_mplane = imgu_vidioc_g_fmt, + .vidioc_s_fmt_vid_out_mplane = imgu_vidioc_s_fmt, + .vidioc_try_fmt_vid_out_mplane = imgu_vidioc_try_fmt, + + .vidioc_enum_output = imgu_vidioc_enum_output, + .vidioc_g_output = imgu_vidioc_g_output, + .vidioc_s_output = imgu_vidioc_s_output, + + .vidioc_enum_input = imgu_vidioc_enum_input, + .vidioc_g_input = imgu_vidioc_g_input, + .vidioc_s_input = imgu_vidioc_s_input, + + /* buffer queue management */ + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_expbuf = vb2_ioctl_expbuf, +}; + +static const struct v4l2_ioctl_ops imgu_v4l2_meta_ioctl_ops = { + .vidioc_querycap = imgu_vidioc_querycap, + + /* meta capture */ + .vidioc_enum_fmt_meta_cap = imgu_meta_enum_format, + .vidioc_g_fmt_meta_cap = imgu_vidioc_g_meta_fmt, + .vidioc_s_fmt_meta_cap = imgu_vidioc_g_meta_fmt, + .vidioc_try_fmt_meta_cap = imgu_vidioc_g_meta_fmt, + + /* meta output */ + .vidioc_enum_fmt_meta_out = imgu_meta_enum_format, + .vidioc_g_fmt_meta_out = imgu_vidioc_g_meta_fmt, + .vidioc_s_fmt_meta_out = imgu_vidioc_g_meta_fmt, + .vidioc_try_fmt_meta_out = imgu_vidioc_g_meta_fmt, + + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_expbuf = vb2_ioctl_expbuf, +}; + +static int imgu_sd_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct imgu_v4l2_subdev *imgu_sd = + container_of(ctrl->handler, struct imgu_v4l2_subdev, ctrl_handler); + struct imgu_device *imgu = v4l2_get_subdevdata(&imgu_sd->subdev); + struct device *dev = &imgu->pci_dev->dev; + + dev_dbg(dev, "set val %d to ctrl 0x%8x for subdev %d", + ctrl->val, ctrl->id, imgu_sd->pipe); + + switch (ctrl->id) { + case V4L2_CID_INTEL_IPU3_MODE: + atomic_set(&imgu_sd->running_mode, ctrl->val); + return 0; + default: + return -EINVAL; + } +} + +static const struct v4l2_ctrl_ops imgu_subdev_ctrl_ops = { + .s_ctrl = imgu_sd_s_ctrl, +}; + +static const char * const imgu_ctrl_mode_strings[] = { + "Video mode", + "Still mode", +}; + +static const struct v4l2_ctrl_config imgu_subdev_ctrl_mode = { + .ops = &imgu_subdev_ctrl_ops, + .id = V4L2_CID_INTEL_IPU3_MODE, + .name = "IPU3 Pipe Mode", + .type = V4L2_CTRL_TYPE_MENU, + .max = ARRAY_SIZE(imgu_ctrl_mode_strings) - 1, + .def = IPU3_RUNNING_MODE_VIDEO, + .qmenu = imgu_ctrl_mode_strings, +}; + +/******************** Framework registration ********************/ + +/* helper function to config node's video properties */ +static void imgu_node_to_v4l2(u32 node, struct video_device *vdev, + struct v4l2_format *f) +{ + u32 cap; + + /* Should not happen */ + WARN_ON(node >= IMGU_NODE_NUM); + + switch (node) { + case IMGU_NODE_IN: + cap = V4L2_CAP_VIDEO_OUTPUT_MPLANE; + f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; + vdev->ioctl_ops = &imgu_v4l2_ioctl_ops; + break; + case IMGU_NODE_PARAMS: + cap = V4L2_CAP_META_OUTPUT; + f->type = V4L2_BUF_TYPE_META_OUTPUT; + f->fmt.meta.dataformat = V4L2_META_FMT_IPU3_PARAMS; + vdev->ioctl_ops = &imgu_v4l2_meta_ioctl_ops; + imgu_css_meta_fmt_set(&f->fmt.meta); + break; + case IMGU_NODE_STAT_3A: + cap = V4L2_CAP_META_CAPTURE; + f->type = V4L2_BUF_TYPE_META_CAPTURE; + f->fmt.meta.dataformat = V4L2_META_FMT_IPU3_STAT_3A; + vdev->ioctl_ops = &imgu_v4l2_meta_ioctl_ops; + imgu_css_meta_fmt_set(&f->fmt.meta); + break; + default: + cap = V4L2_CAP_VIDEO_CAPTURE_MPLANE; + f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; + vdev->ioctl_ops = &imgu_v4l2_ioctl_ops; + } + + vdev->device_caps = V4L2_CAP_STREAMING | cap; +} + +static int imgu_v4l2_subdev_register(struct imgu_device *imgu, + struct imgu_v4l2_subdev *imgu_sd, + unsigned int pipe) +{ + int i, r; + struct v4l2_ctrl_handler *hdl = &imgu_sd->ctrl_handler; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + /* Initialize subdev media entity */ + r = media_entity_pads_init(&imgu_sd->subdev.entity, IMGU_NODE_NUM, + imgu_sd->subdev_pads); + if (r) { + dev_err(&imgu->pci_dev->dev, + "failed initialize subdev media entity (%d)\n", r); + return r; + } + imgu_sd->subdev.entity.ops = &imgu_media_ops; + for (i = 0; i < IMGU_NODE_NUM; i++) { + imgu_sd->subdev_pads[i].flags = imgu_pipe->nodes[i].output ? + MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE; + } + + /* Initialize subdev */ + v4l2_subdev_init(&imgu_sd->subdev, &imgu_subdev_ops); + imgu_sd->subdev.entity.function = MEDIA_ENT_F_PROC_VIDEO_STATISTICS; + imgu_sd->subdev.internal_ops = &imgu_subdev_internal_ops; + imgu_sd->subdev.flags = V4L2_SUBDEV_FL_HAS_DEVNODE | + V4L2_SUBDEV_FL_HAS_EVENTS; + snprintf(imgu_sd->subdev.name, sizeof(imgu_sd->subdev.name), + "%s %d", IMGU_NAME, pipe); + v4l2_set_subdevdata(&imgu_sd->subdev, imgu); + atomic_set(&imgu_sd->running_mode, IPU3_RUNNING_MODE_VIDEO); + v4l2_ctrl_handler_init(hdl, 1); + imgu_sd->subdev.ctrl_handler = hdl; + imgu_sd->ctrl = v4l2_ctrl_new_custom(hdl, &imgu_subdev_ctrl_mode, NULL); + if (hdl->error) { + r = hdl->error; + dev_err(&imgu->pci_dev->dev, + "failed to create subdev v4l2 ctrl with err %d", r); + goto fail_subdev; + } + r = v4l2_device_register_subdev(&imgu->v4l2_dev, &imgu_sd->subdev); + if (r) { + dev_err(&imgu->pci_dev->dev, + "failed initialize subdev (%d)\n", r); + goto fail_subdev; + } + + imgu_sd->pipe = pipe; + return 0; + +fail_subdev: + v4l2_ctrl_handler_free(imgu_sd->subdev.ctrl_handler); + media_entity_cleanup(&imgu_sd->subdev.entity); + + return r; +} + +static int imgu_v4l2_node_setup(struct imgu_device *imgu, unsigned int pipe, + int node_num) +{ + int r; + u32 flags; + struct v4l2_mbus_framefmt def_bus_fmt = { 0 }; + struct v4l2_pix_format_mplane def_pix_fmt = { 0 }; + struct device *dev = &imgu->pci_dev->dev; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + struct v4l2_subdev *sd = &imgu_pipe->imgu_sd.subdev; + struct imgu_video_device *node = &imgu_pipe->nodes[node_num]; + struct video_device *vdev = &node->vdev; + struct vb2_queue *vbq = &node->vbq; + + /* Initialize formats to default values */ + def_bus_fmt.width = 1920; + def_bus_fmt.height = 1080; + def_bus_fmt.code = MEDIA_BUS_FMT_FIXED; + def_bus_fmt.field = V4L2_FIELD_NONE; + def_bus_fmt.colorspace = V4L2_COLORSPACE_RAW; + def_bus_fmt.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + def_bus_fmt.quantization = V4L2_QUANTIZATION_DEFAULT; + def_bus_fmt.xfer_func = V4L2_XFER_FUNC_DEFAULT; + + def_pix_fmt.width = def_bus_fmt.width; + def_pix_fmt.height = def_bus_fmt.height; + def_pix_fmt.field = def_bus_fmt.field; + def_pix_fmt.num_planes = 1; + def_pix_fmt.plane_fmt[0].bytesperline = def_pix_fmt.width * 2; + def_pix_fmt.plane_fmt[0].sizeimage = + def_pix_fmt.height * def_pix_fmt.plane_fmt[0].bytesperline; + def_pix_fmt.flags = 0; + def_pix_fmt.colorspace = def_bus_fmt.colorspace; + def_pix_fmt.ycbcr_enc = def_bus_fmt.ycbcr_enc; + def_pix_fmt.quantization = def_bus_fmt.quantization; + def_pix_fmt.xfer_func = def_bus_fmt.xfer_func; + + /* Initialize miscellaneous variables */ + mutex_init(&node->lock); + INIT_LIST_HEAD(&node->buffers); + + /* Initialize formats to default values */ + node->pad_fmt = def_bus_fmt; + node->id = node_num; + node->pipe = pipe; + imgu_node_to_v4l2(node_num, vdev, &node->vdev_fmt); + if (node->vdev_fmt.type == + V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE || + node->vdev_fmt.type == + V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { + def_pix_fmt.pixelformat = node->output ? + V4L2_PIX_FMT_IPU3_SGRBG10 : + V4L2_PIX_FMT_NV12; + node->vdev_fmt.fmt.pix_mp = def_pix_fmt; + } + + /* Initialize media entities */ + r = media_entity_pads_init(&vdev->entity, 1, &node->vdev_pad); + if (r) { + dev_err(dev, "failed initialize media entity (%d)\n", r); + mutex_destroy(&node->lock); + return r; + } + node->vdev_pad.flags = node->output ? + MEDIA_PAD_FL_SOURCE : MEDIA_PAD_FL_SINK; + vdev->entity.ops = NULL; + + /* Initialize vbq */ + vbq->type = node->vdev_fmt.type; + vbq->io_modes = VB2_USERPTR | VB2_MMAP | VB2_DMABUF; + vbq->ops = &imgu_vb2_ops; + vbq->mem_ops = &vb2_dma_sg_memops; + if (imgu->buf_struct_size <= 0) + imgu->buf_struct_size = + sizeof(struct imgu_vb2_buffer); + vbq->buf_struct_size = imgu->buf_struct_size; + vbq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; + /* can streamon w/o buffers */ + vbq->min_buffers_needed = 0; + vbq->drv_priv = imgu; + vbq->lock = &node->lock; + r = vb2_queue_init(vbq); + if (r) { + dev_err(dev, "failed to initialize video queue (%d)", r); + media_entity_cleanup(&vdev->entity); + return r; + } + + /* Initialize vdev */ + snprintf(vdev->name, sizeof(vdev->name), "%s %d %s", + IMGU_NAME, pipe, node->name); + vdev->release = video_device_release_empty; + vdev->fops = &imgu_v4l2_fops; + vdev->lock = &node->lock; + vdev->v4l2_dev = &imgu->v4l2_dev; + vdev->queue = &node->vbq; + vdev->vfl_dir = node->output ? VFL_DIR_TX : VFL_DIR_RX; + video_set_drvdata(vdev, imgu); + r = video_register_device(vdev, VFL_TYPE_GRABBER, -1); + if (r) { + dev_err(dev, "failed to register video device (%d)", r); + media_entity_cleanup(&vdev->entity); + return r; + } + + /* Create link between video node and the subdev pad */ + flags = 0; + if (node->enabled) + flags |= MEDIA_LNK_FL_ENABLED; + if (node->output) { + r = media_create_pad_link(&vdev->entity, 0, &sd->entity, + node_num, flags); + } else { + r = media_create_pad_link(&sd->entity, node_num, &vdev->entity, + 0, flags); + } + if (r) { + dev_err(dev, "failed to create pad link (%d)", r); + video_unregister_device(vdev); + return r; + } + + return 0; +} + +static void imgu_v4l2_nodes_cleanup_pipe(struct imgu_device *imgu, + unsigned int pipe, int node) +{ + int i; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + for (i = 0; i < node; i++) { + video_unregister_device(&imgu_pipe->nodes[i].vdev); + media_entity_cleanup(&imgu_pipe->nodes[i].vdev.entity); + mutex_destroy(&imgu_pipe->nodes[i].lock); + } +} + +static int imgu_v4l2_nodes_setup_pipe(struct imgu_device *imgu, int pipe) +{ + int i, r; + + for (i = 0; i < IMGU_NODE_NUM; i++) { + r = imgu_v4l2_node_setup(imgu, pipe, i); + if (r) + goto cleanup; + } + + return 0; + +cleanup: + imgu_v4l2_nodes_cleanup_pipe(imgu, pipe, i); + return r; +} + +static void imgu_v4l2_subdev_cleanup(struct imgu_device *imgu, unsigned int i) +{ + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[i]; + + v4l2_device_unregister_subdev(&imgu_pipe->imgu_sd.subdev); + v4l2_ctrl_handler_free(imgu_pipe->imgu_sd.subdev.ctrl_handler); + media_entity_cleanup(&imgu_pipe->imgu_sd.subdev.entity); +} + +static void imgu_v4l2_cleanup_pipes(struct imgu_device *imgu, unsigned int pipe) +{ + int i; + + for (i = 0; i < pipe; i++) { + imgu_v4l2_nodes_cleanup_pipe(imgu, i, IMGU_NODE_NUM); + imgu_v4l2_subdev_cleanup(imgu, i); + } +} + +static int imgu_v4l2_register_pipes(struct imgu_device *imgu) +{ + struct imgu_media_pipe *imgu_pipe; + int i, r; + + for (i = 0; i < IMGU_MAX_PIPE_NUM; i++) { + imgu_pipe = &imgu->imgu_pipe[i]; + r = imgu_v4l2_subdev_register(imgu, &imgu_pipe->imgu_sd, i); + if (r) { + dev_err(&imgu->pci_dev->dev, + "failed to register subdev%d ret (%d)\n", i, r); + goto pipes_cleanup; + } + r = imgu_v4l2_nodes_setup_pipe(imgu, i); + if (r) { + imgu_v4l2_subdev_cleanup(imgu, i); + goto pipes_cleanup; + } + } + + return 0; + +pipes_cleanup: + imgu_v4l2_cleanup_pipes(imgu, i); + return r; +} + +int imgu_v4l2_register(struct imgu_device *imgu) +{ + int r; + + /* Initialize miscellaneous variables */ + imgu->streaming = false; + + /* Set up media device */ + media_device_pci_init(&imgu->media_dev, imgu->pci_dev, IMGU_NAME); + + /* Set up v4l2 device */ + imgu->v4l2_dev.mdev = &imgu->media_dev; + imgu->v4l2_dev.ctrl_handler = NULL; + r = v4l2_device_register(&imgu->pci_dev->dev, &imgu->v4l2_dev); + if (r) { + dev_err(&imgu->pci_dev->dev, + "failed to register V4L2 device (%d)\n", r); + goto fail_v4l2_dev; + } + + r = imgu_v4l2_register_pipes(imgu); + if (r) { + dev_err(&imgu->pci_dev->dev, + "failed to register pipes (%d)\n", r); + goto fail_v4l2_pipes; + } + + r = v4l2_device_register_subdev_nodes(&imgu->v4l2_dev); + if (r) { + dev_err(&imgu->pci_dev->dev, + "failed to register subdevs (%d)\n", r); + goto fail_subdevs; + } + + r = media_device_register(&imgu->media_dev); + if (r) { + dev_err(&imgu->pci_dev->dev, + "failed to register media device (%d)\n", r); + goto fail_subdevs; + } + + return 0; + +fail_subdevs: + imgu_v4l2_cleanup_pipes(imgu, IMGU_MAX_PIPE_NUM); +fail_v4l2_pipes: + v4l2_device_unregister(&imgu->v4l2_dev); +fail_v4l2_dev: + media_device_cleanup(&imgu->media_dev); + + return r; +} + +int imgu_v4l2_unregister(struct imgu_device *imgu) +{ + media_device_unregister(&imgu->media_dev); + imgu_v4l2_cleanup_pipes(imgu, IMGU_MAX_PIPE_NUM); + v4l2_device_unregister(&imgu->v4l2_dev); + media_device_cleanup(&imgu->media_dev); + + return 0; +} + +void imgu_v4l2_buffer_done(struct vb2_buffer *vb, + enum vb2_buffer_state state) +{ + struct imgu_vb2_buffer *b = + container_of(vb, struct imgu_vb2_buffer, vbb.vb2_buf); + + list_del(&b->list); + vb2_buffer_done(&b->vbb.vb2_buf, state); +} diff --git a/drivers/staging/media/ipu3/ipu3.c b/drivers/staging/media/ipu3/ipu3.c new file mode 100644 index 000000000000..d575ac78c8f0 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3.c @@ -0,0 +1,829 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2017 - 2018 Intel Corporation + * Copyright 2017 Google LLC + * + * Based on Intel IPU4 driver. + * + */ + +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/pm_runtime.h> + +#include "ipu3.h" +#include "ipu3-dmamap.h" +#include "ipu3-mmu.h" + +#define IMGU_PCI_ID 0x1919 +#define IMGU_PCI_BAR 0 +#define IMGU_DMA_MASK DMA_BIT_MASK(39) +#define IMGU_MAX_QUEUE_DEPTH (2 + 2) + +/* + * pre-allocated buffer size for IMGU dummy buffers. Those + * values should be tuned to big enough to avoid buffer + * re-allocation when streaming to lower streaming latency. + */ +#define CSS_QUEUE_IN_BUF_SIZE 0 +#define CSS_QUEUE_PARAMS_BUF_SIZE 0 +#define CSS_QUEUE_OUT_BUF_SIZE (4160 * 3120 * 12 / 8) +#define CSS_QUEUE_VF_BUF_SIZE (1920 * 1080 * 12 / 8) +#define CSS_QUEUE_STAT_3A_BUF_SIZE sizeof(struct ipu3_uapi_stats_3a) + +static const size_t css_queue_buf_size_map[IPU3_CSS_QUEUES] = { + [IPU3_CSS_QUEUE_IN] = CSS_QUEUE_IN_BUF_SIZE, + [IPU3_CSS_QUEUE_PARAMS] = CSS_QUEUE_PARAMS_BUF_SIZE, + [IPU3_CSS_QUEUE_OUT] = CSS_QUEUE_OUT_BUF_SIZE, + [IPU3_CSS_QUEUE_VF] = CSS_QUEUE_VF_BUF_SIZE, + [IPU3_CSS_QUEUE_STAT_3A] = CSS_QUEUE_STAT_3A_BUF_SIZE, +}; + +static const struct imgu_node_mapping imgu_node_map[IMGU_NODE_NUM] = { + [IMGU_NODE_IN] = {IPU3_CSS_QUEUE_IN, "input"}, + [IMGU_NODE_PARAMS] = {IPU3_CSS_QUEUE_PARAMS, "parameters"}, + [IMGU_NODE_OUT] = {IPU3_CSS_QUEUE_OUT, "output"}, + [IMGU_NODE_VF] = {IPU3_CSS_QUEUE_VF, "viewfinder"}, + [IMGU_NODE_STAT_3A] = {IPU3_CSS_QUEUE_STAT_3A, "3a stat"}, +}; + +unsigned int imgu_node_to_queue(unsigned int node) +{ + return imgu_node_map[node].css_queue; +} + +unsigned int imgu_map_node(struct imgu_device *imgu, unsigned int css_queue) +{ + unsigned int i; + + for (i = 0; i < IMGU_NODE_NUM; i++) + if (imgu_node_map[i].css_queue == css_queue) + break; + + return i; +} + +/**************** Dummy buffers ****************/ + +static void imgu_dummybufs_cleanup(struct imgu_device *imgu, unsigned int pipe) +{ + unsigned int i; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + for (i = 0; i < IPU3_CSS_QUEUES; i++) + imgu_dmamap_free(imgu, + &imgu_pipe->queues[i].dmap); +} + +static int imgu_dummybufs_preallocate(struct imgu_device *imgu, + unsigned int pipe) +{ + unsigned int i; + size_t size; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + for (i = 0; i < IPU3_CSS_QUEUES; i++) { + size = css_queue_buf_size_map[i]; + /* + * Do not enable dummy buffers for master queue, + * always require that real buffers from user are + * available. + */ + if (i == IMGU_QUEUE_MASTER || size == 0) + continue; + + if (!imgu_dmamap_alloc(imgu, + &imgu_pipe->queues[i].dmap, size)) { + imgu_dummybufs_cleanup(imgu, pipe); + return -ENOMEM; + } + } + + return 0; +} + +static int imgu_dummybufs_init(struct imgu_device *imgu, unsigned int pipe) +{ + const struct v4l2_pix_format_mplane *mpix; + const struct v4l2_meta_format *meta; + unsigned int i, k, node; + size_t size; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + /* Allocate a dummy buffer for each queue where buffer is optional */ + for (i = 0; i < IPU3_CSS_QUEUES; i++) { + node = imgu_map_node(imgu, i); + if (!imgu_pipe->queue_enabled[node] || i == IMGU_QUEUE_MASTER) + continue; + + if (!imgu_pipe->nodes[IMGU_NODE_VF].enabled && + i == IPU3_CSS_QUEUE_VF) + /* + * Do not enable dummy buffers for VF if it is not + * requested by the user. + */ + continue; + + meta = &imgu_pipe->nodes[node].vdev_fmt.fmt.meta; + mpix = &imgu_pipe->nodes[node].vdev_fmt.fmt.pix_mp; + + if (node == IMGU_NODE_STAT_3A || node == IMGU_NODE_PARAMS) + size = meta->buffersize; + else + size = mpix->plane_fmt[0].sizeimage; + + if (imgu_css_dma_buffer_resize(imgu, + &imgu_pipe->queues[i].dmap, + size)) { + imgu_dummybufs_cleanup(imgu, pipe); + return -ENOMEM; + } + + for (k = 0; k < IMGU_MAX_QUEUE_DEPTH; k++) + imgu_css_buf_init(&imgu_pipe->queues[i].dummybufs[k], i, + imgu_pipe->queues[i].dmap.daddr); + } + + return 0; +} + +/* May be called from atomic context */ +static struct imgu_css_buffer *imgu_dummybufs_get(struct imgu_device *imgu, + int queue, unsigned int pipe) +{ + unsigned int i; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + /* dummybufs are not allocated for master q */ + if (queue == IPU3_CSS_QUEUE_IN) + return NULL; + + if (WARN_ON(!imgu_pipe->queues[queue].dmap.vaddr)) + /* Buffer should not be allocated here */ + return NULL; + + for (i = 0; i < IMGU_MAX_QUEUE_DEPTH; i++) + if (imgu_css_buf_state(&imgu_pipe->queues[queue].dummybufs[i]) != + IPU3_CSS_BUFFER_QUEUED) + break; + + if (i == IMGU_MAX_QUEUE_DEPTH) + return NULL; + + imgu_css_buf_init(&imgu_pipe->queues[queue].dummybufs[i], queue, + imgu_pipe->queues[queue].dmap.daddr); + + return &imgu_pipe->queues[queue].dummybufs[i]; +} + +/* Check if given buffer is a dummy buffer */ +static bool imgu_dummybufs_check(struct imgu_device *imgu, + struct imgu_css_buffer *buf, + unsigned int pipe) +{ + unsigned int i; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + for (i = 0; i < IMGU_MAX_QUEUE_DEPTH; i++) + if (buf == &imgu_pipe->queues[buf->queue].dummybufs[i]) + break; + + return i < IMGU_MAX_QUEUE_DEPTH; +} + +static void imgu_buffer_done(struct imgu_device *imgu, struct vb2_buffer *vb, + enum vb2_buffer_state state) +{ + mutex_lock(&imgu->lock); + imgu_v4l2_buffer_done(vb, state); + mutex_unlock(&imgu->lock); +} + +static struct imgu_css_buffer *imgu_queue_getbuf(struct imgu_device *imgu, + unsigned int node, + unsigned int pipe) +{ + struct imgu_buffer *buf; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + if (WARN_ON(node >= IMGU_NODE_NUM)) + return NULL; + + /* Find first free buffer from the node */ + list_for_each_entry(buf, &imgu_pipe->nodes[node].buffers, vid_buf.list) { + if (imgu_css_buf_state(&buf->css_buf) == IPU3_CSS_BUFFER_NEW) + return &buf->css_buf; + } + + /* There were no free buffers, try to return a dummy buffer */ + return imgu_dummybufs_get(imgu, imgu_node_map[node].css_queue, pipe); +} + +/* + * Queue as many buffers to CSS as possible. If all buffers don't fit into + * CSS buffer queues, they remain unqueued and will be queued later. + */ +int imgu_queue_buffers(struct imgu_device *imgu, bool initial, unsigned int pipe) +{ + unsigned int node; + int r = 0; + struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; + + if (!imgu_css_is_streaming(&imgu->css)) + return 0; + + dev_dbg(&imgu->pci_dev->dev, "Queue buffers to pipe %d", pipe); + mutex_lock(&imgu->lock); + + /* Buffer set is queued to FW only when input buffer is ready */ + for (node = IMGU_NODE_NUM - 1; + imgu_queue_getbuf(imgu, IMGU_NODE_IN, pipe); + node = node ? node - 1 : IMGU_NODE_NUM - 1) { + + if (node == IMGU_NODE_VF && + !imgu_pipe->nodes[IMGU_NODE_VF].enabled) { + dev_warn(&imgu->pci_dev->dev, + "Vf not enabled, ignore queue"); + continue; + } else if (imgu_pipe->queue_enabled[node]) { + struct imgu_css_buffer *buf = + imgu_queue_getbuf(imgu, node, pipe); + struct imgu_buffer *ibuf = NULL; + bool dummy; + + if (!buf) + break; + + r = imgu_css_buf_queue(&imgu->css, pipe, buf); + if (r) + break; + dummy = imgu_dummybufs_check(imgu, buf, pipe); + if (!dummy) + ibuf = container_of(buf, struct imgu_buffer, + css_buf); + dev_dbg(&imgu->pci_dev->dev, + "queue %s %s buffer %u to css da: 0x%08x\n", + dummy ? "dummy" : "user", + imgu_node_map[node].name, + dummy ? 0 : ibuf->vid_buf.vbb.vb2_buf.index, + (u32)buf->daddr); + } + } + mutex_unlock(&imgu->lock); + + if (r && r != -EBUSY) + goto failed; + + return 0; + +failed: + /* + * On error, mark all buffers as failed which are not + * yet queued to CSS + */ + dev_err(&imgu->pci_dev->dev, + "failed to queue buffer to CSS on queue %i (%d)\n", + node, r); + + if (initial) + /* If we were called from streamon(), no need to finish bufs */ + return r; + + for (node = 0; node < IMGU_NODE_NUM; node++) { + struct imgu_buffer *buf, *buf0; + + if (!imgu_pipe->queue_enabled[node]) + continue; /* Skip disabled queues */ + + mutex_lock(&imgu->lock); + list_for_each_entry_safe(buf, buf0, + &imgu_pipe->nodes[node].buffers, + vid_buf.list) { + if (imgu_css_buf_state(&buf->css_buf) == + IPU3_CSS_BUFFER_QUEUED) + continue; /* Was already queued, skip */ + + imgu_v4l2_buffer_done(&buf->vid_buf.vbb.vb2_buf, + VB2_BUF_STATE_ERROR); + } + mutex_unlock(&imgu->lock); + } + + return r; +} + +static int imgu_powerup(struct imgu_device *imgu) +{ + int r; + + r = imgu_css_set_powerup(&imgu->pci_dev->dev, imgu->base); + if (r) + return r; + + imgu_mmu_resume(imgu->mmu); + return 0; +} + +static void imgu_powerdown(struct imgu_device *imgu) +{ + imgu_mmu_suspend(imgu->mmu); + imgu_css_set_powerdown(&imgu->pci_dev->dev, imgu->base); +} + +int imgu_s_stream(struct imgu_device *imgu, int enable) +{ + struct device *dev = &imgu->pci_dev->dev; + int r, pipe; + + if (!enable) { + /* Stop streaming */ + dev_dbg(dev, "stream off\n"); + /* Block new buffers to be queued to CSS. */ + atomic_set(&imgu->qbuf_barrier, 1); + imgu_css_stop_streaming(&imgu->css); + synchronize_irq(imgu->pci_dev->irq); + atomic_set(&imgu->qbuf_barrier, 0); + imgu_powerdown(imgu); + pm_runtime_put(&imgu->pci_dev->dev); + + return 0; + } + + /* Set Power */ + r = pm_runtime_get_sync(dev); + if (r < 0) { + dev_err(dev, "failed to set imgu power\n"); + pm_runtime_put(dev); + return r; + } + + r = imgu_powerup(imgu); + if (r) { + dev_err(dev, "failed to power up imgu\n"); + pm_runtime_put(dev); + return r; + } + + /* Start CSS streaming */ + r = imgu_css_start_streaming(&imgu->css); + if (r) { + dev_err(dev, "failed to start css streaming (%d)", r); + goto fail_start_streaming; + } + + for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) { + /* Initialize dummy buffers */ + r = imgu_dummybufs_init(imgu, pipe); + if (r) { + dev_err(dev, "failed to initialize dummy buffers (%d)", r); + goto fail_dummybufs; + } + + /* Queue as many buffers from queue as possible */ + r = imgu_queue_buffers(imgu, true, pipe); + if (r) { + dev_err(dev, "failed to queue initial buffers (%d)", r); + goto fail_queueing; + } + } + + return 0; +fail_queueing: + for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) + imgu_dummybufs_cleanup(imgu, pipe); +fail_dummybufs: + imgu_css_stop_streaming(&imgu->css); +fail_start_streaming: + pm_runtime_put(dev); + + return r; +} + +static int imgu_video_nodes_init(struct imgu_device *imgu) +{ + struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES] = { NULL }; + struct v4l2_rect *rects[IPU3_CSS_RECTS] = { NULL }; + struct imgu_media_pipe *imgu_pipe; + unsigned int i, j; + int r; + + imgu->buf_struct_size = sizeof(struct imgu_buffer); + + for (j = 0; j < IMGU_MAX_PIPE_NUM; j++) { + imgu_pipe = &imgu->imgu_pipe[j]; + + for (i = 0; i < IMGU_NODE_NUM; i++) { + imgu_pipe->nodes[i].name = imgu_node_map[i].name; + imgu_pipe->nodes[i].output = i < IMGU_QUEUE_FIRST_INPUT; + imgu_pipe->nodes[i].enabled = false; + + if (i != IMGU_NODE_PARAMS && i != IMGU_NODE_STAT_3A) + fmts[imgu_node_map[i].css_queue] = + &imgu_pipe->nodes[i].vdev_fmt.fmt.pix_mp; + atomic_set(&imgu_pipe->nodes[i].sequence, 0); + } + } + + r = imgu_v4l2_register(imgu); + if (r) + return r; + + /* Set initial formats and initialize formats of video nodes */ + for (j = 0; j < IMGU_MAX_PIPE_NUM; j++) { + imgu_pipe = &imgu->imgu_pipe[j]; + + rects[IPU3_CSS_RECT_EFFECTIVE] = &imgu_pipe->imgu_sd.rect.eff; + rects[IPU3_CSS_RECT_BDS] = &imgu_pipe->imgu_sd.rect.bds; + imgu_css_fmt_set(&imgu->css, fmts, rects, j); + + /* Pre-allocate dummy buffers */ + r = imgu_dummybufs_preallocate(imgu, j); + if (r) { + dev_err(&imgu->pci_dev->dev, + "failed to pre-allocate dummy buffers (%d)", r); + goto out_cleanup; + } + } + + return 0; + +out_cleanup: + for (j = 0; j < IMGU_MAX_PIPE_NUM; j++) + imgu_dummybufs_cleanup(imgu, j); + + imgu_v4l2_unregister(imgu); + + return r; +} + +static void imgu_video_nodes_exit(struct imgu_device *imgu) +{ + int i; + + for (i = 0; i < IMGU_MAX_PIPE_NUM; i++) + imgu_dummybufs_cleanup(imgu, i); + + imgu_v4l2_unregister(imgu); +} + +/**************** PCI interface ****************/ + +static irqreturn_t imgu_isr_threaded(int irq, void *imgu_ptr) +{ + struct imgu_device *imgu = imgu_ptr; + struct imgu_media_pipe *imgu_pipe; + int p; + + /* Dequeue / queue buffers */ + do { + u64 ns = ktime_get_ns(); + struct imgu_css_buffer *b; + struct imgu_buffer *buf = NULL; + unsigned int node, pipe; + bool dummy; + + do { + mutex_lock(&imgu->lock); + b = imgu_css_buf_dequeue(&imgu->css); + mutex_unlock(&imgu->lock); + } while (PTR_ERR(b) == -EAGAIN); + + if (IS_ERR(b)) { + if (PTR_ERR(b) != -EBUSY) /* All done */ + dev_err(&imgu->pci_dev->dev, + "failed to dequeue buffers (%ld)\n", + PTR_ERR(b)); + break; + } + + node = imgu_map_node(imgu, b->queue); + pipe = b->pipe; + dummy = imgu_dummybufs_check(imgu, b, pipe); + if (!dummy) + buf = container_of(b, struct imgu_buffer, css_buf); + dev_dbg(&imgu->pci_dev->dev, + "dequeue %s %s buffer %d daddr 0x%x from css\n", + dummy ? "dummy" : "user", + imgu_node_map[node].name, + dummy ? 0 : buf->vid_buf.vbb.vb2_buf.index, + (u32)b->daddr); + + if (dummy) + /* It was a dummy buffer, skip it */ + continue; + + /* Fill vb2 buffer entries and tell it's ready */ + imgu_pipe = &imgu->imgu_pipe[pipe]; + if (!imgu_pipe->nodes[node].output) { + buf->vid_buf.vbb.vb2_buf.timestamp = ns; + buf->vid_buf.vbb.field = V4L2_FIELD_NONE; + buf->vid_buf.vbb.sequence = + atomic_inc_return( + &imgu_pipe->nodes[node].sequence); + dev_dbg(&imgu->pci_dev->dev, "vb2 buffer sequence %d", + buf->vid_buf.vbb.sequence); + } + imgu_buffer_done(imgu, &buf->vid_buf.vbb.vb2_buf, + imgu_css_buf_state(&buf->css_buf) == + IPU3_CSS_BUFFER_DONE ? + VB2_BUF_STATE_DONE : + VB2_BUF_STATE_ERROR); + mutex_lock(&imgu->lock); + if (imgu_css_queue_empty(&imgu->css)) + wake_up_all(&imgu->buf_drain_wq); + mutex_unlock(&imgu->lock); + } while (1); + + /* + * Try to queue more buffers for CSS. + * qbuf_barrier is used to disable new buffers + * to be queued to CSS. + */ + if (!atomic_read(&imgu->qbuf_barrier)) + for_each_set_bit(p, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) + imgu_queue_buffers(imgu, false, p); + + return IRQ_HANDLED; +} + +static irqreturn_t imgu_isr(int irq, void *imgu_ptr) +{ + struct imgu_device *imgu = imgu_ptr; + + /* acknowledge interruption */ + if (imgu_css_irq_ack(&imgu->css) < 0) + return IRQ_NONE; + + return IRQ_WAKE_THREAD; +} + +static int imgu_pci_config_setup(struct pci_dev *dev) +{ + u16 pci_command; + int r = pci_enable_msi(dev); + + if (r) { + dev_err(&dev->dev, "failed to enable MSI (%d)\n", r); + return r; + } + + pci_read_config_word(dev, PCI_COMMAND, &pci_command); + pci_command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | + PCI_COMMAND_INTX_DISABLE; + pci_write_config_word(dev, PCI_COMMAND, pci_command); + + return 0; +} + +static int imgu_pci_probe(struct pci_dev *pci_dev, + const struct pci_device_id *id) +{ + struct imgu_device *imgu; + phys_addr_t phys; + unsigned long phys_len; + void __iomem *const *iomap; + int r; + + imgu = devm_kzalloc(&pci_dev->dev, sizeof(*imgu), GFP_KERNEL); + if (!imgu) + return -ENOMEM; + + imgu->pci_dev = pci_dev; + + r = pcim_enable_device(pci_dev); + if (r) { + dev_err(&pci_dev->dev, "failed to enable device (%d)\n", r); + return r; + } + + dev_info(&pci_dev->dev, "device 0x%x (rev: 0x%x)\n", + pci_dev->device, pci_dev->revision); + + phys = pci_resource_start(pci_dev, IMGU_PCI_BAR); + phys_len = pci_resource_len(pci_dev, IMGU_PCI_BAR); + + r = pcim_iomap_regions(pci_dev, 1 << IMGU_PCI_BAR, pci_name(pci_dev)); + if (r) { + dev_err(&pci_dev->dev, "failed to remap I/O memory (%d)\n", r); + return r; + } + dev_info(&pci_dev->dev, "physical base address %pap, %lu bytes\n", + &phys, phys_len); + + iomap = pcim_iomap_table(pci_dev); + if (!iomap) { + dev_err(&pci_dev->dev, "failed to iomap table\n"); + return -ENODEV; + } + + imgu->base = iomap[IMGU_PCI_BAR]; + + pci_set_drvdata(pci_dev, imgu); + + pci_set_master(pci_dev); + + r = dma_coerce_mask_and_coherent(&pci_dev->dev, IMGU_DMA_MASK); + if (r) { + dev_err(&pci_dev->dev, "failed to set DMA mask (%d)\n", r); + return -ENODEV; + } + + r = imgu_pci_config_setup(pci_dev); + if (r) + return r; + + mutex_init(&imgu->lock); + atomic_set(&imgu->qbuf_barrier, 0); + init_waitqueue_head(&imgu->buf_drain_wq); + + r = imgu_css_set_powerup(&pci_dev->dev, imgu->base); + if (r) { + dev_err(&pci_dev->dev, + "failed to power up CSS (%d)\n", r); + goto out_mutex_destroy; + } + + imgu->mmu = imgu_mmu_init(&pci_dev->dev, imgu->base); + if (IS_ERR(imgu->mmu)) { + r = PTR_ERR(imgu->mmu); + dev_err(&pci_dev->dev, "failed to initialize MMU (%d)\n", r); + goto out_css_powerdown; + } + + r = imgu_dmamap_init(imgu); + if (r) { + dev_err(&pci_dev->dev, + "failed to initialize DMA mapping (%d)\n", r); + goto out_mmu_exit; + } + + /* ISP programming */ + r = imgu_css_init(&pci_dev->dev, &imgu->css, imgu->base, phys_len); + if (r) { + dev_err(&pci_dev->dev, "failed to initialize CSS (%d)\n", r); + goto out_dmamap_exit; + } + + /* v4l2 sub-device registration */ + r = imgu_video_nodes_init(imgu); + if (r) { + dev_err(&pci_dev->dev, "failed to create V4L2 devices (%d)\n", + r); + goto out_css_cleanup; + } + + r = devm_request_threaded_irq(&pci_dev->dev, pci_dev->irq, + imgu_isr, imgu_isr_threaded, + IRQF_SHARED, IMGU_NAME, imgu); + if (r) { + dev_err(&pci_dev->dev, "failed to request IRQ (%d)\n", r); + goto out_video_exit; + } + + pm_runtime_put_noidle(&pci_dev->dev); + pm_runtime_allow(&pci_dev->dev); + + return 0; + +out_video_exit: + imgu_video_nodes_exit(imgu); +out_css_cleanup: + imgu_css_cleanup(&imgu->css); +out_dmamap_exit: + imgu_dmamap_exit(imgu); +out_mmu_exit: + imgu_mmu_exit(imgu->mmu); +out_css_powerdown: + imgu_css_set_powerdown(&pci_dev->dev, imgu->base); +out_mutex_destroy: + mutex_destroy(&imgu->lock); + + return r; +} + +static void imgu_pci_remove(struct pci_dev *pci_dev) +{ + struct imgu_device *imgu = pci_get_drvdata(pci_dev); + + pm_runtime_forbid(&pci_dev->dev); + pm_runtime_get_noresume(&pci_dev->dev); + + imgu_video_nodes_exit(imgu); + imgu_css_cleanup(&imgu->css); + imgu_css_set_powerdown(&pci_dev->dev, imgu->base); + imgu_dmamap_exit(imgu); + imgu_mmu_exit(imgu->mmu); + mutex_destroy(&imgu->lock); +} + +static int __maybe_unused imgu_suspend(struct device *dev) +{ + struct pci_dev *pci_dev = to_pci_dev(dev); + struct imgu_device *imgu = pci_get_drvdata(pci_dev); + + dev_dbg(dev, "enter %s\n", __func__); + imgu->suspend_in_stream = imgu_css_is_streaming(&imgu->css); + if (!imgu->suspend_in_stream) + goto out; + /* Block new buffers to be queued to CSS. */ + atomic_set(&imgu->qbuf_barrier, 1); + /* + * Wait for currently running irq handler to be done so that + * no new buffers will be queued to fw later. + */ + synchronize_irq(pci_dev->irq); + /* Wait until all buffers in CSS are done. */ + if (!wait_event_timeout(imgu->buf_drain_wq, + imgu_css_queue_empty(&imgu->css), msecs_to_jiffies(1000))) + dev_err(dev, "wait buffer drain timeout.\n"); + + imgu_css_stop_streaming(&imgu->css); + atomic_set(&imgu->qbuf_barrier, 0); + imgu_powerdown(imgu); + pm_runtime_force_suspend(dev); +out: + dev_dbg(dev, "leave %s\n", __func__); + return 0; +} + +static int __maybe_unused imgu_resume(struct device *dev) +{ + struct pci_dev *pci_dev = to_pci_dev(dev); + struct imgu_device *imgu = pci_get_drvdata(pci_dev); + int r = 0; + unsigned int pipe; + + dev_dbg(dev, "enter %s\n", __func__); + + if (!imgu->suspend_in_stream) + goto out; + + pm_runtime_force_resume(dev); + + r = imgu_powerup(imgu); + if (r) { + dev_err(dev, "failed to power up imgu\n"); + goto out; + } + + /* Start CSS streaming */ + r = imgu_css_start_streaming(&imgu->css); + if (r) { + dev_err(dev, "failed to resume css streaming (%d)", r); + goto out; + } + + for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) { + r = imgu_queue_buffers(imgu, true, pipe); + if (r) + dev_err(dev, "failed to queue buffers to pipe %d (%d)", + pipe, r); + } + +out: + dev_dbg(dev, "leave %s\n", __func__); + + return r; +} + +/* + * PCI rpm framework checks the existence of driver rpm callbacks. + * Place a dummy callback here to avoid rpm going into error state. + */ +static int imgu_rpm_dummy_cb(struct device *dev) +{ + return 0; +} + +static const struct dev_pm_ops imgu_pm_ops = { + SET_RUNTIME_PM_OPS(&imgu_rpm_dummy_cb, &imgu_rpm_dummy_cb, NULL) + SET_SYSTEM_SLEEP_PM_OPS(&imgu_suspend, &imgu_resume) +}; + +static const struct pci_device_id imgu_pci_tbl[] = { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, IMGU_PCI_ID) }, + { 0, } +}; + +MODULE_DEVICE_TABLE(pci, imgu_pci_tbl); + +static struct pci_driver imgu_pci_driver = { + .name = IMGU_NAME, + .id_table = imgu_pci_tbl, + .probe = imgu_pci_probe, + .remove = imgu_pci_remove, + .driver = { + .pm = &imgu_pm_ops, + }, +}; + +module_pci_driver(imgu_pci_driver); + +MODULE_AUTHOR("Tuukka Toivonen <tuukka.toivonen@intel.com>"); +MODULE_AUTHOR("Tianshu Qiu <tian.shu.qiu@intel.com>"); +MODULE_AUTHOR("Jian Xu Zheng <jian.xu.zheng@intel.com>"); +MODULE_AUTHOR("Yuning Pu <yuning.pu@intel.com>"); +MODULE_AUTHOR("Yong Zhi <yong.zhi@intel.com>"); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("Intel ipu3_imgu PCI driver"); diff --git a/drivers/staging/media/ipu3/ipu3.h b/drivers/staging/media/ipu3/ipu3.h new file mode 100644 index 000000000000..73b123b2b8a2 --- /dev/null +++ b/drivers/staging/media/ipu3/ipu3.h @@ -0,0 +1,168 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2018 Intel Corporation */ + +#ifndef __IPU3_H +#define __IPU3_H + +#include <linux/iova.h> +#include <linux/pci.h> + +#include <media/v4l2-ctrls.h> +#include <media/v4l2-device.h> +#include <media/videobuf2-dma-sg.h> + +#include "ipu3-css.h" + +#define IMGU_NAME "ipu3-imgu" + +/* + * The semantics of the driver is that whenever there is a buffer available in + * master queue, the driver queues a buffer also to all other active nodes. + * If user space hasn't provided a buffer to all other video nodes first, + * the driver gets an internal dummy buffer and queues it. + */ +#define IMGU_QUEUE_MASTER IPU3_CSS_QUEUE_IN +#define IMGU_QUEUE_FIRST_INPUT IPU3_CSS_QUEUE_OUT +#define IMGU_MAX_QUEUE_DEPTH (2 + 2) + +#define IMGU_NODE_IN 0 /* Input RAW image */ +#define IMGU_NODE_PARAMS 1 /* Input parameters */ +#define IMGU_NODE_OUT 2 /* Main output for still or video */ +#define IMGU_NODE_VF 3 /* Preview */ +#define IMGU_NODE_STAT_3A 4 /* 3A statistics */ +#define IMGU_NODE_NUM 5 + +#define file_to_intel_imgu_node(__file) \ + container_of(video_devdata(__file), struct imgu_video_device, vdev) + +#define IPU3_INPUT_MIN_WIDTH 0U +#define IPU3_INPUT_MIN_HEIGHT 0U +#define IPU3_INPUT_MAX_WIDTH 5120U +#define IPU3_INPUT_MAX_HEIGHT 38404U +#define IPU3_OUTPUT_MIN_WIDTH 2U +#define IPU3_OUTPUT_MIN_HEIGHT 2U +#define IPU3_OUTPUT_MAX_WIDTH 4480U +#define IPU3_OUTPUT_MAX_HEIGHT 34004U + +struct imgu_vb2_buffer { + /* Public fields */ + struct vb2_v4l2_buffer vbb; /* Must be the first field */ + + /* Private fields */ + struct list_head list; +}; + +struct imgu_buffer { + struct imgu_vb2_buffer vid_buf; /* Must be the first field */ + struct imgu_css_buffer css_buf; + struct imgu_css_map map; +}; + +struct imgu_node_mapping { + unsigned int css_queue; + const char *name; +}; + +/** + * struct imgu_video_device + * each node registers as video device and maintains its + * own vb2_queue. + */ +struct imgu_video_device { + const char *name; + bool output; + bool enabled; + struct v4l2_format vdev_fmt; /* Currently set format */ + + /* Private fields */ + struct video_device vdev; + struct media_pad vdev_pad; + struct v4l2_mbus_framefmt pad_fmt; + struct vb2_queue vbq; + struct list_head buffers; + /* Protect vb2_queue and vdev structs*/ + struct mutex lock; + atomic_t sequence; + unsigned int id; + unsigned int pipe; +}; + +struct imgu_v4l2_subdev { + unsigned int pipe; + struct v4l2_subdev subdev; + struct media_pad subdev_pads[IMGU_NODE_NUM]; + struct { + struct v4l2_rect eff; /* effective resolution */ + struct v4l2_rect bds; /* bayer-domain scaled resolution*/ + struct v4l2_rect gdc; /* gdc output resolution */ + } rect; + struct v4l2_ctrl_handler ctrl_handler; + struct v4l2_ctrl *ctrl; + atomic_t running_mode; + bool active; +}; + +struct imgu_media_pipe { + unsigned int pipe; + + /* Internally enabled queues */ + struct { + struct imgu_css_map dmap; + struct imgu_css_buffer dummybufs[IMGU_MAX_QUEUE_DEPTH]; + } queues[IPU3_CSS_QUEUES]; + struct imgu_video_device nodes[IMGU_NODE_NUM]; + bool queue_enabled[IMGU_NODE_NUM]; + struct media_pipeline pipeline; + struct imgu_v4l2_subdev imgu_sd; +}; + +/* + * imgu_device -- ImgU (Imaging Unit) driver + */ +struct imgu_device { + struct pci_dev *pci_dev; + void __iomem *base; + + /* Public fields, fill before registering */ + unsigned int buf_struct_size; + bool streaming; /* Public read only */ + + struct imgu_media_pipe imgu_pipe[IMGU_MAX_PIPE_NUM]; + + /* Private fields */ + struct v4l2_device v4l2_dev; + struct media_device media_dev; + struct v4l2_file_operations v4l2_file_ops; + + /* MMU driver for css */ + struct imgu_mmu_info *mmu; + struct iova_domain iova_domain; + + /* css - Camera Sub-System */ + struct imgu_css css; + + /* + * Coarse-grained lock to protect + * vid_buf.list and css->queue + */ + struct mutex lock; + /* Forbid streaming and buffer queuing during system suspend. */ + atomic_t qbuf_barrier; + /* Indicate if system suspend take place while imgu is streaming. */ + bool suspend_in_stream; + /* Used to wait for FW buffer queue drain. */ + wait_queue_head_t buf_drain_wq; +}; + +unsigned int imgu_node_to_queue(unsigned int node); +unsigned int imgu_map_node(struct imgu_device *imgu, unsigned int css_queue); +int imgu_queue_buffers(struct imgu_device *imgu, bool initial, + unsigned int pipe); + +int imgu_v4l2_register(struct imgu_device *dev); +int imgu_v4l2_unregister(struct imgu_device *dev); +void imgu_v4l2_buffer_done(struct vb2_buffer *vb, enum vb2_buffer_state state); + +int imgu_s_stream(struct imgu_device *imgu, int enable); + +#endif diff --git a/drivers/staging/media/omap4iss/iss_csi2.c b/drivers/staging/media/omap4iss/iss_csi2.c index 059cf5bd3c36..a6dc2d2b1228 100644 --- a/drivers/staging/media/omap4iss/iss_csi2.c +++ b/drivers/staging/media/omap4iss/iss_csi2.c @@ -712,7 +712,7 @@ static void csi2_isr_ctx(struct iss_csi2_device *csi2, /* Skip interrupts until we reach the frame skip count. The CSI2 will be * automatically disabled, as the frame skip count has been programmed - * in the CSI2_CTx_CTRL1::COUNT field, so reenable it. + * in the CSI2_CTx_CTRL1::COUNT field, so re-enable it. * * It would have been nice to rely on the FRAME_NUMBER interrupt instead * but it turned out that the interrupt is only generated when the CSI2 diff --git a/drivers/staging/media/rockchip/vpu/Kconfig b/drivers/staging/media/rockchip/vpu/Kconfig new file mode 100644 index 000000000000..9a6fc1378242 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/Kconfig @@ -0,0 +1,13 @@ +config VIDEO_ROCKCHIP_VPU + tristate "Rockchip VPU driver" + depends on ARCH_ROCKCHIP || COMPILE_TEST + depends on VIDEO_DEV && VIDEO_V4L2 && MEDIA_CONTROLLER + select VIDEOBUF2_DMA_CONTIG + select VIDEOBUF2_VMALLOC + select V4L2_MEM2MEM_DEV + default n + help + Support for the Video Processing Unit present on Rockchip SoC, + which accelerates video and image encoding and decoding. + To compile this driver as a module, choose M here: the module + will be called rockchip-vpu. diff --git a/drivers/staging/media/rockchip/vpu/Makefile b/drivers/staging/media/rockchip/vpu/Makefile new file mode 100644 index 000000000000..e9d733bb7632 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/Makefile @@ -0,0 +1,10 @@ +obj-$(CONFIG_VIDEO_ROCKCHIP_VPU) += rockchip-vpu.o + +rockchip-vpu-y += \ + rockchip_vpu_drv.o \ + rockchip_vpu_enc.o \ + rk3288_vpu_hw.o \ + rk3288_vpu_hw_jpeg_enc.o \ + rk3399_vpu_hw.o \ + rk3399_vpu_hw_jpeg_enc.o \ + rockchip_vpu_jpeg.o diff --git a/drivers/staging/media/rockchip/vpu/TODO b/drivers/staging/media/rockchip/vpu/TODO new file mode 100644 index 000000000000..fa0c94057007 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/TODO @@ -0,0 +1,13 @@ +* Support for VP8, VP9 and H264 is planned for this driver. + + Given the V4L controls for those CODECs will be part of + the uABI, it will be required to have the driver in staging. + + For this reason, we are keeping this driver in staging for now. + +* Add support for the S_SELECTION API. + See the comment for VEPU_REG_ENC_OVER_FILL_STRM_OFFSET. + +* Instead of having a DMA bounce buffer, it could be possible to use a + normal buffer and memmove() the payload to make space for the header. + This might need to use extra JPEG markers for padding reasons. diff --git a/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw.c b/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw.c new file mode 100644 index 000000000000..a5e9d183fffd --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw.c @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip VPU codec driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Jeffy Chen <jeffy.chen@rock-chips.com> + */ + +#include <linux/clk.h> + +#include "rockchip_vpu.h" +#include "rockchip_vpu_jpeg.h" +#include "rk3288_vpu_regs.h" + +#define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000) + +/* + * Supported formats. + */ + +static const struct rockchip_vpu_fmt rk3288_vpu_enc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_YUV420M, + .codec_mode = RK_VPU_MODE_NONE, + .enc_fmt = RK3288_VPU_ENC_FMT_YUV420P, + }, + { + .fourcc = V4L2_PIX_FMT_NV12M, + .codec_mode = RK_VPU_MODE_NONE, + .enc_fmt = RK3288_VPU_ENC_FMT_YUV420SP, + }, + { + .fourcc = V4L2_PIX_FMT_YUYV, + .codec_mode = RK_VPU_MODE_NONE, + .enc_fmt = RK3288_VPU_ENC_FMT_YUYV422, + }, + { + .fourcc = V4L2_PIX_FMT_UYVY, + .codec_mode = RK_VPU_MODE_NONE, + .enc_fmt = RK3288_VPU_ENC_FMT_UYVY422, + }, + { + .fourcc = V4L2_PIX_FMT_JPEG, + .codec_mode = RK_VPU_MODE_JPEG_ENC, + .max_depth = 2, + .header_size = JPEG_HEADER_SIZE, + .frmsize = { + .min_width = 96, + .max_width = 8192, + .step_width = JPEG_MB_DIM, + .min_height = 32, + .max_height = 8192, + .step_height = JPEG_MB_DIM, + }, + }, +}; + +static irqreturn_t rk3288_vepu_irq(int irq, void *dev_id) +{ + struct rockchip_vpu_dev *vpu = dev_id; + enum vb2_buffer_state state; + u32 status, bytesused; + + status = vepu_read(vpu, VEPU_REG_INTERRUPT); + bytesused = vepu_read(vpu, VEPU_REG_STR_BUF_LIMIT) / 8; + state = (status & VEPU_REG_INTERRUPT_FRAME_RDY) ? + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; + + vepu_write(vpu, 0, VEPU_REG_INTERRUPT); + vepu_write(vpu, 0, VEPU_REG_AXI_CTRL); + + rockchip_vpu_irq_done(vpu, bytesused, state); + + return IRQ_HANDLED; +} + +static int rk3288_vpu_hw_init(struct rockchip_vpu_dev *vpu) +{ + /* Bump ACLK to max. possible freq. to improve performance. */ + clk_set_rate(vpu->clocks[0].clk, RK3288_ACLK_MAX_FREQ); + return 0; +} + +static void rk3288_vpu_enc_reset(struct rockchip_vpu_ctx *ctx) +{ + struct rockchip_vpu_dev *vpu = ctx->dev; + + vepu_write(vpu, VEPU_REG_INTERRUPT_DIS_BIT, VEPU_REG_INTERRUPT); + vepu_write(vpu, 0, VEPU_REG_ENC_CTRL); + vepu_write(vpu, 0, VEPU_REG_AXI_CTRL); +} + +/* + * Supported codec ops. + */ + +static const struct rockchip_vpu_codec_ops rk3288_vpu_codec_ops[] = { + [RK_VPU_MODE_JPEG_ENC] = { + .run = rk3288_vpu_jpeg_enc_run, + .reset = rk3288_vpu_enc_reset, + }, +}; + +/* + * VPU variant. + */ + +const struct rockchip_vpu_variant rk3288_vpu_variant = { + .enc_offset = 0x0, + .enc_fmts = rk3288_vpu_enc_fmts, + .num_enc_fmts = ARRAY_SIZE(rk3288_vpu_enc_fmts), + .codec_ops = rk3288_vpu_codec_ops, + .codec = RK_VPU_CODEC_JPEG, + .vepu_irq = rk3288_vepu_irq, + .init = rk3288_vpu_hw_init, + .clk_names = {"aclk", "hclk"}, + .num_clocks = 2 +}; diff --git a/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw_jpeg_enc.c b/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw_jpeg_enc.c new file mode 100644 index 000000000000..06daea66fb49 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw_jpeg_enc.c @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip VPU codec driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + */ + +#include <asm/unaligned.h> +#include <media/v4l2-mem2mem.h> +#include "rockchip_vpu_jpeg.h" +#include "rockchip_vpu.h" +#include "rockchip_vpu_common.h" +#include "rockchip_vpu_hw.h" +#include "rk3288_vpu_regs.h" + +#define VEPU_JPEG_QUANT_TABLE_COUNT 16 + +static void rk3288_vpu_set_src_img_ctrl(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) +{ + struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt; + u32 reg; + + reg = VEPU_REG_IN_IMG_CTRL_ROW_LEN(pix_fmt->width) + | VEPU_REG_IN_IMG_CTRL_OVRFLR_D4(0) + | VEPU_REG_IN_IMG_CTRL_OVRFLB_D4(0) + | VEPU_REG_IN_IMG_CTRL_FMT(ctx->vpu_src_fmt->enc_fmt); + vepu_write_relaxed(vpu, reg, VEPU_REG_IN_IMG_CTRL); +} + +static void rk3288_vpu_jpeg_enc_set_buffers(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx, + struct vb2_buffer *src_buf) +{ + struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt; + dma_addr_t src[3]; + + WARN_ON(pix_fmt->num_planes > 3); + + vepu_write_relaxed(vpu, ctx->bounce_dma_addr, + VEPU_REG_ADDR_OUTPUT_STREAM); + vepu_write_relaxed(vpu, ctx->bounce_size, + VEPU_REG_STR_BUF_LIMIT); + + if (pix_fmt->num_planes == 1) { + src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0); + /* single plane formats we supported are all interlaced */ + vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0); + } else if (pix_fmt->num_planes == 2) { + src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0); + src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1); + vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0); + vepu_write_relaxed(vpu, src[1], VEPU_REG_ADDR_IN_PLANE_1); + } else { + src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0); + src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1); + src[2] = vb2_dma_contig_plane_dma_addr(src_buf, 2); + vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0); + vepu_write_relaxed(vpu, src[1], VEPU_REG_ADDR_IN_PLANE_1); + vepu_write_relaxed(vpu, src[2], VEPU_REG_ADDR_IN_PLANE_2); + } +} + +static void +rk3288_vpu_jpeg_enc_set_qtable(struct rockchip_vpu_dev *vpu, + unsigned char *luma_qtable, + unsigned char *chroma_qtable) +{ + u32 reg, i; + + for (i = 0; i < VEPU_JPEG_QUANT_TABLE_COUNT; i++) { + reg = get_unaligned_be32(&luma_qtable[i]); + vepu_write_relaxed(vpu, reg, VEPU_REG_JPEG_LUMA_QUAT(i)); + + reg = get_unaligned_be32(&chroma_qtable[i]); + vepu_write_relaxed(vpu, reg, VEPU_REG_JPEG_CHROMA_QUAT(i)); + } +} + +void rk3288_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) +{ + struct rockchip_vpu_dev *vpu = ctx->dev; + struct vb2_v4l2_buffer *src_buf, *dst_buf; + struct rockchip_vpu_jpeg_ctx jpeg_ctx; + u32 reg; + + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + + memset(&jpeg_ctx, 0, sizeof(jpeg_ctx)); + jpeg_ctx.buffer = vb2_plane_vaddr(&dst_buf->vb2_buf, 0); + jpeg_ctx.width = ctx->dst_fmt.width; + jpeg_ctx.height = ctx->dst_fmt.height; + jpeg_ctx.quality = ctx->jpeg_quality; + rockchip_vpu_jpeg_header_assemble(&jpeg_ctx); + + /* Switch to JPEG encoder mode before writing registers */ + vepu_write_relaxed(vpu, VEPU_REG_ENC_CTRL_ENC_MODE_JPEG, + VEPU_REG_ENC_CTRL); + + rk3288_vpu_set_src_img_ctrl(vpu, ctx); + rk3288_vpu_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); + rk3288_vpu_jpeg_enc_set_qtable(vpu, + rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 0), + rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 1)); + + reg = VEPU_REG_AXI_CTRL_OUTPUT_SWAP16 + | VEPU_REG_AXI_CTRL_INPUT_SWAP16 + | VEPU_REG_AXI_CTRL_BURST_LEN(16) + | VEPU_REG_AXI_CTRL_OUTPUT_SWAP32 + | VEPU_REG_AXI_CTRL_INPUT_SWAP32 + | VEPU_REG_AXI_CTRL_OUTPUT_SWAP8 + | VEPU_REG_AXI_CTRL_INPUT_SWAP8; + /* Make sure that all registers are written at this point. */ + vepu_write(vpu, reg, VEPU_REG_AXI_CTRL); + + reg = VEPU_REG_ENC_CTRL_WIDTH(JPEG_MB_WIDTH(ctx->src_fmt.width)) + | VEPU_REG_ENC_CTRL_HEIGHT(JPEG_MB_HEIGHT(ctx->src_fmt.height)) + | VEPU_REG_ENC_CTRL_ENC_MODE_JPEG + | VEPU_REG_ENC_PIC_INTRA + | VEPU_REG_ENC_CTRL_EN_BIT; + /* Kick the watchdog and start encoding */ + schedule_delayed_work(&vpu->watchdog_work, msecs_to_jiffies(2000)); + vepu_write(vpu, reg, VEPU_REG_ENC_CTRL); +} diff --git a/drivers/staging/media/rockchip/vpu/rk3288_vpu_regs.h b/drivers/staging/media/rockchip/vpu/rk3288_vpu_regs.h new file mode 100644 index 000000000000..9d0b9bdf3297 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rk3288_vpu_regs.h @@ -0,0 +1,442 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip VPU codec driver + * + * Copyright 2018 Google LLC. + * Tomasz Figa <tfiga@chromium.org> + */ + +#ifndef RK3288_VPU_REGS_H_ +#define RK3288_VPU_REGS_H_ + +/* Encoder registers. */ +#define VEPU_REG_INTERRUPT 0x004 +#define VEPU_REG_INTERRUPT_FRAME_RDY BIT(2) +#define VEPU_REG_INTERRUPT_DIS_BIT BIT(1) +#define VEPU_REG_INTERRUPT_BIT BIT(0) +#define VEPU_REG_AXI_CTRL 0x008 +#define VEPU_REG_AXI_CTRL_OUTPUT_SWAP16 BIT(15) +#define VEPU_REG_AXI_CTRL_INPUT_SWAP16 BIT(14) +#define VEPU_REG_AXI_CTRL_BURST_LEN(x) ((x) << 8) +#define VEPU_REG_AXI_CTRL_GATE_BIT BIT(4) +#define VEPU_REG_AXI_CTRL_OUTPUT_SWAP32 BIT(3) +#define VEPU_REG_AXI_CTRL_INPUT_SWAP32 BIT(2) +#define VEPU_REG_AXI_CTRL_OUTPUT_SWAP8 BIT(1) +#define VEPU_REG_AXI_CTRL_INPUT_SWAP8 BIT(0) +#define VEPU_REG_ADDR_OUTPUT_STREAM 0x014 +#define VEPU_REG_ADDR_OUTPUT_CTRL 0x018 +#define VEPU_REG_ADDR_REF_LUMA 0x01c +#define VEPU_REG_ADDR_REF_CHROMA 0x020 +#define VEPU_REG_ADDR_REC_LUMA 0x024 +#define VEPU_REG_ADDR_REC_CHROMA 0x028 +#define VEPU_REG_ADDR_IN_PLANE_0 0x02c +#define VEPU_REG_ADDR_IN_PLANE_1 0x030 +#define VEPU_REG_ADDR_IN_PLANE_2 0x034 +#define VEPU_REG_ENC_CTRL 0x038 +#define VEPU_REG_ENC_CTRL_TIMEOUT_EN BIT(31) +#define VEPU_REG_ENC_CTRL_NAL_MODE_BIT BIT(29) +#define VEPU_REG_ENC_CTRL_WIDTH(w) ((w) << 19) +#define VEPU_REG_ENC_CTRL_HEIGHT(h) ((h) << 10) +#define VEPU_REG_ENC_PIC_INTER (0x0 << 3) +#define VEPU_REG_ENC_PIC_INTRA (0x1 << 3) +#define VEPU_REG_ENC_PIC_MVCINTER (0x2 << 3) +#define VEPU_REG_ENC_CTRL_ENC_MODE_H264 (0x3 << 1) +#define VEPU_REG_ENC_CTRL_ENC_MODE_JPEG (0x2 << 1) +#define VEPU_REG_ENC_CTRL_ENC_MODE_VP8 (0x1 << 1) +#define VEPU_REG_ENC_CTRL_EN_BIT BIT(0) +#define VEPU_REG_IN_IMG_CTRL 0x03c +#define VEPU_REG_IN_IMG_CTRL_ROW_LEN(x) ((x) << 12) +#define VEPU_REG_IN_IMG_CTRL_OVRFLR_D4(x) ((x) << 10) +#define VEPU_REG_IN_IMG_CTRL_OVRFLB_D4(x) ((x) << 6) +#define VEPU_REG_IN_IMG_CTRL_FMT(x) ((x) << 2) +#define VEPU_REG_ENC_CTRL0 0x040 +#define VEPU_REG_ENC_CTRL0_INIT_QP(x) ((x) << 26) +#define VEPU_REG_ENC_CTRL0_SLICE_ALPHA(x) ((x) << 22) +#define VEPU_REG_ENC_CTRL0_SLICE_BETA(x) ((x) << 18) +#define VEPU_REG_ENC_CTRL0_CHROMA_QP_OFFSET(x) ((x) << 13) +#define VEPU_REG_ENC_CTRL0_FILTER_DIS(x) ((x) << 5) +#define VEPU_REG_ENC_CTRL0_IDR_PICID(x) ((x) << 1) +#define VEPU_REG_ENC_CTRL0_CONSTR_INTRA_PRED BIT(0) +#define VEPU_REG_ENC_CTRL1 0x044 +#define VEPU_REG_ENC_CTRL1_PPS_ID(x) ((x) << 24) +#define VEPU_REG_ENC_CTRL1_INTRA_PRED_MODE(x) ((x) << 16) +#define VEPU_REG_ENC_CTRL1_FRAME_NUM(x) ((x)) +#define VEPU_REG_ENC_CTRL2 0x048 +#define VEPU_REG_ENC_CTRL2_DEBLOCKING_FILETER_MODE(x) ((x) << 30) +#define VEPU_REG_ENC_CTRL2_H264_SLICE_SIZE(x) ((x) << 23) +#define VEPU_REG_ENC_CTRL2_DISABLE_QUARTER_PIXMV BIT(22) +#define VEPU_REG_ENC_CTRL2_TRANS8X8_MODE_EN BIT(21) +#define VEPU_REG_ENC_CTRL2_CABAC_INIT_IDC(x) ((x) << 19) +#define VEPU_REG_ENC_CTRL2_ENTROPY_CODING_MODE BIT(18) +#define VEPU_REG_ENC_CTRL2_H264_INTER4X4_MODE BIT(17) +#define VEPU_REG_ENC_CTRL2_H264_STREAM_MODE BIT(16) +#define VEPU_REG_ENC_CTRL2_INTRA16X16_MODE(x) ((x)) +#define VEPU_REG_ENC_CTRL3 0x04c +#define VEPU_REG_ENC_CTRL3_MUTIMV_EN BIT(30) +#define VEPU_REG_ENC_CTRL3_MV_PENALTY_1_4P(x) ((x) << 20) +#define VEPU_REG_ENC_CTRL3_MV_PENALTY_4P(x) ((x) << 10) +#define VEPU_REG_ENC_CTRL3_MV_PENALTY_1P(x) ((x)) +#define VEPU_REG_ENC_CTRL4 0x050 +#define VEPU_REG_ENC_CTRL4_MV_PENALTY_16X8_8X16(x) ((x) << 20) +#define VEPU_REG_ENC_CTRL4_MV_PENALTY_8X8(x) ((x) << 10) +#define VEPU_REG_ENC_CTRL4_8X4_4X8(x) ((x)) +#define VEPU_REG_ENC_CTRL5 0x054 +#define VEPU_REG_ENC_CTRL5_MACROBLOCK_PENALTY(x) ((x) << 24) +#define VEPU_REG_ENC_CTRL5_COMPLETE_SLICES(x) ((x) << 16) +#define VEPU_REG_ENC_CTRL5_INTER_MODE(x) ((x)) +#define VEPU_REG_STR_HDR_REM_MSB 0x058 +#define VEPU_REG_STR_HDR_REM_LSB 0x05c +#define VEPU_REG_STR_BUF_LIMIT 0x060 +#define VEPU_REG_MAD_CTRL 0x064 +#define VEPU_REG_MAD_CTRL_QP_ADJUST(x) ((x) << 28) +#define VEPU_REG_MAD_CTRL_MAD_THREDHOLD(x) ((x) << 22) +#define VEPU_REG_MAD_CTRL_QP_SUM_DIV2(x) ((x)) +#define VEPU_REG_ADDR_VP8_PROB_CNT 0x068 +#define VEPU_REG_QP_VAL 0x06c +#define VEPU_REG_QP_VAL_LUM(x) ((x) << 26) +#define VEPU_REG_QP_VAL_MAX(x) ((x) << 20) +#define VEPU_REG_QP_VAL_MIN(x) ((x) << 14) +#define VEPU_REG_QP_VAL_CHECKPOINT_DISTAN(x) ((x)) +#define VEPU_REG_VP8_QP_VAL(i) (0x06c + ((i) * 0x4)) +#define VEPU_REG_CHECKPOINT(i) (0x070 + ((i) * 0x4)) +#define VEPU_REG_CHECKPOINT_CHECK0(x) (((x) & 0xffff)) +#define VEPU_REG_CHECKPOINT_CHECK1(x) (((x) & 0xffff) << 16) +#define VEPU_REG_CHECKPOINT_RESULT(x) ((((x) >> (16 - 16 \ + * (i & 1))) & 0xffff) \ + * 32) +#define VEPU_REG_CHKPT_WORD_ERR(i) (0x084 + ((i) * 0x4)) +#define VEPU_REG_CHKPT_WORD_ERR_CHK0(x) (((x) & 0xffff)) +#define VEPU_REG_CHKPT_WORD_ERR_CHK1(x) (((x) & 0xffff) << 16) +#define VEPU_REG_VP8_BOOL_ENC 0x08c +#define VEPU_REG_CHKPT_DELTA_QP 0x090 +#define VEPU_REG_CHKPT_DELTA_QP_CHK0(x) (((x) & 0x0f) << 0) +#define VEPU_REG_CHKPT_DELTA_QP_CHK1(x) (((x) & 0x0f) << 4) +#define VEPU_REG_CHKPT_DELTA_QP_CHK2(x) (((x) & 0x0f) << 8) +#define VEPU_REG_CHKPT_DELTA_QP_CHK3(x) (((x) & 0x0f) << 12) +#define VEPU_REG_CHKPT_DELTA_QP_CHK4(x) (((x) & 0x0f) << 16) +#define VEPU_REG_CHKPT_DELTA_QP_CHK5(x) (((x) & 0x0f) << 20) +#define VEPU_REG_CHKPT_DELTA_QP_CHK6(x) (((x) & 0x0f) << 24) +#define VEPU_REG_VP8_CTRL0 0x090 +#define VEPU_REG_RLC_CTRL 0x094 +#define VEPU_REG_RLC_CTRL_STR_OFFS_SHIFT 23 +#define VEPU_REG_RLC_CTRL_STR_OFFS_MASK (0x3f << 23) +#define VEPU_REG_RLC_CTRL_RLC_SUM(x) ((x)) +#define VEPU_REG_MB_CTRL 0x098 +#define VEPU_REG_MB_CNT_OUT(x) (((x) & 0xffff)) +#define VEPU_REG_MB_CNT_SET(x) (((x) & 0xffff) << 16) +#define VEPU_REG_ADDR_NEXT_PIC 0x09c +#define VEPU_REG_JPEG_LUMA_QUAT(i) (0x100 + ((i) * 0x4)) +#define VEPU_REG_JPEG_CHROMA_QUAT(i) (0x140 + ((i) * 0x4)) +#define VEPU_REG_STABILIZATION_OUTPUT 0x0A0 +#define VEPU_REG_ADDR_CABAC_TBL 0x0cc +#define VEPU_REG_ADDR_MV_OUT 0x0d0 +#define VEPU_REG_RGB_YUV_COEFF(i) (0x0d4 + ((i) * 0x4)) +#define VEPU_REG_RGB_MASK_MSB 0x0dc +#define VEPU_REG_INTRA_AREA_CTRL 0x0e0 +#define VEPU_REG_CIR_INTRA_CTRL 0x0e4 +#define VEPU_REG_INTRA_SLICE_BITMAP(i) (0x0e8 + ((i) * 0x4)) +#define VEPU_REG_ADDR_VP8_DCT_PART(i) (0x0e8 + ((i) * 0x4)) +#define VEPU_REG_FIRST_ROI_AREA 0x0f0 +#define VEPU_REG_SECOND_ROI_AREA 0x0f4 +#define VEPU_REG_MVC_CTRL 0x0f8 +#define VEPU_REG_MVC_CTRL_MV16X16_FAVOR(x) ((x) << 28) +#define VEPU_REG_VP8_INTRA_PENALTY(i) (0x100 + ((i) * 0x4)) +#define VEPU_REG_ADDR_VP8_SEG_MAP 0x11c +#define VEPU_REG_VP8_SEG_QP(i) (0x120 + ((i) * 0x4)) +#define VEPU_REG_DMV_4P_1P_PENALTY(i) (0x180 + ((i) * 0x4)) +#define VEPU_REG_DMV_4P_1P_PENALTY_BIT(x, i) ((x) << (i) * 8) +#define VEPU_REG_DMV_QPEL_PENALTY(i) (0x200 + ((i) * 0x4)) +#define VEPU_REG_DMV_QPEL_PENALTY_BIT(x, i) ((x) << (i) * 8) +#define VEPU_REG_VP8_CTRL1 0x280 +#define VEPU_REG_VP8_BIT_COST_GOLDEN 0x284 +#define VEPU_REG_VP8_LOOP_FLT_DELTA(i) (0x288 + ((i) * 0x4)) + +/* Decoder registers. */ +#define VDPU_REG_INTERRUPT 0x004 +#define VDPU_REG_INTERRUPT_DEC_PIC_INF BIT(24) +#define VDPU_REG_INTERRUPT_DEC_TIMEOUT BIT(18) +#define VDPU_REG_INTERRUPT_DEC_SLICE_INT BIT(17) +#define VDPU_REG_INTERRUPT_DEC_ERROR_INT BIT(16) +#define VDPU_REG_INTERRUPT_DEC_ASO_INT BIT(15) +#define VDPU_REG_INTERRUPT_DEC_BUFFER_INT BIT(14) +#define VDPU_REG_INTERRUPT_DEC_BUS_INT BIT(13) +#define VDPU_REG_INTERRUPT_DEC_RDY_INT BIT(12) +#define VDPU_REG_INTERRUPT_DEC_IRQ BIT(8) +#define VDPU_REG_INTERRUPT_DEC_IRQ_DIS BIT(4) +#define VDPU_REG_INTERRUPT_DEC_E BIT(0) +#define VDPU_REG_CONFIG 0x008 +#define VDPU_REG_CONFIG_DEC_AXI_RD_ID(x) (((x) & 0xff) << 24) +#define VDPU_REG_CONFIG_DEC_TIMEOUT_E BIT(23) +#define VDPU_REG_CONFIG_DEC_STRSWAP32_E BIT(22) +#define VDPU_REG_CONFIG_DEC_STRENDIAN_E BIT(21) +#define VDPU_REG_CONFIG_DEC_INSWAP32_E BIT(20) +#define VDPU_REG_CONFIG_DEC_OUTSWAP32_E BIT(19) +#define VDPU_REG_CONFIG_DEC_DATA_DISC_E BIT(18) +#define VDPU_REG_CONFIG_TILED_MODE_MSB BIT(17) +#define VDPU_REG_CONFIG_DEC_OUT_TILED_E BIT(17) +#define VDPU_REG_CONFIG_DEC_LATENCY(x) (((x) & 0x3f) << 11) +#define VDPU_REG_CONFIG_DEC_CLK_GATE_E BIT(10) +#define VDPU_REG_CONFIG_DEC_IN_ENDIAN BIT(9) +#define VDPU_REG_CONFIG_DEC_OUT_ENDIAN BIT(8) +#define VDPU_REG_CONFIG_PRIORITY_MODE(x) (((x) & 0x7) << 5) +#define VDPU_REG_CONFIG_TILED_MODE_LSB BIT(7) +#define VDPU_REG_CONFIG_DEC_ADV_PRE_DIS BIT(6) +#define VDPU_REG_CONFIG_DEC_SCMD_DIS BIT(5) +#define VDPU_REG_CONFIG_DEC_MAX_BURST(x) (((x) & 0x1f) << 0) +#define VDPU_REG_DEC_CTRL0 0x00c +#define VDPU_REG_DEC_CTRL0_DEC_MODE(x) (((x) & 0xf) << 28) +#define VDPU_REG_DEC_CTRL0_RLC_MODE_E BIT(27) +#define VDPU_REG_DEC_CTRL0_SKIP_MODE BIT(26) +#define VDPU_REG_DEC_CTRL0_DIVX3_E BIT(25) +#define VDPU_REG_DEC_CTRL0_PJPEG_E BIT(24) +#define VDPU_REG_DEC_CTRL0_PIC_INTERLACE_E BIT(23) +#define VDPU_REG_DEC_CTRL0_PIC_FIELDMODE_E BIT(22) +#define VDPU_REG_DEC_CTRL0_PIC_B_E BIT(21) +#define VDPU_REG_DEC_CTRL0_PIC_INTER_E BIT(20) +#define VDPU_REG_DEC_CTRL0_PIC_TOPFIELD_E BIT(19) +#define VDPU_REG_DEC_CTRL0_FWD_INTERLACE_E BIT(18) +#define VDPU_REG_DEC_CTRL0_SORENSON_E BIT(17) +#define VDPU_REG_DEC_CTRL0_REF_TOPFIELD_E BIT(16) +#define VDPU_REG_DEC_CTRL0_DEC_OUT_DIS BIT(15) +#define VDPU_REG_DEC_CTRL0_FILTERING_DIS BIT(14) +#define VDPU_REG_DEC_CTRL0_WEBP_E BIT(13) +#define VDPU_REG_DEC_CTRL0_MVC_E BIT(13) +#define VDPU_REG_DEC_CTRL0_PIC_FIXED_QUANT BIT(13) +#define VDPU_REG_DEC_CTRL0_WRITE_MVS_E BIT(12) +#define VDPU_REG_DEC_CTRL0_REFTOPFIRST_E BIT(11) +#define VDPU_REG_DEC_CTRL0_SEQ_MBAFF_E BIT(10) +#define VDPU_REG_DEC_CTRL0_PICORD_COUNT_E BIT(9) +#define VDPU_REG_DEC_CTRL0_DEC_AHB_HLOCK_E BIT(8) +#define VDPU_REG_DEC_CTRL0_DEC_AXI_WR_ID(x) (((x) & 0xff) << 0) +#define VDPU_REG_DEC_CTRL1 0x010 +#define VDPU_REG_DEC_CTRL1_PIC_MB_WIDTH(x) (((x) & 0x1ff) << 23) +#define VDPU_REG_DEC_CTRL1_MB_WIDTH_OFF(x) (((x) & 0xf) << 19) +#define VDPU_REG_DEC_CTRL1_PIC_MB_HEIGHT_P(x) (((x) & 0xff) << 11) +#define VDPU_REG_DEC_CTRL1_MB_HEIGHT_OFF(x) (((x) & 0xf) << 7) +#define VDPU_REG_DEC_CTRL1_ALT_SCAN_E BIT(6) +#define VDPU_REG_DEC_CTRL1_TOPFIELDFIRST_E BIT(5) +#define VDPU_REG_DEC_CTRL1_REF_FRAMES(x) (((x) & 0x1f) << 0) +#define VDPU_REG_DEC_CTRL1_PIC_MB_W_EXT(x) (((x) & 0x7) << 3) +#define VDPU_REG_DEC_CTRL1_PIC_MB_H_EXT(x) (((x) & 0x7) << 0) +#define VDPU_REG_DEC_CTRL1_PIC_REFER_FLAG BIT(0) +#define VDPU_REG_DEC_CTRL2 0x014 +#define VDPU_REG_DEC_CTRL2_STRM_START_BIT(x) (((x) & 0x3f) << 26) +#define VDPU_REG_DEC_CTRL2_SYNC_MARKER_E BIT(25) +#define VDPU_REG_DEC_CTRL2_TYPE1_QUANT_E BIT(24) +#define VDPU_REG_DEC_CTRL2_CH_QP_OFFSET(x) (((x) & 0x1f) << 19) +#define VDPU_REG_DEC_CTRL2_CH_QP_OFFSET2(x) (((x) & 0x1f) << 14) +#define VDPU_REG_DEC_CTRL2_FIELDPIC_FLAG_E BIT(0) +#define VDPU_REG_DEC_CTRL2_INTRADC_VLC_THR(x) (((x) & 0x7) << 16) +#define VDPU_REG_DEC_CTRL2_VOP_TIME_INCR(x) (((x) & 0xffff) << 0) +#define VDPU_REG_DEC_CTRL2_DQ_PROFILE BIT(24) +#define VDPU_REG_DEC_CTRL2_DQBI_LEVEL BIT(23) +#define VDPU_REG_DEC_CTRL2_RANGE_RED_FRM_E BIT(22) +#define VDPU_REG_DEC_CTRL2_FAST_UVMC_E BIT(20) +#define VDPU_REG_DEC_CTRL2_TRANSDCTAB BIT(17) +#define VDPU_REG_DEC_CTRL2_TRANSACFRM(x) (((x) & 0x3) << 15) +#define VDPU_REG_DEC_CTRL2_TRANSACFRM2(x) (((x) & 0x3) << 13) +#define VDPU_REG_DEC_CTRL2_MB_MODE_TAB(x) (((x) & 0x7) << 10) +#define VDPU_REG_DEC_CTRL2_MVTAB(x) (((x) & 0x7) << 7) +#define VDPU_REG_DEC_CTRL2_CBPTAB(x) (((x) & 0x7) << 4) +#define VDPU_REG_DEC_CTRL2_2MV_BLK_PAT_TAB(x) (((x) & 0x3) << 2) +#define VDPU_REG_DEC_CTRL2_4MV_BLK_PAT_TAB(x) (((x) & 0x3) << 0) +#define VDPU_REG_DEC_CTRL2_QSCALE_TYPE BIT(24) +#define VDPU_REG_DEC_CTRL2_CON_MV_E BIT(4) +#define VDPU_REG_DEC_CTRL2_INTRA_DC_PREC(x) (((x) & 0x3) << 2) +#define VDPU_REG_DEC_CTRL2_INTRA_VLC_TAB BIT(1) +#define VDPU_REG_DEC_CTRL2_FRAME_PRED_DCT BIT(0) +#define VDPU_REG_DEC_CTRL2_JPEG_QTABLES(x) (((x) & 0x3) << 11) +#define VDPU_REG_DEC_CTRL2_JPEG_MODE(x) (((x) & 0x7) << 8) +#define VDPU_REG_DEC_CTRL2_JPEG_FILRIGHT_E BIT(7) +#define VDPU_REG_DEC_CTRL2_JPEG_STREAM_ALL BIT(6) +#define VDPU_REG_DEC_CTRL2_CR_AC_VLCTABLE BIT(5) +#define VDPU_REG_DEC_CTRL2_CB_AC_VLCTABLE BIT(4) +#define VDPU_REG_DEC_CTRL2_CR_DC_VLCTABLE BIT(3) +#define VDPU_REG_DEC_CTRL2_CB_DC_VLCTABLE BIT(2) +#define VDPU_REG_DEC_CTRL2_CR_DC_VLCTABLE3 BIT(1) +#define VDPU_REG_DEC_CTRL2_CB_DC_VLCTABLE3 BIT(0) +#define VDPU_REG_DEC_CTRL2_STRM1_START_BIT(x) (((x) & 0x3f) << 18) +#define VDPU_REG_DEC_CTRL2_HUFFMAN_E BIT(17) +#define VDPU_REG_DEC_CTRL2_MULTISTREAM_E BIT(16) +#define VDPU_REG_DEC_CTRL2_BOOLEAN_VALUE(x) (((x) & 0xff) << 8) +#define VDPU_REG_DEC_CTRL2_BOOLEAN_RANGE(x) (((x) & 0xff) << 0) +#define VDPU_REG_DEC_CTRL2_ALPHA_OFFSET(x) (((x) & 0x1f) << 5) +#define VDPU_REG_DEC_CTRL2_BETA_OFFSET(x) (((x) & 0x1f) << 0) +#define VDPU_REG_DEC_CTRL3 0x018 +#define VDPU_REG_DEC_CTRL3_START_CODE_E BIT(31) +#define VDPU_REG_DEC_CTRL3_INIT_QP(x) (((x) & 0x3f) << 25) +#define VDPU_REG_DEC_CTRL3_CH_8PIX_ILEAV_E BIT(24) +#define VDPU_REG_DEC_CTRL3_STREAM_LEN_EXT(x) (((x) & 0xff) << 24) +#define VDPU_REG_DEC_CTRL3_STREAM_LEN(x) (((x) & 0xffffff) << 0) +#define VDPU_REG_DEC_CTRL4 0x01c +#define VDPU_REG_DEC_CTRL4_CABAC_E BIT(31) +#define VDPU_REG_DEC_CTRL4_BLACKWHITE_E BIT(30) +#define VDPU_REG_DEC_CTRL4_DIR_8X8_INFER_E BIT(29) +#define VDPU_REG_DEC_CTRL4_WEIGHT_PRED_E BIT(28) +#define VDPU_REG_DEC_CTRL4_WEIGHT_BIPR_IDC(x) (((x) & 0x3) << 26) +#define VDPU_REG_DEC_CTRL4_AVS_H264_H_EXT BIT(25) +#define VDPU_REG_DEC_CTRL4_FRAMENUM_LEN(x) (((x) & 0x1f) << 16) +#define VDPU_REG_DEC_CTRL4_FRAMENUM(x) (((x) & 0xffff) << 0) +#define VDPU_REG_DEC_CTRL4_BITPLANE0_E BIT(31) +#define VDPU_REG_DEC_CTRL4_BITPLANE1_E BIT(30) +#define VDPU_REG_DEC_CTRL4_BITPLANE2_E BIT(29) +#define VDPU_REG_DEC_CTRL4_ALT_PQUANT(x) (((x) & 0x1f) << 24) +#define VDPU_REG_DEC_CTRL4_DQ_EDGES(x) (((x) & 0xf) << 20) +#define VDPU_REG_DEC_CTRL4_TTMBF BIT(19) +#define VDPU_REG_DEC_CTRL4_PQINDEX(x) (((x) & 0x1f) << 14) +#define VDPU_REG_DEC_CTRL4_VC1_HEIGHT_EXT BIT(13) +#define VDPU_REG_DEC_CTRL4_BILIN_MC_E BIT(12) +#define VDPU_REG_DEC_CTRL4_UNIQP_E BIT(11) +#define VDPU_REG_DEC_CTRL4_HALFQP_E BIT(10) +#define VDPU_REG_DEC_CTRL4_TTFRM(x) (((x) & 0x3) << 8) +#define VDPU_REG_DEC_CTRL4_2ND_BYTE_EMUL_E BIT(7) +#define VDPU_REG_DEC_CTRL4_DQUANT_E BIT(6) +#define VDPU_REG_DEC_CTRL4_VC1_ADV_E BIT(5) +#define VDPU_REG_DEC_CTRL4_PJPEG_FILDOWN_E BIT(26) +#define VDPU_REG_DEC_CTRL4_PJPEG_WDIV8 BIT(25) +#define VDPU_REG_DEC_CTRL4_PJPEG_HDIV8 BIT(24) +#define VDPU_REG_DEC_CTRL4_PJPEG_AH(x) (((x) & 0xf) << 20) +#define VDPU_REG_DEC_CTRL4_PJPEG_AL(x) (((x) & 0xf) << 16) +#define VDPU_REG_DEC_CTRL4_PJPEG_SS(x) (((x) & 0xff) << 8) +#define VDPU_REG_DEC_CTRL4_PJPEG_SE(x) (((x) & 0xff) << 0) +#define VDPU_REG_DEC_CTRL4_DCT1_START_BIT(x) (((x) & 0x3f) << 26) +#define VDPU_REG_DEC_CTRL4_DCT2_START_BIT(x) (((x) & 0x3f) << 20) +#define VDPU_REG_DEC_CTRL4_CH_MV_RES BIT(13) +#define VDPU_REG_DEC_CTRL4_INIT_DC_MATCH0(x) (((x) & 0x7) << 9) +#define VDPU_REG_DEC_CTRL4_INIT_DC_MATCH1(x) (((x) & 0x7) << 6) +#define VDPU_REG_DEC_CTRL4_VP7_VERSION BIT(5) +#define VDPU_REG_DEC_CTRL5 0x020 +#define VDPU_REG_DEC_CTRL5_CONST_INTRA_E BIT(31) +#define VDPU_REG_DEC_CTRL5_FILT_CTRL_PRES BIT(30) +#define VDPU_REG_DEC_CTRL5_RDPIC_CNT_PRES BIT(29) +#define VDPU_REG_DEC_CTRL5_8X8TRANS_FLAG_E BIT(28) +#define VDPU_REG_DEC_CTRL5_REFPIC_MK_LEN(x) (((x) & 0x7ff) << 17) +#define VDPU_REG_DEC_CTRL5_IDR_PIC_E BIT(16) +#define VDPU_REG_DEC_CTRL5_IDR_PIC_ID(x) (((x) & 0xffff) << 0) +#define VDPU_REG_DEC_CTRL5_MV_SCALEFACTOR(x) (((x) & 0xff) << 24) +#define VDPU_REG_DEC_CTRL5_REF_DIST_FWD(x) (((x) & 0x1f) << 19) +#define VDPU_REG_DEC_CTRL5_REF_DIST_BWD(x) (((x) & 0x1f) << 14) +#define VDPU_REG_DEC_CTRL5_LOOP_FILT_LIMIT(x) (((x) & 0xf) << 14) +#define VDPU_REG_DEC_CTRL5_VARIANCE_TEST_E BIT(13) +#define VDPU_REG_DEC_CTRL5_MV_THRESHOLD(x) (((x) & 0x7) << 10) +#define VDPU_REG_DEC_CTRL5_VAR_THRESHOLD(x) (((x) & 0x3ff) << 0) +#define VDPU_REG_DEC_CTRL5_DIVX_IDCT_E BIT(8) +#define VDPU_REG_DEC_CTRL5_DIVX3_SLICE_SIZE(x) (((x) & 0xff) << 0) +#define VDPU_REG_DEC_CTRL5_PJPEG_REST_FREQ(x) (((x) & 0xffff) << 0) +#define VDPU_REG_DEC_CTRL5_RV_PROFILE(x) (((x) & 0x3) << 30) +#define VDPU_REG_DEC_CTRL5_RV_OSV_QUANT(x) (((x) & 0x3) << 28) +#define VDPU_REG_DEC_CTRL5_RV_FWD_SCALE(x) (((x) & 0x3fff) << 14) +#define VDPU_REG_DEC_CTRL5_RV_BWD_SCALE(x) (((x) & 0x3fff) << 0) +#define VDPU_REG_DEC_CTRL5_INIT_DC_COMP0(x) (((x) & 0xffff) << 16) +#define VDPU_REG_DEC_CTRL5_INIT_DC_COMP1(x) (((x) & 0xffff) << 0) +#define VDPU_REG_DEC_CTRL6 0x024 +#define VDPU_REG_DEC_CTRL6_PPS_ID(x) (((x) & 0xff) << 24) +#define VDPU_REG_DEC_CTRL6_REFIDX1_ACTIVE(x) (((x) & 0x1f) << 19) +#define VDPU_REG_DEC_CTRL6_REFIDX0_ACTIVE(x) (((x) & 0x1f) << 14) +#define VDPU_REG_DEC_CTRL6_POC_LENGTH(x) (((x) & 0xff) << 0) +#define VDPU_REG_DEC_CTRL6_ICOMP0_E BIT(24) +#define VDPU_REG_DEC_CTRL6_ISCALE0(x) (((x) & 0xff) << 16) +#define VDPU_REG_DEC_CTRL6_ISHIFT0(x) (((x) & 0xffff) << 0) +#define VDPU_REG_DEC_CTRL6_STREAM1_LEN(x) (((x) & 0xffffff) << 0) +#define VDPU_REG_DEC_CTRL6_PIC_SLICE_AM(x) (((x) & 0x1fff) << 0) +#define VDPU_REG_DEC_CTRL6_COEFFS_PART_AM(x) (((x) & 0xf) << 24) +#define VDPU_REG_FWD_PIC(i) (0x028 + ((i) * 0x4)) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F5(x) (((x) & 0x1f) << 25) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F4(x) (((x) & 0x1f) << 20) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 15) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F2(x) (((x) & 0x1f) << 10) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F1(x) (((x) & 0x1f) << 5) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F0(x) (((x) & 0x1f) << 0) +#define VDPU_REG_FWD_PIC1_ICOMP1_E BIT(24) +#define VDPU_REG_FWD_PIC1_ISCALE1(x) (((x) & 0xff) << 16) +#define VDPU_REG_FWD_PIC1_ISHIFT1(x) (((x) & 0xffff) << 0) +#define VDPU_REG_FWD_PIC1_SEGMENT_BASE(x) ((x) << 0) +#define VDPU_REG_FWD_PIC1_SEGMENT_UPD_E BIT(1) +#define VDPU_REG_FWD_PIC1_SEGMENT_E BIT(0) +#define VDPU_REG_DEC_CTRL7 0x02c +#define VDPU_REG_DEC_CTRL7_PINIT_RLIST_F15(x) (((x) & 0x1f) << 25) +#define VDPU_REG_DEC_CTRL7_PINIT_RLIST_F14(x) (((x) & 0x1f) << 20) +#define VDPU_REG_DEC_CTRL7_PINIT_RLIST_F13(x) (((x) & 0x1f) << 15) +#define VDPU_REG_DEC_CTRL7_PINIT_RLIST_F12(x) (((x) & 0x1f) << 10) +#define VDPU_REG_DEC_CTRL7_PINIT_RLIST_F11(x) (((x) & 0x1f) << 5) +#define VDPU_REG_DEC_CTRL7_PINIT_RLIST_F10(x) (((x) & 0x1f) << 0) +#define VDPU_REG_DEC_CTRL7_ICOMP2_E BIT(24) +#define VDPU_REG_DEC_CTRL7_ISCALE2(x) (((x) & 0xff) << 16) +#define VDPU_REG_DEC_CTRL7_ISHIFT2(x) (((x) & 0xffff) << 0) +#define VDPU_REG_DEC_CTRL7_DCT3_START_BIT(x) (((x) & 0x3f) << 24) +#define VDPU_REG_DEC_CTRL7_DCT4_START_BIT(x) (((x) & 0x3f) << 18) +#define VDPU_REG_DEC_CTRL7_DCT5_START_BIT(x) (((x) & 0x3f) << 12) +#define VDPU_REG_DEC_CTRL7_DCT6_START_BIT(x) (((x) & 0x3f) << 6) +#define VDPU_REG_DEC_CTRL7_DCT7_START_BIT(x) (((x) & 0x3f) << 0) +#define VDPU_REG_ADDR_STR 0x030 +#define VDPU_REG_ADDR_DST 0x034 +#define VDPU_REG_ADDR_REF(i) (0x038 + ((i) * 0x4)) +#define VDPU_REG_ADDR_REF_FIELD_E BIT(1) +#define VDPU_REG_ADDR_REF_TOPC_E BIT(0) +#define VDPU_REG_REF_PIC(i) (0x078 + ((i) * 0x4)) +#define VDPU_REG_REF_PIC_FILT_TYPE_E BIT(31) +#define VDPU_REG_REF_PIC_FILT_SHARPNESS(x) (((x) & 0x7) << 28) +#define VDPU_REG_REF_PIC_MB_ADJ_0(x) (((x) & 0x7f) << 21) +#define VDPU_REG_REF_PIC_MB_ADJ_1(x) (((x) & 0x7f) << 14) +#define VDPU_REG_REF_PIC_MB_ADJ_2(x) (((x) & 0x7f) << 7) +#define VDPU_REG_REF_PIC_MB_ADJ_3(x) (((x) & 0x7f) << 0) +#define VDPU_REG_REF_PIC_REFER1_NBR(x) (((x) & 0xffff) << 16) +#define VDPU_REG_REF_PIC_REFER0_NBR(x) (((x) & 0xffff) << 0) +#define VDPU_REG_REF_PIC_LF_LEVEL_0(x) (((x) & 0x3f) << 18) +#define VDPU_REG_REF_PIC_LF_LEVEL_1(x) (((x) & 0x3f) << 12) +#define VDPU_REG_REF_PIC_LF_LEVEL_2(x) (((x) & 0x3f) << 6) +#define VDPU_REG_REF_PIC_LF_LEVEL_3(x) (((x) & 0x3f) << 0) +#define VDPU_REG_REF_PIC_QUANT_DELTA_0(x) (((x) & 0x1f) << 27) +#define VDPU_REG_REF_PIC_QUANT_DELTA_1(x) (((x) & 0x1f) << 22) +#define VDPU_REG_REF_PIC_QUANT_0(x) (((x) & 0x7ff) << 11) +#define VDPU_REG_REF_PIC_QUANT_1(x) (((x) & 0x7ff) << 0) +#define VDPU_REG_LT_REF 0x098 +#define VDPU_REG_VALID_REF 0x09c +#define VDPU_REG_ADDR_QTABLE 0x0a0 +#define VDPU_REG_ADDR_DIR_MV 0x0a4 +#define VDPU_REG_BD_REF_PIC(i) (0x0a8 + ((i) * 0x4)) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B2(x) (((x) & 0x1f) << 25) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F2(x) (((x) & 0x1f) << 20) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B1(x) (((x) & 0x1f) << 15) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F1(x) (((x) & 0x1f) << 10) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B0(x) (((x) & 0x1f) << 5) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F0(x) (((x) & 0x1f) << 0) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_2_M1(x) (((x) & 0x3) << 10) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_2_4(x) (((x) & 0x3) << 8) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_4_M1(x) (((x) & 0x3) << 6) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_4_4(x) (((x) & 0x3) << 4) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_6_M1(x) (((x) & 0x3) << 2) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_6_4(x) (((x) & 0x3) << 0) +#define VDPU_REG_BD_REF_PIC_QUANT_DELTA_2(x) (((x) & 0x1f) << 27) +#define VDPU_REG_BD_REF_PIC_QUANT_DELTA_3(x) (((x) & 0x1f) << 22) +#define VDPU_REG_BD_REF_PIC_QUANT_2(x) (((x) & 0x7ff) << 11) +#define VDPU_REG_BD_REF_PIC_QUANT_3(x) (((x) & 0x7ff) << 0) +#define VDPU_REG_BD_P_REF_PIC 0x0bc +#define VDPU_REG_BD_P_REF_PIC_QUANT_DELTA_4(x) (((x) & 0x1f) << 27) +#define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 25) +#define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F2(x) (((x) & 0x1f) << 20) +#define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F1(x) (((x) & 0x1f) << 15) +#define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F0(x) (((x) & 0x1f) << 10) +#define VDPU_REG_BD_P_REF_PIC_BINIT_RLIST_B15(x) (((x) & 0x1f) << 5) +#define VDPU_REG_BD_P_REF_PIC_BINIT_RLIST_F15(x) (((x) & 0x1f) << 0) +#define VDPU_REG_ERR_CONC 0x0c0 +#define VDPU_REG_ERR_CONC_STARTMB_X(x) (((x) & 0x1ff) << 23) +#define VDPU_REG_ERR_CONC_STARTMB_Y(x) (((x) & 0xff) << 15) +#define VDPU_REG_PRED_FLT 0x0c4 +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_0(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_1(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_2(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_REF_BUF_CTRL 0x0cc +#define VDPU_REG_REF_BUF_CTRL_REFBU_E BIT(31) +#define VDPU_REG_REF_BUF_CTRL_REFBU_THR(x) (((x) & 0xfff) << 19) +#define VDPU_REG_REF_BUF_CTRL_REFBU_PICID(x) (((x) & 0x1f) << 14) +#define VDPU_REG_REF_BUF_CTRL_REFBU_EVAL_E BIT(13) +#define VDPU_REG_REF_BUF_CTRL_REFBU_FPARMOD_E BIT(12) +#define VDPU_REG_REF_BUF_CTRL_REFBU_Y_OFFSET(x) (((x) & 0x1ff) << 0) +#define VDPU_REG_REF_BUF_CTRL2 0x0dc +#define VDPU_REG_REF_BUF_CTRL2_REFBU2_BUF_E BIT(31) +#define VDPU_REG_REF_BUF_CTRL2_REFBU2_THR(x) (((x) & 0xfff) << 19) +#define VDPU_REG_REF_BUF_CTRL2_REFBU2_PICID(x) (((x) & 0x1f) << 14) +#define VDPU_REG_REF_BUF_CTRL2_APF_THRESHOLD(x) (((x) & 0x3fff) << 0) + +#endif /* RK3288_VPU_REGS_H_ */ diff --git a/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw.c b/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw.c new file mode 100644 index 000000000000..6fdef61e2127 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw.c @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip VPU codec driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Jeffy Chen <jeffy.chen@rock-chips.com> + */ + +#include <linux/clk.h> + +#include "rockchip_vpu.h" +#include "rockchip_vpu_jpeg.h" +#include "rk3399_vpu_regs.h" + +#define RK3399_ACLK_MAX_FREQ (400 * 1000 * 1000) + +/* + * Supported formats. + */ + +static const struct rockchip_vpu_fmt rk3399_vpu_enc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_YUV420M, + .codec_mode = RK_VPU_MODE_NONE, + .enc_fmt = RK3288_VPU_ENC_FMT_YUV420P, + }, + { + .fourcc = V4L2_PIX_FMT_NV12M, + .codec_mode = RK_VPU_MODE_NONE, + .enc_fmt = RK3288_VPU_ENC_FMT_YUV420SP, + }, + { + .fourcc = V4L2_PIX_FMT_YUYV, + .codec_mode = RK_VPU_MODE_NONE, + .enc_fmt = RK3288_VPU_ENC_FMT_YUYV422, + }, + { + .fourcc = V4L2_PIX_FMT_UYVY, + .codec_mode = RK_VPU_MODE_NONE, + .enc_fmt = RK3288_VPU_ENC_FMT_UYVY422, + }, + { + .fourcc = V4L2_PIX_FMT_JPEG, + .codec_mode = RK_VPU_MODE_JPEG_ENC, + .max_depth = 2, + .header_size = JPEG_HEADER_SIZE, + .frmsize = { + .min_width = 96, + .max_width = 8192, + .step_width = JPEG_MB_DIM, + .min_height = 32, + .max_height = 8192, + .step_height = JPEG_MB_DIM, + }, + }, +}; + +static irqreturn_t rk3399_vepu_irq(int irq, void *dev_id) +{ + struct rockchip_vpu_dev *vpu = dev_id; + enum vb2_buffer_state state; + u32 status, bytesused; + + status = vepu_read(vpu, VEPU_REG_INTERRUPT); + bytesused = vepu_read(vpu, VEPU_REG_STR_BUF_LIMIT) / 8; + state = (status & VEPU_REG_INTERRUPT_FRAME_READY) ? + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; + + vepu_write(vpu, 0, VEPU_REG_INTERRUPT); + vepu_write(vpu, 0, VEPU_REG_AXI_CTRL); + + rockchip_vpu_irq_done(vpu, bytesused, state); + + return IRQ_HANDLED; +} + +static int rk3399_vpu_hw_init(struct rockchip_vpu_dev *vpu) +{ + /* Bump ACLK to max. possible freq. to improve performance. */ + clk_set_rate(vpu->clocks[0].clk, RK3399_ACLK_MAX_FREQ); + return 0; +} + +static void rk3399_vpu_enc_reset(struct rockchip_vpu_ctx *ctx) +{ + struct rockchip_vpu_dev *vpu = ctx->dev; + + vepu_write(vpu, VEPU_REG_INTERRUPT_DIS_BIT, VEPU_REG_INTERRUPT); + vepu_write(vpu, 0, VEPU_REG_ENCODE_START); + vepu_write(vpu, 0, VEPU_REG_AXI_CTRL); +} + +/* + * Supported codec ops. + */ + +static const struct rockchip_vpu_codec_ops rk3399_vpu_codec_ops[] = { + [RK_VPU_MODE_JPEG_ENC] = { + .run = rk3399_vpu_jpeg_enc_run, + .reset = rk3399_vpu_enc_reset, + }, +}; + +/* + * VPU variant. + */ + +const struct rockchip_vpu_variant rk3399_vpu_variant = { + .enc_offset = 0x0, + .enc_fmts = rk3399_vpu_enc_fmts, + .num_enc_fmts = ARRAY_SIZE(rk3399_vpu_enc_fmts), + .codec = RK_VPU_CODEC_JPEG, + .codec_ops = rk3399_vpu_codec_ops, + .vepu_irq = rk3399_vepu_irq, + .init = rk3399_vpu_hw_init, + .clk_names = {"aclk", "hclk"}, + .num_clocks = 2 +}; diff --git a/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw_jpeg_enc.c b/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw_jpeg_enc.c new file mode 100644 index 000000000000..3d438797692e --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw_jpeg_enc.c @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip VPU codec driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * + * JPEG encoder + * ------------ + * The VPU JPEG encoder produces JPEG baseline sequential format. + * The quantization coefficients are 8-bit values, complying with + * the baseline specification. Therefore, it requires + * luma and chroma quantization tables. The hardware does entropy + * encoding using internal Huffman tables, as specified in the JPEG + * specification. + * + * In other words, only the luma and chroma quantization tables are + * required for the encoding operation. + * + * Quantization luma table values are written to registers + * VEPU_swreg_0-VEPU_swreg_15, and chroma table values to + * VEPU_swreg_16-VEPU_swreg_31. + * + * JPEG zigzag order is expected on the quantization tables. + */ + +#include <asm/unaligned.h> +#include <media/v4l2-mem2mem.h> +#include "rockchip_vpu_jpeg.h" +#include "rockchip_vpu.h" +#include "rockchip_vpu_common.h" +#include "rockchip_vpu_hw.h" +#include "rk3399_vpu_regs.h" + +#define VEPU_JPEG_QUANT_TABLE_COUNT 16 + +static void rk3399_vpu_set_src_img_ctrl(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) +{ + struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt; + u32 reg; + + /* + * The pix fmt width/height are already macroblock aligned + * by .vidioc_s_fmt_vid_cap_mplane() callback + */ + reg = VEPU_REG_IN_IMG_CTRL_ROW_LEN(pix_fmt->width); + vepu_write_relaxed(vpu, reg, VEPU_REG_INPUT_LUMA_INFO); + + reg = VEPU_REG_IN_IMG_CTRL_OVRFLR_D4(0) | + VEPU_REG_IN_IMG_CTRL_OVRFLB(0); + /* + * This register controls the input crop, as the offset + * from the right/bottom within the last macroblock. The offset from the + * right must be divided by 4 and so the crop must be aligned to 4 pixels + * horizontally. + */ + vepu_write_relaxed(vpu, reg, VEPU_REG_ENC_OVER_FILL_STRM_OFFSET); + + reg = VEPU_REG_IN_IMG_CTRL_FMT(ctx->vpu_src_fmt->enc_fmt); + vepu_write_relaxed(vpu, reg, VEPU_REG_ENC_CTRL1); +} + +static void rk3399_vpu_jpeg_enc_set_buffers(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx, + struct vb2_buffer *src_buf) +{ + struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt; + dma_addr_t src[3]; + + WARN_ON(pix_fmt->num_planes > 3); + + vepu_write_relaxed(vpu, ctx->bounce_dma_addr, + VEPU_REG_ADDR_OUTPUT_STREAM); + vepu_write_relaxed(vpu, ctx->bounce_size, + VEPU_REG_STR_BUF_LIMIT); + + if (pix_fmt->num_planes == 1) { + src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0); + vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0); + } else if (pix_fmt->num_planes == 2) { + src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0); + src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1); + vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0); + vepu_write_relaxed(vpu, src[1], VEPU_REG_ADDR_IN_PLANE_1); + } else { + src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0); + src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1); + src[2] = vb2_dma_contig_plane_dma_addr(src_buf, 2); + vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0); + vepu_write_relaxed(vpu, src[1], VEPU_REG_ADDR_IN_PLANE_1); + vepu_write_relaxed(vpu, src[2], VEPU_REG_ADDR_IN_PLANE_2); + } +} + +static void +rk3399_vpu_jpeg_enc_set_qtable(struct rockchip_vpu_dev *vpu, + unsigned char *luma_qtable, + unsigned char *chroma_qtable) +{ + u32 reg, i; + + for (i = 0; i < VEPU_JPEG_QUANT_TABLE_COUNT; i++) { + reg = get_unaligned_be32(&luma_qtable[i]); + vepu_write_relaxed(vpu, reg, VEPU_REG_JPEG_LUMA_QUAT(i)); + + reg = get_unaligned_be32(&chroma_qtable[i]); + vepu_write_relaxed(vpu, reg, VEPU_REG_JPEG_CHROMA_QUAT(i)); + } +} + +void rk3399_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) +{ + struct rockchip_vpu_dev *vpu = ctx->dev; + struct vb2_v4l2_buffer *src_buf, *dst_buf; + struct rockchip_vpu_jpeg_ctx jpeg_ctx; + u32 reg; + + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + + memset(&jpeg_ctx, 0, sizeof(jpeg_ctx)); + jpeg_ctx.buffer = vb2_plane_vaddr(&dst_buf->vb2_buf, 0); + jpeg_ctx.width = ctx->dst_fmt.width; + jpeg_ctx.height = ctx->dst_fmt.height; + jpeg_ctx.quality = ctx->jpeg_quality; + rockchip_vpu_jpeg_header_assemble(&jpeg_ctx); + + /* Switch to JPEG encoder mode before writing registers */ + vepu_write_relaxed(vpu, VEPU_REG_ENCODE_FORMAT_JPEG, + VEPU_REG_ENCODE_START); + + rk3399_vpu_set_src_img_ctrl(vpu, ctx); + rk3399_vpu_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); + rk3399_vpu_jpeg_enc_set_qtable(vpu, + rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 0), + rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 1)); + + reg = VEPU_REG_OUTPUT_SWAP32 + | VEPU_REG_OUTPUT_SWAP16 + | VEPU_REG_OUTPUT_SWAP8 + | VEPU_REG_INPUT_SWAP8 + | VEPU_REG_INPUT_SWAP16 + | VEPU_REG_INPUT_SWAP32; + /* Make sure that all registers are written at this point. */ + vepu_write(vpu, reg, VEPU_REG_DATA_ENDIAN); + + reg = VEPU_REG_AXI_CTRL_BURST_LEN(16); + vepu_write_relaxed(vpu, reg, VEPU_REG_AXI_CTRL); + + reg = VEPU_REG_MB_WIDTH(JPEG_MB_WIDTH(ctx->src_fmt.width)) + | VEPU_REG_MB_HEIGHT(JPEG_MB_HEIGHT(ctx->src_fmt.height)) + | VEPU_REG_FRAME_TYPE_INTRA + | VEPU_REG_ENCODE_FORMAT_JPEG + | VEPU_REG_ENCODE_ENABLE; + + /* Kick the watchdog and start encoding */ + schedule_delayed_work(&vpu->watchdog_work, msecs_to_jiffies(2000)); + vepu_write(vpu, reg, VEPU_REG_ENCODE_START); +} diff --git a/drivers/staging/media/rockchip/vpu/rk3399_vpu_regs.h b/drivers/staging/media/rockchip/vpu/rk3399_vpu_regs.h new file mode 100644 index 000000000000..fbe294177ec9 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rk3399_vpu_regs.h @@ -0,0 +1,600 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip VPU codec driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Alpha Lin <alpha.lin@rock-chips.com> + */ + +#ifndef RK3399_VPU_REGS_H_ +#define RK3399_VPU_REGS_H_ + +/* Encoder registers. */ +#define VEPU_REG_VP8_QUT_1ST(i) (0x000 + ((i) * 0x24)) +#define VEPU_REG_VP8_QUT_DC_Y2(x) (((x) & 0x3fff) << 16) +#define VEPU_REG_VP8_QUT_DC_Y1(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_VP8_QUT_2ND(i) (0x004 + ((i) * 0x24)) +#define VEPU_REG_VP8_QUT_AC_Y1(x) (((x) & 0x3fff) << 16) +#define VEPU_REG_VP8_QUT_DC_CHR(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_VP8_QUT_3RD(i) (0x008 + ((i) * 0x24)) +#define VEPU_REG_VP8_QUT_AC_CHR(x) (((x) & 0x3fff) << 16) +#define VEPU_REG_VP8_QUT_AC_Y2(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_VP8_QUT_4TH(i) (0x00c + ((i) * 0x24)) +#define VEPU_REG_VP8_QUT_ZB_DC_CHR(x) (((x) & 0x1ff) << 18) +#define VEPU_REG_VP8_QUT_ZB_DC_Y2(x) (((x) & 0x1ff) << 9) +#define VEPU_REG_VP8_QUT_ZB_DC_Y1(x) (((x) & 0x1ff) << 0) +#define VEPU_REG_VP8_QUT_5TH(i) (0x010 + ((i) * 0x24)) +#define VEPU_REG_VP8_QUT_ZB_AC_CHR(x) (((x) & 0x1ff) << 18) +#define VEPU_REG_VP8_QUT_ZB_AC_Y2(x) (((x) & 0x1ff) << 9) +#define VEPU_REG_VP8_QUT_ZB_AC_Y1(x) (((x) & 0x1ff) << 0) +#define VEPU_REG_VP8_QUT_6TH(i) (0x014 + ((i) * 0x24)) +#define VEPU_REG_VP8_QUT_RND_DC_CHR(x) (((x) & 0xff) << 16) +#define VEPU_REG_VP8_QUT_RND_DC_Y2(x) (((x) & 0xff) << 8) +#define VEPU_REG_VP8_QUT_RND_DC_Y1(x) (((x) & 0xff) << 0) +#define VEPU_REG_VP8_QUT_7TH(i) (0x018 + ((i) * 0x24)) +#define VEPU_REG_VP8_QUT_RND_AC_CHR(x) (((x) & 0xff) << 16) +#define VEPU_REG_VP8_QUT_RND_AC_Y2(x) (((x) & 0xff) << 8) +#define VEPU_REG_VP8_QUT_RND_AC_Y1(x) (((x) & 0xff) << 0) +#define VEPU_REG_VP8_QUT_8TH(i) (0x01c + ((i) * 0x24)) +#define VEPU_REG_VP8_SEG_FILTER_LEVEL(x) (((x) & 0x3f) << 25) +#define VEPU_REG_VP8_DEQUT_DC_CHR(x) (((x) & 0xff) << 17) +#define VEPU_REG_VP8_DEQUT_DC_Y2(x) (((x) & 0x1ff) << 8) +#define VEPU_REG_VP8_DEQUT_DC_Y1(x) (((x) & 0xff) << 0) +#define VEPU_REG_VP8_QUT_9TH(i) (0x020 + ((i) * 0x24)) +#define VEPU_REG_VP8_DEQUT_AC_CHR(x) (((x) & 0x1ff) << 18) +#define VEPU_REG_VP8_DEQUT_AC_Y2(x) (((x) & 0x1ff) << 9) +#define VEPU_REG_VP8_DEQUT_AC_Y1(x) (((x) & 0x1ff) << 0) +#define VEPU_REG_ADDR_VP8_SEG_MAP 0x06c +#define VEPU_REG_VP8_INTRA_4X4_PENALTY(i) (0x070 + ((i) * 0x4)) +#define VEPU_REG_VP8_INTRA_4X4_PENALTY_0(x) (((x) & 0xfff) << 0) +#define VEPU_REG_VP8_INTRA_4x4_PENALTY_1(x) (((x) & 0xfff) << 16) +#define VEPU_REG_VP8_INTRA_16X16_PENALTY(i) (0x084 + ((i) * 0x4)) +#define VEPU_REG_VP8_INTRA_16X16_PENALTY_0(x) (((x) & 0xfff) << 0) +#define VEPU_REG_VP8_INTRA_16X16_PENALTY_1(x) (((x) & 0xfff) << 16) +#define VEPU_REG_VP8_CONTROL 0x0a0 +#define VEPU_REG_VP8_LF_MODE_DELTA_BPRED(x) (((x) & 0x1f) << 24) +#define VEPU_REG_VP8_LF_REF_DELTA_INTRA_MB(x) (((x) & 0x7f) << 16) +#define VEPU_REG_VP8_INTER_TYPE_BIT_COST(x) (((x) & 0xfff) << 0) +#define VEPU_REG_VP8_REF_FRAME_VAL 0x0a4 +#define VEPU_REG_VP8_COEF_DMV_PENALTY(x) (((x) & 0xfff) << 16) +#define VEPU_REG_VP8_REF_FRAME(x) (((x) & 0xfff) << 0) +#define VEPU_REG_VP8_LOOP_FILTER_REF_DELTA 0x0a8 +#define VEPU_REG_VP8_LF_REF_DELTA_ALT_REF(x) (((x) & 0x7f) << 16) +#define VEPU_REG_VP8_LF_REF_DELTA_LAST_REF(x) (((x) & 0x7f) << 8) +#define VEPU_REG_VP8_LF_REF_DELTA_GOLDEN(x) (((x) & 0x7f) << 0) +#define VEPU_REG_VP8_LOOP_FILTER_MODE_DELTA 0x0ac +#define VEPU_REG_VP8_LF_MODE_DELTA_SPLITMV(x) (((x) & 0x7f) << 16) +#define VEPU_REG_VP8_LF_MODE_DELTA_ZEROMV(x) (((x) & 0x7f) << 8) +#define VEPU_REG_VP8_LF_MODE_DELTA_NEWMV(x) (((x) & 0x7f) << 0) +#define VEPU_REG_JPEG_LUMA_QUAT(i) (0x000 + ((i) * 0x4)) +#define VEPU_REG_JPEG_CHROMA_QUAT(i) (0x040 + ((i) * 0x4)) +#define VEPU_REG_INTRA_SLICE_BITMAP(i) (0x0b0 + ((i) * 0x4)) +#define VEPU_REG_ADDR_VP8_DCT_PART(i) (0x0b0 + ((i) * 0x4)) +#define VEPU_REG_INTRA_AREA_CTRL 0x0b8 +#define VEPU_REG_INTRA_AREA_TOP(x) (((x) & 0xff) << 24) +#define VEPU_REG_INTRA_AREA_BOTTOM(x) (((x) & 0xff) << 16) +#define VEPU_REG_INTRA_AREA_LEFT(x) (((x) & 0xff) << 8) +#define VEPU_REG_INTRA_AREA_RIGHT(x) (((x) & 0xff) << 0) +#define VEPU_REG_CIR_INTRA_CTRL 0x0bc +#define VEPU_REG_CIR_INTRA_FIRST_MB(x) (((x) & 0xffff) << 16) +#define VEPU_REG_CIR_INTRA_INTERVAL(x) (((x) & 0xffff) << 0) +#define VEPU_REG_ADDR_IN_PLANE_0 0x0c0 +#define VEPU_REG_ADDR_IN_PLANE_1 0x0c4 +#define VEPU_REG_ADDR_IN_PLANE_2 0x0c8 +#define VEPU_REG_STR_HDR_REM_MSB 0x0cc +#define VEPU_REG_STR_HDR_REM_LSB 0x0d0 +#define VEPU_REG_STR_BUF_LIMIT 0x0d4 +#define VEPU_REG_AXI_CTRL 0x0d8 +#define VEPU_REG_AXI_CTRL_READ_ID(x) (((x) & 0xff) << 24) +#define VEPU_REG_AXI_CTRL_WRITE_ID(x) (((x) & 0xff) << 16) +#define VEPU_REG_AXI_CTRL_BURST_LEN(x) (((x) & 0x3f) << 8) +#define VEPU_REG_AXI_CTRL_INCREMENT_MODE(x) (((x) & 0x01) << 2) +#define VEPU_REG_AXI_CTRL_BIRST_DISCARD(x) (((x) & 0x01) << 1) +#define VEPU_REG_AXI_CTRL_BIRST_DISABLE BIT(0) +#define VEPU_QP_ADJUST_MAD_DELTA_ROI 0x0dc +#define VEPU_REG_ROI_QP_DELTA_1 (((x) & 0xf) << 12) +#define VEPU_REG_ROI_QP_DELTA_2 (((x) & 0xf) << 8) +#define VEPU_REG_MAD_QP_ADJUSTMENT (((x) & 0xf) << 0) +#define VEPU_REG_ADDR_REF_LUMA 0x0e0 +#define VEPU_REG_ADDR_REF_CHROMA 0x0e4 +#define VEPU_REG_QP_SUM_DIV2 0x0e8 +#define VEPU_REG_QP_SUM(x) (((x) & 0x001fffff) * 2) +#define VEPU_REG_ENC_CTRL0 0x0ec +#define VEPU_REG_DISABLE_QUARTER_PIXEL_MV BIT(28) +#define VEPU_REG_DEBLOCKING_FILTER_MODE(x) (((x) & 0x3) << 24) +#define VEPU_REG_CABAC_INIT_IDC(x) (((x) & 0x3) << 21) +#define VEPU_REG_ENTROPY_CODING_MODE BIT(20) +#define VEPU_REG_H264_TRANS8X8_MODE BIT(17) +#define VEPU_REG_H264_INTER4X4_MODE BIT(16) +#define VEPU_REG_H264_STREAM_MODE BIT(15) +#define VEPU_REG_H264_SLICE_SIZE(x) (((x) & 0x7f) << 8) +#define VEPU_REG_ENC_OVER_FILL_STRM_OFFSET 0x0f0 +#define VEPU_REG_STREAM_START_OFFSET(x) (((x) & 0x3f) << 16) +#define VEPU_REG_SKIP_MACROBLOCK_PENALTY(x) (((x) & 0xff) << 8) +#define VEPU_REG_IN_IMG_CTRL_OVRFLR_D4(x) (((x) & 0x3) << 4) +#define VEPU_REG_IN_IMG_CTRL_OVRFLB(x) (((x) & 0xf) << 0) +#define VEPU_REG_INPUT_LUMA_INFO 0x0f4 +#define VEPU_REG_IN_IMG_CHROMA_OFFSET(x) (((x) & 0x7) << 20) +#define VEPU_REG_IN_IMG_LUMA_OFFSET(x) (((x) & 0x7) << 16) +#define VEPU_REG_IN_IMG_CTRL_ROW_LEN(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_RLC_SUM 0x0f8 +#define VEPU_REG_RLC_SUM_OUT(x) (((x) & 0x007fffff) * 4) +#define VEPU_REG_SPLIT_PENALTY_4X4 0x0f8 +#define VEPU_REG_VP8_SPLIT_PENALTY_4X4 (((x) & 0x1ff) << 19) +#define VEPU_REG_ADDR_REC_LUMA 0x0fc +#define VEPU_REG_ADDR_REC_CHROMA 0x100 +#define VEPU_REG_CHECKPOINT(i) (0x104 + ((i) * 0x4)) +#define VEPU_REG_CHECKPOINT_CHECK0(x) (((x) & 0xffff)) +#define VEPU_REG_CHECKPOINT_CHECK1(x) (((x) & 0xffff) << 16) +#define VEPU_REG_CHECKPOINT_RESULT(x) \ + ((((x) >> (16 - 16 * ((i) & 1))) & 0xffff) * 32) +#define VEPU_REG_VP8_SEG0_QUANT_AC_Y1 0x104 +#define VEPU_REG_VP8_SEG0_RND_AC_Y1(x) (((x) & 0xff) << 23) +#define VEPU_REG_VP8_SEG0_ZBIN_AC_Y1(x) (((x) & 0x1ff) << 14) +#define VEPU_REG_VP8_SEG0_QUT_AC_Y1(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_VP8_SEG0_QUANT_DC_Y2 0x108 +#define VEPU_REG_VP8_SEG0_RND_DC_Y2(x) (((x) & 0xff) << 23) +#define VEPU_REG_VP8_SEG0_ZBIN_DC_Y2(x) (((x) & 0x1ff) << 14) +#define VEPU_REG_VP8_SEG0_QUT_DC_Y2(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_VP8_SEG0_QUANT_AC_Y2 0x10c +#define VEPU_REG_VP8_SEG0_RND_AC_Y2(x) (((x) & 0xff) << 23) +#define VEPU_REG_VP8_SEG0_ZBIN_AC_Y2(x) (((x) & 0x1ff) << 14) +#define VEPU_REG_VP8_SEG0_QUT_AC_Y2(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_VP8_SEG0_QUANT_DC_CHR 0x110 +#define VEPU_REG_VP8_SEG0_RND_DC_CHR(x) (((x) & 0xff) << 23) +#define VEPU_REG_VP8_SEG0_ZBIN_DC_CHR(x) (((x) & 0x1ff) << 14) +#define VEPU_REG_VP8_SEG0_QUT_DC_CHR(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_VP8_SEG0_QUANT_AC_CHR 0x114 +#define VEPU_REG_VP8_SEG0_RND_AC_CHR(x) (((x) & 0xff) << 23) +#define VEPU_REG_VP8_SEG0_ZBIN_AC_CHR(x) (((x) & 0x1ff) << 14) +#define VEPU_REG_VP8_SEG0_QUT_AC_CHR(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_VP8_SEG0_QUANT_DQUT 0x118 +#define VEPU_REG_VP8_MV_REF_IDX1(x) (((x) & 0x03) << 26) +#define VEPU_REG_VP8_SEG0_DQUT_DC_Y2(x) (((x) & 0x1ff) << 17) +#define VEPU_REG_VP8_SEG0_DQUT_AC_Y1(x) (((x) & 0x1ff) << 8) +#define VEPU_REG_VP8_SEG0_DQUT_DC_Y1(x) (((x) & 0xff) << 0) +#define VEPU_REG_CHKPT_WORD_ERR(i) (0x118 + ((i) * 0x4)) +#define VEPU_REG_CHKPT_WORD_ERR_CHK0(x) (((x) & 0xffff)) +#define VEPU_REG_CHKPT_WORD_ERR_CHK1(x) (((x) & 0xffff) << 16) +#define VEPU_REG_VP8_SEG0_QUANT_DQUT_1 0x11c +#define VEPU_REG_VP8_SEGMENT_MAP_UPDATE BIT(30) +#define VEPU_REG_VP8_SEGMENT_EN BIT(29) +#define VEPU_REG_VP8_MV_REF_IDX2_EN BIT(28) +#define VEPU_REG_VP8_MV_REF_IDX2(x) (((x) & 0x03) << 26) +#define VEPU_REG_VP8_SEG0_DQUT_AC_CHR(x) (((x) & 0x1ff) << 17) +#define VEPU_REG_VP8_SEG0_DQUT_DC_CHR(x) (((x) & 0xff) << 9) +#define VEPU_REG_VP8_SEG0_DQUT_AC_Y2(x) (((x) & 0x1ff) << 0) +#define VEPU_REG_VP8_BOOL_ENC_VALUE 0x120 +#define VEPU_REG_CHKPT_DELTA_QP 0x124 +#define VEPU_REG_CHKPT_DELTA_QP_CHK0(x) (((x) & 0x0f) << 0) +#define VEPU_REG_CHKPT_DELTA_QP_CHK1(x) (((x) & 0x0f) << 4) +#define VEPU_REG_CHKPT_DELTA_QP_CHK2(x) (((x) & 0x0f) << 8) +#define VEPU_REG_CHKPT_DELTA_QP_CHK3(x) (((x) & 0x0f) << 12) +#define VEPU_REG_CHKPT_DELTA_QP_CHK4(x) (((x) & 0x0f) << 16) +#define VEPU_REG_CHKPT_DELTA_QP_CHK5(x) (((x) & 0x0f) << 20) +#define VEPU_REG_CHKPT_DELTA_QP_CHK6(x) (((x) & 0x0f) << 24) +#define VEPU_REG_VP8_ENC_CTRL2 0x124 +#define VEPU_REG_VP8_ZERO_MV_PENALTY_FOR_REF2(x) (((x) & 0xff) << 24) +#define VEPU_REG_VP8_FILTER_SHARPNESS(x) (((x) & 0x07) << 21) +#define VEPU_REG_VP8_FILTER_LEVEL(x) (((x) & 0x3f) << 15) +#define VEPU_REG_VP8_DCT_PARTITION_CNT(x) (((x) & 0x03) << 13) +#define VEPU_REG_VP8_BOOL_ENC_VALUE_BITS(x) (((x) & 0x1f) << 8) +#define VEPU_REG_VP8_BOOL_ENC_RANGE(x) (((x) & 0xff) << 0) +#define VEPU_REG_ENC_CTRL1 0x128 +#define VEPU_REG_MAD_THRESHOLD(x) (((x) & 0x3f) << 24) +#define VEPU_REG_COMPLETED_SLICES(x) (((x) & 0xff) << 16) +#define VEPU_REG_IN_IMG_CTRL_FMT(x) (((x) & 0xf) << 4) +#define VEPU_REG_IN_IMG_ROTATE_MODE(x) (((x) & 0x3) << 2) +#define VEPU_REG_SIZE_TABLE_PRESENT BIT(0) +#define VEPU_REG_INTRA_INTER_MODE 0x12c +#define VEPU_REG_INTRA16X16_MODE(x) (((x) & 0xffff) << 16) +#define VEPU_REG_INTER_MODE(x) (((x) & 0xffff) << 0) +#define VEPU_REG_ENC_CTRL2 0x130 +#define VEPU_REG_PPS_INIT_QP(x) (((x) & 0x3f) << 26) +#define VEPU_REG_SLICE_FILTER_ALPHA(x) (((x) & 0xf) << 22) +#define VEPU_REG_SLICE_FILTER_BETA(x) (((x) & 0xf) << 18) +#define VEPU_REG_CHROMA_QP_OFFSET(x) (((x) & 0x1f) << 13) +#define VEPU_REG_FILTER_DISABLE BIT(5) +#define VEPU_REG_IDR_PIC_ID(x) (((x) & 0xf) << 1) +#define VEPU_REG_CONSTRAINED_INTRA_PREDICTION BIT(0) +#define VEPU_REG_ADDR_OUTPUT_STREAM 0x134 +#define VEPU_REG_ADDR_OUTPUT_CTRL 0x138 +#define VEPU_REG_ADDR_NEXT_PIC 0x13c +#define VEPU_REG_ADDR_MV_OUT 0x140 +#define VEPU_REG_ADDR_CABAC_TBL 0x144 +#define VEPU_REG_ROI1 0x148 +#define VEPU_REG_ROI1_TOP_MB(x) (((x) & 0xff) << 24) +#define VEPU_REG_ROI1_BOTTOM_MB(x) (((x) & 0xff) << 16) +#define VEPU_REG_ROI1_LEFT_MB(x) (((x) & 0xff) << 8) +#define VEPU_REG_ROI1_RIGHT_MB(x) (((x) & 0xff) << 0) +#define VEPU_REG_ROI2 0x14c +#define VEPU_REG_ROI2_TOP_MB(x) (((x) & 0xff) << 24) +#define VEPU_REG_ROI2_BOTTOM_MB(x) (((x) & 0xff) << 16) +#define VEPU_REG_ROI2_LEFT_MB(x) (((x) & 0xff) << 8) +#define VEPU_REG_ROI2_RIGHT_MB(x) (((x) & 0xff) << 0) +#define VEPU_REG_STABLE_MATRIX(i) (0x150 + ((i) * 0x4)) +#define VEPU_REG_STABLE_MOTION_SUM 0x174 +#define VEPU_REG_STABILIZATION_OUTPUT 0x178 +#define VEPU_REG_STABLE_MIN_VALUE(x) (((x) & 0xffffff) << 8) +#define VEPU_REG_STABLE_MODE_SEL(x) (((x) & 0x3) << 6) +#define VEPU_REG_STABLE_HOR_GMV(x) (((x) & 0x3f) << 0) +#define VEPU_REG_RGB2YUV_CONVERSION_COEF1 0x17c +#define VEPU_REG_RGB2YUV_CONVERSION_COEFB(x) (((x) & 0xffff) << 16) +#define VEPU_REG_RGB2YUV_CONVERSION_COEFA(x) (((x) & 0xffff) << 0) +#define VEPU_REG_RGB2YUV_CONVERSION_COEF2 0x180 +#define VEPU_REG_RGB2YUV_CONVERSION_COEFE(x) (((x) & 0xffff) << 16) +#define VEPU_REG_RGB2YUV_CONVERSION_COEFC(x) (((x) & 0xffff) << 0) +#define VEPU_REG_RGB2YUV_CONVERSION_COEF3 0x184 +#define VEPU_REG_RGB2YUV_CONVERSION_COEFF(x) (((x) & 0xffff) << 0) +#define VEPU_REG_RGB_MASK_MSB 0x188 +#define VEPU_REG_RGB_MASK_B_MSB(x) (((x) & 0x1f) << 16) +#define VEPU_REG_RGB_MASK_G_MSB(x) (((x) & 0x1f) << 8) +#define VEPU_REG_RGB_MASK_R_MSB(x) (((x) & 0x1f) << 0) +#define VEPU_REG_MV_PENALTY 0x18c +#define VEPU_REG_1MV_PENALTY(x) (((x) & 0x3ff) << 21) +#define VEPU_REG_QMV_PENALTY(x) (((x) & 0x3ff) << 11) +#define VEPU_REG_4MV_PENALTY(x) (((x) & 0x3ff) << 1) +#define VEPU_REG_SPLIT_MV_MODE_EN BIT(0) +#define VEPU_REG_QP_VAL 0x190 +#define VEPU_REG_H264_LUMA_INIT_QP(x) (((x) & 0x3f) << 26) +#define VEPU_REG_H264_QP_MAX(x) (((x) & 0x3f) << 20) +#define VEPU_REG_H264_QP_MIN(x) (((x) & 0x3f) << 14) +#define VEPU_REG_H264_CHKPT_DISTANCE(x) (((x) & 0xfff) << 0) +#define VEPU_REG_VP8_SEG0_QUANT_DC_Y1 0x190 +#define VEPU_REG_VP8_SEG0_RND_DC_Y1(x) (((x) & 0xff) << 23) +#define VEPU_REG_VP8_SEG0_ZBIN_DC_Y1(x) (((x) & 0x1ff) << 14) +#define VEPU_REG_VP8_SEG0_QUT_DC_Y1(x) (((x) & 0x3fff) << 0) +#define VEPU_REG_MVC_RELATE 0x198 +#define VEPU_REG_ZERO_MV_FAVOR_D2(x) (((x) & 0xf) << 20) +#define VEPU_REG_PENALTY_4X4MV(x) (((x) & 0x1ff) << 11) +#define VEPU_REG_MVC_VIEW_ID(x) (((x) & 0x7) << 8) +#define VEPU_REG_MVC_ANCHOR_PIC_FLAG BIT(7) +#define VEPU_REG_MVC_PRIORITY_ID(x) (((x) & 0x7) << 4) +#define VEPU_REG_MVC_TEMPORAL_ID(x) (((x) & 0x7) << 1) +#define VEPU_REG_MVC_INTER_VIEW_FLAG BIT(0) +#define VEPU_REG_ENCODE_START 0x19c +#define VEPU_REG_MB_HEIGHT(x) (((x) & 0x1ff) << 20) +#define VEPU_REG_MB_WIDTH(x) (((x) & 0x1ff) << 8) +#define VEPU_REG_FRAME_TYPE_INTER (0x0 << 6) +#define VEPU_REG_FRAME_TYPE_INTRA (0x1 << 6) +#define VEPU_REG_FRAME_TYPE_MVCINTER (0x2 << 6) +#define VEPU_REG_ENCODE_FORMAT_JPEG (0x2 << 4) +#define VEPU_REG_ENCODE_FORMAT_H264 (0x3 << 4) +#define VEPU_REG_ENCODE_ENABLE BIT(0) +#define VEPU_REG_MB_CTRL 0x1a0 +#define VEPU_REG_MB_CNT_OUT(x) (((x) & 0xffff) << 16) +#define VEPU_REG_MB_CNT_SET(x) (((x) & 0xffff) << 0) +#define VEPU_REG_DATA_ENDIAN 0x1a4 +#define VEPU_REG_INPUT_SWAP8 BIT(31) +#define VEPU_REG_INPUT_SWAP16 BIT(30) +#define VEPU_REG_INPUT_SWAP32 BIT(29) +#define VEPU_REG_OUTPUT_SWAP8 BIT(28) +#define VEPU_REG_OUTPUT_SWAP16 BIT(27) +#define VEPU_REG_OUTPUT_SWAP32 BIT(26) +#define VEPU_REG_TEST_IRQ BIT(24) +#define VEPU_REG_TEST_COUNTER(x) (((x) & 0xf) << 20) +#define VEPU_REG_TEST_REG BIT(19) +#define VEPU_REG_TEST_MEMORY BIT(18) +#define VEPU_REG_TEST_LEN(x) (((x) & 0x3ffff) << 0) +#define VEPU_REG_ENC_CTRL3 0x1a8 +#define VEPU_REG_PPS_ID(x) (((x) & 0xff) << 24) +#define VEPU_REG_INTRA_PRED_MODE(x) (((x) & 0xff) << 16) +#define VEPU_REG_FRAME_NUM(x) (((x) & 0xffff) << 0) +#define VEPU_REG_ENC_CTRL4 0x1ac +#define VEPU_REG_MV_PENALTY_16X8_8X16(x) (((x) & 0x3ff) << 20) +#define VEPU_REG_MV_PENALTY_8X8(x) (((x) & 0x3ff) << 10) +#define VEPU_REG_MV_PENALTY_8X4_4X8(x) (((x) & 0x3ff) << 0) +#define VEPU_REG_ADDR_VP8_PROB_CNT 0x1b0 +#define VEPU_REG_INTERRUPT 0x1b4 +#define VEPU_REG_INTERRUPT_NON BIT(28) +#define VEPU_REG_MV_WRITE_EN BIT(24) +#define VEPU_REG_RECON_WRITE_DIS BIT(20) +#define VEPU_REG_INTERRUPT_SLICE_READY_EN BIT(16) +#define VEPU_REG_CLK_GATING_EN BIT(12) +#define VEPU_REG_INTERRUPT_TIMEOUT_EN BIT(10) +#define VEPU_REG_INTERRUPT_RESET BIT(9) +#define VEPU_REG_INTERRUPT_DIS_BIT BIT(8) +#define VEPU_REG_INTERRUPT_TIMEOUT BIT(6) +#define VEPU_REG_INTERRUPT_BUFFER_FULL BIT(5) +#define VEPU_REG_INTERRUPT_BUS_ERROR BIT(4) +#define VEPU_REG_INTERRUPT_FUSE BIT(3) +#define VEPU_REG_INTERRUPT_SLICE_READY BIT(2) +#define VEPU_REG_INTERRUPT_FRAME_READY BIT(1) +#define VEPU_REG_INTERRUPT_BIT BIT(0) +#define VEPU_REG_DMV_PENALTY_TBL(i) (0x1E0 + ((i) * 0x4)) +#define VEPU_REG_DMV_PENALTY_TABLE_BIT(x, i) ((x) << (i) * 8) +#define VEPU_REG_DMV_Q_PIXEL_PENALTY_TBL(i) (0x260 + ((i) * 0x4)) +#define VEPU_REG_DMV_Q_PIXEL_PENALTY_TABLE_BIT(x, i) ((x) << (i) * 8) + +/* vpu decoder register */ +#define VDPU_REG_DEC_CTRL0 0x0c8 // 50 +#define VDPU_REG_REF_BUF_CTRL2_REFBU2_PICID(x) (((x) & 0x1f) << 25) +#define VDPU_REG_REF_BUF_CTRL2_REFBU2_THR(x) (((x) & 0xfff) << 13) +#define VDPU_REG_CONFIG_TILED_MODE_LSB BIT(12) +#define VDPU_REG_CONFIG_DEC_ADV_PRE_DIS BIT(11) +#define VDPU_REG_CONFIG_DEC_SCMD_DIS BIT(10) +#define VDPU_REG_DEC_CTRL0_SKIP_MODE BIT(9) +#define VDPU_REG_DEC_CTRL0_FILTERING_DIS BIT(8) +#define VDPU_REG_DEC_CTRL0_PIC_FIXED_QUANT BIT(7) +#define VDPU_REG_CONFIG_DEC_LATENCY(x) (((x) & 0x3f) << 1) +#define VDPU_REG_CONFIG_TILED_MODE_MSB(x) BIT(0) +#define VDPU_REG_CONFIG_DEC_OUT_TILED_E BIT(0) +#define VDPU_REG_STREAM_LEN 0x0cc +#define VDPU_REG_DEC_CTRL3_INIT_QP(x) (((x) & 0x3f) << 25) +#define VDPU_REG_DEC_STREAM_LEN_HI BIT(24) +#define VDPU_REG_DEC_CTRL3_STREAM_LEN(x) (((x) & 0xffffff) << 0) +#define VDPU_REG_ERROR_CONCEALMENT 0x0d0 +#define VDPU_REG_REF_BUF_CTRL2_APF_THRESHOLD(x) (((x) & 0x3fff) << 17) +#define VDPU_REG_ERR_CONC_STARTMB_X(x) (((x) & 0x1ff) << 8) +#define VDPU_REG_ERR_CONC_STARTMB_Y(x) (((x) & 0xff) << 0) +#define VDPU_REG_DEC_FORMAT 0x0d4 +#define VDPU_REG_DEC_CTRL0_DEC_MODE(x) (((x) & 0xf) << 0) +#define VDPU_REG_DATA_ENDIAN 0x0d8 +#define VDPU_REG_CONFIG_DEC_STRENDIAN_E BIT(5) +#define VDPU_REG_CONFIG_DEC_STRSWAP32_E BIT(4) +#define VDPU_REG_CONFIG_DEC_OUTSWAP32_E BIT(3) +#define VDPU_REG_CONFIG_DEC_INSWAP32_E BIT(2) +#define VDPU_REG_CONFIG_DEC_OUT_ENDIAN BIT(1) +#define VDPU_REG_CONFIG_DEC_IN_ENDIAN BIT(0) +#define VDPU_REG_INTERRUPT 0x0dc +#define VDPU_REG_INTERRUPT_DEC_TIMEOUT BIT(13) +#define VDPU_REG_INTERRUPT_DEC_ERROR_INT BIT(12) +#define VDPU_REG_INTERRUPT_DEC_PIC_INF BIT(10) +#define VDPU_REG_INTERRUPT_DEC_SLICE_INT BIT(9) +#define VDPU_REG_INTERRUPT_DEC_ASO_INT BIT(8) +#define VDPU_REG_INTERRUPT_DEC_BUFFER_INT BIT(6) +#define VDPU_REG_INTERRUPT_DEC_BUS_INT BIT(5) +#define VDPU_REG_INTERRUPT_DEC_RDY_INT BIT(4) +#define VDPU_REG_INTERRUPT_DEC_IRQ_DIS BIT(1) +#define VDPU_REG_INTERRUPT_DEC_IRQ BIT(0) +#define VDPU_REG_AXI_CTRL 0x0e0 +#define VDPU_REG_AXI_DEC_SEL BIT(23) +#define VDPU_REG_CONFIG_DEC_DATA_DISC_E BIT(22) +#define VDPU_REG_PARAL_BUS_E(x) BIT(21) +#define VDPU_REG_CONFIG_DEC_MAX_BURST(x) (((x) & 0x1f) << 16) +#define VDPU_REG_DEC_CTRL0_DEC_AXI_WR_ID(x) (((x) & 0xff) << 8) +#define VDPU_REG_CONFIG_DEC_AXI_RD_ID(x) (((x) & 0xff) << 0) +#define VDPU_REG_EN_FLAGS 0x0e4 +#define VDPU_REG_AHB_HLOCK_E BIT(31) +#define VDPU_REG_CACHE_E BIT(29) +#define VDPU_REG_PREFETCH_SINGLE_CHANNEL_E BIT(28) +#define VDPU_REG_INTRA_3_CYCLE_ENHANCE BIT(27) +#define VDPU_REG_INTRA_DOUBLE_SPEED BIT(26) +#define VDPU_REG_INTER_DOUBLE_SPEED BIT(25) +#define VDPU_REG_DEC_CTRL3_START_CODE_E BIT(22) +#define VDPU_REG_DEC_CTRL3_CH_8PIX_ILEAV_E BIT(21) +#define VDPU_REG_DEC_CTRL0_RLC_MODE_E BIT(20) +#define VDPU_REG_DEC_CTRL0_DIVX3_E BIT(19) +#define VDPU_REG_DEC_CTRL0_PJPEG_E BIT(18) +#define VDPU_REG_DEC_CTRL0_PIC_INTERLACE_E BIT(17) +#define VDPU_REG_DEC_CTRL0_PIC_FIELDMODE_E BIT(16) +#define VDPU_REG_DEC_CTRL0_PIC_B_E BIT(15) +#define VDPU_REG_DEC_CTRL0_PIC_INTER_E BIT(14) +#define VDPU_REG_DEC_CTRL0_PIC_TOPFIELD_E BIT(13) +#define VDPU_REG_DEC_CTRL0_FWD_INTERLACE_E BIT(12) +#define VDPU_REG_DEC_CTRL0_SORENSON_E BIT(11) +#define VDPU_REG_DEC_CTRL0_WRITE_MVS_E BIT(10) +#define VDPU_REG_DEC_CTRL0_REF_TOPFIELD_E BIT(9) +#define VDPU_REG_DEC_CTRL0_REFTOPFIRST_E BIT(8) +#define VDPU_REG_DEC_CTRL0_SEQ_MBAFF_E BIT(7) +#define VDPU_REG_DEC_CTRL0_PICORD_COUNT_E BIT(6) +#define VDPU_REG_CONFIG_DEC_TIMEOUT_E BIT(5) +#define VDPU_REG_CONFIG_DEC_CLK_GATE_E BIT(4) +#define VDPU_REG_DEC_CTRL0_DEC_OUT_DIS BIT(2) +#define VDPU_REG_REF_BUF_CTRL2_REFBU2_BUF_E BIT(1) +#define VDPU_REG_INTERRUPT_DEC_E BIT(0) +#define VDPU_REG_SOFT_RESET 0x0e8 +#define VDPU_REG_PRED_FLT 0x0ec +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_0(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_1(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_2(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_ADDITIONAL_CHROMA_ADDRESS 0x0f0 +#define VDPU_REG_ADDR_QTABLE 0x0f4 +#define VDPU_REG_DIRECT_MV_ADDR 0x0f8 +#define VDPU_REG_ADDR_DST 0x0fc +#define VDPU_REG_ADDR_STR 0x100 +#define VDPU_REG_REFBUF_RELATED 0x104 +#define VDPU_REG_FWD_PIC(i) (0x128 + ((i) * 0x4)) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F5(x) (((x) & 0x1f) << 25) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F4(x) (((x) & 0x1f) << 20) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 15) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F2(x) (((x) & 0x1f) << 10) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F1(x) (((x) & 0x1f) << 5) +#define VDPU_REG_FWD_PIC_PINIT_RLIST_F0(x) (((x) & 0x1f) << 0) +#define VDPU_REG_REF_PIC(i) (0x130 + ((i) * 0x4)) +#define VDPU_REG_REF_PIC_REFER1_NBR(x) (((x) & 0xffff) << 16) +#define VDPU_REG_REF_PIC_REFER0_NBR(x) (((x) & 0xffff) << 0) +#define VDPU_REG_H264_ADDR_REF(i) (0x150 + ((i) * 0x4)) +#define VDPU_REG_ADDR_REF_FIELD_E BIT(1) +#define VDPU_REG_ADDR_REF_TOPC_E BIT(0) +#define VDPU_REG_INITIAL_REF_PIC_LIST0 0x190 +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F5(x) (((x) & 0x1f) << 25) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F4(x) (((x) & 0x1f) << 20) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F3(x) (((x) & 0x1f) << 15) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F2(x) (((x) & 0x1f) << 10) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F1(x) (((x) & 0x1f) << 5) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F0(x) (((x) & 0x1f) << 0) +#define VDPU_REG_INITIAL_REF_PIC_LIST1 0x194 +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F11(x) (((x) & 0x1f) << 25) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F10(x) (((x) & 0x1f) << 20) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F9(x) (((x) & 0x1f) << 15) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F8(x) (((x) & 0x1f) << 10) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F7(x) (((x) & 0x1f) << 5) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F6(x) (((x) & 0x1f) << 0) +#define VDPU_REG_INITIAL_REF_PIC_LIST2 0x198 +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F15(x) (((x) & 0x1f) << 15) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F14(x) (((x) & 0x1f) << 10) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F13(x) (((x) & 0x1f) << 5) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_F12(x) (((x) & 0x1f) << 0) +#define VDPU_REG_INITIAL_REF_PIC_LIST3 0x19c +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B5(x) (((x) & 0x1f) << 25) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B4(x) (((x) & 0x1f) << 20) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B3(x) (((x) & 0x1f) << 15) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B2(x) (((x) & 0x1f) << 10) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B1(x) (((x) & 0x1f) << 5) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B0(x) (((x) & 0x1f) << 0) +#define VDPU_REG_INITIAL_REF_PIC_LIST4 0x1a0 +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B11(x) (((x) & 0x1f) << 25) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B10(x) (((x) & 0x1f) << 20) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B9(x) (((x) & 0x1f) << 15) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B8(x) (((x) & 0x1f) << 10) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B7(x) (((x) & 0x1f) << 5) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B6(x) (((x) & 0x1f) << 0) +#define VDPU_REG_INITIAL_REF_PIC_LIST5 0x1a4 +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B15(x) (((x) & 0x1f) << 15) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B14(x) (((x) & 0x1f) << 10) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B13(x) (((x) & 0x1f) << 5) +#define VDPU_REG_BD_REF_PIC_BINIT_RLIST_B12(x) (((x) & 0x1f) << 0) +#define VDPU_REG_INITIAL_REF_PIC_LIST6 0x1a8 +#define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 15) +#define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F2(x) (((x) & 0x1f) << 10) +#define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F1(x) (((x) & 0x1f) << 5) +#define VDPU_REG_BD_P_REF_PIC_PINIT_RLIST_F0(x) (((x) & 0x1f) << 0) +#define VDPU_REG_LT_REF 0x1ac +#define VDPU_REG_VALID_REF 0x1b0 +#define VDPU_REG_H264_PIC_MB_SIZE 0x1b8 +#define VDPU_REG_DEC_CTRL2_CH_QP_OFFSET2(x) (((x) & 0x1f) << 22) +#define VDPU_REG_DEC_CTRL2_CH_QP_OFFSET(x) (((x) & 0x1f) << 17) +#define VDPU_REG_DEC_CTRL1_PIC_MB_HEIGHT_P(x) (((x) & 0xff) << 9) +#define VDPU_REG_DEC_CTRL1_PIC_MB_WIDTH(x) (((x) & 0x1ff) << 0) +#define VDPU_REG_H264_CTRL 0x1bc +#define VDPU_REG_DEC_CTRL4_WEIGHT_BIPR_IDC(x) (((x) & 0x3) << 16) +#define VDPU_REG_DEC_CTRL1_REF_FRAMES(x) (((x) & 0x1f) << 0) +#define VDPU_REG_CURRENT_FRAME 0x1c0 +#define VDPU_REG_DEC_CTRL5_FILT_CTRL_PRES BIT(31) +#define VDPU_REG_DEC_CTRL5_RDPIC_CNT_PRES BIT(30) +#define VDPU_REG_DEC_CTRL4_FRAMENUM_LEN(x) (((x) & 0x1f) << 16) +#define VDPU_REG_DEC_CTRL4_FRAMENUM(x) (((x) & 0xffff) << 0) +#define VDPU_REG_REF_FRAME 0x1c4 +#define VDPU_REG_DEC_CTRL5_REFPIC_MK_LEN(x) (((x) & 0x7ff) << 16) +#define VDPU_REG_DEC_CTRL5_IDR_PIC_ID(x) (((x) & 0xffff) << 0) +#define VDPU_REG_DEC_CTRL6 0x1c8 +#define VDPU_REG_DEC_CTRL6_PPS_ID(x) (((x) & 0xff) << 24) +#define VDPU_REG_DEC_CTRL6_REFIDX1_ACTIVE(x) (((x) & 0x1f) << 19) +#define VDPU_REG_DEC_CTRL6_REFIDX0_ACTIVE(x) (((x) & 0x1f) << 14) +#define VDPU_REG_DEC_CTRL6_POC_LENGTH(x) (((x) & 0xff) << 0) +#define VDPU_REG_ENABLE_FLAG 0x1cc +#define VDPU_REG_DEC_CTRL5_IDR_PIC_E BIT(8) +#define VDPU_REG_DEC_CTRL4_DIR_8X8_INFER_E BIT(7) +#define VDPU_REG_DEC_CTRL4_BLACKWHITE_E BIT(6) +#define VDPU_REG_DEC_CTRL4_CABAC_E BIT(5) +#define VDPU_REG_DEC_CTRL4_WEIGHT_PRED_E BIT(4) +#define VDPU_REG_DEC_CTRL5_CONST_INTRA_E BIT(3) +#define VDPU_REG_DEC_CTRL5_8X8TRANS_FLAG_E BIT(2) +#define VDPU_REG_DEC_CTRL2_TYPE1_QUANT_E BIT(1) +#define VDPU_REG_DEC_CTRL2_FIELDPIC_FLAG_E BIT(0) +#define VDPU_REG_VP8_PIC_MB_SIZE 0x1e0 +#define VDPU_REG_DEC_PIC_MB_WIDTH(x) (((x) & 0x1ff) << 23) +#define VDPU_REG_DEC_MB_WIDTH_OFF(x) (((x) & 0xf) << 19) +#define VDPU_REG_DEC_PIC_MB_HEIGHT_P(x) (((x) & 0xff) << 11) +#define VDPU_REG_DEC_MB_HEIGHT_OFF(x) (((x) & 0xf) << 7) +#define VDPU_REG_DEC_CTRL1_PIC_MB_W_EXT(x) (((x) & 0x7) << 3) +#define VDPU_REG_DEC_CTRL1_PIC_MB_H_EXT(x) (((x) & 0x7) << 0) +#define VDPU_REG_VP8_DCT_START_BIT 0x1e4 +#define VDPU_REG_DEC_CTRL4_DCT1_START_BIT(x) (((x) & 0x3f) << 26) +#define VDPU_REG_DEC_CTRL4_DCT2_START_BIT(x) (((x) & 0x3f) << 20) +#define VDPU_REG_DEC_CTRL4_VC1_HEIGHT_EXT BIT(13) +#define VDPU_REG_DEC_CTRL4_BILIN_MC_E BIT(12) +#define VDPU_REG_VP8_CTRL0 0x1e8 +#define VDPU_REG_DEC_CTRL2_STRM_START_BIT(x) (((x) & 0x3f) << 26) +#define VDPU_REG_DEC_CTRL2_STRM1_START_BIT(x) (((x) & 0x3f) << 18) +#define VDPU_REG_DEC_CTRL2_BOOLEAN_VALUE(x) (((x) & 0xff) << 8) +#define VDPU_REG_DEC_CTRL2_BOOLEAN_RANGE(x) (((x) & 0xff) << 0) +#define VDPU_REG_VP8_DATA_VAL 0x1f0 +#define VDPU_REG_DEC_CTRL6_COEFFS_PART_AM(x) (((x) & 0xf) << 24) +#define VDPU_REG_DEC_CTRL6_STREAM1_LEN(x) (((x) & 0xffffff) << 0) +#define VDPU_REG_PRED_FLT7 0x1f4 +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_5_1(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_5_2(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_5_3(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_PRED_FLT8 0x1f8 +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_6_0(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_6_1(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_6_2(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_PRED_FLT9 0x1fc +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_6_3(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_7_0(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_7_1(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_PRED_FLT10 0x200 +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_7_2(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_7_3(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_2_M1(x) (((x) & 0x3) << 10) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_2_4(x) (((x) & 0x3) << 8) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_4_M1(x) (((x) & 0x3) << 6) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_4_4(x) (((x) & 0x3) << 4) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_6_M1(x) (((x) & 0x3) << 2) +#define VDPU_REG_BD_REF_PIC_PRED_TAP_6_4(x) (((x) & 0x3) << 0) +#define VDPU_REG_FILTER_LEVEL 0x204 +#define VDPU_REG_REF_PIC_LF_LEVEL_0(x) (((x) & 0x3f) << 18) +#define VDPU_REG_REF_PIC_LF_LEVEL_1(x) (((x) & 0x3f) << 12) +#define VDPU_REG_REF_PIC_LF_LEVEL_2(x) (((x) & 0x3f) << 6) +#define VDPU_REG_REF_PIC_LF_LEVEL_3(x) (((x) & 0x3f) << 0) +#define VDPU_REG_VP8_QUANTER0 0x208 +#define VDPU_REG_REF_PIC_QUANT_DELTA_0(x) (((x) & 0x1f) << 27) +#define VDPU_REG_REF_PIC_QUANT_DELTA_1(x) (((x) & 0x1f) << 22) +#define VDPU_REG_REF_PIC_QUANT_0(x) (((x) & 0x7ff) << 11) +#define VDPU_REG_REF_PIC_QUANT_1(x) (((x) & 0x7ff) << 0) +#define VDPU_REG_VP8_ADDR_REF0 0x20c +#define VDPU_REG_FILTER_MB_ADJ 0x210 +#define VDPU_REG_REF_PIC_FILT_TYPE_E BIT(31) +#define VDPU_REG_REF_PIC_FILT_SHARPNESS(x) (((x) & 0x7) << 28) +#define VDPU_REG_FILT_MB_ADJ_0(x) (((x) & 0x7f) << 21) +#define VDPU_REG_FILT_MB_ADJ_1(x) (((x) & 0x7f) << 14) +#define VDPU_REG_FILT_MB_ADJ_2(x) (((x) & 0x7f) << 7) +#define VDPU_REG_FILT_MB_ADJ_3(x) (((x) & 0x7f) << 0) +#define VDPU_REG_FILTER_REF_ADJ 0x214 +#define VDPU_REG_REF_PIC_ADJ_0(x) (((x) & 0x7f) << 21) +#define VDPU_REG_REF_PIC_ADJ_1(x) (((x) & 0x7f) << 14) +#define VDPU_REG_REF_PIC_ADJ_2(x) (((x) & 0x7f) << 7) +#define VDPU_REG_REF_PIC_ADJ_3(x) (((x) & 0x7f) << 0) +#define VDPU_REG_VP8_ADDR_REF2_5(i) (0x218 + ((i) * 0x4)) +#define VDPU_REG_VP8_GREF_SIGN_BIAS BIT(0) +#define VDPU_REG_VP8_AREF_SIGN_BIAS BIT(0) +#define VDPU_REG_VP8_DCT_BASE(i) (0x230 + ((i) * 0x4)) +#define VDPU_REG_VP8_ADDR_CTRL_PART 0x244 +#define VDPU_REG_VP8_ADDR_REF1 0x250 +#define VDPU_REG_VP8_SEGMENT_VAL 0x254 +#define VDPU_REG_FWD_PIC1_SEGMENT_BASE(x) ((x) << 0) +#define VDPU_REG_FWD_PIC1_SEGMENT_UPD_E BIT(1) +#define VDPU_REG_FWD_PIC1_SEGMENT_E BIT(0) +#define VDPU_REG_VP8_DCT_START_BIT2 0x258 +#define VDPU_REG_DEC_CTRL7_DCT3_START_BIT(x) (((x) & 0x3f) << 24) +#define VDPU_REG_DEC_CTRL7_DCT4_START_BIT(x) (((x) & 0x3f) << 18) +#define VDPU_REG_DEC_CTRL7_DCT5_START_BIT(x) (((x) & 0x3f) << 12) +#define VDPU_REG_DEC_CTRL7_DCT6_START_BIT(x) (((x) & 0x3f) << 6) +#define VDPU_REG_DEC_CTRL7_DCT7_START_BIT(x) (((x) & 0x3f) << 0) +#define VDPU_REG_VP8_QUANTER1 0x25c +#define VDPU_REG_REF_PIC_QUANT_DELTA_2(x) (((x) & 0x1f) << 27) +#define VDPU_REG_REF_PIC_QUANT_DELTA_3(x) (((x) & 0x1f) << 22) +#define VDPU_REG_REF_PIC_QUANT_2(x) (((x) & 0x7ff) << 11) +#define VDPU_REG_REF_PIC_QUANT_3(x) (((x) & 0x7ff) << 0) +#define VDPU_REG_VP8_QUANTER2 0x260 +#define VDPU_REG_REF_PIC_QUANT_DELTA_4(x) (((x) & 0x1f) << 27) +#define VDPU_REG_REF_PIC_QUANT_4(x) (((x) & 0x7ff) << 11) +#define VDPU_REG_REF_PIC_QUANT_5(x) (((x) & 0x7ff) << 0) +#define VDPU_REG_PRED_FLT1 0x264 +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_0_3(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_1_0(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_1_1(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_PRED_FLT2 0x268 +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_1_2(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_1_3(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_2_0(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_PRED_FLT3 0x26c +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_2_1(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_2_2(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_2_3(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_PRED_FLT4 0x270 +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_3_0(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_3_1(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_3_2(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_PRED_FLT5 0x274 +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_3_3(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_4_0(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_4_1(x) (((x) & 0x3ff) << 2) +#define VDPU_REG_PRED_FLT6 0x278 +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_4_2(x) (((x) & 0x3ff) << 22) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_4_3(x) (((x) & 0x3ff) << 12) +#define VDPU_REG_PRED_FLT_PRED_BC_TAP_5_0(x) (((x) & 0x3ff) << 2) + +#endif /* RK3399_VPU_REGS_H_ */ diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu.h b/drivers/staging/media/rockchip/vpu/rockchip_vpu.h new file mode 100644 index 000000000000..1ec2be483e27 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu.h @@ -0,0 +1,232 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip VPU codec driver + * + * Copyright 2018 Google LLC. + * Tomasz Figa <tfiga@chromium.org> + * + * Based on s5p-mfc driver by Samsung Electronics Co., Ltd. + * Copyright (C) 2011 Samsung Electronics Co., Ltd. + */ + +#ifndef ROCKCHIP_VPU_H_ +#define ROCKCHIP_VPU_H_ + +#include <linux/platform_device.h> +#include <linux/videodev2.h> +#include <linux/wait.h> +#include <linux/clk.h> + +#include <media/v4l2-ctrls.h> +#include <media/v4l2-device.h> +#include <media/v4l2-ioctl.h> +#include <media/videobuf2-core.h> +#include <media/videobuf2-dma-contig.h> + +#include "rockchip_vpu_hw.h" + +#define ROCKCHIP_VPU_MAX_CLOCKS 4 + +#define JPEG_MB_DIM 16 +#define JPEG_MB_WIDTH(w) DIV_ROUND_UP(w, JPEG_MB_DIM) +#define JPEG_MB_HEIGHT(h) DIV_ROUND_UP(h, JPEG_MB_DIM) + +struct rockchip_vpu_ctx; +struct rockchip_vpu_codec_ops; + +#define RK_VPU_CODEC_JPEG BIT(0) + +/** + * struct rockchip_vpu_variant - information about VPU hardware variant + * + * @enc_offset: Offset from VPU base to encoder registers. + * @enc_fmts: Encoder formats. + * @num_enc_fmts: Number of encoder formats. + * @codec: Supported codecs + * @codec_ops: Codec ops. + * @init: Initialize hardware. + * @vepu_irq: encoder interrupt handler + * @clk_names: array of clock names + * @num_clocks: number of clocks in the array + */ +struct rockchip_vpu_variant { + unsigned int enc_offset; + const struct rockchip_vpu_fmt *enc_fmts; + unsigned int num_enc_fmts; + unsigned int codec; + const struct rockchip_vpu_codec_ops *codec_ops; + int (*init)(struct rockchip_vpu_dev *vpu); + irqreturn_t (*vepu_irq)(int irq, void *priv); + const char *clk_names[ROCKCHIP_VPU_MAX_CLOCKS]; + int num_clocks; +}; + +/** + * enum rockchip_vpu_codec_mode - codec operating mode. + * @RK_VPU_MODE_NONE: No operating mode. Used for RAW video formats. + * @RK_VPU_MODE_JPEG_ENC: JPEG encoder. + */ +enum rockchip_vpu_codec_mode { + RK_VPU_MODE_NONE = -1, + RK_VPU_MODE_JPEG_ENC, +}; + +/** + * struct rockchip_vpu_dev - driver data + * @v4l2_dev: V4L2 device to register video devices for. + * @m2m_dev: mem2mem device associated to this device. + * @mdev: media device associated to this device. + * @vfd_enc: Video device for encoder. + * @pdev: Pointer to VPU platform device. + * @dev: Pointer to device for convenient logging using + * dev_ macros. + * @clocks: Array of clock handles. + * @base: Mapped address of VPU registers. + * @enc_base: Mapped address of VPU encoder register for convenience. + * @vpu_mutex: Mutex to synchronize V4L2 calls. + * @irqlock: Spinlock to synchronize access to data structures + * shared with interrupt handlers. + * @variant: Hardware variant-specific parameters. + * @watchdog_work: Delayed work for hardware timeout handling. + */ +struct rockchip_vpu_dev { + struct v4l2_device v4l2_dev; + struct v4l2_m2m_dev *m2m_dev; + struct media_device mdev; + struct video_device *vfd_enc; + struct platform_device *pdev; + struct device *dev; + struct clk_bulk_data clocks[ROCKCHIP_VPU_MAX_CLOCKS]; + void __iomem *base; + void __iomem *enc_base; + + struct mutex vpu_mutex; /* video_device lock */ + spinlock_t irqlock; + const struct rockchip_vpu_variant *variant; + struct delayed_work watchdog_work; +}; + +/** + * struct rockchip_vpu_ctx - Context (instance) private data. + * + * @dev: VPU driver data to which the context belongs. + * @fh: V4L2 file handler. + * + * @sequence_cap: Sequence counter for capture queue + * @sequence_out: Sequence counter for output queue + * + * @vpu_src_fmt: Descriptor of active source format. + * @src_fmt: V4L2 pixel format of active source format. + * @vpu_dst_fmt: Descriptor of active destination format. + * @dst_fmt: V4L2 pixel format of active destination format. + * + * @ctrl_handler: Control handler used to register controls. + * @jpeg_quality: User-specified JPEG compression quality. + * + * @codec_ops: Set of operations related to codec mode. + * + * @bounce_dma_addr: Bounce buffer bus address. + * @bounce_buf: Bounce buffer pointer. + * @bounce_size: Bounce buffer size. + */ +struct rockchip_vpu_ctx { + struct rockchip_vpu_dev *dev; + struct v4l2_fh fh; + + u32 sequence_cap; + u32 sequence_out; + + const struct rockchip_vpu_fmt *vpu_src_fmt; + struct v4l2_pix_format_mplane src_fmt; + const struct rockchip_vpu_fmt *vpu_dst_fmt; + struct v4l2_pix_format_mplane dst_fmt; + + struct v4l2_ctrl_handler ctrl_handler; + int jpeg_quality; + + const struct rockchip_vpu_codec_ops *codec_ops; + + dma_addr_t bounce_dma_addr; + void *bounce_buf; + size_t bounce_size; +}; + +/** + * struct rockchip_vpu_fmt - information about supported video formats. + * @name: Human readable name of the format. + * @fourcc: FourCC code of the format. See V4L2_PIX_FMT_*. + * @codec_mode: Codec mode related to this format. See + * enum rockchip_vpu_codec_mode. + * @header_size: Optional header size. Currently used by JPEG encoder. + * @max_depth: Maximum depth, for bitstream formats + * @enc_fmt: Format identifier for encoder registers. + * @frmsize: Supported range of frame sizes (only for bitstream formats). + */ +struct rockchip_vpu_fmt { + char *name; + u32 fourcc; + enum rockchip_vpu_codec_mode codec_mode; + int header_size; + int max_depth; + enum rockchip_vpu_enc_fmt enc_fmt; + struct v4l2_frmsize_stepwise frmsize; +}; + +/* Logging helpers */ + +/** + * debug - Module parameter to control level of debugging messages. + * + * Level of debugging messages can be controlled by bits of + * module parameter called "debug". Meaning of particular + * bits is as follows: + * + * bit 0 - global information: mode, size, init, release + * bit 1 - each run start/result information + * bit 2 - contents of small controls from userspace + * bit 3 - contents of big controls from userspace + * bit 4 - detail fmt, ctrl, buffer q/dq information + * bit 5 - detail function enter/leave trace information + * bit 6 - register write/read information + */ +extern int rockchip_vpu_debug; + +#define vpu_debug(level, fmt, args...) \ + do { \ + if (rockchip_vpu_debug & BIT(level)) \ + pr_info("%s:%d: " fmt, \ + __func__, __LINE__, ##args); \ + } while (0) + +#define vpu_err(fmt, args...) \ + pr_err("%s:%d: " fmt, __func__, __LINE__, ##args) + +/* Structure access helpers. */ +static inline struct rockchip_vpu_ctx *fh_to_ctx(struct v4l2_fh *fh) +{ + return container_of(fh, struct rockchip_vpu_ctx, fh); +} + +/* Register accessors. */ +static inline void vepu_write_relaxed(struct rockchip_vpu_dev *vpu, + u32 val, u32 reg) +{ + vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val); + writel_relaxed(val, vpu->enc_base + reg); +} + +static inline void vepu_write(struct rockchip_vpu_dev *vpu, u32 val, u32 reg) +{ + vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val); + writel(val, vpu->enc_base + reg); +} + +static inline u32 vepu_read(struct rockchip_vpu_dev *vpu, u32 reg) +{ + u32 val = readl(vpu->enc_base + reg); + + vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val); + return val; +} + +#endif /* ROCKCHIP_VPU_H_ */ diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_common.h b/drivers/staging/media/rockchip/vpu/rockchip_vpu_common.h new file mode 100644 index 000000000000..ca77668d9579 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_common.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip VPU codec driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Alpha Lin <Alpha.Lin@rock-chips.com> + * Jeffy Chen <jeffy.chen@rock-chips.com> + * + * Copyright 2018 Google LLC. + * Tomasz Figa <tfiga@chromium.org> + * + * Based on s5p-mfc driver by Samsung Electronics Co., Ltd. + * Copyright (C) 2011 Samsung Electronics Co., Ltd. + */ + +#ifndef ROCKCHIP_VPU_COMMON_H_ +#define ROCKCHIP_VPU_COMMON_H_ + +#include "rockchip_vpu.h" + +extern const struct v4l2_ioctl_ops rockchip_vpu_enc_ioctl_ops; +extern const struct vb2_ops rockchip_vpu_enc_queue_ops; + +void rockchip_vpu_enc_reset_src_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx); +void rockchip_vpu_enc_reset_dst_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx); + +#endif /* ROCKCHIP_VPU_COMMON_H_ */ diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c b/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c new file mode 100644 index 000000000000..962412c79b91 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c @@ -0,0 +1,537 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip VPU codec driver + * + * Copyright (C) 2018 Collabora, Ltd. + * Copyright 2018 Google LLC. + * Tomasz Figa <tfiga@chromium.org> + * + * Based on s5p-mfc driver by Samsung Electronics Co., Ltd. + * Copyright (C) 2011 Samsung Electronics Co., Ltd. + */ + +#include <linux/clk.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/pm.h> +#include <linux/pm_runtime.h> +#include <linux/slab.h> +#include <linux/videodev2.h> +#include <linux/workqueue.h> +#include <media/v4l2-event.h> +#include <media/v4l2-mem2mem.h> +#include <media/videobuf2-core.h> +#include <media/videobuf2-core.h> +#include <media/videobuf2-vmalloc.h> + +#include "rockchip_vpu_common.h" +#include "rockchip_vpu.h" +#include "rockchip_vpu_hw.h" + +#define DRIVER_NAME "rockchip-vpu" + +int rockchip_vpu_debug; +module_param_named(debug, rockchip_vpu_debug, int, 0644); +MODULE_PARM_DESC(debug, + "Debug level - higher value produces more verbose messages"); + +static void rockchip_vpu_job_finish(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx, + unsigned int bytesused, + enum vb2_buffer_state result) +{ + struct vb2_v4l2_buffer *src, *dst; + size_t avail_size; + + pm_runtime_mark_last_busy(vpu->dev); + pm_runtime_put_autosuspend(vpu->dev); + clk_bulk_disable(vpu->variant->num_clocks, vpu->clocks); + + src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + + if (WARN_ON(!src)) + return; + if (WARN_ON(!dst)) + return; + + src->sequence = ctx->sequence_out++; + dst->sequence = ctx->sequence_cap++; + + dst->field = src->field; + if (src->flags & V4L2_BUF_FLAG_TIMECODE) + dst->timecode = src->timecode; + dst->vb2_buf.timestamp = src->vb2_buf.timestamp; + dst->flags &= ~(V4L2_BUF_FLAG_TSTAMP_SRC_MASK | + V4L2_BUF_FLAG_TIMECODE); + dst->flags |= src->flags & (V4L2_BUF_FLAG_TSTAMP_SRC_MASK | + V4L2_BUF_FLAG_TIMECODE); + + avail_size = vb2_plane_size(&dst->vb2_buf, 0) - + ctx->vpu_dst_fmt->header_size; + if (bytesused <= avail_size) { + if (ctx->bounce_buf) { + memcpy(vb2_plane_vaddr(&dst->vb2_buf, 0) + + ctx->vpu_dst_fmt->header_size, + ctx->bounce_buf, bytesused); + } + dst->vb2_buf.planes[0].bytesused = + ctx->vpu_dst_fmt->header_size + bytesused; + } else { + result = VB2_BUF_STATE_ERROR; + } + + v4l2_m2m_buf_done(src, result); + v4l2_m2m_buf_done(dst, result); + + v4l2_m2m_job_finish(vpu->m2m_dev, ctx->fh.m2m_ctx); +} + +void rockchip_vpu_irq_done(struct rockchip_vpu_dev *vpu, + unsigned int bytesused, + enum vb2_buffer_state result) +{ + struct rockchip_vpu_ctx *ctx = + v4l2_m2m_get_curr_priv(vpu->m2m_dev); + + /* + * If cancel_delayed_work returns false + * the timeout expired. The watchdog is running, + * and will take care of finishing the job. + */ + if (cancel_delayed_work(&vpu->watchdog_work)) + rockchip_vpu_job_finish(vpu, ctx, bytesused, result); +} + +void rockchip_vpu_watchdog(struct work_struct *work) +{ + struct rockchip_vpu_dev *vpu; + struct rockchip_vpu_ctx *ctx; + + vpu = container_of(to_delayed_work(work), + struct rockchip_vpu_dev, watchdog_work); + ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev); + if (ctx) { + vpu_err("frame processing timed out!\n"); + ctx->codec_ops->reset(ctx); + rockchip_vpu_job_finish(vpu, ctx, 0, VB2_BUF_STATE_ERROR); + } +} + +static void device_run(void *priv) +{ + struct rockchip_vpu_ctx *ctx = priv; + int ret; + + ret = clk_bulk_enable(ctx->dev->variant->num_clocks, ctx->dev->clocks); + if (ret) + goto err_cancel_job; + ret = pm_runtime_get_sync(ctx->dev->dev); + if (ret < 0) + goto err_cancel_job; + + ctx->codec_ops->run(ctx); + return; + +err_cancel_job: + rockchip_vpu_job_finish(ctx->dev, ctx, 0, VB2_BUF_STATE_ERROR); +} + +static struct v4l2_m2m_ops vpu_m2m_ops = { + .device_run = device_run, +}; + +static int +enc_queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) +{ + struct rockchip_vpu_ctx *ctx = priv; + int ret; + + src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; + src_vq->io_modes = VB2_MMAP | VB2_DMABUF; + src_vq->drv_priv = ctx; + src_vq->ops = &rockchip_vpu_enc_queue_ops; + src_vq->mem_ops = &vb2_dma_contig_memops; + + /* + * Driver does mostly sequential access, so sacrifice TLB efficiency + * for faster allocation. Also, no CPU access on the source queue, + * so no kernel mapping needed. + */ + src_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES | + DMA_ATTR_NO_KERNEL_MAPPING; + src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + src_vq->lock = &ctx->dev->vpu_mutex; + src_vq->dev = ctx->dev->v4l2_dev.dev; + + ret = vb2_queue_init(src_vq); + if (ret) + return ret; + + /* + * The CAPTURE queue doesn't need dma memory, + * as the CPU needs to create the JPEG frames, + * from the hardware-produced JPEG payload. + * + * For the DMA destination buffer, we use + * a bounce buffer. + */ + dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; + dst_vq->drv_priv = ctx; + dst_vq->ops = &rockchip_vpu_enc_queue_ops; + dst_vq->mem_ops = &vb2_vmalloc_memops; + dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + dst_vq->lock = &ctx->dev->vpu_mutex; + dst_vq->dev = ctx->dev->v4l2_dev.dev; + + return vb2_queue_init(dst_vq); +} + +static int rockchip_vpu_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct rockchip_vpu_ctx *ctx; + + ctx = container_of(ctrl->handler, + struct rockchip_vpu_ctx, ctrl_handler); + + vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val); + + switch (ctrl->id) { + case V4L2_CID_JPEG_COMPRESSION_QUALITY: + ctx->jpeg_quality = ctrl->val; + break; + default: + return -EINVAL; + } + + return 0; +} + +static const struct v4l2_ctrl_ops rockchip_vpu_ctrl_ops = { + .s_ctrl = rockchip_vpu_s_ctrl, +}; + +static int rockchip_vpu_ctrls_setup(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) +{ + v4l2_ctrl_handler_init(&ctx->ctrl_handler, 1); + if (vpu->variant->codec & RK_VPU_CODEC_JPEG) { + v4l2_ctrl_new_std(&ctx->ctrl_handler, &rockchip_vpu_ctrl_ops, + V4L2_CID_JPEG_COMPRESSION_QUALITY, + 5, 100, 1, 50); + if (ctx->ctrl_handler.error) { + vpu_err("Adding JPEG control failed %d\n", + ctx->ctrl_handler.error); + v4l2_ctrl_handler_free(&ctx->ctrl_handler); + return ctx->ctrl_handler.error; + } + } + + return v4l2_ctrl_handler_setup(&ctx->ctrl_handler); +} + +/* + * V4L2 file operations. + */ + +static int rockchip_vpu_open(struct file *filp) +{ + struct rockchip_vpu_dev *vpu = video_drvdata(filp); + struct video_device *vdev = video_devdata(filp); + struct rockchip_vpu_ctx *ctx; + int ret; + + /* + * We do not need any extra locking here, because we operate only + * on local data here, except reading few fields from dev, which + * do not change through device's lifetime (which is guaranteed by + * reference on module from open()) and V4L2 internal objects (such + * as vdev and ctx->fh), which have proper locking done in respective + * helper functions used here. + */ + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + ctx->dev = vpu; + if (vdev == vpu->vfd_enc) + ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(vpu->m2m_dev, ctx, + &enc_queue_init); + else + ctx->fh.m2m_ctx = ERR_PTR(-ENODEV); + if (IS_ERR(ctx->fh.m2m_ctx)) { + ret = PTR_ERR(ctx->fh.m2m_ctx); + kfree(ctx); + return ret; + } + + v4l2_fh_init(&ctx->fh, vdev); + filp->private_data = &ctx->fh; + v4l2_fh_add(&ctx->fh); + + if (vdev == vpu->vfd_enc) { + rockchip_vpu_enc_reset_dst_fmt(vpu, ctx); + rockchip_vpu_enc_reset_src_fmt(vpu, ctx); + } + + ret = rockchip_vpu_ctrls_setup(vpu, ctx); + if (ret) { + vpu_err("Failed to set up controls\n"); + goto err_fh_free; + } + ctx->fh.ctrl_handler = &ctx->ctrl_handler; + + return 0; + +err_fh_free: + v4l2_fh_del(&ctx->fh); + v4l2_fh_exit(&ctx->fh); + kfree(ctx); + return ret; +} + +static int rockchip_vpu_release(struct file *filp) +{ + struct rockchip_vpu_ctx *ctx = + container_of(filp->private_data, struct rockchip_vpu_ctx, fh); + + /* + * No need for extra locking because this was the last reference + * to this file. + */ + v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); + v4l2_fh_del(&ctx->fh); + v4l2_fh_exit(&ctx->fh); + v4l2_ctrl_handler_free(&ctx->ctrl_handler); + kfree(ctx); + + return 0; +} + +static const struct v4l2_file_operations rockchip_vpu_fops = { + .owner = THIS_MODULE, + .open = rockchip_vpu_open, + .release = rockchip_vpu_release, + .poll = v4l2_m2m_fop_poll, + .unlocked_ioctl = video_ioctl2, + .mmap = v4l2_m2m_fop_mmap, +}; + +static const struct of_device_id of_rockchip_vpu_match[] = { + { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, }, + { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, of_rockchip_vpu_match); + +static int rockchip_vpu_video_device_register(struct rockchip_vpu_dev *vpu) +{ + const struct of_device_id *match; + struct video_device *vfd; + int function, ret; + + match = of_match_node(of_rockchip_vpu_match, vpu->dev->of_node); + vfd = video_device_alloc(); + if (!vfd) { + v4l2_err(&vpu->v4l2_dev, "Failed to allocate video device\n"); + return -ENOMEM; + } + + vfd->fops = &rockchip_vpu_fops; + vfd->release = video_device_release; + vfd->lock = &vpu->vpu_mutex; + vfd->v4l2_dev = &vpu->v4l2_dev; + vfd->vfl_dir = VFL_DIR_M2M; + vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_M2M_MPLANE; + vfd->ioctl_ops = &rockchip_vpu_enc_ioctl_ops; + snprintf(vfd->name, sizeof(vfd->name), "%s-enc", match->compatible); + vpu->vfd_enc = vfd; + video_set_drvdata(vfd, vpu); + + ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0); + if (ret) { + v4l2_err(&vpu->v4l2_dev, "Failed to register video device\n"); + goto err_free_dev; + } + v4l2_info(&vpu->v4l2_dev, "registered as /dev/video%d\n", vfd->num); + + function = MEDIA_ENT_F_PROC_VIDEO_ENCODER; + ret = v4l2_m2m_register_media_controller(vpu->m2m_dev, vfd, function); + if (ret) { + v4l2_err(&vpu->v4l2_dev, "Failed to init mem2mem media controller\n"); + goto err_unreg_video; + } + return 0; + +err_unreg_video: + video_unregister_device(vfd); +err_free_dev: + video_device_release(vfd); + return ret; +} + +static int rockchip_vpu_probe(struct platform_device *pdev) +{ + const struct of_device_id *match; + struct rockchip_vpu_dev *vpu; + struct resource *res; + int i, ret; + + vpu = devm_kzalloc(&pdev->dev, sizeof(*vpu), GFP_KERNEL); + if (!vpu) + return -ENOMEM; + + vpu->dev = &pdev->dev; + vpu->pdev = pdev; + mutex_init(&vpu->vpu_mutex); + spin_lock_init(&vpu->irqlock); + + match = of_match_node(of_rockchip_vpu_match, pdev->dev.of_node); + vpu->variant = match->data; + + INIT_DELAYED_WORK(&vpu->watchdog_work, rockchip_vpu_watchdog); + + for (i = 0; i < vpu->variant->num_clocks; i++) + vpu->clocks[i].id = vpu->variant->clk_names[i]; + ret = devm_clk_bulk_get(&pdev->dev, vpu->variant->num_clocks, + vpu->clocks); + if (ret) + return ret; + + res = platform_get_resource(vpu->pdev, IORESOURCE_MEM, 0); + vpu->base = devm_ioremap_resource(vpu->dev, res); + if (IS_ERR(vpu->base)) + return PTR_ERR(vpu->base); + vpu->enc_base = vpu->base + vpu->variant->enc_offset; + + ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32)); + if (ret) { + dev_err(vpu->dev, "Could not set DMA coherent mask.\n"); + return ret; + } + + if (vpu->variant->vepu_irq) { + int irq; + + irq = platform_get_irq_byname(vpu->pdev, "vepu"); + if (irq <= 0) { + dev_err(vpu->dev, "Could not get vepu IRQ.\n"); + return -ENXIO; + } + + ret = devm_request_irq(vpu->dev, irq, vpu->variant->vepu_irq, + 0, dev_name(vpu->dev), vpu); + if (ret) { + dev_err(vpu->dev, "Could not request vepu IRQ.\n"); + return ret; + } + } + + ret = vpu->variant->init(vpu); + if (ret) { + dev_err(&pdev->dev, "Failed to init VPU hardware\n"); + return ret; + } + + pm_runtime_set_autosuspend_delay(vpu->dev, 100); + pm_runtime_use_autosuspend(vpu->dev); + pm_runtime_enable(vpu->dev); + + ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks); + if (ret) { + dev_err(&pdev->dev, "Failed to prepare clocks\n"); + return ret; + } + + ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev); + if (ret) { + dev_err(&pdev->dev, "Failed to register v4l2 device\n"); + goto err_clk_unprepare; + } + platform_set_drvdata(pdev, vpu); + + vpu->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops); + if (IS_ERR(vpu->m2m_dev)) { + v4l2_err(&vpu->v4l2_dev, "Failed to init mem2mem device\n"); + ret = PTR_ERR(vpu->m2m_dev); + goto err_v4l2_unreg; + } + + vpu->mdev.dev = vpu->dev; + strlcpy(vpu->mdev.model, DRIVER_NAME, sizeof(vpu->mdev.model)); + media_device_init(&vpu->mdev); + vpu->v4l2_dev.mdev = &vpu->mdev; + + ret = rockchip_vpu_video_device_register(vpu); + if (ret) { + dev_err(&pdev->dev, "Failed to register encoder\n"); + goto err_m2m_rel; + } + + ret = media_device_register(&vpu->mdev); + if (ret) { + v4l2_err(&vpu->v4l2_dev, "Failed to register mem2mem media device\n"); + goto err_video_dev_unreg; + } + return 0; +err_video_dev_unreg: + if (vpu->vfd_enc) { + video_unregister_device(vpu->vfd_enc); + video_device_release(vpu->vfd_enc); + } +err_m2m_rel: + v4l2_m2m_release(vpu->m2m_dev); +err_v4l2_unreg: + v4l2_device_unregister(&vpu->v4l2_dev); +err_clk_unprepare: + clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); + pm_runtime_disable(vpu->dev); + return ret; +} + +static int rockchip_vpu_remove(struct platform_device *pdev) +{ + struct rockchip_vpu_dev *vpu = platform_get_drvdata(pdev); + + v4l2_info(&vpu->v4l2_dev, "Removing %s\n", pdev->name); + + media_device_unregister(&vpu->mdev); + v4l2_m2m_unregister_media_controller(vpu->m2m_dev); + v4l2_m2m_release(vpu->m2m_dev); + media_device_cleanup(&vpu->mdev); + if (vpu->vfd_enc) { + video_unregister_device(vpu->vfd_enc); + video_device_release(vpu->vfd_enc); + } + v4l2_device_unregister(&vpu->v4l2_dev); + clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); + pm_runtime_disable(vpu->dev); + return 0; +} + +static const struct dev_pm_ops rockchip_vpu_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) +}; + +static struct platform_driver rockchip_vpu_driver = { + .probe = rockchip_vpu_probe, + .remove = rockchip_vpu_remove, + .driver = { + .name = DRIVER_NAME, + .of_match_table = of_match_ptr(of_rockchip_vpu_match), + .pm = &rockchip_vpu_pm_ops, + }, +}; +module_platform_driver(rockchip_vpu_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Alpha Lin <Alpha.Lin@Rock-Chips.com>"); +MODULE_AUTHOR("Tomasz Figa <tfiga@chromium.org>"); +MODULE_AUTHOR("Ezequiel Garcia <ezequiel@collabora.com>"); +MODULE_DESCRIPTION("Rockchip VPU codec driver"); diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_enc.c b/drivers/staging/media/rockchip/vpu/rockchip_vpu_enc.c new file mode 100644 index 000000000000..ab0fb2053620 --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_enc.c @@ -0,0 +1,670 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip VPU codec driver + * + * Copyright (C) 2018 Collabora, Ltd. + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Alpha Lin <Alpha.Lin@rock-chips.com> + * Jeffy Chen <jeffy.chen@rock-chips.com> + * + * Copyright 2018 Google LLC. + * Tomasz Figa <tfiga@chromium.org> + * + * Based on s5p-mfc driver by Samsung Electronics Co., Ltd. + * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd. + */ + +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/pm_runtime.h> +#include <linux/videodev2.h> +#include <linux/workqueue.h> +#include <media/v4l2-ctrls.h> +#include <media/v4l2-event.h> +#include <media/v4l2-mem2mem.h> +#include <media/videobuf2-core.h> +#include <media/videobuf2-dma-sg.h> + +#include "rockchip_vpu.h" +#include "rockchip_vpu_hw.h" +#include "rockchip_vpu_common.h" + +/** + * struct v4l2_format_info - information about a V4L2 format + * @format: 4CC format identifier (V4L2_PIX_FMT_*) + * @header_size: Size of header, optional and used by compressed formats + * @num_planes: Number of planes (1 to 3) + * @cpp: Number of bytes per pixel (per plane) + * @hsub: Horizontal chroma subsampling factor + * @vsub: Vertical chroma subsampling factor + * @is_compressed: Is it a compressed format? + * @multiplanar: Is it a multiplanar variant format? (e.g. NV12M) + */ +struct v4l2_format_info { + u32 format; + u32 header_size; + u8 num_planes; + u8 cpp[3]; + u8 hsub; + u8 vsub; + u8 is_compressed; + u8 multiplanar; +}; + +static const struct v4l2_format_info * +v4l2_format_info(u32 format) +{ + static const struct v4l2_format_info formats[] = { + { .format = V4L2_PIX_FMT_YUV420M, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 2, .vsub = 2, .multiplanar = 1 }, + { .format = V4L2_PIX_FMT_NV12M, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 2, .multiplanar = 1 }, + { .format = V4L2_PIX_FMT_YUYV, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, + { .format = V4L2_PIX_FMT_UYVY, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, + }; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(formats); ++i) { + if (formats[i].format == format) + return &formats[i]; + } + + vpu_err("Unsupported V4L 4CC format (%08x)\n", format); + return NULL; +} + +static void +fill_pixfmt_mp(struct v4l2_pix_format_mplane *pixfmt, + int pixelformat, int width, int height) +{ + const struct v4l2_format_info *info; + struct v4l2_plane_pix_format *plane; + int i; + + info = v4l2_format_info(pixelformat); + if (!info) + return; + + pixfmt->width = width; + pixfmt->height = height; + pixfmt->pixelformat = pixelformat; + + if (!info->multiplanar) { + pixfmt->num_planes = 1; + plane = &pixfmt->plane_fmt[0]; + plane->bytesperline = info->is_compressed ? + 0 : width * info->cpp[0]; + plane->sizeimage = info->header_size; + for (i = 0; i < info->num_planes; i++) { + unsigned int hsub = (i == 0) ? 1 : info->hsub; + unsigned int vsub = (i == 0) ? 1 : info->vsub; + + plane->sizeimage += info->cpp[i] * + DIV_ROUND_UP(width, hsub) * + DIV_ROUND_UP(height, vsub); + } + } else { + pixfmt->num_planes = info->num_planes; + for (i = 0; i < info->num_planes; i++) { + unsigned int hsub = (i == 0) ? 1 : info->hsub; + unsigned int vsub = (i == 0) ? 1 : info->vsub; + + plane = &pixfmt->plane_fmt[i]; + plane->bytesperline = + info->cpp[i] * DIV_ROUND_UP(width, hsub); + plane->sizeimage = + plane->bytesperline * DIV_ROUND_UP(height, vsub); + } + } +} + +static const struct rockchip_vpu_fmt * +rockchip_vpu_find_format(struct rockchip_vpu_ctx *ctx, u32 fourcc) +{ + struct rockchip_vpu_dev *dev = ctx->dev; + const struct rockchip_vpu_fmt *formats; + unsigned int num_fmts, i; + + formats = dev->variant->enc_fmts; + num_fmts = dev->variant->num_enc_fmts; + for (i = 0; i < num_fmts; i++) + if (formats[i].fourcc == fourcc) + return &formats[i]; + return NULL; +} + +static const struct rockchip_vpu_fmt * +rockchip_vpu_get_default_fmt(struct rockchip_vpu_ctx *ctx, bool bitstream) +{ + struct rockchip_vpu_dev *dev = ctx->dev; + const struct rockchip_vpu_fmt *formats; + unsigned int num_fmts, i; + + formats = dev->variant->enc_fmts; + num_fmts = dev->variant->num_enc_fmts; + for (i = 0; i < num_fmts; i++) { + if (bitstream == (formats[i].codec_mode != RK_VPU_MODE_NONE)) + return &formats[i]; + } + return NULL; +} + +static int vidioc_querycap(struct file *file, void *priv, + struct v4l2_capability *cap) +{ + struct rockchip_vpu_dev *vpu = video_drvdata(file); + + strscpy(cap->driver, vpu->dev->driver->name, sizeof(cap->driver)); + strscpy(cap->card, vpu->vfd_enc->name, sizeof(cap->card)); + snprintf(cap->bus_info, sizeof(cap->bus_info), "platform: %s", + vpu->dev->driver->name); + return 0; +} + +static int vidioc_enum_framesizes(struct file *file, void *priv, + struct v4l2_frmsizeenum *fsize) +{ + struct rockchip_vpu_ctx *ctx = fh_to_ctx(priv); + const struct rockchip_vpu_fmt *fmt; + + if (fsize->index != 0) { + vpu_debug(0, "invalid frame size index (expected 0, got %d)\n", + fsize->index); + return -EINVAL; + } + + fmt = rockchip_vpu_find_format(ctx, fsize->pixel_format); + if (!fmt) { + vpu_debug(0, "unsupported bitstream format (%08x)\n", + fsize->pixel_format); + return -EINVAL; + } + + /* This only makes sense for coded formats */ + if (fmt->codec_mode == RK_VPU_MODE_NONE) + return -EINVAL; + + fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; + fsize->stepwise = fmt->frmsize; + + return 0; +} + +static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct rockchip_vpu_dev *dev = video_drvdata(file); + const struct rockchip_vpu_fmt *fmt; + const struct rockchip_vpu_fmt *formats; + int num_fmts, i, j = 0; + + formats = dev->variant->enc_fmts; + num_fmts = dev->variant->num_enc_fmts; + for (i = 0; i < num_fmts; i++) { + /* Skip uncompressed formats */ + if (formats[i].codec_mode == RK_VPU_MODE_NONE) + continue; + if (j == f->index) { + fmt = &formats[i]; + f->pixelformat = fmt->fourcc; + return 0; + } + ++j; + } + return -EINVAL; +} + +static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct rockchip_vpu_dev *dev = video_drvdata(file); + const struct rockchip_vpu_fmt *formats; + const struct rockchip_vpu_fmt *fmt; + int num_fmts, i, j = 0; + + formats = dev->variant->enc_fmts; + num_fmts = dev->variant->num_enc_fmts; + for (i = 0; i < num_fmts; i++) { + if (formats[i].codec_mode != RK_VPU_MODE_NONE) + continue; + if (j == f->index) { + fmt = &formats[i]; + f->pixelformat = fmt->fourcc; + return 0; + } + ++j; + } + return -EINVAL; +} + +static int vidioc_g_fmt_out_mplane(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + struct rockchip_vpu_ctx *ctx = fh_to_ctx(priv); + + vpu_debug(4, "f->type = %d\n", f->type); + + *pix_mp = ctx->src_fmt; + + return 0; +} + +static int vidioc_g_fmt_cap_mplane(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + struct rockchip_vpu_ctx *ctx = fh_to_ctx(priv); + + vpu_debug(4, "f->type = %d\n", f->type); + + *pix_mp = ctx->dst_fmt; + + return 0; +} + +static int +vidioc_try_fmt_cap_mplane(struct file *file, void *priv, struct v4l2_format *f) +{ + struct rockchip_vpu_ctx *ctx = fh_to_ctx(priv); + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + const struct rockchip_vpu_fmt *fmt; + + vpu_debug(4, "%c%c%c%c\n", + (pix_mp->pixelformat & 0x7f), + (pix_mp->pixelformat >> 8) & 0x7f, + (pix_mp->pixelformat >> 16) & 0x7f, + (pix_mp->pixelformat >> 24) & 0x7f); + + fmt = rockchip_vpu_find_format(ctx, pix_mp->pixelformat); + if (!fmt) { + fmt = rockchip_vpu_get_default_fmt(ctx, true); + f->fmt.pix.pixelformat = fmt->fourcc; + } + + pix_mp->num_planes = 1; + pix_mp->field = V4L2_FIELD_NONE; + pix_mp->width = clamp(pix_mp->width, + fmt->frmsize.min_width, + fmt->frmsize.max_width); + pix_mp->height = clamp(pix_mp->height, + fmt->frmsize.min_height, + fmt->frmsize.max_height); + /* Round up to macroblocks. */ + pix_mp->width = round_up(pix_mp->width, JPEG_MB_DIM); + pix_mp->height = round_up(pix_mp->height, JPEG_MB_DIM); + + /* + * For compressed formats the application can specify + * sizeimage. If the application passes a zero sizeimage, + * let's default to the maximum frame size. + */ + if (!pix_mp->plane_fmt[0].sizeimage) + pix_mp->plane_fmt[0].sizeimage = fmt->header_size + + pix_mp->width * pix_mp->height * fmt->max_depth; + memset(pix_mp->plane_fmt[0].reserved, 0, + sizeof(pix_mp->plane_fmt[0].reserved)); + return 0; +} + +static int +vidioc_try_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) +{ + struct rockchip_vpu_ctx *ctx = fh_to_ctx(priv); + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + const struct rockchip_vpu_fmt *fmt; + unsigned int width, height; + int i; + + vpu_debug(4, "%c%c%c%c\n", + (pix_mp->pixelformat & 0x7f), + (pix_mp->pixelformat >> 8) & 0x7f, + (pix_mp->pixelformat >> 16) & 0x7f, + (pix_mp->pixelformat >> 24) & 0x7f); + + fmt = rockchip_vpu_find_format(ctx, pix_mp->pixelformat); + if (!fmt) { + fmt = rockchip_vpu_get_default_fmt(ctx, false); + f->fmt.pix.pixelformat = fmt->fourcc; + } + + pix_mp->field = V4L2_FIELD_NONE; + width = clamp(pix_mp->width, + ctx->vpu_dst_fmt->frmsize.min_width, + ctx->vpu_dst_fmt->frmsize.max_width); + height = clamp(pix_mp->height, + ctx->vpu_dst_fmt->frmsize.min_height, + ctx->vpu_dst_fmt->frmsize.max_height); + /* Round up to macroblocks. */ + width = round_up(width, JPEG_MB_DIM); + height = round_up(height, JPEG_MB_DIM); + + /* Fill remaining fields */ + fill_pixfmt_mp(pix_mp, fmt->fourcc, width, height); + + for (i = 0; i < pix_mp->num_planes; i++) { + memset(pix_mp->plane_fmt[i].reserved, 0, + sizeof(pix_mp->plane_fmt[i].reserved)); + } + return 0; +} + +void rockchip_vpu_enc_reset_dst_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) +{ + struct v4l2_pix_format_mplane *fmt = &ctx->dst_fmt; + + ctx->vpu_dst_fmt = rockchip_vpu_get_default_fmt(ctx, true); + + memset(fmt, 0, sizeof(*fmt)); + + fmt->num_planes = 1; + fmt->width = clamp(fmt->width, ctx->vpu_dst_fmt->frmsize.min_width, + ctx->vpu_dst_fmt->frmsize.max_width); + fmt->height = clamp(fmt->height, ctx->vpu_dst_fmt->frmsize.min_height, + ctx->vpu_dst_fmt->frmsize.max_height); + fmt->pixelformat = ctx->vpu_dst_fmt->fourcc; + fmt->field = V4L2_FIELD_NONE; + fmt->colorspace = V4L2_COLORSPACE_JPEG, + fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + fmt->quantization = V4L2_QUANTIZATION_DEFAULT; + fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT; + + fmt->plane_fmt[0].sizeimage = ctx->vpu_dst_fmt->header_size + + fmt->width * fmt->height * ctx->vpu_dst_fmt->max_depth; +} + +void rockchip_vpu_enc_reset_src_fmt(struct rockchip_vpu_dev *vpu, + struct rockchip_vpu_ctx *ctx) +{ + struct v4l2_pix_format_mplane *fmt = &ctx->src_fmt; + unsigned int width, height; + + ctx->vpu_src_fmt = rockchip_vpu_get_default_fmt(ctx, false); + + memset(fmt, 0, sizeof(*fmt)); + + width = clamp(fmt->width, ctx->vpu_dst_fmt->frmsize.min_width, + ctx->vpu_dst_fmt->frmsize.max_width); + height = clamp(fmt->height, ctx->vpu_dst_fmt->frmsize.min_height, + ctx->vpu_dst_fmt->frmsize.max_height); + fmt->field = V4L2_FIELD_NONE; + fmt->colorspace = V4L2_COLORSPACE_JPEG, + fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + fmt->quantization = V4L2_QUANTIZATION_DEFAULT; + fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT; + + fill_pixfmt_mp(fmt, ctx->vpu_src_fmt->fourcc, width, height); +} + +static int +vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + struct rockchip_vpu_ctx *ctx = fh_to_ctx(priv); + struct vb2_queue *vq; + int ret; + + /* Change not allowed if queue is streaming. */ + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (vb2_is_streaming(vq)) + return -EBUSY; + + ret = vidioc_try_fmt_out_mplane(file, priv, f); + if (ret) + return ret; + + ctx->vpu_src_fmt = rockchip_vpu_find_format(ctx, pix_mp->pixelformat); + ctx->src_fmt = *pix_mp; + + /* Propagate to the CAPTURE format */ + ctx->dst_fmt.colorspace = pix_mp->colorspace; + ctx->dst_fmt.ycbcr_enc = pix_mp->ycbcr_enc; + ctx->dst_fmt.xfer_func = pix_mp->xfer_func; + ctx->dst_fmt.quantization = pix_mp->quantization; + ctx->dst_fmt.width = pix_mp->width; + ctx->dst_fmt.height = pix_mp->height; + + vpu_debug(0, "OUTPUT codec mode: %d\n", ctx->vpu_src_fmt->codec_mode); + vpu_debug(0, "fmt - w: %d, h: %d, mb - w: %d, h: %d\n", + pix_mp->width, pix_mp->height, + JPEG_MB_WIDTH(pix_mp->width), + JPEG_MB_HEIGHT(pix_mp->height)); + return 0; +} + +static int +vidioc_s_fmt_cap_mplane(struct file *file, void *priv, struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + struct rockchip_vpu_ctx *ctx = fh_to_ctx(priv); + struct rockchip_vpu_dev *vpu = ctx->dev; + struct vb2_queue *vq, *peer_vq; + int ret; + + /* Change not allowed if queue is streaming. */ + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (vb2_is_streaming(vq)) + return -EBUSY; + + /* + * Since format change on the CAPTURE queue will reset + * the OUTPUT queue, we can't allow doing so + * when the OUTPUT queue has buffers allocated. + */ + peer_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, + V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE); + if (vb2_is_busy(peer_vq) && + (pix_mp->pixelformat != ctx->dst_fmt.pixelformat || + pix_mp->height != ctx->dst_fmt.height || + pix_mp->width != ctx->dst_fmt.width)) + return -EBUSY; + + ret = vidioc_try_fmt_cap_mplane(file, priv, f); + if (ret) + return ret; + + ctx->vpu_dst_fmt = rockchip_vpu_find_format(ctx, pix_mp->pixelformat); + ctx->dst_fmt = *pix_mp; + + vpu_debug(0, "CAPTURE codec mode: %d\n", ctx->vpu_dst_fmt->codec_mode); + vpu_debug(0, "fmt - w: %d, h: %d, mb - w: %d, h: %d\n", + pix_mp->width, pix_mp->height, + JPEG_MB_WIDTH(pix_mp->width), + JPEG_MB_HEIGHT(pix_mp->height)); + + /* + * Current raw format might have become invalid with newly + * selected codec, so reset it to default just to be safe and + * keep internal driver state sane. User is mandated to set + * the raw format again after we return, so we don't need + * anything smarter. + */ + rockchip_vpu_enc_reset_src_fmt(vpu, ctx); + return 0; +} + +const struct v4l2_ioctl_ops rockchip_vpu_enc_ioctl_ops = { + .vidioc_querycap = vidioc_querycap, + .vidioc_enum_framesizes = vidioc_enum_framesizes, + + .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt_cap_mplane, + .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt_out_mplane, + .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt_out_mplane, + .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt_cap_mplane, + .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt_out_mplane, + .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt_cap_mplane, + .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane, + .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane, + + .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, + .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, + .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, + .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, + .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, + .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, + .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, + + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, + + .vidioc_streamon = v4l2_m2m_ioctl_streamon, + .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, +}; + +static int +rockchip_vpu_queue_setup(struct vb2_queue *vq, + unsigned int *num_buffers, + unsigned int *num_planes, + unsigned int sizes[], + struct device *alloc_devs[]) +{ + struct rockchip_vpu_ctx *ctx = vb2_get_drv_priv(vq); + struct v4l2_pix_format_mplane *pixfmt; + int i; + + switch (vq->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: + pixfmt = &ctx->dst_fmt; + break; + case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: + pixfmt = &ctx->src_fmt; + break; + default: + vpu_err("invalid queue type: %d\n", vq->type); + return -EINVAL; + } + + if (*num_planes) { + if (*num_planes != pixfmt->num_planes) + return -EINVAL; + for (i = 0; i < pixfmt->num_planes; ++i) + if (sizes[i] < pixfmt->plane_fmt[i].sizeimage) + return -EINVAL; + return 0; + } + + *num_planes = pixfmt->num_planes; + for (i = 0; i < pixfmt->num_planes; ++i) + sizes[i] = pixfmt->plane_fmt[i].sizeimage; + return 0; +} + +static int rockchip_vpu_buf_prepare(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct vb2_queue *vq = vb->vb2_queue; + struct rockchip_vpu_ctx *ctx = vb2_get_drv_priv(vq); + struct v4l2_pix_format_mplane *pixfmt; + unsigned int sz; + int ret = 0; + int i; + + switch (vq->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: + pixfmt = &ctx->dst_fmt; + break; + case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: + pixfmt = &ctx->src_fmt; + + if (vbuf->field == V4L2_FIELD_ANY) + vbuf->field = V4L2_FIELD_NONE; + if (vbuf->field != V4L2_FIELD_NONE) { + vpu_debug(4, "field %d not supported\n", + vbuf->field); + return -EINVAL; + } + break; + default: + vpu_err("invalid queue type: %d\n", vq->type); + return -EINVAL; + } + + for (i = 0; i < pixfmt->num_planes; ++i) { + sz = pixfmt->plane_fmt[i].sizeimage; + vpu_debug(4, "plane %d size: %ld, sizeimage: %u\n", + i, vb2_plane_size(vb, i), sz); + if (vb2_plane_size(vb, i) < sz) { + vpu_err("plane %d is too small\n", i); + ret = -EINVAL; + break; + } + } + + return ret; +} + +static void rockchip_vpu_buf_queue(struct vb2_buffer *vb) +{ + struct rockchip_vpu_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + + v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); +} + +static int rockchip_vpu_start_streaming(struct vb2_queue *q, unsigned int count) +{ + struct rockchip_vpu_ctx *ctx = vb2_get_drv_priv(q); + enum rockchip_vpu_codec_mode codec_mode; + + if (V4L2_TYPE_IS_OUTPUT(q->type)) + ctx->sequence_out = 0; + else + ctx->sequence_cap = 0; + + /* Set codec_ops for the chosen destination format */ + codec_mode = ctx->vpu_dst_fmt->codec_mode; + + vpu_debug(4, "Codec mode = %d\n", codec_mode); + ctx->codec_ops = &ctx->dev->variant->codec_ops[codec_mode]; + + /* A bounce buffer is needed for the JPEG payload */ + if (!V4L2_TYPE_IS_OUTPUT(q->type)) { + ctx->bounce_size = ctx->dst_fmt.plane_fmt[0].sizeimage - + ctx->vpu_dst_fmt->header_size; + ctx->bounce_buf = dma_alloc_attrs(ctx->dev->dev, + ctx->bounce_size, + &ctx->bounce_dma_addr, + GFP_KERNEL, + DMA_ATTR_ALLOC_SINGLE_PAGES); + } + return 0; +} + +static void rockchip_vpu_stop_streaming(struct vb2_queue *q) +{ + struct rockchip_vpu_ctx *ctx = vb2_get_drv_priv(q); + + if (!V4L2_TYPE_IS_OUTPUT(q->type)) + dma_free_attrs(ctx->dev->dev, + ctx->bounce_size, + ctx->bounce_buf, + ctx->bounce_dma_addr, + DMA_ATTR_ALLOC_SINGLE_PAGES); + + /* + * The mem2mem framework calls v4l2_m2m_cancel_job before + * .stop_streaming, so there isn't any job running and + * it is safe to return all the buffers. + */ + for (;;) { + struct vb2_v4l2_buffer *vbuf; + + if (V4L2_TYPE_IS_OUTPUT(q->type)) + vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + else + vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + if (!vbuf) + break; + v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); + } +} + +const struct vb2_ops rockchip_vpu_enc_queue_ops = { + .queue_setup = rockchip_vpu_queue_setup, + .buf_prepare = rockchip_vpu_buf_prepare, + .buf_queue = rockchip_vpu_buf_queue, + .start_streaming = rockchip_vpu_start_streaming, + .stop_streaming = rockchip_vpu_stop_streaming, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, +}; diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_hw.h b/drivers/staging/media/rockchip/vpu/rockchip_vpu_hw.h new file mode 100644 index 000000000000..2b955da1be1a --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_hw.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip VPU codec driver + * + * Copyright 2018 Google LLC. + * Tomasz Figa <tfiga@chromium.org> + */ + +#ifndef ROCKCHIP_VPU_HW_H_ +#define ROCKCHIP_VPU_HW_H_ + +#include <linux/interrupt.h> +#include <linux/v4l2-controls.h> +#include <media/videobuf2-core.h> + +struct rockchip_vpu_dev; +struct rockchip_vpu_ctx; +struct rockchip_vpu_buf; +struct rockchip_vpu_variant; + +/** + * struct rockchip_vpu_codec_ops - codec mode specific operations + * + * @run: Start single {en,de)coding job. Called from atomic context + * to indicate that a pair of buffers is ready and the hardware + * should be programmed and started. + * @done: Read back processing results and additional data from hardware. + * @reset: Reset the hardware in case of a timeout. + */ +struct rockchip_vpu_codec_ops { + void (*run)(struct rockchip_vpu_ctx *ctx); + void (*done)(struct rockchip_vpu_ctx *ctx, enum vb2_buffer_state); + void (*reset)(struct rockchip_vpu_ctx *ctx); +}; + +/** + * enum rockchip_vpu_enc_fmt - source format ID for hardware registers. + */ +enum rockchip_vpu_enc_fmt { + RK3288_VPU_ENC_FMT_YUV420P = 0, + RK3288_VPU_ENC_FMT_YUV420SP = 1, + RK3288_VPU_ENC_FMT_YUYV422 = 2, + RK3288_VPU_ENC_FMT_UYVY422 = 3, +}; + +extern const struct rockchip_vpu_variant rk3399_vpu_variant; +extern const struct rockchip_vpu_variant rk3288_vpu_variant; + +void rockchip_vpu_watchdog(struct work_struct *work); +void rockchip_vpu_run(struct rockchip_vpu_ctx *ctx); +void rockchip_vpu_irq_done(struct rockchip_vpu_dev *vpu, + unsigned int bytesused, + enum vb2_buffer_state result); + +void rk3288_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx); +void rk3399_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx); + +#endif /* ROCKCHIP_VPU_HW_H_ */ diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_jpeg.c b/drivers/staging/media/rockchip/vpu/rockchip_vpu_jpeg.c new file mode 100644 index 000000000000..0ff0badc1f7a --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_jpeg.c @@ -0,0 +1,290 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) Collabora, Ltd. + * + * Based on GSPCA and CODA drivers: + * Copyright (C) Jean-Francois Moine (http://moinejf.free.fr) + * Copyright (C) 2014 Philipp Zabel, Pengutronix + */ +#include <linux/kernel.h> +#include <linux/string.h> +#include "rockchip_vpu_jpeg.h" + +#define LUMA_QUANT_OFF 7 +#define CHROMA_QUANT_OFF 72 +#define HEIGHT_OFF 141 +#define WIDTH_OFF 143 + +#define HUFF_LUMA_DC_OFF 160 +#define HUFF_LUMA_AC_OFF 193 +#define HUFF_CHROMA_DC_OFF 376 +#define HUFF_CHROMA_AC_OFF 409 + +/* Default tables from JPEG ITU-T.81 + * (ISO/IEC 10918-1) Annex K.3, I + */ +static const unsigned char luma_q_table[] = { + 0x10, 0x0b, 0x0a, 0x10, 0x7c, 0x8c, 0x97, 0xa1, + 0x0c, 0x0c, 0x0e, 0x13, 0x7e, 0x9e, 0xa0, 0x9b, + 0x0e, 0x0d, 0x10, 0x18, 0x8c, 0x9d, 0xa9, 0x9c, + 0x0e, 0x11, 0x16, 0x1d, 0x97, 0xbb, 0xb4, 0xa2, + 0x12, 0x16, 0x25, 0x38, 0xa8, 0x6d, 0x67, 0xb1, + 0x18, 0x23, 0x37, 0x40, 0xb5, 0x68, 0x71, 0xc0, + 0x31, 0x40, 0x4e, 0x57, 0x67, 0x79, 0x78, 0x65, + 0x48, 0x5c, 0x5f, 0x62, 0x70, 0x64, 0x67, 0xc7, +}; + +static const unsigned char chroma_q_table[] = { + 0x11, 0x12, 0x18, 0x2f, 0x63, 0x63, 0x63, 0x63, + 0x12, 0x15, 0x1a, 0x42, 0x63, 0x63, 0x63, 0x63, + 0x18, 0x1a, 0x38, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x2f, 0x42, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, + 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63 +}; + +/* Huffman tables are shared with CODA */ +static const unsigned char luma_dc_table[] = { + 0x00, 0x01, 0x05, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, +}; + +static const unsigned char chroma_dc_table[] = { + 0x00, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, +}; + +static const unsigned char luma_ac_table[] = { + 0x00, 0x02, 0x01, 0x03, 0x03, 0x02, 0x04, 0x03, + 0x05, 0x05, 0x04, 0x04, 0x00, 0x00, 0x01, 0x7d, + 0x01, 0x02, 0x03, 0x00, 0x04, 0x11, 0x05, 0x12, + 0x21, 0x31, 0x41, 0x06, 0x13, 0x51, 0x61, 0x07, + 0x22, 0x71, 0x14, 0x32, 0x81, 0x91, 0xa1, 0x08, + 0x23, 0x42, 0xb1, 0xc1, 0x15, 0x52, 0xd1, 0xf0, + 0x24, 0x33, 0x62, 0x72, 0x82, 0x09, 0x0a, 0x16, + 0x17, 0x18, 0x19, 0x1a, 0x25, 0x26, 0x27, 0x28, + 0x29, 0x2a, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, + 0x3a, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, + 0x4a, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, + 0x5a, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, + 0x6a, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, + 0x7a, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, + 0x8a, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, + 0x99, 0x9a, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, + 0xa8, 0xa9, 0xaa, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, + 0xb7, 0xb8, 0xb9, 0xba, 0xc2, 0xc3, 0xc4, 0xc5, + 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xd2, 0xd3, 0xd4, + 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xe1, 0xe2, + 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, + 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, + 0xf9, 0xfa, +}; + +static const unsigned char chroma_ac_table[] = { + 0x00, 0x02, 0x01, 0x02, 0x04, 0x04, 0x03, 0x04, + 0x07, 0x05, 0x04, 0x04, 0x00, 0x01, 0x02, 0x77, + 0x00, 0x01, 0x02, 0x03, 0x11, 0x04, 0x05, 0x21, + 0x31, 0x06, 0x12, 0x41, 0x51, 0x07, 0x61, 0x71, + 0x13, 0x22, 0x32, 0x81, 0x08, 0x14, 0x42, 0x91, + 0xa1, 0xb1, 0xc1, 0x09, 0x23, 0x33, 0x52, 0xf0, + 0x15, 0x62, 0x72, 0xd1, 0x0a, 0x16, 0x24, 0x34, + 0xe1, 0x25, 0xf1, 0x17, 0x18, 0x19, 0x1a, 0x26, + 0x27, 0x28, 0x29, 0x2a, 0x35, 0x36, 0x37, 0x38, + 0x39, 0x3a, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, + 0x49, 0x4a, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, + 0x59, 0x5a, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, + 0x69, 0x6a, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, + 0x79, 0x7a, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, + 0x88, 0x89, 0x8a, 0x92, 0x93, 0x94, 0x95, 0x96, + 0x97, 0x98, 0x99, 0x9a, 0xa2, 0xa3, 0xa4, 0xa5, + 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xb2, 0xb3, 0xb4, + 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xc2, 0xc3, + 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xd2, + 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda, + 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, + 0xea, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, + 0xf9, 0xfa, +}; + +/* For simplicity, we keep a pre-formatted JPEG header, + * and we'll use fixed offsets to change the width, height + * quantization tables, etc. + */ +static const unsigned char rockchip_vpu_jpeg_header[JPEG_HEADER_SIZE] = { + /* SOI */ + 0xff, 0xd8, + + /* DQT */ + 0xff, 0xdb, 0x00, 0x84, + + 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x01, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + /* SOF */ + 0xff, 0xc0, 0x00, 0x11, 0x08, 0x00, 0xf0, 0x01, + 0x40, 0x03, 0x01, 0x22, 0x00, 0x02, 0x11, 0x01, + 0x03, 0x11, 0x01, + + /* DHT */ + 0xff, 0xc4, 0x00, 0x1f, 0x00, + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + /* DHT */ + 0xff, 0xc4, 0x00, 0xb5, 0x10, + + 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + /* DHT */ + 0xff, 0xc4, 0x00, 0x1f, 0x01, + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + /* DHT */ + 0xff, 0xc4, 0x00, 0xb5, 0x11, + + 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + /* SOS */ + 0xff, 0xda, 0x00, 0x0c, 0x03, 0x01, 0x00, 0x02, + 0x11, 0x03, 0x11, 0x00, 0x3f, 0x00, +}; + +static void +jpeg_scale_quant_table(unsigned char *q_tab, + const unsigned char *tab, int scale) +{ + unsigned int temp; + int i; + + for (i = 0; i < 64; i++) { + temp = DIV_ROUND_CLOSEST((unsigned int)tab[i] * scale, 100); + if (temp <= 0) + temp = 1; + if (temp > 255) + temp = 255; + q_tab[i] = (unsigned char)temp; + } +} + +static void jpeg_set_quality(unsigned char *buffer, int quality) +{ + int scale; + + /* + * Non-linear scaling factor: + * [5,50] -> [1000..100], [51,100] -> [98..0] + */ + if (quality < 50) + scale = 5000 / quality; + else + scale = 200 - 2 * quality; + + jpeg_scale_quant_table(buffer + LUMA_QUANT_OFF, + luma_q_table, scale); + jpeg_scale_quant_table(buffer + CHROMA_QUANT_OFF, + chroma_q_table, scale); +} + +unsigned char * +rockchip_vpu_jpeg_get_qtable(struct rockchip_vpu_jpeg_ctx *ctx, int index) +{ + if (index == 0) + return ctx->buffer + LUMA_QUANT_OFF; + return ctx->buffer + CHROMA_QUANT_OFF; +} + +void rockchip_vpu_jpeg_header_assemble(struct rockchip_vpu_jpeg_ctx *ctx) +{ + char *buf = ctx->buffer; + + memcpy(buf, rockchip_vpu_jpeg_header, + sizeof(rockchip_vpu_jpeg_header)); + + buf[HEIGHT_OFF + 0] = ctx->height >> 8; + buf[HEIGHT_OFF + 1] = ctx->height; + buf[WIDTH_OFF + 0] = ctx->width >> 8; + buf[WIDTH_OFF + 1] = ctx->width; + + memcpy(buf + HUFF_LUMA_DC_OFF, luma_dc_table, sizeof(luma_dc_table)); + memcpy(buf + HUFF_LUMA_AC_OFF, luma_ac_table, sizeof(luma_ac_table)); + memcpy(buf + HUFF_CHROMA_DC_OFF, chroma_dc_table, + sizeof(chroma_dc_table)); + memcpy(buf + HUFF_CHROMA_AC_OFF, chroma_ac_table, + sizeof(chroma_ac_table)); + + jpeg_set_quality(buf, ctx->quality); +} diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_jpeg.h b/drivers/staging/media/rockchip/vpu/rockchip_vpu_jpeg.h new file mode 100644 index 000000000000..72645d8e2ade --- /dev/null +++ b/drivers/staging/media/rockchip/vpu/rockchip_vpu_jpeg.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#define JPEG_HEADER_SIZE 601 + +struct rockchip_vpu_jpeg_ctx { + int width; + int height; + int quality; + unsigned char *buffer; +}; + +unsigned char * +rockchip_vpu_jpeg_get_qtable(struct rockchip_vpu_jpeg_ctx *ctx, int index); +void rockchip_vpu_jpeg_header_assemble(struct rockchip_vpu_jpeg_ctx *ctx); diff --git a/drivers/staging/media/soc_camera/Kconfig b/drivers/staging/media/soc_camera/Kconfig new file mode 100644 index 000000000000..bacd30f0348d --- /dev/null +++ b/drivers/staging/media/soc_camera/Kconfig @@ -0,0 +1,50 @@ +config SOC_CAMERA + tristate "SoC camera support" + depends on VIDEO_V4L2 && HAS_DMA && I2C && BROKEN + select VIDEOBUF2_CORE + help + SoC Camera is a common API to several cameras, not connecting + over a bus like PCI or USB. For example some i2c camera connected + directly to the data bus of an SoC. + +comment "soc_camera sensor drivers" + +config SOC_CAMERA_MT9M111 + tristate "legacy soc_camera mt9m111, mt9m112 and mt9m131 support" + depends on SOC_CAMERA && I2C + select VIDEO_MT9M111 + help + This driver supports MT9M111, MT9M112 and MT9M131 cameras from + Micron/Aptina. + This is the legacy configuration which shouldn't be used anymore, + while VIDEO_MT9M111 should be used instead. + +config SOC_CAMERA_MT9V022 + tristate "mt9v022 and mt9v024 support" + depends on SOC_CAMERA && I2C + help + This driver supports MT9V022 cameras from Micron + +config SOC_CAMERA_OV5642 + tristate "ov5642 camera support" + depends on SOC_CAMERA && I2C + help + This is a V4L2 camera driver for the OmniVision OV5642 sensor + +config SOC_CAMERA_OV9740 + tristate "ov9740 camera support" + depends on SOC_CAMERA && I2C + help + This is a ov9740 camera driver + +config SOC_CAMERA_IMX074 + tristate "imx074 support (DEPRECATED)" + depends on SOC_CAMERA && I2C + help + This driver supports IMX074 cameras from Sony + +config SOC_CAMERA_MT9T031 + tristate "mt9t031 support (DEPRECATED)" + depends on SOC_CAMERA && I2C + help + This driver supports MT9T031 cameras from Micron. diff --git a/drivers/staging/media/soc_camera/Makefile b/drivers/staging/media/soc_camera/Makefile new file mode 100644 index 000000000000..3a351bd629f5 --- /dev/null +++ b/drivers/staging/media/soc_camera/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_SOC_CAMERA) += soc_camera.o soc_mediabus.o +obj-$(CONFIG_SOC_CAMERA_MT9V022) += soc_mt9v022.o +obj-$(CONFIG_SOC_CAMERA_OV5642) += soc_ov5642.o +obj-$(CONFIG_SOC_CAMERA_OV9740) += soc_ov9740.o +obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o +obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o diff --git a/drivers/staging/media/imx074/imx074.c b/drivers/staging/media/soc_camera/imx074.c index 1676c166dc83..1676c166dc83 100644 --- a/drivers/staging/media/imx074/imx074.c +++ b/drivers/staging/media/soc_camera/imx074.c diff --git a/drivers/staging/media/mt9t031/mt9t031.c b/drivers/staging/media/soc_camera/mt9t031.c index 4ff179302b4f..4ff179302b4f 100644 --- a/drivers/staging/media/mt9t031/mt9t031.c +++ b/drivers/staging/media/soc_camera/mt9t031.c diff --git a/drivers/staging/media/soc_camera/soc_camera.c b/drivers/staging/media/soc_camera/soc_camera.c new file mode 100644 index 000000000000..1ab86a7499b9 --- /dev/null +++ b/drivers/staging/media/soc_camera/soc_camera.c @@ -0,0 +1,2170 @@ +/* + * camera image capture (abstract) bus driver + * + * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> + * + * This driver provides an interface between platform-specific camera + * buses and camera devices. It should be used if the camera is + * connected not over a "proper" bus like PCI or USB, but over a + * special bus, like, for example, the Quick Capture interface on PXA270 + * SoCs. Later it should also be used for i.MX31 SoCs from Freescale. + * It can handle multiple cameras and / or multiple buses, which can + * be used, e.g., in stereo-vision applications. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/device.h> +#include <linux/err.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of_graph.h> +#include <linux/platform_device.h> +#include <linux/pm_runtime.h> +#include <linux/regulator/consumer.h> +#include <linux/slab.h> +#include <linux/vmalloc.h> + +#include <media/soc_camera.h> +#include <media/drv-intf/soc_mediabus.h> +#include <media/v4l2-async.h> +#include <media/v4l2-clk.h> +#include <media/v4l2-common.h> +#include <media/v4l2-ioctl.h> +#include <media/v4l2-dev.h> +#include <media/v4l2-fwnode.h> +#include <media/videobuf2-v4l2.h> + +/* Default to VGA resolution */ +#define DEFAULT_WIDTH 640 +#define DEFAULT_HEIGHT 480 + +#define MAP_MAX_NUM 32 +static DECLARE_BITMAP(device_map, MAP_MAX_NUM); +static LIST_HEAD(hosts); +static LIST_HEAD(devices); +/* + * Protects lists and bitmaps of hosts and devices. + * Lock nesting: Ok to take ->host_lock under list_lock. + */ +static DEFINE_MUTEX(list_lock); + +struct soc_camera_async_client { + struct v4l2_async_subdev *sensor; + struct v4l2_async_notifier notifier; + struct platform_device *pdev; + struct list_head list; /* needed for clean up */ +}; + +static int soc_camera_video_start(struct soc_camera_device *icd); +static int video_dev_create(struct soc_camera_device *icd); + +int soc_camera_power_on(struct device *dev, struct soc_camera_subdev_desc *ssdd, + struct v4l2_clk *clk) +{ + int ret; + bool clock_toggle; + + if (clk && (!ssdd->unbalanced_power || + !test_and_set_bit(0, &ssdd->clock_state))) { + ret = v4l2_clk_enable(clk); + if (ret < 0) { + dev_err(dev, "Cannot enable clock: %d\n", ret); + return ret; + } + clock_toggle = true; + } else { + clock_toggle = false; + } + + ret = regulator_bulk_enable(ssdd->sd_pdata.num_regulators, + ssdd->sd_pdata.regulators); + if (ret < 0) { + dev_err(dev, "Cannot enable regulators\n"); + goto eregenable; + } + + if (ssdd->power) { + ret = ssdd->power(dev, 1); + if (ret < 0) { + dev_err(dev, + "Platform failed to power-on the camera.\n"); + goto epwron; + } + } + + return 0; + +epwron: + regulator_bulk_disable(ssdd->sd_pdata.num_regulators, + ssdd->sd_pdata.regulators); +eregenable: + if (clock_toggle) + v4l2_clk_disable(clk); + + return ret; +} +EXPORT_SYMBOL(soc_camera_power_on); + +int soc_camera_power_off(struct device *dev, struct soc_camera_subdev_desc *ssdd, + struct v4l2_clk *clk) +{ + int ret = 0; + int err; + + if (ssdd->power) { + err = ssdd->power(dev, 0); + if (err < 0) { + dev_err(dev, + "Platform failed to power-off the camera.\n"); + ret = err; + } + } + + err = regulator_bulk_disable(ssdd->sd_pdata.num_regulators, + ssdd->sd_pdata.regulators); + if (err < 0) { + dev_err(dev, "Cannot disable regulators\n"); + ret = ret ? : err; + } + + if (clk && (!ssdd->unbalanced_power || test_and_clear_bit(0, &ssdd->clock_state))) + v4l2_clk_disable(clk); + + return ret; +} +EXPORT_SYMBOL(soc_camera_power_off); + +int soc_camera_power_init(struct device *dev, struct soc_camera_subdev_desc *ssdd) +{ + /* Should not have any effect in synchronous case */ + return devm_regulator_bulk_get(dev, ssdd->sd_pdata.num_regulators, + ssdd->sd_pdata.regulators); +} +EXPORT_SYMBOL(soc_camera_power_init); + +static int __soc_camera_power_on(struct soc_camera_device *icd) +{ + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + int ret; + + ret = v4l2_subdev_call(sd, core, s_power, 1); + if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) + return ret; + + return 0; +} + +static int __soc_camera_power_off(struct soc_camera_device *icd) +{ + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + int ret; + + ret = v4l2_subdev_call(sd, core, s_power, 0); + if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) + return ret; + + return 0; +} + +static int soc_camera_clock_start(struct soc_camera_host *ici) +{ + int ret; + + if (!ici->ops->clock_start) + return 0; + + mutex_lock(&ici->clk_lock); + ret = ici->ops->clock_start(ici); + mutex_unlock(&ici->clk_lock); + + return ret; +} + +static void soc_camera_clock_stop(struct soc_camera_host *ici) +{ + if (!ici->ops->clock_stop) + return; + + mutex_lock(&ici->clk_lock); + ici->ops->clock_stop(ici); + mutex_unlock(&ici->clk_lock); +} + +const struct soc_camera_format_xlate *soc_camera_xlate_by_fourcc( + struct soc_camera_device *icd, unsigned int fourcc) +{ + unsigned int i; + + for (i = 0; i < icd->num_user_formats; i++) + if (icd->user_formats[i].host_fmt->fourcc == fourcc) + return icd->user_formats + i; + return NULL; +} +EXPORT_SYMBOL(soc_camera_xlate_by_fourcc); + +/** + * soc_camera_apply_board_flags() - apply platform SOCAM_SENSOR_INVERT_* flags + * @ssdd: camera platform parameters + * @cfg: media bus configuration + * @return: resulting flags + */ +unsigned long soc_camera_apply_board_flags(struct soc_camera_subdev_desc *ssdd, + const struct v4l2_mbus_config *cfg) +{ + unsigned long f, flags = cfg->flags; + + /* If only one of the two polarities is supported, switch to the opposite */ + if (ssdd->flags & SOCAM_SENSOR_INVERT_HSYNC) { + f = flags & (V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW); + if (f == V4L2_MBUS_HSYNC_ACTIVE_HIGH || f == V4L2_MBUS_HSYNC_ACTIVE_LOW) + flags ^= V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW; + } + + if (ssdd->flags & SOCAM_SENSOR_INVERT_VSYNC) { + f = flags & (V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW); + if (f == V4L2_MBUS_VSYNC_ACTIVE_HIGH || f == V4L2_MBUS_VSYNC_ACTIVE_LOW) + flags ^= V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW; + } + + if (ssdd->flags & SOCAM_SENSOR_INVERT_PCLK) { + f = flags & (V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING); + if (f == V4L2_MBUS_PCLK_SAMPLE_RISING || f == V4L2_MBUS_PCLK_SAMPLE_FALLING) + flags ^= V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING; + } + + return flags; +} +EXPORT_SYMBOL(soc_camera_apply_board_flags); + +#define pixfmtstr(x) (x) & 0xff, ((x) >> 8) & 0xff, ((x) >> 16) & 0xff, \ + ((x) >> 24) & 0xff + +static int soc_camera_try_fmt(struct soc_camera_device *icd, + struct v4l2_format *f) +{ + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + const struct soc_camera_format_xlate *xlate; + struct v4l2_pix_format *pix = &f->fmt.pix; + int ret; + + dev_dbg(icd->pdev, "TRY_FMT(%c%c%c%c, %ux%u)\n", + pixfmtstr(pix->pixelformat), pix->width, pix->height); + + if (pix->pixelformat != V4L2_PIX_FMT_JPEG && + !(ici->capabilities & SOCAM_HOST_CAP_STRIDE)) { + pix->bytesperline = 0; + pix->sizeimage = 0; + } + + ret = ici->ops->try_fmt(icd, f); + if (ret < 0) + return ret; + + xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); + if (!xlate) + return -EINVAL; + + ret = soc_mbus_bytes_per_line(pix->width, xlate->host_fmt); + if (ret < 0) + return ret; + + pix->bytesperline = max_t(u32, pix->bytesperline, ret); + + ret = soc_mbus_image_size(xlate->host_fmt, pix->bytesperline, + pix->height); + if (ret < 0) + return ret; + + pix->sizeimage = max_t(u32, pix->sizeimage, ret); + + return 0; +} + +static int soc_camera_try_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct soc_camera_device *icd = file->private_data; + + WARN_ON(priv != file->private_data); + + /* Only single-plane capture is supported so far */ + if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) + return -EINVAL; + + /* limit format to hardware capabilities */ + return soc_camera_try_fmt(icd, f); +} + +static int soc_camera_enum_input(struct file *file, void *priv, + struct v4l2_input *inp) +{ + struct soc_camera_device *icd = file->private_data; + + if (inp->index != 0) + return -EINVAL; + + /* default is camera */ + inp->type = V4L2_INPUT_TYPE_CAMERA; + inp->std = icd->vdev->tvnorms; + strscpy(inp->name, "Camera", sizeof(inp->name)); + + return 0; +} + +static int soc_camera_g_input(struct file *file, void *priv, unsigned int *i) +{ + *i = 0; + + return 0; +} + +static int soc_camera_s_input(struct file *file, void *priv, unsigned int i) +{ + if (i > 0) + return -EINVAL; + + return 0; +} + +static int soc_camera_s_std(struct file *file, void *priv, v4l2_std_id a) +{ + struct soc_camera_device *icd = file->private_data; + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + + return v4l2_subdev_call(sd, video, s_std, a); +} + +static int soc_camera_g_std(struct file *file, void *priv, v4l2_std_id *a) +{ + struct soc_camera_device *icd = file->private_data; + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + + return v4l2_subdev_call(sd, video, g_std, a); +} + +static int soc_camera_enum_framesizes(struct file *file, void *fh, + struct v4l2_frmsizeenum *fsize) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + + return ici->ops->enum_framesizes(icd, fsize); +} + +static int soc_camera_reqbufs(struct file *file, void *priv, + struct v4l2_requestbuffers *p) +{ + int ret; + struct soc_camera_device *icd = file->private_data; + + WARN_ON(priv != file->private_data); + + if (icd->streamer && icd->streamer != file) + return -EBUSY; + + ret = vb2_reqbufs(&icd->vb2_vidq, p); + if (!ret) + icd->streamer = p->count ? file : NULL; + return ret; +} + +static int soc_camera_querybuf(struct file *file, void *priv, + struct v4l2_buffer *p) +{ + struct soc_camera_device *icd = file->private_data; + + WARN_ON(priv != file->private_data); + + return vb2_querybuf(&icd->vb2_vidq, p); +} + +static int soc_camera_qbuf(struct file *file, void *priv, + struct v4l2_buffer *p) +{ + struct soc_camera_device *icd = file->private_data; + + WARN_ON(priv != file->private_data); + + if (icd->streamer != file) + return -EBUSY; + + return vb2_qbuf(&icd->vb2_vidq, NULL, p); +} + +static int soc_camera_dqbuf(struct file *file, void *priv, + struct v4l2_buffer *p) +{ + struct soc_camera_device *icd = file->private_data; + + WARN_ON(priv != file->private_data); + + if (icd->streamer != file) + return -EBUSY; + + return vb2_dqbuf(&icd->vb2_vidq, p, file->f_flags & O_NONBLOCK); +} + +static int soc_camera_create_bufs(struct file *file, void *priv, + struct v4l2_create_buffers *create) +{ + struct soc_camera_device *icd = file->private_data; + int ret; + + if (icd->streamer && icd->streamer != file) + return -EBUSY; + + ret = vb2_create_bufs(&icd->vb2_vidq, create); + if (!ret) + icd->streamer = file; + return ret; +} + +static int soc_camera_prepare_buf(struct file *file, void *priv, + struct v4l2_buffer *b) +{ + struct soc_camera_device *icd = file->private_data; + + return vb2_prepare_buf(&icd->vb2_vidq, NULL, b); +} + +static int soc_camera_expbuf(struct file *file, void *priv, + struct v4l2_exportbuffer *p) +{ + struct soc_camera_device *icd = file->private_data; + + if (icd->streamer && icd->streamer != file) + return -EBUSY; + return vb2_expbuf(&icd->vb2_vidq, p); +} + +/* Always entered with .host_lock held */ +static int soc_camera_init_user_formats(struct soc_camera_device *icd) +{ + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + unsigned int i, fmts = 0, raw_fmts = 0; + int ret; + struct v4l2_subdev_mbus_code_enum code = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + + while (!v4l2_subdev_call(sd, pad, enum_mbus_code, NULL, &code)) { + raw_fmts++; + code.index++; + } + + if (!ici->ops->get_formats) + /* + * Fallback mode - the host will have to serve all + * sensor-provided formats one-to-one to the user + */ + fmts = raw_fmts; + else + /* + * First pass - only count formats this host-sensor + * configuration can provide + */ + for (i = 0; i < raw_fmts; i++) { + ret = ici->ops->get_formats(icd, i, NULL); + if (ret < 0) + return ret; + fmts += ret; + } + + if (!fmts) + return -ENXIO; + + icd->user_formats = + vmalloc(array_size(fmts, + sizeof(struct soc_camera_format_xlate))); + if (!icd->user_formats) + return -ENOMEM; + + dev_dbg(icd->pdev, "Found %d supported formats.\n", fmts); + + /* Second pass - actually fill data formats */ + fmts = 0; + for (i = 0; i < raw_fmts; i++) + if (!ici->ops->get_formats) { + code.index = i; + v4l2_subdev_call(sd, pad, enum_mbus_code, NULL, &code); + icd->user_formats[fmts].host_fmt = + soc_mbus_get_fmtdesc(code.code); + if (icd->user_formats[fmts].host_fmt) + icd->user_formats[fmts++].code = code.code; + } else { + ret = ici->ops->get_formats(icd, i, + &icd->user_formats[fmts]); + if (ret < 0) + goto egfmt; + fmts += ret; + } + + icd->num_user_formats = fmts; + icd->current_fmt = &icd->user_formats[0]; + + return 0; + +egfmt: + vfree(icd->user_formats); + return ret; +} + +/* Always entered with .host_lock held */ +static void soc_camera_free_user_formats(struct soc_camera_device *icd) +{ + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + + if (ici->ops->put_formats) + ici->ops->put_formats(icd); + icd->current_fmt = NULL; + icd->num_user_formats = 0; + vfree(icd->user_formats); + icd->user_formats = NULL; +} + +/* Called with .vb_lock held, or from the first open(2), see comment there */ +static int soc_camera_set_fmt(struct soc_camera_device *icd, + struct v4l2_format *f) +{ + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + struct v4l2_pix_format *pix = &f->fmt.pix; + int ret; + + dev_dbg(icd->pdev, "S_FMT(%c%c%c%c, %ux%u)\n", + pixfmtstr(pix->pixelformat), pix->width, pix->height); + + /* We always call try_fmt() before set_fmt() or set_selection() */ + ret = soc_camera_try_fmt(icd, f); + if (ret < 0) + return ret; + + ret = ici->ops->set_fmt(icd, f); + if (ret < 0) { + return ret; + } else if (!icd->current_fmt || + icd->current_fmt->host_fmt->fourcc != pix->pixelformat) { + dev_err(icd->pdev, + "Host driver hasn't set up current format correctly!\n"); + return -EINVAL; + } + + icd->user_width = pix->width; + icd->user_height = pix->height; + icd->bytesperline = pix->bytesperline; + icd->sizeimage = pix->sizeimage; + icd->colorspace = pix->colorspace; + icd->field = pix->field; + + dev_dbg(icd->pdev, "set width: %d height: %d\n", + icd->user_width, icd->user_height); + + /* set physical bus parameters */ + return ici->ops->set_bus_param(icd); +} + +static int soc_camera_add_device(struct soc_camera_device *icd) +{ + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + int ret; + + if (ici->icd) + return -EBUSY; + + if (!icd->clk) { + ret = soc_camera_clock_start(ici); + if (ret < 0) + return ret; + } + + if (ici->ops->add) { + ret = ici->ops->add(icd); + if (ret < 0) + goto eadd; + } + + ici->icd = icd; + + return 0; + +eadd: + if (!icd->clk) + soc_camera_clock_stop(ici); + return ret; +} + +static void soc_camera_remove_device(struct soc_camera_device *icd) +{ + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + + if (WARN_ON(icd != ici->icd)) + return; + + if (ici->ops->remove) + ici->ops->remove(icd); + if (!icd->clk) + soc_camera_clock_stop(ici); + ici->icd = NULL; +} + +static int soc_camera_open(struct file *file) +{ + struct video_device *vdev = video_devdata(file); + struct soc_camera_device *icd; + struct soc_camera_host *ici; + int ret; + + /* + * Don't mess with the host during probe: wait until the loop in + * scan_add_host() completes. Also protect against a race with + * soc_camera_host_unregister(). + */ + if (mutex_lock_interruptible(&list_lock)) + return -ERESTARTSYS; + + if (!vdev || !video_is_registered(vdev)) { + mutex_unlock(&list_lock); + return -ENODEV; + } + + icd = video_get_drvdata(vdev); + ici = to_soc_camera_host(icd->parent); + + ret = try_module_get(ici->ops->owner) ? 0 : -ENODEV; + mutex_unlock(&list_lock); + + if (ret < 0) { + dev_err(icd->pdev, "Couldn't lock capture bus driver.\n"); + return ret; + } + + if (!to_soc_camera_control(icd)) { + /* No device driver attached */ + ret = -ENODEV; + goto econtrol; + } + + if (mutex_lock_interruptible(&ici->host_lock)) { + ret = -ERESTARTSYS; + goto elockhost; + } + icd->use_count++; + + /* Now we really have to activate the camera */ + if (icd->use_count == 1) { + struct soc_camera_desc *sdesc = to_soc_camera_desc(icd); + /* Restore parameters before the last close() per V4L2 API */ + struct v4l2_format f = { + .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, + .fmt.pix = { + .width = icd->user_width, + .height = icd->user_height, + .field = icd->field, + .colorspace = icd->colorspace, + .pixelformat = + icd->current_fmt->host_fmt->fourcc, + }, + }; + + /* The camera could have been already on, try to reset */ + if (sdesc->subdev_desc.reset) + if (icd->control) + sdesc->subdev_desc.reset(icd->control); + + ret = soc_camera_add_device(icd); + if (ret < 0) { + dev_err(icd->pdev, "Couldn't activate the camera: %d\n", ret); + goto eiciadd; + } + + ret = __soc_camera_power_on(icd); + if (ret < 0) + goto epower; + + pm_runtime_enable(&icd->vdev->dev); + ret = pm_runtime_resume(&icd->vdev->dev); + if (ret < 0 && ret != -ENOSYS) + goto eresume; + + /* + * Try to configure with default parameters. Notice: this is the + * very first open, so, we cannot race against other calls, + * apart from someone else calling open() simultaneously, but + * .host_lock is protecting us against it. + */ + ret = soc_camera_set_fmt(icd, &f); + if (ret < 0) + goto esfmt; + + ret = ici->ops->init_videobuf2(&icd->vb2_vidq, icd); + if (ret < 0) + goto einitvb; + v4l2_ctrl_handler_setup(&icd->ctrl_handler); + } + mutex_unlock(&ici->host_lock); + + file->private_data = icd; + dev_dbg(icd->pdev, "camera device open\n"); + + return 0; + + /* + * All errors are entered with the .host_lock held, first four also + * with use_count == 1 + */ +einitvb: +esfmt: + pm_runtime_disable(&icd->vdev->dev); +eresume: + __soc_camera_power_off(icd); +epower: + soc_camera_remove_device(icd); +eiciadd: + icd->use_count--; + mutex_unlock(&ici->host_lock); +elockhost: +econtrol: + module_put(ici->ops->owner); + + return ret; +} + +static int soc_camera_close(struct file *file) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + + mutex_lock(&ici->host_lock); + if (icd->streamer == file) { + if (ici->ops->init_videobuf2) + vb2_queue_release(&icd->vb2_vidq); + icd->streamer = NULL; + } + icd->use_count--; + if (!icd->use_count) { + pm_runtime_suspend(&icd->vdev->dev); + pm_runtime_disable(&icd->vdev->dev); + + __soc_camera_power_off(icd); + + soc_camera_remove_device(icd); + } + + mutex_unlock(&ici->host_lock); + + module_put(ici->ops->owner); + + dev_dbg(icd->pdev, "camera device close\n"); + + return 0; +} + +static ssize_t soc_camera_read(struct file *file, char __user *buf, + size_t count, loff_t *ppos) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + + dev_dbg(icd->pdev, "read called, buf %p\n", buf); + + if (ici->ops->init_videobuf2 && icd->vb2_vidq.io_modes & VB2_READ) + return vb2_read(&icd->vb2_vidq, buf, count, ppos, + file->f_flags & O_NONBLOCK); + + dev_err(icd->pdev, "camera device read not implemented\n"); + + return -EINVAL; +} + +static int soc_camera_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + int err; + + dev_dbg(icd->pdev, "mmap called, vma=%p\n", vma); + + if (icd->streamer != file) + return -EBUSY; + + if (mutex_lock_interruptible(&ici->host_lock)) + return -ERESTARTSYS; + err = vb2_mmap(&icd->vb2_vidq, vma); + mutex_unlock(&ici->host_lock); + + dev_dbg(icd->pdev, "vma start=0x%08lx, size=%ld, ret=%d\n", + (unsigned long)vma->vm_start, + (unsigned long)vma->vm_end - (unsigned long)vma->vm_start, + err); + + return err; +} + +static __poll_t soc_camera_poll(struct file *file, poll_table *pt) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + __poll_t res = EPOLLERR; + + if (icd->streamer != file) + return EPOLLERR; + + mutex_lock(&ici->host_lock); + res = ici->ops->poll(file, pt); + mutex_unlock(&ici->host_lock); + return res; +} + +static const struct v4l2_file_operations soc_camera_fops = { + .owner = THIS_MODULE, + .open = soc_camera_open, + .release = soc_camera_close, + .unlocked_ioctl = video_ioctl2, + .read = soc_camera_read, + .mmap = soc_camera_mmap, + .poll = soc_camera_poll, +}; + +static int soc_camera_s_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct soc_camera_device *icd = file->private_data; + int ret; + + WARN_ON(priv != file->private_data); + + if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + dev_warn(icd->pdev, "Wrong buf-type %d\n", f->type); + return -EINVAL; + } + + if (icd->streamer && icd->streamer != file) + return -EBUSY; + + if (vb2_is_streaming(&icd->vb2_vidq)) { + dev_err(icd->pdev, "S_FMT denied: queue initialised\n"); + return -EBUSY; + } + + ret = soc_camera_set_fmt(icd, f); + + if (!ret && !icd->streamer) + icd->streamer = file; + + return ret; +} + +static int soc_camera_enum_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct soc_camera_device *icd = file->private_data; + const struct soc_mbus_pixelfmt *format; + + WARN_ON(priv != file->private_data); + + if (f->index >= icd->num_user_formats) + return -EINVAL; + + format = icd->user_formats[f->index].host_fmt; + + if (format->name) + strscpy(f->description, format->name, sizeof(f->description)); + f->pixelformat = format->fourcc; + return 0; +} + +static int soc_camera_g_fmt_vid_cap(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct soc_camera_device *icd = file->private_data; + struct v4l2_pix_format *pix = &f->fmt.pix; + + WARN_ON(priv != file->private_data); + + if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) + return -EINVAL; + + pix->width = icd->user_width; + pix->height = icd->user_height; + pix->bytesperline = icd->bytesperline; + pix->sizeimage = icd->sizeimage; + pix->field = icd->field; + pix->pixelformat = icd->current_fmt->host_fmt->fourcc; + pix->colorspace = icd->colorspace; + dev_dbg(icd->pdev, "current_fmt->fourcc: 0x%08x\n", + icd->current_fmt->host_fmt->fourcc); + return 0; +} + +static int soc_camera_querycap(struct file *file, void *priv, + struct v4l2_capability *cap) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + + WARN_ON(priv != file->private_data); + + strscpy(cap->driver, ici->drv_name, sizeof(cap->driver)); + return ici->ops->querycap(ici, cap); +} + +static int soc_camera_streamon(struct file *file, void *priv, + enum v4l2_buf_type i) +{ + struct soc_camera_device *icd = file->private_data; + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + int ret; + + WARN_ON(priv != file->private_data); + + if (i != V4L2_BUF_TYPE_VIDEO_CAPTURE) + return -EINVAL; + + if (icd->streamer != file) + return -EBUSY; + + /* This calls buf_queue from host driver's videobuf2_queue_ops */ + ret = vb2_streamon(&icd->vb2_vidq, i); + if (!ret) + v4l2_subdev_call(sd, video, s_stream, 1); + + return ret; +} + +static int soc_camera_streamoff(struct file *file, void *priv, + enum v4l2_buf_type i) +{ + struct soc_camera_device *icd = file->private_data; + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + int ret; + + WARN_ON(priv != file->private_data); + + if (i != V4L2_BUF_TYPE_VIDEO_CAPTURE) + return -EINVAL; + + if (icd->streamer != file) + return -EBUSY; + + /* + * This calls buf_release from host driver's videobuf2_queue_ops for all + * remaining buffers. When the last buffer is freed, stop capture + */ + ret = vb2_streamoff(&icd->vb2_vidq, i); + + v4l2_subdev_call(sd, video, s_stream, 0); + + return ret; +} + +static int soc_camera_g_selection(struct file *file, void *fh, + struct v4l2_selection *s) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + + /* With a wrong type no need to try to fall back to cropping */ + if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) + return -EINVAL; + + return ici->ops->get_selection(icd, s); +} + +static int soc_camera_s_selection(struct file *file, void *fh, + struct v4l2_selection *s) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + int ret; + + /* In all these cases cropping emulation will not help */ + if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || + (s->target != V4L2_SEL_TGT_COMPOSE && + s->target != V4L2_SEL_TGT_CROP)) + return -EINVAL; + + if (s->target == V4L2_SEL_TGT_COMPOSE) { + /* No output size change during a running capture! */ + if (vb2_is_streaming(&icd->vb2_vidq) && + (icd->user_width != s->r.width || + icd->user_height != s->r.height)) + return -EBUSY; + + /* + * Only one user is allowed to change the output format, touch + * buffers, start / stop streaming, poll for data + */ + if (icd->streamer && icd->streamer != file) + return -EBUSY; + } + + if (s->target == V4L2_SEL_TGT_CROP && + vb2_is_streaming(&icd->vb2_vidq) && + ici->ops->set_liveselection) + ret = ici->ops->set_liveselection(icd, s); + else + ret = ici->ops->set_selection(icd, s); + if (!ret && + s->target == V4L2_SEL_TGT_COMPOSE) { + icd->user_width = s->r.width; + icd->user_height = s->r.height; + if (!icd->streamer) + icd->streamer = file; + } + + return ret; +} + +static int soc_camera_g_parm(struct file *file, void *fh, + struct v4l2_streamparm *a) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + + if (ici->ops->get_parm) + return ici->ops->get_parm(icd, a); + + return -ENOIOCTLCMD; +} + +static int soc_camera_s_parm(struct file *file, void *fh, + struct v4l2_streamparm *a) +{ + struct soc_camera_device *icd = file->private_data; + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + + if (ici->ops->set_parm) + return ici->ops->set_parm(icd, a); + + return -ENOIOCTLCMD; +} + +static int soc_camera_probe(struct soc_camera_host *ici, + struct soc_camera_device *icd); + +/* So far this function cannot fail */ +static void scan_add_host(struct soc_camera_host *ici) +{ + struct soc_camera_device *icd; + + mutex_lock(&list_lock); + + list_for_each_entry(icd, &devices, list) + if (icd->iface == ici->nr) { + struct soc_camera_desc *sdesc = to_soc_camera_desc(icd); + struct soc_camera_subdev_desc *ssdd = &sdesc->subdev_desc; + + /* The camera could have been already on, try to reset */ + if (ssdd->reset) + if (icd->control) + ssdd->reset(icd->control); + + icd->parent = ici->v4l2_dev.dev; + + /* Ignore errors */ + soc_camera_probe(ici, icd); + } + + mutex_unlock(&list_lock); +} + +/* + * It is invalid to call v4l2_clk_enable() after a successful probing + * asynchronously outside of V4L2 operations, i.e. with .host_lock not held. + */ +static int soc_camera_clk_enable(struct v4l2_clk *clk) +{ + struct soc_camera_device *icd = clk->priv; + struct soc_camera_host *ici; + + if (!icd || !icd->parent) + return -ENODEV; + + ici = to_soc_camera_host(icd->parent); + + if (!try_module_get(ici->ops->owner)) + return -ENODEV; + + /* + * If a different client is currently being probed, the host will tell + * you to go + */ + return soc_camera_clock_start(ici); +} + +static void soc_camera_clk_disable(struct v4l2_clk *clk) +{ + struct soc_camera_device *icd = clk->priv; + struct soc_camera_host *ici; + + if (!icd || !icd->parent) + return; + + ici = to_soc_camera_host(icd->parent); + + soc_camera_clock_stop(ici); + + module_put(ici->ops->owner); +} + +/* + * Eventually, it would be more logical to make the respective host the clock + * owner, but then we would have to copy this struct for each ici. Besides, it + * would introduce the circular dependency problem, unless we port all client + * drivers to release the clock, when not in use. + */ +static const struct v4l2_clk_ops soc_camera_clk_ops = { + .owner = THIS_MODULE, + .enable = soc_camera_clk_enable, + .disable = soc_camera_clk_disable, +}; + +static int soc_camera_dyn_pdev(struct soc_camera_desc *sdesc, + struct soc_camera_async_client *sasc) +{ + struct platform_device *pdev; + int ret, i; + + mutex_lock(&list_lock); + i = find_first_zero_bit(device_map, MAP_MAX_NUM); + if (i < MAP_MAX_NUM) + set_bit(i, device_map); + mutex_unlock(&list_lock); + if (i >= MAP_MAX_NUM) + return -ENOMEM; + + pdev = platform_device_alloc("soc-camera-pdrv", i); + if (!pdev) + return -ENOMEM; + + ret = platform_device_add_data(pdev, sdesc, sizeof(*sdesc)); + if (ret < 0) { + platform_device_put(pdev); + return ret; + } + + sasc->pdev = pdev; + + return 0; +} + +static struct soc_camera_device *soc_camera_add_pdev(struct soc_camera_async_client *sasc) +{ + struct platform_device *pdev = sasc->pdev; + int ret; + + ret = platform_device_add(pdev); + if (ret < 0 || !pdev->dev.driver) + return NULL; + + return platform_get_drvdata(pdev); +} + +/* Locking: called with .host_lock held */ +static int soc_camera_probe_finish(struct soc_camera_device *icd) +{ + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + struct v4l2_subdev_format fmt = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + struct v4l2_mbus_framefmt *mf = &fmt.format; + int ret; + + sd->grp_id = soc_camera_grp_id(icd); + v4l2_set_subdev_hostdata(sd, icd); + + v4l2_subdev_call(sd, video, g_tvnorms, &icd->vdev->tvnorms); + + ret = v4l2_ctrl_add_handler(&icd->ctrl_handler, sd->ctrl_handler, + NULL, true); + if (ret < 0) + return ret; + + ret = soc_camera_add_device(icd); + if (ret < 0) { + dev_err(icd->pdev, "Couldn't activate the camera: %d\n", ret); + return ret; + } + + /* At this point client .probe() should have run already */ + ret = soc_camera_init_user_formats(icd); + if (ret < 0) + goto eusrfmt; + + icd->field = V4L2_FIELD_ANY; + + ret = soc_camera_video_start(icd); + if (ret < 0) + goto evidstart; + + /* Try to improve our guess of a reasonable window format */ + if (!v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt)) { + icd->user_width = mf->width; + icd->user_height = mf->height; + icd->colorspace = mf->colorspace; + icd->field = mf->field; + } + soc_camera_remove_device(icd); + + return 0; + +evidstart: + soc_camera_free_user_formats(icd); +eusrfmt: + soc_camera_remove_device(icd); + + return ret; +} + +#ifdef CONFIG_I2C_BOARDINFO +static int soc_camera_i2c_init(struct soc_camera_device *icd, + struct soc_camera_desc *sdesc) +{ + struct soc_camera_subdev_desc *ssdd; + struct i2c_client *client; + struct soc_camera_host *ici; + struct soc_camera_host_desc *shd = &sdesc->host_desc; + struct i2c_adapter *adap; + struct v4l2_subdev *subdev; + char clk_name[V4L2_CLK_NAME_SIZE]; + int ret; + + /* First find out how we link the main client */ + if (icd->sasc) { + /* Async non-OF probing handled by the subdevice list */ + return -EPROBE_DEFER; + } + + ici = to_soc_camera_host(icd->parent); + adap = i2c_get_adapter(shd->i2c_adapter_id); + if (!adap) { + dev_err(icd->pdev, "Cannot get I2C adapter #%d. No driver?\n", + shd->i2c_adapter_id); + return -ENODEV; + } + + ssdd = kmemdup(&sdesc->subdev_desc, sizeof(*ssdd), GFP_KERNEL); + if (!ssdd) { + ret = -ENOMEM; + goto ealloc; + } + /* + * In synchronous case we request regulators ourselves in + * soc_camera_pdrv_probe(), make sure the subdevice driver doesn't try + * to allocate them again. + */ + ssdd->sd_pdata.num_regulators = 0; + ssdd->sd_pdata.regulators = NULL; + shd->board_info->platform_data = ssdd; + + v4l2_clk_name_i2c(clk_name, sizeof(clk_name), + shd->i2c_adapter_id, shd->board_info->addr); + + icd->clk = v4l2_clk_register(&soc_camera_clk_ops, clk_name, icd); + if (IS_ERR(icd->clk)) { + ret = PTR_ERR(icd->clk); + goto eclkreg; + } + + subdev = v4l2_i2c_new_subdev_board(&ici->v4l2_dev, adap, + shd->board_info, NULL); + if (!subdev) { + ret = -ENODEV; + goto ei2cnd; + } + + client = v4l2_get_subdevdata(subdev); + + /* Use to_i2c_client(dev) to recover the i2c client */ + icd->control = &client->dev; + + return 0; +ei2cnd: + v4l2_clk_unregister(icd->clk); + icd->clk = NULL; +eclkreg: + kfree(ssdd); +ealloc: + i2c_put_adapter(adap); + return ret; +} + +static void soc_camera_i2c_free(struct soc_camera_device *icd) +{ + struct i2c_client *client = + to_i2c_client(to_soc_camera_control(icd)); + struct i2c_adapter *adap; + struct soc_camera_subdev_desc *ssdd; + + icd->control = NULL; + if (icd->sasc) + return; + + adap = client->adapter; + ssdd = client->dev.platform_data; + v4l2_device_unregister_subdev(i2c_get_clientdata(client)); + i2c_unregister_device(client); + i2c_put_adapter(adap); + kfree(ssdd); + v4l2_clk_unregister(icd->clk); + icd->clk = NULL; +} + +/* + * V4L2 asynchronous notifier callbacks. They are all called under a v4l2-async + * internal global mutex, therefore cannot race against other asynchronous + * events. Until notifier->complete() (soc_camera_async_complete()) is called, + * the video device node is not registered and no V4L fops can occur. Unloading + * of the host driver also calls a v4l2-async function, so also there we're + * protected. + */ +static int soc_camera_async_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_subdev *asd) +{ + struct soc_camera_async_client *sasc = container_of(notifier, + struct soc_camera_async_client, notifier); + struct soc_camera_device *icd = platform_get_drvdata(sasc->pdev); + + if (asd == sasc->sensor && !WARN_ON(icd->control)) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + + /* + * Only now we get subdevice-specific information like + * regulators, flags, callbacks, etc. + */ + if (client) { + struct soc_camera_desc *sdesc = to_soc_camera_desc(icd); + struct soc_camera_subdev_desc *ssdd = + soc_camera_i2c_to_desc(client); + if (ssdd) { + memcpy(&sdesc->subdev_desc, ssdd, + sizeof(sdesc->subdev_desc)); + if (ssdd->reset) + ssdd->reset(&client->dev); + } + + icd->control = &client->dev; + } + } + + return 0; +} + +static void soc_camera_async_unbind(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_subdev *asd) +{ + struct soc_camera_async_client *sasc = container_of(notifier, + struct soc_camera_async_client, notifier); + struct soc_camera_device *icd = platform_get_drvdata(sasc->pdev); + + icd->control = NULL; + + if (icd->clk) { + v4l2_clk_unregister(icd->clk); + icd->clk = NULL; + } +} + +static int soc_camera_async_complete(struct v4l2_async_notifier *notifier) +{ + struct soc_camera_async_client *sasc = container_of(notifier, + struct soc_camera_async_client, notifier); + struct soc_camera_device *icd = platform_get_drvdata(sasc->pdev); + + if (to_soc_camera_control(icd)) { + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + int ret; + + mutex_lock(&list_lock); + ret = soc_camera_probe(ici, icd); + mutex_unlock(&list_lock); + if (ret < 0) + return ret; + } + + return 0; +} + +static const struct v4l2_async_notifier_operations soc_camera_async_ops = { + .bound = soc_camera_async_bound, + .unbind = soc_camera_async_unbind, + .complete = soc_camera_async_complete, +}; + +static int scan_async_group(struct soc_camera_host *ici, + struct v4l2_async_subdev **asd, unsigned int size) +{ + struct soc_camera_async_subdev *sasd; + struct soc_camera_async_client *sasc; + struct soc_camera_device *icd; + struct soc_camera_desc sdesc = {.host_desc.bus_id = ici->nr,}; + char clk_name[V4L2_CLK_NAME_SIZE]; + unsigned int i; + int ret; + + /* First look for a sensor */ + for (i = 0; i < size; i++) { + sasd = container_of(asd[i], struct soc_camera_async_subdev, asd); + if (sasd->role == SOCAM_SUBDEV_DATA_SOURCE) + break; + } + + if (i >= size || asd[i]->match_type != V4L2_ASYNC_MATCH_I2C) { + /* All useless */ + dev_err(ici->v4l2_dev.dev, "No I2C data source found!\n"); + return -ENODEV; + } + + /* Or shall this be managed by the soc-camera device? */ + sasc = devm_kzalloc(ici->v4l2_dev.dev, sizeof(*sasc), GFP_KERNEL); + if (!sasc) + return -ENOMEM; + + /* HACK: just need a != NULL */ + sdesc.host_desc.board_info = ERR_PTR(-ENODATA); + + ret = soc_camera_dyn_pdev(&sdesc, sasc); + if (ret < 0) + goto eallocpdev; + + sasc->sensor = &sasd->asd; + + icd = soc_camera_add_pdev(sasc); + if (!icd) { + ret = -ENOMEM; + goto eaddpdev; + } + + v4l2_async_notifier_init(&sasc->notifier); + + for (i = 0; i < size; i++) { + ret = v4l2_async_notifier_add_subdev(&sasc->notifier, asd[i]); + if (ret) + goto eaddasd; + } + + sasc->notifier.ops = &soc_camera_async_ops; + + icd->sasc = sasc; + icd->parent = ici->v4l2_dev.dev; + + v4l2_clk_name_i2c(clk_name, sizeof(clk_name), + sasd->asd.match.i2c.adapter_id, + sasd->asd.match.i2c.address); + + icd->clk = v4l2_clk_register(&soc_camera_clk_ops, clk_name, icd); + if (IS_ERR(icd->clk)) { + ret = PTR_ERR(icd->clk); + goto eclkreg; + } + + ret = v4l2_async_notifier_register(&ici->v4l2_dev, &sasc->notifier); + if (!ret) + return 0; + + v4l2_clk_unregister(icd->clk); +eclkreg: + icd->clk = NULL; +eaddasd: + v4l2_async_notifier_cleanup(&sasc->notifier); + platform_device_del(sasc->pdev); +eaddpdev: + platform_device_put(sasc->pdev); +eallocpdev: + devm_kfree(ici->v4l2_dev.dev, sasc); + dev_err(ici->v4l2_dev.dev, "group probe failed: %d\n", ret); + + return ret; +} + +static void scan_async_host(struct soc_camera_host *ici) +{ + struct v4l2_async_subdev **asd; + int j; + + for (j = 0, asd = ici->asd; ici->asd_sizes[j]; j++) { + scan_async_group(ici, asd, ici->asd_sizes[j]); + asd += ici->asd_sizes[j]; + } +} +#else +#define soc_camera_i2c_init(icd, sdesc) (-ENODEV) +#define soc_camera_i2c_free(icd) do {} while (0) +#define scan_async_host(ici) do {} while (0) +#endif + +#ifdef CONFIG_OF + +struct soc_of_info { + struct soc_camera_async_subdev sasd; + struct soc_camera_async_client sasc; + struct v4l2_async_subdev *subdev; +}; + +static int soc_of_bind(struct soc_camera_host *ici, + struct device_node *ep, + struct device_node *remote) +{ + struct soc_camera_device *icd; + struct soc_camera_desc sdesc = {.host_desc.bus_id = ici->nr,}; + struct soc_camera_async_client *sasc; + struct soc_of_info *info; + struct i2c_client *client; + char clk_name[V4L2_CLK_NAME_SIZE]; + int ret; + + /* allocate a new subdev and add match info to it */ + info = devm_kzalloc(ici->v4l2_dev.dev, sizeof(struct soc_of_info), + GFP_KERNEL); + if (!info) + return -ENOMEM; + + info->sasd.asd.match.fwnode = of_fwnode_handle(remote); + info->sasd.asd.match_type = V4L2_ASYNC_MATCH_FWNODE; + info->subdev = &info->sasd.asd; + + /* Or shall this be managed by the soc-camera device? */ + sasc = &info->sasc; + + /* HACK: just need a != NULL */ + sdesc.host_desc.board_info = ERR_PTR(-ENODATA); + + ret = soc_camera_dyn_pdev(&sdesc, sasc); + if (ret < 0) + goto eallocpdev; + + sasc->sensor = &info->sasd.asd; + + icd = soc_camera_add_pdev(sasc); + if (!icd) { + ret = -ENOMEM; + goto eaddpdev; + } + + v4l2_async_notifier_init(&sasc->notifier); + + ret = v4l2_async_notifier_add_subdev(&sasc->notifier, info->subdev); + if (ret) { + of_node_put(remote); + goto eaddasd; + } + + sasc->notifier.ops = &soc_camera_async_ops; + + icd->sasc = sasc; + icd->parent = ici->v4l2_dev.dev; + + client = of_find_i2c_device_by_node(remote); + + if (client) + v4l2_clk_name_i2c(clk_name, sizeof(clk_name), + client->adapter->nr, client->addr); + else + v4l2_clk_name_of(clk_name, sizeof(clk_name), remote); + + icd->clk = v4l2_clk_register(&soc_camera_clk_ops, clk_name, icd); + if (IS_ERR(icd->clk)) { + ret = PTR_ERR(icd->clk); + goto eclkreg; + } + + ret = v4l2_async_notifier_register(&ici->v4l2_dev, &sasc->notifier); + if (!ret) + return 0; + + v4l2_clk_unregister(icd->clk); +eclkreg: + icd->clk = NULL; +eaddasd: + v4l2_async_notifier_cleanup(&sasc->notifier); + platform_device_del(sasc->pdev); +eaddpdev: + platform_device_put(sasc->pdev); +eallocpdev: + devm_kfree(ici->v4l2_dev.dev, info); + dev_err(ici->v4l2_dev.dev, "group probe failed: %d\n", ret); + + return ret; +} + +static void scan_of_host(struct soc_camera_host *ici) +{ + struct device *dev = ici->v4l2_dev.dev; + struct device_node *np = dev->of_node; + struct device_node *epn = NULL, *rem; + unsigned int i; + + for (i = 0; ; i++) { + epn = of_graph_get_next_endpoint(np, epn); + if (!epn) + break; + + rem = of_graph_get_remote_port_parent(epn); + if (!rem) { + dev_notice(dev, "no remote for %pOF\n", epn); + continue; + } + + /* so we now have a remote node to connect */ + if (!i) + soc_of_bind(ici, epn, rem); + + if (i) { + dev_err(dev, "multiple subdevices aren't supported yet!\n"); + break; + } + } + + of_node_put(epn); +} + +#else +static inline void scan_of_host(struct soc_camera_host *ici) { } +#endif + +/* Called during host-driver probe */ +static int soc_camera_probe(struct soc_camera_host *ici, + struct soc_camera_device *icd) +{ + struct soc_camera_desc *sdesc = to_soc_camera_desc(icd); + struct soc_camera_host_desc *shd = &sdesc->host_desc; + struct device *control = NULL; + int ret; + + dev_info(icd->pdev, "Probing %s\n", dev_name(icd->pdev)); + + /* + * Currently the subdev with the largest number of controls (13) is + * ov6550. So let's pick 16 as a hint for the control handler. Note + * that this is a hint only: too large and you waste some memory, too + * small and there is a (very) small performance hit when looking up + * controls in the internal hash. + */ + ret = v4l2_ctrl_handler_init(&icd->ctrl_handler, 16); + if (ret < 0) + return ret; + + /* Must have icd->vdev before registering the device */ + ret = video_dev_create(icd); + if (ret < 0) + goto evdc; + + /* + * ..._video_start() will create a device node, video_register_device() + * itself is protected against concurrent open() calls, but we also have + * to protect our data also during client probing. + */ + + /* Non-i2c cameras, e.g., soc_camera_platform, have no board_info */ + if (shd->board_info) { + ret = soc_camera_i2c_init(icd, sdesc); + if (ret < 0 && ret != -EPROBE_DEFER) + goto eadd; + } else if (!shd->add_device || !shd->del_device) { + ret = -EINVAL; + goto eadd; + } else { + ret = soc_camera_clock_start(ici); + if (ret < 0) + goto eadd; + + if (shd->module_name) + ret = request_module(shd->module_name); + + ret = shd->add_device(icd); + if (ret < 0) + goto eadddev; + + /* + * FIXME: this is racy, have to use driver-binding notification, + * when it is available + */ + control = to_soc_camera_control(icd); + if (!control || !control->driver || !dev_get_drvdata(control) || + !try_module_get(control->driver->owner)) { + shd->del_device(icd); + ret = -ENODEV; + goto enodrv; + } + } + + mutex_lock(&ici->host_lock); + ret = soc_camera_probe_finish(icd); + mutex_unlock(&ici->host_lock); + if (ret < 0) + goto efinish; + + return 0; + +efinish: + if (shd->board_info) { + soc_camera_i2c_free(icd); + } else { + shd->del_device(icd); + module_put(control->driver->owner); +enodrv: +eadddev: + soc_camera_clock_stop(ici); + } +eadd: + if (icd->vdev) { + video_device_release(icd->vdev); + icd->vdev = NULL; + } +evdc: + v4l2_ctrl_handler_free(&icd->ctrl_handler); + return ret; +} + +/* + * This is called on device_unregister, which only means we have to disconnect + * from the host, but not remove ourselves from the device list. With + * asynchronous client probing this can also be called without + * soc_camera_probe_finish() having run. Careful with clean up. + */ +static int soc_camera_remove(struct soc_camera_device *icd) +{ + struct soc_camera_desc *sdesc = to_soc_camera_desc(icd); + struct video_device *vdev = icd->vdev; + + v4l2_ctrl_handler_free(&icd->ctrl_handler); + if (vdev) { + video_unregister_device(vdev); + icd->vdev = NULL; + } + + if (sdesc->host_desc.board_info) { + soc_camera_i2c_free(icd); + } else { + struct device *dev = to_soc_camera_control(icd); + struct device_driver *drv = dev ? dev->driver : NULL; + if (drv) { + sdesc->host_desc.del_device(icd); + module_put(drv->owner); + } + } + + if (icd->num_user_formats) + soc_camera_free_user_formats(icd); + + if (icd->clk) { + /* For the synchronous case */ + v4l2_clk_unregister(icd->clk); + icd->clk = NULL; + } + + if (icd->sasc) + platform_device_unregister(icd->sasc->pdev); + + return 0; +} + +static int default_g_selection(struct soc_camera_device *icd, + struct v4l2_selection *sel) +{ + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + struct v4l2_subdev_selection sdsel = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + .target = sel->target, + }; + int ret; + + ret = v4l2_subdev_call(sd, pad, get_selection, NULL, &sdsel); + if (ret) + return ret; + sel->r = sdsel.r; + return 0; +} + +static int default_s_selection(struct soc_camera_device *icd, + struct v4l2_selection *sel) +{ + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + struct v4l2_subdev_selection sdsel = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + .target = sel->target, + .flags = sel->flags, + .r = sel->r, + }; + int ret; + + ret = v4l2_subdev_call(sd, pad, set_selection, NULL, &sdsel); + if (ret) + return ret; + sel->r = sdsel.r; + return 0; +} + +static int default_g_parm(struct soc_camera_device *icd, + struct v4l2_streamparm *a) +{ + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + + return v4l2_g_parm_cap(icd->vdev, sd, a); +} + +static int default_s_parm(struct soc_camera_device *icd, + struct v4l2_streamparm *a) +{ + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + + return v4l2_s_parm_cap(icd->vdev, sd, a); +} + +static int default_enum_framesizes(struct soc_camera_device *icd, + struct v4l2_frmsizeenum *fsize) +{ + int ret; + struct v4l2_subdev *sd = soc_camera_to_subdev(icd); + const struct soc_camera_format_xlate *xlate; + struct v4l2_subdev_frame_size_enum fse = { + .index = fsize->index, + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + + xlate = soc_camera_xlate_by_fourcc(icd, fsize->pixel_format); + if (!xlate) + return -EINVAL; + fse.code = xlate->code; + + ret = v4l2_subdev_call(sd, pad, enum_frame_size, NULL, &fse); + if (ret < 0) + return ret; + + if (fse.min_width == fse.max_width && + fse.min_height == fse.max_height) { + fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; + fsize->discrete.width = fse.min_width; + fsize->discrete.height = fse.min_height; + return 0; + } + fsize->type = V4L2_FRMSIZE_TYPE_CONTINUOUS; + fsize->stepwise.min_width = fse.min_width; + fsize->stepwise.max_width = fse.max_width; + fsize->stepwise.min_height = fse.min_height; + fsize->stepwise.max_height = fse.max_height; + fsize->stepwise.step_width = 1; + fsize->stepwise.step_height = 1; + return 0; +} + +int soc_camera_host_register(struct soc_camera_host *ici) +{ + struct soc_camera_host *ix; + int ret; + + if (!ici || !ici->ops || + !ici->ops->try_fmt || + !ici->ops->set_fmt || + !ici->ops->set_bus_param || + !ici->ops->querycap || + !ici->ops->init_videobuf2 || + !ici->ops->poll || + !ici->v4l2_dev.dev) + return -EINVAL; + + if (!ici->ops->set_selection) + ici->ops->set_selection = default_s_selection; + if (!ici->ops->get_selection) + ici->ops->get_selection = default_g_selection; + if (!ici->ops->set_parm) + ici->ops->set_parm = default_s_parm; + if (!ici->ops->get_parm) + ici->ops->get_parm = default_g_parm; + if (!ici->ops->enum_framesizes) + ici->ops->enum_framesizes = default_enum_framesizes; + + mutex_lock(&list_lock); + list_for_each_entry(ix, &hosts, list) { + if (ix->nr == ici->nr) { + ret = -EBUSY; + goto edevreg; + } + } + + ret = v4l2_device_register(ici->v4l2_dev.dev, &ici->v4l2_dev); + if (ret < 0) + goto edevreg; + + list_add_tail(&ici->list, &hosts); + mutex_unlock(&list_lock); + + mutex_init(&ici->host_lock); + mutex_init(&ici->clk_lock); + + if (ici->v4l2_dev.dev->of_node) + scan_of_host(ici); + else if (ici->asd_sizes) + /* + * No OF, host with a list of subdevices. Don't try to mix + * modes by initialising some groups statically and some + * dynamically! + */ + scan_async_host(ici); + else + /* Legacy: static platform devices from board data */ + scan_add_host(ici); + + return 0; + +edevreg: + mutex_unlock(&list_lock); + return ret; +} +EXPORT_SYMBOL(soc_camera_host_register); + +/* Unregister all clients! */ +void soc_camera_host_unregister(struct soc_camera_host *ici) +{ + struct soc_camera_device *icd, *tmp; + struct soc_camera_async_client *sasc; + LIST_HEAD(notifiers); + + mutex_lock(&list_lock); + list_del(&ici->list); + list_for_each_entry(icd, &devices, list) + if (icd->iface == ici->nr && icd->sasc) { + /* as long as we hold the device, sasc won't be freed */ + get_device(icd->pdev); + list_add(&icd->sasc->list, ¬ifiers); + } + mutex_unlock(&list_lock); + + list_for_each_entry(sasc, ¬ifiers, list) { + /* Must call unlocked to avoid AB-BA dead-lock */ + v4l2_async_notifier_unregister(&sasc->notifier); + v4l2_async_notifier_cleanup(&sasc->notifier); + put_device(&sasc->pdev->dev); + } + + mutex_lock(&list_lock); + + list_for_each_entry_safe(icd, tmp, &devices, list) + if (icd->iface == ici->nr) + soc_camera_remove(icd); + + mutex_unlock(&list_lock); + + v4l2_device_unregister(&ici->v4l2_dev); +} +EXPORT_SYMBOL(soc_camera_host_unregister); + +/* Image capture device */ +static int soc_camera_device_register(struct soc_camera_device *icd) +{ + struct soc_camera_device *ix; + int num = -1, i; + + mutex_lock(&list_lock); + for (i = 0; i < 256 && num < 0; i++) { + num = i; + /* Check if this index is available on this interface */ + list_for_each_entry(ix, &devices, list) { + if (ix->iface == icd->iface && ix->devnum == i) { + num = -1; + break; + } + } + } + + if (num < 0) { + /* + * ok, we have 256 cameras on this host... + * man, stay reasonable... + */ + mutex_unlock(&list_lock); + return -ENOMEM; + } + + icd->devnum = num; + icd->use_count = 0; + icd->host_priv = NULL; + + /* + * Dynamically allocated devices set the bit earlier, but it doesn't hurt setting + * it again + */ + i = to_platform_device(icd->pdev)->id; + if (i < 0) + /* One static (legacy) soc-camera platform device */ + i = 0; + if (i >= MAP_MAX_NUM) { + mutex_unlock(&list_lock); + return -EBUSY; + } + set_bit(i, device_map); + list_add_tail(&icd->list, &devices); + mutex_unlock(&list_lock); + + return 0; +} + +static const struct v4l2_ioctl_ops soc_camera_ioctl_ops = { + .vidioc_querycap = soc_camera_querycap, + .vidioc_try_fmt_vid_cap = soc_camera_try_fmt_vid_cap, + .vidioc_g_fmt_vid_cap = soc_camera_g_fmt_vid_cap, + .vidioc_s_fmt_vid_cap = soc_camera_s_fmt_vid_cap, + .vidioc_enum_fmt_vid_cap = soc_camera_enum_fmt_vid_cap, + .vidioc_enum_input = soc_camera_enum_input, + .vidioc_g_input = soc_camera_g_input, + .vidioc_s_input = soc_camera_s_input, + .vidioc_s_std = soc_camera_s_std, + .vidioc_g_std = soc_camera_g_std, + .vidioc_enum_framesizes = soc_camera_enum_framesizes, + .vidioc_reqbufs = soc_camera_reqbufs, + .vidioc_querybuf = soc_camera_querybuf, + .vidioc_qbuf = soc_camera_qbuf, + .vidioc_dqbuf = soc_camera_dqbuf, + .vidioc_create_bufs = soc_camera_create_bufs, + .vidioc_prepare_buf = soc_camera_prepare_buf, + .vidioc_expbuf = soc_camera_expbuf, + .vidioc_streamon = soc_camera_streamon, + .vidioc_streamoff = soc_camera_streamoff, + .vidioc_g_selection = soc_camera_g_selection, + .vidioc_s_selection = soc_camera_s_selection, + .vidioc_g_parm = soc_camera_g_parm, + .vidioc_s_parm = soc_camera_s_parm, +}; + +static int video_dev_create(struct soc_camera_device *icd) +{ + struct soc_camera_host *ici = to_soc_camera_host(icd->parent); + struct video_device *vdev = video_device_alloc(); + + if (!vdev) + return -ENOMEM; + + strscpy(vdev->name, ici->drv_name, sizeof(vdev->name)); + + vdev->v4l2_dev = &ici->v4l2_dev; + vdev->fops = &soc_camera_fops; + vdev->ioctl_ops = &soc_camera_ioctl_ops; + vdev->release = video_device_release; + vdev->ctrl_handler = &icd->ctrl_handler; + vdev->lock = &ici->host_lock; + + icd->vdev = vdev; + + return 0; +} + +/* + * Called from soc_camera_probe() above with .host_lock held + */ +static int soc_camera_video_start(struct soc_camera_device *icd) +{ + const struct device_type *type = icd->vdev->dev.type; + int ret; + + if (!icd->parent) + return -ENODEV; + + video_set_drvdata(icd->vdev, icd); + if (icd->vdev->tvnorms == 0) { + /* disable the STD API if there are no tvnorms defined */ + v4l2_disable_ioctl(icd->vdev, VIDIOC_G_STD); + v4l2_disable_ioctl(icd->vdev, VIDIOC_S_STD); + v4l2_disable_ioctl(icd->vdev, VIDIOC_ENUMSTD); + } + ret = video_register_device(icd->vdev, VFL_TYPE_GRABBER, -1); + if (ret < 0) { + dev_err(icd->pdev, "video_register_device failed: %d\n", ret); + return ret; + } + + /* Restore device type, possibly set by the subdevice driver */ + icd->vdev->dev.type = type; + + return 0; +} + +static int soc_camera_pdrv_probe(struct platform_device *pdev) +{ + struct soc_camera_desc *sdesc = pdev->dev.platform_data; + struct soc_camera_subdev_desc *ssdd = &sdesc->subdev_desc; + struct soc_camera_device *icd; + int ret; + + if (!sdesc) + return -EINVAL; + + icd = devm_kzalloc(&pdev->dev, sizeof(*icd), GFP_KERNEL); + if (!icd) + return -ENOMEM; + + /* + * In the asynchronous case ssdd->num_regulators == 0 yet, so, the below + * regulator allocation is a dummy. They are actually requested by the + * subdevice driver, using soc_camera_power_init(). Also note, that in + * that case regulators are attached to the I2C device and not to the + * camera platform device. + */ + ret = devm_regulator_bulk_get(&pdev->dev, ssdd->sd_pdata.num_regulators, + ssdd->sd_pdata.regulators); + if (ret < 0) + return ret; + + icd->iface = sdesc->host_desc.bus_id; + icd->sdesc = sdesc; + icd->pdev = &pdev->dev; + platform_set_drvdata(pdev, icd); + + icd->user_width = DEFAULT_WIDTH; + icd->user_height = DEFAULT_HEIGHT; + + return soc_camera_device_register(icd); +} + +/* + * Only called on rmmod for each platform device, since they are not + * hot-pluggable. Now we know, that all our users - hosts and devices have + * been unloaded already + */ +static int soc_camera_pdrv_remove(struct platform_device *pdev) +{ + struct soc_camera_device *icd = platform_get_drvdata(pdev); + int i; + + if (!icd) + return -EINVAL; + + i = pdev->id; + if (i < 0) + i = 0; + + /* + * In synchronous mode with static platform devices this is called in a + * loop from drivers/base/dd.c::driver_detach(), no parallel execution, + * no need to lock. In asynchronous case the caller - + * soc_camera_host_unregister() - already holds the lock + */ + if (test_bit(i, device_map)) { + clear_bit(i, device_map); + list_del(&icd->list); + } + + return 0; +} + +static struct platform_driver __refdata soc_camera_pdrv = { + .probe = soc_camera_pdrv_probe, + .remove = soc_camera_pdrv_remove, + .driver = { + .name = "soc-camera-pdrv", + }, +}; + +module_platform_driver(soc_camera_pdrv); + +MODULE_DESCRIPTION("Image capture bus driver"); +MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:soc-camera-pdrv"); diff --git a/drivers/staging/media/soc_camera/soc_mediabus.c b/drivers/staging/media/soc_camera/soc_mediabus.c new file mode 100644 index 000000000000..be74008ec0ca --- /dev/null +++ b/drivers/staging/media/soc_camera/soc_mediabus.c @@ -0,0 +1,533 @@ +/* + * soc-camera media bus helper routines + * + * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/module.h> + +#include <media/v4l2-device.h> +#include <media/v4l2-mediabus.h> +#include <media/drv-intf/soc_mediabus.h> + +static const struct soc_mbus_lookup mbus_fmt[] = { +{ + .code = MEDIA_BUS_FMT_YUYV8_2X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_YUYV, + .name = "YUYV", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_YVYU8_2X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_YVYU, + .name = "YVYU", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_UYVY8_2X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_UYVY, + .name = "UYVY", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_VYUY8_2X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_VYUY, + .name = "VYUY", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, + .fmt = { + .fourcc = V4L2_PIX_FMT_RGB555, + .name = "RGB555", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, + .fmt = { + .fourcc = V4L2_PIX_FMT_RGB555X, + .name = "RGB555X", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_BE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_RGB565_2X8_LE, + .fmt = { + .fourcc = V4L2_PIX_FMT_RGB565, + .name = "RGB565", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_RGB565_2X8_BE, + .fmt = { + .fourcc = V4L2_PIX_FMT_RGB565X, + .name = "RGB565X", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_BE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_RGB666_1X18, + .fmt = { + .fourcc = V4L2_PIX_FMT_RGB32, + .name = "RGB666/32bpp", + .bits_per_sample = 18, + .packing = SOC_MBUS_PACKING_EXTEND32, + .order = SOC_MBUS_ORDER_LE, + }, +}, { + .code = MEDIA_BUS_FMT_RGB888_1X24, + .fmt = { + .fourcc = V4L2_PIX_FMT_RGB32, + .name = "RGB888/32bpp", + .bits_per_sample = 24, + .packing = SOC_MBUS_PACKING_EXTEND32, + .order = SOC_MBUS_ORDER_LE, + }, +}, { + .code = MEDIA_BUS_FMT_RGB888_2X12_BE, + .fmt = { + .fourcc = V4L2_PIX_FMT_RGB32, + .name = "RGB888/32bpp", + .bits_per_sample = 12, + .packing = SOC_MBUS_PACKING_EXTEND32, + .order = SOC_MBUS_ORDER_BE, + }, +}, { + .code = MEDIA_BUS_FMT_RGB888_2X12_LE, + .fmt = { + .fourcc = V4L2_PIX_FMT_RGB32, + .name = "RGB888/32bpp", + .bits_per_sample = 12, + .packing = SOC_MBUS_PACKING_EXTEND32, + .order = SOC_MBUS_ORDER_LE, + }, +}, { + .code = MEDIA_BUS_FMT_SBGGR8_1X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_SBGGR8, + .name = "Bayer 8 BGGR", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_NONE, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SBGGR10_1X10, + .fmt = { + .fourcc = V4L2_PIX_FMT_SBGGR10, + .name = "Bayer 10 BGGR", + .bits_per_sample = 10, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_Y8_1X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_GREY, + .name = "Grey", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_NONE, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_Y10_1X10, + .fmt = { + .fourcc = V4L2_PIX_FMT_Y10, + .name = "Grey 10bit", + .bits_per_sample = 10, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, + .fmt = { + .fourcc = V4L2_PIX_FMT_SBGGR10, + .name = "Bayer 10 BGGR", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE, + .fmt = { + .fourcc = V4L2_PIX_FMT_SBGGR10, + .name = "Bayer 10 BGGR", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADLO, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE, + .fmt = { + .fourcc = V4L2_PIX_FMT_SBGGR10, + .name = "Bayer 10 BGGR", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_BE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE, + .fmt = { + .fourcc = V4L2_PIX_FMT_SBGGR10, + .name = "Bayer 10 BGGR", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADLO, + .order = SOC_MBUS_ORDER_BE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_JPEG_1X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_JPEG, + .name = "JPEG", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_VARIABLE, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE, + .fmt = { + .fourcc = V4L2_PIX_FMT_RGB444, + .name = "RGB444", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_2X8_PADHI, + .order = SOC_MBUS_ORDER_BE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_YUYV8_1_5X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_YUV420, + .name = "YUYV 4:2:0", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_1_5X8, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_YVYU8_1_5X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_YVU420, + .name = "YVYU 4:2:0", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_1_5X8, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_UYVY8_1X16, + .fmt = { + .fourcc = V4L2_PIX_FMT_UYVY, + .name = "UYVY 16bit", + .bits_per_sample = 16, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_VYUY8_1X16, + .fmt = { + .fourcc = V4L2_PIX_FMT_VYUY, + .name = "VYUY 16bit", + .bits_per_sample = 16, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_YUYV8_1X16, + .fmt = { + .fourcc = V4L2_PIX_FMT_YUYV, + .name = "YUYV 16bit", + .bits_per_sample = 16, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_YVYU8_1X16, + .fmt = { + .fourcc = V4L2_PIX_FMT_YVYU, + .name = "YVYU 16bit", + .bits_per_sample = 16, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SGRBG8_1X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_SGRBG8, + .name = "Bayer 8 GRBG", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_NONE, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8, + .fmt = { + .fourcc = V4L2_PIX_FMT_SGRBG10DPCM8, + .name = "Bayer 10 BGGR DPCM 8", + .bits_per_sample = 8, + .packing = SOC_MBUS_PACKING_NONE, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SGBRG10_1X10, + .fmt = { + .fourcc = V4L2_PIX_FMT_SGBRG10, + .name = "Bayer 10 GBRG", + .bits_per_sample = 10, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SGRBG10_1X10, + .fmt = { + .fourcc = V4L2_PIX_FMT_SGRBG10, + .name = "Bayer 10 GRBG", + .bits_per_sample = 10, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SRGGB10_1X10, + .fmt = { + .fourcc = V4L2_PIX_FMT_SRGGB10, + .name = "Bayer 10 RGGB", + .bits_per_sample = 10, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SBGGR12_1X12, + .fmt = { + .fourcc = V4L2_PIX_FMT_SBGGR12, + .name = "Bayer 12 BGGR", + .bits_per_sample = 12, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SGBRG12_1X12, + .fmt = { + .fourcc = V4L2_PIX_FMT_SGBRG12, + .name = "Bayer 12 GBRG", + .bits_per_sample = 12, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SGRBG12_1X12, + .fmt = { + .fourcc = V4L2_PIX_FMT_SGRBG12, + .name = "Bayer 12 GRBG", + .bits_per_sample = 12, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, { + .code = MEDIA_BUS_FMT_SRGGB12_1X12, + .fmt = { + .fourcc = V4L2_PIX_FMT_SRGGB12, + .name = "Bayer 12 RGGB", + .bits_per_sample = 12, + .packing = SOC_MBUS_PACKING_EXTEND16, + .order = SOC_MBUS_ORDER_LE, + .layout = SOC_MBUS_LAYOUT_PACKED, + }, +}, +}; + +int soc_mbus_samples_per_pixel(const struct soc_mbus_pixelfmt *mf, + unsigned int *numerator, unsigned int *denominator) +{ + switch (mf->packing) { + case SOC_MBUS_PACKING_NONE: + case SOC_MBUS_PACKING_EXTEND16: + *numerator = 1; + *denominator = 1; + return 0; + case SOC_MBUS_PACKING_EXTEND32: + *numerator = 1; + *denominator = 1; + return 0; + case SOC_MBUS_PACKING_2X8_PADHI: + case SOC_MBUS_PACKING_2X8_PADLO: + *numerator = 2; + *denominator = 1; + return 0; + case SOC_MBUS_PACKING_1_5X8: + *numerator = 3; + *denominator = 2; + return 0; + case SOC_MBUS_PACKING_VARIABLE: + *numerator = 0; + *denominator = 1; + return 0; + } + return -EINVAL; +} +EXPORT_SYMBOL(soc_mbus_samples_per_pixel); + +s32 soc_mbus_bytes_per_line(u32 width, const struct soc_mbus_pixelfmt *mf) +{ + if (mf->layout != SOC_MBUS_LAYOUT_PACKED) + return width * mf->bits_per_sample / 8; + + switch (mf->packing) { + case SOC_MBUS_PACKING_NONE: + return width * mf->bits_per_sample / 8; + case SOC_MBUS_PACKING_2X8_PADHI: + case SOC_MBUS_PACKING_2X8_PADLO: + case SOC_MBUS_PACKING_EXTEND16: + return width * 2; + case SOC_MBUS_PACKING_1_5X8: + return width * 3 / 2; + case SOC_MBUS_PACKING_VARIABLE: + return 0; + case SOC_MBUS_PACKING_EXTEND32: + return width * 4; + } + return -EINVAL; +} +EXPORT_SYMBOL(soc_mbus_bytes_per_line); + +s32 soc_mbus_image_size(const struct soc_mbus_pixelfmt *mf, + u32 bytes_per_line, u32 height) +{ + if (mf->layout == SOC_MBUS_LAYOUT_PACKED) + return bytes_per_line * height; + + switch (mf->packing) { + case SOC_MBUS_PACKING_2X8_PADHI: + case SOC_MBUS_PACKING_2X8_PADLO: + return bytes_per_line * height * 2; + case SOC_MBUS_PACKING_1_5X8: + return bytes_per_line * height * 3 / 2; + default: + return -EINVAL; + } +} +EXPORT_SYMBOL(soc_mbus_image_size); + +const struct soc_mbus_pixelfmt *soc_mbus_find_fmtdesc( + u32 code, + const struct soc_mbus_lookup *lookup, + int n) +{ + int i; + + for (i = 0; i < n; i++) + if (lookup[i].code == code) + return &lookup[i].fmt; + + return NULL; +} +EXPORT_SYMBOL(soc_mbus_find_fmtdesc); + +const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc( + u32 code) +{ + return soc_mbus_find_fmtdesc(code, mbus_fmt, ARRAY_SIZE(mbus_fmt)); +} +EXPORT_SYMBOL(soc_mbus_get_fmtdesc); + +unsigned int soc_mbus_config_compatible(const struct v4l2_mbus_config *cfg, + unsigned int flags) +{ + unsigned long common_flags; + bool hsync = true, vsync = true, pclk, data, mode; + bool mipi_lanes, mipi_clock; + + common_flags = cfg->flags & flags; + + switch (cfg->type) { + case V4L2_MBUS_PARALLEL: + hsync = common_flags & (V4L2_MBUS_HSYNC_ACTIVE_HIGH | + V4L2_MBUS_HSYNC_ACTIVE_LOW); + vsync = common_flags & (V4L2_MBUS_VSYNC_ACTIVE_HIGH | + V4L2_MBUS_VSYNC_ACTIVE_LOW); + /* fall through */ + case V4L2_MBUS_BT656: + pclk = common_flags & (V4L2_MBUS_PCLK_SAMPLE_RISING | + V4L2_MBUS_PCLK_SAMPLE_FALLING); + data = common_flags & (V4L2_MBUS_DATA_ACTIVE_HIGH | + V4L2_MBUS_DATA_ACTIVE_LOW); + mode = common_flags & (V4L2_MBUS_MASTER | V4L2_MBUS_SLAVE); + return (!hsync || !vsync || !pclk || !data || !mode) ? + 0 : common_flags; + case V4L2_MBUS_CSI2_DPHY: + mipi_lanes = common_flags & V4L2_MBUS_CSI2_LANES; + mipi_clock = common_flags & (V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK | + V4L2_MBUS_CSI2_CONTINUOUS_CLOCK); + return (!mipi_lanes || !mipi_clock) ? 0 : common_flags; + default: + WARN_ON(1); + return -EINVAL; + } + return 0; +} +EXPORT_SYMBOL(soc_mbus_config_compatible); + +static int __init soc_mbus_init(void) +{ + return 0; +} + +static void __exit soc_mbus_exit(void) +{ +} + +module_init(soc_mbus_init); +module_exit(soc_mbus_exit); + +MODULE_DESCRIPTION("soc-camera media bus interface"); +MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/media/soc_camera/soc_mt9v022.c b/drivers/staging/media/soc_camera/soc_mt9v022.c new file mode 100644 index 000000000000..6d922b17ea94 --- /dev/null +++ b/drivers/staging/media/soc_camera/soc_mt9v022.c @@ -0,0 +1,1012 @@ +/* + * Driver for MT9V022 CMOS Image Sensor from Micron + * + * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/videodev2.h> +#include <linux/slab.h> +#include <linux/i2c.h> +#include <linux/delay.h> +#include <linux/log2.h> +#include <linux/module.h> + +#include <media/i2c/mt9v022.h> +#include <media/soc_camera.h> +#include <media/drv-intf/soc_mediabus.h> +#include <media/v4l2-subdev.h> +#include <media/v4l2-clk.h> +#include <media/v4l2-ctrls.h> + +/* + * mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c + * The platform has to define struct i2c_board_info objects and link to them + * from struct soc_camera_host_desc + */ + +static char *sensor_type; +module_param(sensor_type, charp, S_IRUGO); +MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\""); + +/* mt9v022 selected register addresses */ +#define MT9V022_CHIP_VERSION 0x00 +#define MT9V022_COLUMN_START 0x01 +#define MT9V022_ROW_START 0x02 +#define MT9V022_WINDOW_HEIGHT 0x03 +#define MT9V022_WINDOW_WIDTH 0x04 +#define MT9V022_HORIZONTAL_BLANKING 0x05 +#define MT9V022_VERTICAL_BLANKING 0x06 +#define MT9V022_CHIP_CONTROL 0x07 +#define MT9V022_SHUTTER_WIDTH1 0x08 +#define MT9V022_SHUTTER_WIDTH2 0x09 +#define MT9V022_SHUTTER_WIDTH_CTRL 0x0a +#define MT9V022_TOTAL_SHUTTER_WIDTH 0x0b +#define MT9V022_RESET 0x0c +#define MT9V022_READ_MODE 0x0d +#define MT9V022_MONITOR_MODE 0x0e +#define MT9V022_PIXEL_OPERATION_MODE 0x0f +#define MT9V022_LED_OUT_CONTROL 0x1b +#define MT9V022_ADC_MODE_CONTROL 0x1c +#define MT9V022_REG32 0x20 +#define MT9V022_ANALOG_GAIN 0x35 +#define MT9V022_BLACK_LEVEL_CALIB_CTRL 0x47 +#define MT9V022_PIXCLK_FV_LV 0x74 +#define MT9V022_DIGITAL_TEST_PATTERN 0x7f +#define MT9V022_AEC_AGC_ENABLE 0xAF +#define MT9V022_MAX_TOTAL_SHUTTER_WIDTH 0xBD + +/* mt9v024 partial list register addresses changes with respect to mt9v022 */ +#define MT9V024_PIXCLK_FV_LV 0x72 +#define MT9V024_MAX_TOTAL_SHUTTER_WIDTH 0xAD + +/* Progressive scan, master, defaults */ +#define MT9V022_CHIP_CONTROL_DEFAULT 0x188 + +#define MT9V022_MAX_WIDTH 752 +#define MT9V022_MAX_HEIGHT 480 +#define MT9V022_MIN_WIDTH 48 +#define MT9V022_MIN_HEIGHT 32 +#define MT9V022_COLUMN_SKIP 1 +#define MT9V022_ROW_SKIP 4 + +#define MT9V022_HORIZONTAL_BLANKING_MIN 43 +#define MT9V022_HORIZONTAL_BLANKING_MAX 1023 +#define MT9V022_HORIZONTAL_BLANKING_DEF 94 +#define MT9V022_VERTICAL_BLANKING_MIN 2 +#define MT9V022_VERTICAL_BLANKING_MAX 3000 +#define MT9V022_VERTICAL_BLANKING_DEF 45 + +#define is_mt9v022_rev3(id) (id == 0x1313) +#define is_mt9v024(id) (id == 0x1324) + +/* MT9V022 has only one fixed colorspace per pixelcode */ +struct mt9v022_datafmt { + u32 code; + enum v4l2_colorspace colorspace; +}; + +/* Find a data format by a pixel code in an array */ +static const struct mt9v022_datafmt *mt9v022_find_datafmt( + u32 code, const struct mt9v022_datafmt *fmt, + int n) +{ + int i; + for (i = 0; i < n; i++) + if (fmt[i].code == code) + return fmt + i; + + return NULL; +} + +static const struct mt9v022_datafmt mt9v022_colour_fmts[] = { + /* + * Order important: first natively supported, + * second supported with a GPIO extender + */ + {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB}, + {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, +}; + +static const struct mt9v022_datafmt mt9v022_monochrome_fmts[] = { + /* Order important - see above */ + {MEDIA_BUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG}, + {MEDIA_BUS_FMT_Y8_1X8, V4L2_COLORSPACE_JPEG}, +}; + +/* only registers with different addresses on different mt9v02x sensors */ +struct mt9v02x_register { + u8 max_total_shutter_width; + u8 pixclk_fv_lv; +}; + +static const struct mt9v02x_register mt9v022_register = { + .max_total_shutter_width = MT9V022_MAX_TOTAL_SHUTTER_WIDTH, + .pixclk_fv_lv = MT9V022_PIXCLK_FV_LV, +}; + +static const struct mt9v02x_register mt9v024_register = { + .max_total_shutter_width = MT9V024_MAX_TOTAL_SHUTTER_WIDTH, + .pixclk_fv_lv = MT9V024_PIXCLK_FV_LV, +}; + +enum mt9v022_model { + MT9V022IX7ATM, + MT9V022IX7ATC, +}; + +struct mt9v022 { + struct v4l2_subdev subdev; + struct v4l2_ctrl_handler hdl; + struct { + /* exposure/auto-exposure cluster */ + struct v4l2_ctrl *autoexposure; + struct v4l2_ctrl *exposure; + }; + struct { + /* gain/auto-gain cluster */ + struct v4l2_ctrl *autogain; + struct v4l2_ctrl *gain; + }; + struct v4l2_ctrl *hblank; + struct v4l2_ctrl *vblank; + struct v4l2_rect rect; /* Sensor window */ + struct v4l2_clk *clk; + const struct mt9v022_datafmt *fmt; + const struct mt9v022_datafmt *fmts; + const struct mt9v02x_register *reg; + int num_fmts; + enum mt9v022_model model; + u16 chip_control; + u16 chip_version; + unsigned short y_skip_top; /* Lines to skip at the top */ +}; + +static struct mt9v022 *to_mt9v022(const struct i2c_client *client) +{ + return container_of(i2c_get_clientdata(client), struct mt9v022, subdev); +} + +static int reg_read(struct i2c_client *client, const u8 reg) +{ + return i2c_smbus_read_word_swapped(client, reg); +} + +static int reg_write(struct i2c_client *client, const u8 reg, + const u16 data) +{ + return i2c_smbus_write_word_swapped(client, reg, data); +} + +static int reg_set(struct i2c_client *client, const u8 reg, + const u16 data) +{ + int ret; + + ret = reg_read(client, reg); + if (ret < 0) + return ret; + return reg_write(client, reg, ret | data); +} + +static int reg_clear(struct i2c_client *client, const u8 reg, + const u16 data) +{ + int ret; + + ret = reg_read(client, reg); + if (ret < 0) + return ret; + return reg_write(client, reg, ret & ~data); +} + +static int mt9v022_init(struct i2c_client *client) +{ + struct mt9v022 *mt9v022 = to_mt9v022(client); + int ret; + + /* + * Almost the default mode: master, parallel, simultaneous, and an + * undocumented bit 0x200, which is present in table 7, but not in 8, + * plus snapshot mode to disable scan for now + */ + mt9v022->chip_control |= 0x10; + ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); + if (!ret) + ret = reg_write(client, MT9V022_READ_MODE, 0x300); + + /* All defaults */ + if (!ret) + /* AEC, AGC on */ + ret = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x3); + if (!ret) + ret = reg_write(client, MT9V022_ANALOG_GAIN, 16); + if (!ret) + ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, 480); + if (!ret) + ret = reg_write(client, mt9v022->reg->max_total_shutter_width, 480); + if (!ret) + /* default - auto */ + ret = reg_clear(client, MT9V022_BLACK_LEVEL_CALIB_CTRL, 1); + if (!ret) + ret = reg_write(client, MT9V022_DIGITAL_TEST_PATTERN, 0); + if (!ret) + return v4l2_ctrl_handler_setup(&mt9v022->hdl); + + return ret; +} + +static int mt9v022_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9v022 *mt9v022 = to_mt9v022(client); + + if (enable) { + /* Switch to master "normal" mode */ + mt9v022->chip_control &= ~0x10; + if (is_mt9v022_rev3(mt9v022->chip_version) || + is_mt9v024(mt9v022->chip_version)) { + /* + * Unset snapshot mode specific settings: clear bit 9 + * and bit 2 in reg. 0x20 when in normal mode. + */ + if (reg_clear(client, MT9V022_REG32, 0x204)) + return -EIO; + } + } else { + /* Switch to snapshot mode */ + mt9v022->chip_control |= 0x10; + if (is_mt9v022_rev3(mt9v022->chip_version) || + is_mt9v024(mt9v022->chip_version)) { + /* + * Required settings for snapshot mode: set bit 9 + * (RST enable) and bit 2 (CR enable) in reg. 0x20 + * See TechNote TN0960 or TN-09-225. + */ + if (reg_set(client, MT9V022_REG32, 0x204)) + return -EIO; + } + } + + if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0) + return -EIO; + return 0; +} + +static int mt9v022_set_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9v022 *mt9v022 = to_mt9v022(client); + struct v4l2_rect rect = sel->r; + int min_row, min_blank; + int ret; + + if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || + sel->target != V4L2_SEL_TGT_CROP) + return -EINVAL; + + /* Bayer format - even size lengths */ + if (mt9v022->fmts == mt9v022_colour_fmts) { + rect.width = ALIGN(rect.width, 2); + rect.height = ALIGN(rect.height, 2); + /* Let the user play with the starting pixel */ + } + + soc_camera_limit_side(&rect.left, &rect.width, + MT9V022_COLUMN_SKIP, MT9V022_MIN_WIDTH, MT9V022_MAX_WIDTH); + + soc_camera_limit_side(&rect.top, &rect.height, + MT9V022_ROW_SKIP, MT9V022_MIN_HEIGHT, MT9V022_MAX_HEIGHT); + + /* Like in example app. Contradicts the datasheet though */ + ret = reg_read(client, MT9V022_AEC_AGC_ENABLE); + if (ret >= 0) { + if (ret & 1) /* Autoexposure */ + ret = reg_write(client, mt9v022->reg->max_total_shutter_width, + rect.height + mt9v022->y_skip_top + 43); + /* + * If autoexposure is off, there is no need to set + * MT9V022_TOTAL_SHUTTER_WIDTH here. Autoexposure can be off + * only if the user has set exposure manually, using the + * V4L2_CID_EXPOSURE_AUTO with the value V4L2_EXPOSURE_MANUAL. + * In this case the register MT9V022_TOTAL_SHUTTER_WIDTH + * already contains the correct value. + */ + } + /* Setup frame format: defaults apart from width and height */ + if (!ret) + ret = reg_write(client, MT9V022_COLUMN_START, rect.left); + if (!ret) + ret = reg_write(client, MT9V022_ROW_START, rect.top); + /* + * mt9v022: min total row time is 660 columns, min blanking is 43 + * mt9v024: min total row time is 690 columns, min blanking is 61 + */ + if (is_mt9v024(mt9v022->chip_version)) { + min_row = 690; + min_blank = 61; + } else { + min_row = 660; + min_blank = 43; + } + if (!ret) + ret = v4l2_ctrl_s_ctrl(mt9v022->hblank, + rect.width > min_row - min_blank ? + min_blank : min_row - rect.width); + if (!ret) + ret = v4l2_ctrl_s_ctrl(mt9v022->vblank, 45); + if (!ret) + ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width); + if (!ret) + ret = reg_write(client, MT9V022_WINDOW_HEIGHT, + rect.height + mt9v022->y_skip_top); + + if (ret < 0) + return ret; + + dev_dbg(&client->dev, "Frame %dx%d pixel\n", rect.width, rect.height); + + mt9v022->rect = rect; + + return 0; +} + +static int mt9v022_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9v022 *mt9v022 = to_mt9v022(client); + + if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + switch (sel->target) { + case V4L2_SEL_TGT_CROP_BOUNDS: + sel->r.left = MT9V022_COLUMN_SKIP; + sel->r.top = MT9V022_ROW_SKIP; + sel->r.width = MT9V022_MAX_WIDTH; + sel->r.height = MT9V022_MAX_HEIGHT; + return 0; + case V4L2_SEL_TGT_CROP: + sel->r = mt9v022->rect; + return 0; + default: + return -EINVAL; + } +} + +static int mt9v022_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *mf = &format->format; + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9v022 *mt9v022 = to_mt9v022(client); + + if (format->pad) + return -EINVAL; + + mf->width = mt9v022->rect.width; + mf->height = mt9v022->rect.height; + mf->code = mt9v022->fmt->code; + mf->colorspace = mt9v022->fmt->colorspace; + mf->field = V4L2_FIELD_NONE; + + return 0; +} + +static int mt9v022_s_fmt(struct v4l2_subdev *sd, + const struct mt9v022_datafmt *fmt, + struct v4l2_mbus_framefmt *mf) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9v022 *mt9v022 = to_mt9v022(client); + struct v4l2_subdev_selection sel = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + .target = V4L2_SEL_TGT_CROP, + .r.left = mt9v022->rect.left, + .r.top = mt9v022->rect.top, + .r.width = mf->width, + .r.height = mf->height, + }; + int ret; + + /* + * The caller provides a supported format, as verified per call to + * .set_fmt(FORMAT_TRY), datawidth is from our supported format list + */ + switch (mf->code) { + case MEDIA_BUS_FMT_Y8_1X8: + case MEDIA_BUS_FMT_Y10_1X10: + if (mt9v022->model != MT9V022IX7ATM) + return -EINVAL; + break; + case MEDIA_BUS_FMT_SBGGR8_1X8: + case MEDIA_BUS_FMT_SBGGR10_1X10: + if (mt9v022->model != MT9V022IX7ATC) + return -EINVAL; + break; + default: + return -EINVAL; + } + + /* No support for scaling on this camera, just crop. */ + ret = mt9v022_set_selection(sd, NULL, &sel); + if (!ret) { + mf->width = mt9v022->rect.width; + mf->height = mt9v022->rect.height; + mt9v022->fmt = fmt; + mf->colorspace = fmt->colorspace; + } + + return ret; +} + +static int mt9v022_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *mf = &format->format; + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9v022 *mt9v022 = to_mt9v022(client); + const struct mt9v022_datafmt *fmt; + int align = mf->code == MEDIA_BUS_FMT_SBGGR8_1X8 || + mf->code == MEDIA_BUS_FMT_SBGGR10_1X10; + + if (format->pad) + return -EINVAL; + + v4l_bound_align_image(&mf->width, MT9V022_MIN_WIDTH, + MT9V022_MAX_WIDTH, align, + &mf->height, MT9V022_MIN_HEIGHT + mt9v022->y_skip_top, + MT9V022_MAX_HEIGHT + mt9v022->y_skip_top, align, 0); + + fmt = mt9v022_find_datafmt(mf->code, mt9v022->fmts, + mt9v022->num_fmts); + if (!fmt) { + fmt = mt9v022->fmt; + mf->code = fmt->code; + } + + mf->colorspace = fmt->colorspace; + + if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) + return mt9v022_s_fmt(sd, fmt, mf); + cfg->try_fmt = *mf; + return 0; +} + +#ifdef CONFIG_VIDEO_ADV_DEBUG +static int mt9v022_g_register(struct v4l2_subdev *sd, + struct v4l2_dbg_register *reg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + if (reg->reg > 0xff) + return -EINVAL; + + reg->size = 2; + reg->val = reg_read(client, reg->reg); + + if (reg->val > 0xffff) + return -EIO; + + return 0; +} + +static int mt9v022_s_register(struct v4l2_subdev *sd, + const struct v4l2_dbg_register *reg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + if (reg->reg > 0xff) + return -EINVAL; + + if (reg_write(client, reg->reg, reg->val) < 0) + return -EIO; + + return 0; +} +#endif + +static int mt9v022_s_power(struct v4l2_subdev *sd, int on) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + struct mt9v022 *mt9v022 = to_mt9v022(client); + + return soc_camera_set_power(&client->dev, ssdd, mt9v022->clk, on); +} + +static int mt9v022_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct mt9v022 *mt9v022 = container_of(ctrl->handler, + struct mt9v022, hdl); + struct v4l2_subdev *sd = &mt9v022->subdev; + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct v4l2_ctrl *gain = mt9v022->gain; + struct v4l2_ctrl *exp = mt9v022->exposure; + unsigned long range; + int data; + + switch (ctrl->id) { + case V4L2_CID_AUTOGAIN: + data = reg_read(client, MT9V022_ANALOG_GAIN); + if (data < 0) + return -EIO; + + range = gain->maximum - gain->minimum; + gain->val = ((data - 16) * range + 24) / 48 + gain->minimum; + return 0; + case V4L2_CID_EXPOSURE_AUTO: + data = reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH); + if (data < 0) + return -EIO; + + range = exp->maximum - exp->minimum; + exp->val = ((data - 1) * range + 239) / 479 + exp->minimum; + return 0; + case V4L2_CID_HBLANK: + data = reg_read(client, MT9V022_HORIZONTAL_BLANKING); + if (data < 0) + return -EIO; + ctrl->val = data; + return 0; + case V4L2_CID_VBLANK: + data = reg_read(client, MT9V022_VERTICAL_BLANKING); + if (data < 0) + return -EIO; + ctrl->val = data; + return 0; + } + return -EINVAL; +} + +static int mt9v022_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct mt9v022 *mt9v022 = container_of(ctrl->handler, + struct mt9v022, hdl); + struct v4l2_subdev *sd = &mt9v022->subdev; + struct i2c_client *client = v4l2_get_subdevdata(sd); + int data; + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + if (ctrl->val) + data = reg_set(client, MT9V022_READ_MODE, 0x10); + else + data = reg_clear(client, MT9V022_READ_MODE, 0x10); + if (data < 0) + return -EIO; + return 0; + case V4L2_CID_HFLIP: + if (ctrl->val) + data = reg_set(client, MT9V022_READ_MODE, 0x20); + else + data = reg_clear(client, MT9V022_READ_MODE, 0x20); + if (data < 0) + return -EIO; + return 0; + case V4L2_CID_AUTOGAIN: + if (ctrl->val) { + if (reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0) + return -EIO; + } else { + struct v4l2_ctrl *gain = mt9v022->gain; + /* mt9v022 has minimum == default */ + unsigned long range = gain->maximum - gain->minimum; + /* Valid values 16 to 64, 32 to 64 must be even. */ + unsigned long gain_val = ((gain->val - (s32)gain->minimum) * + 48 + range / 2) / range + 16; + + if (gain_val >= 32) + gain_val &= ~1; + + /* + * The user wants to set gain manually, hope, she + * knows, what she's doing... Switch AGC off. + */ + if (reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0) + return -EIO; + + dev_dbg(&client->dev, "Setting gain from %d to %lu\n", + reg_read(client, MT9V022_ANALOG_GAIN), gain_val); + if (reg_write(client, MT9V022_ANALOG_GAIN, gain_val) < 0) + return -EIO; + } + return 0; + case V4L2_CID_EXPOSURE_AUTO: + if (ctrl->val == V4L2_EXPOSURE_AUTO) { + data = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x1); + } else { + struct v4l2_ctrl *exp = mt9v022->exposure; + unsigned long range = exp->maximum - exp->minimum; + unsigned long shutter = ((exp->val - (s32)exp->minimum) * + 479 + range / 2) / range + 1; + + /* + * The user wants to set shutter width manually, hope, + * she knows, what she's doing... Switch AEC off. + */ + data = reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x1); + if (data < 0) + return -EIO; + dev_dbg(&client->dev, "Shutter width from %d to %lu\n", + reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH), + shutter); + if (reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, + shutter) < 0) + return -EIO; + } + return 0; + case V4L2_CID_HBLANK: + if (reg_write(client, MT9V022_HORIZONTAL_BLANKING, + ctrl->val) < 0) + return -EIO; + return 0; + case V4L2_CID_VBLANK: + if (reg_write(client, MT9V022_VERTICAL_BLANKING, + ctrl->val) < 0) + return -EIO; + return 0; + } + return -EINVAL; +} + +/* + * Interface active, can use i2c. If it fails, it can indeed mean, that + * this wasn't our capture interface, so, we wait for the right one + */ +static int mt9v022_video_probe(struct i2c_client *client) +{ + struct mt9v022 *mt9v022 = to_mt9v022(client); + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + s32 data; + int ret; + unsigned long flags; + + ret = mt9v022_s_power(&mt9v022->subdev, 1); + if (ret < 0) + return ret; + + /* Read out the chip version register */ + data = reg_read(client, MT9V022_CHIP_VERSION); + + /* must be 0x1311, 0x1313 or 0x1324 */ + if (data != 0x1311 && data != 0x1313 && data != 0x1324) { + ret = -ENODEV; + dev_info(&client->dev, "No MT9V022 found, ID register 0x%x\n", + data); + goto ei2c; + } + + mt9v022->chip_version = data; + + mt9v022->reg = is_mt9v024(data) ? &mt9v024_register : + &mt9v022_register; + + /* Soft reset */ + ret = reg_write(client, MT9V022_RESET, 1); + if (ret < 0) + goto ei2c; + /* 15 clock cycles */ + udelay(200); + if (reg_read(client, MT9V022_RESET)) { + dev_err(&client->dev, "Resetting MT9V022 failed!\n"); + if (ret > 0) + ret = -EIO; + goto ei2c; + } + + /* Set monochrome or colour sensor type */ + if (sensor_type && (!strcmp("colour", sensor_type) || + !strcmp("color", sensor_type))) { + ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11); + mt9v022->model = MT9V022IX7ATC; + mt9v022->fmts = mt9v022_colour_fmts; + } else { + ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11); + mt9v022->model = MT9V022IX7ATM; + mt9v022->fmts = mt9v022_monochrome_fmts; + } + + if (ret < 0) + goto ei2c; + + mt9v022->num_fmts = 0; + + /* + * This is a 10bit sensor, so by default we only allow 10bit. + * The platform may support different bus widths due to + * different routing of the data lines. + */ + if (ssdd->query_bus_param) + flags = ssdd->query_bus_param(ssdd); + else + flags = SOCAM_DATAWIDTH_10; + + if (flags & SOCAM_DATAWIDTH_10) + mt9v022->num_fmts++; + else + mt9v022->fmts++; + + if (flags & SOCAM_DATAWIDTH_8) + mt9v022->num_fmts++; + + mt9v022->fmt = &mt9v022->fmts[0]; + + dev_info(&client->dev, "Detected a MT9V022 chip ID %x, %s sensor\n", + data, mt9v022->model == MT9V022IX7ATM ? + "monochrome" : "colour"); + + ret = mt9v022_init(client); + if (ret < 0) + dev_err(&client->dev, "Failed to initialise the camera\n"); + +ei2c: + mt9v022_s_power(&mt9v022->subdev, 0); + return ret; +} + +static int mt9v022_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9v022 *mt9v022 = to_mt9v022(client); + + *lines = mt9v022->y_skip_top; + + return 0; +} + +static const struct v4l2_ctrl_ops mt9v022_ctrl_ops = { + .g_volatile_ctrl = mt9v022_g_volatile_ctrl, + .s_ctrl = mt9v022_s_ctrl, +}; + +static const struct v4l2_subdev_core_ops mt9v022_subdev_core_ops = { +#ifdef CONFIG_VIDEO_ADV_DEBUG + .g_register = mt9v022_g_register, + .s_register = mt9v022_s_register, +#endif + .s_power = mt9v022_s_power, +}; + +static int mt9v022_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9v022 *mt9v022 = to_mt9v022(client); + + if (code->pad || code->index >= mt9v022->num_fmts) + return -EINVAL; + + code->code = mt9v022->fmts[code->index].code; + return 0; +} + +static int mt9v022_g_mbus_config(struct v4l2_subdev *sd, + struct v4l2_mbus_config *cfg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + + cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_SLAVE | + V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING | + V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW | + V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | + V4L2_MBUS_DATA_ACTIVE_HIGH; + cfg->type = V4L2_MBUS_PARALLEL; + cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); + + return 0; +} + +static int mt9v022_s_mbus_config(struct v4l2_subdev *sd, + const struct v4l2_mbus_config *cfg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + struct mt9v022 *mt9v022 = to_mt9v022(client); + unsigned long flags = soc_camera_apply_board_flags(ssdd, cfg); + unsigned int bps = soc_mbus_get_fmtdesc(mt9v022->fmt->code)->bits_per_sample; + int ret; + u16 pixclk = 0; + + if (ssdd->set_bus_param) { + ret = ssdd->set_bus_param(ssdd, 1 << (bps - 1)); + if (ret) + return ret; + } else if (bps != 10) { + /* + * Without board specific bus width settings we only support the + * sensors native bus width + */ + return -EINVAL; + } + + if (flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) + pixclk |= 0x10; + + if (!(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)) + pixclk |= 0x1; + + if (!(flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)) + pixclk |= 0x2; + + ret = reg_write(client, mt9v022->reg->pixclk_fv_lv, pixclk); + if (ret < 0) + return ret; + + if (!(flags & V4L2_MBUS_MASTER)) + mt9v022->chip_control &= ~0x8; + + ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); + if (ret < 0) + return ret; + + dev_dbg(&client->dev, "Calculated pixclk 0x%x, chip control 0x%x\n", + pixclk, mt9v022->chip_control); + + return 0; +} + +static const struct v4l2_subdev_video_ops mt9v022_subdev_video_ops = { + .s_stream = mt9v022_s_stream, + .g_mbus_config = mt9v022_g_mbus_config, + .s_mbus_config = mt9v022_s_mbus_config, +}; + +static const struct v4l2_subdev_sensor_ops mt9v022_subdev_sensor_ops = { + .g_skip_top_lines = mt9v022_g_skip_top_lines, +}; + +static const struct v4l2_subdev_pad_ops mt9v022_subdev_pad_ops = { + .enum_mbus_code = mt9v022_enum_mbus_code, + .get_selection = mt9v022_get_selection, + .set_selection = mt9v022_set_selection, + .get_fmt = mt9v022_get_fmt, + .set_fmt = mt9v022_set_fmt, +}; + +static const struct v4l2_subdev_ops mt9v022_subdev_ops = { + .core = &mt9v022_subdev_core_ops, + .video = &mt9v022_subdev_video_ops, + .sensor = &mt9v022_subdev_sensor_ops, + .pad = &mt9v022_subdev_pad_ops, +}; + +static int mt9v022_probe(struct i2c_client *client, + const struct i2c_device_id *did) +{ + struct mt9v022 *mt9v022; + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); + struct mt9v022_platform_data *pdata; + int ret; + + if (!ssdd) { + dev_err(&client->dev, "MT9V022 driver needs platform data\n"); + return -EINVAL; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { + dev_warn(&adapter->dev, + "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); + return -EIO; + } + + mt9v022 = devm_kzalloc(&client->dev, sizeof(struct mt9v022), GFP_KERNEL); + if (!mt9v022) + return -ENOMEM; + + pdata = ssdd->drv_priv; + v4l2_i2c_subdev_init(&mt9v022->subdev, client, &mt9v022_subdev_ops); + v4l2_ctrl_handler_init(&mt9v022->hdl, 6); + v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, + V4L2_CID_VFLIP, 0, 1, 1, 0); + v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, + V4L2_CID_HFLIP, 0, 1, 1, 0); + mt9v022->autogain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, + V4L2_CID_AUTOGAIN, 0, 1, 1, 1); + mt9v022->gain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, + V4L2_CID_GAIN, 0, 127, 1, 64); + + /* + * Simulated autoexposure. If enabled, we calculate shutter width + * ourselves in the driver based on vertical blanking and frame width + */ + mt9v022->autoexposure = v4l2_ctrl_new_std_menu(&mt9v022->hdl, + &mt9v022_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0, + V4L2_EXPOSURE_AUTO); + mt9v022->exposure = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, + V4L2_CID_EXPOSURE, 1, 255, 1, 255); + + mt9v022->hblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, + V4L2_CID_HBLANK, MT9V022_HORIZONTAL_BLANKING_MIN, + MT9V022_HORIZONTAL_BLANKING_MAX, 1, + MT9V022_HORIZONTAL_BLANKING_DEF); + + mt9v022->vblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, + V4L2_CID_VBLANK, MT9V022_VERTICAL_BLANKING_MIN, + MT9V022_VERTICAL_BLANKING_MAX, 1, + MT9V022_VERTICAL_BLANKING_DEF); + + mt9v022->subdev.ctrl_handler = &mt9v022->hdl; + if (mt9v022->hdl.error) { + int err = mt9v022->hdl.error; + + dev_err(&client->dev, "control initialisation err %d\n", err); + return err; + } + v4l2_ctrl_auto_cluster(2, &mt9v022->autoexposure, + V4L2_EXPOSURE_MANUAL, true); + v4l2_ctrl_auto_cluster(2, &mt9v022->autogain, 0, true); + + mt9v022->chip_control = MT9V022_CHIP_CONTROL_DEFAULT; + + /* + * On some platforms the first read out line is corrupted. + * Workaround it by skipping if indicated by platform data. + */ + mt9v022->y_skip_top = pdata ? pdata->y_skip_top : 0; + mt9v022->rect.left = MT9V022_COLUMN_SKIP; + mt9v022->rect.top = MT9V022_ROW_SKIP; + mt9v022->rect.width = MT9V022_MAX_WIDTH; + mt9v022->rect.height = MT9V022_MAX_HEIGHT; + + mt9v022->clk = v4l2_clk_get(&client->dev, "mclk"); + if (IS_ERR(mt9v022->clk)) { + ret = PTR_ERR(mt9v022->clk); + goto eclkget; + } + + ret = mt9v022_video_probe(client); + if (ret) { + v4l2_clk_put(mt9v022->clk); +eclkget: + v4l2_ctrl_handler_free(&mt9v022->hdl); + } + + return ret; +} + +static int mt9v022_remove(struct i2c_client *client) +{ + struct mt9v022 *mt9v022 = to_mt9v022(client); + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + + v4l2_clk_put(mt9v022->clk); + v4l2_device_unregister_subdev(&mt9v022->subdev); + if (ssdd->free_bus) + ssdd->free_bus(ssdd); + v4l2_ctrl_handler_free(&mt9v022->hdl); + + return 0; +} +static const struct i2c_device_id mt9v022_id[] = { + { "mt9v022", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mt9v022_id); + +static struct i2c_driver mt9v022_i2c_driver = { + .driver = { + .name = "mt9v022", + }, + .probe = mt9v022_probe, + .remove = mt9v022_remove, + .id_table = mt9v022_id, +}; + +module_i2c_driver(mt9v022_i2c_driver); + +MODULE_DESCRIPTION("Micron MT9V022 Camera driver"); +MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/soc_camera/soc_ov5642.c b/drivers/staging/media/soc_camera/soc_ov5642.c new file mode 100644 index 000000000000..0931898c79dd --- /dev/null +++ b/drivers/staging/media/soc_camera/soc_ov5642.c @@ -0,0 +1,1087 @@ +/* + * Driver for OV5642 CMOS Image Sensor from Omnivision + * + * Copyright (C) 2011, Bastian Hecht <hechtb@gmail.com> + * + * Based on Sony IMX074 Camera Driver + * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de> + * + * Based on Omnivision OV7670 Camera Driver + * Copyright (C) 2006-7 Jonathan Corbet <corbet@lwn.net> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/bitops.h> +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/videodev2.h> +#include <linux/module.h> +#include <linux/v4l2-mediabus.h> + +#include <media/soc_camera.h> +#include <media/v4l2-clk.h> +#include <media/v4l2-subdev.h> + +/* OV5642 registers */ +#define REG_CHIP_ID_HIGH 0x300a +#define REG_CHIP_ID_LOW 0x300b + +#define REG_WINDOW_START_X_HIGH 0x3800 +#define REG_WINDOW_START_X_LOW 0x3801 +#define REG_WINDOW_START_Y_HIGH 0x3802 +#define REG_WINDOW_START_Y_LOW 0x3803 +#define REG_WINDOW_WIDTH_HIGH 0x3804 +#define REG_WINDOW_WIDTH_LOW 0x3805 +#define REG_WINDOW_HEIGHT_HIGH 0x3806 +#define REG_WINDOW_HEIGHT_LOW 0x3807 +#define REG_OUT_WIDTH_HIGH 0x3808 +#define REG_OUT_WIDTH_LOW 0x3809 +#define REG_OUT_HEIGHT_HIGH 0x380a +#define REG_OUT_HEIGHT_LOW 0x380b +#define REG_OUT_TOTAL_WIDTH_HIGH 0x380c +#define REG_OUT_TOTAL_WIDTH_LOW 0x380d +#define REG_OUT_TOTAL_HEIGHT_HIGH 0x380e +#define REG_OUT_TOTAL_HEIGHT_LOW 0x380f +#define REG_OUTPUT_FORMAT 0x4300 +#define REG_ISP_CTRL_01 0x5001 +#define REG_AVG_WINDOW_END_X_HIGH 0x5682 +#define REG_AVG_WINDOW_END_X_LOW 0x5683 +#define REG_AVG_WINDOW_END_Y_HIGH 0x5686 +#define REG_AVG_WINDOW_END_Y_LOW 0x5687 + +/* active pixel array size */ +#define OV5642_SENSOR_SIZE_X 2592 +#define OV5642_SENSOR_SIZE_Y 1944 + +/* + * About OV5642 resolution, cropping and binning: + * This sensor supports it all, at least in the feature description. + * Unfortunately, no combination of appropriate registers settings could make + * the chip work the intended way. As it works with predefined register lists, + * some undocumented registers are presumably changed there to achieve their + * goals. + * This driver currently only works for resolutions up to 720 lines with a + * 1:1 scale. Hopefully these restrictions will be removed in the future. + */ +#define OV5642_MAX_WIDTH OV5642_SENSOR_SIZE_X +#define OV5642_MAX_HEIGHT 720 + +/* default sizes */ +#define OV5642_DEFAULT_WIDTH 1280 +#define OV5642_DEFAULT_HEIGHT OV5642_MAX_HEIGHT + +/* minimum extra blanking */ +#define BLANKING_EXTRA_WIDTH 500 +#define BLANKING_EXTRA_HEIGHT 20 + +/* + * the sensor's autoexposure is buggy when setting total_height low. + * It tries to expose longer than 1 frame period without taking care of it + * and this leads to weird output. So we set 1000 lines as minimum. + */ +#define BLANKING_MIN_HEIGHT 1000 + +struct regval_list { + u16 reg_num; + u8 value; +}; + +static struct regval_list ov5642_default_regs_init[] = { + { 0x3103, 0x93 }, + { 0x3008, 0x82 }, + { 0x3017, 0x7f }, + { 0x3018, 0xfc }, + { 0x3810, 0xc2 }, + { 0x3615, 0xf0 }, + { 0x3000, 0x0 }, + { 0x3001, 0x0 }, + { 0x3002, 0x0 }, + { 0x3003, 0x0 }, + { 0x3004, 0xff }, + { 0x3030, 0x2b }, + { 0x3011, 0x8 }, + { 0x3010, 0x10 }, + { 0x3604, 0x60 }, + { 0x3622, 0x60 }, + { 0x3621, 0x9 }, + { 0x3709, 0x0 }, + { 0x4000, 0x21 }, + { 0x401d, 0x22 }, + { 0x3600, 0x54 }, + { 0x3605, 0x4 }, + { 0x3606, 0x3f }, + { 0x3c01, 0x80 }, + { 0x300d, 0x22 }, + { 0x3623, 0x22 }, + { 0x5000, 0x4f }, + { 0x5020, 0x4 }, + { 0x5181, 0x79 }, + { 0x5182, 0x0 }, + { 0x5185, 0x22 }, + { 0x5197, 0x1 }, + { 0x5500, 0xa }, + { 0x5504, 0x0 }, + { 0x5505, 0x7f }, + { 0x5080, 0x8 }, + { 0x300e, 0x18 }, + { 0x4610, 0x0 }, + { 0x471d, 0x5 }, + { 0x4708, 0x6 }, + { 0x370c, 0xa0 }, + { 0x5687, 0x94 }, + { 0x501f, 0x0 }, + { 0x5000, 0x4f }, + { 0x5001, 0xcf }, + { 0x4300, 0x30 }, + { 0x4300, 0x30 }, + { 0x460b, 0x35 }, + { 0x471d, 0x0 }, + { 0x3002, 0xc }, + { 0x3002, 0x0 }, + { 0x4713, 0x3 }, + { 0x471c, 0x50 }, + { 0x4721, 0x2 }, + { 0x4402, 0x90 }, + { 0x460c, 0x22 }, + { 0x3815, 0x44 }, + { 0x3503, 0x7 }, + { 0x3501, 0x73 }, + { 0x3502, 0x80 }, + { 0x350b, 0x0 }, + { 0x3818, 0xc8 }, + { 0x3824, 0x11 }, + { 0x3a00, 0x78 }, + { 0x3a1a, 0x4 }, + { 0x3a13, 0x30 }, + { 0x3a18, 0x0 }, + { 0x3a19, 0x7c }, + { 0x3a08, 0x12 }, + { 0x3a09, 0xc0 }, + { 0x3a0a, 0xf }, + { 0x3a0b, 0xa0 }, + { 0x350c, 0x7 }, + { 0x350d, 0xd0 }, + { 0x3a0d, 0x8 }, + { 0x3a0e, 0x6 }, + { 0x3500, 0x0 }, + { 0x3501, 0x0 }, + { 0x3502, 0x0 }, + { 0x350a, 0x0 }, + { 0x350b, 0x0 }, + { 0x3503, 0x0 }, + { 0x3a0f, 0x3c }, + { 0x3a10, 0x32 }, + { 0x3a1b, 0x3c }, + { 0x3a1e, 0x32 }, + { 0x3a11, 0x80 }, + { 0x3a1f, 0x20 }, + { 0x3030, 0x2b }, + { 0x3a02, 0x0 }, + { 0x3a03, 0x7d }, + { 0x3a04, 0x0 }, + { 0x3a14, 0x0 }, + { 0x3a15, 0x7d }, + { 0x3a16, 0x0 }, + { 0x3a00, 0x78 }, + { 0x3a08, 0x9 }, + { 0x3a09, 0x60 }, + { 0x3a0a, 0x7 }, + { 0x3a0b, 0xd0 }, + { 0x3a0d, 0x10 }, + { 0x3a0e, 0xd }, + { 0x4407, 0x4 }, + { 0x5193, 0x70 }, + { 0x589b, 0x0 }, + { 0x589a, 0xc0 }, + { 0x401e, 0x20 }, + { 0x4001, 0x42 }, + { 0x401c, 0x6 }, + { 0x3825, 0xac }, + { 0x3827, 0xc }, + { 0x528a, 0x1 }, + { 0x528b, 0x4 }, + { 0x528c, 0x8 }, + { 0x528d, 0x10 }, + { 0x528e, 0x20 }, + { 0x528f, 0x28 }, + { 0x5290, 0x30 }, + { 0x5292, 0x0 }, + { 0x5293, 0x1 }, + { 0x5294, 0x0 }, + { 0x5295, 0x4 }, + { 0x5296, 0x0 }, + { 0x5297, 0x8 }, + { 0x5298, 0x0 }, + { 0x5299, 0x10 }, + { 0x529a, 0x0 }, + { 0x529b, 0x20 }, + { 0x529c, 0x0 }, + { 0x529d, 0x28 }, + { 0x529e, 0x0 }, + { 0x529f, 0x30 }, + { 0x5282, 0x0 }, + { 0x5300, 0x0 }, + { 0x5301, 0x20 }, + { 0x5302, 0x0 }, + { 0x5303, 0x7c }, + { 0x530c, 0x0 }, + { 0x530d, 0xc }, + { 0x530e, 0x20 }, + { 0x530f, 0x80 }, + { 0x5310, 0x20 }, + { 0x5311, 0x80 }, + { 0x5308, 0x20 }, + { 0x5309, 0x40 }, + { 0x5304, 0x0 }, + { 0x5305, 0x30 }, + { 0x5306, 0x0 }, + { 0x5307, 0x80 }, + { 0x5314, 0x8 }, + { 0x5315, 0x20 }, + { 0x5319, 0x30 }, + { 0x5316, 0x10 }, + { 0x5317, 0x0 }, + { 0x5318, 0x2 }, + { 0x5380, 0x1 }, + { 0x5381, 0x0 }, + { 0x5382, 0x0 }, + { 0x5383, 0x4e }, + { 0x5384, 0x0 }, + { 0x5385, 0xf }, + { 0x5386, 0x0 }, + { 0x5387, 0x0 }, + { 0x5388, 0x1 }, + { 0x5389, 0x15 }, + { 0x538a, 0x0 }, + { 0x538b, 0x31 }, + { 0x538c, 0x0 }, + { 0x538d, 0x0 }, + { 0x538e, 0x0 }, + { 0x538f, 0xf }, + { 0x5390, 0x0 }, + { 0x5391, 0xab }, + { 0x5392, 0x0 }, + { 0x5393, 0xa2 }, + { 0x5394, 0x8 }, + { 0x5480, 0x14 }, + { 0x5481, 0x21 }, + { 0x5482, 0x36 }, + { 0x5483, 0x57 }, + { 0x5484, 0x65 }, + { 0x5485, 0x71 }, + { 0x5486, 0x7d }, + { 0x5487, 0x87 }, + { 0x5488, 0x91 }, + { 0x5489, 0x9a }, + { 0x548a, 0xaa }, + { 0x548b, 0xb8 }, + { 0x548c, 0xcd }, + { 0x548d, 0xdd }, + { 0x548e, 0xea }, + { 0x548f, 0x1d }, + { 0x5490, 0x5 }, + { 0x5491, 0x0 }, + { 0x5492, 0x4 }, + { 0x5493, 0x20 }, + { 0x5494, 0x3 }, + { 0x5495, 0x60 }, + { 0x5496, 0x2 }, + { 0x5497, 0xb8 }, + { 0x5498, 0x2 }, + { 0x5499, 0x86 }, + { 0x549a, 0x2 }, + { 0x549b, 0x5b }, + { 0x549c, 0x2 }, + { 0x549d, 0x3b }, + { 0x549e, 0x2 }, + { 0x549f, 0x1c }, + { 0x54a0, 0x2 }, + { 0x54a1, 0x4 }, + { 0x54a2, 0x1 }, + { 0x54a3, 0xed }, + { 0x54a4, 0x1 }, + { 0x54a5, 0xc5 }, + { 0x54a6, 0x1 }, + { 0x54a7, 0xa5 }, + { 0x54a8, 0x1 }, + { 0x54a9, 0x6c }, + { 0x54aa, 0x1 }, + { 0x54ab, 0x41 }, + { 0x54ac, 0x1 }, + { 0x54ad, 0x20 }, + { 0x54ae, 0x0 }, + { 0x54af, 0x16 }, + { 0x54b0, 0x1 }, + { 0x54b1, 0x20 }, + { 0x54b2, 0x0 }, + { 0x54b3, 0x10 }, + { 0x54b4, 0x0 }, + { 0x54b5, 0xf0 }, + { 0x54b6, 0x0 }, + { 0x54b7, 0xdf }, + { 0x5402, 0x3f }, + { 0x5403, 0x0 }, + { 0x3406, 0x0 }, + { 0x5180, 0xff }, + { 0x5181, 0x52 }, + { 0x5182, 0x11 }, + { 0x5183, 0x14 }, + { 0x5184, 0x25 }, + { 0x5185, 0x24 }, + { 0x5186, 0x6 }, + { 0x5187, 0x8 }, + { 0x5188, 0x8 }, + { 0x5189, 0x7c }, + { 0x518a, 0x60 }, + { 0x518b, 0xb2 }, + { 0x518c, 0xb2 }, + { 0x518d, 0x44 }, + { 0x518e, 0x3d }, + { 0x518f, 0x58 }, + { 0x5190, 0x46 }, + { 0x5191, 0xf8 }, + { 0x5192, 0x4 }, + { 0x5193, 0x70 }, + { 0x5194, 0xf0 }, + { 0x5195, 0xf0 }, + { 0x5196, 0x3 }, + { 0x5197, 0x1 }, + { 0x5198, 0x4 }, + { 0x5199, 0x12 }, + { 0x519a, 0x4 }, + { 0x519b, 0x0 }, + { 0x519c, 0x6 }, + { 0x519d, 0x82 }, + { 0x519e, 0x0 }, + { 0x5025, 0x80 }, + { 0x3a0f, 0x38 }, + { 0x3a10, 0x30 }, + { 0x3a1b, 0x3a }, + { 0x3a1e, 0x2e }, + { 0x3a11, 0x60 }, + { 0x3a1f, 0x10 }, + { 0x5688, 0xa6 }, + { 0x5689, 0x6a }, + { 0x568a, 0xea }, + { 0x568b, 0xae }, + { 0x568c, 0xa6 }, + { 0x568d, 0x6a }, + { 0x568e, 0x62 }, + { 0x568f, 0x26 }, + { 0x5583, 0x40 }, + { 0x5584, 0x40 }, + { 0x5580, 0x2 }, + { 0x5000, 0xcf }, + { 0x5800, 0x27 }, + { 0x5801, 0x19 }, + { 0x5802, 0x12 }, + { 0x5803, 0xf }, + { 0x5804, 0x10 }, + { 0x5805, 0x15 }, + { 0x5806, 0x1e }, + { 0x5807, 0x2f }, + { 0x5808, 0x15 }, + { 0x5809, 0xd }, + { 0x580a, 0xa }, + { 0x580b, 0x9 }, + { 0x580c, 0xa }, + { 0x580d, 0xc }, + { 0x580e, 0x12 }, + { 0x580f, 0x19 }, + { 0x5810, 0xb }, + { 0x5811, 0x7 }, + { 0x5812, 0x4 }, + { 0x5813, 0x3 }, + { 0x5814, 0x3 }, + { 0x5815, 0x6 }, + { 0x5816, 0xa }, + { 0x5817, 0xf }, + { 0x5818, 0xa }, + { 0x5819, 0x5 }, + { 0x581a, 0x1 }, + { 0x581b, 0x0 }, + { 0x581c, 0x0 }, + { 0x581d, 0x3 }, + { 0x581e, 0x8 }, + { 0x581f, 0xc }, + { 0x5820, 0xa }, + { 0x5821, 0x5 }, + { 0x5822, 0x1 }, + { 0x5823, 0x0 }, + { 0x5824, 0x0 }, + { 0x5825, 0x3 }, + { 0x5826, 0x8 }, + { 0x5827, 0xc }, + { 0x5828, 0xe }, + { 0x5829, 0x8 }, + { 0x582a, 0x6 }, + { 0x582b, 0x4 }, + { 0x582c, 0x5 }, + { 0x582d, 0x7 }, + { 0x582e, 0xb }, + { 0x582f, 0x12 }, + { 0x5830, 0x18 }, + { 0x5831, 0x10 }, + { 0x5832, 0xc }, + { 0x5833, 0xa }, + { 0x5834, 0xb }, + { 0x5835, 0xe }, + { 0x5836, 0x15 }, + { 0x5837, 0x19 }, + { 0x5838, 0x32 }, + { 0x5839, 0x1f }, + { 0x583a, 0x18 }, + { 0x583b, 0x16 }, + { 0x583c, 0x17 }, + { 0x583d, 0x1e }, + { 0x583e, 0x26 }, + { 0x583f, 0x53 }, + { 0x5840, 0x10 }, + { 0x5841, 0xf }, + { 0x5842, 0xd }, + { 0x5843, 0xc }, + { 0x5844, 0xe }, + { 0x5845, 0x9 }, + { 0x5846, 0x11 }, + { 0x5847, 0x10 }, + { 0x5848, 0x10 }, + { 0x5849, 0x10 }, + { 0x584a, 0x10 }, + { 0x584b, 0xe }, + { 0x584c, 0x10 }, + { 0x584d, 0x10 }, + { 0x584e, 0x11 }, + { 0x584f, 0x10 }, + { 0x5850, 0xf }, + { 0x5851, 0xc }, + { 0x5852, 0xf }, + { 0x5853, 0x10 }, + { 0x5854, 0x10 }, + { 0x5855, 0xf }, + { 0x5856, 0xe }, + { 0x5857, 0xb }, + { 0x5858, 0x10 }, + { 0x5859, 0xd }, + { 0x585a, 0xd }, + { 0x585b, 0xc }, + { 0x585c, 0xc }, + { 0x585d, 0xc }, + { 0x585e, 0xb }, + { 0x585f, 0xc }, + { 0x5860, 0xc }, + { 0x5861, 0xc }, + { 0x5862, 0xd }, + { 0x5863, 0x8 }, + { 0x5864, 0x11 }, + { 0x5865, 0x18 }, + { 0x5866, 0x18 }, + { 0x5867, 0x19 }, + { 0x5868, 0x17 }, + { 0x5869, 0x19 }, + { 0x586a, 0x16 }, + { 0x586b, 0x13 }, + { 0x586c, 0x13 }, + { 0x586d, 0x12 }, + { 0x586e, 0x13 }, + { 0x586f, 0x16 }, + { 0x5870, 0x14 }, + { 0x5871, 0x12 }, + { 0x5872, 0x10 }, + { 0x5873, 0x11 }, + { 0x5874, 0x11 }, + { 0x5875, 0x16 }, + { 0x5876, 0x14 }, + { 0x5877, 0x11 }, + { 0x5878, 0x10 }, + { 0x5879, 0xf }, + { 0x587a, 0x10 }, + { 0x587b, 0x14 }, + { 0x587c, 0x13 }, + { 0x587d, 0x12 }, + { 0x587e, 0x11 }, + { 0x587f, 0x11 }, + { 0x5880, 0x12 }, + { 0x5881, 0x15 }, + { 0x5882, 0x14 }, + { 0x5883, 0x15 }, + { 0x5884, 0x15 }, + { 0x5885, 0x15 }, + { 0x5886, 0x13 }, + { 0x5887, 0x17 }, + { 0x3710, 0x10 }, + { 0x3632, 0x51 }, + { 0x3702, 0x10 }, + { 0x3703, 0xb2 }, + { 0x3704, 0x18 }, + { 0x370b, 0x40 }, + { 0x370d, 0x3 }, + { 0x3631, 0x1 }, + { 0x3632, 0x52 }, + { 0x3606, 0x24 }, + { 0x3620, 0x96 }, + { 0x5785, 0x7 }, + { 0x3a13, 0x30 }, + { 0x3600, 0x52 }, + { 0x3604, 0x48 }, + { 0x3606, 0x1b }, + { 0x370d, 0xb }, + { 0x370f, 0xc0 }, + { 0x3709, 0x1 }, + { 0x3823, 0x0 }, + { 0x5007, 0x0 }, + { 0x5009, 0x0 }, + { 0x5011, 0x0 }, + { 0x5013, 0x0 }, + { 0x519e, 0x0 }, + { 0x5086, 0x0 }, + { 0x5087, 0x0 }, + { 0x5088, 0x0 }, + { 0x5089, 0x0 }, + { 0x302b, 0x0 }, + { 0x3503, 0x7 }, + { 0x3011, 0x8 }, + { 0x350c, 0x2 }, + { 0x350d, 0xe4 }, + { 0x3621, 0xc9 }, + { 0x370a, 0x81 }, + { 0xffff, 0xff }, +}; + +static struct regval_list ov5642_default_regs_finalise[] = { + { 0x3810, 0xc2 }, + { 0x3818, 0xc9 }, + { 0x381c, 0x10 }, + { 0x381d, 0xa0 }, + { 0x381e, 0x5 }, + { 0x381f, 0xb0 }, + { 0x3820, 0x0 }, + { 0x3821, 0x0 }, + { 0x3824, 0x11 }, + { 0x3a08, 0x1b }, + { 0x3a09, 0xc0 }, + { 0x3a0a, 0x17 }, + { 0x3a0b, 0x20 }, + { 0x3a0d, 0x2 }, + { 0x3a0e, 0x1 }, + { 0x401c, 0x4 }, + { 0x5682, 0x5 }, + { 0x5683, 0x0 }, + { 0x5686, 0x2 }, + { 0x5687, 0xcc }, + { 0x5001, 0x4f }, + { 0x589b, 0x6 }, + { 0x589a, 0xc5 }, + { 0x3503, 0x0 }, + { 0x460c, 0x20 }, + { 0x460b, 0x37 }, + { 0x471c, 0xd0 }, + { 0x471d, 0x5 }, + { 0x3815, 0x1 }, + { 0x3818, 0xc1 }, + { 0x501f, 0x0 }, + { 0x5002, 0xe0 }, + { 0x4300, 0x32 }, /* UYVY */ + { 0x3002, 0x1c }, + { 0x4800, 0x14 }, + { 0x4801, 0xf }, + { 0x3007, 0x3b }, + { 0x300e, 0x4 }, + { 0x4803, 0x50 }, + { 0x3815, 0x1 }, + { 0x4713, 0x2 }, + { 0x4842, 0x1 }, + { 0x300f, 0xe }, + { 0x3003, 0x3 }, + { 0x3003, 0x1 }, + { 0xffff, 0xff }, +}; + +struct ov5642_datafmt { + u32 code; + enum v4l2_colorspace colorspace; +}; + +struct ov5642 { + struct v4l2_subdev subdev; + const struct ov5642_datafmt *fmt; + struct v4l2_rect crop_rect; + struct v4l2_clk *clk; + + /* blanking information */ + int total_width; + int total_height; +}; + +static const struct ov5642_datafmt ov5642_colour_fmts[] = { + {MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG}, +}; + +static struct ov5642 *to_ov5642(const struct i2c_client *client) +{ + return container_of(i2c_get_clientdata(client), struct ov5642, subdev); +} + +/* Find a data format by a pixel code in an array */ +static const struct ov5642_datafmt + *ov5642_find_datafmt(u32 code) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(ov5642_colour_fmts); i++) + if (ov5642_colour_fmts[i].code == code) + return ov5642_colour_fmts + i; + + return NULL; +} + +static int reg_read(struct i2c_client *client, u16 reg, u8 *val) +{ + int ret; + /* We have 16-bit i2c addresses - care for endianness */ + unsigned char data[2] = { reg >> 8, reg & 0xff }; + + ret = i2c_master_send(client, data, 2); + if (ret < 2) { + dev_err(&client->dev, "%s: i2c read error, reg: %x\n", + __func__, reg); + return ret < 0 ? ret : -EIO; + } + + ret = i2c_master_recv(client, val, 1); + if (ret < 1) { + dev_err(&client->dev, "%s: i2c read error, reg: %x\n", + __func__, reg); + return ret < 0 ? ret : -EIO; + } + return 0; +} + +static int reg_write(struct i2c_client *client, u16 reg, u8 val) +{ + int ret; + unsigned char data[3] = { reg >> 8, reg & 0xff, val }; + + ret = i2c_master_send(client, data, 3); + if (ret < 3) { + dev_err(&client->dev, "%s: i2c write error, reg: %x\n", + __func__, reg); + return ret < 0 ? ret : -EIO; + } + + return 0; +} + +/* + * convenience function to write 16 bit register values that are split up + * into two consecutive high and low parts + */ +static int reg_write16(struct i2c_client *client, u16 reg, u16 val16) +{ + int ret; + + ret = reg_write(client, reg, val16 >> 8); + if (ret) + return ret; + return reg_write(client, reg + 1, val16 & 0x00ff); +} + +#ifdef CONFIG_VIDEO_ADV_DEBUG +static int ov5642_get_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + u8 val; + + if (reg->reg & ~0xffff) + return -EINVAL; + + reg->size = 1; + + ret = reg_read(client, reg->reg, &val); + if (!ret) + reg->val = (__u64)val; + + return ret; +} + +static int ov5642_set_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + if (reg->reg & ~0xffff || reg->val & ~0xff) + return -EINVAL; + + return reg_write(client, reg->reg, reg->val); +} +#endif + +static int ov5642_write_array(struct i2c_client *client, + struct regval_list *vals) +{ + while (vals->reg_num != 0xffff || vals->value != 0xff) { + int ret = reg_write(client, vals->reg_num, vals->value); + if (ret < 0) + return ret; + vals++; + } + dev_dbg(&client->dev, "Register list loaded\n"); + return 0; +} + +static int ov5642_set_resolution(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5642 *priv = to_ov5642(client); + int width = priv->crop_rect.width; + int height = priv->crop_rect.height; + int total_width = priv->total_width; + int total_height = priv->total_height; + int start_x = (OV5642_SENSOR_SIZE_X - width) / 2; + int start_y = (OV5642_SENSOR_SIZE_Y - height) / 2; + int ret; + + /* + * This should set the starting point for cropping. + * Doesn't work so far. + */ + ret = reg_write16(client, REG_WINDOW_START_X_HIGH, start_x); + if (!ret) + ret = reg_write16(client, REG_WINDOW_START_Y_HIGH, start_y); + if (!ret) { + priv->crop_rect.left = start_x; + priv->crop_rect.top = start_y; + } + + if (!ret) + ret = reg_write16(client, REG_WINDOW_WIDTH_HIGH, width); + if (!ret) + ret = reg_write16(client, REG_WINDOW_HEIGHT_HIGH, height); + if (ret) + return ret; + priv->crop_rect.width = width; + priv->crop_rect.height = height; + + /* Set the output window size. Only 1:1 scale is supported so far. */ + ret = reg_write16(client, REG_OUT_WIDTH_HIGH, width); + if (!ret) + ret = reg_write16(client, REG_OUT_HEIGHT_HIGH, height); + + /* Total width = output size + blanking */ + if (!ret) + ret = reg_write16(client, REG_OUT_TOTAL_WIDTH_HIGH, total_width); + if (!ret) + ret = reg_write16(client, REG_OUT_TOTAL_HEIGHT_HIGH, total_height); + + /* Sets the window for AWB calculations */ + if (!ret) + ret = reg_write16(client, REG_AVG_WINDOW_END_X_HIGH, width); + if (!ret) + ret = reg_write16(client, REG_AVG_WINDOW_END_Y_HIGH, height); + + return ret; +} + +static int ov5642_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *mf = &format->format; + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5642 *priv = to_ov5642(client); + const struct ov5642_datafmt *fmt = ov5642_find_datafmt(mf->code); + + if (format->pad) + return -EINVAL; + + mf->width = priv->crop_rect.width; + mf->height = priv->crop_rect.height; + + if (!fmt) { + if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + mf->code = ov5642_colour_fmts[0].code; + mf->colorspace = ov5642_colour_fmts[0].colorspace; + } + + mf->field = V4L2_FIELD_NONE; + + if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) + priv->fmt = fmt; + else + cfg->try_fmt = *mf; + return 0; +} + +static int ov5642_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *mf = &format->format; + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5642 *priv = to_ov5642(client); + + const struct ov5642_datafmt *fmt = priv->fmt; + + if (format->pad) + return -EINVAL; + + mf->code = fmt->code; + mf->colorspace = fmt->colorspace; + mf->width = priv->crop_rect.width; + mf->height = priv->crop_rect.height; + mf->field = V4L2_FIELD_NONE; + + return 0; +} + +static int ov5642_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->pad || code->index >= ARRAY_SIZE(ov5642_colour_fmts)) + return -EINVAL; + + code->code = ov5642_colour_fmts[code->index].code; + return 0; +} + +static int ov5642_set_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5642 *priv = to_ov5642(client); + struct v4l2_rect rect = sel->r; + int ret; + + if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || + sel->target != V4L2_SEL_TGT_CROP) + return -EINVAL; + + v4l_bound_align_image(&rect.width, 48, OV5642_MAX_WIDTH, 1, + &rect.height, 32, OV5642_MAX_HEIGHT, 1, 0); + + priv->crop_rect.width = rect.width; + priv->crop_rect.height = rect.height; + priv->total_width = rect.width + BLANKING_EXTRA_WIDTH; + priv->total_height = max_t(int, rect.height + + BLANKING_EXTRA_HEIGHT, + BLANKING_MIN_HEIGHT); + priv->crop_rect.width = rect.width; + priv->crop_rect.height = rect.height; + + ret = ov5642_write_array(client, ov5642_default_regs_init); + if (!ret) + ret = ov5642_set_resolution(sd); + if (!ret) + ret = ov5642_write_array(client, ov5642_default_regs_finalise); + + return ret; +} + +static int ov5642_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5642 *priv = to_ov5642(client); + + if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + switch (sel->target) { + case V4L2_SEL_TGT_CROP_BOUNDS: + sel->r.left = 0; + sel->r.top = 0; + sel->r.width = OV5642_MAX_WIDTH; + sel->r.height = OV5642_MAX_HEIGHT; + return 0; + case V4L2_SEL_TGT_CROP: + sel->r = priv->crop_rect; + return 0; + default: + return -EINVAL; + } +} + +static int ov5642_g_mbus_config(struct v4l2_subdev *sd, + struct v4l2_mbus_config *cfg) +{ + cfg->type = V4L2_MBUS_CSI2_DPHY; + cfg->flags = V4L2_MBUS_CSI2_2_LANE | V4L2_MBUS_CSI2_CHANNEL_0 | + V4L2_MBUS_CSI2_CONTINUOUS_CLOCK; + + return 0; +} + +static int ov5642_s_power(struct v4l2_subdev *sd, int on) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + struct ov5642 *priv = to_ov5642(client); + int ret; + + if (!on) + return soc_camera_power_off(&client->dev, ssdd, priv->clk); + + ret = soc_camera_power_on(&client->dev, ssdd, priv->clk); + if (ret < 0) + return ret; + + ret = ov5642_write_array(client, ov5642_default_regs_init); + if (!ret) + ret = ov5642_set_resolution(sd); + if (!ret) + ret = ov5642_write_array(client, ov5642_default_regs_finalise); + + return ret; +} + +static const struct v4l2_subdev_video_ops ov5642_subdev_video_ops = { + .g_mbus_config = ov5642_g_mbus_config, +}; + +static const struct v4l2_subdev_pad_ops ov5642_subdev_pad_ops = { + .enum_mbus_code = ov5642_enum_mbus_code, + .get_selection = ov5642_get_selection, + .set_selection = ov5642_set_selection, + .get_fmt = ov5642_get_fmt, + .set_fmt = ov5642_set_fmt, +}; + +static const struct v4l2_subdev_core_ops ov5642_subdev_core_ops = { + .s_power = ov5642_s_power, +#ifdef CONFIG_VIDEO_ADV_DEBUG + .g_register = ov5642_get_register, + .s_register = ov5642_set_register, +#endif +}; + +static const struct v4l2_subdev_ops ov5642_subdev_ops = { + .core = &ov5642_subdev_core_ops, + .video = &ov5642_subdev_video_ops, + .pad = &ov5642_subdev_pad_ops, +}; + +static int ov5642_video_probe(struct i2c_client *client) +{ + struct v4l2_subdev *subdev = i2c_get_clientdata(client); + int ret; + u8 id_high, id_low; + u16 id; + + ret = ov5642_s_power(subdev, 1); + if (ret < 0) + return ret; + + /* Read sensor Model ID */ + ret = reg_read(client, REG_CHIP_ID_HIGH, &id_high); + if (ret < 0) + goto done; + + id = id_high << 8; + + ret = reg_read(client, REG_CHIP_ID_LOW, &id_low); + if (ret < 0) + goto done; + + id |= id_low; + + dev_info(&client->dev, "Chip ID 0x%04x detected\n", id); + + if (id != 0x5642) { + ret = -ENODEV; + goto done; + } + + ret = 0; + +done: + ov5642_s_power(subdev, 0); + return ret; +} + +static int ov5642_probe(struct i2c_client *client, + const struct i2c_device_id *did) +{ + struct ov5642 *priv; + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + int ret; + + if (!ssdd) { + dev_err(&client->dev, "OV5642: missing platform data!\n"); + return -EINVAL; + } + + priv = devm_kzalloc(&client->dev, sizeof(struct ov5642), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + v4l2_i2c_subdev_init(&priv->subdev, client, &ov5642_subdev_ops); + + priv->fmt = &ov5642_colour_fmts[0]; + + priv->crop_rect.width = OV5642_DEFAULT_WIDTH; + priv->crop_rect.height = OV5642_DEFAULT_HEIGHT; + priv->crop_rect.left = (OV5642_MAX_WIDTH - OV5642_DEFAULT_WIDTH) / 2; + priv->crop_rect.top = (OV5642_MAX_HEIGHT - OV5642_DEFAULT_HEIGHT) / 2; + priv->total_width = OV5642_DEFAULT_WIDTH + BLANKING_EXTRA_WIDTH; + priv->total_height = BLANKING_MIN_HEIGHT; + + priv->clk = v4l2_clk_get(&client->dev, "mclk"); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); + + ret = ov5642_video_probe(client); + if (ret < 0) + v4l2_clk_put(priv->clk); + + return ret; +} + +static int ov5642_remove(struct i2c_client *client) +{ + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + struct ov5642 *priv = to_ov5642(client); + + v4l2_clk_put(priv->clk); + if (ssdd->free_bus) + ssdd->free_bus(ssdd); + + return 0; +} + +static const struct i2c_device_id ov5642_id[] = { + { "ov5642", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ov5642_id); + +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id ov5642_of_match[] = { + { .compatible = "ovti,ov5642" }, + { }, +}; +MODULE_DEVICE_TABLE(of, ov5642_of_match); +#endif + +static struct i2c_driver ov5642_i2c_driver = { + .driver = { + .name = "ov5642", + .of_match_table = of_match_ptr(ov5642_of_match), + }, + .probe = ov5642_probe, + .remove = ov5642_remove, + .id_table = ov5642_id, +}; + +module_i2c_driver(ov5642_i2c_driver); + +MODULE_DESCRIPTION("Omnivision OV5642 Camera driver"); +MODULE_AUTHOR("Bastian Hecht <hechtb@gmail.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/media/soc_camera/soc_ov9740.c b/drivers/staging/media/soc_camera/soc_ov9740.c new file mode 100644 index 000000000000..a07d3145d1b4 --- /dev/null +++ b/drivers/staging/media/soc_camera/soc_ov9740.c @@ -0,0 +1,996 @@ +/* + * OmniVision OV9740 Camera Driver + * + * Copyright (C) 2011 NVIDIA Corporation + * + * Based on ov9640 camera driver. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/i2c.h> +#include <linux/slab.h> +#include <linux/v4l2-mediabus.h> + +#include <media/soc_camera.h> +#include <media/v4l2-clk.h> +#include <media/v4l2-ctrls.h> + +#define to_ov9740(sd) container_of(sd, struct ov9740_priv, subdev) + +/* General Status Registers */ +#define OV9740_MODEL_ID_HI 0x0000 +#define OV9740_MODEL_ID_LO 0x0001 +#define OV9740_REVISION_NUMBER 0x0002 +#define OV9740_MANUFACTURER_ID 0x0003 +#define OV9740_SMIA_VERSION 0x0004 + +/* General Setup Registers */ +#define OV9740_MODE_SELECT 0x0100 +#define OV9740_IMAGE_ORT 0x0101 +#define OV9740_SOFTWARE_RESET 0x0103 +#define OV9740_GRP_PARAM_HOLD 0x0104 +#define OV9740_MSK_CORRUP_FM 0x0105 + +/* Timing Setting */ +#define OV9740_FRM_LENGTH_LN_HI 0x0340 /* VTS */ +#define OV9740_FRM_LENGTH_LN_LO 0x0341 /* VTS */ +#define OV9740_LN_LENGTH_PCK_HI 0x0342 /* HTS */ +#define OV9740_LN_LENGTH_PCK_LO 0x0343 /* HTS */ +#define OV9740_X_ADDR_START_HI 0x0344 +#define OV9740_X_ADDR_START_LO 0x0345 +#define OV9740_Y_ADDR_START_HI 0x0346 +#define OV9740_Y_ADDR_START_LO 0x0347 +#define OV9740_X_ADDR_END_HI 0x0348 +#define OV9740_X_ADDR_END_LO 0x0349 +#define OV9740_Y_ADDR_END_HI 0x034a +#define OV9740_Y_ADDR_END_LO 0x034b +#define OV9740_X_OUTPUT_SIZE_HI 0x034c +#define OV9740_X_OUTPUT_SIZE_LO 0x034d +#define OV9740_Y_OUTPUT_SIZE_HI 0x034e +#define OV9740_Y_OUTPUT_SIZE_LO 0x034f + +/* IO Control Registers */ +#define OV9740_IO_CREL00 0x3002 +#define OV9740_IO_CREL01 0x3004 +#define OV9740_IO_CREL02 0x3005 +#define OV9740_IO_OUTPUT_SEL01 0x3026 +#define OV9740_IO_OUTPUT_SEL02 0x3027 + +/* AWB Registers */ +#define OV9740_AWB_MANUAL_CTRL 0x3406 + +/* Analog Control Registers */ +#define OV9740_ANALOG_CTRL01 0x3601 +#define OV9740_ANALOG_CTRL02 0x3602 +#define OV9740_ANALOG_CTRL03 0x3603 +#define OV9740_ANALOG_CTRL04 0x3604 +#define OV9740_ANALOG_CTRL10 0x3610 +#define OV9740_ANALOG_CTRL12 0x3612 +#define OV9740_ANALOG_CTRL15 0x3615 +#define OV9740_ANALOG_CTRL20 0x3620 +#define OV9740_ANALOG_CTRL21 0x3621 +#define OV9740_ANALOG_CTRL22 0x3622 +#define OV9740_ANALOG_CTRL30 0x3630 +#define OV9740_ANALOG_CTRL31 0x3631 +#define OV9740_ANALOG_CTRL32 0x3632 +#define OV9740_ANALOG_CTRL33 0x3633 + +/* Sensor Control */ +#define OV9740_SENSOR_CTRL03 0x3703 +#define OV9740_SENSOR_CTRL04 0x3704 +#define OV9740_SENSOR_CTRL05 0x3705 +#define OV9740_SENSOR_CTRL07 0x3707 + +/* Timing Control */ +#define OV9740_TIMING_CTRL17 0x3817 +#define OV9740_TIMING_CTRL19 0x3819 +#define OV9740_TIMING_CTRL33 0x3833 +#define OV9740_TIMING_CTRL35 0x3835 + +/* Banding Filter */ +#define OV9740_AEC_MAXEXPO_60_H 0x3a02 +#define OV9740_AEC_MAXEXPO_60_L 0x3a03 +#define OV9740_AEC_B50_STEP_HI 0x3a08 +#define OV9740_AEC_B50_STEP_LO 0x3a09 +#define OV9740_AEC_B60_STEP_HI 0x3a0a +#define OV9740_AEC_B60_STEP_LO 0x3a0b +#define OV9740_AEC_CTRL0D 0x3a0d +#define OV9740_AEC_CTRL0E 0x3a0e +#define OV9740_AEC_MAXEXPO_50_H 0x3a14 +#define OV9740_AEC_MAXEXPO_50_L 0x3a15 + +/* AEC/AGC Control */ +#define OV9740_AEC_ENABLE 0x3503 +#define OV9740_GAIN_CEILING_01 0x3a18 +#define OV9740_GAIN_CEILING_02 0x3a19 +#define OV9740_AEC_HI_THRESHOLD 0x3a11 +#define OV9740_AEC_3A1A 0x3a1a +#define OV9740_AEC_CTRL1B_WPT2 0x3a1b +#define OV9740_AEC_CTRL0F_WPT 0x3a0f +#define OV9740_AEC_CTRL10_BPT 0x3a10 +#define OV9740_AEC_CTRL1E_BPT2 0x3a1e +#define OV9740_AEC_LO_THRESHOLD 0x3a1f + +/* BLC Control */ +#define OV9740_BLC_AUTO_ENABLE 0x4002 +#define OV9740_BLC_MODE 0x4005 + +/* VFIFO */ +#define OV9740_VFIFO_READ_START_HI 0x4608 +#define OV9740_VFIFO_READ_START_LO 0x4609 + +/* DVP Control */ +#define OV9740_DVP_VSYNC_CTRL02 0x4702 +#define OV9740_DVP_VSYNC_MODE 0x4704 +#define OV9740_DVP_VSYNC_CTRL06 0x4706 + +/* PLL Setting */ +#define OV9740_PLL_MODE_CTRL01 0x3104 +#define OV9740_PRE_PLL_CLK_DIV 0x0305 +#define OV9740_PLL_MULTIPLIER 0x0307 +#define OV9740_VT_SYS_CLK_DIV 0x0303 +#define OV9740_VT_PIX_CLK_DIV 0x0301 +#define OV9740_PLL_CTRL3010 0x3010 +#define OV9740_VFIFO_CTRL00 0x460e + +/* ISP Control */ +#define OV9740_ISP_CTRL00 0x5000 +#define OV9740_ISP_CTRL01 0x5001 +#define OV9740_ISP_CTRL03 0x5003 +#define OV9740_ISP_CTRL05 0x5005 +#define OV9740_ISP_CTRL12 0x5012 +#define OV9740_ISP_CTRL19 0x5019 +#define OV9740_ISP_CTRL1A 0x501a +#define OV9740_ISP_CTRL1E 0x501e +#define OV9740_ISP_CTRL1F 0x501f +#define OV9740_ISP_CTRL20 0x5020 +#define OV9740_ISP_CTRL21 0x5021 + +/* AWB */ +#define OV9740_AWB_CTRL00 0x5180 +#define OV9740_AWB_CTRL01 0x5181 +#define OV9740_AWB_CTRL02 0x5182 +#define OV9740_AWB_CTRL03 0x5183 +#define OV9740_AWB_ADV_CTRL01 0x5184 +#define OV9740_AWB_ADV_CTRL02 0x5185 +#define OV9740_AWB_ADV_CTRL03 0x5186 +#define OV9740_AWB_ADV_CTRL04 0x5187 +#define OV9740_AWB_ADV_CTRL05 0x5188 +#define OV9740_AWB_ADV_CTRL06 0x5189 +#define OV9740_AWB_ADV_CTRL07 0x518a +#define OV9740_AWB_ADV_CTRL08 0x518b +#define OV9740_AWB_ADV_CTRL09 0x518c +#define OV9740_AWB_ADV_CTRL10 0x518d +#define OV9740_AWB_ADV_CTRL11 0x518e +#define OV9740_AWB_CTRL0F 0x518f +#define OV9740_AWB_CTRL10 0x5190 +#define OV9740_AWB_CTRL11 0x5191 +#define OV9740_AWB_CTRL12 0x5192 +#define OV9740_AWB_CTRL13 0x5193 +#define OV9740_AWB_CTRL14 0x5194 + +/* MIPI Control */ +#define OV9740_MIPI_CTRL00 0x4800 +#define OV9740_MIPI_3837 0x3837 +#define OV9740_MIPI_CTRL01 0x4801 +#define OV9740_MIPI_CTRL03 0x4803 +#define OV9740_MIPI_CTRL05 0x4805 +#define OV9740_VFIFO_RD_CTRL 0x4601 +#define OV9740_MIPI_CTRL_3012 0x3012 +#define OV9740_SC_CMMM_MIPI_CTR 0x3014 + +#define OV9740_MAX_WIDTH 1280 +#define OV9740_MAX_HEIGHT 720 + +/* Misc. structures */ +struct ov9740_reg { + u16 reg; + u8 val; +}; + +struct ov9740_priv { + struct v4l2_subdev subdev; + struct v4l2_ctrl_handler hdl; + struct v4l2_clk *clk; + + u16 model; + u8 revision; + u8 manid; + u8 smiaver; + + bool flag_vflip; + bool flag_hflip; + + /* For suspend/resume. */ + struct v4l2_mbus_framefmt current_mf; + bool current_enable; +}; + +static const struct ov9740_reg ov9740_defaults[] = { + /* Software Reset */ + { OV9740_SOFTWARE_RESET, 0x01 }, + + /* Banding Filter */ + { OV9740_AEC_B50_STEP_HI, 0x00 }, + { OV9740_AEC_B50_STEP_LO, 0xe8 }, + { OV9740_AEC_CTRL0E, 0x03 }, + { OV9740_AEC_MAXEXPO_50_H, 0x15 }, + { OV9740_AEC_MAXEXPO_50_L, 0xc6 }, + { OV9740_AEC_B60_STEP_HI, 0x00 }, + { OV9740_AEC_B60_STEP_LO, 0xc0 }, + { OV9740_AEC_CTRL0D, 0x04 }, + { OV9740_AEC_MAXEXPO_60_H, 0x18 }, + { OV9740_AEC_MAXEXPO_60_L, 0x20 }, + + /* LC */ + { 0x5842, 0x02 }, { 0x5843, 0x5e }, { 0x5844, 0x04 }, { 0x5845, 0x32 }, + { 0x5846, 0x03 }, { 0x5847, 0x29 }, { 0x5848, 0x02 }, { 0x5849, 0xcc }, + + /* Un-documented OV9740 registers */ + { 0x5800, 0x29 }, { 0x5801, 0x25 }, { 0x5802, 0x20 }, { 0x5803, 0x21 }, + { 0x5804, 0x26 }, { 0x5805, 0x2e }, { 0x5806, 0x11 }, { 0x5807, 0x0c }, + { 0x5808, 0x09 }, { 0x5809, 0x0a }, { 0x580a, 0x0e }, { 0x580b, 0x16 }, + { 0x580c, 0x06 }, { 0x580d, 0x02 }, { 0x580e, 0x00 }, { 0x580f, 0x00 }, + { 0x5810, 0x04 }, { 0x5811, 0x0a }, { 0x5812, 0x05 }, { 0x5813, 0x02 }, + { 0x5814, 0x00 }, { 0x5815, 0x00 }, { 0x5816, 0x03 }, { 0x5817, 0x09 }, + { 0x5818, 0x0f }, { 0x5819, 0x0a }, { 0x581a, 0x07 }, { 0x581b, 0x08 }, + { 0x581c, 0x0b }, { 0x581d, 0x14 }, { 0x581e, 0x28 }, { 0x581f, 0x23 }, + { 0x5820, 0x1d }, { 0x5821, 0x1e }, { 0x5822, 0x24 }, { 0x5823, 0x2a }, + { 0x5824, 0x4f }, { 0x5825, 0x6f }, { 0x5826, 0x5f }, { 0x5827, 0x7f }, + { 0x5828, 0x9f }, { 0x5829, 0x5f }, { 0x582a, 0x8f }, { 0x582b, 0x9e }, + { 0x582c, 0x8f }, { 0x582d, 0x9f }, { 0x582e, 0x4f }, { 0x582f, 0x87 }, + { 0x5830, 0x86 }, { 0x5831, 0x97 }, { 0x5832, 0xae }, { 0x5833, 0x3f }, + { 0x5834, 0x8e }, { 0x5835, 0x7c }, { 0x5836, 0x7e }, { 0x5837, 0xaf }, + { 0x5838, 0x8f }, { 0x5839, 0x8f }, { 0x583a, 0x9f }, { 0x583b, 0x7f }, + { 0x583c, 0x5f }, + + /* Y Gamma */ + { 0x5480, 0x07 }, { 0x5481, 0x18 }, { 0x5482, 0x2c }, { 0x5483, 0x4e }, + { 0x5484, 0x5e }, { 0x5485, 0x6b }, { 0x5486, 0x77 }, { 0x5487, 0x82 }, + { 0x5488, 0x8c }, { 0x5489, 0x95 }, { 0x548a, 0xa4 }, { 0x548b, 0xb1 }, + { 0x548c, 0xc6 }, { 0x548d, 0xd8 }, { 0x548e, 0xe9 }, + + /* UV Gamma */ + { 0x5490, 0x0f }, { 0x5491, 0xff }, { 0x5492, 0x0d }, { 0x5493, 0x05 }, + { 0x5494, 0x07 }, { 0x5495, 0x1a }, { 0x5496, 0x04 }, { 0x5497, 0x01 }, + { 0x5498, 0x03 }, { 0x5499, 0x53 }, { 0x549a, 0x02 }, { 0x549b, 0xeb }, + { 0x549c, 0x02 }, { 0x549d, 0xa0 }, { 0x549e, 0x02 }, { 0x549f, 0x67 }, + { 0x54a0, 0x02 }, { 0x54a1, 0x3b }, { 0x54a2, 0x02 }, { 0x54a3, 0x18 }, + { 0x54a4, 0x01 }, { 0x54a5, 0xe7 }, { 0x54a6, 0x01 }, { 0x54a7, 0xc3 }, + { 0x54a8, 0x01 }, { 0x54a9, 0x94 }, { 0x54aa, 0x01 }, { 0x54ab, 0x72 }, + { 0x54ac, 0x01 }, { 0x54ad, 0x57 }, + + /* AWB */ + { OV9740_AWB_CTRL00, 0xf0 }, + { OV9740_AWB_CTRL01, 0x00 }, + { OV9740_AWB_CTRL02, 0x41 }, + { OV9740_AWB_CTRL03, 0x42 }, + { OV9740_AWB_ADV_CTRL01, 0x8a }, + { OV9740_AWB_ADV_CTRL02, 0x61 }, + { OV9740_AWB_ADV_CTRL03, 0xce }, + { OV9740_AWB_ADV_CTRL04, 0xa8 }, + { OV9740_AWB_ADV_CTRL05, 0x17 }, + { OV9740_AWB_ADV_CTRL06, 0x1f }, + { OV9740_AWB_ADV_CTRL07, 0x27 }, + { OV9740_AWB_ADV_CTRL08, 0x41 }, + { OV9740_AWB_ADV_CTRL09, 0x34 }, + { OV9740_AWB_ADV_CTRL10, 0xf0 }, + { OV9740_AWB_ADV_CTRL11, 0x10 }, + { OV9740_AWB_CTRL0F, 0xff }, + { OV9740_AWB_CTRL10, 0x00 }, + { OV9740_AWB_CTRL11, 0xff }, + { OV9740_AWB_CTRL12, 0x00 }, + { OV9740_AWB_CTRL13, 0xff }, + { OV9740_AWB_CTRL14, 0x00 }, + + /* CIP */ + { 0x530d, 0x12 }, + + /* CMX */ + { 0x5380, 0x01 }, { 0x5381, 0x00 }, { 0x5382, 0x00 }, { 0x5383, 0x17 }, + { 0x5384, 0x00 }, { 0x5385, 0x01 }, { 0x5386, 0x00 }, { 0x5387, 0x00 }, + { 0x5388, 0x00 }, { 0x5389, 0xe0 }, { 0x538a, 0x00 }, { 0x538b, 0x20 }, + { 0x538c, 0x00 }, { 0x538d, 0x00 }, { 0x538e, 0x00 }, { 0x538f, 0x16 }, + { 0x5390, 0x00 }, { 0x5391, 0x9c }, { 0x5392, 0x00 }, { 0x5393, 0xa0 }, + { 0x5394, 0x18 }, + + /* 50/60 Detection */ + { 0x3c0a, 0x9c }, { 0x3c0b, 0x3f }, + + /* Output Select */ + { OV9740_IO_OUTPUT_SEL01, 0x00 }, + { OV9740_IO_OUTPUT_SEL02, 0x00 }, + { OV9740_IO_CREL00, 0x00 }, + { OV9740_IO_CREL01, 0x00 }, + { OV9740_IO_CREL02, 0x00 }, + + /* AWB Control */ + { OV9740_AWB_MANUAL_CTRL, 0x00 }, + + /* Analog Control */ + { OV9740_ANALOG_CTRL03, 0xaa }, + { OV9740_ANALOG_CTRL32, 0x2f }, + { OV9740_ANALOG_CTRL20, 0x66 }, + { OV9740_ANALOG_CTRL21, 0xc0 }, + { OV9740_ANALOG_CTRL31, 0x52 }, + { OV9740_ANALOG_CTRL33, 0x50 }, + { OV9740_ANALOG_CTRL30, 0xca }, + { OV9740_ANALOG_CTRL04, 0x0c }, + { OV9740_ANALOG_CTRL01, 0x40 }, + { OV9740_ANALOG_CTRL02, 0x16 }, + { OV9740_ANALOG_CTRL10, 0xa1 }, + { OV9740_ANALOG_CTRL12, 0x24 }, + { OV9740_ANALOG_CTRL22, 0x9f }, + { OV9740_ANALOG_CTRL15, 0xf0 }, + + /* Sensor Control */ + { OV9740_SENSOR_CTRL03, 0x42 }, + { OV9740_SENSOR_CTRL04, 0x10 }, + { OV9740_SENSOR_CTRL05, 0x45 }, + { OV9740_SENSOR_CTRL07, 0x14 }, + + /* Timing Control */ + { OV9740_TIMING_CTRL33, 0x04 }, + { OV9740_TIMING_CTRL35, 0x02 }, + { OV9740_TIMING_CTRL19, 0x6e }, + { OV9740_TIMING_CTRL17, 0x94 }, + + /* AEC/AGC Control */ + { OV9740_AEC_ENABLE, 0x10 }, + { OV9740_GAIN_CEILING_01, 0x00 }, + { OV9740_GAIN_CEILING_02, 0x7f }, + { OV9740_AEC_HI_THRESHOLD, 0xa0 }, + { OV9740_AEC_3A1A, 0x05 }, + { OV9740_AEC_CTRL1B_WPT2, 0x50 }, + { OV9740_AEC_CTRL0F_WPT, 0x50 }, + { OV9740_AEC_CTRL10_BPT, 0x4c }, + { OV9740_AEC_CTRL1E_BPT2, 0x4c }, + { OV9740_AEC_LO_THRESHOLD, 0x26 }, + + /* BLC Control */ + { OV9740_BLC_AUTO_ENABLE, 0x45 }, + { OV9740_BLC_MODE, 0x18 }, + + /* DVP Control */ + { OV9740_DVP_VSYNC_CTRL02, 0x04 }, + { OV9740_DVP_VSYNC_MODE, 0x00 }, + { OV9740_DVP_VSYNC_CTRL06, 0x08 }, + + /* PLL Setting */ + { OV9740_PLL_MODE_CTRL01, 0x20 }, + { OV9740_PRE_PLL_CLK_DIV, 0x03 }, + { OV9740_PLL_MULTIPLIER, 0x4c }, + { OV9740_VT_SYS_CLK_DIV, 0x01 }, + { OV9740_VT_PIX_CLK_DIV, 0x08 }, + { OV9740_PLL_CTRL3010, 0x01 }, + { OV9740_VFIFO_CTRL00, 0x82 }, + + /* Timing Setting */ + /* VTS */ + { OV9740_FRM_LENGTH_LN_HI, 0x03 }, + { OV9740_FRM_LENGTH_LN_LO, 0x07 }, + /* HTS */ + { OV9740_LN_LENGTH_PCK_HI, 0x06 }, + { OV9740_LN_LENGTH_PCK_LO, 0x62 }, + + /* MIPI Control */ + { OV9740_MIPI_CTRL00, 0x44 }, /* 0x64 for discontinuous clk */ + { OV9740_MIPI_3837, 0x01 }, + { OV9740_MIPI_CTRL01, 0x0f }, + { OV9740_MIPI_CTRL03, 0x05 }, + { OV9740_MIPI_CTRL05, 0x10 }, + { OV9740_VFIFO_RD_CTRL, 0x16 }, + { OV9740_MIPI_CTRL_3012, 0x70 }, + { OV9740_SC_CMMM_MIPI_CTR, 0x01 }, + + /* YUYV order */ + { OV9740_ISP_CTRL19, 0x02 }, +}; + +static u32 ov9740_codes[] = { + MEDIA_BUS_FMT_YUYV8_2X8, +}; + +/* read a register */ +static int ov9740_reg_read(struct i2c_client *client, u16 reg, u8 *val) +{ + int ret; + struct i2c_msg msg[] = { + { + .addr = client->addr, + .flags = 0, + .len = 2, + .buf = (u8 *)®, + }, + { + .addr = client->addr, + .flags = I2C_M_RD, + .len = 1, + .buf = val, + }, + }; + + reg = swab16(reg); + + ret = i2c_transfer(client->adapter, msg, 2); + if (ret < 0) { + dev_err(&client->dev, "Failed reading register 0x%04x!\n", reg); + return ret; + } + + return 0; +} + +/* write a register */ +static int ov9740_reg_write(struct i2c_client *client, u16 reg, u8 val) +{ + struct i2c_msg msg; + struct { + u16 reg; + u8 val; + } __packed buf; + int ret; + + reg = swab16(reg); + + buf.reg = reg; + buf.val = val; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = 3; + msg.buf = (u8 *)&buf; + + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret < 0) { + dev_err(&client->dev, "Failed writing register 0x%04x!\n", reg); + return ret; + } + + return 0; +} + + +/* Read a register, alter its bits, write it back */ +static int ov9740_reg_rmw(struct i2c_client *client, u16 reg, u8 set, u8 unset) +{ + u8 val; + int ret; + + ret = ov9740_reg_read(client, reg, &val); + if (ret < 0) { + dev_err(&client->dev, + "[Read]-Modify-Write of register 0x%04x failed!\n", + reg); + return ret; + } + + val |= set; + val &= ~unset; + + ret = ov9740_reg_write(client, reg, val); + if (ret < 0) { + dev_err(&client->dev, + "Read-Modify-[Write] of register 0x%04x failed!\n", + reg); + return ret; + } + + return 0; +} + +static int ov9740_reg_write_array(struct i2c_client *client, + const struct ov9740_reg *regarray, + int regarraylen) +{ + int i; + int ret; + + for (i = 0; i < regarraylen; i++) { + ret = ov9740_reg_write(client, + regarray[i].reg, regarray[i].val); + if (ret < 0) + return ret; + } + + return 0; +} + +/* Start/Stop streaming from the device */ +static int ov9740_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov9740_priv *priv = to_ov9740(sd); + int ret; + + /* Program orientation register. */ + if (priv->flag_vflip) + ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x2, 0); + else + ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x2); + if (ret < 0) + return ret; + + if (priv->flag_hflip) + ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x1, 0); + else + ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x1); + if (ret < 0) + return ret; + + if (enable) { + dev_dbg(&client->dev, "Enabling Streaming\n"); + /* Start Streaming */ + ret = ov9740_reg_write(client, OV9740_MODE_SELECT, 0x01); + + } else { + dev_dbg(&client->dev, "Disabling Streaming\n"); + /* Software Reset */ + ret = ov9740_reg_write(client, OV9740_SOFTWARE_RESET, 0x01); + if (!ret) + /* Setting Streaming to Standby */ + ret = ov9740_reg_write(client, OV9740_MODE_SELECT, + 0x00); + } + + priv->current_enable = enable; + + return ret; +} + +/* select nearest higher resolution for capture */ +static void ov9740_res_roundup(u32 *width, u32 *height) +{ + /* Width must be a multiple of 4 pixels. */ + *width = ALIGN(*width, 4); + + /* Max resolution is 1280x720 (720p). */ + if (*width > OV9740_MAX_WIDTH) + *width = OV9740_MAX_WIDTH; + + if (*height > OV9740_MAX_HEIGHT) + *height = OV9740_MAX_HEIGHT; +} + +/* Setup registers according to resolution and color encoding */ +static int ov9740_set_res(struct i2c_client *client, u32 width, u32 height) +{ + u32 x_start; + u32 y_start; + u32 x_end; + u32 y_end; + bool scaling = false; + u32 scale_input_x; + u32 scale_input_y; + int ret; + + if ((width != OV9740_MAX_WIDTH) || (height != OV9740_MAX_HEIGHT)) + scaling = true; + + /* + * Try to use as much of the sensor area as possible when supporting + * smaller resolutions. Depending on the aspect ratio of the + * chosen resolution, we can either use the full width of the sensor, + * or the full height of the sensor (or both if the aspect ratio is + * the same as 1280x720. + */ + if ((OV9740_MAX_WIDTH * height) > (OV9740_MAX_HEIGHT * width)) { + scale_input_x = (OV9740_MAX_HEIGHT * width) / height; + scale_input_y = OV9740_MAX_HEIGHT; + } else { + scale_input_x = OV9740_MAX_WIDTH; + scale_input_y = (OV9740_MAX_WIDTH * height) / width; + } + + /* These describe the area of the sensor to use. */ + x_start = (OV9740_MAX_WIDTH - scale_input_x) / 2; + y_start = (OV9740_MAX_HEIGHT - scale_input_y) / 2; + x_end = x_start + scale_input_x - 1; + y_end = y_start + scale_input_y - 1; + + ret = ov9740_reg_write(client, OV9740_X_ADDR_START_HI, x_start >> 8); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_X_ADDR_START_LO, x_start & 0xff); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_HI, y_start >> 8); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_LO, y_start & 0xff); + if (ret) + goto done; + + ret = ov9740_reg_write(client, OV9740_X_ADDR_END_HI, x_end >> 8); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_X_ADDR_END_LO, x_end & 0xff); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_HI, y_end >> 8); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_LO, y_end & 0xff); + if (ret) + goto done; + + ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_HI, width >> 8); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_LO, width & 0xff); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_HI, height >> 8); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_LO, height & 0xff); + if (ret) + goto done; + + ret = ov9740_reg_write(client, OV9740_ISP_CTRL1E, scale_input_x >> 8); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_ISP_CTRL1F, scale_input_x & 0xff); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_ISP_CTRL20, scale_input_y >> 8); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_ISP_CTRL21, scale_input_y & 0xff); + if (ret) + goto done; + + ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_HI, + (scale_input_x - width) >> 8); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_LO, + (scale_input_x - width) & 0xff); + if (ret) + goto done; + + ret = ov9740_reg_write(client, OV9740_ISP_CTRL00, 0xff); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_ISP_CTRL01, 0xef | + (scaling << 4)); + if (ret) + goto done; + ret = ov9740_reg_write(client, OV9740_ISP_CTRL03, 0xff); + +done: + return ret; +} + +/* set the format we will capture in */ +static int ov9740_s_fmt(struct v4l2_subdev *sd, + struct v4l2_mbus_framefmt *mf) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov9740_priv *priv = to_ov9740(sd); + int ret; + + ret = ov9740_reg_write_array(client, ov9740_defaults, + ARRAY_SIZE(ov9740_defaults)); + if (ret < 0) + return ret; + + ret = ov9740_set_res(client, mf->width, mf->height); + if (ret < 0) + return ret; + + priv->current_mf = *mf; + return ret; +} + +static int ov9740_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *mf = &format->format; + + if (format->pad) + return -EINVAL; + + ov9740_res_roundup(&mf->width, &mf->height); + + mf->field = V4L2_FIELD_NONE; + mf->code = MEDIA_BUS_FMT_YUYV8_2X8; + mf->colorspace = V4L2_COLORSPACE_SRGB; + + if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) + return ov9740_s_fmt(sd, mf); + cfg->try_fmt = *mf; + return 0; +} + +static int ov9740_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->pad || code->index >= ARRAY_SIZE(ov9740_codes)) + return -EINVAL; + + code->code = ov9740_codes[code->index]; + + return 0; +} + +static int ov9740_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + switch (sel->target) { + case V4L2_SEL_TGT_CROP_BOUNDS: + case V4L2_SEL_TGT_CROP: + sel->r.left = 0; + sel->r.top = 0; + sel->r.width = OV9740_MAX_WIDTH; + sel->r.height = OV9740_MAX_HEIGHT; + return 0; + default: + return -EINVAL; + } +} + +/* Set status of additional camera capabilities */ +static int ov9740_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov9740_priv *priv = + container_of(ctrl->handler, struct ov9740_priv, hdl); + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + priv->flag_vflip = ctrl->val; + break; + case V4L2_CID_HFLIP: + priv->flag_hflip = ctrl->val; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int ov9740_s_power(struct v4l2_subdev *sd, int on) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + struct ov9740_priv *priv = to_ov9740(sd); + int ret; + + if (on) { + ret = soc_camera_power_on(&client->dev, ssdd, priv->clk); + if (ret < 0) + return ret; + + if (priv->current_enable) { + ov9740_s_fmt(sd, &priv->current_mf); + ov9740_s_stream(sd, 1); + } + } else { + if (priv->current_enable) { + ov9740_s_stream(sd, 0); + priv->current_enable = true; + } + + soc_camera_power_off(&client->dev, ssdd, priv->clk); + } + + return 0; +} + +#ifdef CONFIG_VIDEO_ADV_DEBUG +static int ov9740_get_register(struct v4l2_subdev *sd, + struct v4l2_dbg_register *reg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + u8 val; + + if (reg->reg & ~0xffff) + return -EINVAL; + + reg->size = 2; + + ret = ov9740_reg_read(client, reg->reg, &val); + if (ret) + return ret; + + reg->val = (__u64)val; + + return ret; +} + +static int ov9740_set_register(struct v4l2_subdev *sd, + const struct v4l2_dbg_register *reg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + if (reg->reg & ~0xffff || reg->val & ~0xff) + return -EINVAL; + + return ov9740_reg_write(client, reg->reg, reg->val); +} +#endif + +static int ov9740_video_probe(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov9740_priv *priv = to_ov9740(sd); + u8 modelhi, modello; + int ret; + + ret = ov9740_s_power(&priv->subdev, 1); + if (ret < 0) + return ret; + + /* + * check and show product ID and manufacturer ID + */ + ret = ov9740_reg_read(client, OV9740_MODEL_ID_HI, &modelhi); + if (ret < 0) + goto done; + + ret = ov9740_reg_read(client, OV9740_MODEL_ID_LO, &modello); + if (ret < 0) + goto done; + + priv->model = (modelhi << 8) | modello; + + ret = ov9740_reg_read(client, OV9740_REVISION_NUMBER, &priv->revision); + if (ret < 0) + goto done; + + ret = ov9740_reg_read(client, OV9740_MANUFACTURER_ID, &priv->manid); + if (ret < 0) + goto done; + + ret = ov9740_reg_read(client, OV9740_SMIA_VERSION, &priv->smiaver); + if (ret < 0) + goto done; + + if (priv->model != 0x9740) { + ret = -ENODEV; + goto done; + } + + dev_info(&client->dev, "ov9740 Model ID 0x%04x, Revision 0x%02x, Manufacturer 0x%02x, SMIA Version 0x%02x\n", + priv->model, priv->revision, priv->manid, priv->smiaver); + + ret = v4l2_ctrl_handler_setup(&priv->hdl); + +done: + ov9740_s_power(&priv->subdev, 0); + return ret; +} + +/* Request bus settings on camera side */ +static int ov9740_g_mbus_config(struct v4l2_subdev *sd, + struct v4l2_mbus_config *cfg) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + + cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER | + V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH | + V4L2_MBUS_DATA_ACTIVE_HIGH; + cfg->type = V4L2_MBUS_PARALLEL; + cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); + + return 0; +} + +static const struct v4l2_subdev_video_ops ov9740_video_ops = { + .s_stream = ov9740_s_stream, + .g_mbus_config = ov9740_g_mbus_config, +}; + +static const struct v4l2_subdev_core_ops ov9740_core_ops = { + .s_power = ov9740_s_power, +#ifdef CONFIG_VIDEO_ADV_DEBUG + .g_register = ov9740_get_register, + .s_register = ov9740_set_register, +#endif +}; + +static const struct v4l2_subdev_pad_ops ov9740_pad_ops = { + .enum_mbus_code = ov9740_enum_mbus_code, + .get_selection = ov9740_get_selection, + .set_fmt = ov9740_set_fmt, +}; + +static const struct v4l2_subdev_ops ov9740_subdev_ops = { + .core = &ov9740_core_ops, + .video = &ov9740_video_ops, + .pad = &ov9740_pad_ops, +}; + +static const struct v4l2_ctrl_ops ov9740_ctrl_ops = { + .s_ctrl = ov9740_s_ctrl, +}; + +/* + * i2c_driver function + */ +static int ov9740_probe(struct i2c_client *client, + const struct i2c_device_id *did) +{ + struct ov9740_priv *priv; + struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); + int ret; + + if (!ssdd) { + dev_err(&client->dev, "Missing platform_data for driver\n"); + return -EINVAL; + } + + priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + v4l2_i2c_subdev_init(&priv->subdev, client, &ov9740_subdev_ops); + v4l2_ctrl_handler_init(&priv->hdl, 13); + v4l2_ctrl_new_std(&priv->hdl, &ov9740_ctrl_ops, + V4L2_CID_VFLIP, 0, 1, 1, 0); + v4l2_ctrl_new_std(&priv->hdl, &ov9740_ctrl_ops, + V4L2_CID_HFLIP, 0, 1, 1, 0); + priv->subdev.ctrl_handler = &priv->hdl; + if (priv->hdl.error) + return priv->hdl.error; + + priv->clk = v4l2_clk_get(&client->dev, "mclk"); + if (IS_ERR(priv->clk)) { + ret = PTR_ERR(priv->clk); + goto eclkget; + } + + ret = ov9740_video_probe(client); + if (ret < 0) { + v4l2_clk_put(priv->clk); +eclkget: + v4l2_ctrl_handler_free(&priv->hdl); + } + + return ret; +} + +static int ov9740_remove(struct i2c_client *client) +{ + struct ov9740_priv *priv = i2c_get_clientdata(client); + + v4l2_clk_put(priv->clk); + v4l2_device_unregister_subdev(&priv->subdev); + v4l2_ctrl_handler_free(&priv->hdl); + return 0; +} + +static const struct i2c_device_id ov9740_id[] = { + { "ov9740", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ov9740_id); + +static struct i2c_driver ov9740_i2c_driver = { + .driver = { + .name = "ov9740", + }, + .probe = ov9740_probe, + .remove = ov9740_remove, + .id_table = ov9740_id, +}; + +module_i2c_driver(ov9740_i2c_driver); + +MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV9740"); +MODULE_AUTHOR("Andrew Chew <achew@nvidia.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/media/sunxi/cedrus/TODO b/drivers/staging/media/sunxi/cedrus/TODO index a951b3fd1ea1..ec277ece47af 100644 --- a/drivers/staging/media/sunxi/cedrus/TODO +++ b/drivers/staging/media/sunxi/cedrus/TODO @@ -5,8 +5,3 @@ Before this stateless decoder driver can leave the staging area: * Userspace support for the Request API needs to be reviewed; * Another stateless decoder driver should be submitted; * At least one stateless encoder driver should be submitted. -* When queueing a request containing references to I frames, the - refcount of the memory for those I frames needs to be incremented - and decremented when the request is completed. This will likely - require some help from vb2. The driver should fail the request - if the memory/buffer is gone. diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c index c912c70b3ef7..ff11cbeba205 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c @@ -72,10 +72,11 @@ static int cedrus_init_ctrls(struct cedrus_dev *dev, struct cedrus_ctx *ctx) ctrl_size = sizeof(ctrl) * CEDRUS_CONTROLS_COUNT + 1; ctx->ctrls = kzalloc(ctrl_size, GFP_KERNEL); - memset(ctx->ctrls, 0, ctrl_size); + if (!ctx->ctrls) + return -ENOMEM; for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) { - struct v4l2_ctrl_config cfg = { 0 }; + struct v4l2_ctrl_config cfg = {}; cfg.elem_size = cedrus_controls[i].elem_size; cfg.id = cedrus_controls[i].id; @@ -279,7 +280,6 @@ static int cedrus_probe(struct platform_device *pdev) dev->dec_ops[CEDRUS_CODEC_MPEG2] = &cedrus_dec_ops_mpeg2; mutex_init(&dev->dev_mutex); - spin_lock_init(&dev->irq_lock); ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); if (ret) { @@ -388,6 +388,14 @@ static const struct cedrus_variant sun8i_h3_cedrus_variant = { .capabilities = CEDRUS_CAPABILITY_UNTILED, }; +static const struct cedrus_variant sun50i_a64_cedrus_variant = { + .capabilities = CEDRUS_CAPABILITY_UNTILED, +}; + +static const struct cedrus_variant sun50i_h5_cedrus_variant = { + .capabilities = CEDRUS_CAPABILITY_UNTILED, +}; + static const struct of_device_id cedrus_dt_match[] = { { .compatible = "allwinner,sun4i-a10-video-engine", @@ -409,6 +417,14 @@ static const struct of_device_id cedrus_dt_match[] = { .compatible = "allwinner,sun8i-h3-video-engine", .data = &sun8i_h3_cedrus_variant, }, + { + .compatible = "allwinner,sun50i-a64-video-engine", + .data = &sun50i_a64_cedrus_variant, + }, + { + .compatible = "allwinner,sun50i-h5-video-engine", + .data = &sun50i_h5_cedrus_variant, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, cedrus_dt_match); @@ -418,7 +434,6 @@ static struct platform_driver cedrus_driver = { .remove = cedrus_remove, .driver = { .name = CEDRUS_NAME, - .owner = THIS_MODULE, .of_match_table = of_match_ptr(cedrus_dt_match), }, }; diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h index 3f61248c57ac..4aedd24a9848 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus.h @@ -105,8 +105,6 @@ struct cedrus_dev { /* Device file mutex */ struct mutex dev_mutex; - /* Interrupt spinlock */ - spinlock_t irq_lock; void __iomem *base; @@ -142,11 +140,14 @@ static inline dma_addr_t cedrus_buf_addr(struct vb2_buffer *buf, } static inline dma_addr_t cedrus_dst_buf_addr(struct cedrus_ctx *ctx, - unsigned int index, - unsigned int plane) + int index, unsigned int plane) { - struct vb2_buffer *buf = ctx->dst_bufs[index]; + struct vb2_buffer *buf; + if (index < 0) + return 0; + + buf = ctx->dst_bufs[index]; return buf ? cedrus_buf_addr(buf, &ctx->dst_fmt, plane) : 0; } diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c index e40180a33951..4d6d602cdde6 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c @@ -26,9 +26,8 @@ void cedrus_device_run(void *priv) { struct cedrus_ctx *ctx = priv; struct cedrus_dev *dev = ctx->dev; - struct cedrus_run run = { 0 }; + struct cedrus_run run = {}; struct media_request *src_req; - unsigned long flags; run.src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); run.dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); @@ -39,8 +38,6 @@ void cedrus_device_run(void *priv) if (src_req) v4l2_ctrl_request_setup(src_req, &ctx->hdl); - spin_lock_irqsave(&ctx->dev->irq_lock, flags); - switch (ctx->src_fmt.pixelformat) { case V4L2_PIX_FMT_MPEG2_SLICE: run.mpeg2.slice_params = cedrus_find_control_data(ctx, @@ -53,18 +50,14 @@ void cedrus_device_run(void *priv) break; } - dev->dec_ops[ctx->current_codec]->setup(ctx, &run); + v4l2_m2m_buf_copy_metadata(run.src, run.dst, true); - spin_unlock_irqrestore(&ctx->dev->irq_lock, flags); + dev->dec_ops[ctx->current_codec]->setup(ctx, &run); /* Complete request(s) controls if needed. */ if (src_req) v4l2_ctrl_request_complete(src_req, &ctx->hdl); - spin_lock_irqsave(&ctx->dev->irq_lock, flags); - dev->dec_ops[ctx->current_codec]->trigger(ctx); - - spin_unlock_irqrestore(&ctx->dev->irq_lock, flags); } diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.h b/drivers/staging/media/sunxi/cedrus/cedrus_dec.h index 4f423d3a1cad..d1ae7903677b 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.h @@ -16,12 +16,6 @@ #ifndef _CEDRUS_DEC_H_ #define _CEDRUS_DEC_H_ -extern const struct v4l2_ioctl_ops cedrus_ioctl_ops; - -void cedrus_device_work(struct work_struct *work); void cedrus_device_run(void *priv); -int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, - struct vb2_queue *dst_vq); - #endif diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c index 07520a2ce179..0acf219a8c91 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c @@ -98,23 +98,6 @@ void cedrus_dst_format_set(struct cedrus_dev *dev, } } -static irqreturn_t cedrus_bh(int irq, void *data) -{ - struct cedrus_dev *dev = data; - struct cedrus_ctx *ctx; - - ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev); - if (!ctx) { - v4l2_err(&dev->v4l2_dev, - "Instance released before the end of transaction\n"); - return IRQ_HANDLED; - } - - v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); - - return IRQ_HANDLED; -} - static irqreturn_t cedrus_irq(int irq, void *data) { struct cedrus_dev *dev = data; @@ -122,24 +105,17 @@ static irqreturn_t cedrus_irq(int irq, void *data) struct vb2_v4l2_buffer *src_buf, *dst_buf; enum vb2_buffer_state state; enum cedrus_irq_status status; - unsigned long flags; - - spin_lock_irqsave(&dev->irq_lock, flags); ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev); if (!ctx) { v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n"); - spin_unlock_irqrestore(&dev->irq_lock, flags); - return IRQ_NONE; } status = dev->dec_ops[ctx->current_codec]->irq_status(ctx); - if (status == CEDRUS_IRQ_NONE) { - spin_unlock_irqrestore(&dev->irq_lock, flags); + if (status == CEDRUS_IRQ_NONE) return IRQ_NONE; - } dev->dec_ops[ctx->current_codec]->irq_disable(ctx); dev->dec_ops[ctx->current_codec]->irq_clear(ctx); @@ -150,8 +126,6 @@ static irqreturn_t cedrus_irq(int irq, void *data) if (!src_buf || !dst_buf) { v4l2_err(&dev->v4l2_dev, "Missing source and/or destination buffers\n"); - spin_unlock_irqrestore(&dev->irq_lock, flags); - return IRQ_HANDLED; } @@ -163,9 +137,9 @@ static irqreturn_t cedrus_irq(int irq, void *data) v4l2_m2m_buf_done(src_buf, state); v4l2_m2m_buf_done(dst_buf, state); - spin_unlock_irqrestore(&dev->irq_lock, flags); + v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); - return IRQ_WAKE_THREAD; + return IRQ_HANDLED; } int cedrus_hw_probe(struct cedrus_dev *dev) @@ -183,15 +157,14 @@ int cedrus_hw_probe(struct cedrus_dev *dev) irq_dec = platform_get_irq(dev->pdev, 0); if (irq_dec <= 0) { - v4l2_err(&dev->v4l2_dev, "Failed to get IRQ\n"); + dev_err(dev->dev, "Failed to get IRQ\n"); return irq_dec; } - ret = devm_request_threaded_irq(dev->dev, irq_dec, cedrus_irq, - cedrus_bh, 0, dev_name(dev->dev), - dev); + ret = devm_request_irq(dev->dev, irq_dec, cedrus_irq, + 0, dev_name(dev->dev), dev); if (ret) { - v4l2_err(&dev->v4l2_dev, "Failed to request IRQ\n"); + dev_err(dev->dev, "Failed to request IRQ\n"); return ret; } @@ -209,21 +182,21 @@ int cedrus_hw_probe(struct cedrus_dev *dev) ret = of_reserved_mem_device_init(dev->dev); if (ret && ret != -ENODEV) { - v4l2_err(&dev->v4l2_dev, "Failed to reserve memory\n"); + dev_err(dev->dev, "Failed to reserve memory\n"); return ret; } ret = sunxi_sram_claim(dev->dev); if (ret) { - v4l2_err(&dev->v4l2_dev, "Failed to claim SRAM\n"); + dev_err(dev->dev, "Failed to claim SRAM\n"); goto err_mem; } dev->ahb_clk = devm_clk_get(dev->dev, "ahb"); if (IS_ERR(dev->ahb_clk)) { - v4l2_err(&dev->v4l2_dev, "Failed to get AHB clock\n"); + dev_err(dev->dev, "Failed to get AHB clock\n"); ret = PTR_ERR(dev->ahb_clk); goto err_sram; @@ -231,7 +204,7 @@ int cedrus_hw_probe(struct cedrus_dev *dev) dev->mod_clk = devm_clk_get(dev->dev, "mod"); if (IS_ERR(dev->mod_clk)) { - v4l2_err(&dev->v4l2_dev, "Failed to get MOD clock\n"); + dev_err(dev->dev, "Failed to get MOD clock\n"); ret = PTR_ERR(dev->mod_clk); goto err_sram; @@ -239,7 +212,7 @@ int cedrus_hw_probe(struct cedrus_dev *dev) dev->ram_clk = devm_clk_get(dev->dev, "ram"); if (IS_ERR(dev->ram_clk)) { - v4l2_err(&dev->v4l2_dev, "Failed to get RAM clock\n"); + dev_err(dev->dev, "Failed to get RAM clock\n"); ret = PTR_ERR(dev->ram_clk); goto err_sram; @@ -247,7 +220,7 @@ int cedrus_hw_probe(struct cedrus_dev *dev) dev->rstc = devm_reset_control_get(dev->dev, NULL); if (IS_ERR(dev->rstc)) { - v4l2_err(&dev->v4l2_dev, "Failed to get reset control\n"); + dev_err(dev->dev, "Failed to get reset control\n"); ret = PTR_ERR(dev->rstc); goto err_sram; @@ -256,7 +229,7 @@ int cedrus_hw_probe(struct cedrus_dev *dev) res = platform_get_resource(dev->pdev, IORESOURCE_MEM, 0); dev->base = devm_ioremap_resource(dev->dev, res); if (IS_ERR(dev->base)) { - v4l2_err(&dev->v4l2_dev, "Failed to map registers\n"); + dev_err(dev->dev, "Failed to map registers\n"); ret = PTR_ERR(dev->base); goto err_sram; @@ -264,35 +237,35 @@ int cedrus_hw_probe(struct cedrus_dev *dev) ret = clk_set_rate(dev->mod_clk, CEDRUS_CLOCK_RATE_DEFAULT); if (ret) { - v4l2_err(&dev->v4l2_dev, "Failed to set clock rate\n"); + dev_err(dev->dev, "Failed to set clock rate\n"); goto err_sram; } ret = clk_prepare_enable(dev->ahb_clk); if (ret) { - v4l2_err(&dev->v4l2_dev, "Failed to enable AHB clock\n"); + dev_err(dev->dev, "Failed to enable AHB clock\n"); goto err_sram; } ret = clk_prepare_enable(dev->mod_clk); if (ret) { - v4l2_err(&dev->v4l2_dev, "Failed to enable MOD clock\n"); + dev_err(dev->dev, "Failed to enable MOD clock\n"); goto err_ahb_clk; } ret = clk_prepare_enable(dev->ram_clk); if (ret) { - v4l2_err(&dev->v4l2_dev, "Failed to enable RAM clock\n"); + dev_err(dev->dev, "Failed to enable RAM clock\n"); goto err_mod_clk; } ret = reset_control_reset(dev->rstc); if (ret) { - v4l2_err(&dev->v4l2_dev, "Failed to apply reset\n"); + dev_err(dev->dev, "Failed to apply reset\n"); goto err_ram_clk; } diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c index 9abd39cae38c..13c34927bad5 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c @@ -82,7 +82,10 @@ static void cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) dma_addr_t fwd_luma_addr, fwd_chroma_addr; dma_addr_t bwd_luma_addr, bwd_chroma_addr; struct cedrus_dev *dev = ctx->dev; + struct vb2_queue *vq; const u8 *matrix; + int forward_idx; + int backward_idx; unsigned int i; u32 reg; @@ -157,22 +160,18 @@ static void cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) /* Forward and backward prediction reference buffers. */ - fwd_luma_addr = cedrus_dst_buf_addr(ctx, - slice_params->forward_ref_index, - 0); - fwd_chroma_addr = cedrus_dst_buf_addr(ctx, - slice_params->forward_ref_index, - 1); + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); + + forward_idx = vb2_find_timestamp(vq, slice_params->forward_ref_ts, 0); + fwd_luma_addr = cedrus_dst_buf_addr(ctx, forward_idx, 0); + fwd_chroma_addr = cedrus_dst_buf_addr(ctx, forward_idx, 1); cedrus_write(dev, VE_DEC_MPEG_FWD_REF_LUMA_ADDR, fwd_luma_addr); cedrus_write(dev, VE_DEC_MPEG_FWD_REF_CHROMA_ADDR, fwd_chroma_addr); - bwd_luma_addr = cedrus_dst_buf_addr(ctx, - slice_params->backward_ref_index, - 0); - bwd_chroma_addr = cedrus_dst_buf_addr(ctx, - slice_params->backward_ref_index, - 1); + backward_idx = vb2_find_timestamp(vq, slice_params->backward_ref_ts, 0); + bwd_luma_addr = cedrus_dst_buf_addr(ctx, backward_idx, 0); + bwd_chroma_addr = cedrus_dst_buf_addr(ctx, backward_idx, 1); cedrus_write(dev, VE_DEC_MPEG_BWD_REF_LUMA_ADDR, bwd_luma_addr); cedrus_write(dev, VE_DEC_MPEG_BWD_REF_CHROMA_ADDR, bwd_chroma_addr); diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c index 5c5fce678b93..b47854b3bce4 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c @@ -282,8 +282,13 @@ static int cedrus_s_fmt_vid_cap(struct file *file, void *priv, { struct cedrus_ctx *ctx = cedrus_file2ctx(file); struct cedrus_dev *dev = ctx->dev; + struct vb2_queue *vq; int ret; + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (vb2_is_busy(vq)) + return -EBUSY; + ret = cedrus_try_fmt_vid_cap(file, priv, f); if (ret) return ret; @@ -299,8 +304,13 @@ static int cedrus_s_fmt_vid_out(struct file *file, void *priv, struct v4l2_format *f) { struct cedrus_ctx *ctx = cedrus_file2ctx(file); + struct vb2_queue *vq; int ret; + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (vb2_is_busy(vq)) + return -EBUSY; + ret = cedrus_try_fmt_vid_out(file, priv, f); if (ret) return ret; @@ -380,18 +390,13 @@ static void cedrus_queue_cleanup(struct vb2_queue *vq, u32 state) { struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); struct vb2_v4l2_buffer *vbuf; - unsigned long flags; for (;;) { - spin_lock_irqsave(&ctx->dev->irq_lock, flags); - if (V4L2_TYPE_IS_OUTPUT(vq->type)) vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); else vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); - spin_unlock_irqrestore(&ctx->dev->irq_lock, flags); - if (!vbuf) return; @@ -421,6 +426,14 @@ static void cedrus_buf_cleanup(struct vb2_buffer *vb) ctx->dst_bufs[vb->index] = NULL; } +static int cedrus_buf_out_validate(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + + vbuf->field = V4L2_FIELD_NONE; + return 0; +} + static int cedrus_buf_prepare(struct vb2_buffer *vb) { struct vb2_queue *vq = vb->vb2_queue; @@ -498,6 +511,7 @@ static struct vb2_ops cedrus_qops = { .buf_init = cedrus_buf_init, .buf_cleanup = cedrus_buf_cleanup, .buf_queue = cedrus_buf_queue, + .buf_out_validate = cedrus_buf_out_validate, .buf_request_complete = cedrus_buf_request_complete, .start_streaming = cedrus_start_streaming, .stop_streaming = cedrus_stop_streaming, diff --git a/drivers/staging/media/tegra-vde/tegra-vde.c b/drivers/staging/media/tegra-vde/tegra-vde.c index 6f06061a40d9..aa6c6bba961e 100644 --- a/drivers/staging/media/tegra-vde/tegra-vde.c +++ b/drivers/staging/media/tegra-vde/tegra-vde.c @@ -35,14 +35,6 @@ #define BSE_ICMDQUE_EMPTY BIT(3) #define BSE_DMA_BUSY BIT(23) -#define VDE_WR(__data, __addr) \ -do { \ - dev_dbg(vde->miscdev.parent, \ - "%s: %d: 0x%08X => " #__addr ")\n", \ - __func__, __LINE__, (u32)(__data)); \ - writel_relaxed(__data, __addr); \ -} while (0) - struct video_frame { struct dma_buf_attachment *y_dmabuf_attachment; struct dma_buf_attachment *cb_dmabuf_attachment; @@ -81,12 +73,66 @@ struct tegra_vde { u32 *iram; }; +static __maybe_unused char const * +tegra_vde_reg_base_name(struct tegra_vde *vde, void __iomem *base) +{ + if (vde->sxe == base) + return "SXE"; + + if (vde->bsev == base) + return "BSEV"; + + if (vde->mbe == base) + return "MBE"; + + if (vde->ppe == base) + return "PPE"; + + if (vde->mce == base) + return "MCE"; + + if (vde->tfe == base) + return "TFE"; + + if (vde->ppb == base) + return "PPB"; + + if (vde->vdma == base) + return "VDMA"; + + if (vde->frameid == base) + return "FRAMEID"; + + return "???"; +} + +#define CREATE_TRACE_POINTS +#include "trace.h" + +static void tegra_vde_writel(struct tegra_vde *vde, + u32 value, void __iomem *base, u32 offset) +{ + trace_vde_writel(vde, base, offset, value); + + writel_relaxed(value, base + offset); +} + +static u32 tegra_vde_readl(struct tegra_vde *vde, + void __iomem *base, u32 offset) +{ + u32 value = readl_relaxed(base + offset); + + trace_vde_readl(vde, base, offset, value); + + return value; +} + static void tegra_vde_set_bits(struct tegra_vde *vde, - u32 mask, void __iomem *regs) + u32 mask, void __iomem *base, u32 offset) { - u32 value = readl_relaxed(regs); + u32 value = tegra_vde_readl(vde, base, offset); - VDE_WR(value | mask, regs); + tegra_vde_writel(vde, value | mask, base, offset); } static int tegra_vde_wait_mbe(struct tegra_vde *vde) @@ -107,8 +153,8 @@ static int tegra_vde_setup_mbe_frame_idx(struct tegra_vde *vde, unsigned int idx; int err; - VDE_WR(0xD0000000 | (0 << 23), vde->mbe + 0x80); - VDE_WR(0xD0200000 | (0 << 23), vde->mbe + 0x80); + tegra_vde_writel(vde, 0xD0000000 | (0 << 23), vde->mbe, 0x80); + tegra_vde_writel(vde, 0xD0200000 | (0 << 23), vde->mbe, 0x80); err = tegra_vde_wait_mbe(vde); if (err) @@ -118,8 +164,10 @@ static int tegra_vde_setup_mbe_frame_idx(struct tegra_vde *vde, return 0; for (idx = 0, frame_idx = 1; idx < refs_nb; idx++, frame_idx++) { - VDE_WR(0xD0000000 | (frame_idx << 23), vde->mbe + 0x80); - VDE_WR(0xD0200000 | (frame_idx << 23), vde->mbe + 0x80); + tegra_vde_writel(vde, 0xD0000000 | (frame_idx << 23), + vde->mbe, 0x80); + tegra_vde_writel(vde, 0xD0200000 | (frame_idx << 23), + vde->mbe, 0x80); frame_idx_enb_mask |= frame_idx << (6 * (idx % 4)); @@ -128,7 +176,7 @@ static int tegra_vde_setup_mbe_frame_idx(struct tegra_vde *vde, value |= (idx >> 2) << 24; value |= frame_idx_enb_mask; - VDE_WR(value, vde->mbe + 0x80); + tegra_vde_writel(vde, value, vde->mbe, 0x80); err = tegra_vde_wait_mbe(vde); if (err) @@ -143,8 +191,10 @@ static int tegra_vde_setup_mbe_frame_idx(struct tegra_vde *vde, static void tegra_vde_mbe_set_0xa_reg(struct tegra_vde *vde, int reg, u32 val) { - VDE_WR(0xA0000000 | (reg << 24) | (val & 0xFFFF), vde->mbe + 0x80); - VDE_WR(0xA0000000 | ((reg + 1) << 24) | (val >> 16), vde->mbe + 0x80); + tegra_vde_writel(vde, 0xA0000000 | (reg << 24) | (val & 0xFFFF), + vde->mbe, 0x80); + tegra_vde_writel(vde, 0xA0000000 | ((reg + 1) << 24) | (val >> 16), + vde->mbe, 0x80); } static int tegra_vde_wait_bsev(struct tegra_vde *vde, bool wait_dma) @@ -183,7 +233,7 @@ static int tegra_vde_wait_bsev(struct tegra_vde *vde, bool wait_dma) static int tegra_vde_push_to_bsev_icmdqueue(struct tegra_vde *vde, u32 value, bool wait_dma) { - VDE_WR(value, vde->bsev + ICMDQUE_WR); + tegra_vde_writel(vde, value, vde->bsev, ICMDQUE_WR); return tegra_vde_wait_bsev(vde, wait_dma); } @@ -199,11 +249,11 @@ static void tegra_vde_setup_frameid(struct tegra_vde *vde, u32 value1 = frame ? ((mbs_width << 16) | mbs_height) : 0; u32 value2 = frame ? ((((mbs_width + 1) >> 1) << 6) | 1) : 0; - VDE_WR(y_addr >> 8, vde->frameid + 0x000 + frameid * 4); - VDE_WR(cb_addr >> 8, vde->frameid + 0x100 + frameid * 4); - VDE_WR(cr_addr >> 8, vde->frameid + 0x180 + frameid * 4); - VDE_WR(value1, vde->frameid + 0x080 + frameid * 4); - VDE_WR(value2, vde->frameid + 0x280 + frameid * 4); + tegra_vde_writel(vde, y_addr >> 8, vde->frameid, 0x000 + frameid * 4); + tegra_vde_writel(vde, cb_addr >> 8, vde->frameid, 0x100 + frameid * 4); + tegra_vde_writel(vde, cr_addr >> 8, vde->frameid, 0x180 + frameid * 4); + tegra_vde_writel(vde, value1, vde->frameid, 0x080 + frameid * 4); + tegra_vde_writel(vde, value2, vde->frameid, 0x280 + frameid * 4); } static void tegra_setup_frameidx(struct tegra_vde *vde, @@ -228,8 +278,7 @@ static void tegra_vde_setup_iram_entry(struct tegra_vde *vde, { u32 *iram_tables = vde->iram; - dev_dbg(vde->miscdev.parent, "IRAM table %u: row %u: 0x%08X 0x%08X\n", - table, row, value1, value2); + trace_vde_setup_iram_entry(table, row, value1, value2); iram_tables[0x20 * table + row * 2] = value1; iram_tables[0x20 * table + row * 2 + 1] = value2; @@ -245,10 +294,7 @@ static void tegra_vde_setup_iram_tables(struct tegra_vde *vde, int with_later_poc_nb; unsigned int i, k; - dev_dbg(vde->miscdev.parent, "DPB: Frame 0: frame_num = %d\n", - dpb_frames[0].frame_num); - - dev_dbg(vde->miscdev.parent, "REF L0:\n"); + trace_vde_ref_l0(dpb_frames[0].frame_num); for (i = 0; i < 16; i++) { if (i < ref_frames_nb) { @@ -260,11 +306,6 @@ static void tegra_vde_setup_iram_tables(struct tegra_vde *vde, value |= !(frame->flags & FLAG_B_FRAME) << 25; value |= 1 << 24; value |= frame->frame_num; - - dev_dbg(vde->miscdev.parent, - "\tFrame %d: frame_num = %d B_frame = %d\n", - i + 1, frame->frame_num, - (frame->flags & FLAG_B_FRAME)); } else { aux_addr = 0x6ADEAD00; value = 0; @@ -284,9 +325,7 @@ static void tegra_vde_setup_iram_tables(struct tegra_vde *vde, with_later_poc_nb = ref_frames_nb - with_earlier_poc_nb; - dev_dbg(vde->miscdev.parent, - "REF L1: with_later_poc_nb %d with_earlier_poc_nb %d\n", - with_later_poc_nb, with_earlier_poc_nb); + trace_vde_ref_l1(with_later_poc_nb, with_earlier_poc_nb); for (i = 0, k = with_earlier_poc_nb; i < with_later_poc_nb; i++, k++) { frame = &dpb_frames[k + 1]; @@ -298,10 +337,6 @@ static void tegra_vde_setup_iram_tables(struct tegra_vde *vde, value |= 1 << 24; value |= frame->frame_num; - dev_dbg(vde->miscdev.parent, - "\tFrame %d: frame_num = %d\n", - k + 1, frame->frame_num); - tegra_vde_setup_iram_entry(vde, 2, i, value, aux_addr); } @@ -315,10 +350,6 @@ static void tegra_vde_setup_iram_tables(struct tegra_vde *vde, value |= 1 << 24; value |= frame->frame_num; - dev_dbg(vde->miscdev.parent, - "\tFrame %d: frame_num = %d\n", - k + 1, frame->frame_num); - tegra_vde_setup_iram_entry(vde, 2, i, value, aux_addr); } } @@ -334,32 +365,32 @@ static int tegra_vde_setup_hw_context(struct tegra_vde *vde, u32 value; int err; - tegra_vde_set_bits(vde, 0x000A, vde->sxe + 0xF0); - tegra_vde_set_bits(vde, 0x000B, vde->bsev + CMDQUE_CONTROL); - tegra_vde_set_bits(vde, 0x8002, vde->mbe + 0x50); - tegra_vde_set_bits(vde, 0x000A, vde->mbe + 0xA0); - tegra_vde_set_bits(vde, 0x000A, vde->ppe + 0x14); - tegra_vde_set_bits(vde, 0x000A, vde->ppe + 0x28); - tegra_vde_set_bits(vde, 0x0A00, vde->mce + 0x08); - tegra_vde_set_bits(vde, 0x000A, vde->tfe + 0x00); - tegra_vde_set_bits(vde, 0x0005, vde->vdma + 0x04); - - VDE_WR(0x00000000, vde->vdma + 0x1C); - VDE_WR(0x00000000, vde->vdma + 0x00); - VDE_WR(0x00000007, vde->vdma + 0x04); - VDE_WR(0x00000007, vde->frameid + 0x200); - VDE_WR(0x00000005, vde->tfe + 0x04); - VDE_WR(0x00000000, vde->mbe + 0x84); - VDE_WR(0x00000010, vde->sxe + 0x08); - VDE_WR(0x00000150, vde->sxe + 0x54); - VDE_WR(0x0000054C, vde->sxe + 0x58); - VDE_WR(0x00000E34, vde->sxe + 0x5C); - VDE_WR(0x063C063C, vde->mce + 0x10); - VDE_WR(0x0003FC00, vde->bsev + INTR_STATUS); - VDE_WR(0x0000150D, vde->bsev + BSE_CONFIG); - VDE_WR(0x00000100, vde->bsev + BSE_INT_ENB); - VDE_WR(0x00000000, vde->bsev + 0x98); - VDE_WR(0x00000060, vde->bsev + 0x9C); + tegra_vde_set_bits(vde, 0x000A, vde->sxe, 0xF0); + tegra_vde_set_bits(vde, 0x000B, vde->bsev, CMDQUE_CONTROL); + tegra_vde_set_bits(vde, 0x8002, vde->mbe, 0x50); + tegra_vde_set_bits(vde, 0x000A, vde->mbe, 0xA0); + tegra_vde_set_bits(vde, 0x000A, vde->ppe, 0x14); + tegra_vde_set_bits(vde, 0x000A, vde->ppe, 0x28); + tegra_vde_set_bits(vde, 0x0A00, vde->mce, 0x08); + tegra_vde_set_bits(vde, 0x000A, vde->tfe, 0x00); + tegra_vde_set_bits(vde, 0x0005, vde->vdma, 0x04); + + tegra_vde_writel(vde, 0x00000000, vde->vdma, 0x1C); + tegra_vde_writel(vde, 0x00000000, vde->vdma, 0x00); + tegra_vde_writel(vde, 0x00000007, vde->vdma, 0x04); + tegra_vde_writel(vde, 0x00000007, vde->frameid, 0x200); + tegra_vde_writel(vde, 0x00000005, vde->tfe, 0x04); + tegra_vde_writel(vde, 0x00000000, vde->mbe, 0x84); + tegra_vde_writel(vde, 0x00000010, vde->sxe, 0x08); + tegra_vde_writel(vde, 0x00000150, vde->sxe, 0x54); + tegra_vde_writel(vde, 0x0000054C, vde->sxe, 0x58); + tegra_vde_writel(vde, 0x00000E34, vde->sxe, 0x5C); + tegra_vde_writel(vde, 0x063C063C, vde->mce, 0x10); + tegra_vde_writel(vde, 0x0003FC00, vde->bsev, INTR_STATUS); + tegra_vde_writel(vde, 0x0000150D, vde->bsev, BSE_CONFIG); + tegra_vde_writel(vde, 0x00000100, vde->bsev, BSE_INT_ENB); + tegra_vde_writel(vde, 0x00000000, vde->bsev, 0x98); + tegra_vde_writel(vde, 0x00000060, vde->bsev, 0x9C); memset(vde->iram + 128, 0, macroblocks_nb / 2); @@ -376,13 +407,13 @@ static int tegra_vde_setup_hw_context(struct tegra_vde *vde, */ wmb(); - VDE_WR(0x00000000, vde->bsev + 0x8C); - VDE_WR(bitstream_data_addr + bitstream_data_size, - vde->bsev + 0x54); + tegra_vde_writel(vde, 0x00000000, vde->bsev, 0x8C); + tegra_vde_writel(vde, bitstream_data_addr + bitstream_data_size, + vde->bsev, 0x54); value = ctx->pic_width_in_mbs << 11 | ctx->pic_height_in_mbs << 3; - VDE_WR(value, vde->bsev + 0x88); + tegra_vde_writel(vde, value, vde->bsev, 0x88); err = tegra_vde_wait_bsev(vde, false); if (err) @@ -417,7 +448,7 @@ static int tegra_vde_setup_hw_context(struct tegra_vde *vde, value |= ctx->pic_width_in_mbs << 11; value |= ctx->pic_height_in_mbs << 3; - VDE_WR(value, vde->sxe + 0x10); + tegra_vde_writel(vde, value, vde->sxe, 0x10); value = !ctx->baseline_profile << 17; value |= ctx->level_idc << 13; @@ -425,54 +456,54 @@ static int tegra_vde_setup_hw_context(struct tegra_vde *vde, value |= ctx->pic_order_cnt_type << 5; value |= ctx->log2_max_frame_num; - VDE_WR(value, vde->sxe + 0x40); + tegra_vde_writel(vde, value, vde->sxe, 0x40); value = ctx->pic_init_qp << 25; value |= !!(ctx->deblocking_filter_control_present_flag) << 2; value |= !!ctx->pic_order_present_flag; - VDE_WR(value, vde->sxe + 0x44); + tegra_vde_writel(vde, value, vde->sxe, 0x44); value = ctx->chroma_qp_index_offset; value |= ctx->num_ref_idx_l0_active_minus1 << 5; value |= ctx->num_ref_idx_l1_active_minus1 << 10; value |= !!ctx->constrained_intra_pred_flag << 15; - VDE_WR(value, vde->sxe + 0x48); + tegra_vde_writel(vde, value, vde->sxe, 0x48); value = 0x0C000000; value |= !!(dpb_frames[0].flags & FLAG_B_FRAME) << 24; - VDE_WR(value, vde->sxe + 0x4C); + tegra_vde_writel(vde, value, vde->sxe, 0x4C); value = 0x03800000; value |= bitstream_data_size & GENMASK(19, 15); - VDE_WR(value, vde->sxe + 0x68); + tegra_vde_writel(vde, value, vde->sxe, 0x68); - VDE_WR(bitstream_data_addr, vde->sxe + 0x6C); + tegra_vde_writel(vde, bitstream_data_addr, vde->sxe, 0x6C); value = 0x10000005; value |= ctx->pic_width_in_mbs << 11; value |= ctx->pic_height_in_mbs << 3; - VDE_WR(value, vde->mbe + 0x80); + tegra_vde_writel(vde, value, vde->mbe, 0x80); value = 0x26800000; value |= ctx->level_idc << 4; value |= !ctx->baseline_profile << 1; value |= !!ctx->direct_8x8_inference_flag; - VDE_WR(value, vde->mbe + 0x80); + tegra_vde_writel(vde, value, vde->mbe, 0x80); - VDE_WR(0xF4000001, vde->mbe + 0x80); - VDE_WR(0x20000000, vde->mbe + 0x80); - VDE_WR(0xF4000101, vde->mbe + 0x80); + tegra_vde_writel(vde, 0xF4000001, vde->mbe, 0x80); + tegra_vde_writel(vde, 0x20000000, vde->mbe, 0x80); + tegra_vde_writel(vde, 0xF4000101, vde->mbe, 0x80); value = 0x20000000; value |= ctx->chroma_qp_index_offset << 8; - VDE_WR(value, vde->mbe + 0x80); + tegra_vde_writel(vde, value, vde->mbe, 0x80); err = tegra_vde_setup_mbe_frame_idx(vde, ctx->dpb_frames_nb - 1, @@ -494,7 +525,7 @@ static int tegra_vde_setup_hw_context(struct tegra_vde *vde, if (!ctx->baseline_profile) value |= !!(dpb_frames[0].flags & FLAG_REFERENCE) << 1; - VDE_WR(value, vde->mbe + 0x80); + tegra_vde_writel(vde, value, vde->mbe, 0x80); err = tegra_vde_wait_mbe(vde); if (err) { @@ -510,8 +541,9 @@ static void tegra_vde_decode_frame(struct tegra_vde *vde, { reinit_completion(&vde->decode_completion); - VDE_WR(0x00000001, vde->bsev + 0x8C); - VDE_WR(0x20000000 | (macroblocks_nb - 1), vde->sxe + 0x00); + tegra_vde_writel(vde, 0x00000001, vde->bsev, 0x8C); + tegra_vde_writel(vde, 0x20000000 | (macroblocks_nb - 1), + vde->sxe, 0x00); } static void tegra_vde_detach_and_put_dmabuf(struct dma_buf_attachment *a, @@ -883,8 +915,8 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde, timeout = wait_for_completion_interruptible_timeout( &vde->decode_completion, msecs_to_jiffies(1000)); if (timeout == 0) { - bsev_ptr = readl_relaxed(vde->bsev + 0x10); - macroblocks_nb = readl_relaxed(vde->sxe + 0xC8) & 0x1FFF; + bsev_ptr = tegra_vde_readl(vde, vde->bsev, 0x10); + macroblocks_nb = tegra_vde_readl(vde, vde->sxe, 0xC8) & 0x1FFF; read_bytes = bsev_ptr ? bsev_ptr - bitstream_data_addr : 0; dev_err(dev, "Decoding failed: read 0x%X bytes, %u macroblocks parsed\n", @@ -962,7 +994,7 @@ static irqreturn_t tegra_vde_isr(int irq, void *data) if (completion_done(&vde->decode_completion)) return IRQ_NONE; - tegra_vde_set_bits(vde, 0, vde->frameid + 0x208); + tegra_vde_set_bits(vde, 0, vde->frameid, 0x208); complete(&vde->decode_completion); return IRQ_HANDLED; diff --git a/drivers/staging/media/tegra-vde/trace.h b/drivers/staging/media/tegra-vde/trace.h new file mode 100644 index 000000000000..85e2f7e2d4d0 --- /dev/null +++ b/drivers/staging/media/tegra-vde/trace.h @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM tegra_vde + +#if !defined(TEGRA_VDE_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) +#define TEGRA_VDE_TRACE_H + +#include <linux/tracepoint.h> + +DECLARE_EVENT_CLASS(register_access, + TP_PROTO(struct tegra_vde *vde, void __iomem *base, + u32 offset, u32 value), + TP_ARGS(vde, base, offset, value), + TP_STRUCT__entry( + __string(hw_name, tegra_vde_reg_base_name(vde, base)) + __field(u32, offset) + __field(u32, value) + ), + TP_fast_assign( + __assign_str(hw_name, tegra_vde_reg_base_name(vde, base)); + __entry->offset = offset; + __entry->value = value; + ), + TP_printk("%s:0x%03x 0x%08x", __get_str(hw_name), __entry->offset, + __entry->value) +); + +DEFINE_EVENT(register_access, vde_writel, + TP_PROTO(struct tegra_vde *vde, void __iomem *base, + u32 offset, u32 value), + TP_ARGS(vde, base, offset, value)); +DEFINE_EVENT(register_access, vde_readl, + TP_PROTO(struct tegra_vde *vde, void __iomem *base, + u32 offset, u32 value), + TP_ARGS(vde, base, offset, value)); + +TRACE_EVENT(vde_setup_iram_entry, + TP_PROTO(unsigned int table, unsigned int row, u32 value, u32 aux_addr), + TP_ARGS(table, row, value, aux_addr), + TP_STRUCT__entry( + __field(unsigned int, table) + __field(unsigned int, row) + __field(u32, value) + __field(u32, aux_addr) + ), + TP_fast_assign( + __entry->table = table; + __entry->row = row; + __entry->value = value; + __entry->aux_addr = aux_addr; + ), + TP_printk("[%u][%u] = { 0x%08x (flags = \"%s\", frame_num = %u); 0x%08x }", + __entry->table, __entry->row, __entry->value, + __print_flags(__entry->value, " ", { (1 << 25), "B" }), + __entry->value & 0x7FFFFF, __entry->aux_addr) +); + +TRACE_EVENT(vde_ref_l0, + TP_PROTO(unsigned int frame_num), + TP_ARGS(frame_num), + TP_STRUCT__entry( + __field(unsigned int, frame_num) + ), + TP_fast_assign( + __entry->frame_num = frame_num; + ), + TP_printk("REF L0: DPB: Frame 0: frame_num = %u", __entry->frame_num) +); + +TRACE_EVENT(vde_ref_l1, + TP_PROTO(unsigned int with_later_poc_nb, + unsigned int with_earlier_poc_nb), + TP_ARGS(with_later_poc_nb, with_earlier_poc_nb), + TP_STRUCT__entry( + __field(unsigned int, with_later_poc_nb) + __field(unsigned int, with_earlier_poc_nb) + ), + TP_fast_assign( + __entry->with_later_poc_nb = with_later_poc_nb; + __entry->with_earlier_poc_nb = with_earlier_poc_nb; + ), + TP_printk("REF L1: with_later_poc_nb %u, with_earlier_poc_nb %u", + __entry->with_later_poc_nb, __entry->with_earlier_poc_nb) +); + +#endif /* TEGRA_VDE_TRACE_H */ + +/* This part must be outside protection */ +#undef TRACE_INCLUDE_PATH +#define TRACE_INCLUDE_PATH ../../drivers/staging/media/tegra-vde +#define TRACE_INCLUDE_FILE trace +#include <trace/define_trace.h> diff --git a/drivers/staging/media/tegra-vde/uapi.h b/drivers/staging/media/tegra-vde/uapi.h index a50c7bcae057..4bce08a7a54c 100644 --- a/drivers/staging/media/tegra-vde/uapi.h +++ b/drivers/staging/media/tegra-vde/uapi.h @@ -13,8 +13,8 @@ #include <linux/types.h> #include <asm/ioctl.h> -#define FLAG_B_FRAME (1 << 0) -#define FLAG_REFERENCE (1 << 1) +#define FLAG_B_FRAME BIT(0) +#define FLAG_REFERENCE BIT(1) struct tegra_vde_h264_frame { __s32 y_fd; diff --git a/drivers/staging/media/zoran/zoran.h b/drivers/staging/media/zoran/zoran.h index 9bb3c21aa275..e84fb604a689 100644 --- a/drivers/staging/media/zoran/zoran.h +++ b/drivers/staging/media/zoran/zoran.h @@ -35,7 +35,7 @@ struct zoran_sync { unsigned long frame; /* number of buffer that has been free'd */ unsigned long length; /* number of code bytes in buffer (capture only) */ unsigned long seq; /* frame sequence number */ - struct timeval timestamp; /* timestamp */ + u64 ts; /* timestamp */ }; diff --git a/drivers/staging/media/zoran/zoran_card.c b/drivers/staging/media/zoran/zoran_card.c index 94dadbba7cd5..ea10523194e8 100644 --- a/drivers/staging/media/zoran/zoran_card.c +++ b/drivers/staging/media/zoran/zoran_card.c @@ -1470,7 +1470,7 @@ static int __init zoran_init(void) v4l_nbufs = 2; if (v4l_nbufs > VIDEO_MAX_FRAME) v4l_nbufs = VIDEO_MAX_FRAME; - /* The user specfies the in KB, we want them in byte + /* The user specifies the in KB, we want them in byte * (and page aligned) */ v4l_bufsize = PAGE_ALIGN(v4l_bufsize * 1024); if (v4l_bufsize < 32768) diff --git a/drivers/staging/media/zoran/zoran_device.c b/drivers/staging/media/zoran/zoran_device.c index 40adceebca7e..22b27632762d 100644 --- a/drivers/staging/media/zoran/zoran_device.c +++ b/drivers/staging/media/zoran/zoran_device.c @@ -612,7 +612,7 @@ zr36057_set_memgrab (struct zoran *zr, zr->v4l_memgrab_active = 0; zr->v4l_grab_frame = NO_GRAB_ACTIVE; - /* reenable grabbing to screen if it was running */ + /* re-enable grabbing to screen if it was running */ if (zr->v4l_overlay_active) { zr36057_overlay(zr, 1); } else { @@ -1151,7 +1151,7 @@ zoran_reap_stat_com (struct zoran *zr) } frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME]; buffer = &zr->jpg_buffers.buffer[frame]; - v4l2_get_timestamp(&buffer->bs.timestamp); + buffer->bs.ts = ktime_get_ns(); if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) { buffer->bs.length = (stat_com & 0x7fffff) >> 1; @@ -1389,7 +1389,7 @@ zoran_irq (int irq, zr->v4l_buffers.buffer[zr->v4l_grab_frame].state = BUZ_STATE_DONE; zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.seq = zr->v4l_grab_seq; - v4l2_get_timestamp(&zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.timestamp); + zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.ts = ktime_get_ns(); zr->v4l_grab_frame = NO_GRAB_ACTIVE; zr->v4l_pend_tail++; } diff --git a/drivers/staging/media/zoran/zoran_driver.c b/drivers/staging/media/zoran/zoran_driver.c index 27c76e2eeb41..04f88f9d6bb4 100644 --- a/drivers/staging/media/zoran/zoran_driver.c +++ b/drivers/staging/media/zoran/zoran_driver.c @@ -1354,7 +1354,7 @@ static int zoran_v4l2_buffer_status(struct zoran_fh *fh, fh->buffers.buffer[num].state == BUZ_STATE_USER) { buf->sequence = fh->buffers.buffer[num].bs.seq; buf->flags |= V4L2_BUF_FLAG_DONE; - buf->timestamp = fh->buffers.buffer[num].bs.timestamp; + buf->timestamp = ns_to_timeval(fh->buffers.buffer[num].bs.ts); } else { buf->flags |= V4L2_BUF_FLAG_QUEUED; } @@ -1388,7 +1388,7 @@ static int zoran_v4l2_buffer_status(struct zoran_fh *fh, if (fh->buffers.buffer[num].state == BUZ_STATE_DONE || fh->buffers.buffer[num].state == BUZ_STATE_USER) { buf->sequence = fh->buffers.buffer[num].bs.seq; - buf->timestamp = fh->buffers.buffer[num].bs.timestamp; + buf->timestamp = ns_to_timeval(fh->buffers.buffer[num].bs.ts); buf->bytesused = fh->buffers.buffer[num].bs.length; buf->flags |= V4L2_BUF_FLAG_DONE; } else { diff --git a/drivers/staging/most/Documentation/driver_usage.txt b/drivers/staging/most/Documentation/driver_usage.txt index bb9b4e870199..da7a8f405b9b 100644 --- a/drivers/staging/most/Documentation/driver_usage.txt +++ b/drivers/staging/most/Documentation/driver_usage.txt @@ -142,8 +142,9 @@ Cdev component example: Sound component example: -The sound component needs an additional parameter to determine the audio -resolution that is going to be used. The following formats are available: +The sound component needs additional parameters to determine the audio +resolution that is going to be used and to trigger the registration of a +sound card with ALSA. The following audio formats are available: - "1x8" (Mono) - "2x16" (16-bit stereo) @@ -151,9 +152,18 @@ resolution that is going to be used. The following formats are available: - "2x32" (32-bit stereo) - "6x16" (16-bit surround 5.1) - $ echo "mdev0:ep_81:sound:most51_playback.6x16" >$(DRV_DIR)/add_link +To make the sound module create a sound card and register it with ALSA the +string "create" needs to be attached to the module parameter section of the +configuration string. To create a sound card with with two playback devices +(linked to channel ep01 and ep02) and one capture device (linked to channel +ep83) the following is written to the add_link file: + $ echo "mdev0:ep01:sound:most51_playback.6x16" >$(DRV_DIR)/add_link + $ echo "mdev0:ep02:sound:most_playback.2x16" >$(DRV_DIR)/add_link + $ echo "mdev0:ep83:sound:most_capture.2x16.create" >$(DRV_DIR)/add_link +The link names (most51_playback, most_playback and most_capture) will +become the names of the PCM devices of the sound card. Section 2.3 USB Padding diff --git a/drivers/staging/most/Makefile b/drivers/staging/most/Makefile index f8bcf488ecf2..c7662f65f6db 100644 --- a/drivers/staging/most/Makefile +++ b/drivers/staging/most/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_MOST) += most_core.o most_core-y := core.o -ccflags-y += -Idrivers/staging/ +ccflags-y += -I $(srctree)/drivers/staging/ obj-$(CONFIG_MOST_CDEV) += cdev/ obj-$(CONFIG_MOST_NET) += net/ diff --git a/drivers/staging/most/cdev/Makefile b/drivers/staging/most/cdev/Makefile index afb9870eb50f..21b0bd72c01d 100644 --- a/drivers/staging/most/cdev/Makefile +++ b/drivers/staging/most/cdev/Makefile @@ -1,4 +1,4 @@ obj-$(CONFIG_MOST_CDEV) += most_cdev.o most_cdev-objs := cdev.o -ccflags-y += -Idrivers/staging/ +ccflags-y += -I $(srctree)/drivers/staging/ diff --git a/drivers/staging/most/cdev/cdev.c b/drivers/staging/most/cdev/cdev.c index ea64aabda94e..f2b347cda8b7 100644 --- a/drivers/staging/most/cdev/cdev.c +++ b/drivers/staging/most/cdev/cdev.c @@ -453,7 +453,9 @@ static int comp_probe(struct most_interface *iface, int channel_id, c->devno = MKDEV(comp.major, current_minor); cdev_init(&c->cdev, &channel_fops); c->cdev.owner = THIS_MODULE; - cdev_add(&c->cdev, c->devno, 1); + retval = cdev_add(&c->cdev, c->devno, 1); + if (retval < 0) + goto err_free_c; c->iface = iface; c->cfg = cfg; c->channel_id = channel_id; @@ -485,6 +487,7 @@ err_free_kfifo_and_del_list: list_del(&c->list); err_del_cdev_and_free_channel: cdev_del(&c->cdev); +err_free_c: kfree(c); err_remove_ida: ida_simple_remove(&comp.minor_id, current_minor); diff --git a/drivers/staging/most/core.c b/drivers/staging/most/core.c index 18936cdb1083..956daf8c3bd2 100644 --- a/drivers/staging/most/core.c +++ b/drivers/staging/most/core.c @@ -1431,7 +1431,7 @@ int most_register_interface(struct most_interface *iface) INIT_LIST_HEAD(&iface->p->channel_list); iface->p->dev_id = id; - snprintf(iface->p->name, STRING_SIZE, "mdev%d", id); + strcpy(iface->p->name, iface->description); iface->dev.init_name = iface->p->name; iface->dev.bus = &mc.bus; iface->dev.parent = &mc.dev; diff --git a/drivers/staging/most/dim2/Makefile b/drivers/staging/most/dim2/Makefile index 66676f5907ee..6d15f045a767 100644 --- a/drivers/staging/most/dim2/Makefile +++ b/drivers/staging/most/dim2/Makefile @@ -1,4 +1,4 @@ obj-$(CONFIG_MOST_DIM2) += most_dim2.o most_dim2-objs := dim2.o hal.o sysfs.o -ccflags-y += -Idrivers/staging/ +ccflags-y += -I $(srctree)/drivers/staging/ diff --git a/drivers/staging/most/i2c/Makefile b/drivers/staging/most/i2c/Makefile index a7d094c1e1c2..c032fea979b3 100644 --- a/drivers/staging/most/i2c/Makefile +++ b/drivers/staging/most/i2c/Makefile @@ -1,4 +1,4 @@ obj-$(CONFIG_MOST_I2C) += most_i2c.o most_i2c-objs := i2c.o -ccflags-y += -Idrivers/staging/ +ccflags-y += -I $(srctree)/drivers/staging/ diff --git a/drivers/staging/most/net/Makefile b/drivers/staging/most/net/Makefile index 54500aa77be8..820faec6b296 100644 --- a/drivers/staging/most/net/Makefile +++ b/drivers/staging/most/net/Makefile @@ -1,4 +1,4 @@ obj-$(CONFIG_MOST_NET) += most_net.o most_net-objs := net.o -ccflags-y += -Idrivers/staging/ +ccflags-y += -I $(srctree)/drivers/staging/ diff --git a/drivers/staging/most/sound/Makefile b/drivers/staging/most/sound/Makefile index eee8774e38cb..5bb55bb108fb 100644 --- a/drivers/staging/most/sound/Makefile +++ b/drivers/staging/most/sound/Makefile @@ -1,4 +1,4 @@ obj-$(CONFIG_MOST_SOUND) += most_sound.o most_sound-objs := sound.o -ccflags-y += -Idrivers/staging/ +ccflags-y += -I $(srctree)/drivers/staging/ diff --git a/drivers/staging/most/sound/sound.c b/drivers/staging/most/sound/sound.c index 89b02fc305b8..79ab3a78c5ec 100644 --- a/drivers/staging/most/sound/sound.c +++ b/drivers/staging/most/sound/sound.c @@ -10,6 +10,7 @@ #include <linux/module.h> #include <linux/printk.h> #include <linux/kernel.h> +#include <linux/slab.h> #include <linux/init.h> #include <sound/core.h> #include <sound/pcm.h> @@ -20,7 +21,6 @@ #define DRIVER_NAME "sound" -static struct list_head dev_list; static struct core_component comp; /** @@ -56,6 +56,17 @@ struct channel { void (*copy_fn)(void *alsa, void *most, unsigned int bytes); }; +struct sound_adapter { + struct list_head dev_list; + struct most_interface *iface; + struct snd_card *card; + struct list_head list; + bool registered; + int pcm_dev_idx; +}; + +static struct list_head adpt_list; + #define MOST_PCM_INFO (SNDRV_PCM_INFO_MMAP | \ SNDRV_PCM_INFO_MMAP_VALID | \ SNDRV_PCM_INFO_BATCH | \ @@ -157,9 +168,10 @@ static void most_to_alsa_copy32(void *alsa, void *most, unsigned int bytes) static struct channel *get_channel(struct most_interface *iface, int channel_id) { + struct sound_adapter *adpt = iface->priv; struct channel *channel, *tmp; - list_for_each_entry_safe(channel, tmp, &dev_list, list) { + list_for_each_entry_safe(channel, tmp, &adpt->dev_list, list) { if ((channel->iface == iface) && (channel->id == channel_id)) return channel; } @@ -459,14 +471,14 @@ static const struct snd_pcm_ops pcm_ops = { .page = snd_pcm_lib_get_vmalloc_page, }; -static int split_arg_list(char *buf, char **card_name, u16 *ch_num, - char **sample_res) +static int split_arg_list(char *buf, char **device_name, u16 *ch_num, + char **sample_res, u8 *create) { char *num; int ret; - *card_name = strsep(&buf, "."); - if (!*card_name) { + *device_name = strsep(&buf, "."); + if (!*device_name) { pr_err("Missing sound card name\n"); return -EIO; } @@ -479,6 +491,9 @@ static int split_arg_list(char *buf, char **card_name, u16 *ch_num, *sample_res = strsep(&buf, ".\n"); if (!*sample_res) goto err; + + if (buf && !strcmp(buf, "create")) + *create = 1; return 0; err: @@ -536,6 +551,20 @@ found: return 0; } +static void release_adapter(struct sound_adapter *adpt) +{ + struct channel *channel, *tmp; + + list_for_each_entry_safe(channel, tmp, &adpt->dev_list, list) { + list_del(&channel->list); + kfree(channel); + } + if (adpt->card) + snd_card_free(adpt->card); + list_del(&adpt->list); + kfree(adpt); +} + /** * audio_probe_channel - probe function of the driver module * @iface: pointer to interface instance @@ -553,14 +582,15 @@ static int audio_probe_channel(struct most_interface *iface, int channel_id, char *arg_list) { struct channel *channel; - struct snd_card *card; + struct sound_adapter *adpt; struct snd_pcm *pcm; int playback_count = 0; int capture_count = 0; int ret; int direction; - char *card_name; + char *device_name; u16 ch_num; + u8 create = 0; char *sample_res; if (!iface) @@ -571,6 +601,38 @@ static int audio_probe_channel(struct most_interface *iface, int channel_id, return -EINVAL; } + ret = split_arg_list(arg_list, &device_name, &ch_num, &sample_res, + &create); + if (ret < 0) + return ret; + + list_for_each_entry(adpt, &adpt_list, list) { + if (adpt->iface != iface) + continue; + if (adpt->registered) + return -ENOSPC; + adpt->pcm_dev_idx++; + goto skip_adpt_alloc; + } + adpt = kzalloc(sizeof(*adpt), GFP_KERNEL); + if (!adpt) + return -ENOMEM; + + adpt->iface = iface; + INIT_LIST_HEAD(&adpt->dev_list); + iface->priv = adpt; + list_add_tail(&adpt->list, &adpt_list); + ret = snd_card_new(&iface->dev, -1, "INIC", THIS_MODULE, + sizeof(*channel), &adpt->card); + if (ret < 0) + goto err_free_adpt; + snprintf(adpt->card->driver, sizeof(adpt->card->driver), + "%s", DRIVER_NAME); + snprintf(adpt->card->shortname, sizeof(adpt->card->shortname), + "Microchip INIC"); + snprintf(adpt->card->longname, sizeof(adpt->card->longname), + "%s at %s", adpt->card->shortname, iface->description); +skip_adpt_alloc: if (get_channel(iface, channel_id)) { pr_err("channel (%s:%d) is already linked\n", iface->description, channel_id); @@ -584,53 +646,43 @@ static int audio_probe_channel(struct most_interface *iface, int channel_id, capture_count = 1; direction = SNDRV_PCM_STREAM_CAPTURE; } - - ret = split_arg_list(arg_list, &card_name, &ch_num, &sample_res); - if (ret < 0) - return ret; - - ret = snd_card_new(&iface->dev, -1, card_name, THIS_MODULE, - sizeof(*channel), &card); - if (ret < 0) - return ret; - - channel = card->private_data; - channel->card = card; + channel = kzalloc(sizeof(*channel), GFP_KERNEL); + if (!channel) { + ret = -ENOMEM; + goto err_free_adpt; + } + channel->card = adpt->card; channel->cfg = cfg; channel->iface = iface; channel->id = channel_id; init_waitqueue_head(&channel->playback_waitq); + list_add_tail(&channel->list, &adpt->dev_list); ret = audio_set_hw_params(&channel->pcm_hardware, ch_num, sample_res, cfg); if (ret) - goto err_free_card; + goto err_free_adpt; - snprintf(card->driver, sizeof(card->driver), "%s", DRIVER_NAME); - snprintf(card->shortname, sizeof(card->shortname), "Microchip MOST:%d", - card->number); - snprintf(card->longname, sizeof(card->longname), "%s at %s, ch %d", - card->shortname, iface->description, channel_id); + ret = snd_pcm_new(adpt->card, device_name, adpt->pcm_dev_idx, + playback_count, capture_count, &pcm); - ret = snd_pcm_new(card, card_name, 0, playback_count, - capture_count, &pcm); if (ret < 0) - goto err_free_card; + goto err_free_adpt; pcm->private_data = channel; - + strscpy(pcm->name, device_name, sizeof(pcm->name)); snd_pcm_set_ops(pcm, direction, &pcm_ops); - ret = snd_card_register(card); - if (ret < 0) - goto err_free_card; - - list_add_tail(&channel->list, &dev_list); - + if (create) { + ret = snd_card_register(adpt->card); + if (ret < 0) + goto err_free_adpt; + adpt->registered = true; + } return 0; -err_free_card: - snd_card_free(card); +err_free_adpt: + release_adapter(adpt); return ret; } @@ -647,6 +699,7 @@ static int audio_disconnect_channel(struct most_interface *iface, int channel_id) { struct channel *channel; + struct sound_adapter *adpt = iface->priv; channel = get_channel(iface, channel_id); if (!channel) { @@ -656,8 +709,10 @@ static int audio_disconnect_channel(struct most_interface *iface, } list_del(&channel->list); - snd_card_free(channel->card); + kfree(channel); + if (list_empty(&adpt->dev_list)) + release_adapter(adpt); return 0; } @@ -733,22 +788,14 @@ static int __init audio_init(void) { pr_info("init()\n"); - INIT_LIST_HEAD(&dev_list); + INIT_LIST_HEAD(&adpt_list); return most_register_component(&comp); } static void __exit audio_exit(void) { - struct channel *channel, *tmp; - pr_info("exit()\n"); - - list_for_each_entry_safe(channel, tmp, &dev_list, list) { - list_del(&channel->list); - snd_card_free(channel->card); - } - most_deregister_component(&comp); } diff --git a/drivers/staging/most/usb/Makefile b/drivers/staging/most/usb/Makefile index 18d28cba4fbf..910cd08bad7c 100644 --- a/drivers/staging/most/usb/Makefile +++ b/drivers/staging/most/usb/Makefile @@ -1,4 +1,4 @@ obj-$(CONFIG_MOST_USB) += most_usb.o most_usb-objs := usb.o -ccflags-y += -Idrivers/staging/ +ccflags-y += -I $(srctree)/drivers/staging/ diff --git a/drivers/staging/most/video/Makefile b/drivers/staging/most/video/Makefile index 1c8e520e02a2..c6e01b6ecfe6 100644 --- a/drivers/staging/most/video/Makefile +++ b/drivers/staging/most/video/Makefile @@ -1,4 +1,4 @@ obj-$(CONFIG_MOST_VIDEO) += most_video.o most_video-objs := video.o -ccflags-y += -Idrivers/staging/ +ccflags-y += -I $(srctree)/drivers/staging/ diff --git a/drivers/staging/mt29f_spinand/Kconfig b/drivers/staging/mt29f_spinand/Kconfig deleted file mode 100644 index f3f9cb3b5c35..000000000000 --- a/drivers/staging/mt29f_spinand/Kconfig +++ /dev/null @@ -1,16 +0,0 @@ -config MTD_SPINAND_MT29F - tristate "SPINAND Device Support for Micron" - depends on MTD_NAND && SPI - help - This enables support for accessing Micron SPI NAND flash - devices. - If you have Micron SPI NAND chip say yes. - - If unsure, say no here. - -config MTD_SPINAND_ONDIEECC - bool "Use SPINAND internal ECC" - depends on MTD_SPINAND_MT29F - help - Internal ECC. - Enables Hardware ECC support for Micron SPI NAND. diff --git a/drivers/staging/mt29f_spinand/Makefile b/drivers/staging/mt29f_spinand/Makefile deleted file mode 100644 index e47af0f7fda9..000000000000 --- a/drivers/staging/mt29f_spinand/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-$(CONFIG_MTD_SPINAND_MT29F) += mt29f_spinand.o diff --git a/drivers/staging/mt29f_spinand/TODO b/drivers/staging/mt29f_spinand/TODO deleted file mode 100644 index a2209b72d371..000000000000 --- a/drivers/staging/mt29f_spinand/TODO +++ /dev/null @@ -1,13 +0,0 @@ -TODO: - - Tested on XLP platform, needs to be tested on other platforms. - - Checkpatch.pl cleanups - - Sparce fixes. - - Clean up coding style to meet kernel standard. - -Please send patches -To: -Kamlakant Patel <kamlakant.patel@broadcom.com> -Cc: -Greg Kroah-Hartman <gregkh@linuxfoundation.org> -Mona Anonuevo <manonuevo@micron.com> -linux-mtd@lists.infradead.org diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c b/drivers/staging/mt29f_spinand/mt29f_spinand.c deleted file mode 100644 index def8a1f57d1c..000000000000 --- a/drivers/staging/mt29f_spinand/mt29f_spinand.c +++ /dev/null @@ -1,980 +0,0 @@ -/* - * Copyright (c) 2003-2013 Broadcom Corporation - * - * Copyright (c) 2009-2010 Micron Technology, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/rawnand.h> -#include <linux/spi/spi.h> - -#include "mt29f_spinand.h" - -#define BUFSIZE (10 * 64 * 2048) -#define CACHE_BUF 2112 -/* - * OOB area specification layout: Total 32 available free bytes. - */ - -static inline struct spinand_state *mtd_to_state(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct spinand_info *info = nand_get_controller_data(chip); - struct spinand_state *state = info->priv; - - return state; -} - -#ifdef CONFIG_MTD_SPINAND_ONDIEECC -static int enable_hw_ecc; -static int enable_read_hw_ecc; - -static int spinand_ooblayout_64_ecc(struct mtd_info *mtd, int section, - struct mtd_oob_region *oobregion) -{ - if (section > 3) - return -ERANGE; - - oobregion->offset = (section * 16) + 1; - oobregion->length = 6; - - return 0; -} - -static int spinand_ooblayout_64_free(struct mtd_info *mtd, int section, - struct mtd_oob_region *oobregion) -{ - if (section > 3) - return -ERANGE; - - oobregion->offset = (section * 16) + 8; - oobregion->length = 8; - - return 0; -} - -static const struct mtd_ooblayout_ops spinand_oob_64_ops = { - .ecc = spinand_ooblayout_64_ecc, - .free = spinand_ooblayout_64_free, -}; -#endif - -/** - * spinand_cmd - process a command to send to the SPI Nand - * Description: - * Set up the command buffer to send to the SPI controller. - * The command buffer has to initialized to 0. - */ - -static int spinand_cmd(struct spi_device *spi, struct spinand_cmd *cmd) -{ - struct spi_message message; - struct spi_transfer x[4]; - u8 dummy = 0xff; - - spi_message_init(&message); - memset(x, 0, sizeof(x)); - - x[0].len = 1; - x[0].tx_buf = &cmd->cmd; - spi_message_add_tail(&x[0], &message); - - if (cmd->n_addr) { - x[1].len = cmd->n_addr; - x[1].tx_buf = cmd->addr; - spi_message_add_tail(&x[1], &message); - } - - if (cmd->n_dummy) { - x[2].len = cmd->n_dummy; - x[2].tx_buf = &dummy; - spi_message_add_tail(&x[2], &message); - } - - if (cmd->n_tx) { - x[3].len = cmd->n_tx; - x[3].tx_buf = cmd->tx_buf; - spi_message_add_tail(&x[3], &message); - } - - if (cmd->n_rx) { - x[3].len = cmd->n_rx; - x[3].rx_buf = cmd->rx_buf; - spi_message_add_tail(&x[3], &message); - } - - return spi_sync(spi, &message); -} - -/** - * spinand_read_id - Read SPI Nand ID - * Description: - * read two ID bytes from the SPI Nand device - */ -static int spinand_read_id(struct spi_device *spi_nand, u8 *id) -{ - int retval; - u8 nand_id[3]; - struct spinand_cmd cmd = {0}; - - cmd.cmd = CMD_READ_ID; - cmd.n_rx = 3; - cmd.rx_buf = &nand_id[0]; - - retval = spinand_cmd(spi_nand, &cmd); - if (retval < 0) { - dev_err(&spi_nand->dev, "error %d reading id\n", retval); - return retval; - } - id[0] = nand_id[1]; - id[1] = nand_id[2]; - return retval; -} - -/** - * spinand_read_status - send command 0xf to the SPI Nand status register - * Description: - * After read, write, or erase, the Nand device is expected to set the - * busy status. - * This function is to allow reading the status of the command: read, - * write, and erase. - * Once the status turns to be ready, the other status bits also are - * valid status bits. - */ -static int spinand_read_status(struct spi_device *spi_nand, u8 *status) -{ - struct spinand_cmd cmd = {0}; - int ret; - - cmd.cmd = CMD_READ_REG; - cmd.n_addr = 1; - cmd.addr[0] = REG_STATUS; - cmd.n_rx = 1; - cmd.rx_buf = status; - - ret = spinand_cmd(spi_nand, &cmd); - if (ret < 0) - dev_err(&spi_nand->dev, "err: %d read status register\n", ret); - - return ret; -} - -#define MAX_WAIT_JIFFIES (40 * HZ) -static int wait_till_ready(struct spi_device *spi_nand) -{ - unsigned long deadline; - int retval; - u8 stat = 0; - - deadline = jiffies + MAX_WAIT_JIFFIES; - do { - retval = spinand_read_status(spi_nand, &stat); - if (retval < 0) - return -1; - if (!(stat & 0x1)) - break; - - cond_resched(); - } while (!time_after_eq(jiffies, deadline)); - - if ((stat & 0x1) == 0) - return 0; - - return -1; -} - -/** - * spinand_get_otp - send command 0xf to read the SPI Nand OTP register - * Description: - * There is one bit( bit 0x10 ) to set or to clear the internal ECC. - * Enable chip internal ECC, set the bit to 1 - * Disable chip internal ECC, clear the bit to 0 - */ -static int spinand_get_otp(struct spi_device *spi_nand, u8 *otp) -{ - struct spinand_cmd cmd = {0}; - int retval; - - cmd.cmd = CMD_READ_REG; - cmd.n_addr = 1; - cmd.addr[0] = REG_OTP; - cmd.n_rx = 1; - cmd.rx_buf = otp; - - retval = spinand_cmd(spi_nand, &cmd); - if (retval < 0) - dev_err(&spi_nand->dev, "error %d get otp\n", retval); - return retval; -} - -/** - * spinand_set_otp - send command 0x1f to write the SPI Nand OTP register - * Description: - * There is one bit( bit 0x10 ) to set or to clear the internal ECC. - * Enable chip internal ECC, set the bit to 1 - * Disable chip internal ECC, clear the bit to 0 - */ -static int spinand_set_otp(struct spi_device *spi_nand, u8 *otp) -{ - int retval; - struct spinand_cmd cmd = {0}; - - cmd.cmd = CMD_WRITE_REG; - cmd.n_addr = 1; - cmd.addr[0] = REG_OTP; - cmd.n_tx = 1; - cmd.tx_buf = otp; - - retval = spinand_cmd(spi_nand, &cmd); - if (retval < 0) - dev_err(&spi_nand->dev, "error %d set otp\n", retval); - - return retval; -} - -#ifdef CONFIG_MTD_SPINAND_ONDIEECC -/** - * spinand_enable_ecc - send command 0x1f to write the SPI Nand OTP register - * Description: - * There is one bit( bit 0x10 ) to set or to clear the internal ECC. - * Enable chip internal ECC, set the bit to 1 - * Disable chip internal ECC, clear the bit to 0 - */ -static int spinand_enable_ecc(struct spi_device *spi_nand) -{ - int retval; - u8 otp = 0; - - retval = spinand_get_otp(spi_nand, &otp); - if (retval < 0) - return retval; - - if ((otp & OTP_ECC_MASK) == OTP_ECC_MASK) - return 0; - otp |= OTP_ECC_MASK; - retval = spinand_set_otp(spi_nand, &otp); - if (retval < 0) - return retval; - return spinand_get_otp(spi_nand, &otp); -} -#endif - -static int spinand_disable_ecc(struct spi_device *spi_nand) -{ - int retval; - u8 otp = 0; - - retval = spinand_get_otp(spi_nand, &otp); - if (retval < 0) - return retval; - - if ((otp & OTP_ECC_MASK) == OTP_ECC_MASK) { - otp &= ~OTP_ECC_MASK; - retval = spinand_set_otp(spi_nand, &otp); - if (retval < 0) - return retval; - return spinand_get_otp(spi_nand, &otp); - } - return 0; -} - -/** - * spinand_write_enable - send command 0x06 to enable write or erase the - * Nand cells - * Description: - * Before write and erase the Nand cells, the write enable has to be set. - * After the write or erase, the write enable bit is automatically - * cleared (status register bit 2) - * Set the bit 2 of the status register has the same effect - */ -static int spinand_write_enable(struct spi_device *spi_nand) -{ - struct spinand_cmd cmd = {0}; - - cmd.cmd = CMD_WR_ENABLE; - return spinand_cmd(spi_nand, &cmd); -} - -static int spinand_read_page_to_cache(struct spi_device *spi_nand, u16 page_id) -{ - struct spinand_cmd cmd = {0}; - u16 row; - - row = page_id; - cmd.cmd = CMD_READ; - cmd.n_addr = 3; - cmd.addr[0] = (u8)((row & 0xff0000) >> 16); - cmd.addr[1] = (u8)((row & 0xff00) >> 8); - cmd.addr[2] = (u8)(row & 0x00ff); - - return spinand_cmd(spi_nand, &cmd); -} - -/** - * spinand_read_from_cache - send command 0x03 to read out the data from the - * cache register (2112 bytes max) - * Description: - * The read can specify 1 to 2112 bytes of data read at the corresponding - * locations. - * No tRd delay. - */ -static int spinand_read_from_cache(struct spi_device *spi_nand, u16 page_id, - u16 byte_id, u16 len, u8 *rbuf) -{ - struct spinand_cmd cmd = {0}; - u16 column; - - column = byte_id; - cmd.cmd = CMD_READ_RDM; - cmd.n_addr = 3; - cmd.addr[0] = (u8)((column & 0xff00) >> 8); - cmd.addr[0] |= (u8)(((page_id >> 6) & 0x1) << 4); - cmd.addr[1] = (u8)(column & 0x00ff); - cmd.addr[2] = (u8)(0xff); - cmd.n_dummy = 0; - cmd.n_rx = len; - cmd.rx_buf = rbuf; - - return spinand_cmd(spi_nand, &cmd); -} - -/** - * spinand_read_page - read a page - * @page_id: the physical page number - * @offset: the location from 0 to 2111 - * @len: number of bytes to read - * @rbuf: read buffer to hold @len bytes - * - * Description: - * The read includes two commands to the Nand - 0x13 and 0x03 commands - * Poll to read status to wait for tRD time. - */ -static int spinand_read_page(struct spi_device *spi_nand, u16 page_id, - u16 offset, u16 len, u8 *rbuf) -{ - int ret; - u8 status = 0; - -#ifdef CONFIG_MTD_SPINAND_ONDIEECC - if (enable_read_hw_ecc) { - if (spinand_enable_ecc(spi_nand) < 0) - dev_err(&spi_nand->dev, "enable HW ECC failed!"); - } -#endif - ret = spinand_read_page_to_cache(spi_nand, page_id); - if (ret < 0) - return ret; - - if (wait_till_ready(spi_nand)) - dev_err(&spi_nand->dev, "WAIT timedout!!!\n"); - - while (1) { - ret = spinand_read_status(spi_nand, &status); - if (ret < 0) { - dev_err(&spi_nand->dev, - "err %d read status register\n", ret); - return ret; - } - - if ((status & STATUS_OIP_MASK) == STATUS_READY) { - if ((status & STATUS_ECC_MASK) == STATUS_ECC_ERROR) { - dev_err(&spi_nand->dev, "ecc error, page=%d\n", - page_id); - return 0; - } - break; - } - } - - ret = spinand_read_from_cache(spi_nand, page_id, offset, len, rbuf); - if (ret < 0) { - dev_err(&spi_nand->dev, "read from cache failed!!\n"); - return ret; - } - -#ifdef CONFIG_MTD_SPINAND_ONDIEECC - if (enable_read_hw_ecc) { - ret = spinand_disable_ecc(spi_nand); - if (ret < 0) { - dev_err(&spi_nand->dev, "disable ecc failed!!\n"); - return ret; - } - enable_read_hw_ecc = 0; - } -#endif - return ret; -} - -/** - * spinand_program_data_to_cache - write a page to cache - * @byte_id: the location to write to the cache - * @len: number of bytes to write - * @wbuf: write buffer holding @len bytes - * - * Description: - * The write command used here is 0x84--indicating that the cache is - * not cleared first. - * Since it is writing the data to cache, there is no tPROG time. - */ -static int spinand_program_data_to_cache(struct spi_device *spi_nand, - u16 page_id, u16 byte_id, - u16 len, u8 *wbuf) -{ - struct spinand_cmd cmd = {0}; - u16 column; - - column = byte_id; - cmd.cmd = CMD_PROG_PAGE_CLRCACHE; - cmd.n_addr = 2; - cmd.addr[0] = (u8)((column & 0xff00) >> 8); - cmd.addr[0] |= (u8)(((page_id >> 6) & 0x1) << 4); - cmd.addr[1] = (u8)(column & 0x00ff); - cmd.n_tx = len; - cmd.tx_buf = wbuf; - - return spinand_cmd(spi_nand, &cmd); -} - -/** - * spinand_program_execute - write a page from cache to the Nand array - * @page_id: the physical page location to write the page. - * - * Description: - * The write command used here is 0x10--indicating the cache is writing to - * the Nand array. - * Need to wait for tPROG time to finish the transaction. - */ -static int spinand_program_execute(struct spi_device *spi_nand, u16 page_id) -{ - struct spinand_cmd cmd = {0}; - u16 row; - - row = page_id; - cmd.cmd = CMD_PROG_PAGE_EXC; - cmd.n_addr = 3; - cmd.addr[0] = (u8)((row & 0xff0000) >> 16); - cmd.addr[1] = (u8)((row & 0xff00) >> 8); - cmd.addr[2] = (u8)(row & 0x00ff); - - return spinand_cmd(spi_nand, &cmd); -} - -/** - * spinand_program_page - write a page - * @page_id: the physical page location to write the page. - * @offset: the location from the cache starting from 0 to 2111 - * @len: the number of bytes to write - * @buf: the buffer holding @len bytes - * - * Description: - * The commands used here are 0x06, 0x84, and 0x10--indicating that - * the write enable is first sent, the write cache command, and the - * write execute command. - * Poll to wait for the tPROG time to finish the transaction. - */ -static int spinand_program_page(struct spi_device *spi_nand, - u16 page_id, u16 offset, u16 len, u8 *buf) -{ - int retval; - u8 status = 0; - u8 *wbuf; -#ifdef CONFIG_MTD_SPINAND_ONDIEECC - unsigned int i, j; - - wbuf = devm_kzalloc(&spi_nand->dev, CACHE_BUF, GFP_KERNEL); - if (!wbuf) - return -ENOMEM; - - enable_read_hw_ecc = 1; - retval = spinand_read_page(spi_nand, page_id, 0, CACHE_BUF, wbuf); - if (retval < 0) { - dev_err(&spi_nand->dev, "ecc error on read page!!!\n"); - return retval; - } - - for (i = offset, j = 0; i < len; i++, j++) - wbuf[i] &= buf[j]; - - if (enable_hw_ecc) { - retval = spinand_enable_ecc(spi_nand); - if (retval < 0) { - dev_err(&spi_nand->dev, "enable ecc failed!!\n"); - return retval; - } - } -#else - wbuf = buf; -#endif - retval = spinand_write_enable(spi_nand); - if (retval < 0) { - dev_err(&spi_nand->dev, "write enable failed!!\n"); - return retval; - } - if (wait_till_ready(spi_nand)) - dev_err(&spi_nand->dev, "wait timedout!!!\n"); - - retval = spinand_program_data_to_cache(spi_nand, page_id, - offset, len, wbuf); - if (retval < 0) - return retval; - retval = spinand_program_execute(spi_nand, page_id); - if (retval < 0) - return retval; - while (1) { - retval = spinand_read_status(spi_nand, &status); - if (retval < 0) { - dev_err(&spi_nand->dev, - "error %d reading status register\n", retval); - return retval; - } - - if ((status & STATUS_OIP_MASK) == STATUS_READY) { - if ((status & STATUS_P_FAIL_MASK) == STATUS_P_FAIL) { - dev_err(&spi_nand->dev, - "program error, page %d\n", page_id); - return -1; - } - break; - } - } -#ifdef CONFIG_MTD_SPINAND_ONDIEECC - if (enable_hw_ecc) { - retval = spinand_disable_ecc(spi_nand); - if (retval < 0) { - dev_err(&spi_nand->dev, "disable ecc failed!!\n"); - return retval; - } - enable_hw_ecc = 0; - } -#endif - - return 0; -} - -/** - * spinand_erase_block_erase - erase a page - * @block_id: the physical block location to erase. - * - * Description: - * The command used here is 0xd8--indicating an erase command to erase - * one block--64 pages - * Need to wait for tERS. - */ -static int spinand_erase_block_erase(struct spi_device *spi_nand, u16 block_id) -{ - struct spinand_cmd cmd = {0}; - u16 row; - - row = block_id; - cmd.cmd = CMD_ERASE_BLK; - cmd.n_addr = 3; - cmd.addr[0] = (u8)((row & 0xff0000) >> 16); - cmd.addr[1] = (u8)((row & 0xff00) >> 8); - cmd.addr[2] = (u8)(row & 0x00ff); - - return spinand_cmd(spi_nand, &cmd); -} - -/** - * spinand_erase_block - erase a page - * @block_id: the physical block location to erase. - * - * Description: - * The commands used here are 0x06 and 0xd8--indicating an erase - * command to erase one block--64 pages - * It will first to enable the write enable bit (0x06 command), - * and then send the 0xd8 erase command - * Poll to wait for the tERS time to complete the tranaction. - */ -static int spinand_erase_block(struct spi_device *spi_nand, u16 block_id) -{ - int retval; - u8 status = 0; - - retval = spinand_write_enable(spi_nand); - if (wait_till_ready(spi_nand)) - dev_err(&spi_nand->dev, "wait timedout!!!\n"); - - retval = spinand_erase_block_erase(spi_nand, block_id); - while (1) { - retval = spinand_read_status(spi_nand, &status); - if (retval < 0) { - dev_err(&spi_nand->dev, - "error %d reading status register\n", retval); - return retval; - } - - if ((status & STATUS_OIP_MASK) == STATUS_READY) { - if ((status & STATUS_E_FAIL_MASK) == STATUS_E_FAIL) { - dev_err(&spi_nand->dev, - "erase error, block %d\n", block_id); - return -1; - } - break; - } - } - return 0; -} - -#ifdef CONFIG_MTD_SPINAND_ONDIEECC -static int spinand_write_page_hwecc(struct nand_chip *chip, - const u8 *buf, int oob_required, - int page) -{ - const u8 *p = buf; - int eccsize = chip->ecc.size; - int eccsteps = chip->ecc.steps; - - enable_hw_ecc = 1; - return nand_prog_page_op(chip, page, 0, p, eccsize * eccsteps); -} - -static int spinand_read_page_hwecc(struct nand_chip *chip, u8 *buf, - int oob_required, int page) -{ - int retval; - u8 status; - u8 *p = buf; - int eccsize = chip->ecc.size; - int eccsteps = chip->ecc.steps; - struct mtd_info *mtd = nand_to_mtd(chip); - struct spinand_info *info = nand_get_controller_data(chip); - - enable_read_hw_ecc = 1; - - nand_read_page_op(chip, page, 0, p, eccsize * eccsteps); - if (oob_required) - chip->legacy.read_buf(chip, chip->oob_poi, mtd->oobsize); - - while (1) { - retval = spinand_read_status(info->spi, &status); - if (retval < 0) { - dev_err(&mtd->dev, - "error %d reading status register\n", retval); - return retval; - } - - if ((status & STATUS_OIP_MASK) == STATUS_READY) { - if ((status & STATUS_ECC_MASK) == STATUS_ECC_ERROR) { - pr_info("spinand: ECC error\n"); - mtd->ecc_stats.failed++; - } else if ((status & STATUS_ECC_MASK) == - STATUS_ECC_1BIT_CORRECTED) - mtd->ecc_stats.corrected++; - break; - } - } - return 0; -} -#endif - -static void spinand_select_chip(struct nand_chip *chip, int dev) -{ -} - -static u8 spinand_read_byte(struct nand_chip *chip) -{ - struct spinand_state *state = mtd_to_state(nand_to_mtd(chip)); - u8 data; - - data = state->buf[state->buf_ptr]; - state->buf_ptr++; - return data; -} - -static int spinand_wait(struct nand_chip *chip) -{ - struct mtd_info *mtd = nand_to_mtd(chip); - struct spinand_info *info = nand_get_controller_data(chip); - - unsigned long timeo = jiffies; - int retval, state = chip->state; - u8 status; - - if (state == FL_ERASING) - timeo += (HZ * 400) / 1000; - else - timeo += (HZ * 20) / 1000; - - while (time_before(jiffies, timeo)) { - retval = spinand_read_status(info->spi, &status); - if (retval < 0) { - dev_err(&mtd->dev, - "error %d reading status register\n", retval); - return retval; - } - - if ((status & STATUS_OIP_MASK) == STATUS_READY) - return 0; - - cond_resched(); - } - return 0; -} - -static void spinand_write_buf(struct nand_chip *chip, const u8 *buf, int len) -{ - struct spinand_state *state = mtd_to_state(nand_to_mtd(chip)); - - memcpy(state->buf + state->buf_ptr, buf, len); - state->buf_ptr += len; -} - -static void spinand_read_buf(struct nand_chip *chip, u8 *buf, int len) -{ - struct spinand_state *state = mtd_to_state(nand_to_mtd(chip)); - - memcpy(buf, state->buf + state->buf_ptr, len); - state->buf_ptr += len; -} - -/* - * spinand_reset- send RESET command "0xff" to the Nand device. - */ -static void spinand_reset(struct spi_device *spi_nand) -{ - struct spinand_cmd cmd = {0}; - - cmd.cmd = CMD_RESET; - - if (spinand_cmd(spi_nand, &cmd) < 0) - pr_info("spinand reset failed!\n"); - - /* elapse 1ms before issuing any other command */ - usleep_range(1000, 2000); - - if (wait_till_ready(spi_nand)) - dev_err(&spi_nand->dev, "wait timedout!\n"); -} - -static void spinand_cmdfunc(struct nand_chip *chip, unsigned int command, - int column, int page) -{ - struct mtd_info *mtd = nand_to_mtd(chip); - struct spinand_info *info = nand_get_controller_data(chip); - struct spinand_state *state = info->priv; - - switch (command) { - /* - * READ0 - read in first 0x800 bytes - */ - case NAND_CMD_READ1: - case NAND_CMD_READ0: - state->buf_ptr = 0; - spinand_read_page(info->spi, page, 0x0, 0x840, state->buf); - break; - /* READOOB reads only the OOB because no ECC is performed. */ - case NAND_CMD_READOOB: - state->buf_ptr = 0; - spinand_read_page(info->spi, page, 0x800, 0x40, state->buf); - break; - case NAND_CMD_RNDOUT: - state->buf_ptr = column; - break; - case NAND_CMD_READID: - state->buf_ptr = 0; - spinand_read_id(info->spi, state->buf); - break; - case NAND_CMD_PARAM: - state->buf_ptr = 0; - break; - /* ERASE1 stores the block and page address */ - case NAND_CMD_ERASE1: - spinand_erase_block(info->spi, page); - break; - /* ERASE2 uses the block and page address from ERASE1 */ - case NAND_CMD_ERASE2: - break; - /* SEQIN sets up the addr buffer and all registers except the length */ - case NAND_CMD_SEQIN: - state->col = column; - state->row = page; - state->buf_ptr = 0; - break; - /* PAGEPROG reuses all of the setup from SEQIN and adds the length */ - case NAND_CMD_PAGEPROG: - spinand_program_page(info->spi, state->row, state->col, - state->buf_ptr, state->buf); - break; - case NAND_CMD_STATUS: - spinand_get_otp(info->spi, state->buf); - if (!(state->buf[0] & 0x80)) - state->buf[0] = 0x80; - state->buf_ptr = 0; - break; - /* RESET command */ - case NAND_CMD_RESET: - if (wait_till_ready(info->spi)) - dev_err(&info->spi->dev, "WAIT timedout!!!\n"); - /* a minimum of 250us must elapse before issuing RESET cmd*/ - usleep_range(250, 1000); - spinand_reset(info->spi); - break; - default: - dev_err(&mtd->dev, "Unknown CMD: 0x%x\n", command); - } -} - -/** - * spinand_lock_block - send write register 0x1f command to the Nand device - * - * Description: - * After power up, all the Nand blocks are locked. This function allows - * one to unlock the blocks, and so it can be written or erased. - */ -static int spinand_lock_block(struct spi_device *spi_nand, u8 lock) -{ - struct spinand_cmd cmd = {0}; - int ret; - u8 otp = 0; - - ret = spinand_get_otp(spi_nand, &otp); - - cmd.cmd = CMD_WRITE_REG; - cmd.n_addr = 1; - cmd.addr[0] = REG_BLOCK_LOCK; - cmd.n_tx = 1; - cmd.tx_buf = &lock; - - ret = spinand_cmd(spi_nand, &cmd); - if (ret < 0) - dev_err(&spi_nand->dev, "error %d lock block\n", ret); - - return ret; -} - -/** - * spinand_probe - [spinand Interface] - * @spi_nand: registered device driver. - * - * Description: - * Set up the device driver parameters to make the device available. - */ -static int spinand_probe(struct spi_device *spi_nand) -{ - struct mtd_info *mtd; - struct nand_chip *chip; - struct spinand_info *info; - struct spinand_state *state; - - info = devm_kzalloc(&spi_nand->dev, sizeof(struct spinand_info), - GFP_KERNEL); - if (!info) - return -ENOMEM; - - info->spi = spi_nand; - - spinand_lock_block(spi_nand, BL_ALL_UNLOCKED); - - state = devm_kzalloc(&spi_nand->dev, sizeof(struct spinand_state), - GFP_KERNEL); - if (!state) - return -ENOMEM; - - info->priv = state; - state->buf_ptr = 0; - state->buf = devm_kzalloc(&spi_nand->dev, BUFSIZE, GFP_KERNEL); - if (!state->buf) - return -ENOMEM; - - chip = devm_kzalloc(&spi_nand->dev, sizeof(struct nand_chip), - GFP_KERNEL); - if (!chip) - return -ENOMEM; - -#ifdef CONFIG_MTD_SPINAND_ONDIEECC - chip->ecc.mode = NAND_ECC_HW; - chip->ecc.size = 0x200; - chip->ecc.bytes = 0x6; - chip->ecc.steps = 0x4; - - chip->ecc.strength = 1; - chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; - chip->ecc.read_page = spinand_read_page_hwecc; - chip->ecc.write_page = spinand_write_page_hwecc; -#else - chip->ecc.mode = NAND_ECC_SOFT; - chip->ecc.algo = NAND_ECC_HAMMING; - if (spinand_disable_ecc(spi_nand) < 0) - dev_info(&spi_nand->dev, "%s: disable ecc failed!\n", - __func__); -#endif - - nand_set_flash_node(chip, spi_nand->dev.of_node); - nand_set_controller_data(chip, info); - chip->legacy.read_buf = spinand_read_buf; - chip->legacy.write_buf = spinand_write_buf; - chip->legacy.read_byte = spinand_read_byte; - chip->legacy.cmdfunc = spinand_cmdfunc; - chip->legacy.waitfunc = spinand_wait; - chip->options |= NAND_CACHEPRG; - chip->select_chip = spinand_select_chip; - chip->legacy.set_features = nand_get_set_features_notsupp; - chip->legacy.get_features = nand_get_set_features_notsupp; - - mtd = nand_to_mtd(chip); - - dev_set_drvdata(&spi_nand->dev, mtd); - - mtd->dev.parent = &spi_nand->dev; - mtd->oobsize = 64; -#ifdef CONFIG_MTD_SPINAND_ONDIEECC - mtd_set_ooblayout(mtd, &spinand_oob_64_ops); -#endif - - if (nand_scan(chip, 1)) - return -ENXIO; - - return mtd_device_register(mtd, NULL, 0); -} - -/** - * spinand_remove - remove the device driver - * @spi: the spi device. - * - * Description: - * Remove the device driver parameters and free up allocated memories. - */ -static int spinand_remove(struct spi_device *spi) -{ - mtd_device_unregister(dev_get_drvdata(&spi->dev)); - - return 0; -} - -static const struct of_device_id spinand_dt[] = { - { .compatible = "spinand,mt29f", }, - {} -}; -MODULE_DEVICE_TABLE(of, spinand_dt); - -/* - * Device name structure description - */ -static struct spi_driver spinand_driver = { - .driver = { - .name = "mt29f", - .of_match_table = spinand_dt, - }, - .probe = spinand_probe, - .remove = spinand_remove, -}; - -module_spi_driver(spinand_driver); - -MODULE_DESCRIPTION("SPI NAND driver for Micron"); -MODULE_AUTHOR("Henry Pan <hspan@micron.com>, Kamlakant Patel <kamlakant.patel@broadcom.com>"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.h b/drivers/staging/mt29f_spinand/mt29f_spinand.h deleted file mode 100644 index 457dc7ffdaf1..000000000000 --- a/drivers/staging/mt29f_spinand/mt29f_spinand.h +++ /dev/null @@ -1,106 +0,0 @@ -/*- - * Copyright 2013 Broadcom Corporation - * - * Copyright (c) 2009-2010 Micron Technology, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Henry Pan <hspan@micron.com> - * - * based on nand.h - */ -#ifndef __LINUX_MTD_SPI_NAND_H -#define __LINUX_MTD_SPI_NAND_H - -#include <linux/wait.h> -#include <linux/spinlock.h> -#include <linux/mtd/mtd.h> - -/* cmd */ -#define CMD_READ 0x13 -#define CMD_READ_RDM 0x03 -#define CMD_PROG_PAGE_CLRCACHE 0x02 -#define CMD_PROG_PAGE 0x84 -#define CMD_PROG_PAGE_EXC 0x10 -#define CMD_ERASE_BLK 0xd8 -#define CMD_WR_ENABLE 0x06 -#define CMD_WR_DISABLE 0x04 -#define CMD_READ_ID 0x9f -#define CMD_RESET 0xff -#define CMD_READ_REG 0x0f -#define CMD_WRITE_REG 0x1f - -/* feature/ status reg */ -#define REG_BLOCK_LOCK 0xa0 -#define REG_OTP 0xb0 -#define REG_STATUS 0xc0/* timing */ - -/* status */ -#define STATUS_OIP_MASK 0x01 -#define STATUS_READY 0 -#define STATUS_BUSY BIT(0) - -#define STATUS_E_FAIL_MASK 0x04 -#define STATUS_E_FAIL BIT(2) - -#define STATUS_P_FAIL_MASK 0x08 -#define STATUS_P_FAIL BIT(3) - -#define STATUS_ECC_MASK 0x30 -#define STATUS_ECC_1BIT_CORRECTED BIT(4) -#define STATUS_ECC_ERROR BIT(5) -#define STATUS_ECC_RESERVED (BIT(5) | BIT(4)) - -/*ECC enable defines*/ -#define OTP_ECC_MASK 0x10 -#define OTP_ECC_OFF 0 -#define OTP_ECC_ON 1 - -#define ECC_DISABLED -#define ECC_IN_NAND -#define ECC_SOFT - -/* block lock */ -#define BL_ALL_LOCKED 0x38 -#define BL_1_2_LOCKED 0x30 -#define BL_1_4_LOCKED 0x28 -#define BL_1_8_LOCKED 0x20 -#define BL_1_16_LOCKED 0x18 -#define BL_1_32_LOCKED 0x10 -#define BL_1_64_LOCKED 0x08 -#define BL_ALL_UNLOCKED 0 - -struct spinand_info { - struct spi_device *spi; - void *priv; -}; - -struct spinand_state { - u32 col; - u32 row; - int buf_ptr; - u8 *buf; -}; - -struct spinand_cmd { - u8 cmd; - u32 n_addr; /* Number of address */ - u8 addr[3]; /* Reg Offset */ - u32 n_dummy; /* Dummy use */ - u32 n_tx; /* Number of tx bytes */ - u8 *tx_buf; /* Tx buf */ - u32 n_rx; /* Number of rx bytes */ - u8 *rx_buf; /* Rx buf */ -}; - -int spinand_mtd(struct mtd_info *mtd); -void spinand_mtd_release(struct mtd_info *mtd); - -#endif /* __LINUX_MTD_SPI_NAND_H */ diff --git a/drivers/staging/mt7621-dma/Kconfig b/drivers/staging/mt7621-dma/Kconfig index 2423c40099d1..b6e48a682c44 100644 --- a/drivers/staging/mt7621-dma/Kconfig +++ b/drivers/staging/mt7621-dma/Kconfig @@ -1,9 +1,3 @@ -config DMA_RALINK - tristate "RALINK DMA support" - depends on RALINK && !SOC_RT288X - select DMA_ENGINE - select DMA_VIRTUAL_CHANNELS - config MTK_HSDMA tristate "MTK HSDMA support" depends on RALINK && SOC_MT7621 diff --git a/drivers/staging/mt7621-dma/Makefile b/drivers/staging/mt7621-dma/Makefile index d3152d45cf45..c9e3e1619ab0 100644 --- a/drivers/staging/mt7621-dma/Makefile +++ b/drivers/staging/mt7621-dma/Makefile @@ -1,4 +1,3 @@ -obj-$(CONFIG_DMA_RALINK) += ralink-gdma.o obj-$(CONFIG_MTK_HSDMA) += mtk-hsdma.o ccflags-y += -I$(srctree)/drivers/dma diff --git a/drivers/staging/mt7621-dma/mtk-hsdma.c b/drivers/staging/mt7621-dma/mtk-hsdma.c index 5831f816c17b..97571f1d697b 100644 --- a/drivers/staging/mt7621-dma/mtk-hsdma.c +++ b/drivers/staging/mt7621-dma/mtk-hsdma.c @@ -1,12 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2015, Michael Lee <igvtee@gmail.com> * MTK HSDMA support - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * */ #include <linux/dmaengine.h> @@ -191,7 +186,7 @@ static inline u32 mtk_hsdma_read(struct mtk_hsdam_engine *hsdma, u32 reg) } static inline void mtk_hsdma_write(struct mtk_hsdam_engine *hsdma, - unsigned reg, u32 val) + unsigned int reg, u32 val) { writel(val, hsdma->base + reg); } @@ -242,7 +237,7 @@ static void hsdma_dump_desc(struct mtk_hsdam_engine *hsdma, int i; dev_dbg(hsdma->ddev.dev, "tx idx: %d, rx idx: %d\n", - chan->tx_idx, chan->rx_idx); + chan->tx_idx, chan->rx_idx); for (i = 0; i < HSDMA_DESCS_NUM; i++) { tx_desc = &chan->tx_ring[i]; @@ -419,8 +414,9 @@ static void mtk_hsdma_chan_done(struct mtk_hsdam_engine *hsdma, vchan_cookie_complete(&desc->vdesc); chan_issued = gdma_next_desc(chan); } - } else + } else { dev_dbg(hsdma->ddev.dev, "no desc to complete\n"); + } if (chan_issued) set_bit(chan->id, &hsdma->chan_issued); @@ -457,8 +453,9 @@ static void mtk_hsdma_issue_pending(struct dma_chan *c) if (gdma_next_desc(chan)) { set_bit(chan->id, &hsdma->chan_issued); tasklet_schedule(&hsdma->task); - } else + } else { dev_dbg(hsdma->ddev.dev, "no desc to issue\n"); + } } spin_unlock_bh(&chan->vchan.lock); } diff --git a/drivers/staging/mt7621-dts/gbpc1.dts b/drivers/staging/mt7621-dts/gbpc1.dts index d5b27e224b56..250c15ace2a7 100644 --- a/drivers/staging/mt7621-dts/gbpc1.dts +++ b/drivers/staging/mt7621-dts/gbpc1.dts @@ -72,6 +72,7 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <50000000>; + broken-flash-reset; partition@0 { label = "u-boot"; @@ -116,27 +117,24 @@ status = "okay"; }; -ðernet { - //mtd-mac-address = <&factory 0xe000>; - gmac1: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-handle = <&phy1>; - }; - - mdio-bus { - phy1: ethernet-phy@1 { - reg = <1>; - phy-mode = "rgmii"; +&pinctrl { + state_default: pinctrl0 { + gpio { + groups = "wdt", "rgmii2", "uart3"; + function = "gpio"; }; }; }; -&pinctrl { - state_default: pinctrl0 { - gpio { - ralink,group = "wdt", "rgmii2", "uart3"; - ralink,function = "gpio"; +&switch0 { + ports { + port@0 { + label = "ethblack"; + status = "ok"; + }; + port@4 { + label = "ethblue"; + status = "ok"; }; }; }; diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi index 2e837e60663a..17020e24abd2 100644 --- a/drivers/staging/mt7621-dts/mt7621.dtsi +++ b/drivers/staging/mt7621-dts/mt7621.dtsi @@ -202,84 +202,84 @@ state_default: pinctrl0 { }; - i2c_pins: i2c { - i2c { - group = "i2c"; + i2c_pins: i2c0 { + i2c0 { + groups = "i2c"; function = "i2c"; }; }; - spi_pins: spi { - spi { - group = "spi"; + spi_pins: spi0 { + spi0 { + groups = "spi"; function = "spi"; }; }; uart1_pins: uart1 { uart1 { - group = "uart1"; + groups = "uart1"; function = "uart1"; }; }; uart2_pins: uart2 { uart2 { - group = "uart2"; + groups = "uart2"; function = "uart2"; }; }; uart3_pins: uart3 { uart3 { - group = "uart3"; + groups = "uart3"; function = "uart3"; }; }; rgmii1_pins: rgmii1 { rgmii1 { - group = "rgmii1"; + groups = "rgmii1"; function = "rgmii1"; }; }; rgmii2_pins: rgmii2 { rgmii2 { - group = "rgmii2"; + groups = "rgmii2"; function = "rgmii2"; }; }; - mdio_pins: mdio { - mdio { - group = "mdio"; + mdio_pins: mdio0 { + mdio0 { + groups = "mdio"; function = "mdio"; }; }; - pcie_pins: pcie { - pcie { - group = "pcie"; + pcie_pins: pcie0 { + pcie0 { + groups = "pcie"; function = "pcie rst"; }; }; - nand_pins: nand { + nand_pins: nand0 { spi-nand { - group = "spi"; + groups = "spi"; function = "nand1"; }; sdhci-nand { - group = "sdhci"; + groups = "sdhci"; function = "nand2"; }; }; - sdhci_pins: sdhci { - sdhci { - group = "sdhci"; + sdhci_pins: sdhci0 { + sdhci0 { + groups = "sdhci"; function = "sdhci"; }; }; @@ -372,16 +372,83 @@ mediatek,ethsys = <ðsys>; - mediatek,switch = <&gsw>; + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "rgmii"; + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + status = "off"; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; mdio-bus { #address-cells = <1>; #size-cells = <0>; - phy1f: ethernet-phy@1f { - reg = <0x1f>; + phy5: ethernet-phy@5 { + reg = <5>; phy-mode = "rgmii"; }; + + switch0: switch0@0 { + compatible = "mediatek,mt7621"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mediatek,mcm; + resets = <&rstctrl 2>; + reset-names = "mcm"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + port@0 { + status = "off"; + reg = <0>; + label = "lan0"; + }; + port@1 { + status = "off"; + reg = <1>; + label = "lan1"; + }; + port@2 { + status = "off"; + reg = <2>; + label = "lan2"; + }; + port@3 { + status = "off"; + reg = <3>; + label = "lan3"; + }; + port@4 { + status = "off"; + reg = <4>; + label = "lan4"; + }; + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "trgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; }; }; @@ -398,7 +465,6 @@ 0x1e142000 0x100 /* pcie port 0 RC control registers */ 0x1e143000 0x100 /* pcie port 1 RC control registers */ 0x1e144000 0x100>; /* pcie port 2 RC control registers */ - #address-cells = <3>; #size-cells = <2>; @@ -421,10 +487,12 @@ status = "disabled"; - resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>; - reset-names = "pcie0", "pcie1", "pcie2"; + resets = <&rstctrl 23 &rstctrl 24 &rstctrl 25 &rstctrl 26>; + reset-names = "pcie", "pcie0", "pcie1", "pcie2"; clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>; clock-names = "pcie0", "pcie1", "pcie2"; + phys = <&pcie0_port>, <&pcie1_port>, <&pcie2_port>; + phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2"; pcie@0,0 { reg = <0x0000 0 0 0 0>; @@ -450,4 +518,33 @@ bus-range = <0x00 0xff>; }; }; + + pcie0_phy: pcie-phy@1e149000 { + compatible = "mediatek,mt7621-pci-phy"; + reg = <0x1e149000 0x0700>; + #address-cells = <1>; + #size-cells = <0>; + + pcie0_port: pcie-phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + pcie1_port: pcie-phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + }; + + pcie1_phy: pcie-phy@1e14a000 { + compatible = "mediatek,mt7621-pci-phy"; + reg = <0x1e14a000 0x0700>; + #address-cells = <1>; + #size-cells = <0>; + + pcie2_port: pcie-phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + }; }; diff --git a/drivers/staging/mt7621-eth/Documentation/devicetree/bindings/net/mediatek-net-gsw.txt b/drivers/staging/mt7621-eth/Documentation/devicetree/bindings/net/mediatek-net-gsw.txt deleted file mode 100644 index 596b38552697..000000000000 --- a/drivers/staging/mt7621-eth/Documentation/devicetree/bindings/net/mediatek-net-gsw.txt +++ /dev/null @@ -1,48 +0,0 @@ -Mediatek Gigabit Switch -======================= - -The mediatek gigabit switch can be found on Mediatek SoCs. - -Required properties: -- compatible: Should be "mediatek,mt7620-gsw", "mediatek,mt7621-gsw", - "mediatek,mt7623-gsw" -- reg: Address and length of the register set for the device -- interrupts: Should contain the gigabit switches interrupt - - -Additional required properties for ARM based SoCs: -- mediatek,reset-pin: phandle describing the reset GPIO -- clocks: the clocks used by the switch -- clock-names: the names of the clocks listed in the clocks property - these should be "trgpll", "esw", "gp2", "gp1" -- mt7530-supply: the phandle of the regulator used to power the switch -- mediatek,pctl-regmap: phandle to the port control regmap. this is used to - setup the drive current - - -Optional properties: -- interrupt-parent: Should be the phandle for the interrupt controller - that services interrupts for this device - -Example: - -gsw: switch@1b100000 { - compatible = "mediatek,mt7623-gsw"; - reg = <0 0x1b110000 0 0x300000>; - - interrupt-parent = <&pio>; - interrupts = <168 IRQ_TYPE_EDGE_RISING>; - - clocks = <&apmixedsys CLK_APMIXED_TRGPLL>, - <ðsys CLK_ETHSYS_ESW>, - <ðsys CLK_ETHSYS_GP2>, - <ðsys CLK_ETHSYS_GP1>; - clock-names = "trgpll", "esw", "gp2", "gp1"; - - mt7530-supply = <&mt6323_vpa_reg>; - - mediatek,pctl-regmap = <&syscfg_pctl_a>; - mediatek,reset-pin = <&pio 15 0>; - - status = "okay"; -}; diff --git a/drivers/staging/mt7621-eth/Kconfig b/drivers/staging/mt7621-eth/Kconfig deleted file mode 100644 index 44ea86c7a96c..000000000000 --- a/drivers/staging/mt7621-eth/Kconfig +++ /dev/null @@ -1,39 +0,0 @@ -config NET_VENDOR_MEDIATEK_STAGING - bool "MediaTek ethernet driver - staging version" - depends on RALINK - ---help--- - If you have an MT7621 Mediatek SoC with ethernet, say Y. - -if NET_VENDOR_MEDIATEK_STAGING -choice - prompt "MAC type" - -config NET_MEDIATEK_MT7621 - bool "MT7621" - depends on MIPS && SOC_MT7621 - -endchoice - -config NET_MEDIATEK_SOC_STAGING - tristate "MediaTek SoC Gigabit Ethernet support" - depends on NET_VENDOR_MEDIATEK_STAGING - select PHYLIB - ---help--- - This driver supports the gigabit ethernet MACs in the - MediaTek SoC family. - -config NET_MEDIATEK_MDIO - def_bool NET_MEDIATEK_SOC_STAGING - depends on NET_MEDIATEK_MT7621 - select PHYLIB - -config NET_MEDIATEK_MDIO_MT7620 - def_bool NET_MEDIATEK_SOC_STAGING - depends on NET_MEDIATEK_MT7621 - select NET_MEDIATEK_MDIO - -config NET_MEDIATEK_GSW_MT7621 - def_tristate NET_MEDIATEK_SOC_STAGING - depends on NET_MEDIATEK_MT7621 - -endif #NET_VENDOR_MEDIATEK_STAGING diff --git a/drivers/staging/mt7621-eth/Makefile b/drivers/staging/mt7621-eth/Makefile deleted file mode 100644 index 018bcc3596b3..000000000000 --- a/drivers/staging/mt7621-eth/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# -# Makefile for the Ralink SoCs built-in ethernet macs -# - -mtk-eth-soc-y += mtk_eth_soc.o ethtool.o - -mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MDIO) += mdio.o -mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MDIO_MT7620) += mdio_mt7620.o - -mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MT7621) += soc_mt7621.o - -obj-$(CONFIG_NET_MEDIATEK_GSW_MT7621) += gsw_mt7621.o - -obj-$(CONFIG_NET_MEDIATEK_SOC_STAGING) += mtk-eth-soc.o diff --git a/drivers/staging/mt7621-eth/TODO b/drivers/staging/mt7621-eth/TODO deleted file mode 100644 index f9e47d4b4cd4..000000000000 --- a/drivers/staging/mt7621-eth/TODO +++ /dev/null @@ -1,13 +0,0 @@ - -- verify devicetree documentation is consistent with code -- fix ethtool - currently doesn't return valid data. -- general code review and clean up -- add support for second MAC on mt7621 -- convert gsw code to use switchdev interfaces -- md7620_mmi_write etc should probably be wrapped - in a regmap abstraction. -- Get soc_mt7621 to work with QDMA TX if possible. -- Ensure phys are correctly configured when a cable - is plugged in. - -Cc: NeilBrown <neil@brown.name> diff --git a/drivers/staging/mt7621-eth/ethtool.c b/drivers/staging/mt7621-eth/ethtool.c deleted file mode 100644 index 40a7d47be913..000000000000 --- a/drivers/staging/mt7621-eth/ethtool.c +++ /dev/null @@ -1,249 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#include "mtk_eth_soc.h" -#include "ethtool.h" - -struct mtk_stat { - char name[ETH_GSTRING_LEN]; - unsigned int idx; -}; - -#define MTK_HW_STAT(stat) { \ - .name = #stat, \ - .idx = offsetof(struct mtk_hw_stats, stat) / sizeof(u64) \ -} - -static const struct mtk_stat mtk_ethtool_hw_stats[] = { - MTK_HW_STAT(tx_bytes), - MTK_HW_STAT(tx_packets), - MTK_HW_STAT(tx_skip), - MTK_HW_STAT(tx_collisions), - MTK_HW_STAT(rx_bytes), - MTK_HW_STAT(rx_packets), - MTK_HW_STAT(rx_overflow), - MTK_HW_STAT(rx_fcs_errors), - MTK_HW_STAT(rx_short_errors), - MTK_HW_STAT(rx_long_errors), - MTK_HW_STAT(rx_checksum_errors), - MTK_HW_STAT(rx_flow_control_packets), -}; - -#define MTK_HW_STATS_LEN ARRAY_SIZE(mtk_ethtool_hw_stats) - -static int mtk_get_link_ksettings(struct net_device *dev, - struct ethtool_link_ksettings *cmd) -{ - struct mtk_mac *mac = netdev_priv(dev); - int err; - - if (!mac->phy_dev) - return -ENODEV; - - if (mac->phy_flags == MTK_PHY_FLAG_ATTACH) { - err = phy_read_status(mac->phy_dev); - if (err) - return -ENODEV; - } - - phy_ethtool_ksettings_get(mac->phy_dev, cmd); - return 0; -} - -static int mtk_set_link_ksettings(struct net_device *dev, - const struct ethtool_link_ksettings *cmd) -{ - struct mtk_mac *mac = netdev_priv(dev); - - if (!mac->phy_dev) - return -ENODEV; - - if (cmd->base.phy_address != mac->phy_dev->mdio.addr) { - if (mac->hw->phy->phy_node[cmd->base.phy_address]) { - mac->phy_dev = mac->hw->phy->phy[cmd->base.phy_address]; - mac->phy_flags = MTK_PHY_FLAG_PORT; - } else if (mac->hw->mii_bus) { - mac->phy_dev = mdiobus_get_phy(mac->hw->mii_bus, - cmd->base.phy_address); - if (!mac->phy_dev) - return -ENODEV; - mac->phy_flags = MTK_PHY_FLAG_ATTACH; - } else { - return -ENODEV; - } - } - - return phy_ethtool_ksettings_set(mac->phy_dev, cmd); -} - -static void mtk_get_drvinfo(struct net_device *dev, - struct ethtool_drvinfo *info) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_soc_data *soc = mac->hw->soc; - - strlcpy(info->driver, mac->hw->dev->driver->name, sizeof(info->driver)); - strlcpy(info->bus_info, dev_name(mac->hw->dev), sizeof(info->bus_info)); - - if (soc->reg_table[MTK_REG_MTK_COUNTER_BASE]) - info->n_stats = MTK_HW_STATS_LEN; -} - -static u32 mtk_get_msglevel(struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - - return mac->hw->msg_enable; -} - -static void mtk_set_msglevel(struct net_device *dev, u32 value) -{ - struct mtk_mac *mac = netdev_priv(dev); - - mac->hw->msg_enable = value; -} - -static int mtk_nway_reset(struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - - if (!mac->phy_dev) - return -EOPNOTSUPP; - - return genphy_restart_aneg(mac->phy_dev); -} - -static u32 mtk_get_link(struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - int err; - - if (!mac->phy_dev) - goto out_get_link; - - if (mac->phy_flags == MTK_PHY_FLAG_ATTACH) { - err = genphy_update_link(mac->phy_dev); - if (err) - goto out_get_link; - } - - return mac->phy_dev->link; - -out_get_link: - return ethtool_op_get_link(dev); -} - -static int mtk_set_ringparam(struct net_device *dev, - struct ethtool_ringparam *ring) -{ - struct mtk_mac *mac = netdev_priv(dev); - - if ((ring->tx_pending < 2) || - (ring->rx_pending < 2) || - (ring->rx_pending > mac->hw->soc->dma_ring_size) || - (ring->tx_pending > mac->hw->soc->dma_ring_size)) - return -EINVAL; - - dev->netdev_ops->ndo_stop(dev); - - mac->hw->tx_ring.tx_ring_size = BIT(fls(ring->tx_pending) - 1); - mac->hw->rx_ring[0].rx_ring_size = BIT(fls(ring->rx_pending) - 1); - - return dev->netdev_ops->ndo_open(dev); -} - -static void mtk_get_ringparam(struct net_device *dev, - struct ethtool_ringparam *ring) -{ - struct mtk_mac *mac = netdev_priv(dev); - - ring->rx_max_pending = mac->hw->soc->dma_ring_size; - ring->tx_max_pending = mac->hw->soc->dma_ring_size; - ring->rx_pending = mac->hw->rx_ring[0].rx_ring_size; - ring->tx_pending = mac->hw->tx_ring.tx_ring_size; -} - -static void mtk_get_strings(struct net_device *dev, u32 stringset, u8 *data) -{ - int i; - - switch (stringset) { - case ETH_SS_STATS: - for (i = 0; i < MTK_HW_STATS_LEN; i++) { - memcpy(data, mtk_ethtool_hw_stats[i].name, - ETH_GSTRING_LEN); - data += ETH_GSTRING_LEN; - } - break; - } -} - -static int mtk_get_sset_count(struct net_device *dev, int sset) -{ - switch (sset) { - case ETH_SS_STATS: - return MTK_HW_STATS_LEN; - default: - return -EOPNOTSUPP; - } -} - -static void mtk_get_ethtool_stats(struct net_device *dev, - struct ethtool_stats *stats, u64 *data) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_hw_stats *hwstats = mac->hw_stats; - unsigned int start; - int i; - - if (netif_running(dev) && netif_device_present(dev)) { - if (spin_trylock(&hwstats->stats_lock)) { - mtk_stats_update_mac(mac); - spin_unlock(&hwstats->stats_lock); - } - } - - do { - start = u64_stats_fetch_begin_irq(&hwstats->syncp); - for (i = 0; i < MTK_HW_STATS_LEN; i++) - data[i] = ((u64 *)hwstats)[mtk_ethtool_hw_stats[i].idx]; - - } while (u64_stats_fetch_retry_irq(&hwstats->syncp, start)); -} - -static struct ethtool_ops mtk_ethtool_ops = { - .get_link_ksettings = mtk_get_link_ksettings, - .set_link_ksettings = mtk_set_link_ksettings, - .get_drvinfo = mtk_get_drvinfo, - .get_msglevel = mtk_get_msglevel, - .set_msglevel = mtk_set_msglevel, - .nway_reset = mtk_nway_reset, - .get_link = mtk_get_link, - .set_ringparam = mtk_set_ringparam, - .get_ringparam = mtk_get_ringparam, -}; - -void mtk_set_ethtool_ops(struct net_device *netdev) -{ - struct mtk_mac *mac = netdev_priv(netdev); - struct mtk_soc_data *soc = mac->hw->soc; - - if (soc->reg_table[MTK_REG_MTK_COUNTER_BASE]) { - mtk_ethtool_ops.get_strings = mtk_get_strings; - mtk_ethtool_ops.get_sset_count = mtk_get_sset_count; - mtk_ethtool_ops.get_ethtool_stats = mtk_get_ethtool_stats; - } - - netdev->ethtool_ops = &mtk_ethtool_ops; -} diff --git a/drivers/staging/mt7621-eth/ethtool.h b/drivers/staging/mt7621-eth/ethtool.h deleted file mode 100644 index 40b4cf011660..000000000000 --- a/drivers/staging/mt7621-eth/ethtool.h +++ /dev/null @@ -1,22 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#ifndef MTK_ETHTOOL_H -#define MTK_ETHTOOL_H - -#include <linux/ethtool.h> - -void mtk_set_ethtool_ops(struct net_device *netdev); - -#endif /* MTK_ETHTOOL_H */ diff --git a/drivers/staging/mt7621-eth/gsw_mt7620.h b/drivers/staging/mt7621-eth/gsw_mt7620.h deleted file mode 100644 index 70f7e5481952..000000000000 --- a/drivers/staging/mt7621-eth/gsw_mt7620.h +++ /dev/null @@ -1,277 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#ifndef _RALINK_GSW_MT7620_H__ -#define _RALINK_GSW_MT7620_H__ - -#define GSW_REG_PHY_TIMEOUT (5 * HZ) - -#define MT7620_GSW_REG_PIAC 0x0004 - -#define GSW_NUM_VLANS 16 -#define GSW_NUM_VIDS 4096 -#define GSW_NUM_PORTS 7 -#define GSW_PORT6 6 - -#define GSW_MDIO_ACCESS BIT(31) -#define GSW_MDIO_READ BIT(19) -#define GSW_MDIO_WRITE BIT(18) -#define GSW_MDIO_START BIT(16) -#define GSW_MDIO_ADDR_SHIFT 20 -#define GSW_MDIO_REG_SHIFT 25 - -#define GSW_REG_PORT_PMCR(x) (0x3000 + (x * 0x100)) -#define GSW_REG_PORT_STATUS(x) (0x3008 + (x * 0x100)) -#define GSW_REG_SMACCR0 0x3fE4 -#define GSW_REG_SMACCR1 0x3fE8 -#define GSW_REG_CKGCR 0x3ff0 - -#define GSW_REG_IMR 0x7008 -#define GSW_REG_ISR 0x700c -#define GSW_REG_GPC1 0x7014 - -#define SYSC_REG_CHIP_REV_ID 0x0c -#define SYSC_REG_CFG 0x10 -#define SYSC_REG_CFG1 0x14 -#define RST_CTRL_MCM BIT(2) -#define SYSC_PAD_RGMII2_MDIO 0x58 -#define SYSC_GPIO_MODE 0x60 - -#define PORT_IRQ_ST_CHG 0x7f - -#define MT7621_ESW_PHY_POLLING 0x0000 -#define MT7620_ESW_PHY_POLLING 0x7000 - -#define PMCR_IPG BIT(18) -#define PMCR_MAC_MODE BIT(16) -#define PMCR_FORCE BIT(15) -#define PMCR_TX_EN BIT(14) -#define PMCR_RX_EN BIT(13) -#define PMCR_BACKOFF BIT(9) -#define PMCR_BACKPRES BIT(8) -#define PMCR_RX_FC BIT(5) -#define PMCR_TX_FC BIT(4) -#define PMCR_SPEED(_x) (_x << 2) -#define PMCR_DUPLEX BIT(1) -#define PMCR_LINK BIT(0) - -#define PHY_AN_EN BIT(31) -#define PHY_PRE_EN BIT(30) -#define PMY_MDC_CONF(_x) ((_x & 0x3f) << 24) - -/* ethernet subsystem config register */ -#define ETHSYS_SYSCFG0 0x14 -/* ethernet subsystem clock register */ -#define ETHSYS_CLKCFG0 0x2c -#define ETHSYS_TRGMII_CLK_SEL362_5 BIT(11) - -/* p5 RGMII wrapper TX clock control register */ -#define MT7530_P5RGMIITXCR 0x7b04 -/* p5 RGMII wrapper RX clock control register */ -#define MT7530_P5RGMIIRXCR 0x7b00 -/* TRGMII TDX ODT registers */ -#define MT7530_TRGMII_TD0_ODT 0x7a54 -#define MT7530_TRGMII_TD1_ODT 0x7a5c -#define MT7530_TRGMII_TD2_ODT 0x7a64 -#define MT7530_TRGMII_TD3_ODT 0x7a6c -#define MT7530_TRGMII_TD4_ODT 0x7a74 -#define MT7530_TRGMII_TD5_ODT 0x7a7c -/* TRGMII TCK ctrl register */ -#define MT7530_TRGMII_TCK_CTRL 0x7a78 -/* TRGMII Tx ctrl register */ -#define MT7530_TRGMII_TXCTRL 0x7a40 -/* port 6 extended control register */ -#define MT7530_P6ECR 0x7830 -/* IO driver control register */ -#define MT7530_IO_DRV_CR 0x7810 -/* top signal control register */ -#define MT7530_TOP_SIG_CTRL 0x7808 -/* modified hwtrap register */ -#define MT7530_MHWTRAP 0x7804 -/* hwtrap status register */ -#define MT7530_HWTRAP 0x7800 -/* status interrupt register */ -#define MT7530_SYS_INT_STS 0x700c -/* system nterrupt register */ -#define MT7530_SYS_INT_EN 0x7008 -/* system control register */ -#define MT7530_SYS_CTRL 0x7000 -/* port MAC status register */ -#define MT7530_PMSR_P(x) (0x3008 + (x * 0x100)) -/* port MAC control register */ -#define MT7530_PMCR_P(x) (0x3000 + (x * 0x100)) - -#define MT7621_XTAL_SHIFT 6 -#define MT7621_XTAL_MASK 0x7 -#define MT7621_XTAL_25 6 -#define MT7621_XTAL_40 3 -#define MT7621_MDIO_DRV_MASK (3 << 4) -#define MT7621_GE1_MODE_MASK (3 << 12) - -#define TRGMII_TXCTRL_TXC_INV BIT(30) -#define P6ECR_INTF_MODE_RGMII BIT(1) -#define P5RGMIIRXCR_C_ALIGN BIT(8) -#define P5RGMIIRXCR_DELAY_2 BIT(1) -#define P5RGMIITXCR_DELAY_2 (BIT(8) | BIT(2)) - -/* TOP_SIG_CTRL bits */ -#define TOP_SIG_CTRL_NORMAL (BIT(17) | BIT(16)) - -/* MHWTRAP bits */ -#define MHWTRAP_MANUAL BIT(16) -#define MHWTRAP_P5_MAC_SEL BIT(13) -#define MHWTRAP_P6_DIS BIT(8) -#define MHWTRAP_P5_RGMII_MODE BIT(7) -#define MHWTRAP_P5_DIS BIT(6) -#define MHWTRAP_PHY_ACCESS BIT(5) - -/* HWTRAP bits */ -#define HWTRAP_XTAL_SHIFT 9 -#define HWTRAP_XTAL_MASK 0x3 - -/* SYS_CTRL bits */ -#define SYS_CTRL_SW_RST BIT(1) -#define SYS_CTRL_REG_RST BIT(0) - -/* PMCR bits */ -#define PMCR_IFG_XMIT_96 BIT(18) -#define PMCR_MAC_MODE BIT(16) -#define PMCR_FORCE_MODE BIT(15) -#define PMCR_TX_EN BIT(14) -#define PMCR_RX_EN BIT(13) -#define PMCR_BACK_PRES_EN BIT(9) -#define PMCR_BACKOFF_EN BIT(8) -#define PMCR_TX_FC_EN BIT(5) -#define PMCR_RX_FC_EN BIT(4) -#define PMCR_FORCE_SPEED_1000 BIT(3) -#define PMCR_FORCE_FDX BIT(1) -#define PMCR_FORCE_LNK BIT(0) -#define PMCR_FIXED_LINK (PMCR_IFG_XMIT_96 | PMCR_MAC_MODE | \ - PMCR_FORCE_MODE | PMCR_TX_EN | PMCR_RX_EN | \ - PMCR_BACK_PRES_EN | PMCR_BACKOFF_EN | \ - PMCR_FORCE_SPEED_1000 | PMCR_FORCE_FDX | \ - PMCR_FORCE_LNK) - -#define PMCR_FIXED_LINK_FC (PMCR_FIXED_LINK | \ - PMCR_TX_FC_EN | PMCR_RX_FC_EN) - -/* TRGMII control registers */ -#define GSW_INTF_MODE 0x390 -#define GSW_TRGMII_TD0_ODT 0x354 -#define GSW_TRGMII_TD1_ODT 0x35c -#define GSW_TRGMII_TD2_ODT 0x364 -#define GSW_TRGMII_TD3_ODT 0x36c -#define GSW_TRGMII_TXCTL_ODT 0x374 -#define GSW_TRGMII_TCK_ODT 0x37c -#define GSW_TRGMII_RCK_CTRL 0x300 - -#define INTF_MODE_TRGMII BIT(1) -#define TRGMII_RCK_CTRL_RX_RST BIT(31) - -/* Mac control registers */ -#define MTK_MAC_P2_MCR 0x200 -#define MTK_MAC_P1_MCR 0x100 - -#define MAC_MCR_MAX_RX_2K BIT(29) -#define MAC_MCR_IPG_CFG (BIT(18) | BIT(16)) -#define MAC_MCR_FORCE_MODE BIT(15) -#define MAC_MCR_TX_EN BIT(14) -#define MAC_MCR_RX_EN BIT(13) -#define MAC_MCR_BACKOFF_EN BIT(9) -#define MAC_MCR_BACKPR_EN BIT(8) -#define MAC_MCR_FORCE_RX_FC BIT(5) -#define MAC_MCR_FORCE_TX_FC BIT(4) -#define MAC_MCR_SPEED_1000 BIT(3) -#define MAC_MCR_FORCE_DPX BIT(1) -#define MAC_MCR_FORCE_LINK BIT(0) -#define MAC_MCR_FIXED_LINK (MAC_MCR_MAX_RX_2K | MAC_MCR_IPG_CFG | \ - MAC_MCR_FORCE_MODE | MAC_MCR_TX_EN | \ - MAC_MCR_RX_EN | MAC_MCR_BACKOFF_EN | \ - MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_RX_FC | \ - MAC_MCR_FORCE_TX_FC | MAC_MCR_SPEED_1000 | \ - MAC_MCR_FORCE_DPX | MAC_MCR_FORCE_LINK) -#define MAC_MCR_FIXED_LINK_FC (MAC_MCR_MAX_RX_2K | MAC_MCR_IPG_CFG | \ - MAC_MCR_FIXED_LINK) - -/* possible XTAL speed */ -#define MT7623_XTAL_40 0 -#define MT7623_XTAL_20 1 -#define MT7623_XTAL_25 3 - -/* GPIO port control registers */ -#define GPIO_OD33_CTRL8 0x4c0 -#define GPIO_BIAS_CTRL 0xed0 -#define GPIO_DRV_SEL10 0xf00 - -/* on MT7620 the functio of port 4 can be software configured */ -enum { - PORT4_EPHY = 0, - PORT4_EXT, -}; - -/* struct mt7620_gsw - the structure that holds the SoC specific data - * @dev: The Device struct - * @base: The base address - * @piac_offset: The PIAC base may change depending on SoC - * @irq: The IRQ we are using - * @port4: The port4 mode on MT7620 - * @autopoll: Is MDIO autopolling enabled - * @ethsys: The ethsys register map - * @pctl: The pin control register map - * @clk_gsw: The switch clock - * @clk_gp1: The gmac1 clock - * @clk_gp2: The gmac2 clock - * @clk_trgpll: The trgmii pll clock - */ -struct mt7620_gsw { - struct device *dev; - void __iomem *base; - u32 piac_offset; - int irq; - int port4; - unsigned long int autopoll; - - struct regmap *ethsys; - struct regmap *pctl; - - struct clk *clk_gsw; - struct clk *clk_gp1; - struct clk *clk_gp2; - struct clk *clk_trgpll; -}; - -/* switch register I/O wrappers */ -void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned int reg); -u32 mtk_switch_r32(struct mt7620_gsw *gsw, unsigned int reg); - -/* the callback used by the driver core to bringup the switch */ -int mtk_gsw_init(struct mtk_eth *eth); - -/* MDIO access wrappers */ -int mt7620_mdio_write(struct mii_bus *bus, int phy_addr, int phy_reg, u16 val); -int mt7620_mdio_read(struct mii_bus *bus, int phy_addr, int phy_reg); -void mt7620_mdio_link_adjust(struct mtk_eth *eth, int port); -int mt7620_has_carrier(struct mtk_eth *eth); -void mt7620_print_link_state(struct mtk_eth *eth, int port, int link, - int speed, int duplex); -void mt7530_mdio_w32(struct mt7620_gsw *gsw, u32 reg, u32 val); -u32 mt7530_mdio_r32(struct mt7620_gsw *gsw, u32 reg); -void mt7530_mdio_m32(struct mt7620_gsw *gsw, u32 mask, u32 set, u32 reg); - -u32 _mt7620_mii_write(struct mt7620_gsw *gsw, u32 phy_addr, - u32 phy_register, u32 write_data); -u32 _mt7620_mii_read(struct mt7620_gsw *gsw, int phy_addr, int phy_reg); -void mt7620_handle_carrier(struct mtk_eth *eth); - -#endif diff --git a/drivers/staging/mt7621-eth/gsw_mt7621.c b/drivers/staging/mt7621-eth/gsw_mt7621.c deleted file mode 100644 index 53767b17bad9..000000000000 --- a/drivers/staging/mt7621-eth/gsw_mt7621.c +++ /dev/null @@ -1,297 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/platform_device.h> -#include <linux/of_device.h> -#include <linux/of_irq.h> - -#include <ralink_regs.h> - -#include "mtk_eth_soc.h" -#include "gsw_mt7620.h" - -void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned int reg) -{ - iowrite32(val, gsw->base + reg); -} -EXPORT_SYMBOL_GPL(mtk_switch_w32); - -u32 mtk_switch_r32(struct mt7620_gsw *gsw, unsigned int reg) -{ - return ioread32(gsw->base + reg); -} -EXPORT_SYMBOL_GPL(mtk_switch_r32); - -static irqreturn_t gsw_interrupt_mt7621(int irq, void *_eth) -{ - struct mtk_eth *eth = (struct mtk_eth *)_eth; - struct mt7620_gsw *gsw = (struct mt7620_gsw *)eth->sw_priv; - u32 reg, i; - - reg = mt7530_mdio_r32(gsw, MT7530_SYS_INT_STS); - - for (i = 0; i < 5; i++) { - unsigned int link; - - if ((reg & BIT(i)) == 0) - continue; - - link = mt7530_mdio_r32(gsw, MT7530_PMSR_P(i)) & 0x1; - - if (link == eth->link[i]) - continue; - - eth->link[i] = link; - if (link) - netdev_info(*eth->netdev, - "port %d link up\n", i); - else - netdev_info(*eth->netdev, - "port %d link down\n", i); - } - - mt7530_mdio_w32(gsw, MT7530_SYS_INT_STS, 0x1f); - - return IRQ_HANDLED; -} - -static void mt7621_hw_init(struct mtk_eth *eth, struct mt7620_gsw *gsw, - struct device_node *np) -{ - u32 i; - u32 val; - - /* hardware reset the switch */ - mtk_reset(eth, RST_CTRL_MCM); - mdelay(10); - - /* reduce RGMII2 PAD driving strength */ - rt_sysc_m32(MT7621_MDIO_DRV_MASK, 0, SYSC_PAD_RGMII2_MDIO); - - /* gpio mux - RGMII1=Normal mode */ - rt_sysc_m32(BIT(14), 0, SYSC_GPIO_MODE); - - /* set GMAC1 RGMII mode */ - rt_sysc_m32(MT7621_GE1_MODE_MASK, 0, SYSC_REG_CFG1); - - /* enable MDIO to control MT7530 */ - rt_sysc_m32(3 << 12, 0, SYSC_GPIO_MODE); - - /* turn off all PHYs */ - for (i = 0; i <= 4; i++) { - val = _mt7620_mii_read(gsw, i, 0x0); - val |= BIT(11); - _mt7620_mii_write(gsw, i, 0x0, val); - } - - /* reset the switch */ - mt7530_mdio_w32(gsw, MT7530_SYS_CTRL, - SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); - usleep_range(10, 20); - - if ((rt_sysc_r32(SYSC_REG_CHIP_REV_ID) & 0xFFFF) == 0x0101) { - /* GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536 */ - mtk_switch_w32(gsw, MAC_MCR_FIXED_LINK, MTK_MAC_P2_MCR); - mt7530_mdio_w32(gsw, MT7530_PMCR_P(6), PMCR_FIXED_LINK); - } else { - /* GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536 */ - mtk_switch_w32(gsw, MAC_MCR_FIXED_LINK_FC, MTK_MAC_P1_MCR); - mt7530_mdio_w32(gsw, MT7530_PMCR_P(6), PMCR_FIXED_LINK_FC); - } - - /* GE2, Link down */ - mtk_switch_w32(gsw, MAC_MCR_FORCE_MODE, MTK_MAC_P2_MCR); - - /* Enable Port 6, P5 as GMAC5, P5 disable */ - val = mt7530_mdio_r32(gsw, MT7530_MHWTRAP); - /* Enable Port 6 */ - val &= ~MHWTRAP_P6_DIS; - /* Disable Port 5 */ - val |= MHWTRAP_P5_DIS; - /* manual override of HW-Trap */ - val |= MHWTRAP_MANUAL; - mt7530_mdio_w32(gsw, MT7530_MHWTRAP, val); - - val = rt_sysc_r32(SYSC_REG_CFG); - val = (val >> MT7621_XTAL_SHIFT) & MT7621_XTAL_MASK; - if (val < MT7621_XTAL_25 && val >= MT7621_XTAL_40) { - /* 40Mhz */ - - /* disable MT7530 core clock */ - _mt7620_mii_write(gsw, 0, 13, 0x1f); - _mt7620_mii_write(gsw, 0, 14, 0x410); - _mt7620_mii_write(gsw, 0, 13, 0x401f); - _mt7620_mii_write(gsw, 0, 14, 0x0); - - /* disable MT7530 PLL */ - _mt7620_mii_write(gsw, 0, 13, 0x1f); - _mt7620_mii_write(gsw, 0, 14, 0x40d); - _mt7620_mii_write(gsw, 0, 13, 0x401f); - _mt7620_mii_write(gsw, 0, 14, 0x2020); - - /* for MT7530 core clock = 500Mhz */ - _mt7620_mii_write(gsw, 0, 13, 0x1f); - _mt7620_mii_write(gsw, 0, 14, 0x40e); - _mt7620_mii_write(gsw, 0, 13, 0x401f); - _mt7620_mii_write(gsw, 0, 14, 0x119); - - /* enable MT7530 PLL */ - _mt7620_mii_write(gsw, 0, 13, 0x1f); - _mt7620_mii_write(gsw, 0, 14, 0x40d); - _mt7620_mii_write(gsw, 0, 13, 0x401f); - _mt7620_mii_write(gsw, 0, 14, 0x2820); - - usleep_range(20, 40); - - /* enable MT7530 core clock */ - _mt7620_mii_write(gsw, 0, 13, 0x1f); - _mt7620_mii_write(gsw, 0, 14, 0x410); - _mt7620_mii_write(gsw, 0, 13, 0x401f); - } - - /* RGMII */ - _mt7620_mii_write(gsw, 0, 14, 0x1); - - /* set MT7530 central align */ - mt7530_mdio_m32(gsw, BIT(0), P6ECR_INTF_MODE_RGMII, MT7530_P6ECR); - mt7530_mdio_m32(gsw, TRGMII_TXCTRL_TXC_INV, 0, - MT7530_TRGMII_TXCTRL); - mt7530_mdio_w32(gsw, MT7530_TRGMII_TCK_CTRL, 0x855); - - /* delay setting for 10/1000M */ - mt7530_mdio_w32(gsw, MT7530_P5RGMIIRXCR, - P5RGMIIRXCR_C_ALIGN | P5RGMIIRXCR_DELAY_2); - mt7530_mdio_w32(gsw, MT7530_P5RGMIITXCR, 0x14); - - /* lower Tx Driving*/ - mt7530_mdio_w32(gsw, MT7530_TRGMII_TD0_ODT, 0x44); - mt7530_mdio_w32(gsw, MT7530_TRGMII_TD1_ODT, 0x44); - mt7530_mdio_w32(gsw, MT7530_TRGMII_TD2_ODT, 0x44); - mt7530_mdio_w32(gsw, MT7530_TRGMII_TD3_ODT, 0x44); - mt7530_mdio_w32(gsw, MT7530_TRGMII_TD4_ODT, 0x44); - mt7530_mdio_w32(gsw, MT7530_TRGMII_TD5_ODT, 0x44); - - /* turn on all PHYs */ - for (i = 0; i <= 4; i++) { - val = _mt7620_mii_read(gsw, i, 0); - val &= ~BIT(11); - _mt7620_mii_write(gsw, i, 0, val); - } - -#define MT7530_NUM_PORTS 8 -#define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8)) -#define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8)) -#define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8)) -#define MT7530_CPU_PORT 6 - - /* This is copied from mt7530_apply_config in libreCMC driver */ - { - int i; - - for (i = 0; i < MT7530_NUM_PORTS; i++) - mt7530_mdio_w32(gsw, REG_ESW_PORT_PCR(i), 0x00400000); - - mt7530_mdio_w32(gsw, REG_ESW_PORT_PCR(MT7530_CPU_PORT), - 0x00ff0000); - - for (i = 0; i < MT7530_NUM_PORTS; i++) - mt7530_mdio_w32(gsw, REG_ESW_PORT_PVC(i), 0x810000c0); - } - - /* enable irq */ - mt7530_mdio_m32(gsw, 0, 3 << 16, MT7530_TOP_SIG_CTRL); - mt7530_mdio_w32(gsw, MT7530_SYS_INT_EN, 0x1f); -} - -static const struct of_device_id mediatek_gsw_match[] = { - { .compatible = "mediatek,mt7621-gsw" }, - {}, -}; -MODULE_DEVICE_TABLE(of, mediatek_gsw_match); - -int mtk_gsw_init(struct mtk_eth *eth) -{ - struct device_node *np = eth->switch_np; - struct platform_device *pdev = of_find_device_by_node(np); - struct mt7620_gsw *gsw; - - if (!pdev) - return -ENODEV; - - if (!of_device_is_compatible(np, mediatek_gsw_match->compatible)) - return -EINVAL; - - gsw = platform_get_drvdata(pdev); - eth->sw_priv = gsw; - - if (!gsw->irq) - return -EINVAL; - - request_irq(gsw->irq, gsw_interrupt_mt7621, 0, - "gsw", eth); - disable_irq(gsw->irq); - - mt7621_hw_init(eth, gsw, np); - - enable_irq(gsw->irq); - - return 0; -} -EXPORT_SYMBOL_GPL(mtk_gsw_init); - -static int mt7621_gsw_probe(struct platform_device *pdev) -{ - struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - struct mt7620_gsw *gsw; - - gsw = devm_kzalloc(&pdev->dev, sizeof(struct mt7620_gsw), GFP_KERNEL); - if (!gsw) - return -ENOMEM; - - gsw->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(gsw->base)) - return PTR_ERR(gsw->base); - - gsw->dev = &pdev->dev; - gsw->irq = irq_of_parse_and_map(pdev->dev.of_node, 0); - - platform_set_drvdata(pdev, gsw); - - return 0; -} - -static int mt7621_gsw_remove(struct platform_device *pdev) -{ - platform_set_drvdata(pdev, NULL); - - return 0; -} - -static struct platform_driver gsw_driver = { - .probe = mt7621_gsw_probe, - .remove = mt7621_gsw_remove, - .driver = { - .name = "mt7621-gsw", - .of_match_table = mediatek_gsw_match, - }, -}; - -module_platform_driver(gsw_driver); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("John Crispin <blogic@openwrt.org>"); -MODULE_DESCRIPTION("GBit switch driver for Mediatek MT7621 SoC"); diff --git a/drivers/staging/mt7621-eth/mdio.c b/drivers/staging/mt7621-eth/mdio.c deleted file mode 100644 index ee851281b657..000000000000 --- a/drivers/staging/mt7621-eth/mdio.c +++ /dev/null @@ -1,275 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/phy.h> -#include <linux/of_net.h> -#include <linux/of_mdio.h> - -#include "mtk_eth_soc.h" -#include "mdio.h" - -static int mtk_mdio_reset(struct mii_bus *bus) -{ - /* TODO */ - return 0; -} - -static void mtk_phy_link_adjust(struct net_device *dev) -{ - struct mtk_eth *eth = netdev_priv(dev); - unsigned long flags; - int i; - - spin_lock_irqsave(ð->phy->lock, flags); - for (i = 0; i < 8; i++) { - if (eth->phy->phy_node[i]) { - struct phy_device *phydev = eth->phy->phy[i]; - int status_change = 0; - - if (phydev->link) - if (eth->phy->duplex[i] != phydev->duplex || - eth->phy->speed[i] != phydev->speed) - status_change = 1; - - if (phydev->link != eth->link[i]) - status_change = 1; - - switch (phydev->speed) { - case SPEED_1000: - case SPEED_100: - case SPEED_10: - eth->link[i] = phydev->link; - eth->phy->duplex[i] = phydev->duplex; - eth->phy->speed[i] = phydev->speed; - - if (status_change && - eth->soc->mdio_adjust_link) - eth->soc->mdio_adjust_link(eth, i); - break; - } - } - } - spin_unlock_irqrestore(ð->phy->lock, flags); -} - -int mtk_connect_phy_node(struct mtk_eth *eth, struct mtk_mac *mac, - struct device_node *phy_node) -{ - const __be32 *_port = NULL; - struct phy_device *phydev; - int phy_mode, port; - - _port = of_get_property(phy_node, "reg", NULL); - - if (!_port || (be32_to_cpu(*_port) >= 0x20)) { - pr_err("%pOFn: invalid port id\n", phy_node); - return -EINVAL; - } - port = be32_to_cpu(*_port); - phy_mode = of_get_phy_mode(phy_node); - if (phy_mode < 0) { - dev_err(eth->dev, "incorrect phy-mode %d\n", phy_mode); - eth->phy->phy_node[port] = NULL; - return -EINVAL; - } - - phydev = of_phy_connect(eth->netdev[mac->id], phy_node, - mtk_phy_link_adjust, 0, phy_mode); - if (!phydev) { - dev_err(eth->dev, "could not connect to PHY\n"); - eth->phy->phy_node[port] = NULL; - return -ENODEV; - } - - phydev->supported &= PHY_GBIT_FEATURES; - phydev->advertising = phydev->supported; - - dev_info(eth->dev, - "connected port %d to PHY at %s [uid=%08x, driver=%s]\n", - port, phydev_name(phydev), phydev->phy_id, - phydev->drv->name); - - eth->phy->phy[port] = phydev; - eth->link[port] = 0; - - return 0; -} - -static void phy_init(struct mtk_eth *eth, struct mtk_mac *mac, - struct phy_device *phy) -{ - phy_attach(eth->netdev[mac->id], phydev_name(phy), - PHY_INTERFACE_MODE_MII); - - phy->autoneg = AUTONEG_ENABLE; - phy->speed = 0; - phy->duplex = 0; - phy_set_max_speed(phy, SPEED_100); - phy->advertising = phy->supported | ADVERTISED_Autoneg; - - phy_start_aneg(phy); -} - -static int mtk_phy_connect(struct mtk_mac *mac) -{ - struct mtk_eth *eth = mac->hw; - int i; - - for (i = 0; i < 8; i++) { - if (eth->phy->phy_node[i]) { - if (!mac->phy_dev) { - mac->phy_dev = eth->phy->phy[i]; - mac->phy_flags = MTK_PHY_FLAG_PORT; - } - } else if (eth->mii_bus) { - struct phy_device *phy; - - phy = mdiobus_get_phy(eth->mii_bus, i); - if (phy) { - phy_init(eth, mac, phy); - if (!mac->phy_dev) { - mac->phy_dev = phy; - mac->phy_flags = MTK_PHY_FLAG_ATTACH; - } - } - } - } - - return 0; -} - -static void mtk_phy_disconnect(struct mtk_mac *mac) -{ - struct mtk_eth *eth = mac->hw; - unsigned long flags; - int i; - - for (i = 0; i < 8; i++) - if (eth->phy->phy_fixed[i]) { - spin_lock_irqsave(ð->phy->lock, flags); - eth->link[i] = 0; - if (eth->soc->mdio_adjust_link) - eth->soc->mdio_adjust_link(eth, i); - spin_unlock_irqrestore(ð->phy->lock, flags); - } else if (eth->phy->phy[i]) { - phy_disconnect(eth->phy->phy[i]); - } else if (eth->mii_bus) { - struct phy_device *phy = - mdiobus_get_phy(eth->mii_bus, i); - - if (phy) - phy_detach(phy); - } -} - -static void mtk_phy_start(struct mtk_mac *mac) -{ - struct mtk_eth *eth = mac->hw; - unsigned long flags; - int i; - - for (i = 0; i < 8; i++) { - if (eth->phy->phy_fixed[i]) { - spin_lock_irqsave(ð->phy->lock, flags); - eth->link[i] = 1; - if (eth->soc->mdio_adjust_link) - eth->soc->mdio_adjust_link(eth, i); - spin_unlock_irqrestore(ð->phy->lock, flags); - } else if (eth->phy->phy[i]) { - phy_start(eth->phy->phy[i]); - } - } -} - -static void mtk_phy_stop(struct mtk_mac *mac) -{ - struct mtk_eth *eth = mac->hw; - unsigned long flags; - int i; - - for (i = 0; i < 8; i++) - if (eth->phy->phy_fixed[i]) { - spin_lock_irqsave(ð->phy->lock, flags); - eth->link[i] = 0; - if (eth->soc->mdio_adjust_link) - eth->soc->mdio_adjust_link(eth, i); - spin_unlock_irqrestore(ð->phy->lock, flags); - } else if (eth->phy->phy[i]) { - phy_stop(eth->phy->phy[i]); - } -} - -static struct mtk_phy phy_ralink = { - .connect = mtk_phy_connect, - .disconnect = mtk_phy_disconnect, - .start = mtk_phy_start, - .stop = mtk_phy_stop, -}; - -int mtk_mdio_init(struct mtk_eth *eth) -{ - struct device_node *mii_np; - int err; - - if (!eth->soc->mdio_read || !eth->soc->mdio_write) - return 0; - - spin_lock_init(&phy_ralink.lock); - eth->phy = &phy_ralink; - - mii_np = of_get_child_by_name(eth->dev->of_node, "mdio-bus"); - if (!mii_np) { - dev_err(eth->dev, "no %s child node found", "mdio-bus"); - return -ENODEV; - } - - if (!of_device_is_available(mii_np)) { - err = 0; - goto err_put_node; - } - - eth->mii_bus = mdiobus_alloc(); - if (!eth->mii_bus) { - err = -ENOMEM; - goto err_put_node; - } - - eth->mii_bus->name = "mdio"; - eth->mii_bus->read = eth->soc->mdio_read; - eth->mii_bus->write = eth->soc->mdio_write; - eth->mii_bus->reset = mtk_mdio_reset; - eth->mii_bus->priv = eth; - eth->mii_bus->parent = eth->dev; - - snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np); - err = of_mdiobus_register(eth->mii_bus, mii_np); - if (err) - goto err_free_bus; - - return 0; - -err_free_bus: - kfree(eth->mii_bus); -err_put_node: - of_node_put(mii_np); - eth->mii_bus = NULL; - return err; -} - -void mtk_mdio_cleanup(struct mtk_eth *eth) -{ - if (!eth->mii_bus) - return; - - mdiobus_unregister(eth->mii_bus); - of_node_put(eth->mii_bus->dev.of_node); - kfree(eth->mii_bus); -} diff --git a/drivers/staging/mt7621-eth/mdio.h b/drivers/staging/mt7621-eth/mdio.h deleted file mode 100644 index b14e23842a01..000000000000 --- a/drivers/staging/mt7621-eth/mdio.h +++ /dev/null @@ -1,27 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#ifndef _RALINK_MDIO_H__ -#define _RALINK_MDIO_H__ - -#ifdef CONFIG_NET_MEDIATEK_MDIO -int mtk_mdio_init(struct mtk_eth *eth); -void mtk_mdio_cleanup(struct mtk_eth *eth); -int mtk_connect_phy_node(struct mtk_eth *eth, struct mtk_mac *mac, - struct device_node *phy_node); -#else -static inline int mtk_mdio_init(struct mtk_eth *eth) { return 0; } -static inline void mtk_mdio_cleanup(struct mtk_eth *eth) {} -#endif -#endif diff --git a/drivers/staging/mt7621-eth/mdio_mt7620.c b/drivers/staging/mt7621-eth/mdio_mt7620.c deleted file mode 100644 index ced605c2914e..000000000000 --- a/drivers/staging/mt7621-eth/mdio_mt7620.c +++ /dev/null @@ -1,173 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/types.h> - -#include "mtk_eth_soc.h" -#include "gsw_mt7620.h" -#include "mdio.h" - -static int mt7620_mii_busy_wait(struct mt7620_gsw *gsw) -{ - unsigned long t_start = jiffies; - - while (1) { - if (!(mtk_switch_r32(gsw, - gsw->piac_offset + MT7620_GSW_REG_PIAC) & - GSW_MDIO_ACCESS)) - return 0; - if (time_after(jiffies, t_start + GSW_REG_PHY_TIMEOUT)) - break; - } - - dev_err(gsw->dev, "mdio: MDIO timeout\n"); - return -1; -} - -u32 _mt7620_mii_write(struct mt7620_gsw *gsw, u32 phy_addr, - u32 phy_register, u32 write_data) -{ - if (mt7620_mii_busy_wait(gsw)) - return -1; - - write_data &= 0xffff; - - mtk_switch_w32(gsw, GSW_MDIO_ACCESS | GSW_MDIO_START | GSW_MDIO_WRITE | - (phy_register << GSW_MDIO_REG_SHIFT) | - (phy_addr << GSW_MDIO_ADDR_SHIFT) | write_data, - MT7620_GSW_REG_PIAC); - - if (mt7620_mii_busy_wait(gsw)) - return -1; - - return 0; -} -EXPORT_SYMBOL_GPL(_mt7620_mii_write); - -u32 _mt7620_mii_read(struct mt7620_gsw *gsw, int phy_addr, int phy_reg) -{ - u32 d; - - if (mt7620_mii_busy_wait(gsw)) - return 0xffff; - - mtk_switch_w32(gsw, GSW_MDIO_ACCESS | GSW_MDIO_START | GSW_MDIO_READ | - (phy_reg << GSW_MDIO_REG_SHIFT) | - (phy_addr << GSW_MDIO_ADDR_SHIFT), - MT7620_GSW_REG_PIAC); - - if (mt7620_mii_busy_wait(gsw)) - return 0xffff; - - d = mtk_switch_r32(gsw, MT7620_GSW_REG_PIAC) & 0xffff; - - return d; -} -EXPORT_SYMBOL_GPL(_mt7620_mii_read); - -int mt7620_mdio_write(struct mii_bus *bus, int phy_addr, int phy_reg, u16 val) -{ - struct mtk_eth *eth = bus->priv; - struct mt7620_gsw *gsw = (struct mt7620_gsw *)eth->sw_priv; - - return _mt7620_mii_write(gsw, phy_addr, phy_reg, val); -} - -int mt7620_mdio_read(struct mii_bus *bus, int phy_addr, int phy_reg) -{ - struct mtk_eth *eth = bus->priv; - struct mt7620_gsw *gsw = (struct mt7620_gsw *)eth->sw_priv; - - return _mt7620_mii_read(gsw, phy_addr, phy_reg); -} - -void mt7530_mdio_w32(struct mt7620_gsw *gsw, u32 reg, u32 val) -{ - _mt7620_mii_write(gsw, 0x1f, 0x1f, (reg >> 6) & 0x3ff); - _mt7620_mii_write(gsw, 0x1f, (reg >> 2) & 0xf, val & 0xffff); - _mt7620_mii_write(gsw, 0x1f, 0x10, val >> 16); -} -EXPORT_SYMBOL_GPL(mt7530_mdio_w32); - -u32 mt7530_mdio_r32(struct mt7620_gsw *gsw, u32 reg) -{ - u16 high, low; - - _mt7620_mii_write(gsw, 0x1f, 0x1f, (reg >> 6) & 0x3ff); - low = _mt7620_mii_read(gsw, 0x1f, (reg >> 2) & 0xf); - high = _mt7620_mii_read(gsw, 0x1f, 0x10); - - return (high << 16) | (low & 0xffff); -} -EXPORT_SYMBOL_GPL(mt7530_mdio_r32); - -void mt7530_mdio_m32(struct mt7620_gsw *gsw, u32 mask, u32 set, u32 reg) -{ - u32 val = mt7530_mdio_r32(gsw, reg); - - val &= ~mask; - val |= set; - mt7530_mdio_w32(gsw, reg, val); -} -EXPORT_SYMBOL_GPL(mt7530_mdio_m32); - -static unsigned char *mtk_speed_str(int speed) -{ - switch (speed) { - case 2: - case SPEED_1000: - return "1000"; - case 1: - case SPEED_100: - return "100"; - case 0: - case SPEED_10: - return "10"; - } - - return "? "; -} - -int mt7620_has_carrier(struct mtk_eth *eth) -{ - struct mt7620_gsw *gsw = (struct mt7620_gsw *)eth->sw_priv; - int i; - - for (i = 0; i < GSW_PORT6; i++) - if (mt7530_mdio_r32(gsw, GSW_REG_PORT_STATUS(i)) & 0x1) - return 1; - return 0; -} - -void mt7620_print_link_state(struct mtk_eth *eth, int port, int link, - int speed, int duplex) -{ - struct mt7620_gsw *gsw = eth->sw_priv; - - if (link) - dev_info(gsw->dev, "port %d link up (%sMbps/%s duplex)\n", - port, mtk_speed_str(speed), - (duplex) ? "Full" : "Half"); - else - dev_info(gsw->dev, "port %d link down\n", port); -} - -void mt7620_mdio_link_adjust(struct mtk_eth *eth, int port) -{ - mt7620_print_link_state(eth, port, eth->link[port], - eth->phy->speed[port], - (eth->phy->duplex[port] == DUPLEX_FULL)); -} diff --git a/drivers/staging/mt7621-eth/mtk_eth_soc.c b/drivers/staging/mt7621-eth/mtk_eth_soc.c deleted file mode 100644 index 363d3c978e02..000000000000 --- a/drivers/staging/mt7621-eth/mtk_eth_soc.c +++ /dev/null @@ -1,2178 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/dma-mapping.h> -#include <linux/init.h> -#include <linux/skbuff.h> -#include <linux/etherdevice.h> -#include <linux/ethtool.h> -#include <linux/platform_device.h> -#include <linux/of_device.h> -#include <linux/mfd/syscon.h> -#include <linux/clk.h> -#include <linux/of_net.h> -#include <linux/of_mdio.h> -#include <linux/if_vlan.h> -#include <linux/reset.h> -#include <linux/tcp.h> -#include <linux/io.h> -#include <linux/bug.h> -#include <linux/regmap.h> - -#include "mtk_eth_soc.h" -#include "mdio.h" -#include "ethtool.h" - -#define MAX_RX_LENGTH 1536 -#define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN) -#define MTK_RX_HLEN (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN) -#define DMA_DUMMY_DESC 0xffffffff -#define MTK_DEFAULT_MSG_ENABLE \ - (NETIF_MSG_DRV | \ - NETIF_MSG_PROBE | \ - NETIF_MSG_LINK | \ - NETIF_MSG_TIMER | \ - NETIF_MSG_IFDOWN | \ - NETIF_MSG_IFUP | \ - NETIF_MSG_RX_ERR | \ - NETIF_MSG_TX_ERR) - -#define TX_DMA_DESP2_DEF (TX_DMA_LS0 | TX_DMA_DONE) -#define NEXT_TX_DESP_IDX(X) (((X) + 1) & (ring->tx_ring_size - 1)) -#define NEXT_RX_DESP_IDX(X) (((X) + 1) & (ring->rx_ring_size - 1)) - -#define SYSC_REG_RSTCTRL 0x34 - -static int mtk_msg_level = -1; -module_param_named(msg_level, mtk_msg_level, int, 0); -MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); - -static const u16 mtk_reg_table_default[MTK_REG_COUNT] = { - [MTK_REG_PDMA_GLO_CFG] = MTK_PDMA_GLO_CFG, - [MTK_REG_PDMA_RST_CFG] = MTK_PDMA_RST_CFG, - [MTK_REG_DLY_INT_CFG] = MTK_DLY_INT_CFG, - [MTK_REG_TX_BASE_PTR0] = MTK_TX_BASE_PTR0, - [MTK_REG_TX_MAX_CNT0] = MTK_TX_MAX_CNT0, - [MTK_REG_TX_CTX_IDX0] = MTK_TX_CTX_IDX0, - [MTK_REG_TX_DTX_IDX0] = MTK_TX_DTX_IDX0, - [MTK_REG_RX_BASE_PTR0] = MTK_RX_BASE_PTR0, - [MTK_REG_RX_MAX_CNT0] = MTK_RX_MAX_CNT0, - [MTK_REG_RX_CALC_IDX0] = MTK_RX_CALC_IDX0, - [MTK_REG_RX_DRX_IDX0] = MTK_RX_DRX_IDX0, - [MTK_REG_MTK_INT_ENABLE] = MTK_INT_ENABLE, - [MTK_REG_MTK_INT_STATUS] = MTK_INT_STATUS, - [MTK_REG_MTK_DMA_VID_BASE] = MTK_DMA_VID0, - [MTK_REG_MTK_COUNTER_BASE] = MTK_GDMA1_TX_GBCNT, - [MTK_REG_MTK_RST_GL] = MTK_RST_GL, -}; - -static const u16 *mtk_reg_table = mtk_reg_table_default; - -void mtk_w32(struct mtk_eth *eth, u32 val, unsigned int reg) -{ - __raw_writel(val, eth->base + reg); -} - -u32 mtk_r32(struct mtk_eth *eth, unsigned int reg) -{ - return __raw_readl(eth->base + reg); -} - -static void mtk_reg_w32(struct mtk_eth *eth, u32 val, enum mtk_reg reg) -{ - mtk_w32(eth, val, mtk_reg_table[reg]); -} - -static u32 mtk_reg_r32(struct mtk_eth *eth, enum mtk_reg reg) -{ - return mtk_r32(eth, mtk_reg_table[reg]); -} - -/* these bits are also exposed via the reset-controller API. however the switch - * and FE need to be brought out of reset in the exakt same moemtn and the - * reset-controller api does not provide this feature yet. Do the reset manually - * until we fixed the reset-controller api to be able to do this - */ -void mtk_reset(struct mtk_eth *eth, u32 reset_bits) -{ - u32 val; - - regmap_read(eth->ethsys, SYSC_REG_RSTCTRL, &val); - val |= reset_bits; - regmap_write(eth->ethsys, SYSC_REG_RSTCTRL, val); - usleep_range(10, 20); - val &= ~reset_bits; - regmap_write(eth->ethsys, SYSC_REG_RSTCTRL, val); - usleep_range(10, 20); -} -EXPORT_SYMBOL(mtk_reset); - -static inline void mtk_irq_ack(struct mtk_eth *eth, u32 mask) -{ - if (eth->soc->dma_type & MTK_PDMA) - mtk_reg_w32(eth, mask, MTK_REG_MTK_INT_STATUS); - if (eth->soc->dma_type & MTK_QDMA) - mtk_w32(eth, mask, MTK_QMTK_INT_STATUS); -} - -static inline u32 mtk_irq_pending(struct mtk_eth *eth) -{ - u32 status = 0; - - if (eth->soc->dma_type & MTK_PDMA) - status |= mtk_reg_r32(eth, MTK_REG_MTK_INT_STATUS); - if (eth->soc->dma_type & MTK_QDMA) - status |= mtk_r32(eth, MTK_QMTK_INT_STATUS); - - return status; -} - -static void mtk_irq_ack_status(struct mtk_eth *eth, u32 mask) -{ - u32 status_reg = MTK_REG_MTK_INT_STATUS; - - if (mtk_reg_table[MTK_REG_MTK_INT_STATUS2]) - status_reg = MTK_REG_MTK_INT_STATUS2; - - mtk_reg_w32(eth, mask, status_reg); -} - -static u32 mtk_irq_pending_status(struct mtk_eth *eth) -{ - u32 status_reg = MTK_REG_MTK_INT_STATUS; - - if (mtk_reg_table[MTK_REG_MTK_INT_STATUS2]) - status_reg = MTK_REG_MTK_INT_STATUS2; - - return mtk_reg_r32(eth, status_reg); -} - -static inline void mtk_irq_disable(struct mtk_eth *eth, u32 mask) -{ - u32 val; - - if (eth->soc->dma_type & MTK_PDMA) { - val = mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); - mtk_reg_w32(eth, val & ~mask, MTK_REG_MTK_INT_ENABLE); - /* flush write */ - mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); - } - if (eth->soc->dma_type & MTK_QDMA) { - val = mtk_r32(eth, MTK_QMTK_INT_ENABLE); - mtk_w32(eth, val & ~mask, MTK_QMTK_INT_ENABLE); - /* flush write */ - mtk_r32(eth, MTK_QMTK_INT_ENABLE); - } -} - -static inline void mtk_irq_enable(struct mtk_eth *eth, u32 mask) -{ - u32 val; - - if (eth->soc->dma_type & MTK_PDMA) { - val = mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); - mtk_reg_w32(eth, val | mask, MTK_REG_MTK_INT_ENABLE); - /* flush write */ - mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); - } - if (eth->soc->dma_type & MTK_QDMA) { - val = mtk_r32(eth, MTK_QMTK_INT_ENABLE); - mtk_w32(eth, val | mask, MTK_QMTK_INT_ENABLE); - /* flush write */ - mtk_r32(eth, MTK_QMTK_INT_ENABLE); - } -} - -static inline u32 mtk_irq_enabled(struct mtk_eth *eth) -{ - u32 enabled = 0; - - if (eth->soc->dma_type & MTK_PDMA) - enabled |= mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); - if (eth->soc->dma_type & MTK_QDMA) - enabled |= mtk_r32(eth, MTK_QMTK_INT_ENABLE); - - return enabled; -} - -static inline void mtk_hw_set_macaddr(struct mtk_mac *mac, - unsigned char *macaddr) -{ - unsigned long flags; - - spin_lock_irqsave(&mac->hw->page_lock, flags); - mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], MTK_GDMA1_MAC_ADRH); - mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | - (macaddr[4] << 8) | macaddr[5], - MTK_GDMA1_MAC_ADRL); - spin_unlock_irqrestore(&mac->hw->page_lock, flags); -} - -static int mtk_set_mac_address(struct net_device *dev, void *p) -{ - int ret = eth_mac_addr(dev, p); - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - - if (ret) - return ret; - - if (eth->soc->set_mac) - eth->soc->set_mac(mac, dev->dev_addr); - else - mtk_hw_set_macaddr(mac, p); - - return 0; -} - -static inline int mtk_max_frag_size(int mtu) -{ - /* make sure buf_size will be at least MAX_RX_LENGTH */ - if (mtu + MTK_RX_ETH_HLEN < MAX_RX_LENGTH) - mtu = MAX_RX_LENGTH - MTK_RX_ETH_HLEN; - - return SKB_DATA_ALIGN(MTK_RX_HLEN + mtu) + - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); -} - -static inline int mtk_max_buf_size(int frag_size) -{ - int buf_size = frag_size - NET_SKB_PAD - NET_IP_ALIGN - - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); - - WARN_ON(buf_size < MAX_RX_LENGTH); - - return buf_size; -} - -static inline void mtk_get_rxd(struct mtk_rx_dma *rxd, - struct mtk_rx_dma *dma_rxd) -{ - rxd->rxd1 = READ_ONCE(dma_rxd->rxd1); - rxd->rxd2 = READ_ONCE(dma_rxd->rxd2); - rxd->rxd3 = READ_ONCE(dma_rxd->rxd3); - rxd->rxd4 = READ_ONCE(dma_rxd->rxd4); -} - -static inline void mtk_set_txd_pdma(struct mtk_tx_dma *txd, - struct mtk_tx_dma *dma_txd) -{ - WRITE_ONCE(dma_txd->txd1, txd->txd1); - WRITE_ONCE(dma_txd->txd3, txd->txd3); - WRITE_ONCE(dma_txd->txd4, txd->txd4); - /* clean dma done flag last */ - WRITE_ONCE(dma_txd->txd2, txd->txd2); -} - -static void mtk_clean_rx(struct mtk_eth *eth, struct mtk_rx_ring *ring) -{ - int i; - - if (ring->rx_data && ring->rx_dma) { - for (i = 0; i < ring->rx_ring_size; i++) { - if (!ring->rx_data[i]) - continue; - if (!ring->rx_dma[i].rxd1) - continue; - dma_unmap_single(eth->dev, - ring->rx_dma[i].rxd1, - ring->rx_buf_size, - DMA_FROM_DEVICE); - skb_free_frag(ring->rx_data[i]); - } - kfree(ring->rx_data); - ring->rx_data = NULL; - } - - if (ring->rx_dma) { - dma_free_coherent(eth->dev, - ring->rx_ring_size * sizeof(*ring->rx_dma), - ring->rx_dma, - ring->rx_phys); - ring->rx_dma = NULL; - } -} - -static int mtk_dma_rx_alloc(struct mtk_eth *eth, struct mtk_rx_ring *ring) -{ - int i, pad = 0; - - ring->frag_size = mtk_max_frag_size(ETH_DATA_LEN); - ring->rx_buf_size = mtk_max_buf_size(ring->frag_size); - ring->rx_ring_size = eth->soc->dma_ring_size; - ring->rx_data = kcalloc(ring->rx_ring_size, sizeof(*ring->rx_data), - GFP_KERNEL); - if (!ring->rx_data) - goto no_rx_mem; - - for (i = 0; i < ring->rx_ring_size; i++) { - ring->rx_data[i] = netdev_alloc_frag(ring->frag_size); - if (!ring->rx_data[i]) - goto no_rx_mem; - } - - ring->rx_dma = - dma_alloc_coherent(eth->dev, - ring->rx_ring_size * sizeof(*ring->rx_dma), - &ring->rx_phys, GFP_ATOMIC | __GFP_ZERO); - if (!ring->rx_dma) - goto no_rx_mem; - - if (!eth->soc->rx_2b_offset) - pad = NET_IP_ALIGN; - - for (i = 0; i < ring->rx_ring_size; i++) { - dma_addr_t dma_addr = dma_map_single(eth->dev, - ring->rx_data[i] + NET_SKB_PAD + pad, - ring->rx_buf_size, - DMA_FROM_DEVICE); - if (unlikely(dma_mapping_error(eth->dev, dma_addr))) - goto no_rx_mem; - ring->rx_dma[i].rxd1 = (unsigned int)dma_addr; - - if (eth->soc->rx_sg_dma) - ring->rx_dma[i].rxd2 = RX_DMA_PLEN0(ring->rx_buf_size); - else - ring->rx_dma[i].rxd2 = RX_DMA_LSO; - } - ring->rx_calc_idx = ring->rx_ring_size - 1; - /* make sure that all changes to the dma ring are flushed before we - * continue - */ - wmb(); - - return 0; - -no_rx_mem: - return -ENOMEM; -} - -static void mtk_txd_unmap(struct device *dev, struct mtk_tx_buf *tx_buf) -{ - if (tx_buf->flags & MTK_TX_FLAGS_SINGLE0) { - dma_unmap_single(dev, - dma_unmap_addr(tx_buf, dma_addr0), - dma_unmap_len(tx_buf, dma_len0), - DMA_TO_DEVICE); - } else if (tx_buf->flags & MTK_TX_FLAGS_PAGE0) { - dma_unmap_page(dev, - dma_unmap_addr(tx_buf, dma_addr0), - dma_unmap_len(tx_buf, dma_len0), - DMA_TO_DEVICE); - } - if (tx_buf->flags & MTK_TX_FLAGS_PAGE1) - dma_unmap_page(dev, - dma_unmap_addr(tx_buf, dma_addr1), - dma_unmap_len(tx_buf, dma_len1), - DMA_TO_DEVICE); - - tx_buf->flags = 0; - if (tx_buf->skb && (tx_buf->skb != (struct sk_buff *)DMA_DUMMY_DESC)) - dev_kfree_skb_any(tx_buf->skb); - tx_buf->skb = NULL; -} - -static void mtk_pdma_tx_clean(struct mtk_eth *eth) -{ - struct mtk_tx_ring *ring = ð->tx_ring; - int i; - - if (ring->tx_buf) { - for (i = 0; i < ring->tx_ring_size; i++) - mtk_txd_unmap(eth->dev, &ring->tx_buf[i]); - kfree(ring->tx_buf); - ring->tx_buf = NULL; - } - - if (ring->tx_dma) { - dma_free_coherent(eth->dev, - ring->tx_ring_size * sizeof(*ring->tx_dma), - ring->tx_dma, - ring->tx_phys); - ring->tx_dma = NULL; - } -} - -static void mtk_qdma_tx_clean(struct mtk_eth *eth) -{ - struct mtk_tx_ring *ring = ð->tx_ring; - int i; - - if (ring->tx_buf) { - for (i = 0; i < ring->tx_ring_size; i++) - mtk_txd_unmap(eth->dev, &ring->tx_buf[i]); - kfree(ring->tx_buf); - ring->tx_buf = NULL; - } - - if (ring->tx_dma) { - dma_free_coherent(eth->dev, - ring->tx_ring_size * sizeof(*ring->tx_dma), - ring->tx_dma, - ring->tx_phys); - ring->tx_dma = NULL; - } -} - -void mtk_stats_update_mac(struct mtk_mac *mac) -{ - struct mtk_hw_stats *hw_stats = mac->hw_stats; - unsigned int base = mtk_reg_table[MTK_REG_MTK_COUNTER_BASE]; - u64 stats; - - base += hw_stats->reg_offset; - - u64_stats_update_begin(&hw_stats->syncp); - - if (mac->hw->soc->new_stats) { - hw_stats->rx_bytes += mtk_r32(mac->hw, base); - stats = mtk_r32(mac->hw, base + 0x04); - if (stats) - hw_stats->rx_bytes += (stats << 32); - hw_stats->rx_packets += mtk_r32(mac->hw, base + 0x08); - hw_stats->rx_overflow += mtk_r32(mac->hw, base + 0x10); - hw_stats->rx_fcs_errors += mtk_r32(mac->hw, base + 0x14); - hw_stats->rx_short_errors += mtk_r32(mac->hw, base + 0x18); - hw_stats->rx_long_errors += mtk_r32(mac->hw, base + 0x1c); - hw_stats->rx_checksum_errors += mtk_r32(mac->hw, base + 0x20); - hw_stats->rx_flow_control_packets += - mtk_r32(mac->hw, base + 0x24); - hw_stats->tx_skip += mtk_r32(mac->hw, base + 0x28); - hw_stats->tx_collisions += mtk_r32(mac->hw, base + 0x2c); - hw_stats->tx_bytes += mtk_r32(mac->hw, base + 0x30); - stats = mtk_r32(mac->hw, base + 0x34); - if (stats) - hw_stats->tx_bytes += (stats << 32); - hw_stats->tx_packets += mtk_r32(mac->hw, base + 0x38); - } else { - hw_stats->tx_bytes += mtk_r32(mac->hw, base); - hw_stats->tx_packets += mtk_r32(mac->hw, base + 0x04); - hw_stats->tx_skip += mtk_r32(mac->hw, base + 0x08); - hw_stats->tx_collisions += mtk_r32(mac->hw, base + 0x0c); - hw_stats->rx_bytes += mtk_r32(mac->hw, base + 0x20); - hw_stats->rx_packets += mtk_r32(mac->hw, base + 0x24); - hw_stats->rx_overflow += mtk_r32(mac->hw, base + 0x28); - hw_stats->rx_fcs_errors += mtk_r32(mac->hw, base + 0x2c); - hw_stats->rx_short_errors += mtk_r32(mac->hw, base + 0x30); - hw_stats->rx_long_errors += mtk_r32(mac->hw, base + 0x34); - hw_stats->rx_checksum_errors += mtk_r32(mac->hw, base + 0x38); - hw_stats->rx_flow_control_packets += - mtk_r32(mac->hw, base + 0x3c); - } - - u64_stats_update_end(&hw_stats->syncp); -} - -static void mtk_get_stats64(struct net_device *dev, - struct rtnl_link_stats64 *storage) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_hw_stats *hw_stats = mac->hw_stats; - unsigned int base = mtk_reg_table[MTK_REG_MTK_COUNTER_BASE]; - unsigned int start; - - if (!base) { - netdev_stats_to_stats64(storage, &dev->stats); - return; - } - - if (netif_running(dev) && netif_device_present(dev)) { - if (spin_trylock(&hw_stats->stats_lock)) { - mtk_stats_update_mac(mac); - spin_unlock(&hw_stats->stats_lock); - } - } - - do { - start = u64_stats_fetch_begin_irq(&hw_stats->syncp); - storage->rx_packets = hw_stats->rx_packets; - storage->tx_packets = hw_stats->tx_packets; - storage->rx_bytes = hw_stats->rx_bytes; - storage->tx_bytes = hw_stats->tx_bytes; - storage->collisions = hw_stats->tx_collisions; - storage->rx_length_errors = hw_stats->rx_short_errors + - hw_stats->rx_long_errors; - storage->rx_over_errors = hw_stats->rx_overflow; - storage->rx_crc_errors = hw_stats->rx_fcs_errors; - storage->rx_errors = hw_stats->rx_checksum_errors; - storage->tx_aborted_errors = hw_stats->tx_skip; - } while (u64_stats_fetch_retry_irq(&hw_stats->syncp, start)); - - storage->tx_errors = dev->stats.tx_errors; - storage->rx_dropped = dev->stats.rx_dropped; - storage->tx_dropped = dev->stats.tx_dropped; -} - -static int mtk_vlan_rx_add_vid(struct net_device *dev, - __be16 proto, u16 vid) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - u32 idx = (vid & 0xf); - u32 vlan_cfg; - - if (!((mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE]) && - (dev->features & NETIF_F_HW_VLAN_CTAG_TX))) - return 0; - - if (test_bit(idx, ð->vlan_map)) { - netdev_warn(dev, "disable tx vlan offload\n"); - dev->wanted_features &= ~NETIF_F_HW_VLAN_CTAG_TX; - netdev_update_features(dev); - } else { - vlan_cfg = mtk_r32(eth, - mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE] + - ((idx >> 1) << 2)); - if (idx & 0x1) { - vlan_cfg &= 0xffff; - vlan_cfg |= (vid << 16); - } else { - vlan_cfg &= 0xffff0000; - vlan_cfg |= vid; - } - mtk_w32(eth, - vlan_cfg, mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE] + - ((idx >> 1) << 2)); - set_bit(idx, ð->vlan_map); - } - - return 0; -} - -static int mtk_vlan_rx_kill_vid(struct net_device *dev, - __be16 proto, u16 vid) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - u32 idx = (vid & 0xf); - - if (!((mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE]) && - (dev->features & NETIF_F_HW_VLAN_CTAG_TX))) - return 0; - - clear_bit(idx, ð->vlan_map); - - return 0; -} - -static inline u32 mtk_pdma_empty_txd(struct mtk_tx_ring *ring) -{ - barrier(); - return (u32)(ring->tx_ring_size - - ((ring->tx_next_idx - ring->tx_free_idx) & - (ring->tx_ring_size - 1))); -} - -static int mtk_skb_padto(struct sk_buff *skb, struct mtk_eth *eth) -{ - unsigned int len; - int ret; - - if (unlikely(skb->len >= VLAN_ETH_ZLEN)) - return 0; - - if (eth->soc->padding_64b && !eth->soc->padding_bug) - return 0; - - if (skb_vlan_tag_present(skb)) - len = ETH_ZLEN; - else if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) - len = VLAN_ETH_ZLEN; - else if (!eth->soc->padding_64b) - len = ETH_ZLEN; - else - return 0; - - if (skb->len >= len) - return 0; - - ret = skb_pad(skb, len - skb->len); - if (ret < 0) - return ret; - skb->len = len; - skb_set_tail_pointer(skb, len); - - return ret; -} - -static int mtk_pdma_tx_map(struct sk_buff *skb, struct net_device *dev, - int tx_num, struct mtk_tx_ring *ring, bool gso) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - struct skb_frag_struct *frag; - struct mtk_tx_dma txd, *ptxd; - struct mtk_tx_buf *tx_buf; - int i, j, k, frag_size, frag_map_size, offset; - dma_addr_t mapped_addr; - unsigned int nr_frags; - u32 def_txd4; - - if (mtk_skb_padto(skb, eth)) { - netif_warn(eth, tx_err, dev, "tx padding failed!\n"); - return -1; - } - - tx_buf = &ring->tx_buf[ring->tx_next_idx]; - memset(tx_buf, 0, sizeof(*tx_buf)); - memset(&txd, 0, sizeof(txd)); - nr_frags = skb_shinfo(skb)->nr_frags; - - /* init tx descriptor */ - def_txd4 = eth->soc->txd4; - txd.txd4 = def_txd4; - - if (eth->soc->mac_count > 1) - txd.txd4 |= (mac->id + 1) << TX_DMA_FPORT_SHIFT; - - if (gso) - txd.txd4 |= TX_DMA_TSO; - - /* TX Checksum offload */ - if (skb->ip_summed == CHECKSUM_PARTIAL) - txd.txd4 |= TX_DMA_CHKSUM; - - /* VLAN header offload */ - if (skb_vlan_tag_present(skb)) { - u16 tag = skb_vlan_tag_get(skb); - - txd.txd4 |= TX_DMA_INS_VLAN | - ((tag >> VLAN_PRIO_SHIFT) << 4) | - (tag & 0xF); - } - - mapped_addr = dma_map_single(&dev->dev, skb->data, - skb_headlen(skb), DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(&dev->dev, mapped_addr))) - return -1; - - txd.txd1 = mapped_addr; - txd.txd2 = TX_DMA_PLEN0(skb_headlen(skb)); - - tx_buf->flags |= MTK_TX_FLAGS_SINGLE0; - dma_unmap_addr_set(tx_buf, dma_addr0, mapped_addr); - dma_unmap_len_set(tx_buf, dma_len0, skb_headlen(skb)); - - /* TX SG offload */ - j = ring->tx_next_idx; - k = 0; - for (i = 0; i < nr_frags; i++) { - offset = 0; - frag = &skb_shinfo(skb)->frags[i]; - frag_size = skb_frag_size(frag); - - while (frag_size > 0) { - frag_map_size = min(frag_size, TX_DMA_BUF_LEN); - mapped_addr = skb_frag_dma_map(&dev->dev, frag, offset, - frag_map_size, - DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(&dev->dev, mapped_addr))) - goto err_dma; - - if (k & 0x1) { - j = NEXT_TX_DESP_IDX(j); - txd.txd1 = mapped_addr; - txd.txd2 = TX_DMA_PLEN0(frag_map_size); - txd.txd4 = def_txd4; - - tx_buf = &ring->tx_buf[j]; - memset(tx_buf, 0, sizeof(*tx_buf)); - - tx_buf->flags |= MTK_TX_FLAGS_PAGE0; - dma_unmap_addr_set(tx_buf, dma_addr0, - mapped_addr); - dma_unmap_len_set(tx_buf, dma_len0, - frag_map_size); - } else { - txd.txd3 = mapped_addr; - txd.txd2 |= TX_DMA_PLEN1(frag_map_size); - - tx_buf->skb = (struct sk_buff *)DMA_DUMMY_DESC; - tx_buf->flags |= MTK_TX_FLAGS_PAGE1; - dma_unmap_addr_set(tx_buf, dma_addr1, - mapped_addr); - dma_unmap_len_set(tx_buf, dma_len1, - frag_map_size); - - if (!((i == (nr_frags - 1)) && - (frag_map_size == frag_size))) { - mtk_set_txd_pdma(&txd, - &ring->tx_dma[j]); - memset(&txd, 0, sizeof(txd)); - } - } - frag_size -= frag_map_size; - offset += frag_map_size; - k++; - } - } - - /* set last segment */ - if (k & 0x1) - txd.txd2 |= TX_DMA_LS1; - else - txd.txd2 |= TX_DMA_LS0; - mtk_set_txd_pdma(&txd, &ring->tx_dma[j]); - - /* store skb to cleanup */ - tx_buf->skb = skb; - - netdev_sent_queue(dev, skb->len); - skb_tx_timestamp(skb); - - ring->tx_next_idx = NEXT_TX_DESP_IDX(j); - /* make sure that all changes to the dma ring are flushed before we - * continue - */ - wmb(); - atomic_set(&ring->tx_free_count, mtk_pdma_empty_txd(ring)); - - if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) || !skb->xmit_more) - mtk_reg_w32(eth, ring->tx_next_idx, MTK_REG_TX_CTX_IDX0); - - return 0; - -err_dma: - j = ring->tx_next_idx; - for (i = 0; i < tx_num; i++) { - ptxd = &ring->tx_dma[j]; - tx_buf = &ring->tx_buf[j]; - - /* unmap dma */ - mtk_txd_unmap(&dev->dev, tx_buf); - - ptxd->txd2 = TX_DMA_DESP2_DEF; - j = NEXT_TX_DESP_IDX(j); - } - /* make sure that all changes to the dma ring are flushed before we - * continue - */ - wmb(); - return -1; -} - -/* the qdma core needs scratch memory to be setup */ -static int mtk_init_fq_dma(struct mtk_eth *eth) -{ - dma_addr_t dma_addr, phy_ring_head, phy_ring_tail; - int cnt = eth->soc->dma_ring_size; - int i; - - eth->scratch_ring = dma_alloc_coherent(eth->dev, - cnt * sizeof(struct mtk_tx_dma), - &phy_ring_head, - GFP_ATOMIC | __GFP_ZERO); - if (unlikely(!eth->scratch_ring)) - return -ENOMEM; - - eth->scratch_head = kcalloc(cnt, QDMA_PAGE_SIZE, - GFP_KERNEL); - dma_addr = dma_map_single(eth->dev, - eth->scratch_head, cnt * QDMA_PAGE_SIZE, - DMA_FROM_DEVICE); - if (unlikely(dma_mapping_error(eth->dev, dma_addr))) - return -ENOMEM; - - memset(eth->scratch_ring, 0x0, sizeof(struct mtk_tx_dma) * cnt); - phy_ring_tail = phy_ring_head + (sizeof(struct mtk_tx_dma) * (cnt - 1)); - - for (i = 0; i < cnt; i++) { - eth->scratch_ring[i].txd1 = (dma_addr + (i * QDMA_PAGE_SIZE)); - if (i < cnt - 1) - eth->scratch_ring[i].txd2 = (phy_ring_head + - ((i + 1) * sizeof(struct mtk_tx_dma))); - eth->scratch_ring[i].txd3 = TX_QDMA_SDL(QDMA_PAGE_SIZE); - } - - mtk_w32(eth, phy_ring_head, MTK_QDMA_FQ_HEAD); - mtk_w32(eth, phy_ring_tail, MTK_QDMA_FQ_TAIL); - mtk_w32(eth, (cnt << 16) | cnt, MTK_QDMA_FQ_CNT); - mtk_w32(eth, QDMA_PAGE_SIZE << 16, MTK_QDMA_FQ_BLEN); - - return 0; -} - -static void *mtk_qdma_phys_to_virt(struct mtk_tx_ring *ring, u32 desc) -{ - void *ret = ring->tx_dma; - - return ret + (desc - ring->tx_phys); -} - -static struct mtk_tx_dma *mtk_tx_next_qdma(struct mtk_tx_ring *ring, - struct mtk_tx_dma *txd) -{ - return mtk_qdma_phys_to_virt(ring, txd->txd2); -} - -static struct mtk_tx_buf *mtk_desc_to_tx_buf(struct mtk_tx_ring *ring, - struct mtk_tx_dma *txd) -{ - int idx = txd - ring->tx_dma; - - return &ring->tx_buf[idx]; -} - -static int mtk_qdma_tx_map(struct sk_buff *skb, struct net_device *dev, - int tx_num, struct mtk_tx_ring *ring, bool gso) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - struct mtk_tx_dma *itxd, *txd; - struct mtk_tx_buf *tx_buf; - dma_addr_t mapped_addr; - unsigned int nr_frags; - int i, n_desc = 1; - u32 txd4 = eth->soc->txd4; - - itxd = ring->tx_next_free; - if (itxd == ring->tx_last_free) - return -ENOMEM; - - if (eth->soc->mac_count > 1) - txd4 |= (mac->id + 1) << TX_DMA_FPORT_SHIFT; - - tx_buf = mtk_desc_to_tx_buf(ring, itxd); - memset(tx_buf, 0, sizeof(*tx_buf)); - - if (gso) - txd4 |= TX_DMA_TSO; - - /* TX Checksum offload */ - if (skb->ip_summed == CHECKSUM_PARTIAL) - txd4 |= TX_DMA_CHKSUM; - - /* VLAN header offload */ - if (skb_vlan_tag_present(skb)) - txd4 |= TX_DMA_INS_VLAN_MT7621 | skb_vlan_tag_get(skb); - - mapped_addr = dma_map_single(&dev->dev, skb->data, - skb_headlen(skb), DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(&dev->dev, mapped_addr))) - return -ENOMEM; - - WRITE_ONCE(itxd->txd1, mapped_addr); - tx_buf->flags |= MTK_TX_FLAGS_SINGLE0; - dma_unmap_addr_set(tx_buf, dma_addr0, mapped_addr); - dma_unmap_len_set(tx_buf, dma_len0, skb_headlen(skb)); - - /* TX SG offload */ - txd = itxd; - nr_frags = skb_shinfo(skb)->nr_frags; - for (i = 0; i < nr_frags; i++) { - struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; - unsigned int offset = 0; - int frag_size = skb_frag_size(frag); - - while (frag_size) { - bool last_frag = false; - unsigned int frag_map_size; - - txd = mtk_tx_next_qdma(ring, txd); - if (txd == ring->tx_last_free) - goto err_dma; - - n_desc++; - frag_map_size = min(frag_size, TX_DMA_BUF_LEN); - mapped_addr = skb_frag_dma_map(&dev->dev, frag, offset, - frag_map_size, - DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(&dev->dev, mapped_addr))) - goto err_dma; - - if (i == nr_frags - 1 && - (frag_size - frag_map_size) == 0) - last_frag = true; - - WRITE_ONCE(txd->txd1, mapped_addr); - WRITE_ONCE(txd->txd3, (QDMA_TX_SWC | - TX_DMA_PLEN0(frag_map_size) | - last_frag * TX_DMA_LS0) | - mac->id); - WRITE_ONCE(txd->txd4, 0); - - tx_buf->skb = (struct sk_buff *)DMA_DUMMY_DESC; - tx_buf = mtk_desc_to_tx_buf(ring, txd); - memset(tx_buf, 0, sizeof(*tx_buf)); - - tx_buf->flags |= MTK_TX_FLAGS_PAGE0; - dma_unmap_addr_set(tx_buf, dma_addr0, mapped_addr); - dma_unmap_len_set(tx_buf, dma_len0, frag_map_size); - frag_size -= frag_map_size; - offset += frag_map_size; - } - } - - /* store skb to cleanup */ - tx_buf->skb = skb; - - WRITE_ONCE(itxd->txd4, txd4); - WRITE_ONCE(itxd->txd3, (QDMA_TX_SWC | TX_DMA_PLEN0(skb_headlen(skb)) | - (!nr_frags * TX_DMA_LS0))); - - netdev_sent_queue(dev, skb->len); - skb_tx_timestamp(skb); - - ring->tx_next_free = mtk_tx_next_qdma(ring, txd); - atomic_sub(n_desc, &ring->tx_free_count); - - /* make sure that all changes to the dma ring are flushed before we - * continue - */ - wmb(); - - if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) || !skb->xmit_more) - mtk_w32(eth, txd->txd2, MTK_QTX_CTX_PTR); - - return 0; - -err_dma: - do { - tx_buf = mtk_desc_to_tx_buf(ring, txd); - - /* unmap dma */ - mtk_txd_unmap(&dev->dev, tx_buf); - - itxd->txd3 = TX_DMA_DESP2_DEF; - itxd = mtk_tx_next_qdma(ring, itxd); - } while (itxd != txd); - - return -ENOMEM; -} - -static inline int mtk_cal_txd_req(struct sk_buff *skb) -{ - int i, nfrags; - struct skb_frag_struct *frag; - - nfrags = 1; - if (skb_is_gso(skb)) { - for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { - frag = &skb_shinfo(skb)->frags[i]; - nfrags += DIV_ROUND_UP(frag->size, TX_DMA_BUF_LEN); - } - } else { - nfrags += skb_shinfo(skb)->nr_frags; - } - - return DIV_ROUND_UP(nfrags, 2); -} - -static int mtk_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - struct mtk_tx_ring *ring = ð->tx_ring; - struct net_device_stats *stats = &dev->stats; - int tx_num; - int len = skb->len; - bool gso = false; - - tx_num = mtk_cal_txd_req(skb); - if (unlikely(atomic_read(&ring->tx_free_count) <= tx_num)) { - netif_stop_queue(dev); - netif_err(eth, tx_queued, dev, - "Tx Ring full when queue awake!\n"); - return NETDEV_TX_BUSY; - } - - /* TSO: fill MSS info in tcp checksum field */ - if (skb_is_gso(skb)) { - if (skb_cow_head(skb, 0)) { - netif_warn(eth, tx_err, dev, - "GSO expand head fail.\n"); - goto drop; - } - - if (skb_shinfo(skb)->gso_type & - (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) { - gso = true; - tcp_hdr(skb)->check = htons(skb_shinfo(skb)->gso_size); - } - } - - if (ring->tx_map(skb, dev, tx_num, ring, gso) < 0) - goto drop; - - stats->tx_packets++; - stats->tx_bytes += len; - - if (unlikely(atomic_read(&ring->tx_free_count) <= ring->tx_thresh)) { - netif_stop_queue(dev); - smp_mb(); - if (unlikely(atomic_read(&ring->tx_free_count) > - ring->tx_thresh)) - netif_wake_queue(dev); - } - - return NETDEV_TX_OK; - -drop: - stats->tx_dropped++; - dev_kfree_skb(skb); - return NETDEV_TX_OK; -} - -static int mtk_poll_rx(struct napi_struct *napi, int budget, - struct mtk_eth *eth, u32 rx_intr) -{ - struct mtk_soc_data *soc = eth->soc; - struct mtk_rx_ring *ring = ð->rx_ring[0]; - int idx = ring->rx_calc_idx; - u32 checksum_bit; - struct sk_buff *skb; - u8 *data, *new_data; - struct mtk_rx_dma *rxd, trxd; - int done = 0, pad; - - if (eth->soc->hw_features & NETIF_F_RXCSUM) - checksum_bit = soc->checksum_bit; - else - checksum_bit = 0; - - if (eth->soc->rx_2b_offset) - pad = 0; - else - pad = NET_IP_ALIGN; - - while (done < budget) { - struct net_device *netdev; - unsigned int pktlen; - dma_addr_t dma_addr; - int mac = 0; - - idx = NEXT_RX_DESP_IDX(idx); - rxd = &ring->rx_dma[idx]; - data = ring->rx_data[idx]; - - mtk_get_rxd(&trxd, rxd); - if (!(trxd.rxd2 & RX_DMA_DONE)) - break; - - /* find out which mac the packet come from. values start at 1 */ - if (eth->soc->mac_count > 1) { - mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) & - RX_DMA_FPORT_MASK; - mac--; - if (mac < 0 || mac >= eth->soc->mac_count) - goto release_desc; - } - - netdev = eth->netdev[mac]; - - /* alloc new buffer */ - new_data = napi_alloc_frag(ring->frag_size); - if (unlikely(!new_data || !netdev)) { - netdev->stats.rx_dropped++; - goto release_desc; - } - dma_addr = dma_map_single(&netdev->dev, - new_data + NET_SKB_PAD + pad, - ring->rx_buf_size, - DMA_FROM_DEVICE); - if (unlikely(dma_mapping_error(&netdev->dev, dma_addr))) { - skb_free_frag(new_data); - goto release_desc; - } - - /* receive data */ - skb = build_skb(data, ring->frag_size); - if (unlikely(!skb)) { - put_page(virt_to_head_page(new_data)); - goto release_desc; - } - skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN); - - dma_unmap_single(&netdev->dev, trxd.rxd1, - ring->rx_buf_size, DMA_FROM_DEVICE); - pktlen = RX_DMA_GET_PLEN0(trxd.rxd2); - skb->dev = netdev; - skb_put(skb, pktlen); - if (trxd.rxd4 & checksum_bit) - skb->ip_summed = CHECKSUM_UNNECESSARY; - else - skb_checksum_none_assert(skb); - skb->protocol = eth_type_trans(skb, netdev); - - netdev->stats.rx_packets++; - netdev->stats.rx_bytes += pktlen; - - if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX && - RX_DMA_VID(trxd.rxd3)) - __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), - RX_DMA_VID(trxd.rxd3)); - napi_gro_receive(napi, skb); - - ring->rx_data[idx] = new_data; - rxd->rxd1 = (unsigned int)dma_addr; - -release_desc: - if (eth->soc->rx_sg_dma) - rxd->rxd2 = RX_DMA_PLEN0(ring->rx_buf_size); - else - rxd->rxd2 = RX_DMA_LSO; - - ring->rx_calc_idx = idx; - /* make sure that all changes to the dma ring are flushed before - * we continue - */ - wmb(); - if (eth->soc->dma_type == MTK_QDMA) - mtk_w32(eth, ring->rx_calc_idx, MTK_QRX_CRX_IDX0); - else - mtk_reg_w32(eth, ring->rx_calc_idx, - MTK_REG_RX_CALC_IDX0); - done++; - } - - if (done < budget) - mtk_irq_ack(eth, rx_intr); - - return done; -} - -static int mtk_pdma_tx_poll(struct mtk_eth *eth, int budget, bool *tx_again) -{ - struct sk_buff *skb; - struct mtk_tx_buf *tx_buf; - int done = 0; - u32 idx, hwidx; - struct mtk_tx_ring *ring = ð->tx_ring; - unsigned int bytes = 0; - - idx = ring->tx_free_idx; - hwidx = mtk_reg_r32(eth, MTK_REG_TX_DTX_IDX0); - - while ((idx != hwidx) && budget) { - tx_buf = &ring->tx_buf[idx]; - skb = tx_buf->skb; - - if (!skb) - break; - - if (skb != (struct sk_buff *)DMA_DUMMY_DESC) { - bytes += skb->len; - done++; - budget--; - } - mtk_txd_unmap(eth->dev, tx_buf); - idx = NEXT_TX_DESP_IDX(idx); - } - ring->tx_free_idx = idx; - atomic_set(&ring->tx_free_count, mtk_pdma_empty_txd(ring)); - - /* read hw index again make sure no new tx packet */ - if (idx != hwidx || idx != mtk_reg_r32(eth, MTK_REG_TX_DTX_IDX0)) - *tx_again = 1; - - if (done) - netdev_completed_queue(*eth->netdev, done, bytes); - - return done; -} - -static int mtk_qdma_tx_poll(struct mtk_eth *eth, int budget, bool *tx_again) -{ - struct mtk_tx_ring *ring = ð->tx_ring; - struct mtk_tx_dma *desc; - struct sk_buff *skb; - struct mtk_tx_buf *tx_buf; - int total = 0, done[MTK_MAX_DEVS]; - unsigned int bytes[MTK_MAX_DEVS]; - u32 cpu, dma; - int i; - - memset(done, 0, sizeof(done)); - memset(bytes, 0, sizeof(bytes)); - - cpu = mtk_r32(eth, MTK_QTX_CRX_PTR); - dma = mtk_r32(eth, MTK_QTX_DRX_PTR); - - desc = mtk_qdma_phys_to_virt(ring, cpu); - - while ((cpu != dma) && budget) { - u32 next_cpu = desc->txd2; - int mac; - - desc = mtk_tx_next_qdma(ring, desc); - if ((desc->txd3 & QDMA_TX_OWNER_CPU) == 0) - break; - - mac = (desc->txd4 >> TX_DMA_FPORT_SHIFT) & - TX_DMA_FPORT_MASK; - mac--; - - tx_buf = mtk_desc_to_tx_buf(ring, desc); - skb = tx_buf->skb; - if (!skb) - break; - - if (skb != (struct sk_buff *)DMA_DUMMY_DESC) { - bytes[mac] += skb->len; - done[mac]++; - budget--; - } - mtk_txd_unmap(eth->dev, tx_buf); - - ring->tx_last_free->txd2 = next_cpu; - ring->tx_last_free = desc; - atomic_inc(&ring->tx_free_count); - - cpu = next_cpu; - } - - mtk_w32(eth, cpu, MTK_QTX_CRX_PTR); - - /* read hw index again make sure no new tx packet */ - if (cpu != dma || cpu != mtk_r32(eth, MTK_QTX_DRX_PTR)) - *tx_again = true; - - for (i = 0; i < eth->soc->mac_count; i++) { - if (!done[i]) - continue; - netdev_completed_queue(eth->netdev[i], done[i], bytes[i]); - total += done[i]; - } - - return total; -} - -static int mtk_poll_tx(struct mtk_eth *eth, int budget, u32 tx_intr, - bool *tx_again) -{ - struct mtk_tx_ring *ring = ð->tx_ring; - struct net_device *netdev = eth->netdev[0]; - int done; - - done = eth->tx_ring.tx_poll(eth, budget, tx_again); - if (!*tx_again) - mtk_irq_ack(eth, tx_intr); - - if (!done) - return 0; - - smp_mb(); - if (unlikely(!netif_queue_stopped(netdev))) - return done; - - if (atomic_read(&ring->tx_free_count) > ring->tx_thresh) - netif_wake_queue(netdev); - - return done; -} - -static void mtk_stats_update(struct mtk_eth *eth) -{ - int i; - - for (i = 0; i < eth->soc->mac_count; i++) { - if (!eth->mac[i] || !eth->mac[i]->hw_stats) - continue; - if (spin_trylock(ð->mac[i]->hw_stats->stats_lock)) { - mtk_stats_update_mac(eth->mac[i]); - spin_unlock(ð->mac[i]->hw_stats->stats_lock); - } - } -} - -static int mtk_poll(struct napi_struct *napi, int budget) -{ - struct mtk_eth *eth = container_of(napi, struct mtk_eth, rx_napi); - u32 status, mtk_status, mask, tx_intr, rx_intr, status_intr; - int tx_done, rx_done; - bool tx_again = false; - - status = mtk_irq_pending(eth); - mtk_status = mtk_irq_pending_status(eth); - tx_intr = eth->soc->tx_int; - rx_intr = eth->soc->rx_int; - status_intr = eth->soc->status_int; - tx_done = 0; - rx_done = 0; - tx_again = 0; - - if (status & tx_intr) - tx_done = mtk_poll_tx(eth, budget, tx_intr, &tx_again); - - if (status & rx_intr) - rx_done = mtk_poll_rx(napi, budget, eth, rx_intr); - - if (unlikely(mtk_status & status_intr)) { - mtk_stats_update(eth); - mtk_irq_ack_status(eth, status_intr); - } - - if (unlikely(netif_msg_intr(eth))) { - mask = mtk_irq_enabled(eth); - netdev_info(eth->netdev[0], - "done tx %d, rx %d, intr 0x%08x/0x%x\n", - tx_done, rx_done, status, mask); - } - - if (tx_again || rx_done == budget) - return budget; - - status = mtk_irq_pending(eth); - if (status & (tx_intr | rx_intr)) - return budget; - - napi_complete(napi); - mtk_irq_enable(eth, tx_intr | rx_intr); - - return rx_done; -} - -static int mtk_pdma_tx_alloc(struct mtk_eth *eth) -{ - int i; - struct mtk_tx_ring *ring = ð->tx_ring; - - ring->tx_ring_size = eth->soc->dma_ring_size; - ring->tx_free_idx = 0; - ring->tx_next_idx = 0; - ring->tx_thresh = max((unsigned long)ring->tx_ring_size >> 2, - MAX_SKB_FRAGS); - - ring->tx_buf = kcalloc(ring->tx_ring_size, sizeof(*ring->tx_buf), - GFP_KERNEL); - if (!ring->tx_buf) - goto no_tx_mem; - - ring->tx_dma = - dma_alloc_coherent(eth->dev, - ring->tx_ring_size * sizeof(*ring->tx_dma), - &ring->tx_phys, GFP_ATOMIC | __GFP_ZERO); - if (!ring->tx_dma) - goto no_tx_mem; - - for (i = 0; i < ring->tx_ring_size; i++) { - ring->tx_dma[i].txd2 = TX_DMA_DESP2_DEF; - ring->tx_dma[i].txd4 = eth->soc->txd4; - } - - atomic_set(&ring->tx_free_count, mtk_pdma_empty_txd(ring)); - ring->tx_map = mtk_pdma_tx_map; - ring->tx_poll = mtk_pdma_tx_poll; - ring->tx_clean = mtk_pdma_tx_clean; - - /* make sure that all changes to the dma ring are flushed before we - * continue - */ - wmb(); - - mtk_reg_w32(eth, ring->tx_phys, MTK_REG_TX_BASE_PTR0); - mtk_reg_w32(eth, ring->tx_ring_size, MTK_REG_TX_MAX_CNT0); - mtk_reg_w32(eth, 0, MTK_REG_TX_CTX_IDX0); - mtk_reg_w32(eth, MTK_PST_DTX_IDX0, MTK_REG_PDMA_RST_CFG); - - return 0; - -no_tx_mem: - return -ENOMEM; -} - -static int mtk_qdma_tx_alloc_tx(struct mtk_eth *eth) -{ - struct mtk_tx_ring *ring = ð->tx_ring; - int i, sz = sizeof(*ring->tx_dma); - - ring->tx_ring_size = eth->soc->dma_ring_size; - ring->tx_buf = kcalloc(ring->tx_ring_size, sizeof(*ring->tx_buf), - GFP_KERNEL); - if (!ring->tx_buf) - goto no_tx_mem; - - ring->tx_dma = dma_zalloc_coherent(eth->dev, - ring->tx_ring_size * sz, - &ring->tx_phys, - GFP_ATOMIC | __GFP_ZERO); - if (!ring->tx_dma) - goto no_tx_mem; - - for (i = 0; i < ring->tx_ring_size; i++) { - int next = (i + 1) % ring->tx_ring_size; - u32 next_ptr = ring->tx_phys + next * sz; - - ring->tx_dma[i].txd2 = next_ptr; - ring->tx_dma[i].txd3 = TX_DMA_DESP2_DEF; - } - - atomic_set(&ring->tx_free_count, ring->tx_ring_size - 2); - ring->tx_next_free = &ring->tx_dma[0]; - ring->tx_last_free = &ring->tx_dma[ring->tx_ring_size - 2]; - ring->tx_thresh = max((unsigned long)ring->tx_ring_size >> 2, - MAX_SKB_FRAGS); - - ring->tx_map = mtk_qdma_tx_map; - ring->tx_poll = mtk_qdma_tx_poll; - ring->tx_clean = mtk_qdma_tx_clean; - - /* make sure that all changes to the dma ring are flushed before we - * continue - */ - wmb(); - - mtk_w32(eth, ring->tx_phys, MTK_QTX_CTX_PTR); - mtk_w32(eth, ring->tx_phys, MTK_QTX_DTX_PTR); - mtk_w32(eth, - ring->tx_phys + ((ring->tx_ring_size - 1) * sz), - MTK_QTX_CRX_PTR); - mtk_w32(eth, - ring->tx_phys + ((ring->tx_ring_size - 1) * sz), - MTK_QTX_DRX_PTR); - - return 0; - -no_tx_mem: - return -ENOMEM; -} - -static int mtk_qdma_init(struct mtk_eth *eth, int ring) -{ - int err; - - err = mtk_init_fq_dma(eth); - if (err) - return err; - - err = mtk_qdma_tx_alloc_tx(eth); - if (err) - return err; - - err = mtk_dma_rx_alloc(eth, ð->rx_ring[ring]); - if (err) - return err; - - mtk_w32(eth, eth->rx_ring[ring].rx_phys, MTK_QRX_BASE_PTR0); - mtk_w32(eth, eth->rx_ring[ring].rx_ring_size, MTK_QRX_MAX_CNT0); - mtk_w32(eth, eth->rx_ring[ring].rx_calc_idx, MTK_QRX_CRX_IDX0); - mtk_w32(eth, MTK_PST_DRX_IDX0, MTK_QDMA_RST_IDX); - mtk_w32(eth, (QDMA_RES_THRES << 8) | QDMA_RES_THRES, MTK_QTX_CFG(0)); - - /* Enable random early drop and set drop threshold automatically */ - mtk_w32(eth, 0x174444, MTK_QDMA_FC_THRES); - mtk_w32(eth, 0x0, MTK_QDMA_HRED2); - - return 0; -} - -static int mtk_pdma_qdma_init(struct mtk_eth *eth) -{ - int err = mtk_qdma_init(eth, 1); - - if (err) - return err; - - err = mtk_dma_rx_alloc(eth, ð->rx_ring[0]); - if (err) - return err; - - mtk_reg_w32(eth, eth->rx_ring[0].rx_phys, MTK_REG_RX_BASE_PTR0); - mtk_reg_w32(eth, eth->rx_ring[0].rx_ring_size, MTK_REG_RX_MAX_CNT0); - mtk_reg_w32(eth, eth->rx_ring[0].rx_calc_idx, MTK_REG_RX_CALC_IDX0); - mtk_reg_w32(eth, MTK_PST_DRX_IDX0, MTK_REG_PDMA_RST_CFG); - - return 0; -} - -static int mtk_pdma_init(struct mtk_eth *eth) -{ - struct mtk_rx_ring *ring = ð->rx_ring[0]; - int err; - - err = mtk_pdma_tx_alloc(eth); - if (err) - return err; - - err = mtk_dma_rx_alloc(eth, ring); - if (err) - return err; - - mtk_reg_w32(eth, ring->rx_phys, MTK_REG_RX_BASE_PTR0); - mtk_reg_w32(eth, ring->rx_ring_size, MTK_REG_RX_MAX_CNT0); - mtk_reg_w32(eth, ring->rx_calc_idx, MTK_REG_RX_CALC_IDX0); - mtk_reg_w32(eth, MTK_PST_DRX_IDX0, MTK_REG_PDMA_RST_CFG); - - return 0; -} - -static void mtk_dma_free(struct mtk_eth *eth) -{ - int i; - - for (i = 0; i < eth->soc->mac_count; i++) - if (eth->netdev[i]) - netdev_reset_queue(eth->netdev[i]); - eth->tx_ring.tx_clean(eth); - mtk_clean_rx(eth, ð->rx_ring[0]); - mtk_clean_rx(eth, ð->rx_ring[1]); - kfree(eth->scratch_head); -} - -static void mtk_tx_timeout(struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - struct mtk_tx_ring *ring = ð->tx_ring; - - eth->netdev[mac->id]->stats.tx_errors++; - netif_err(eth, tx_err, dev, - "transmit timed out\n"); - if (eth->soc->dma_type & MTK_PDMA) { - netif_info(eth, drv, dev, "pdma_cfg:%08x\n", - mtk_reg_r32(eth, MTK_REG_PDMA_GLO_CFG)); - netif_info(eth, drv, dev, - "tx_ring=%d, base=%08x, max=%u, ctx=%u, dtx=%u, fdx=%hu, next=%hu\n", - 0, mtk_reg_r32(eth, MTK_REG_TX_BASE_PTR0), - mtk_reg_r32(eth, MTK_REG_TX_MAX_CNT0), - mtk_reg_r32(eth, MTK_REG_TX_CTX_IDX0), - mtk_reg_r32(eth, MTK_REG_TX_DTX_IDX0), - ring->tx_free_idx, - ring->tx_next_idx); - } - if (eth->soc->dma_type & MTK_QDMA) { - netif_info(eth, drv, dev, "qdma_cfg:%08x\n", - mtk_r32(eth, MTK_QDMA_GLO_CFG)); - netif_info(eth, drv, dev, - "tx_ring=%d, ctx=%08x, dtx=%08x, crx=%08x, drx=%08x, free=%hu\n", - 0, mtk_r32(eth, MTK_QTX_CTX_PTR), - mtk_r32(eth, MTK_QTX_DTX_PTR), - mtk_r32(eth, MTK_QTX_CRX_PTR), - mtk_r32(eth, MTK_QTX_DRX_PTR), - atomic_read(&ring->tx_free_count)); - } - netif_info(eth, drv, dev, - "rx_ring=%d, base=%08x, max=%u, calc=%u, drx=%u\n", - 0, mtk_reg_r32(eth, MTK_REG_RX_BASE_PTR0), - mtk_reg_r32(eth, MTK_REG_RX_MAX_CNT0), - mtk_reg_r32(eth, MTK_REG_RX_CALC_IDX0), - mtk_reg_r32(eth, MTK_REG_RX_DRX_IDX0)); - - schedule_work(&mac->pending_work); -} - -static irqreturn_t mtk_handle_irq(int irq, void *_eth) -{ - struct mtk_eth *eth = _eth; - u32 status, int_mask; - - status = mtk_irq_pending(eth); - if (unlikely(!status)) - return IRQ_NONE; - - int_mask = (eth->soc->rx_int | eth->soc->tx_int); - if (likely(status & int_mask)) { - if (likely(napi_schedule_prep(ð->rx_napi))) - __napi_schedule(ð->rx_napi); - } else { - mtk_irq_ack(eth, status); - } - mtk_irq_disable(eth, int_mask); - - return IRQ_HANDLED; -} - -#ifdef CONFIG_NET_POLL_CONTROLLER -static void mtk_poll_controller(struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - u32 int_mask = eth->soc->tx_int | eth->soc->rx_int; - - mtk_irq_disable(eth, int_mask); - mtk_handle_irq(dev->irq, dev); - mtk_irq_enable(eth, int_mask); -} -#endif - -int mtk_set_clock_cycle(struct mtk_eth *eth) -{ - unsigned long sysclk = eth->sysclk; - - sysclk /= MTK_US_CYC_CNT_DIVISOR; - sysclk <<= MTK_US_CYC_CNT_SHIFT; - - mtk_w32(eth, (mtk_r32(eth, MTK_GLO_CFG) & - ~(MTK_US_CYC_CNT_MASK << MTK_US_CYC_CNT_SHIFT)) | - sysclk, - MTK_GLO_CFG); - return 0; -} - -void mtk_fwd_config(struct mtk_eth *eth) -{ - u32 fwd_cfg; - - fwd_cfg = mtk_r32(eth, MTK_GDMA1_FWD_CFG); - - /* disable jumbo frame */ - if (eth->soc->jumbo_frame) - fwd_cfg &= ~MTK_GDM1_JMB_EN; - - /* set unicast/multicast/broadcast frame to cpu */ - fwd_cfg &= ~0xffff; - - mtk_w32(eth, fwd_cfg, MTK_GDMA1_FWD_CFG); -} - -void mtk_csum_config(struct mtk_eth *eth) -{ - if (eth->soc->hw_features & NETIF_F_RXCSUM) - mtk_w32(eth, mtk_r32(eth, MTK_GDMA1_FWD_CFG) | - (MTK_GDM1_ICS_EN | MTK_GDM1_TCS_EN | MTK_GDM1_UCS_EN), - MTK_GDMA1_FWD_CFG); - else - mtk_w32(eth, mtk_r32(eth, MTK_GDMA1_FWD_CFG) & - ~(MTK_GDM1_ICS_EN | MTK_GDM1_TCS_EN | MTK_GDM1_UCS_EN), - MTK_GDMA1_FWD_CFG); - if (eth->soc->hw_features & NETIF_F_IP_CSUM) - mtk_w32(eth, mtk_r32(eth, MTK_CDMA_CSG_CFG) | - (MTK_ICS_GEN_EN | MTK_TCS_GEN_EN | MTK_UCS_GEN_EN), - MTK_CDMA_CSG_CFG); - else - mtk_w32(eth, mtk_r32(eth, MTK_CDMA_CSG_CFG) & - ~(MTK_ICS_GEN_EN | MTK_TCS_GEN_EN | MTK_UCS_GEN_EN), - MTK_CDMA_CSG_CFG); -} - -static int mtk_start_dma(struct mtk_eth *eth) -{ - unsigned long flags; - u32 val; - int err; - - if (eth->soc->dma_type == MTK_PDMA) - err = mtk_pdma_init(eth); - else if (eth->soc->dma_type == MTK_QDMA) - err = mtk_qdma_init(eth, 0); - else - err = mtk_pdma_qdma_init(eth); - if (err) { - mtk_dma_free(eth); - return err; - } - - spin_lock_irqsave(ð->page_lock, flags); - - val = MTK_TX_WB_DDONE | MTK_RX_DMA_EN | MTK_TX_DMA_EN; - if (eth->soc->rx_2b_offset) - val |= MTK_RX_2B_OFFSET; - val |= eth->soc->pdma_glo_cfg; - - if (eth->soc->dma_type & MTK_PDMA) - mtk_reg_w32(eth, val, MTK_REG_PDMA_GLO_CFG); - - if (eth->soc->dma_type & MTK_QDMA) - mtk_w32(eth, val, MTK_QDMA_GLO_CFG); - - spin_unlock_irqrestore(ð->page_lock, flags); - - return 0; -} - -static int mtk_open(struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - - if (!atomic_read(ð->dma_refcnt)) { - int err = mtk_start_dma(eth); - - if (err) - return err; - - napi_enable(ð->rx_napi); - mtk_irq_enable(eth, eth->soc->tx_int | eth->soc->rx_int); - } - atomic_inc(ð->dma_refcnt); - - if (eth->phy) - eth->phy->start(mac); - - if (eth->soc->has_carrier && eth->soc->has_carrier(eth)) - netif_carrier_on(dev); - - netif_start_queue(dev); - eth->soc->fwd_config(eth); - - return 0; -} - -static void mtk_stop_dma(struct mtk_eth *eth, u32 glo_cfg) -{ - unsigned long flags; - u32 val; - int i; - - /* stop the dma enfine */ - spin_lock_irqsave(ð->page_lock, flags); - val = mtk_r32(eth, glo_cfg); - mtk_w32(eth, val & ~(MTK_TX_WB_DDONE | MTK_RX_DMA_EN | MTK_TX_DMA_EN), - glo_cfg); - spin_unlock_irqrestore(ð->page_lock, flags); - - /* wait for dma stop */ - for (i = 0; i < 10; i++) { - val = mtk_r32(eth, glo_cfg); - if (val & (MTK_TX_DMA_BUSY | MTK_RX_DMA_BUSY)) { - msleep(20); - continue; - } - break; - } -} - -static int mtk_stop(struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - - netif_tx_disable(dev); - if (eth->phy) - eth->phy->stop(mac); - - if (!atomic_dec_and_test(ð->dma_refcnt)) - return 0; - - mtk_irq_disable(eth, eth->soc->tx_int | eth->soc->rx_int); - napi_disable(ð->rx_napi); - - if (eth->soc->dma_type & MTK_PDMA) - mtk_stop_dma(eth, mtk_reg_table[MTK_REG_PDMA_GLO_CFG]); - - if (eth->soc->dma_type & MTK_QDMA) - mtk_stop_dma(eth, MTK_QDMA_GLO_CFG); - - mtk_dma_free(eth); - - return 0; -} - -static int __init mtk_init_hw(struct mtk_eth *eth) -{ - int i, err; - - eth->soc->reset_fe(eth); - - if (eth->soc->switch_init) - if (eth->soc->switch_init(eth)) { - dev_err(eth->dev, "failed to initialize switch core\n"); - return -ENODEV; - } - - err = devm_request_irq(eth->dev, eth->irq, mtk_handle_irq, 0, - dev_name(eth->dev), eth); - if (err) - return err; - - err = mtk_mdio_init(eth); - if (err) - return err; - - /* disable delay and normal interrupt */ - mtk_reg_w32(eth, 0, MTK_REG_DLY_INT_CFG); - if (eth->soc->dma_type & MTK_QDMA) - mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); - mtk_irq_disable(eth, eth->soc->tx_int | eth->soc->rx_int); - - /* frame engine will push VLAN tag regarding to VIDX field in Tx desc */ - if (mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE]) - for (i = 0; i < 16; i += 2) - mtk_w32(eth, ((i + 1) << 16) + i, - mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE] + - (i * 2)); - - if (eth->soc->fwd_config(eth)) - dev_err(eth->dev, "unable to get clock\n"); - - if (mtk_reg_table[MTK_REG_MTK_RST_GL]) { - mtk_reg_w32(eth, 1, MTK_REG_MTK_RST_GL); - mtk_reg_w32(eth, 0, MTK_REG_MTK_RST_GL); - } - - return 0; -} - -static int __init mtk_init(struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - struct device_node *port; - const char *mac_addr; - int err; - - mac_addr = of_get_mac_address(mac->of_node); - if (mac_addr) - ether_addr_copy(dev->dev_addr, mac_addr); - - /* If the mac address is invalid, use random mac address */ - if (!is_valid_ether_addr(dev->dev_addr)) { - eth_hw_addr_random(dev); - dev_err(eth->dev, "generated random MAC address %pM\n", - dev->dev_addr); - } - mac->hw->soc->set_mac(mac, dev->dev_addr); - - if (eth->soc->port_init) - for_each_child_of_node(mac->of_node, port) - if (of_device_is_compatible(port, - "mediatek,eth-port") && - of_device_is_available(port)) - eth->soc->port_init(eth, mac, port); - - if (eth->phy) { - err = eth->phy->connect(mac); - if (err) - return err; - } - - return 0; -} - -static void mtk_uninit(struct net_device *dev) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - - if (eth->phy) - eth->phy->disconnect(mac); - mtk_mdio_cleanup(eth); - - mtk_irq_disable(eth, ~0); - free_irq(dev->irq, dev); -} - -static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -{ - struct mtk_mac *mac = netdev_priv(dev); - - if (!mac->phy_dev) - return -ENODEV; - - switch (cmd) { - case SIOCGMIIPHY: - case SIOCGMIIREG: - case SIOCSMIIREG: - return phy_mii_ioctl(mac->phy_dev, ifr, cmd); - default: - break; - } - - return -EOPNOTSUPP; -} - -static int mtk_change_mtu(struct net_device *dev, int new_mtu) -{ - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - int frag_size, old_mtu; - u32 fwd_cfg; - - if (!eth->soc->jumbo_frame) - return eth_change_mtu(dev, new_mtu); - - frag_size = mtk_max_frag_size(new_mtu); - if (new_mtu < 68 || frag_size > PAGE_SIZE) - return -EINVAL; - - old_mtu = dev->mtu; - dev->mtu = new_mtu; - - /* return early if the buffer sizes will not change */ - if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN) - return 0; - if (old_mtu > ETH_DATA_LEN && new_mtu > ETH_DATA_LEN) - return 0; - - if (new_mtu <= ETH_DATA_LEN) - eth->rx_ring[0].frag_size = mtk_max_frag_size(ETH_DATA_LEN); - else - eth->rx_ring[0].frag_size = PAGE_SIZE; - eth->rx_ring[0].rx_buf_size = - mtk_max_buf_size(eth->rx_ring[0].frag_size); - - if (!netif_running(dev)) - return 0; - - mtk_stop(dev); - fwd_cfg = mtk_r32(eth, MTK_GDMA1_FWD_CFG); - if (new_mtu <= ETH_DATA_LEN) { - fwd_cfg &= ~MTK_GDM1_JMB_EN; - } else { - fwd_cfg &= ~(MTK_GDM1_JMB_LEN_MASK << MTK_GDM1_JMB_LEN_SHIFT); - fwd_cfg |= (DIV_ROUND_UP(frag_size, 1024) << - MTK_GDM1_JMB_LEN_SHIFT) | MTK_GDM1_JMB_EN; - } - mtk_w32(eth, fwd_cfg, MTK_GDMA1_FWD_CFG); - - return mtk_open(dev); -} - -static void mtk_pending_work(struct work_struct *work) -{ - struct mtk_mac *mac = container_of(work, struct mtk_mac, pending_work); - struct mtk_eth *eth = mac->hw; - struct net_device *dev = eth->netdev[mac->id]; - int err; - - rtnl_lock(); - mtk_stop(dev); - - err = mtk_open(dev); - if (err) { - netif_alert(eth, ifup, dev, - "Driver up/down cycle failed, closing device.\n"); - dev_close(dev); - } - rtnl_unlock(); -} - -static int mtk_cleanup(struct mtk_eth *eth) -{ - int i; - - for (i = 0; i < eth->soc->mac_count; i++) { - struct mtk_mac *mac = netdev_priv(eth->netdev[i]); - - if (!eth->netdev[i]) - continue; - - unregister_netdev(eth->netdev[i]); - free_netdev(eth->netdev[i]); - cancel_work_sync(&mac->pending_work); - } - - return 0; -} - -static const struct net_device_ops mtk_netdev_ops = { - .ndo_init = mtk_init, - .ndo_uninit = mtk_uninit, - .ndo_open = mtk_open, - .ndo_stop = mtk_stop, - .ndo_start_xmit = mtk_start_xmit, - .ndo_set_mac_address = mtk_set_mac_address, - .ndo_validate_addr = eth_validate_addr, - .ndo_do_ioctl = mtk_do_ioctl, - .ndo_change_mtu = mtk_change_mtu, - .ndo_tx_timeout = mtk_tx_timeout, - .ndo_get_stats64 = mtk_get_stats64, - .ndo_vlan_rx_add_vid = mtk_vlan_rx_add_vid, - .ndo_vlan_rx_kill_vid = mtk_vlan_rx_kill_vid, -#ifdef CONFIG_NET_POLL_CONTROLLER - .ndo_poll_controller = mtk_poll_controller, -#endif -}; - -static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) -{ - struct mtk_mac *mac; - const __be32 *_id = of_get_property(np, "reg", NULL); - int id, err; - - if (!_id) { - dev_err(eth->dev, "missing mac id\n"); - return -EINVAL; - } - id = be32_to_cpup(_id); - if (id >= eth->soc->mac_count || eth->netdev[id]) { - dev_err(eth->dev, "%d is not a valid mac id\n", id); - return -EINVAL; - } - - eth->netdev[id] = alloc_etherdev(sizeof(*mac)); - if (!eth->netdev[id]) { - dev_err(eth->dev, "alloc_etherdev failed\n"); - return -ENOMEM; - } - mac = netdev_priv(eth->netdev[id]); - eth->mac[id] = mac; - mac->id = id; - mac->hw = eth; - mac->of_node = np; - INIT_WORK(&mac->pending_work, mtk_pending_work); - - if (mtk_reg_table[MTK_REG_MTK_COUNTER_BASE]) { - mac->hw_stats = devm_kzalloc(eth->dev, - sizeof(*mac->hw_stats), - GFP_KERNEL); - if (!mac->hw_stats) { - err = -ENOMEM; - goto free_netdev; - } - spin_lock_init(&mac->hw_stats->stats_lock); - mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET; - } - - SET_NETDEV_DEV(eth->netdev[id], eth->dev); - eth->netdev[id]->netdev_ops = &mtk_netdev_ops; - eth->netdev[id]->base_addr = (unsigned long)eth->base; - - if (eth->soc->init_data) - eth->soc->init_data(eth->soc, eth->netdev[id]); - - eth->netdev[id]->vlan_features = eth->soc->hw_features & - ~(NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX); - eth->netdev[id]->features |= eth->soc->hw_features; - - if (mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE]) - eth->netdev[id]->features |= NETIF_F_HW_VLAN_CTAG_FILTER; - - mtk_set_ethtool_ops(eth->netdev[id]); - - err = register_netdev(eth->netdev[id]); - if (err) { - dev_err(eth->dev, "error bringing up device\n"); - err = -ENOMEM; - goto free_netdev; - } - eth->netdev[id]->irq = eth->irq; - netif_info(eth, probe, eth->netdev[id], - "mediatek frame engine at 0x%08lx, irq %d\n", - eth->netdev[id]->base_addr, eth->netdev[id]->irq); - - return 0; - -free_netdev: - free_netdev(eth->netdev[id]); - return err; -} - -static int mtk_probe(struct platform_device *pdev) -{ - struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - const struct of_device_id *match; - struct device_node *mac_np; - struct mtk_soc_data *soc; - struct mtk_eth *eth; - struct clk *sysclk; - int err; - - pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); - pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; - - device_reset(&pdev->dev); - - match = of_match_device(of_mtk_match, &pdev->dev); - soc = (struct mtk_soc_data *)match->data; - - if (soc->reg_table) - mtk_reg_table = soc->reg_table; - - eth = devm_kzalloc(&pdev->dev, sizeof(*eth), GFP_KERNEL); - if (!eth) - return -ENOMEM; - - eth->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(eth->base)) - return PTR_ERR(eth->base); - - spin_lock_init(ð->page_lock); - - eth->ethsys = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, - "mediatek,ethsys"); - if (IS_ERR(eth->ethsys)) - return PTR_ERR(eth->ethsys); - - eth->irq = platform_get_irq(pdev, 0); - if (eth->irq < 0) { - dev_err(&pdev->dev, "no IRQ resource found\n"); - return -ENXIO; - } - - sysclk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(sysclk)) { - dev_err(&pdev->dev, - "the clock is not defined in the devicetree\n"); - return -ENXIO; - } - eth->sysclk = clk_get_rate(sysclk); - - eth->switch_np = of_parse_phandle(pdev->dev.of_node, - "mediatek,switch", 0); - if (soc->has_switch && !eth->switch_np) { - dev_err(&pdev->dev, "failed to read switch phandle\n"); - return -ENODEV; - } - - eth->dev = &pdev->dev; - eth->soc = soc; - eth->msg_enable = netif_msg_init(mtk_msg_level, MTK_DEFAULT_MSG_ENABLE); - - err = mtk_init_hw(eth); - if (err) - return err; - - if (eth->soc->mac_count > 1) { - for_each_child_of_node(pdev->dev.of_node, mac_np) { - if (!of_device_is_compatible(mac_np, - "mediatek,eth-mac")) - continue; - - if (!of_device_is_available(mac_np)) - continue; - - err = mtk_add_mac(eth, mac_np); - if (err) - goto err_free_dev; - } - - init_dummy_netdev(ð->dummy_dev); - netif_napi_add(ð->dummy_dev, ð->rx_napi, mtk_poll, - soc->napi_weight); - } else { - err = mtk_add_mac(eth, pdev->dev.of_node); - if (err) - goto err_free_dev; - netif_napi_add(eth->netdev[0], ð->rx_napi, mtk_poll, - soc->napi_weight); - } - - platform_set_drvdata(pdev, eth); - - return 0; - -err_free_dev: - mtk_cleanup(eth); - return err; -} - -static int mtk_remove(struct platform_device *pdev) -{ - struct mtk_eth *eth = platform_get_drvdata(pdev); - - netif_napi_del(ð->rx_napi); - mtk_cleanup(eth); - platform_set_drvdata(pdev, NULL); - - return 0; -} - -static struct platform_driver mtk_driver = { - .probe = mtk_probe, - .remove = mtk_remove, - .driver = { - .name = "mtk_soc_eth", - .of_match_table = of_mtk_match, - }, -}; - -module_platform_driver(mtk_driver); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("John Crispin <blogic@openwrt.org>"); -MODULE_DESCRIPTION("Ethernet driver for MediaTek SoC"); diff --git a/drivers/staging/mt7621-eth/mtk_eth_soc.h b/drivers/staging/mt7621-eth/mtk_eth_soc.h deleted file mode 100644 index e6ed80433f49..000000000000 --- a/drivers/staging/mt7621-eth/mtk_eth_soc.h +++ /dev/null @@ -1,716 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#ifndef MTK_ETH_H -#define MTK_ETH_H - -#include <linux/mii.h> -#include <linux/interrupt.h> -#include <linux/netdevice.h> -#include <linux/dma-mapping.h> -#include <linux/phy.h> -#include <linux/ethtool.h> -#include <linux/version.h> -#include <linux/atomic.h> - -/* these registers have different offsets depending on the SoC. we use a lookup - * table for these - */ -enum mtk_reg { - MTK_REG_PDMA_GLO_CFG = 0, - MTK_REG_PDMA_RST_CFG, - MTK_REG_DLY_INT_CFG, - MTK_REG_TX_BASE_PTR0, - MTK_REG_TX_MAX_CNT0, - MTK_REG_TX_CTX_IDX0, - MTK_REG_TX_DTX_IDX0, - MTK_REG_RX_BASE_PTR0, - MTK_REG_RX_MAX_CNT0, - MTK_REG_RX_CALC_IDX0, - MTK_REG_RX_DRX_IDX0, - MTK_REG_MTK_INT_ENABLE, - MTK_REG_MTK_INT_STATUS, - MTK_REG_MTK_DMA_VID_BASE, - MTK_REG_MTK_COUNTER_BASE, - MTK_REG_MTK_RST_GL, - MTK_REG_MTK_INT_STATUS2, - MTK_REG_COUNT -}; - -/* delayed interrupt bits */ -#define MTK_DELAY_EN_INT 0x80 -#define MTK_DELAY_MAX_INT 0x04 -#define MTK_DELAY_MAX_TOUT 0x04 -#define MTK_DELAY_TIME 20 -#define MTK_DELAY_CHAN (((MTK_DELAY_EN_INT | MTK_DELAY_MAX_INT) << 8) \ - | MTK_DELAY_MAX_TOUT) -#define MTK_DELAY_INIT ((MTK_DELAY_CHAN << 16) | MTK_DELAY_CHAN) -#define MTK_PSE_FQFC_CFG_INIT 0x80504000 -#define MTK_PSE_FQFC_CFG_256Q 0xff908000 - -/* interrupt bits */ -#define MTK_CNT_PPE_AF BIT(31) -#define MTK_CNT_GDM_AF BIT(29) -#define MTK_PSE_P2_FC BIT(26) -#define MTK_PSE_BUF_DROP BIT(24) -#define MTK_GDM_OTHER_DROP BIT(23) -#define MTK_PSE_P1_FC BIT(22) -#define MTK_PSE_P0_FC BIT(21) -#define MTK_PSE_FQ_EMPTY BIT(20) -#define MTK_GE1_STA_CHG BIT(18) -#define MTK_TX_COHERENT BIT(17) -#define MTK_RX_COHERENT BIT(16) -#define MTK_TX_DONE_INT3 BIT(11) -#define MTK_TX_DONE_INT2 BIT(10) -#define MTK_TX_DONE_INT1 BIT(9) -#define MTK_TX_DONE_INT0 BIT(8) -#define MTK_RX_DONE_INT0 BIT(2) -#define MTK_TX_DLY_INT BIT(1) -#define MTK_RX_DLY_INT BIT(0) - -#define MTK_RX_DONE_INT MTK_RX_DONE_INT0 -#define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \ - MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3) - -#define RT5350_RX_DLY_INT BIT(30) -#define RT5350_TX_DLY_INT BIT(28) -#define RT5350_RX_DONE_INT1 BIT(17) -#define RT5350_RX_DONE_INT0 BIT(16) -#define RT5350_TX_DONE_INT3 BIT(3) -#define RT5350_TX_DONE_INT2 BIT(2) -#define RT5350_TX_DONE_INT1 BIT(1) -#define RT5350_TX_DONE_INT0 BIT(0) - -#define RT5350_RX_DONE_INT (RT5350_RX_DONE_INT0 | RT5350_RX_DONE_INT1) -#define RT5350_TX_DONE_INT (RT5350_TX_DONE_INT0 | RT5350_TX_DONE_INT1 | \ - RT5350_TX_DONE_INT2 | RT5350_TX_DONE_INT3) - -/* registers */ -#define MTK_GDMA_OFFSET 0x0020 -#define MTK_PSE_OFFSET 0x0040 -#define MTK_GDMA2_OFFSET 0x0060 -#define MTK_CDMA_OFFSET 0x0080 -#define MTK_DMA_VID0 0x00a8 -#define MTK_PDMA_OFFSET 0x0100 -#define MTK_PPE_OFFSET 0x0200 -#define MTK_CMTABLE_OFFSET 0x0400 -#define MTK_POLICYTABLE_OFFSET 0x1000 - -#define MT7621_GDMA_OFFSET 0x0500 -#define MT7620_GDMA_OFFSET 0x0600 - -#define RT5350_PDMA_OFFSET 0x0800 -#define RT5350_SDM_OFFSET 0x0c00 - -#define MTK_MDIO_ACCESS 0x00 -#define MTK_MDIO_CFG 0x04 -#define MTK_GLO_CFG 0x08 -#define MTK_RST_GL 0x0C -#define MTK_INT_STATUS 0x10 -#define MTK_INT_ENABLE 0x14 -#define MTK_MDIO_CFG2 0x18 -#define MTK_FOC_TS_T 0x1C - -#define MTK_GDMA1_FWD_CFG (MTK_GDMA_OFFSET + 0x00) -#define MTK_GDMA1_SCH_CFG (MTK_GDMA_OFFSET + 0x04) -#define MTK_GDMA1_SHPR_CFG (MTK_GDMA_OFFSET + 0x08) -#define MTK_GDMA1_MAC_ADRL (MTK_GDMA_OFFSET + 0x0C) -#define MTK_GDMA1_MAC_ADRH (MTK_GDMA_OFFSET + 0x10) - -#define MTK_GDMA2_FWD_CFG (MTK_GDMA2_OFFSET + 0x00) -#define MTK_GDMA2_SCH_CFG (MTK_GDMA2_OFFSET + 0x04) -#define MTK_GDMA2_SHPR_CFG (MTK_GDMA2_OFFSET + 0x08) -#define MTK_GDMA2_MAC_ADRL (MTK_GDMA2_OFFSET + 0x0C) -#define MTK_GDMA2_MAC_ADRH (MTK_GDMA2_OFFSET + 0x10) - -#define MTK_PSE_FQ_CFG (MTK_PSE_OFFSET + 0x00) -#define MTK_CDMA_FC_CFG (MTK_PSE_OFFSET + 0x04) -#define MTK_GDMA1_FC_CFG (MTK_PSE_OFFSET + 0x08) -#define MTK_GDMA2_FC_CFG (MTK_PSE_OFFSET + 0x0C) - -#define MTK_CDMA_CSG_CFG (MTK_CDMA_OFFSET + 0x00) -#define MTK_CDMA_SCH_CFG (MTK_CDMA_OFFSET + 0x04) - -#define MT7621_GDMA_FWD_CFG(x) (MT7621_GDMA_OFFSET + (x * 0x1000)) - -/* FIXME this might be different for different SOCs */ -#define MT7620_GDMA1_FWD_CFG (MT7621_GDMA_OFFSET + 0x00) - -#define RT5350_TX_BASE_PTR0 (RT5350_PDMA_OFFSET + 0x00) -#define RT5350_TX_MAX_CNT0 (RT5350_PDMA_OFFSET + 0x04) -#define RT5350_TX_CTX_IDX0 (RT5350_PDMA_OFFSET + 0x08) -#define RT5350_TX_DTX_IDX0 (RT5350_PDMA_OFFSET + 0x0C) -#define RT5350_TX_BASE_PTR1 (RT5350_PDMA_OFFSET + 0x10) -#define RT5350_TX_MAX_CNT1 (RT5350_PDMA_OFFSET + 0x14) -#define RT5350_TX_CTX_IDX1 (RT5350_PDMA_OFFSET + 0x18) -#define RT5350_TX_DTX_IDX1 (RT5350_PDMA_OFFSET + 0x1C) -#define RT5350_TX_BASE_PTR2 (RT5350_PDMA_OFFSET + 0x20) -#define RT5350_TX_MAX_CNT2 (RT5350_PDMA_OFFSET + 0x24) -#define RT5350_TX_CTX_IDX2 (RT5350_PDMA_OFFSET + 0x28) -#define RT5350_TX_DTX_IDX2 (RT5350_PDMA_OFFSET + 0x2C) -#define RT5350_TX_BASE_PTR3 (RT5350_PDMA_OFFSET + 0x30) -#define RT5350_TX_MAX_CNT3 (RT5350_PDMA_OFFSET + 0x34) -#define RT5350_TX_CTX_IDX3 (RT5350_PDMA_OFFSET + 0x38) -#define RT5350_TX_DTX_IDX3 (RT5350_PDMA_OFFSET + 0x3C) -#define RT5350_RX_BASE_PTR0 (RT5350_PDMA_OFFSET + 0x100) -#define RT5350_RX_MAX_CNT0 (RT5350_PDMA_OFFSET + 0x104) -#define RT5350_RX_CALC_IDX0 (RT5350_PDMA_OFFSET + 0x108) -#define RT5350_RX_DRX_IDX0 (RT5350_PDMA_OFFSET + 0x10C) -#define RT5350_RX_BASE_PTR1 (RT5350_PDMA_OFFSET + 0x110) -#define RT5350_RX_MAX_CNT1 (RT5350_PDMA_OFFSET + 0x114) -#define RT5350_RX_CALC_IDX1 (RT5350_PDMA_OFFSET + 0x118) -#define RT5350_RX_DRX_IDX1 (RT5350_PDMA_OFFSET + 0x11C) -#define RT5350_PDMA_GLO_CFG (RT5350_PDMA_OFFSET + 0x204) -#define RT5350_PDMA_RST_CFG (RT5350_PDMA_OFFSET + 0x208) -#define RT5350_DLY_INT_CFG (RT5350_PDMA_OFFSET + 0x20c) -#define RT5350_MTK_INT_STATUS (RT5350_PDMA_OFFSET + 0x220) -#define RT5350_MTK_INT_ENABLE (RT5350_PDMA_OFFSET + 0x228) -#define RT5350_PDMA_SCH_CFG (RT5350_PDMA_OFFSET + 0x280) - -#define MTK_PDMA_GLO_CFG (MTK_PDMA_OFFSET + 0x00) -#define MTK_PDMA_RST_CFG (MTK_PDMA_OFFSET + 0x04) -#define MTK_PDMA_SCH_CFG (MTK_PDMA_OFFSET + 0x08) -#define MTK_DLY_INT_CFG (MTK_PDMA_OFFSET + 0x0C) -#define MTK_TX_BASE_PTR0 (MTK_PDMA_OFFSET + 0x10) -#define MTK_TX_MAX_CNT0 (MTK_PDMA_OFFSET + 0x14) -#define MTK_TX_CTX_IDX0 (MTK_PDMA_OFFSET + 0x18) -#define MTK_TX_DTX_IDX0 (MTK_PDMA_OFFSET + 0x1C) -#define MTK_TX_BASE_PTR1 (MTK_PDMA_OFFSET + 0x20) -#define MTK_TX_MAX_CNT1 (MTK_PDMA_OFFSET + 0x24) -#define MTK_TX_CTX_IDX1 (MTK_PDMA_OFFSET + 0x28) -#define MTK_TX_DTX_IDX1 (MTK_PDMA_OFFSET + 0x2C) -#define MTK_RX_BASE_PTR0 (MTK_PDMA_OFFSET + 0x30) -#define MTK_RX_MAX_CNT0 (MTK_PDMA_OFFSET + 0x34) -#define MTK_RX_CALC_IDX0 (MTK_PDMA_OFFSET + 0x38) -#define MTK_RX_DRX_IDX0 (MTK_PDMA_OFFSET + 0x3C) -#define MTK_TX_BASE_PTR2 (MTK_PDMA_OFFSET + 0x40) -#define MTK_TX_MAX_CNT2 (MTK_PDMA_OFFSET + 0x44) -#define MTK_TX_CTX_IDX2 (MTK_PDMA_OFFSET + 0x48) -#define MTK_TX_DTX_IDX2 (MTK_PDMA_OFFSET + 0x4C) -#define MTK_TX_BASE_PTR3 (MTK_PDMA_OFFSET + 0x50) -#define MTK_TX_MAX_CNT3 (MTK_PDMA_OFFSET + 0x54) -#define MTK_TX_CTX_IDX3 (MTK_PDMA_OFFSET + 0x58) -#define MTK_TX_DTX_IDX3 (MTK_PDMA_OFFSET + 0x5C) -#define MTK_RX_BASE_PTR1 (MTK_PDMA_OFFSET + 0x60) -#define MTK_RX_MAX_CNT1 (MTK_PDMA_OFFSET + 0x64) -#define MTK_RX_CALC_IDX1 (MTK_PDMA_OFFSET + 0x68) -#define MTK_RX_DRX_IDX1 (MTK_PDMA_OFFSET + 0x6C) - -/* Switch DMA configuration */ -#define RT5350_SDM_CFG (RT5350_SDM_OFFSET + 0x00) -#define RT5350_SDM_RRING (RT5350_SDM_OFFSET + 0x04) -#define RT5350_SDM_TRING (RT5350_SDM_OFFSET + 0x08) -#define RT5350_SDM_MAC_ADRL (RT5350_SDM_OFFSET + 0x0C) -#define RT5350_SDM_MAC_ADRH (RT5350_SDM_OFFSET + 0x10) -#define RT5350_SDM_TPCNT (RT5350_SDM_OFFSET + 0x100) -#define RT5350_SDM_TBCNT (RT5350_SDM_OFFSET + 0x104) -#define RT5350_SDM_RPCNT (RT5350_SDM_OFFSET + 0x108) -#define RT5350_SDM_RBCNT (RT5350_SDM_OFFSET + 0x10C) -#define RT5350_SDM_CS_ERR (RT5350_SDM_OFFSET + 0x110) - -#define RT5350_SDM_ICS_EN BIT(16) -#define RT5350_SDM_TCS_EN BIT(17) -#define RT5350_SDM_UCS_EN BIT(18) - -/* QDMA registers */ -#define MTK_QTX_CFG(x) (0x1800 + (x * 0x10)) -#define MTK_QTX_SCH(x) (0x1804 + (x * 0x10)) -#define MTK_QRX_BASE_PTR0 0x1900 -#define MTK_QRX_MAX_CNT0 0x1904 -#define MTK_QRX_CRX_IDX0 0x1908 -#define MTK_QRX_DRX_IDX0 0x190C -#define MTK_QDMA_GLO_CFG 0x1A04 -#define MTK_QDMA_RST_IDX 0x1A08 -#define MTK_QDMA_DELAY_INT 0x1A0C -#define MTK_QDMA_FC_THRES 0x1A10 -#define MTK_QMTK_INT_STATUS 0x1A18 -#define MTK_QMTK_INT_ENABLE 0x1A1C -#define MTK_QDMA_HRED2 0x1A44 - -#define MTK_QTX_CTX_PTR 0x1B00 -#define MTK_QTX_DTX_PTR 0x1B04 - -#define MTK_QTX_CRX_PTR 0x1B10 -#define MTK_QTX_DRX_PTR 0x1B14 - -#define MTK_QDMA_FQ_HEAD 0x1B20 -#define MTK_QDMA_FQ_TAIL 0x1B24 -#define MTK_QDMA_FQ_CNT 0x1B28 -#define MTK_QDMA_FQ_BLEN 0x1B2C - -#define QDMA_PAGE_SIZE 2048 -#define QDMA_TX_OWNER_CPU BIT(31) -#define QDMA_TX_SWC BIT(14) -#define TX_QDMA_SDL(_x) (((_x) & 0x3fff) << 16) -#define QDMA_RES_THRES 4 - -/* MDIO_CFG register bits */ -#define MTK_MDIO_CFG_AUTO_POLL_EN BIT(29) -#define MTK_MDIO_CFG_GP1_BP_EN BIT(16) -#define MTK_MDIO_CFG_GP1_FRC_EN BIT(15) -#define MTK_MDIO_CFG_GP1_SPEED_10 (0 << 13) -#define MTK_MDIO_CFG_GP1_SPEED_100 (1 << 13) -#define MTK_MDIO_CFG_GP1_SPEED_1000 (2 << 13) -#define MTK_MDIO_CFG_GP1_DUPLEX BIT(12) -#define MTK_MDIO_CFG_GP1_FC_TX BIT(11) -#define MTK_MDIO_CFG_GP1_FC_RX BIT(10) -#define MTK_MDIO_CFG_GP1_LNK_DWN BIT(9) -#define MTK_MDIO_CFG_GP1_AN_FAIL BIT(8) -#define MTK_MDIO_CFG_MDC_CLK_DIV_1 (0 << 6) -#define MTK_MDIO_CFG_MDC_CLK_DIV_2 (1 << 6) -#define MTK_MDIO_CFG_MDC_CLK_DIV_4 (2 << 6) -#define MTK_MDIO_CFG_MDC_CLK_DIV_8 (3 << 6) -#define MTK_MDIO_CFG_TURBO_MII_FREQ BIT(5) -#define MTK_MDIO_CFG_TURBO_MII_MODE BIT(4) -#define MTK_MDIO_CFG_RX_CLK_SKEW_0 (0 << 2) -#define MTK_MDIO_CFG_RX_CLK_SKEW_200 (1 << 2) -#define MTK_MDIO_CFG_RX_CLK_SKEW_400 (2 << 2) -#define MTK_MDIO_CFG_RX_CLK_SKEW_INV (3 << 2) -#define MTK_MDIO_CFG_TX_CLK_SKEW_0 0 -#define MTK_MDIO_CFG_TX_CLK_SKEW_200 1 -#define MTK_MDIO_CFG_TX_CLK_SKEW_400 2 -#define MTK_MDIO_CFG_TX_CLK_SKEW_INV 3 - -/* uni-cast port */ -#define MTK_GDM1_JMB_LEN_MASK 0xf -#define MTK_GDM1_JMB_LEN_SHIFT 28 -#define MTK_GDM1_ICS_EN BIT(22) -#define MTK_GDM1_TCS_EN BIT(21) -#define MTK_GDM1_UCS_EN BIT(20) -#define MTK_GDM1_JMB_EN BIT(19) -#define MTK_GDM1_STRPCRC BIT(16) -#define MTK_GDM1_UFRC_P_CPU (0 << 12) -#define MTK_GDM1_UFRC_P_GDMA1 (1 << 12) -#define MTK_GDM1_UFRC_P_PPE (6 << 12) - -/* checksums */ -#define MTK_ICS_GEN_EN BIT(2) -#define MTK_UCS_GEN_EN BIT(1) -#define MTK_TCS_GEN_EN BIT(0) - -/* dma mode */ -#define MTK_PDMA BIT(0) -#define MTK_QDMA BIT(1) -#define MTK_PDMA_RX_QDMA_TX (MTK_PDMA | MTK_QDMA) - -/* dma ring */ -#define MTK_PST_DRX_IDX0 BIT(16) -#define MTK_PST_DTX_IDX3 BIT(3) -#define MTK_PST_DTX_IDX2 BIT(2) -#define MTK_PST_DTX_IDX1 BIT(1) -#define MTK_PST_DTX_IDX0 BIT(0) - -#define MTK_RX_2B_OFFSET BIT(31) -#define MTK_TX_WB_DDONE BIT(6) -#define MTK_RX_DMA_BUSY BIT(3) -#define MTK_TX_DMA_BUSY BIT(1) -#define MTK_RX_DMA_EN BIT(2) -#define MTK_TX_DMA_EN BIT(0) - -#define MTK_PDMA_SIZE_4DWORDS (0 << 4) -#define MTK_PDMA_SIZE_8DWORDS (1 << 4) -#define MTK_PDMA_SIZE_16DWORDS (2 << 4) - -#define MTK_US_CYC_CNT_MASK 0xff -#define MTK_US_CYC_CNT_SHIFT 0x8 -#define MTK_US_CYC_CNT_DIVISOR 1000000 - -/* PDMA descriptor rxd2 */ -#define RX_DMA_DONE BIT(31) -#define RX_DMA_LSO BIT(30) -#define RX_DMA_PLEN0(_x) (((_x) & 0x3fff) << 16) -#define RX_DMA_GET_PLEN0(_x) (((_x) >> 16) & 0x3fff) -#define RX_DMA_TAG BIT(15) - -/* PDMA descriptor rxd3 */ -#define RX_DMA_TPID(_x) (((_x) >> 16) & 0xffff) -#define RX_DMA_VID(_x) ((_x) & 0xfff) - -/* PDMA descriptor rxd4 */ -#define RX_DMA_L4VALID BIT(30) -#define RX_DMA_FPORT_SHIFT 19 -#define RX_DMA_FPORT_MASK 0x7 - -struct mtk_rx_dma { - unsigned int rxd1; - unsigned int rxd2; - unsigned int rxd3; - unsigned int rxd4; -} __packed __aligned(4); - -/* PDMA tx descriptor bits */ -#define TX_DMA_BUF_LEN 0x3fff -#define TX_DMA_PLEN0_MASK (TX_DMA_BUF_LEN << 16) -#define TX_DMA_PLEN0(_x) (((_x) & TX_DMA_BUF_LEN) << 16) -#define TX_DMA_PLEN1(_x) ((_x) & TX_DMA_BUF_LEN) -#define TX_DMA_GET_PLEN0(_x) (((_x) >> 16) & TX_DMA_BUF_LEN) -#define TX_DMA_GET_PLEN1(_x) ((_x) & TX_DMA_BUF_LEN) -#define TX_DMA_LS1 BIT(14) -#define TX_DMA_LS0 BIT(30) -#define TX_DMA_DONE BIT(31) -#define TX_DMA_FPORT_SHIFT 25 -#define TX_DMA_FPORT_MASK 0x7 -#define TX_DMA_INS_VLAN_MT7621 BIT(16) -#define TX_DMA_INS_VLAN BIT(7) -#define TX_DMA_INS_PPPOE BIT(12) -#define TX_DMA_TAG BIT(15) -#define TX_DMA_TAG_MASK BIT(15) -#define TX_DMA_QN(_x) ((_x) << 16) -#define TX_DMA_PN(_x) ((_x) << 24) -#define TX_DMA_QN_MASK TX_DMA_QN(0x7) -#define TX_DMA_PN_MASK TX_DMA_PN(0x7) -#define TX_DMA_UDF BIT(20) -#define TX_DMA_CHKSUM (0x7 << 29) -#define TX_DMA_TSO BIT(28) -#define TX_DMA_DESP4_DEF (TX_DMA_QN(3) | TX_DMA_PN(1)) - -/* frame engine counters */ -#define MTK_PPE_AC_BCNT0 (MTK_CMTABLE_OFFSET + 0x00) -#define MTK_GDMA1_TX_GBCNT (MTK_CMTABLE_OFFSET + 0x300) -#define MTK_GDMA2_TX_GBCNT (MTK_GDMA1_TX_GBCNT + 0x40) - -/* phy device flags */ -#define MTK_PHY_FLAG_PORT BIT(0) -#define MTK_PHY_FLAG_ATTACH BIT(1) - -struct mtk_tx_dma { - unsigned int txd1; - unsigned int txd2; - unsigned int txd3; - unsigned int txd4; -} __packed __aligned(4); - -struct mtk_eth; -struct mtk_mac; - -/* manage the attached phys */ -struct mtk_phy { - spinlock_t lock; - - struct phy_device *phy[8]; - struct device_node *phy_node[8]; - const __be32 *phy_fixed[8]; - int duplex[8]; - int speed[8]; - int tx_fc[8]; - int rx_fc[8]; - int (*connect)(struct mtk_mac *mac); - void (*disconnect)(struct mtk_mac *mac); - void (*start)(struct mtk_mac *mac); - void (*stop)(struct mtk_mac *mac); -}; - -/* struct mtk_soc_data - the structure that holds the SoC specific data - * @reg_table: Some of the legacy registers changed their location - * over time. Their offsets are stored in this table - * - * @init_data: Some features depend on the silicon revision. This - * callback allows runtime modification of the content of - * this struct - * @reset_fe: This callback is used to trigger the reset of the frame - * engine - * @set_mac: This callback is used to set the unicast mac address - * filter - * @fwd_config: This callback is used to setup the forward config - * register of the MAC - * @switch_init: This callback is used to bring up the switch core - * @port_init: Some SoCs have ports that can be router to a switch port - * or an external PHY. This callback is used to setup these - * ports. - * @has_carrier: This callback allows driver to check if there is a cable - * attached. - * @mdio_init: This callbck is used to setup the MDIO bus if one is - * present - * @mdio_cleanup: This callback is used to cleanup the MDIO state. - * @mdio_write: This callback is used to write data to the MDIO bus. - * @mdio_read: This callback is used to write data to the MDIO bus. - * @mdio_adjust_link: This callback is used to apply the PHY settings. - * @piac_offset: the PIAC register has a different different base offset - * @hw_features: feature set depends on the SoC type - * @dma_ring_size: allow GBit SoCs to set bigger rings than FE SoCs - * @napi_weight: allow GBit SoCs to set bigger napi weight than FE SoCs - * @dma_type: SoCs is PDMA, QDMA or a mix of the 2 - * @pdma_glo_cfg: the default DMA configuration - * @rx_int: the TX interrupt bits used by the SoC - * @tx_int: the TX interrupt bits used by the SoC - * @status_int: the Status interrupt bits used by the SoC - * @checksum_bit: the bits used to turn on HW checksumming - * @txd4: default value of the TXD4 descriptor - * @mac_count: the number of MACs that the SoC has - * @new_stats: there is a old and new way to read hardware stats - * registers - * @jumbo_frame: does the SoC support jumbo frames ? - * @rx_2b_offset: tell the rx dma to offset the data by 2 bytes - * @rx_sg_dma: scatter gather support - * @padding_64b enable 64 bit padding - * @padding_bug: rt2880 has a padding bug - * @has_switch: does the SoC have a built-in switch - * - * Although all of the supported SoCs share the same basic functionality, there - * are several SoC specific functions and features that we need to support. This - * struct holds the SoC specific data so that the common core can figure out - * how to setup and use these differences. - */ -struct mtk_soc_data { - const u16 *reg_table; - - void (*init_data)(struct mtk_soc_data *data, struct net_device *netdev); - void (*reset_fe)(struct mtk_eth *eth); - void (*set_mac)(struct mtk_mac *mac, unsigned char *macaddr); - int (*fwd_config)(struct mtk_eth *eth); - int (*switch_init)(struct mtk_eth *eth); - void (*port_init)(struct mtk_eth *eth, struct mtk_mac *mac, - struct device_node *port); - int (*has_carrier)(struct mtk_eth *eth); - int (*mdio_init)(struct mtk_eth *eth); - void (*mdio_cleanup)(struct mtk_eth *eth); - int (*mdio_write)(struct mii_bus *bus, int phy_addr, int phy_reg, - u16 val); - int (*mdio_read)(struct mii_bus *bus, int phy_addr, int phy_reg); - void (*mdio_adjust_link)(struct mtk_eth *eth, int port); - u32 piac_offset; - netdev_features_t hw_features; - u32 dma_ring_size; - u32 napi_weight; - u32 dma_type; - u32 pdma_glo_cfg; - u32 rx_int; - u32 tx_int; - u32 status_int; - u32 checksum_bit; - u32 txd4; - u32 mac_count; - - u32 new_stats:1; - u32 jumbo_frame:1; - u32 rx_2b_offset:1; - u32 rx_sg_dma:1; - u32 padding_64b:1; - u32 padding_bug:1; - u32 has_switch:1; -}; - -#define MTK_STAT_OFFSET 0x40 - -/* struct mtk_hw_stats - the structure that holds the traffic statistics. - * @stats_lock: make sure that stats operations are atomic - * @reg_offset: the status register offset of the SoC - * @syncp: the refcount - * - * All of the supported SoCs have hardware counters for traffic statstics. - * Whenever the status IRQ triggers we can read the latest stats from these - * counters and store them in this struct. - */ -struct mtk_hw_stats { - spinlock_t stats_lock; - u32 reg_offset; - struct u64_stats_sync syncp; - - u64 tx_bytes; - u64 tx_packets; - u64 tx_skip; - u64 tx_collisions; - u64 rx_bytes; - u64 rx_packets; - u64 rx_overflow; - u64 rx_fcs_errors; - u64 rx_short_errors; - u64 rx_long_errors; - u64 rx_checksum_errors; - u64 rx_flow_control_packets; -}; - -/* PDMA descriptor can point at 1-2 segments. This enum allows us to track how - * memory was allocated so that it can be freed properly - */ -enum mtk_tx_flags { - MTK_TX_FLAGS_SINGLE0 = 0x01, - MTK_TX_FLAGS_PAGE0 = 0x02, - MTK_TX_FLAGS_PAGE1 = 0x04, -}; - -/* struct mtk_tx_buf - This struct holds the pointers to the memory pointed at - * by the TX descriptor s - * @skb: The SKB pointer of the packet being sent - * @dma_addr0: The base addr of the first segment - * @dma_len0: The length of the first segment - * @dma_addr1: The base addr of the second segment - * @dma_len1: The length of the second segment - */ -struct mtk_tx_buf { - struct sk_buff *skb; - u32 flags; - DEFINE_DMA_UNMAP_ADDR(dma_addr0); - DEFINE_DMA_UNMAP_LEN(dma_len0); - DEFINE_DMA_UNMAP_ADDR(dma_addr1); - DEFINE_DMA_UNMAP_LEN(dma_len1); -}; - -/* struct mtk_tx_ring - This struct holds info describing a TX ring - * @tx_dma: The descriptor ring - * @tx_buf: The memory pointed at by the ring - * @tx_phys: The physical addr of tx_buf - * @tx_next_free: Pointer to the next free descriptor - * @tx_last_free: Pointer to the last free descriptor - * @tx_thresh: The threshold of minimum amount of free descriptors - * @tx_map: Callback to map a new packet into the ring - * @tx_poll: Callback for the housekeeping function - * @tx_clean: Callback for the cleanup function - * @tx_ring_size: How many descriptors are in the ring - * @tx_free_idx: The index of th next free descriptor - * @tx_next_idx: QDMA uses a linked list. This element points to the next - * free descriptor in the list - * @tx_free_count: QDMA uses a linked list. Track how many free descriptors - * are present - */ -struct mtk_tx_ring { - struct mtk_tx_dma *tx_dma; - struct mtk_tx_buf *tx_buf; - dma_addr_t tx_phys; - struct mtk_tx_dma *tx_next_free; - struct mtk_tx_dma *tx_last_free; - u16 tx_thresh; - int (*tx_map)(struct sk_buff *skb, struct net_device *dev, int tx_num, - struct mtk_tx_ring *ring, bool gso); - int (*tx_poll)(struct mtk_eth *eth, int budget, bool *tx_again); - void (*tx_clean)(struct mtk_eth *eth); - - /* PDMA only */ - u16 tx_ring_size; - u16 tx_free_idx; - - /* QDMA only */ - u16 tx_next_idx; - atomic_t tx_free_count; -}; - -/* struct mtk_rx_ring - This struct holds info describing a RX ring - * @rx_dma: The descriptor ring - * @rx_data: The memory pointed at by the ring - * @trx_phys: The physical addr of rx_buf - * @rx_ring_size: How many descriptors are in the ring - * @rx_buf_size: The size of each packet buffer - * @rx_calc_idx: The current head of ring - */ -struct mtk_rx_ring { - struct mtk_rx_dma *rx_dma; - u8 **rx_data; - dma_addr_t rx_phys; - u16 rx_ring_size; - u16 frag_size; - u16 rx_buf_size; - u16 rx_calc_idx; -}; - -/* currently no SoC has more than 2 macs */ -#define MTK_MAX_DEVS 2 - -/* struct mtk_eth - This is the main datasructure for holding the state - * of the driver - * @dev: The device pointer - * @base: The mapped register i/o base - * @page_lock: Make sure that register operations are atomic - * @soc: pointer to our SoC specific data - * @dummy_dev: we run 2 netdevs on 1 physical DMA ring and need a - * dummy for NAPI to work - * @netdev: The netdev instances - * @mac: Each netdev is linked to a physical MAC - * @switch_np: The phandle for the switch - * @irq: The IRQ that we are using - * @msg_enable: Ethtool msg level - * @ysclk: The sysclk rate - neeed for calibration - * @ethsys: The register map pointing at the range used to setup - * MII modes - * @dma_refcnt: track how many netdevs are using the DMA engine - * @tx_ring: Pointer to the memore holding info about the TX ring - * @rx_ring: Pointer to the memore holding info about the RX ring - * @rx_napi: The NAPI struct - * @scratch_ring: Newer SoCs need memory for a second HW managed TX ring - * @scratch_head: The scratch memory that scratch_ring points to. - * @phy: Info about the attached PHYs - * @mii_bus: If there is a bus we need to create an instance for it - * @link: Track if the ports have a physical link - * @sw_priv: Pointer to the switches private data - * @vlan_map: RX VID tracking - */ - -struct mtk_eth { - struct device *dev; - void __iomem *base; - spinlock_t page_lock; - struct mtk_soc_data *soc; - struct net_device dummy_dev; - struct net_device *netdev[MTK_MAX_DEVS]; - struct mtk_mac *mac[MTK_MAX_DEVS]; - struct device_node *switch_np; - int irq; - u32 msg_enable; - unsigned long sysclk; - struct regmap *ethsys; - atomic_t dma_refcnt; - struct mtk_tx_ring tx_ring; - struct mtk_rx_ring rx_ring[2]; - struct napi_struct rx_napi; - struct mtk_tx_dma *scratch_ring; - void *scratch_head; - struct mtk_phy *phy; - struct mii_bus *mii_bus; - int link[8]; - void *sw_priv; - unsigned long vlan_map; -}; - -/* struct mtk_mac - the structure that holds the info about the MACs of the - * SoC - * @id: The number of the MAC - * @of_node: Our devicetree node - * @hw: Backpointer to our main datastruture - * @hw_stats: Packet statistics counter - * @phy_dev: The attached PHY if available - * @phy_flags: The PHYs flags - * @pending_work: The workqueue used to reset the dma ring - */ -struct mtk_mac { - int id; - struct device_node *of_node; - struct mtk_eth *hw; - struct mtk_hw_stats *hw_stats; - struct phy_device *phy_dev; - u32 phy_flags; - struct work_struct pending_work; -}; - -/* the struct describing the SoC. these are declared in the soc_xyz.c files */ -extern const struct of_device_id of_mtk_match[]; - -/* read the hardware status register */ -void mtk_stats_update_mac(struct mtk_mac *mac); - -/* default checksum setup handler */ -void mtk_reset(struct mtk_eth *eth, u32 reset_bits); - -/* register i/o wrappers */ -void mtk_w32(struct mtk_eth *eth, u32 val, unsigned int reg); -u32 mtk_r32(struct mtk_eth *eth, unsigned int reg); - -/* default clock calibration handler */ -int mtk_set_clock_cycle(struct mtk_eth *eth); - -/* default checksum setup handler */ -void mtk_csum_config(struct mtk_eth *eth); - -/* default forward config handler */ -void mtk_fwd_config(struct mtk_eth *eth); - -#endif /* MTK_ETH_H */ diff --git a/drivers/staging/mt7621-eth/soc_mt7621.c b/drivers/staging/mt7621-eth/soc_mt7621.c deleted file mode 100644 index 5d63b5d96f6b..000000000000 --- a/drivers/staging/mt7621-eth/soc_mt7621.c +++ /dev/null @@ -1,161 +0,0 @@ -/* This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> - * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> - */ - -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/if_vlan.h> -#include <linux/of_net.h> - -#include <asm/mach-ralink/ralink_regs.h> - -#include "mtk_eth_soc.h" -#include "gsw_mt7620.h" -#include "mdio.h" - -#define MT7620_CDMA_CSG_CFG 0x400 -#define MT7621_CDMP_IG_CTRL (MT7620_CDMA_CSG_CFG + 0x00) -#define MT7621_CDMP_EG_CTRL (MT7620_CDMA_CSG_CFG + 0x04) -#define MT7621_RESET_FE BIT(6) -#define MT7621_L4_VALID BIT(24) - -#define MT7621_TX_DMA_UDF BIT(19) - -#define CDMA_ICS_EN BIT(2) -#define CDMA_UCS_EN BIT(1) -#define CDMA_TCS_EN BIT(0) - -#define GDMA_ICS_EN BIT(22) -#define GDMA_TCS_EN BIT(21) -#define GDMA_UCS_EN BIT(20) - -/* frame engine counters */ -#define MT7621_REG_MIB_OFFSET 0x2000 -#define MT7621_PPE_AC_BCNT0 (MT7621_REG_MIB_OFFSET + 0x00) -#define MT7621_GDM1_TX_GBCNT (MT7621_REG_MIB_OFFSET + 0x400) -#define MT7621_GDM2_TX_GBCNT (MT7621_GDM1_TX_GBCNT + 0x40) - -#define GSW_REG_GDMA1_MAC_ADRL 0x508 -#define GSW_REG_GDMA1_MAC_ADRH 0x50C -#define GSW_REG_GDMA2_MAC_ADRL 0x1508 -#define GSW_REG_GDMA2_MAC_ADRH 0x150C - -#define MT7621_MTK_RST_GL 0x04 -#define MT7620_MTK_INT_STATUS2 0x08 - -/* MTK_INT_STATUS reg on mt7620 define CNT_GDM1_AF at BIT(29) - * but after test it should be BIT(13). - */ -#define MT7621_MTK_GDM1_AF BIT(28) -#define MT7621_MTK_GDM2_AF BIT(29) - -static const u16 mt7621_reg_table[MTK_REG_COUNT] = { - [MTK_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG, - [MTK_REG_PDMA_RST_CFG] = RT5350_PDMA_RST_CFG, - [MTK_REG_DLY_INT_CFG] = RT5350_DLY_INT_CFG, - [MTK_REG_TX_BASE_PTR0] = RT5350_TX_BASE_PTR0, - [MTK_REG_TX_MAX_CNT0] = RT5350_TX_MAX_CNT0, - [MTK_REG_TX_CTX_IDX0] = RT5350_TX_CTX_IDX0, - [MTK_REG_TX_DTX_IDX0] = RT5350_TX_DTX_IDX0, - [MTK_REG_RX_BASE_PTR0] = RT5350_RX_BASE_PTR0, - [MTK_REG_RX_MAX_CNT0] = RT5350_RX_MAX_CNT0, - [MTK_REG_RX_CALC_IDX0] = RT5350_RX_CALC_IDX0, - [MTK_REG_RX_DRX_IDX0] = RT5350_RX_DRX_IDX0, - [MTK_REG_MTK_INT_ENABLE] = RT5350_MTK_INT_ENABLE, - [MTK_REG_MTK_INT_STATUS] = RT5350_MTK_INT_STATUS, - [MTK_REG_MTK_DMA_VID_BASE] = 0, - [MTK_REG_MTK_COUNTER_BASE] = MT7621_GDM1_TX_GBCNT, - [MTK_REG_MTK_RST_GL] = MT7621_MTK_RST_GL, - [MTK_REG_MTK_INT_STATUS2] = MT7620_MTK_INT_STATUS2, -}; - -static void mt7621_mtk_reset(struct mtk_eth *eth) -{ - mtk_reset(eth, MT7621_RESET_FE); -} - -static int mt7621_fwd_config(struct mtk_eth *eth) -{ - /* Setup GMAC1 only, there is no support for GMAC2 yet */ - mtk_w32(eth, mtk_r32(eth, MT7620_GDMA1_FWD_CFG) & ~0xffff, - MT7620_GDMA1_FWD_CFG); - - /* Enable RX checksum */ - mtk_w32(eth, mtk_r32(eth, MT7620_GDMA1_FWD_CFG) | (GDMA_ICS_EN | - GDMA_TCS_EN | GDMA_UCS_EN), - MT7620_GDMA1_FWD_CFG); - - /* Enable RX VLan Offloading */ - mtk_w32(eth, 0, MT7621_CDMP_EG_CTRL); - - return 0; -} - -static void mt7621_set_mac(struct mtk_mac *mac, unsigned char *hwaddr) -{ - unsigned long flags; - - spin_lock_irqsave(&mac->hw->page_lock, flags); - if (mac->id == 0) { - mtk_w32(mac->hw, (hwaddr[0] << 8) | hwaddr[1], - GSW_REG_GDMA1_MAC_ADRH); - mtk_w32(mac->hw, (hwaddr[2] << 24) | (hwaddr[3] << 16) | - (hwaddr[4] << 8) | hwaddr[5], - GSW_REG_GDMA1_MAC_ADRL); - } - if (mac->id == 1) { - mtk_w32(mac->hw, (hwaddr[0] << 8) | hwaddr[1], - GSW_REG_GDMA2_MAC_ADRH); - mtk_w32(mac->hw, (hwaddr[2] << 24) | (hwaddr[3] << 16) | - (hwaddr[4] << 8) | hwaddr[5], - GSW_REG_GDMA2_MAC_ADRL); - } - spin_unlock_irqrestore(&mac->hw->page_lock, flags); -} - -static struct mtk_soc_data mt7621_data = { - .hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM | - NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | - NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | - NETIF_F_IPV6_CSUM, - .dma_type = MTK_PDMA, - .dma_ring_size = 256, - .napi_weight = 64, - .new_stats = 1, - .padding_64b = 1, - .rx_2b_offset = 1, - .rx_sg_dma = 1, - .has_switch = 1, - .mac_count = 2, - .reset_fe = mt7621_mtk_reset, - .set_mac = mt7621_set_mac, - .fwd_config = mt7621_fwd_config, - .switch_init = mtk_gsw_init, - .reg_table = mt7621_reg_table, - .pdma_glo_cfg = MTK_PDMA_SIZE_16DWORDS, - .rx_int = RT5350_RX_DONE_INT, - .tx_int = RT5350_TX_DONE_INT, - .status_int = MT7621_MTK_GDM1_AF | MT7621_MTK_GDM2_AF, - .checksum_bit = MT7621_L4_VALID, - .has_carrier = mt7620_has_carrier, - .mdio_read = mt7620_mdio_read, - .mdio_write = mt7620_mdio_write, - .mdio_adjust_link = mt7620_mdio_link_adjust, -}; - -const struct of_device_id of_mtk_match[] = { - { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data }, - {}, -}; - -MODULE_DEVICE_TABLE(of, of_mtk_match); diff --git a/drivers/staging/mt7621-mmc/Kconfig b/drivers/staging/mt7621-mmc/Kconfig index c6dfe8c637dc..1eb79cd6e22f 100644 --- a/drivers/staging/mt7621-mmc/Kconfig +++ b/drivers/staging/mt7621-mmc/Kconfig @@ -1,6 +1,6 @@ config MTK_MMC tristate "MTK SD/MMC" - depends on !MTD_NAND_RALINK && MMC + depends on RALINK && MMC config MTK_AEE_KDUMP bool "MTK AEE KDUMP" diff --git a/drivers/staging/mt7621-mmc/dbg.c b/drivers/staging/mt7621-mmc/dbg.c index 829d3d0e895e..c7c091fa1da0 100644 --- a/drivers/staging/mt7621-mmc/dbg.c +++ b/drivers/staging/mt7621-mmc/dbg.c @@ -36,7 +36,6 @@ * Inc. */ -#include <linux/version.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/kthread.h> @@ -51,7 +50,6 @@ #include "mt6575_sd.h" #include <linux/seq_file.h> -static char cmd_buf[256]; /* for debug zone */ unsigned int sd_debug_zone[4] = { @@ -62,6 +60,7 @@ unsigned int sd_debug_zone[4] = { }; #if defined(MT6575_SD_DEBUG) +static char cmd_buf[256]; /* for driver profile */ #define TICKS_ONE_MS (13000) u32 gpt_enable; diff --git a/drivers/staging/mt7621-mmc/mt6575_sd.h b/drivers/staging/mt7621-mmc/mt6575_sd.h index 4e287c140acb..038a484a9476 100644 --- a/drivers/staging/mt7621-mmc/mt6575_sd.h +++ b/drivers/staging/mt7621-mmc/mt6575_sd.h @@ -363,7 +363,7 @@ enum { #define MSDC_CKGEN_MSDC_DLY_SEL (0x1F << 10) #define MSDC_INT_DAT_LATCH_CK_SEL (0x7 << 7) #define MSDC_CKGEN_MSDC_CK_SEL (0x1 << 6) -#define CARD_READY_FOR_DATA (1 << 8) +#define CARD_READY_FOR_DATA BIT(8) #define CARD_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /*--------------------------------------------------------------------------*/ diff --git a/drivers/staging/mt7621-mmc/sd.c b/drivers/staging/mt7621-mmc/sd.c index 0379f9c96f2a..4b26ec896a96 100644 --- a/drivers/staging/mt7621-mmc/sd.c +++ b/drivers/staging/mt7621-mmc/sd.c @@ -38,6 +38,7 @@ #include <linux/dma-mapping.h> #include <linux/spinlock.h> #include <linux/platform_device.h> +#include <linux/interrupt.h> #include <linux/mmc/host.h> #include <linux/mmc/mmc.h> @@ -216,26 +217,6 @@ static void msdc_tasklet_card(struct work_struct *work) spin_unlock(&host->lock); } -static void msdc_select_clksrc(struct msdc_host *host, unsigned char clksrc) -{ - u32 val; - - BUG_ON(clksrc > 3); - - val = readl(host->base + MSDC_CLKSRC_REG); - if (readl(host->base + MSDC_ECO_VER) >= 4) { - val &= ~(0x3 << clk_src_bit[host->id]); - val |= clksrc << clk_src_bit[host->id]; - } else { - val &= ~0x3; val |= clksrc; - } - writel(val, host->base + MSDC_CLKSRC_REG); - - host->hclk = hclks[clksrc]; - host->hw->clk_src = clksrc; -} -#endif /* end of --- */ - static void msdc_set_mclk(struct msdc_host *host, int ddr, unsigned int hz) { //struct msdc_hw *hw = host->hw; @@ -318,9 +299,9 @@ static void msdc_abort_data(struct msdc_host *host) #ifdef CONFIG_PM /* - register as callback function of WIFI(combo_sdio_register_pm) . - can called by msdc_drv_suspend/resume too. -*/ + * register as callback function of WIFI(combo_sdio_register_pm) . + * can called by msdc_drv_suspend/resume too. + */ static void msdc_pm(pm_message_t state, void *data) { struct msdc_host *host = (struct msdc_host *)data; @@ -351,7 +332,6 @@ static void msdc_pm(pm_message_t state, void *data) host->suspend = 0; host->pm_state = state; - } } #endif @@ -685,7 +665,7 @@ static int msdc_do_request(struct mmc_host *mmc, struct mmc_request *mrq) if (read) { if ((host->timeout_ns != data->timeout_ns) || - (host->timeout_clks != data->timeout_clks)) { + (host->timeout_clks != data->timeout_clks)) { msdc_set_timeout(host, data->timeout_ns, data->timeout_clks); } } @@ -711,7 +691,8 @@ static int msdc_do_request(struct mmc_host *mmc, struct mmc_request *mrq) goto done; /* for read, the data coming too fast, then CRC error - start DMA no business with CRC. */ + * start DMA no business with CRC. + */ //init_completion(&host->xfer_done); msdc_dma_start(host); @@ -794,9 +775,10 @@ static int msdc_tune_cmdrsp(struct msdc_host *host, struct mmc_command *cmd) u32 skip = 1; /* ==== don't support 3.0 now ==== - 1: R_SMPL[1] - 2: PAD_CMD_RESP_RXDLY[26:22] - ==========================*/ + * 1: R_SMPL[1] + * 2: PAD_CMD_RESP_RXDLY[26:22] + * ========================== + */ // save the previous tune result sdr_get_field(host->base + MSDC_IOCON, MSDC_IOCON_RSPL, &orig_rsmpl); @@ -1188,8 +1170,6 @@ static void msdc_ops_request(struct mmc_host *mmc, struct mmc_request *mrq) spin_unlock(&host->lock); mmc_request_done(mmc, mrq); - - return; } /* called by ops.set_ios */ @@ -1223,19 +1203,19 @@ static void msdc_ops_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) u32 ddr = 0; #ifdef MT6575_SD_DEBUG - static char *vdd[] = { + static const char * const vdd[] = { "1.50v", "1.55v", "1.60v", "1.65v", "1.70v", "1.80v", "1.90v", "2.00v", "2.10v", "2.20v", "2.30v", "2.40v", "2.50v", "2.60v", "2.70v", "2.80v", "2.90v", "3.00v", "3.10v", "3.20v", "3.30v", "3.40v", "3.50v", "3.60v" }; - static char *power_mode[] = { + static const char * const power_mode[] = { "OFF", "UP", "ON" }; - static char *bus_mode[] = { + static const char * const bus_mode[] = { "UNKNOWN", "OPENDRAIN", "PUSHPULL" }; - static char *timing[] = { + static const char * const timing[] = { "LEGACY", "MMC_HS", "SD_HS" }; @@ -1398,7 +1378,7 @@ static irqreturn_t msdc_irq(int irq, void *dev_id) /* command interrupts */ if (cmd && (intsts & cmdsts)) { if ((intsts & MSDC_INT_CMDRDY) || (intsts & MSDC_INT_ACMDRDY) || - (intsts & MSDC_INT_ACMD19_DONE)) { + (intsts & MSDC_INT_ACMD19_DONE)) { u32 *rsp = &cmd->resp[0]; switch (host->cmd_rsp) { @@ -1431,13 +1411,13 @@ static irqreturn_t msdc_irq(int irq, void *dev_id) /* mmc irq interrupts */ if (intsts & MSDC_INT_MMCIRQ) dev_info(mmc_dev(host->mmc), "msdc[%d] MMCIRQ: SDC_CSTS=0x%.8x\r\n", - host->id, readl(host->base + SDC_CSTS)); + host->id, readl(host->base + SDC_CSTS)); return IRQ_HANDLED; } /*--------------------------------------------------------------------------*/ -/* platform_driver members */ +/* platform_driver members */ /*--------------------------------------------------------------------------*/ /* called by msdc_drv_probe/remove */ static void msdc_enable_cd_irq(struct msdc_host *host, int enable) @@ -1446,11 +1426,11 @@ static void msdc_enable_cd_irq(struct msdc_host *host, int enable) /* for sdio, not set */ if ((hw->flags & MSDC_CD_PIN_EN) == 0) { - /* Pull down card detection pin since it is not avaiable */ + /* Pull down card detection pin since it is not available */ /* - if (hw->config_gpio_pin) - hw->config_gpio_pin(MSDC_CD_PIN, GPIO_PULL_DOWN); - */ + * if (hw->config_gpio_pin) + * hw->config_gpio_pin(MSDC_CD_PIN, GPIO_PULL_DOWN); + */ sdr_clr_bits(host->base + MSDC_PS, MSDC_PS_CDEN); sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_CDSC); sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); @@ -1490,7 +1470,6 @@ static void msdc_enable_cd_irq(struct msdc_host *host, int enable) /* called by msdc_drv_probe */ static void msdc_init_hw(struct msdc_host *host) { - /* Configure to MMC/SD mode */ sdr_set_field(host->base + MSDC_CFG, MSDC_CFG_MODE, MSDC_SDMMC); @@ -1538,12 +1517,13 @@ static void msdc_init_hw(struct msdc_host *host) #endif /* for safety, should clear SDC_CFG.SDIO_INT_DET_EN & set SDC_CFG.SDIO in - pre-loader,uboot,kernel drivers. and SDC_CFG.SDIO_INT_DET_EN will be only - set when kernel driver wants to use SDIO bus interrupt */ + * pre-loader,uboot,kernel drivers. and SDC_CFG.SDIO_INT_DET_EN will be only + * set when kernel driver wants to use SDIO bus interrupt + */ /* Configure to enable SDIO mode. it's must otherwise sdio cmd5 failed */ sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIO); - /* disable detect SDIO device interupt function */ + /* disable detect SDIO device interrupt function */ sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); /* eneable SMT for glitch filter */ @@ -1693,7 +1673,7 @@ static int msdc_drv_probe(struct platform_device *pdev) host->mrq = NULL; //init_MUTEX(&host->sem); /* we don't need to support multiple threads access */ - mmc_dev(mmc)->dma_mask = NULL; + dma_coerce_mask_and_coherent(mmc_dev(mmc), DMA_BIT_MASK(32)); /* using dma_alloc_coherent*/ /* todo: using 1, for all 4 slots */ host->dma.gpd = dma_alloc_coherent(&pdev->dev, @@ -1797,6 +1777,7 @@ static void msdc_drv_pm(struct platform_device *pdev, pm_message_t state) if (mmc) { struct msdc_host *host = mmc_priv(mmc); + msdc_pm(state, (void *)host); } } diff --git a/drivers/staging/mt7621-pci-phy/Kconfig b/drivers/staging/mt7621-pci-phy/Kconfig new file mode 100644 index 000000000000..b9f6ab784ee8 --- /dev/null +++ b/drivers/staging/mt7621-pci-phy/Kconfig @@ -0,0 +1,7 @@ +config PCI_MT7621_PHY + tristate "MediaTek MT7621 PCI PHY Driver" + depends on RALINK && OF + select GENERIC_PHY + help + Say 'Y' here to add support for MediaTek MT7621 PCI PHY driver, + diff --git a/drivers/staging/mt7621-pci-phy/Makefile b/drivers/staging/mt7621-pci-phy/Makefile new file mode 100644 index 000000000000..a970056f05c1 --- /dev/null +++ b/drivers/staging/mt7621-pci-phy/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_PCI_MT7621_PHY) += pci-mt7621-phy.o diff --git a/drivers/staging/mt7621-pci-phy/TODO b/drivers/staging/mt7621-pci-phy/TODO new file mode 100644 index 000000000000..a255e8f753eb --- /dev/null +++ b/drivers/staging/mt7621-pci-phy/TODO @@ -0,0 +1,4 @@ + +- general code review and cleanup + +Cc: NeilBrown <neil@brown.name> and Sergio Paracuellos <sergio.paracuellos@gmail.com> diff --git a/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.txt b/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.txt new file mode 100644 index 000000000000..33a8a698bdd0 --- /dev/null +++ b/drivers/staging/mt7621-pci-phy/mediatek,mt7621-pci-phy.txt @@ -0,0 +1,54 @@ +Mediatek Mt7621 PCIe PHY + +Required properties: +- compatible: must be "mediatek,mt7621-pci-phy" +- reg: base address and length of the PCIe PHY block +- #address-cells: must be 1 +- #size-cells: must be 0 + +Each PCIe PHY should be represented by a child node + +Required properties For the child node: +- reg: the PHY ID +0 - PCIe RC 0 +1 - PCIe RC 1 +- #phy-cells: must be 0 + +Example: + pcie0_phy: pcie-phy@1a149000 { + compatible = "mediatek,mt7621-pci-phy"; + reg = <0x1a149000 0x0700>; + #address-cells = <1>; + #size-cells = <0>; + + pcie0_port: pcie-phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + pcie1_port: pcie-phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + }; + + pcie1_phy: pcie-phy@1a14a000 { + compatible = "mediatek,mt7621-pci-phy"; + reg = <0x1a14a000 0x0700>; + #address-cells = <1>; + #size-cells = <0>; + + pcie2_port: pcie-phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + }; + + /* users of the PCIe phy */ + + pcie: pcie@1e140000 { + ... + ... + phys = <&pcie0_port>, <&pcie1_port>, <&pcie2_port>; + phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2"; + };
\ No newline at end of file diff --git a/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c b/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c new file mode 100644 index 000000000000..d3ca2f019112 --- /dev/null +++ b/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c @@ -0,0 +1,387 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Mediatek MT7621 PCI PHY Driver + * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com> + */ + +#include <dt-bindings/phy/phy.h> +#include <linux/bitops.h> +#include <linux/module.h> +#include <linux/of_address.h> +#include <linux/of_device.h> +#include <linux/phy/phy.h> +#include <linux/platform_device.h> +#include <mt7621.h> +#include <ralink_regs.h> + +#define RALINK_CLKCFG1 0x30 +#define CHIP_REV_MT7621_E2 0x0101 + +#define PCIE_PORT_CLK_EN(x) BIT(24 + (x)) + +#define RG_PE1_PIPE_REG 0x02c +#define RG_PE1_PIPE_RST BIT(12) +#define RG_PE1_PIPE_CMD_FRC BIT(4) + +#define RG_P0_TO_P1_WIDTH 0x100 +#define RG_PE1_H_LCDDS_REG 0x49c +#define RG_PE1_H_LCDDS_PCW GENMASK(30, 0) +#define RG_PE1_H_LCDDS_PCW_VAL(x) ((0x7fffffff & (x)) << 0) + +#define RG_PE1_FRC_H_XTAL_REG 0x400 +#define RG_PE1_FRC_H_XTAL_TYPE BIT(8) +#define RG_PE1_H_XTAL_TYPE GENMASK(10, 9) +#define RG_PE1_H_XTAL_TYPE_VAL(x) ((0x3 & (x)) << 9) + +#define RG_PE1_FRC_PHY_REG 0x000 +#define RG_PE1_FRC_PHY_EN BIT(4) +#define RG_PE1_PHY_EN BIT(5) + +#define RG_PE1_H_PLL_REG 0x490 +#define RG_PE1_H_PLL_BC GENMASK(23, 22) +#define RG_PE1_H_PLL_BC_VAL(x) ((0x3 & (x)) << 22) +#define RG_PE1_H_PLL_BP GENMASK(21, 18) +#define RG_PE1_H_PLL_BP_VAL(x) ((0xf & (x)) << 18) +#define RG_PE1_H_PLL_IR GENMASK(15, 12) +#define RG_PE1_H_PLL_IR_VAL(x) ((0xf & (x)) << 12) +#define RG_PE1_H_PLL_IC GENMASK(11, 8) +#define RG_PE1_H_PLL_IC_VAL(x) ((0xf & (x)) << 8) +#define RG_PE1_H_PLL_PREDIV GENMASK(7, 6) +#define RG_PE1_H_PLL_PREDIV_VAL(x) ((0x3 & (x)) << 6) +#define RG_PE1_PLL_DIVEN GENMASK(3, 1) +#define RG_PE1_PLL_DIVEN_VAL(x) ((0x7 & (x)) << 1) + +#define RG_PE1_H_PLL_FBKSEL_REG 0x4bc +#define RG_PE1_H_PLL_FBKSEL GENMASK(5, 4) +#define RG_PE1_H_PLL_FBKSEL_VAL(x) ((0x3 & (x)) << 4) + +#define RG_PE1_H_LCDDS_SSC_PRD_REG 0x4a4 +#define RG_PE1_H_LCDDS_SSC_PRD GENMASK(15, 0) +#define RG_PE1_H_LCDDS_SSC_PRD_VAL(x) ((0xffff & (x)) << 0) + +#define RG_PE1_H_LCDDS_SSC_DELTA_REG 0x4a8 +#define RG_PE1_H_LCDDS_SSC_DELTA GENMASK(11, 0) +#define RG_PE1_H_LCDDS_SSC_DELTA_VAL(x) ((0xfff & (x)) << 0) +#define RG_PE1_H_LCDDS_SSC_DELTA1 GENMASK(27, 16) +#define RG_PE1_H_LCDDS_SSC_DELTA1_VAL(x) ((0xff & (x)) << 16) + +#define RG_PE1_LCDDS_CLK_PH_INV_REG 0x4a0 +#define RG_PE1_LCDDS_CLK_PH_INV BIT(5) + +#define RG_PE1_H_PLL_BR_REG 0x4ac +#define RG_PE1_H_PLL_BR GENMASK(18, 16) +#define RG_PE1_H_PLL_BR_VAL(x) ((0x7 & (x)) << 16) + +#define RG_PE1_MSTCKDIV_REG 0x414 +#define RG_PE1_MSTCKDIV GENMASK(7, 6) +#define RG_PE1_MSTCKDIV_VAL(x) ((0x3 & (x)) << 6) + +#define RG_PE1_FRC_MSTCKDIV BIT(5) + +/** + * struct mt7621_pci_phy_instance - Mt7621 Pcie PHY device + * @phy: pointer to the kernel PHY device + * @port_base: base register + * @index: internal ID to identify the Mt7621 PCIe PHY + */ +struct mt7621_pci_phy_instance { + struct phy *phy; + void __iomem *port_base; + u32 index; +}; + +/** + * struct mt7621_pci_phy - Mt7621 Pcie PHY core + * @dev: pointer to device + * @phys: pointer to Mt7621 PHY device + * @nphys: number of PHY devices for this core + */ +struct mt7621_pci_phy { + struct device *dev; + struct mt7621_pci_phy_instance **phys; + int nphys; +}; + +static inline u32 phy_read(struct mt7621_pci_phy_instance *instance, u32 reg) +{ + return readl(instance->port_base + reg); +} + +static inline void phy_write(struct mt7621_pci_phy_instance *instance, + u32 val, u32 reg) +{ + writel(val, instance->port_base + reg); +} + +static void mt7621_bypass_pipe_rst(struct mt7621_pci_phy *phy, + struct mt7621_pci_phy_instance *instance) +{ + u32 offset = (instance->index != 1) ? + RG_PE1_PIPE_REG : RG_PE1_PIPE_REG + RG_P0_TO_P1_WIDTH; + u32 reg; + + reg = phy_read(instance, offset); + reg &= ~(RG_PE1_PIPE_RST | RG_PE1_PIPE_CMD_FRC); + reg |= (RG_PE1_PIPE_RST | RG_PE1_PIPE_CMD_FRC); + phy_write(instance, reg, offset); +} + +static void mt7621_set_phy_for_ssc(struct mt7621_pci_phy *phy, + struct mt7621_pci_phy_instance *instance) +{ + struct device *dev = phy->dev; + u32 reg = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0); + u32 offset; + u32 val; + + reg = (reg >> 6) & 0x7; + /* Set PCIe Port PHY to disable SSC */ + /* Debug Xtal Type */ + val = phy_read(instance, RG_PE1_FRC_H_XTAL_REG); + val &= ~(RG_PE1_FRC_H_XTAL_TYPE | RG_PE1_H_XTAL_TYPE); + val |= RG_PE1_FRC_H_XTAL_TYPE; + val |= RG_PE1_H_XTAL_TYPE_VAL(0x00); + phy_write(instance, val, RG_PE1_FRC_H_XTAL_REG); + + /* disable port */ + offset = (instance->index != 1) ? + RG_PE1_FRC_PHY_REG : RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH; + val = phy_read(instance, offset); + val &= ~(RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN); + val |= RG_PE1_FRC_PHY_EN; + phy_write(instance, val, offset); + + /* Set Pre-divider ratio (for host mode) */ + val = phy_read(instance, RG_PE1_H_PLL_REG); + val &= ~(RG_PE1_H_PLL_PREDIV); + + if (reg <= 5 && reg >= 3) { /* 40MHz Xtal */ + val |= RG_PE1_H_PLL_PREDIV_VAL(0x01); + phy_write(instance, val, RG_PE1_H_PLL_REG); + dev_info(dev, "Xtal is 40MHz\n"); + } else { /* 25MHz | 20MHz Xtal */ + val |= RG_PE1_H_PLL_PREDIV_VAL(0x00); + phy_write(instance, val, RG_PE1_H_PLL_REG); + if (reg >= 6) { + dev_info(dev, "Xtal is 25MHz\n"); + + /* Select feedback clock */ + val = phy_read(instance, RG_PE1_H_PLL_FBKSEL_REG); + val &= ~(RG_PE1_H_PLL_FBKSEL); + val |= RG_PE1_H_PLL_FBKSEL_VAL(0x01); + phy_write(instance, val, RG_PE1_H_PLL_FBKSEL_REG); + + /* DDS NCPO PCW (for host mode) */ + val = phy_read(instance, RG_PE1_H_LCDDS_SSC_PRD_REG); + val &= ~(RG_PE1_H_LCDDS_SSC_PRD); + val |= RG_PE1_H_LCDDS_SSC_PRD_VAL(0x18000000); + phy_write(instance, val, RG_PE1_H_LCDDS_SSC_PRD_REG); + + /* DDS SSC dither period control */ + val = phy_read(instance, RG_PE1_H_LCDDS_SSC_PRD_REG); + val &= ~(RG_PE1_H_LCDDS_SSC_PRD); + val |= RG_PE1_H_LCDDS_SSC_PRD_VAL(0x18d); + phy_write(instance, val, RG_PE1_H_LCDDS_SSC_PRD_REG); + + /* DDS SSC dither amplitude control */ + val = phy_read(instance, RG_PE1_H_LCDDS_SSC_DELTA_REG); + val &= ~(RG_PE1_H_LCDDS_SSC_DELTA | + RG_PE1_H_LCDDS_SSC_DELTA1); + val |= RG_PE1_H_LCDDS_SSC_DELTA_VAL(0x4a); + val |= RG_PE1_H_LCDDS_SSC_DELTA1_VAL(0x4a); + phy_write(instance, val, RG_PE1_H_LCDDS_SSC_DELTA_REG); + } else { + dev_info(dev, "Xtal is 20MHz\n"); + } + } + + /* DDS clock inversion */ + val = phy_read(instance, RG_PE1_LCDDS_CLK_PH_INV_REG); + val &= ~(RG_PE1_LCDDS_CLK_PH_INV); + val |= RG_PE1_LCDDS_CLK_PH_INV; + phy_write(instance, val, RG_PE1_LCDDS_CLK_PH_INV_REG); + + /* Set PLL bits */ + val = phy_read(instance, RG_PE1_H_PLL_REG); + val &= ~(RG_PE1_H_PLL_BC | RG_PE1_H_PLL_BP | RG_PE1_H_PLL_IR | + RG_PE1_H_PLL_IC | RG_PE1_PLL_DIVEN); + val |= RG_PE1_H_PLL_BC_VAL(0x02); + val |= RG_PE1_H_PLL_BP_VAL(0x06); + val |= RG_PE1_H_PLL_IR_VAL(0x02); + val |= RG_PE1_H_PLL_IC_VAL(0x01); + val |= RG_PE1_PLL_DIVEN_VAL(0x02); + phy_write(instance, val, RG_PE1_H_PLL_REG); + + val = phy_read(instance, RG_PE1_H_PLL_BR_REG); + val &= ~(RG_PE1_H_PLL_BR); + val |= RG_PE1_H_PLL_BR_VAL(0x00); + phy_write(instance, val, RG_PE1_H_PLL_BR_REG); + + if (reg <= 5 && reg >= 3) { /* 40MHz Xtal */ + /* set force mode enable of da_pe1_mstckdiv */ + val = phy_read(instance, RG_PE1_MSTCKDIV_REG); + val &= ~(RG_PE1_MSTCKDIV | RG_PE1_FRC_MSTCKDIV); + val |= (RG_PE1_MSTCKDIV_VAL(0x01) | RG_PE1_FRC_MSTCKDIV); + phy_write(instance, val, RG_PE1_MSTCKDIV_REG); + } +} + +static int mt7621_pci_phy_init(struct phy *phy) +{ + struct mt7621_pci_phy_instance *instance = phy_get_drvdata(phy); + struct mt7621_pci_phy *mphy = dev_get_drvdata(phy->dev.parent); + u32 chip_rev_id = rt_sysc_r32(SYSC_REG_CHIP_REV); + + if ((chip_rev_id & 0xFFFF) == CHIP_REV_MT7621_E2) + mt7621_bypass_pipe_rst(mphy, instance); + + mt7621_set_phy_for_ssc(mphy, instance); + + return 0; +} + +static int mt7621_pci_phy_power_on(struct phy *phy) +{ + struct mt7621_pci_phy_instance *instance = phy_get_drvdata(phy); + u32 offset = (instance->index != 1) ? + RG_PE1_FRC_PHY_REG : RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH; + u32 val; + + /* Enable PHY and disable force mode */ + val = phy_read(instance, offset); + val &= ~(RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN); + val |= (RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN); + phy_write(instance, val, offset); + + return 0; +} + +static int mt7621_pci_phy_power_off(struct phy *phy) +{ + struct mt7621_pci_phy_instance *instance = phy_get_drvdata(phy); + u32 offset = (instance->index != 1) ? + RG_PE1_FRC_PHY_REG : RG_PE1_FRC_PHY_REG + RG_P0_TO_P1_WIDTH; + u32 val; + + /* Disable PHY */ + val = phy_read(instance, offset); + val &= ~(RG_PE1_FRC_PHY_EN | RG_PE1_PHY_EN); + val |= RG_PE1_FRC_PHY_EN; + phy_write(instance, val, offset); + + return 0; +} + +static int mt7621_pci_phy_exit(struct phy *phy) +{ + struct mt7621_pci_phy_instance *instance = phy_get_drvdata(phy); + + rt_sysc_m32(PCIE_PORT_CLK_EN(instance->index), 0, RALINK_CLKCFG1); + + return 0; +} + +static const struct phy_ops mt7621_pci_phy_ops = { + .init = mt7621_pci_phy_init, + .exit = mt7621_pci_phy_exit, + .power_on = mt7621_pci_phy_power_on, + .power_off = mt7621_pci_phy_power_off, + .owner = THIS_MODULE, +}; + +static int mt7621_pci_phy_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct device_node *child_np; + struct phy_provider *provider; + struct mt7621_pci_phy *phy; + struct resource res; + int port, ret; + void __iomem *port_base; + + phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL); + if (!phy) + return -ENOMEM; + + phy->nphys = of_get_child_count(np); + phy->phys = devm_kcalloc(dev, phy->nphys, + sizeof(*phy->phys), GFP_KERNEL); + if (!phy->phys) + return -ENOMEM; + + phy->dev = dev; + platform_set_drvdata(pdev, phy); + + ret = of_address_to_resource(np, 0, &res); + if (ret) { + dev_err(dev, "failed to get address resource(id-%d)\n", port); + return ret; + } + + port_base = devm_ioremap_resource(dev, &res); + if (IS_ERR(port_base)) { + dev_err(dev, "failed to remap phy regs\n"); + return PTR_ERR(port_base); + } + + port = 0; + for_each_child_of_node(np, child_np) { + struct mt7621_pci_phy_instance *instance; + struct phy *pphy; + + instance = devm_kzalloc(dev, sizeof(*instance), GFP_KERNEL); + if (!instance) { + ret = -ENOMEM; + goto put_child; + } + + phy->phys[port] = instance; + + pphy = devm_phy_create(dev, child_np, &mt7621_pci_phy_ops); + if (IS_ERR(phy)) { + dev_err(dev, "failed to create phy\n"); + ret = PTR_ERR(phy); + goto put_child; + } + + instance->port_base = port_base; + instance->phy = pphy; + instance->index = port; + phy_set_drvdata(pphy, instance); + port++; + } + + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(provider); + +put_child: + of_node_put(child_np); + return ret; +} + +static const struct of_device_id mt7621_pci_phy_ids[] = { + { .compatible = "mediatek,mt7621-pci-phy" }, + {}, +}; +MODULE_DEVICE_TABLE(of, mt7621_pci_ids); + +static struct platform_driver mt7621_pci_phy_driver = { + .probe = mt7621_pci_phy_probe, + .driver = { + .name = "mt7621-pci-phy", + .of_match_table = of_match_ptr(mt7621_pci_phy_ids), + }, +}; + +static int __init mt7621_pci_phy_drv_init(void) +{ + return platform_driver_register(&mt7621_pci_phy_driver); +} + +module_init(mt7621_pci_phy_drv_init); + +MODULE_AUTHOR("Sergio Paracuellos <sergio.paracuellos@gmail.com>"); +MODULE_DESCRIPTION("MediaTek MT7621 PCIe PHY driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/mt7621-pci/Kconfig b/drivers/staging/mt7621-pci/Kconfig index d33533872a16..c8fa17cfa807 100644 --- a/drivers/staging/mt7621-pci/Kconfig +++ b/drivers/staging/mt7621-pci/Kconfig @@ -1,6 +1,7 @@ config PCI_MT7621 tristate "MediaTek MT7621 PCI Controller" depends on RALINK + depends on PCI select PCI_DRIVERS_GENERIC help This selects a driver for the MediaTek MT7621 PCI Controller. diff --git a/drivers/staging/mt7621-pci/Makefile b/drivers/staging/mt7621-pci/Makefile index 607b84bedcc3..d4655a726b61 100644 --- a/drivers/staging/mt7621-pci/Makefile +++ b/drivers/staging/mt7621-pci/Makefile @@ -1 +1 @@ -obj-$(CONFIG_SOC_MT7621) += pci-mt7621.o +obj-$(CONFIG_PCI_MT7621) += pci-mt7621.o diff --git a/drivers/staging/mt7621-pci/TODO b/drivers/staging/mt7621-pci/TODO index cf30f629b9fd..ccfd266db4ca 100644 --- a/drivers/staging/mt7621-pci/TODO +++ b/drivers/staging/mt7621-pci/TODO @@ -1,12 +1,4 @@ - general code review and cleanup -- can this be converted to not require PCI_DRIVERS_LEGACY ?? - The irq returned by pcibios_map_irq is a "hwirq" (hardware irq number) - and pci_assign_irq() assigns this directly to dev->irq, which - expects a "virq" (virtual irq number). These numbers are different - on MIPS. There is a gross hack to make it work on one - specific platform, so it can be tested. -- Should this be merged with arch/mips/pci/pci-mt7620.c ?? -- ensure device-tree requirements are documented Cc: NeilBrown <neil@brown.name> diff --git a/drivers/staging/mt7621-pci/mediatek,mt7621-pci.txt b/drivers/staging/mt7621-pci/mediatek,mt7621-pci.txt new file mode 100644 index 000000000000..5a6ee4103cd5 --- /dev/null +++ b/drivers/staging/mt7621-pci/mediatek,mt7621-pci.txt @@ -0,0 +1,99 @@ +MediaTek MT7621 PCIe controller + +Required properties: +- compatible: "mediatek,mt7621-pci" +- device_type: Must be "pci" +- reg: Base addresses and lengths of the PCIe subsys and root ports. +- bus-range: Range of bus numbers associated with this controller. +- #address-cells: Address representation for root ports (must be 3) +- pinctrl-names : The pin control state names. +- pinctrl-0: The "default" pinctrl state. +- #size-cells: Size representation for root ports (must be 2) +- ranges: Ranges for the PCI memory and I/O regions. +- #interrupt-cells: Must be 1 +- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties. + Please refer to the standard PCI bus binding document for a more detailed + explanation. +- status: either "disabled" or "okay". +- resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names: Must be "pcie0", "pcie1", "pcieN"... based on the number of + root ports. +- clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names: Must be "pcie0", "pcie1", "pcieN"... based on the number of + root ports. + +In addition, the device tree node must have sub-nodes describing each PCIe port +interface, having the following mandatory properties: + +Required properties: +- reg: Only the first four bytes are used to refer to the correct bus number + and device number. +- #address-cells: Must be 3 +- #size-cells: Must be 2 +- ranges: Sub-ranges distributed from the PCIe controller node. An empty + property is sufficient. +- bus-range: Range of bus numbers associated with this port. + +Example for MT7621: + + pcie: pcie@1e140000 { + compatible = "mediatek,mt7621-pci"; + reg = <0x1e140000 0x100 /* host-pci bridge registers */ + 0x1e142000 0x100 /* pcie port 0 RC control registers */ + 0x1e143000 0x100 /* pcie port 1 RC control registers */ + 0x1e144000 0x100>; /* pcie port 2 RC control registers */ + + #address-cells = <3>; + #size-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + + device_type = "pci"; + + bus-range = <0 255>; + ranges = < + 0x02000000 0 0x00000000 0x60000000 0 0x10000000 /* pci memory */ + 0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */ + >; + + #interrupt-cells = <1>; + interrupt-map-mask = <0xF0000 0 0 1>; + interrupt-map = <0x10000 0 0 1 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>, + <0x20000 0 0 1 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>, + <0x30000 0 0 1 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>; + + status = "disabled"; + + resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>; + reset-names = "pcie0", "pcie1", "pcie2"; + clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>; + clock-names = "pcie0", "pcie1", "pcie2"; + + pcie@0,0 { + reg = <0x0000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + bus-range = <0x00 0xff>; + }; + + pcie@1,0 { + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + bus-range = <0x00 0xff>; + }; + + pcie@2,0 { + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + bus-range = <0x00 0xff>; + }; + }; + diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c index 8371a9cdb164..379ae780c691 100644 --- a/drivers/staging/mt7621-pci/pci-mt7621.c +++ b/drivers/staging/mt7621-pci/pci-mt7621.c @@ -1,33 +1,10 @@ // SPDX-License-Identifier: GPL-2.0+ -/************************************************************************** - * - * BRIEF MODULE DESCRIPTION +/* + * BRIEF MODULE DESCRIPTION * PCI init for Ralink RT2880 solution * - * Copyright 2007 Ralink Inc. (bruce_chang@ralinktech.com.tw) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * + * Copyright 2007 Ralink Inc. (bruce_chang@ralinktech.com.tw) * - ************************************************************************** * May 2007 Bruce Chang * Initial Release * @@ -36,13 +13,11 @@ * * May 2011 Bruce Chang * support RT6855/MT7620 PCIe - * - ************************************************************************** */ #include <linux/bitops.h> -#include <linux/clk.h> #include <linux/delay.h> +#include <linux/iopoll.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_address.h> @@ -50,6 +25,7 @@ #include <linux/of_pci.h> #include <linux/of_platform.h> #include <linux/pci.h> +#include <linux/phy/phy.h> #include <linux/platform_device.h> #include <linux/reset.h> #include <mt7621.h> @@ -57,29 +33,39 @@ #include "../../pci/pci.h" -/* - * These functions and structures provide the BIOS scan and mapping of the PCI - * devices. - */ +/* sysctl */ +#define MT7621_CHIP_REV_ID 0x0c +#define CHIP_REV_MT7621_E2 0x0101 -#define RALINK_PCIE0_CLK_EN BIT(24) -#define RALINK_PCIE1_CLK_EN BIT(25) -#define RALINK_PCIE2_CLK_EN BIT(26) +/* MediaTek specific configuration registers */ +#define PCIE_FTS_NUM 0x70c +#define PCIE_FTS_NUM_MASK GENMASK(15, 8) +#define PCIE_FTS_NUM_L0(x) ((x) & 0xff << 8) -#define RALINK_PCI_CONFIG_ADDR 0x20 -#define RALINK_PCI_CONFIG_DATA 0x24 -#define RALINK_PCI_MEMBASE 0x28 -#define RALINK_PCI_IOBASE 0x2C -#define RALINK_PCIE0_RST BIT(24) -#define RALINK_PCIE1_RST BIT(25) -#define RALINK_PCIE2_RST BIT(26) +/* rt_sysc_membase relative registers */ +#define RALINK_PCIE_CLK_GEN 0x7c +#define RALINK_PCIE_CLK_GEN1 0x80 +/* Host-PCI bridge registers */ #define RALINK_PCI_PCICFG_ADDR 0x0000 #define RALINK_PCI_PCIMSK_ADDR 0x000C - -#define RT6855_PCIE0_OFFSET 0x2000 -#define RT6855_PCIE1_OFFSET 0x3000 -#define RT6855_PCIE2_OFFSET 0x4000 +#define RALINK_PCI_CONFIG_ADDR 0x0020 +#define RALINK_PCI_CONFIG_DATA 0x0024 +#define RALINK_PCI_MEMBASE 0x0028 +#define RALINK_PCI_IOBASE 0x002C + +/* PCICFG virtual bridges */ +#define MT7621_BR0_MASK GENMASK(19, 16) +#define MT7621_BR1_MASK GENMASK(23, 20) +#define MT7621_BR2_MASK GENMASK(27, 24) +#define MT7621_BR_ALL_MASK GENMASK(27, 16) +#define MT7621_BR0_SHIFT 16 +#define MT7621_BR1_SHIFT 20 +#define MT7621_BR2_SHIFT 24 + +/* PCIe RC control registers */ +#define MT7621_PCIE_OFFSET 0x2000 +#define MT7621_NEXT_PORT 0x1000 #define RALINK_PCI_BAR0SETUP_ADDR 0x0010 #define RALINK_PCI_IMBASEBAR0_ADDR 0x0018 @@ -88,54 +74,40 @@ #define RALINK_PCI_SUBID 0x0038 #define RALINK_PCI_STATUS 0x0050 -#define RALINK_PCIEPHY_P0P1_CTL_OFFSET 0x9000 -#define RALINK_PCIEPHY_P2_CTL_OFFSET 0xA000 - -#define RALINK_PCI_MM_MAP_BASE 0x60000000 -#define RALINK_PCI_IO_MAP_BASE 0x1e160000 - -#define ASSERT_SYSRST_PCIE(val) \ - do { \ - if (rt_sysc_r32(SYSC_REG_CHIP_REV) == 0x00030101) \ - rt_sysc_m32(0, val, RALINK_RSTCTRL); \ - else \ - rt_sysc_m32(val, 0, RALINK_RSTCTRL); \ - } while (0) -#define DEASSERT_SYSRST_PCIE(val) \ - do { \ - if (rt_sysc_r32(SYSC_REG_CHIP_REV) == 0x00030101) \ - rt_sysc_m32(val, 0, RALINK_RSTCTRL); \ - else \ - rt_sysc_m32(0, val, RALINK_RSTCTRL); \ - } while (0) - -#define RALINK_CLKCFG1 0x30 -#define RALINK_RSTCTRL 0x34 -#define RALINK_GPIOMODE 0x60 -#define RALINK_PCIE_CLK_GEN 0x7c -#define RALINK_PCIE_CLK_GEN1 0x80 -//RALINK_RSTCTRL bit -#define RALINK_PCIE_RST BIT(23) -#define RALINK_PCI_RST BIT(24) -//RALINK_CLKCFG1 bit -#define RALINK_PCI_CLK_EN BIT(19) -#define RALINK_PCIE_CLK_EN BIT(21) - -#define MEMORY_BASE 0x0 -static int pcie_link_status; +/* Some definition values */ +#define PCIE_REVISION_ID BIT(0) +#define PCIE_CLASS_CODE (0x60400 << 8) +#define PCIE_BAR_MAP_MAX GENMASK(30, 16) +#define PCIE_BAR_ENABLE BIT(0) +#define PCIE_PORT_INT_EN(x) BIT(20 + (x)) +#define PCIE_PORT_CLK_EN(x) BIT(24 + (x)) +#define PCIE_PORT_PERST(x) BIT(1 + (x)) +#define PCIE_PORT_LINKUP BIT(0) + +#define PCIE_CLK_GEN_EN BIT(31) +#define PCIE_CLK_GEN_DIS 0 +#define PCIE_CLK_GEN1_DIS GENMASK(30, 24) +#define PCIE_CLK_GEN1_EN (BIT(27) | BIT(25)) +#define MEMORY_BASE 0x0 /** * struct mt7621_pcie_port - PCIe port information - * @base: IO mapped register base + * @base: I/O mapped register base * @list: port list * @pcie: pointer to PCIe host info - * @reset: pointer to port reset control + * @phy: pointer to PHY control block + * @pcie_rst: pointer to port reset control + * @slot: port slot + * @enabled: indicates if port is enabled */ struct mt7621_pcie_port { void __iomem *base; struct list_head list; struct mt7621_pcie *pcie; - struct reset_control *reset; + struct phy *phy; + struct reset_control *pcie_rst; + u32 slot; + bool enabled; }; /** @@ -147,6 +119,7 @@ struct mt7621_pcie_port { * @offset: IO / Memory offset * @dev: Pointer to PCIe device * @ports: pointer to PCIe port information + * @rst: pointer to pcie reset */ struct mt7621_pcie { void __iomem *base; @@ -159,6 +132,7 @@ struct mt7621_pcie { resource_size_t io; } offset; struct list_head ports; + struct reset_control *rst; }; static inline u32 pcie_read(struct mt7621_pcie *pcie, u32 reg) @@ -171,6 +145,17 @@ static inline void pcie_write(struct mt7621_pcie *pcie, u32 val, u32 reg) writel(val, pcie->base + reg); } +static inline u32 pcie_port_read(struct mt7621_pcie_port *port, u32 reg) +{ + return readl(port->base + reg); +} + +static inline void pcie_port_write(struct mt7621_pcie_port *port, + u32 val, u32 reg) +{ + writel(val, port->base + reg); +} + static inline u32 mt7621_pci_get_cfgaddr(unsigned int bus, unsigned int slot, unsigned int func, unsigned int where) { @@ -196,8 +181,7 @@ struct pci_ops mt7621_pci_ops = { .write = pci_generic_config_write, }; -static u32 -read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg) +static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg) { u32 address = mt7621_pci_get_cfgaddr(0, dev, 0, reg); @@ -205,8 +189,8 @@ read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg) return pcie_read(pcie, RALINK_PCI_CONFIG_DATA); } -static void -write_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg, u32 val) +static void write_config(struct mt7621_pcie *pcie, unsigned int dev, + u32 reg, u32 val) { u32 address = mt7621_pci_get_cfgaddr(0, dev, 0, reg); @@ -214,125 +198,50 @@ write_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg, u32 val) pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA); } -static void -set_pcie_phy(struct mt7621_pcie *pcie, u32 offset, - int start_b, int bits, int val) +static inline void mt7621_control_assert(struct mt7621_pcie_port *port) { - u32 reg = pcie_read(pcie, offset); + u32 chip_rev_id = rt_sysc_r32(MT7621_CHIP_REV_ID); - reg &= ~(((1 << bits) - 1) << start_b); - reg |= val << start_b; - pcie_write(pcie, reg, offset); + if ((chip_rev_id & 0xFFFF) == CHIP_REV_MT7621_E2) + reset_control_assert(port->pcie_rst); + else + reset_control_deassert(port->pcie_rst); } -static void -bypass_pipe_rst(struct mt7621_pcie *pcie) +static inline void mt7621_control_deassert(struct mt7621_pcie_port *port) { - /* PCIe Port 0 */ - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x02c), 12, 1, 0x01); // rg_pe1_pipe_rst_b - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x02c), 4, 1, 0x01); // rg_pe1_pipe_cmd_frc[4] - /* PCIe Port 1 */ - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x12c), 12, 1, 0x01); // rg_pe1_pipe_rst_b - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x12c), 4, 1, 0x01); // rg_pe1_pipe_cmd_frc[4] - /* PCIe Port 2 */ - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x02c), 12, 1, 0x01); // rg_pe1_pipe_rst_b - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x02c), 4, 1, 0x01); // rg_pe1_pipe_cmd_frc[4] + u32 chip_rev_id = rt_sysc_r32(MT7621_CHIP_REV_ID); + + if ((chip_rev_id & 0xFFFF) == CHIP_REV_MT7621_E2) + reset_control_deassert(port->pcie_rst); + else + reset_control_assert(port->pcie_rst); } -static void -set_phy_for_ssc(struct mt7621_pcie *pcie) +static void mt7621_reset_port(struct mt7621_pcie_port *port) { - unsigned long reg = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0); - - reg = (reg >> 6) & 0x7; - /* Set PCIe Port0 & Port1 PHY to disable SSC */ - /* Debug Xtal Type */ - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x400), 8, 1, 0x01); // rg_pe1_frc_h_xtal_type - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x400), 9, 2, 0x00); // rg_pe1_h_xtal_type - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x000), 4, 1, 0x01); // rg_pe1_frc_phy_en //Force Port 0 enable control - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100), 4, 1, 0x01); // rg_pe1_frc_phy_en //Force Port 1 enable control - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x000), 5, 1, 0x00); // rg_pe1_phy_en //Port 0 disable - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100), 5, 1, 0x00); // rg_pe1_phy_en //Port 1 disable - if (reg <= 5 && reg >= 3) { // 40MHz Xtal - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 6, 2, 0x01); // RG_PE1_H_PLL_PREDIV //Pre-divider ratio (for host mode) - printk("***** Xtal 40MHz *****\n"); - } else { // 25MHz | 20MHz Xtal - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 6, 2, 0x00); // RG_PE1_H_PLL_PREDIV //Pre-divider ratio (for host mode) - if (reg >= 6) { - printk("***** Xtal 25MHz *****\n"); - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4bc), 4, 2, 0x01); // RG_PE1_H_PLL_FBKSEL //Feedback clock select - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x49c), 0, 31, 0x18000000); // RG_PE1_H_LCDDS_PCW_NCPO //DDS NCPO PCW (for host mode) - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4a4), 0, 16, 0x18d); // RG_PE1_H_LCDDS_SSC_PRD //DDS SSC dither period control - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4a8), 0, 12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA //DDS SSC dither amplitude control - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4a8), 16, 12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA1 //DDS SSC dither amplitude control for initial - } else { - printk("***** Xtal 20MHz *****\n"); - } - } - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4a0), 5, 1, 0x01); // RG_PE1_LCDDS_CLK_PH_INV //DDS clock inversion - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 22, 2, 0x02); // RG_PE1_H_PLL_BC - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 18, 4, 0x06); // RG_PE1_H_PLL_BP - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 12, 4, 0x02); // RG_PE1_H_PLL_IR - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 8, 4, 0x01); // RG_PE1_H_PLL_IC - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x4ac), 16, 3, 0x00); // RG_PE1_H_PLL_BR - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x490), 1, 3, 0x02); // RG_PE1_PLL_DIVEN - if (reg <= 5 && reg >= 3) { // 40MHz Xtal - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x414), 6, 2, 0x01); // rg_pe1_mstckdiv //value of da_pe1_mstckdiv when force mode enable - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x414), 5, 1, 0x01); // rg_pe1_frc_mstckdiv //force mode enable of da_pe1_mstckdiv - } - /* Enable PHY and disable force mode */ - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x000), 5, 1, 0x01); // rg_pe1_phy_en //Port 0 enable - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100), 5, 1, 0x01); // rg_pe1_phy_en //Port 1 enable - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x000), 4, 1, 0x00); // rg_pe1_frc_phy_en //Force Port 0 disable control - set_pcie_phy(pcie, (RALINK_PCIEPHY_P0P1_CTL_OFFSET + 0x100), 4, 1, 0x00); // rg_pe1_frc_phy_en //Force Port 1 disable control - - /* Set PCIe Port2 PHY to disable SSC */ - /* Debug Xtal Type */ - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x400), 8, 1, 0x01); // rg_pe1_frc_h_xtal_type - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x400), 9, 2, 0x00); // rg_pe1_h_xtal_type - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000), 4, 1, 0x01); // rg_pe1_frc_phy_en //Force Port 0 enable control - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000), 5, 1, 0x00); // rg_pe1_phy_en //Port 0 disable - if (reg <= 5 && reg >= 3) { // 40MHz Xtal - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 6, 2, 0x01); // RG_PE1_H_PLL_PREDIV //Pre-divider ratio (for host mode) - } else { // 25MHz | 20MHz Xtal - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 6, 2, 0x00); // RG_PE1_H_PLL_PREDIV //Pre-divider ratio (for host mode) - if (reg >= 6) { // 25MHz Xtal - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4bc), 4, 2, 0x01); // RG_PE1_H_PLL_FBKSEL //Feedback clock select - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x49c), 0, 31, 0x18000000); // RG_PE1_H_LCDDS_PCW_NCPO //DDS NCPO PCW (for host mode) - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4a4), 0, 16, 0x18d); // RG_PE1_H_LCDDS_SSC_PRD //DDS SSC dither period control - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4a8), 0, 12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA //DDS SSC dither amplitude control - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4a8), 16, 12, 0x4a); // RG_PE1_H_LCDDS_SSC_DELTA1 //DDS SSC dither amplitude control for initial - } - } - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4a0), 5, 1, 0x01); // RG_PE1_LCDDS_CLK_PH_INV //DDS clock inversion - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 22, 2, 0x02); // RG_PE1_H_PLL_BC - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 18, 4, 0x06); // RG_PE1_H_PLL_BP - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 12, 4, 0x02); // RG_PE1_H_PLL_IR - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 8, 4, 0x01); // RG_PE1_H_PLL_IC - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x4ac), 16, 3, 0x00); // RG_PE1_H_PLL_BR - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x490), 1, 3, 0x02); // RG_PE1_PLL_DIVEN - if (reg <= 5 && reg >= 3) { // 40MHz Xtal - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x414), 6, 2, 0x01); // rg_pe1_mstckdiv //value of da_pe1_mstckdiv when force mode enable - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x414), 5, 1, 0x01); // rg_pe1_frc_mstckdiv //force mode enable of da_pe1_mstckdiv - } - /* Enable PHY and disable force mode */ - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000), 5, 1, 0x01); // rg_pe1_phy_en //Port 0 enable - set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x000), 4, 1, 0x00); // rg_pe1_frc_phy_en //Force Port 0 disable control + mt7621_control_assert(port); + msleep(100); + mt7621_control_deassert(port); } -static void setup_cm_memory_region(struct resource *mem_resource) +static void setup_cm_memory_region(struct mt7621_pcie *pcie) { + struct resource *mem_resource = &pcie->mem; + struct device *dev = pcie->dev; resource_size_t mask; if (mips_cps_numiocu(0)) { - /* FIXME: hardware doesn't accept mask values with 1s after + /* + * FIXME: hardware doesn't accept mask values with 1s after * 0s (e.g. 0xffef), so it would be great to warn if that's - * about to happen */ + * about to happen + */ mask = ~(mem_resource->end - mem_resource->start); write_gcr_reg1_base(mem_resource->start); write_gcr_reg1_mask(mask | CM_GCR_REGn_MASK_CMTGT_IOCU0); - printk("PCI coherence region base: 0x%08llx, mask/settings: 0x%08llx\n", + dev_info(dev, "PCI coherence region base: 0x%08llx, mask/settings: 0x%08llx\n", (unsigned long long)read_gcr_reg1_base(), (unsigned long long)read_gcr_reg1_mask()); } @@ -382,10 +291,56 @@ static int mt7621_pci_parse_request_of_pci_ranges(struct mt7621_pcie *pcie) return 0; } +static int mt7621_pcie_parse_port(struct mt7621_pcie *pcie, + struct device_node *node, + int slot) +{ + struct mt7621_pcie_port *port; + struct device *dev = pcie->dev; + struct device_node *pnode = dev->of_node; + struct resource regs; + char name[10]; + int err; + + port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL); + if (!port) + return -ENOMEM; + + err = of_address_to_resource(pnode, slot + 1, ®s); + if (err) { + dev_err(dev, "missing \"reg\" property\n"); + return err; + } + + port->base = devm_ioremap_resource(dev, ®s); + if (IS_ERR(port->base)) + return PTR_ERR(port->base); + + snprintf(name, sizeof(name), "pcie%d", slot); + port->pcie_rst = devm_reset_control_get_exclusive(dev, name); + if (PTR_ERR(port->pcie_rst) == -EPROBE_DEFER) { + dev_err(dev, "failed to get pcie%d reset control\n", slot); + return PTR_ERR(port->pcie_rst); + } + + snprintf(name, sizeof(name), "pcie-phy%d", slot); + port->phy = devm_phy_get(dev, name); + if (IS_ERR(port->phy)) + return PTR_ERR(port->phy); + + port->slot = slot; + port->pcie = pcie; + + INIT_LIST_HEAD(&port->list); + list_add_tail(&port->list, &pcie->ports); + + return 0; +} + static int mt7621_pcie_parse_dt(struct mt7621_pcie *pcie) { struct device *dev = pcie->dev; - struct device_node *node = dev->of_node; + struct device_node *node = dev->of_node, *child; struct resource regs; int err; @@ -399,6 +354,241 @@ static int mt7621_pcie_parse_dt(struct mt7621_pcie *pcie) if (IS_ERR(pcie->base)) return PTR_ERR(pcie->base); + pcie->rst = devm_reset_control_get_exclusive(dev, "pcie"); + if (PTR_ERR(pcie->rst) == -EPROBE_DEFER) { + dev_err(dev, "failed to get pcie reset control\n"); + return PTR_ERR(pcie->rst); + } + + for_each_available_child_of_node(node, child) { + int slot; + + err = of_pci_get_devfn(child); + if (err < 0) { + dev_err(dev, "failed to parse devfn: %d\n", err); + return err; + } + + slot = PCI_SLOT(err); + + err = mt7621_pcie_parse_port(pcie, child, slot); + if (err) + return err; + } + + return 0; +} + +static int mt7621_pcie_init_port(struct mt7621_pcie_port *port) +{ + struct mt7621_pcie *pcie = port->pcie; + struct device *dev = pcie->dev; + u32 slot = port->slot; + u32 val = 0; + int err; + + /* + * Any MT7621 Ralink pcie controller that doesn't have 0x0101 at + * the end of the chip_id has inverted PCI resets. + */ + mt7621_reset_port(port); + + val = read_config(pcie, slot, PCIE_FTS_NUM); + dev_info(dev, "Port %d N_FTS = %x\n", (unsigned int)val, slot); + + err = phy_init(port->phy); + if (err) { + dev_err(dev, "failed to initialize port%d phy\n", slot); + goto err_phy_init; + } + + err = phy_power_on(port->phy); + if (err) { + dev_err(dev, "failed to power on port%d phy\n", slot); + goto err_phy_on; + } + + if ((pcie_port_read(port, RALINK_PCI_STATUS) & PCIE_PORT_LINKUP) == 0) { + dev_err(dev, "pcie%d no card, disable it (RST & CLK)\n", slot); + mt7621_control_assert(port); + port->enabled = false; + err = -ENODEV; + goto err_no_link_up; + } + + port->enabled = true; + + return 0; + +err_no_link_up: + phy_power_off(port->phy); +err_phy_on: + phy_exit(port->phy); +err_phy_init: + return err; +} + +static void mt7621_pcie_init_ports(struct mt7621_pcie *pcie) +{ + struct device *dev = pcie->dev; + struct mt7621_pcie_port *port, *tmp; + int err; + + list_for_each_entry_safe(port, tmp, &pcie->ports, list) { + u32 slot = port->slot; + + err = mt7621_pcie_init_port(port); + if (err) { + dev_err(dev, "Initiating port %d failed\n", slot); + list_del(&port->list); + } + } + + reset_control_assert(pcie->rst); + rt_sysc_m32(0x30, 2 << 4, SYSC_REG_SYSTEM_CONFIG1); + rt_sysc_m32(PCIE_CLK_GEN_EN, PCIE_CLK_GEN_DIS, RALINK_PCIE_CLK_GEN); + rt_sysc_m32(PCIE_CLK_GEN1_DIS, PCIE_CLK_GEN1_EN, RALINK_PCIE_CLK_GEN1); + rt_sysc_m32(PCIE_CLK_GEN_DIS, PCIE_CLK_GEN_EN, RALINK_PCIE_CLK_GEN); + msleep(50); + reset_control_deassert(pcie->rst); +} + +static int mt7621_pcie_enable_port(struct mt7621_pcie_port *port) +{ + struct mt7621_pcie *pcie = port->pcie; + u32 slot = port->slot; + u32 offset = MT7621_PCIE_OFFSET + (slot * MT7621_NEXT_PORT); + u32 val; + int err; + + /* assert port PERST_N */ + val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); + val |= PCIE_PORT_PERST(slot); + pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); + + /* de-assert port PERST_N */ + val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); + val &= ~PCIE_PORT_PERST(slot); + pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); + + /* 100ms timeout value should be enough for Gen1 training */ + err = readl_poll_timeout(port->base + RALINK_PCI_STATUS, + val, !!(val & PCIE_PORT_LINKUP), + 20, 100 * USEC_PER_MSEC); + if (err) + return -ETIMEDOUT; + + /* enable pcie interrupt */ + val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); + val |= PCIE_PORT_INT_EN(slot); + pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR); + + /* map 2G DDR region */ + pcie_write(pcie, PCIE_BAR_MAP_MAX | PCIE_BAR_ENABLE, + offset + RALINK_PCI_BAR0SETUP_ADDR); + pcie_write(pcie, MEMORY_BASE, + offset + RALINK_PCI_IMBASEBAR0_ADDR); + + /* configure class code and revision ID */ + pcie_write(pcie, PCIE_CLASS_CODE | PCIE_REVISION_ID, + offset + RALINK_PCI_CLASS); + + return 0; +} + +static void mt7621_pcie_enable_ports(struct mt7621_pcie *pcie) +{ + struct device *dev = pcie->dev; + struct mt7621_pcie_port *port; + u8 num_slots_enabled = 0; + u32 slot; + u32 val; + + list_for_each_entry(port, &pcie->ports, list) { + if (port->enabled) { + if (mt7621_pcie_enable_port(port)) { + dev_err(dev, "de-assert port %d PERST_N\n", + port->slot); + continue; + } + dev_info(dev, "PCIE%d enabled\n", slot); + num_slots_enabled++; + } + } + + for (slot = 0; slot < num_slots_enabled; slot++) { + val = read_config(pcie, slot, PCI_COMMAND); + val |= PCI_COMMAND_MASTER; + write_config(pcie, slot, PCI_COMMAND, val); + /* configure RC FTS number to 250 when it leaves L0s */ + val = read_config(pcie, slot, PCIE_FTS_NUM); + val &= ~PCIE_FTS_NUM_MASK; + val |= PCIE_FTS_NUM_L0(0x50); + write_config(pcie, slot, PCIE_FTS_NUM, val); + } +} + +static int mt7621_pcie_init_virtual_bridges(struct mt7621_pcie *pcie) +{ + u32 pcie_link_status = 0; + u32 val = 0; + struct mt7621_pcie_port *port; + + list_for_each_entry(port, &pcie->ports, list) { + u32 slot = port->slot; + + if (port->enabled) + pcie_link_status |= BIT(slot); + } + + if (pcie_link_status == 0) + return -1; + + /* + * pcie(2/1/0) link status pcie2_num pcie1_num pcie0_num + * 3'b000 x x x + * 3'b001 x x 0 + * 3'b010 x 0 x + * 3'b011 x 1 0 + * 3'b100 0 x x + * 3'b101 1 x 0 + * 3'b110 1 0 x + * 3'b111 2 1 0 + */ + switch (pcie_link_status) { + case 2: + val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); + val &= ~(MT7621_BR0_MASK | MT7621_BR1_MASK); + val |= 0x1 << MT7621_BR0_SHIFT; + val |= 0x0 << MT7621_BR1_SHIFT; + pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); + break; + case 4: + val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); + val &= ~MT7621_BR_ALL_MASK; + val |= 0x1 << MT7621_BR0_SHIFT; + val |= 0x2 << MT7621_BR1_SHIFT; + val |= 0x0 << MT7621_BR2_SHIFT; + pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); + break; + case 5: + val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); + val &= ~MT7621_BR_ALL_MASK; + val |= 0x0 << MT7621_BR0_SHIFT; + val |= 0x2 << MT7621_BR1_SHIFT; + val |= 0x1 << MT7621_BR2_SHIFT; + pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); + break; + case 6: + val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); + val &= ~MT7621_BR_ALL_MASK; + val |= 0x2 << MT7621_BR0_SHIFT; + val |= 0x0 << MT7621_BR1_SHIFT; + val |= 0x1 << MT7621_BR2_SHIFT; + pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); + break; + } + return 0; } @@ -441,7 +631,6 @@ static int mt7621_pci_probe(struct platform_device *pdev) struct mt7621_pcie *pcie; struct pci_host_bridge *bridge; int err; - u32 val = 0; LIST_HEAD(res); if (!dev->of_node) @@ -449,7 +638,7 @@ static int mt7621_pci_probe(struct platform_device *pdev) bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); if (!bridge) - return -ENODEV; + return -ENOMEM; pcie = pci_host_bridge_priv(bridge); pcie->dev = dev; @@ -468,204 +657,15 @@ static int mt7621_pci_probe(struct platform_device *pdev) ioport_resource.start = 0; ioport_resource.end = ~0UL; /* no limit */ - val = RALINK_PCIE0_RST; - val |= RALINK_PCIE1_RST; - val |= RALINK_PCIE2_RST; - - ASSERT_SYSRST_PCIE(RALINK_PCIE0_RST | RALINK_PCIE1_RST | RALINK_PCIE2_RST); - - *(unsigned int *)(0xbe000060) &= ~(0x3 << 10 | 0x3 << 3); - *(unsigned int *)(0xbe000060) |= BIT(10) | BIT(3); - mdelay(100); - *(unsigned int *)(0xbe000600) |= BIT(19) | BIT(8) | BIT(7); // use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3) - mdelay(100); - *(unsigned int *)(0xbe000620) &= ~(BIT(19) | BIT(8) | BIT(7)); // clear DATA - - mdelay(100); + mt7621_pcie_init_ports(pcie); - val = RALINK_PCIE0_RST; - val |= RALINK_PCIE1_RST; - val |= RALINK_PCIE2_RST; - - DEASSERT_SYSRST_PCIE(val); - - if ((*(unsigned int *)(0xbe00000c) & 0xFFFF) == 0x0101) // MT7621 E2 - bypass_pipe_rst(pcie); - set_phy_for_ssc(pcie); - - list_for_each_entry_safe(port, tmp, &pcie->ports, list) { - u32 slot = port->slot; - val = read_config(pcie, slot, 0x70c); - dev_info(dev, "Port %d N_FTS = %x\n", (unsigned int)val, slot); - } - - rt_sysc_m32(0, RALINK_PCIE_RST, RALINK_RSTCTRL); - rt_sysc_m32(0x30, 2 << 4, SYSC_REG_SYSTEM_CONFIG1); - - rt_sysc_m32(0x80000000, 0, RALINK_PCIE_CLK_GEN); - rt_sysc_m32(0x7f000000, 0xa << 24, RALINK_PCIE_CLK_GEN1); - rt_sysc_m32(0, 0x80000000, RALINK_PCIE_CLK_GEN); - - mdelay(50); - rt_sysc_m32(RALINK_PCIE_RST, 0, RALINK_RSTCTRL); - - /* Use GPIO control instead of PERST_N */ - *(unsigned int *)(0xbe000620) |= BIT(19) | BIT(8) | BIT(7); // set DATA - mdelay(1000); - - if ((pcie_read(pcie, RT6855_PCIE0_OFFSET + RALINK_PCI_STATUS) & 0x1) == 0) { - printk("PCIE0 no card, disable it(RST&CLK)\n"); - ASSERT_SYSRST_PCIE(RALINK_PCIE0_RST); - rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1); - pcie_link_status &= ~(BIT(0)); - } else { - pcie_link_status |= BIT(0); - val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); - val |= BIT(20); // enable pcie1 interrupt - pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR); - } - - if ((pcie_read(pcie, RT6855_PCIE1_OFFSET + RALINK_PCI_STATUS) & 0x1) == 0) { - printk("PCIE1 no card, disable it(RST&CLK)\n"); - ASSERT_SYSRST_PCIE(RALINK_PCIE1_RST); - rt_sysc_m32(RALINK_PCIE1_CLK_EN, 0, RALINK_CLKCFG1); - pcie_link_status &= ~(BIT(1)); - } else { - pcie_link_status |= BIT(1); - val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); - val |= BIT(21); // enable pcie1 interrupt - pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR); - } - - if ((pcie_read(pcie, RT6855_PCIE2_OFFSET + RALINK_PCI_STATUS) & 0x1) == 0) { - printk("PCIE2 no card, disable it(RST&CLK)\n"); - ASSERT_SYSRST_PCIE(RALINK_PCIE2_RST); - rt_sysc_m32(RALINK_PCIE2_CLK_EN, 0, RALINK_CLKCFG1); - pcie_link_status &= ~(BIT(2)); - } else { - pcie_link_status |= BIT(2); - val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); - val |= BIT(22); // enable pcie2 interrupt - pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR); - } - - if (pcie_link_status == 0) + err = mt7621_pcie_init_virtual_bridges(pcie); + if (err) { + dev_err(dev, "Nothing is connected in virtual bridges. Exiting..."); return 0; - -/* -pcie(2/1/0) link status pcie2_num pcie1_num pcie0_num -3'b000 x x x -3'b001 x x 0 -3'b010 x 0 x -3'b011 x 1 0 -3'b100 0 x x -3'b101 1 x 0 -3'b110 1 0 x -3'b111 2 1 0 -*/ - switch (pcie_link_status) { - case 2: - val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); - val &= ~0x00ff0000; - val |= 0x1 << 16; // port 0 - val |= 0x0 << 20; // port 1 - pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); - break; - case 4: - val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); - val &= ~0x0fff0000; - val |= 0x1 << 16; //port0 - val |= 0x2 << 20; //port1 - val |= 0x0 << 24; //port2 - pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); - break; - case 5: - val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); - val &= ~0x0fff0000; - val |= 0x0 << 16; //port0 - val |= 0x2 << 20; //port1 - val |= 0x1 << 24; //port2 - pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); - break; - case 6: - val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); - val &= ~0x0fff0000; - val |= 0x2 << 16; //port0 - val |= 0x0 << 20; //port1 - val |= 0x1 << 24; //port2 - pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); - break; } -/* - ioport_resource.start = mt7621_res_pci_io1.start; - ioport_resource.end = mt7621_res_pci_io1.end; -*/ - - pcie_write(pcie, 0xffffffff, RALINK_PCI_MEMBASE); - pcie_write(pcie, RALINK_PCI_IO_MAP_BASE, RALINK_PCI_IOBASE); - - //PCIe0 - if ((pcie_link_status & 0x1) != 0) { - /* open 7FFF:2G; ENABLE */ - pcie_write(pcie, 0x7FFF0001, - RT6855_PCIE0_OFFSET + RALINK_PCI_BAR0SETUP_ADDR); - pcie_write(pcie, MEMORY_BASE, - RT6855_PCIE0_OFFSET + RALINK_PCI_IMBASEBAR0_ADDR); - pcie_write(pcie, 0x06040001, - RT6855_PCIE0_OFFSET + RALINK_PCI_CLASS); - printk("PCIE0 enabled\n"); - } - - //PCIe1 - if ((pcie_link_status & 0x2) != 0) { - /* open 7FFF:2G; ENABLE */ - pcie_write(pcie, 0x7FFF0001, - RT6855_PCIE1_OFFSET + RALINK_PCI_BAR0SETUP_ADDR); - pcie_write(pcie, MEMORY_BASE, - RT6855_PCIE1_OFFSET + RALINK_PCI_IMBASEBAR0_ADDR); - pcie_write(pcie, 0x06040001, - RT6855_PCIE1_OFFSET + RALINK_PCI_CLASS); - printk("PCIE1 enabled\n"); - } - - //PCIe2 - if ((pcie_link_status & 0x4) != 0) { - /* open 7FFF:2G; ENABLE */ - pcie_write(pcie, 0x7FFF0001, - RT6855_PCIE2_OFFSET + RALINK_PCI_BAR0SETUP_ADDR); - pcie_write(pcie, MEMORY_BASE, - RT6855_PCIE2_OFFSET + RALINK_PCI_IMBASEBAR0_ADDR); - pcie_write(pcie, 0x06040001, - RT6855_PCIE2_OFFSET + RALINK_PCI_CLASS); - printk("PCIE2 enabled\n"); - } - - switch (pcie_link_status) { - case 7: - val = read_config(pcie, 2, 0x4); - write_config(pcie, 2, 0x4, val | 0x4); - val = read_config(pcie, 2, 0x70c); - val &= ~(0xff) << 8; - val |= 0x50 << 8; - write_config(pcie, 2, 0x70c, val); - case 3: - case 5: - case 6: - val = read_config(pcie, 1, 0x4); - write_config(pcie, 1, 0x4, val | 0x4); - val = read_config(pcie, 1, 0x70c); - val &= ~(0xff) << 8; - val |= 0x50 << 8; - write_config(pcie, 1, 0x70c, val); - default: - val = read_config(pcie, 0, 0x4); - write_config(pcie, 0, 0x4, val | 0x4); //bus master enable - val = read_config(pcie, 0, 0x70c); - val &= ~(0xff) << 8; - val |= 0x50 << 8; - write_config(pcie, 0, 0x70c, val); - } + mt7621_pcie_enable_ports(pcie); err = mt7621_pci_parse_request_of_pci_ranges(pcie); if (err) { @@ -673,7 +673,7 @@ pcie(2/1/0) link status pcie2_num pcie1_num pcie0_num return err; } - setup_cm_memory_region(&pcie->mem); + setup_cm_memory_region(pcie); err = mt7621_pcie_request_resources(pcie, &res); if (err) { diff --git a/drivers/staging/mt7621-pinctrl/Kconfig b/drivers/staging/mt7621-pinctrl/Kconfig index 37cf9c3273be..fc3612711307 100644 --- a/drivers/staging/mt7621-pinctrl/Kconfig +++ b/drivers/staging/mt7621-pinctrl/Kconfig @@ -2,3 +2,4 @@ config PINCTRL_RT2880 bool "RT2800 pinctrl driver for RALINK/Mediatek SOCs" depends on RALINK select PINMUX + select GENERIC_PINCONF diff --git a/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c b/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c index aa98fbb17013..9b52d44abef1 100644 --- a/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c +++ b/drivers/staging/mt7621-pinctrl/pinctrl-rt2880.c @@ -11,6 +11,7 @@ #include <linux/of.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinconf.h> +#include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinmux.h> #include <linux/pinctrl/consumer.h> #include <linux/pinctrl/machine.h> @@ -73,48 +74,12 @@ static int rt2880_get_group_pins(struct pinctrl_dev *pctrldev, return 0; } -static int rt2880_pinctrl_dt_node_to_map(struct pinctrl_dev *pctrldev, - struct device_node *np_config, - struct pinctrl_map **map, - unsigned int *num_maps) -{ - struct rt2880_priv *p = pinctrl_dev_get_drvdata(pctrldev); - struct property *prop; - const char *function_name, *group_name; - int ret; - int ngroups = 0; - unsigned int reserved_maps = 0; - - for_each_node_with_property(np_config, "group") - ngroups++; - - *map = NULL; - ret = pinctrl_utils_reserve_map(pctrldev, map, &reserved_maps, - num_maps, ngroups); - if (ret) { - dev_err(p->dev, "can't reserve map: %d\n", ret); - return ret; - } - - of_property_for_each_string(np_config, "group", prop, group_name) { - ret = pinctrl_utils_add_map_mux(pctrldev, map, &reserved_maps, - num_maps, group_name, - function_name); - if (ret) { - dev_err(p->dev, "can't add map: %d\n", ret); - return ret; - } - } - - return 0; -} - static const struct pinctrl_ops rt2880_pctrl_ops = { .get_groups_count = rt2880_get_group_count, .get_group_name = rt2880_get_group_name, .get_group_pins = rt2880_get_group_pins, - .dt_node_to_map = rt2880_pinctrl_dt_node_to_map, - .dt_free_map = pinctrl_utils_free_map, + .dt_node_to_map = pinconf_generic_dt_node_to_map_all, + .dt_free_map = pinconf_generic_dt_free_map, }; static int rt2880_pmx_func_count(struct pinctrl_dev *pctrldev) @@ -385,7 +350,6 @@ static int rt2880_pinmux_probe(struct platform_device *pdev) for_each_compatible_node(np, NULL, "ralink,rt2880-gpio") { const __be32 *ngpio, *gpiobase; struct pinctrl_gpio_range *range; - char *name; if (!of_device_is_available(np)) continue; @@ -397,9 +361,10 @@ static int rt2880_pinmux_probe(struct platform_device *pdev) return -EINVAL; } - range = devm_kzalloc(p->dev, sizeof(*range) + 4, GFP_KERNEL); - range->name = name = (char *) &range[1]; - sprintf(name, "pio"); + range = devm_kzalloc(p->dev, sizeof(*range), GFP_KERNEL); + if (!range) + return -ENOMEM; + range->name = "pio"; range->npins = __be32_to_cpu(*ngpio); range->base = __be32_to_cpu(*gpiobase); range->pin_base = range->base; diff --git a/drivers/staging/mt7621-spi/spi-mt7621.c b/drivers/staging/mt7621-spi/spi-mt7621.c index d045b5568e0f..b509f9fe3346 100644 --- a/drivers/staging/mt7621-spi/spi-mt7621.c +++ b/drivers/staging/mt7621-spi/spi-mt7621.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * spi-mt7621.c -- MediaTek MT7621 SPI controller driver * @@ -8,34 +9,23 @@ * Some parts are based on spi-orion.c: * Author: Shadi Ammouri <shadi@marvell.com> * Copyright (C) 2007-2008 Marvell Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ -#include <linux/init.h> -#include <linux/module.h> #include <linux/clk.h> -#include <linux/err.h> #include <linux/delay.h> #include <linux/io.h> +#include <linux/module.h> +#include <linux/of_device.h> #include <linux/reset.h> #include <linux/spi/spi.h> -#include <linux/of_device.h> -#include <linux/platform_device.h> -#include <linux/swab.h> - -#include <ralink_regs.h> -#define SPI_BPW_MASK(bits) BIT((bits) - 1) +#define DRIVER_NAME "spi-mt7621" -#define DRIVER_NAME "spi-mt7621" /* in usec */ -#define RALINK_SPI_WAIT_MAX_LOOP 2000 +#define RALINK_SPI_WAIT_MAX_LOOP 2000 /* SPISTAT register bit field */ -#define SPISTAT_BUSY BIT(0) +#define SPISTAT_BUSY BIT(0) #define MT7621_SPI_TRANS 0x00 #define SPITRANS_BUSY BIT(16) @@ -46,20 +36,21 @@ #define SPI_CTL_TX_RX_CNT_MASK 0xff #define SPI_CTL_START BIT(8) -#define MT7621_SPI_POLAR 0x38 #define MT7621_SPI_MASTER 0x28 +#define MASTER_MORE_BUFMODE BIT(2) +#define MASTER_FULL_DUPLEX BIT(10) +#define MASTER_RS_CLK_SEL GENMASK(27, 16) +#define MASTER_RS_CLK_SEL_SHIFT 16 +#define MASTER_RS_SLAVE_SEL GENMASK(31, 29) + #define MT7621_SPI_MOREBUF 0x2c +#define MT7621_SPI_POLAR 0x38 #define MT7621_SPI_SPACE 0x3c #define MT7621_CPHA BIT(5) #define MT7621_CPOL BIT(4) #define MT7621_LSB_FIRST BIT(3) -#define RT2880_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | \ - SPI_LSB_FIRST | SPI_CS_HIGH) - -struct mt7621_spi; - struct mt7621_spi { struct spi_master *master; void __iomem *base; @@ -86,16 +77,17 @@ static inline void mt7621_spi_write(struct mt7621_spi *rs, u32 reg, u32 val) iowrite32(val, rs->base + reg); } -static void mt7621_spi_reset(struct mt7621_spi *rs, int duplex) +static void mt7621_spi_reset(struct mt7621_spi *rs) { u32 master = mt7621_spi_read(rs, MT7621_SPI_MASTER); - master |= 7 << 29; - master |= 1 << 2; - if (duplex) - master |= 1 << 10; - else - master &= ~(1 << 10); + /* + * Select SPI device 7, enable "more buffer mode" and disable + * full-duplex (only half-duplex really works on this chip + * reliably) + */ + master |= MASTER_RS_SLAVE_SEL | MASTER_MORE_BUFMODE; + master &= ~MASTER_FULL_DUPLEX; mt7621_spi_write(rs, MT7621_SPI_MASTER, master); rs->pending_write = 0; @@ -107,7 +99,7 @@ static void mt7621_spi_set_cs(struct spi_device *spi, int enable) int cs = spi->chip_select; u32 polar = 0; - mt7621_spi_reset(rs, cs); + mt7621_spi_reset(rs); if (enable) polar = BIT(cs); mt7621_spi_write(rs, MT7621_SPI_POLAR, polar); @@ -131,28 +123,21 @@ static int mt7621_spi_prepare(struct spi_device *spi, unsigned int speed) rate = 2; reg = mt7621_spi_read(rs, MT7621_SPI_MASTER); - reg &= ~(0xfff << 16); - reg |= (rate - 2) << 16; + reg &= ~MASTER_RS_CLK_SEL; + reg |= (rate - 2) << MASTER_RS_CLK_SEL_SHIFT; rs->speed = speed; reg &= ~MT7621_LSB_FIRST; if (spi->mode & SPI_LSB_FIRST) reg |= MT7621_LSB_FIRST; + /* + * This SPI controller seems to be tested on SPI flash only and some + * bits are swizzled under other SPI modes probably due to incorrect + * wiring inside the silicon. Only mode 0 works correctly. + */ reg &= ~(MT7621_CPHA | MT7621_CPOL); - switch (spi->mode & (SPI_CPOL | SPI_CPHA)) { - case SPI_MODE_0: - break; - case SPI_MODE_1: - reg |= MT7621_CPHA; - break; - case SPI_MODE_2: - reg |= MT7621_CPOL; - break; - case SPI_MODE_3: - reg |= MT7621_CPOL | MT7621_CPHA; - break; - } + mt7621_spi_write(rs, MT7621_SPI_MASTER, reg); return 0; @@ -178,9 +163,10 @@ static inline int mt7621_spi_wait_till_ready(struct mt7621_spi *rs) static void mt7621_spi_read_half_duplex(struct mt7621_spi *rs, int rx_len, u8 *buf) { - /* Combine with any pending write, and perform one or - * more half-duplex transactions reading 'len' bytes. - * Data to be written is already in MT7621_SPI_DATA* + /* + * Combine with any pending write, and perform one or more half-duplex + * transactions reading 'len' bytes. Data to be written is already in + * MT7621_SPI_DATA. */ int tx_len = rs->pending_write; @@ -210,6 +196,7 @@ static void mt7621_spi_read_half_duplex(struct mt7621_spi *rs, *buf++ = val & 0xff; val >>= 8; } + rx_len -= i; } } @@ -261,7 +248,7 @@ static void mt7621_spi_write_half_duplex(struct mt7621_spi *rs, rs->pending_write = len; } -static int mt7621_spi_transfer_half_duplex(struct spi_master *master, +static int mt7621_spi_transfer_one_message(struct spi_master *master, struct spi_message *m) { struct mt7621_spi *rs = spi_master_get_devdata(master); @@ -284,99 +271,25 @@ static int mt7621_spi_transfer_half_duplex(struct spi_master *master, mt7621_spi_set_cs(spi, 1); m->actual_length = 0; list_for_each_entry(t, &m->transfers, transfer_list) { - if (t->rx_buf) + if ((t->rx_buf) && (t->tx_buf)) { + /* This controller will shift some extra data out + * of spi_opcode if (mosi_bit_cnt > 0) && + * (cmd_bit_cnt == 0). So the claimed full-duplex + * support is broken since we have no way to read + * the MISO value during that bit. + */ + status = -EIO; + goto msg_done; + } else if (t->rx_buf) { mt7621_spi_read_half_duplex(rs, t->len, t->rx_buf); - else if (t->tx_buf) + } else if (t->tx_buf) { mt7621_spi_write_half_duplex(rs, t->len, t->tx_buf); + } m->actual_length += t->len; } mt7621_spi_flush(rs); mt7621_spi_set_cs(spi, 0); -msg_done: - m->status = status; - spi_finalize_current_message(master); - - return 0; -} - -static int mt7621_spi_transfer_full_duplex(struct spi_master *master, - struct spi_message *m) -{ - struct mt7621_spi *rs = spi_master_get_devdata(master); - struct spi_device *spi = m->spi; - unsigned int speed = spi->max_speed_hz; - struct spi_transfer *t = NULL; - int status = 0; - int i, len = 0; - int rx_len = 0; - u32 data[9] = { 0 }; - u32 val = 0; - - mt7621_spi_wait_till_ready(rs); - - list_for_each_entry(t, &m->transfers, transfer_list) { - const u8 *buf = t->tx_buf; - - if (t->rx_buf) - rx_len += t->len; - - if (!buf) - continue; - - if (WARN_ON(len + t->len > 16)) { - status = -EIO; - goto msg_done; - } - - for (i = 0; i < t->len; i++, len++) - data[len / 4] |= buf[i] << (8 * (len & 3)); - if (speed > t->speed_hz) - speed = t->speed_hz; - } - - if (WARN_ON(rx_len > 16)) { - status = -EIO; - goto msg_done; - } - - if (mt7621_spi_prepare(spi, speed)) { - status = -EIO; - goto msg_done; - } - - for (i = 0; i < len; i += 4) - mt7621_spi_write(rs, MT7621_SPI_DATA0 + i, data[i / 4]); - - val |= len * 8; - val |= (rx_len * 8) << 12; - mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val); - - mt7621_spi_set_cs(spi, 1); - - val = mt7621_spi_read(rs, MT7621_SPI_TRANS); - val |= SPI_CTL_START; - mt7621_spi_write(rs, MT7621_SPI_TRANS, val); - - mt7621_spi_wait_till_ready(rs); - - mt7621_spi_set_cs(spi, 0); - - for (i = 0; i < rx_len; i += 4) - data[i / 4] = mt7621_spi_read(rs, MT7621_SPI_DATA4 + i); - - m->actual_length = rx_len; - - len = 0; - list_for_each_entry(t, &m->transfers, transfer_list) { - u8 *buf = t->rx_buf; - - if (!buf) - continue; - - for (i = 0; i < t->len; i++, len++) - buf[i] = data[len / 4] >> (8 * (len & 3)); - } msg_done: m->status = status; @@ -385,17 +298,6 @@ msg_done: return 0; } -static int mt7621_spi_transfer_one_message(struct spi_master *master, - struct spi_message *m) -{ - struct spi_device *spi = m->spi; - int cs = spi->chip_select; - - if (cs) - return mt7621_spi_transfer_full_duplex(master, m); - return mt7621_spi_transfer_half_duplex(master, m); -} - static int mt7621_spi_setup(struct spi_device *spi) { struct mt7621_spi *rs = spidev_to_mt7621_spi(spi); @@ -429,6 +331,7 @@ static int mt7621_spi_probe(struct platform_device *pdev) int status = 0; struct clk *clk; struct mt7621_spi_ops *ops; + int ret; match = of_match_device(mt7621_spi_match, &pdev->dev); if (!match) @@ -452,12 +355,12 @@ static int mt7621_spi_probe(struct platform_device *pdev) return status; master = spi_alloc_master(&pdev->dev, sizeof(*rs)); - if (master == NULL) { + if (!master) { dev_info(&pdev->dev, "master allocation failed\n"); return -ENOMEM; } - master->mode_bits = RT2880_SPI_MODE_BITS; + master->mode_bits = SPI_LSB_FIRST; master->setup = mt7621_spi_setup; master->transfer_one_message = mt7621_spi_transfer_one_message; @@ -476,9 +379,13 @@ static int mt7621_spi_probe(struct platform_device *pdev) rs->pending_write = 0; dev_info(&pdev->dev, "sys_freq: %u\n", rs->sys_freq); - device_reset(&pdev->dev); + ret = device_reset(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, "SPI reset failed!\n"); + return ret; + } - mt7621_spi_reset(rs, 0); + mt7621_spi_reset(rs); return spi_register_master(master); } diff --git a/drivers/staging/netlogic/Kconfig b/drivers/staging/netlogic/Kconfig index d660de51b541..c25a00dd2d5f 100644 --- a/drivers/staging/netlogic/Kconfig +++ b/drivers/staging/netlogic/Kconfig @@ -2,6 +2,6 @@ config NETLOGIC_XLR_NET tristate "Netlogic XLR/XLS network device" depends on CPU_XLR select PHYLIB - ---help--- + help This driver support Netlogic XLR/XLS on chip gigabit Ethernet. diff --git a/drivers/staging/netlogic/platform_net.c b/drivers/staging/netlogic/platform_net.c index abf4c71ee66b..8be9d0b0c22c 100644 --- a/drivers/staging/netlogic/platform_net.c +++ b/drivers/staging/netlogic/platform_net.c @@ -1,36 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) /* * Copyright (c) 2003-2012 Broadcom Corporation * All Rights Reserved - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * 1. Redistributions of source code must retain the above copyright - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the Broadcom - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include <linux/device.h> @@ -107,8 +78,9 @@ static struct platform_device *gmac_controller2_init(void *gmac0_addr) .dev.platform_data = &ndata1, }; - gmac4_addr = ioremap(CPHYSADDR( - nlm_mmio_base(NETLOGIC_IO_GMAC_4_OFFSET)), 0xfff); + gmac4_addr = + ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_4_OFFSET)), + 0xfff); ndata1.serdes_addr = gmac4_addr; ndata1.pcs_addr = gmac4_addr; ndata1.mii_addr = gmac0_addr; @@ -134,8 +106,9 @@ static void xls_gmac_init(void) { int mac; struct platform_device *xlr_net_dev1; - void __iomem *gmac0_addr = ioremap(CPHYSADDR( - nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), 0xfff); + void __iomem *gmac0_addr = + ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), + 0xfff); static struct xlr_net_data ndata0 = { .rfr_station = FMN_STNID_GMACRFR_0, @@ -153,8 +126,9 @@ static void xls_gmac_init(void) ndata0.mii_addr = gmac0_addr; /* Passing GPIO base for serdes init. Only needed on sgmii ports */ - gpio_addr = ioremap(CPHYSADDR( - nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET)), 0xfff); + gpio_addr = + ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET)), + 0xfff); ndata0.gpio_addr = gpio_addr; ndata0.cpu_mask = nlm_current_node()->coremask; @@ -214,8 +188,9 @@ static void xlr_gmac_init(void) .id = 0, .dev.platform_data = &ndata0, }; - ndata0.mii_addr = ioremap(CPHYSADDR( - nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), 0xfff); + ndata0.mii_addr = + ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), + 0xfff); ndata0.cpu_mask = nlm_current_node()->coremask; diff --git a/drivers/staging/netlogic/platform_net.h b/drivers/staging/netlogic/platform_net.h index e1b27f649590..f152d84099a2 100644 --- a/drivers/staging/netlogic/platform_net.h +++ b/drivers/staging/netlogic/platform_net.h @@ -1,35 +1,7 @@ -/* +/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + * * Copyright (c) 2003-2012 Broadcom Corporation * All Rights Reserved - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the Broadcom - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #define PORTS_PER_CONTROLLER 4 diff --git a/drivers/staging/netlogic/xlr_net.c b/drivers/staging/netlogic/xlr_net.c index 4e6611e4c59b..8554fcf4321b 100644 --- a/drivers/staging/netlogic/xlr_net.c +++ b/drivers/staging/netlogic/xlr_net.c @@ -1,36 +1,9 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) /* * Copyright (c) 2003-2012 Broadcom Corporation * All Rights Reserved - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the Broadcom - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ + #include <linux/phy.h> #include <linux/delay.h> #include <linux/netdevice.h> diff --git a/drivers/staging/netlogic/xlr_net.h b/drivers/staging/netlogic/xlr_net.h index f76e16cfd15d..518ea809b8fa 100644 --- a/drivers/staging/netlogic/xlr_net.h +++ b/drivers/staging/netlogic/xlr_net.h @@ -1,36 +1,9 @@ -/* +/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + * * Copyright (c) 2003-2012 Broadcom Corporation * All Rights Reserved - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the Broadcom - * license below: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ + /* #define MAC_SPLIT_MODE */ #define MAC_SPACING 0x400 diff --git a/drivers/staging/octeon-usb/octeon-hcd.c b/drivers/staging/octeon-usb/octeon-hcd.c index 9c766f5b812f..14982b6472a0 100644 --- a/drivers/staging/octeon-usb/octeon-hcd.c +++ b/drivers/staging/octeon-usb/octeon-hcd.c @@ -50,6 +50,7 @@ #include <linux/module.h> #include <linux/usb/hcd.h> #include <linux/prefetch.h> +#include <linux/dma-mapping.h> #include <linux/platform_device.h> #include <asm/octeon/octeon.h> @@ -3606,8 +3607,9 @@ static int octeon_usb_probe(struct platform_device *pdev) * Set the DMA mask to 64bits so we get buffers already translated for * DMA. */ - dev->coherent_dma_mask = ~0; - dev->dma_mask = &dev->coherent_dma_mask; + i = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64)); + if (i) + return i; /* * Only cn52XX and cn56XX have DWC_OTG USB hardware and the diff --git a/drivers/staging/octeon-usb/octeon-hcd.h b/drivers/staging/octeon-usb/octeon-hcd.h index 769c36cf6614..ae7ae50071ae 100644 --- a/drivers/staging/octeon-usb/octeon-hcd.h +++ b/drivers/staging/octeon-usb/octeon-hcd.h @@ -1797,7 +1797,7 @@ union cvmx_usbnx_usbp_ctl_status { * This is a test signal. When the USB Core is * powered up (not in Susned Mode), an automatic * tester can use this to disable phy_clock and - * free_clk, then re-eanable them with an aligned + * free_clk, then re-enable them with an aligned * phase. * '1': The phy_clk and free_clk outputs are * disabled. "0": The phy_clock and free_clk outputs diff --git a/drivers/staging/octeon/ethernet-mdio.c b/drivers/staging/octeon/ethernet-mdio.c index f67f95043887..2aee64fdaec5 100644 --- a/drivers/staging/octeon/ethernet-mdio.c +++ b/drivers/staging/octeon/ethernet-mdio.c @@ -21,7 +21,6 @@ #include "ethernet-util.h" #include <asm/octeon/cvmx-gmxx-defs.h> -#include <asm/octeon/cvmx-smix-defs.h> static void cvm_oct_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) @@ -164,14 +163,14 @@ int cvm_oct_phy_setup_device(struct net_device *dev) goto no_phy; phydev = of_phy_connect(dev, phy_node, cvm_oct_adjust_link, 0, - PHY_INTERFACE_MODE_GMII); + priv->phy_mode); of_node_put(phy_node); if (!phydev) return -ENODEV; priv->last_link = 0; - phy_start_aneg(phydev); + phy_start(phydev); return 0; no_phy: diff --git a/drivers/staging/octeon/ethernet-tx.c b/drivers/staging/octeon/ethernet-tx.c index df3441b815bb..317c9720467c 100644 --- a/drivers/staging/octeon/ethernet-tx.c +++ b/drivers/staging/octeon/ethernet-tx.c @@ -359,8 +359,7 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) dst_release(skb_dst(skb)); skb_dst_set(skb, NULL); #ifdef CONFIG_XFRM - secpath_put(skb->sp); - skb->sp = NULL; + secpath_reset(skb); #endif nf_reset(skb); diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c index 9b15c9ed844b..986db76705cc 100644 --- a/drivers/staging/octeon/ethernet.c +++ b/drivers/staging/octeon/ethernet.c @@ -36,7 +36,6 @@ #include <asm/octeon/cvmx-helper.h> #include <asm/octeon/cvmx-asxx-defs.h> #include <asm/octeon/cvmx-gmxx-defs.h> -#include <asm/octeon/cvmx-smix-defs.h> #define OCTEON_MAX_MTU 65392 @@ -141,8 +140,8 @@ static void cvm_oct_periodic_worker(struct work_struct *work) if (priv->poll) priv->poll(cvm_oct_device[priv->port]); - cvm_oct_device[priv->port]->netdev_ops->ndo_get_stats( - cvm_oct_device[priv->port]); + cvm_oct_device[priv->port]->netdev_ops->ndo_get_stats + (cvm_oct_device[priv->port]); if (!atomic_read(&cvm_oct_poll_queue_stopping)) schedule_delayed_work(&priv->port_periodic_work, HZ); @@ -621,8 +620,8 @@ static const struct net_device_ops cvm_oct_pow_netdev_ops = { #endif }; -static struct device_node *cvm_oct_of_get_child( - const struct device_node *parent, int reg_val) +static struct device_node *cvm_oct_of_get_child + (const struct device_node *parent, int reg_val) { struct device_node *node = NULL; int size; @@ -654,14 +653,37 @@ static struct device_node *cvm_oct_node_for_port(struct device_node *pip, return np; } -static void cvm_set_rgmii_delay(struct device_node *np, int iface, int port) +static void cvm_set_rgmii_delay(struct octeon_ethernet *priv, int iface, + int port) { + struct device_node *np = priv->of_node; u32 delay_value; + bool rx_delay; + bool tx_delay; - if (!of_property_read_u32(np, "rx-delay", &delay_value)) + /* By default, both RX/TX delay is enabled in + * __cvmx_helper_rgmii_enable(). + */ + rx_delay = true; + tx_delay = true; + + if (!of_property_read_u32(np, "rx-delay", &delay_value)) { cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, iface), delay_value); - if (!of_property_read_u32(np, "tx-delay", &delay_value)) + rx_delay = delay_value > 0; + } + if (!of_property_read_u32(np, "tx-delay", &delay_value)) { cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, iface), delay_value); + tx_delay = delay_value > 0; + } + + if (!rx_delay && !tx_delay) + priv->phy_mode = PHY_INTERFACE_MODE_RGMII_ID; + else if (!rx_delay) + priv->phy_mode = PHY_INTERFACE_MODE_RGMII_RXID; + else if (!tx_delay) + priv->phy_mode = PHY_INTERFACE_MODE_RGMII_TXID; + else + priv->phy_mode = PHY_INTERFACE_MODE_RGMII; } static int cvm_oct_probe(struct platform_device *pdev) @@ -818,7 +840,7 @@ static int cvm_oct_probe(struct platform_device *pdev) priv = netdev_priv(dev); priv->netdev = dev; priv->of_node = cvm_oct_node_for_port(pip, interface, - port_index); + port_index); INIT_DELAYED_WORK(&priv->port_periodic_work, cvm_oct_periodic_worker); @@ -826,6 +848,7 @@ static int cvm_oct_probe(struct platform_device *pdev) priv->port = port; priv->queue = cvmx_pko_get_base_queue(priv->port); priv->fau = fau - cvmx_pko_get_num_queues(port) * 4; + priv->phy_mode = PHY_INTERFACE_MODE_NA; for (qos = 0; qos < 16; qos++) skb_queue_head_init(&priv->tx_free_list[qos]); for (qos = 0; qos < cvmx_pko_get_num_queues(port); @@ -857,6 +880,7 @@ static int cvm_oct_probe(struct platform_device *pdev) break; case CVMX_HELPER_INTERFACE_MODE_SGMII: + priv->phy_mode = PHY_INTERFACE_MODE_SGMII; dev->netdev_ops = &cvm_oct_sgmii_netdev_ops; strcpy(dev->name, "eth%d"); break; @@ -866,11 +890,16 @@ static int cvm_oct_probe(struct platform_device *pdev) strcpy(dev->name, "spi%d"); break; - case CVMX_HELPER_INTERFACE_MODE_RGMII: case CVMX_HELPER_INTERFACE_MODE_GMII: + priv->phy_mode = PHY_INTERFACE_MODE_GMII; + dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; + strcpy(dev->name, "eth%d"); + break; + + case CVMX_HELPER_INTERFACE_MODE_RGMII: dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; strcpy(dev->name, "eth%d"); - cvm_set_rgmii_delay(priv->of_node, interface, + cvm_set_rgmii_delay(priv, interface, port_index); break; } diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h index 4a07e7f43d12..be570d33685a 100644 --- a/drivers/staging/octeon/octeon-ethernet.h +++ b/drivers/staging/octeon/octeon-ethernet.h @@ -12,7 +12,7 @@ #define OCTEON_ETHERNET_H #include <linux/of.h> - +#include <linux/phy.h> #include <asm/octeon/cvmx-helper-board.h> /** @@ -33,6 +33,8 @@ struct octeon_ethernet { * cvmx_helper_interface_mode_t */ int imode; + /* PHY mode */ + phy_interface_t phy_mode; /* List of outstanding tx buffers per queue */ struct sk_buff_head tx_free_list[16]; unsigned int last_speed; diff --git a/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c b/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c index ff145d493e1b..a54286498a47 100644 --- a/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c +++ b/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c @@ -11,35 +11,51 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include <linux/cs5535.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/delay.h> +#include <linux/i2c.h> #include <asm/olpc.h> #include "olpc_dcon.h" +enum dcon_gpios { + OLPC_DCON_STAT0, + OLPC_DCON_STAT1, + OLPC_DCON_IRQ, + OLPC_DCON_LOAD, + OLPC_DCON_BLANK, +}; + +struct dcon_gpio { + const char *name; + unsigned long flags; +}; + +static const struct dcon_gpio gpios_asis[] = { + [OLPC_DCON_STAT0] = { .name = "dcon_stat0", .flags = GPIOD_ASIS }, + [OLPC_DCON_STAT1] = { .name = "dcon_stat1", .flags = GPIOD_ASIS }, + [OLPC_DCON_IRQ] = { .name = "dcon_irq", .flags = GPIOD_ASIS }, + [OLPC_DCON_LOAD] = { .name = "dcon_load", .flags = GPIOD_ASIS }, + [OLPC_DCON_BLANK] = { .name = "dcon_blank", .flags = GPIOD_ASIS }, +}; + +struct gpio_desc *gpios[5]; + static int dcon_init_xo_1(struct dcon_priv *dcon) { unsigned char lob; - - if (gpio_request(OLPC_GPIO_DCON_STAT0, "OLPC-DCON")) { - pr_err("failed to request STAT0 GPIO\n"); - return -EIO; - } - if (gpio_request(OLPC_GPIO_DCON_STAT1, "OLPC-DCON")) { - pr_err("failed to request STAT1 GPIO\n"); - goto err_gp_stat1; - } - if (gpio_request(OLPC_GPIO_DCON_IRQ, "OLPC-DCON")) { - pr_err("failed to request IRQ GPIO\n"); - goto err_gp_irq; - } - if (gpio_request(OLPC_GPIO_DCON_LOAD, "OLPC-DCON")) { - pr_err("failed to request LOAD GPIO\n"); - goto err_gp_load; - } - if (gpio_request(OLPC_GPIO_DCON_BLANK, "OLPC-DCON")) { - pr_err("failed to request BLANK GPIO\n"); - goto err_gp_blank; + int ret, i; + const struct dcon_gpio *pin = &gpios_asis[0]; + + for (i = 0; i < ARRAY_SIZE(gpios_asis); i++) { + gpios[i] = devm_gpiod_get(&dcon->client->dev, pin[i].name, + pin[i].flags); + if (IS_ERR(gpios[i])) { + ret = PTR_ERR(gpios[i]); + pr_err("failed to request %s GPIO: %d\n", pin[i].name, + ret); + return ret; + } } /* Turn off the event enable for GPIO7 just to be safe */ @@ -61,12 +77,12 @@ static int dcon_init_xo_1(struct dcon_priv *dcon) dcon->pending_src = dcon->curr_src; /* Set the directions for the GPIO pins */ - gpio_direction_input(OLPC_GPIO_DCON_STAT0); - gpio_direction_input(OLPC_GPIO_DCON_STAT1); - gpio_direction_input(OLPC_GPIO_DCON_IRQ); - gpio_direction_input(OLPC_GPIO_DCON_BLANK); - gpio_direction_output(OLPC_GPIO_DCON_LOAD, - dcon->curr_src == DCON_SOURCE_CPU); + gpiod_direction_input(gpios[OLPC_DCON_STAT0]); + gpiod_direction_input(gpios[OLPC_DCON_STAT1]); + gpiod_direction_input(gpios[OLPC_DCON_IRQ]); + gpiod_direction_input(gpios[OLPC_DCON_BLANK]); + gpiod_direction_output(gpios[OLPC_DCON_LOAD], + dcon->curr_src == DCON_SOURCE_CPU); /* Set up the interrupt mappings */ @@ -84,7 +100,7 @@ static int dcon_init_xo_1(struct dcon_priv *dcon) /* Register the interrupt handler */ if (request_irq(DCON_IRQ, &dcon_interrupt, 0, "DCON", dcon)) { pr_err("failed to request DCON's irq\n"); - goto err_req_irq; + return -EIO; } /* Clear INV_EN for GPIO7 (DCONIRQ) */ @@ -125,18 +141,6 @@ static int dcon_init_xo_1(struct dcon_priv *dcon) cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_EVENTS_ENABLE); return 0; - -err_req_irq: - gpio_free(OLPC_GPIO_DCON_BLANK); -err_gp_blank: - gpio_free(OLPC_GPIO_DCON_LOAD); -err_gp_load: - gpio_free(OLPC_GPIO_DCON_IRQ); -err_gp_irq: - gpio_free(OLPC_GPIO_DCON_STAT1); -err_gp_stat1: - gpio_free(OLPC_GPIO_DCON_STAT0); - return -EIO; } static void dcon_wiggle_xo_1(void) @@ -180,13 +184,13 @@ static void dcon_wiggle_xo_1(void) static void dcon_set_dconload_1(int val) { - gpio_set_value(OLPC_GPIO_DCON_LOAD, val); + gpiod_set_value(gpios[OLPC_DCON_LOAD], val); } static int dcon_read_status_xo_1(u8 *status) { - *status = gpio_get_value(OLPC_GPIO_DCON_STAT0); - *status |= gpio_get_value(OLPC_GPIO_DCON_STAT1) << 1; + *status = gpiod_get_value(gpios[OLPC_DCON_STAT0]); + *status |= gpiod_get_value(gpios[OLPC_DCON_STAT1]) << 1; /* Clear the negative edge status for GPIO7 */ cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_NEGATIVE_EDGE_STS); diff --git a/drivers/staging/pi433/pi433_if.c b/drivers/staging/pi433/pi433_if.c index c85a805a1243..b2314636dc89 100644 --- a/drivers/staging/pi433/pi433_if.c +++ b/drivers/staging/pi433/pi433_if.c @@ -14,16 +14,6 @@ * * Copyright (C) 2016 Wolf-Entwicklungen * Marcus Wolf <linux@wolf-entwicklungen.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #undef DEBUG @@ -1255,12 +1245,16 @@ static int pi433_probe(struct spi_device *spi) /* create cdev */ device->cdev = cdev_alloc(); + if (!device->cdev) { + dev_dbg(device->dev, "allocation of cdev failed"); + goto cdev_failed; + } device->cdev->owner = THIS_MODULE; cdev_init(device->cdev, &pi433_fops); retval = cdev_add(device->cdev, device->devt, 1); if (retval) { dev_dbg(device->dev, "register of cdev failed"); - goto cdev_failed; + goto del_cdev; } /* spi setup */ @@ -1268,6 +1262,8 @@ static int pi433_probe(struct spi_device *spi) return 0; +del_cdev: + cdev_del(device->cdev); cdev_failed: kthread_stop(device->tx_task_struct); send_thread_failed: diff --git a/drivers/staging/pi433/pi433_if.h b/drivers/staging/pi433/pi433_if.h index 2d4fa77c793e..9feb95c431cb 100644 --- a/drivers/staging/pi433/pi433_if.h +++ b/drivers/staging/pi433/pi433_if.h @@ -15,16 +15,6 @@ * HopeRf with a similar interace - e. g. RFM69HCW, RFM12, RFM95, ... * Copyright (C) 2016 Wolf-Entwicklungen * Marcus Wolf <linux@wolf-entwicklungen.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #ifndef PI433_H diff --git a/drivers/staging/pi433/rf69.c b/drivers/staging/pi433/rf69.c index 4fa6c0237e59..e19b9ce794a8 100644 --- a/drivers/staging/pi433/rf69.c +++ b/drivers/staging/pi433/rf69.c @@ -4,16 +4,6 @@ * * Copyright (C) 2016 Wolf-Entwicklungen * Marcus Wolf <linux@wolf-entwicklungen.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ /* enable prosa debug info */ diff --git a/drivers/staging/pi433/rf69.h b/drivers/staging/pi433/rf69.h index 319b86c14234..d43a8d87d5d3 100644 --- a/drivers/staging/pi433/rf69.h +++ b/drivers/staging/pi433/rf69.h @@ -4,16 +4,6 @@ * * Copyright (C) 2016 Wolf-Entwicklungen * Marcus Wolf <linux@wolf-entwicklungen.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #ifndef RF69_H #define RF69_H diff --git a/drivers/staging/pi433/rf69_enum.h b/drivers/staging/pi433/rf69_enum.h index de3b7e32dad7..3ee1952245c2 100644 --- a/drivers/staging/pi433/rf69_enum.h +++ b/drivers/staging/pi433/rf69_enum.h @@ -4,16 +4,6 @@ * * Copyright (C) 2016 Wolf-Entwicklungen * Marcus Wolf <linux@wolf-entwicklungen.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #ifndef RF69_ENUM_H diff --git a/drivers/staging/pi433/rf69_registers.h b/drivers/staging/pi433/rf69_registers.h index ea19c1ca7509..f925a83c3247 100644 --- a/drivers/staging/pi433/rf69_registers.h +++ b/drivers/staging/pi433/rf69_registers.h @@ -4,16 +4,6 @@ * * Copyright (C) 2016 Wolf-Entwicklungen * Marcus Wolf <linux@wolf-entwicklungen.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ /*******************************************/ diff --git a/drivers/staging/ralink-gdma/Kconfig b/drivers/staging/ralink-gdma/Kconfig new file mode 100644 index 000000000000..a12b2c672d48 --- /dev/null +++ b/drivers/staging/ralink-gdma/Kconfig @@ -0,0 +1,6 @@ +config DMA_RALINK + tristate "RALINK DMA support" + depends on RALINK && !SOC_RT288X + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + diff --git a/drivers/staging/ralink-gdma/Makefile b/drivers/staging/ralink-gdma/Makefile new file mode 100644 index 000000000000..5d917e0729bb --- /dev/null +++ b/drivers/staging/ralink-gdma/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_DMA_RALINK) += ralink-gdma.o + +ccflags-y += -I$(srctree)/drivers/dma diff --git a/drivers/staging/mt7621-dma/ralink-gdma.c b/drivers/staging/ralink-gdma/ralink-gdma.c index 73dbc7fe38a2..d78042eba6dd 100644 --- a/drivers/staging/mt7621-dma/ralink-gdma.c +++ b/drivers/staging/ralink-gdma/ralink-gdma.c @@ -459,12 +459,14 @@ static void gdma_dma_chan_irq(struct gdma_dma_dev *dma_dev, list_del(&desc->vdesc.node); vchan_cookie_complete(&desc->vdesc); chan_issued = gdma_next_desc(chan); - } else + } else { chan_issued = 1; + } } - } else + } else { dev_dbg(dma_dev->ddev.dev, "chan %d no desc to complete\n", chan->id); + } if (chan_issued) set_bit(chan->id, &dma_dev->chan_issued); spin_unlock_irqrestore(&chan->vchan.lock, flags); @@ -512,9 +514,10 @@ static void gdma_dma_issue_pending(struct dma_chan *c) if (gdma_next_desc(chan)) { set_bit(chan->id, &dma_dev->chan_issued); tasklet_schedule(&dma_dev->task); - } else + } else { dev_dbg(dma_dev->ddev.dev, "chan %d no desc to issue\n", chan->id); + } } spin_unlock_irqrestore(&chan->vchan.lock, flags); } @@ -537,11 +540,11 @@ static struct dma_async_tx_descriptor *gdma_dma_prep_slave_sg( desc->residue = 0; for_each_sg(sgl, sg, sg_len, i) { - if (direction == DMA_MEM_TO_DEV) + if (direction == DMA_MEM_TO_DEV) { desc->sg[i].src_addr = sg_dma_address(sg); - else if (direction == DMA_DEV_TO_MEM) + } else if (direction == DMA_DEV_TO_MEM) { desc->sg[i].dst_addr = sg_dma_address(sg); - else { + } else { dev_err(c->device->dev, "direction type %d error\n", direction); goto free_desc; @@ -637,11 +640,11 @@ static struct dma_async_tx_descriptor *gdma_dma_prep_dma_cyclic( desc->residue = buf_len; for (i = 0; i < num_periods; i++) { - if (direction == DMA_MEM_TO_DEV) + if (direction == DMA_MEM_TO_DEV) { desc->sg[i].src_addr = buf_addr; - else if (direction == DMA_DEV_TO_MEM) + } else if (direction == DMA_DEV_TO_MEM) { desc->sg[i].dst_addr = buf_addr; - else { + } else { dev_err(c->device->dev, "direction type %d error\n", direction); goto free_desc; @@ -737,9 +740,9 @@ static void gdma_dma_tasklet(unsigned long arg) if (chan->desc) { atomic_inc(&dma_dev->cnt); gdma_start_transfer(dma_dev, chan); - } else + } else { dev_dbg(dma_dev->ddev.dev, "chan %d no desc to issue\n", chan->id); - + } if (!dma_dev->chan_issued) break; } @@ -818,9 +821,9 @@ static int gdma_dma_probe(struct platform_device *pdev) return -EINVAL; data = (struct gdma_data *) match->data; - dma_dev = devm_kzalloc(&pdev->dev, sizeof(*dma_dev) + - (sizeof(struct gdma_dmaengine_chan) * data->chancnt), - GFP_KERNEL); + dma_dev = devm_kzalloc(&pdev->dev, + struct_size(dma_dev, chan, data->chancnt), + GFP_KERNEL); if (!dma_dev) { dev_err(&pdev->dev, "alloc dma device failed\n"); return -EINVAL; diff --git a/drivers/staging/rtl8188eu/core/rtw_ap.c b/drivers/staging/rtl8188eu/core/rtw_ap.c index 1c319c2ca86d..94c9d9f8ee5c 100644 --- a/drivers/staging/rtl8188eu/core/rtw_ap.c +++ b/drivers/staging/rtl8188eu/core/rtw_ap.c @@ -82,7 +82,7 @@ static void update_BCNTIM(struct adapter *padapter) /* calculate head_len */ offset = _FIXED_IE_LENGTH_; - offset += pnetwork_mlmeext->Ssid.SsidLength + 2; + offset += pnetwork_mlmeext->ssid.ssid_length + 2; /* get supported rates len */ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, @@ -629,7 +629,7 @@ static void start_bss_network(struct adapter *padapter, u8 *pbuf) } /* setting only at first time */ - if (pmlmepriv->cur_network.join_res != true) { + if (!pmlmepriv->cur_network.join_res) { /* WEP Key will be set before this function, do not * clear CAM. */ @@ -756,7 +756,7 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) DBG_88E("%s, len =%d\n", __func__, len); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return _FAIL; if (len < 0 || len > MAX_IE_SZ) @@ -785,9 +785,9 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) /* SSID */ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->ie_length - _BEACON_IE_OFFSET_)); if (p && ie_len > 0) { - memset(&pbss_network->Ssid, 0, sizeof(struct ndis_802_11_ssid)); - memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); - pbss_network->Ssid.SsidLength = ie_len; + memset(&pbss_network->ssid, 0, sizeof(struct ndis_802_11_ssid)); + memcpy(pbss_network->ssid.ssid, (p + 2), ie_len); + pbss_network->ssid.ssid_length = ie_len; } /* channel */ diff --git a/drivers/staging/rtl8188eu/core/rtw_cmd.c b/drivers/staging/rtl8188eu/core/rtw_cmd.c index 9b2a497aa413..83a2e58aef53 100644 --- a/drivers/staging/rtl8188eu/core/rtw_cmd.c +++ b/drivers/staging/rtl8188eu/core/rtw_cmd.c @@ -214,11 +214,8 @@ _next: pcmdpriv->cmdthd_running = false; /* free all cmd_obj resources */ - while ((pcmd = rtw_dequeue_cmd(&pcmdpriv->cmd_queue))) { - /* DBG_88E("%s: leaving... drop cmdcode:%u\n", __func__, pcmd->cmdcode); */ - + while ((pcmd = rtw_dequeue_cmd(&pcmdpriv->cmd_queue))) rtw_free_cmd_obj(pcmd); - } complete(&pcmdpriv->terminate_cmdthread_comp); @@ -240,7 +237,7 @@ u8 rtw_sitesurvey_cmd(struct adapter *padapter, struct ndis_802_11_ssid *ssid, struct cmd_priv *pcmdpriv = &padapter->cmdpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - if (check_fwstate(pmlmepriv, _FW_LINKED) == true) + if (check_fwstate(pmlmepriv, _FW_LINKED)) rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 1); ph2c = kzalloc(sizeof(*ph2c), GFP_ATOMIC); @@ -259,7 +256,6 @@ u8 rtw_sitesurvey_cmd(struct adapter *padapter, struct ndis_802_11_ssid *ssid, init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, _SiteSurvey_CMD_); - /* psurveyPara->bsslimit = 48; */ psurveyPara->scan_mode = pmlmepriv->scan_mode; /* prepare ssid list */ @@ -267,7 +263,7 @@ u8 rtw_sitesurvey_cmd(struct adapter *padapter, struct ndis_802_11_ssid *ssid, int i; for (i = 0; i < ssid_num && i < RTW_SSID_SCAN_AMOUNT; i++) { - if (ssid[i].SsidLength) { + if (ssid[i].ssid_length) { memcpy(&psurveyPara->ssid[i], &ssid[i], sizeof(struct ndis_802_11_ssid)); psurveyPara->ssid_num++; } @@ -294,7 +290,7 @@ u8 rtw_sitesurvey_cmd(struct adapter *padapter, struct ndis_802_11_ssid *ssid, mod_timer(&pmlmepriv->scan_to_timer, jiffies + msecs_to_jiffies(SCANNING_TIMEOUT)); - LedControl8188eu(padapter, LED_CTL_SITE_SURVEY); + led_control_8188eu(padapter, LED_CTL_SITE_SURVEY); pmlmepriv->scan_interval = SCAN_INTERVAL;/* 30*2 sec = 60sec */ } else { @@ -318,12 +314,12 @@ u8 rtw_createbss_cmd(struct adapter *padapter) struct wlan_bssid_ex *pdev_network = &padapter->registrypriv.dev_network; u8 res = _SUCCESS; - LedControl8188eu(padapter, LED_CTL_START_TO_LINK); + led_control_8188eu(padapter, LED_CTL_START_TO_LINK); - if (pmlmepriv->assoc_ssid.SsidLength == 0) - RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, (" createbss for Any SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); + if (pmlmepriv->assoc_ssid.ssid_length == 0) + RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, (" createbss for Any SSid:%s\n", pmlmepriv->assoc_ssid.ssid)); else - RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, (" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); + RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, (" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.ssid)); pcmd = kzalloc(sizeof(*pcmd), GFP_ATOMIC); if (!pcmd) { @@ -360,12 +356,12 @@ u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork) struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - LedControl8188eu(padapter, LED_CTL_START_TO_LINK); + led_control_8188eu(padapter, LED_CTL_START_TO_LINK); - if (pmlmepriv->assoc_ssid.SsidLength == 0) + if (pmlmepriv->assoc_ssid.ssid_length == 0) RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("+Join cmd: Any SSid\n")); else - RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+Join cmd: SSid =[%s]\n", pmlmepriv->assoc_ssid.Ssid)); + RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+Join cmd: SSid =[%s]\n", pmlmepriv->assoc_ssid.ssid)); pcmd = kzalloc(sizeof(*pcmd), GFP_ATOMIC); if (!pcmd) { @@ -660,9 +656,6 @@ u8 rtw_addbareq_cmd(struct adapter *padapter, u8 tid, u8 *addr) init_h2fwcmd_w_parm_no_rsp(ph2c, paddbareq_parm, _AddBAReq_CMD_); - /* DBG_88E("rtw_addbareq_cmd, tid =%d\n", tid); */ - - /* rtw_enqueue_cmd(pcmdpriv, ph2c); */ res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: @@ -696,7 +689,6 @@ u8 rtw_dynamic_chk_wk_cmd(struct adapter *padapter) init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, _Set_Drv_Extra_CMD_); - /* rtw_enqueue_cmd(pcmdpriv, ph2c); */ res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: return res; @@ -820,7 +812,7 @@ static void dynamic_chk_wk_hdl(struct adapter *padapter, u8 *pbuf, int sz) pmlmepriv = &padapter->mlmepriv; #ifdef CONFIG_88EU_AP_MODE - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) + if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) expire_timeout_chk(padapter); #endif @@ -836,13 +828,13 @@ static void lps_ctrl_wk_hdl(struct adapter *padapter, u8 lps_ctrl_type) struct mlme_priv *pmlmepriv = &padapter->mlmepriv; u8 mstatus; - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true)) + if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) || + check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) return; switch (lps_ctrl_type) { case LPS_CTRL_SCAN: - if (check_fwstate(pmlmepriv, _FW_LINKED) == true) { + if (check_fwstate(pmlmepriv, _FW_LINKED)) { /* connect */ LPS_Leave(padapter); } @@ -862,7 +854,6 @@ static void lps_ctrl_wk_hdl(struct adapter *padapter, u8 lps_ctrl_type) rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); break; case LPS_CTRL_SPECIAL_PACKET: - /* DBG_88E("LPS_CTRL_SPECIAL_PACKET\n"); */ pwrpriv->DelayLPSLastTimeStamp = jiffies; LPS_Leave(padapter); break; @@ -879,7 +870,6 @@ u8 rtw_lps_ctrl_wk_cmd(struct adapter *padapter, u8 lps_ctrl_type, u8 enqueue) struct cmd_obj *ph2c; struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - /* struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; */ u8 res = _SUCCESS; if (enqueue) { @@ -1029,9 +1019,6 @@ static void rtw_chk_hi_queue_hdl(struct adapter *padapter) if (psta_bmc->sleepq_len == 0) { u8 val = 0; - /* while ((rtw_read32(padapter, 0x414)&0x00ffff00)!= 0) */ - /* while ((rtw_read32(padapter, 0x414)&0x0000ff00)!= 0) */ - rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &val); while (!val) { diff --git a/drivers/staging/rtl8188eu/core/rtw_efuse.c b/drivers/staging/rtl8188eu/core/rtw_efuse.c index b7be71f904ed..51c3dd6d7ffb 100644 --- a/drivers/staging/rtl8188eu/core/rtw_efuse.c +++ b/drivers/staging/rtl8188eu/core/rtw_efuse.c @@ -88,7 +88,9 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) if (!efuseTbl) return; - tmp = kzalloc(EFUSE_MAX_SECTION_88E * (sizeof(void *) + EFUSE_MAX_WORD_UNIT * sizeof(u16)), GFP_KERNEL); + tmp = kcalloc(EFUSE_MAX_SECTION_88E, + sizeof(void *) + EFUSE_MAX_WORD_UNIT * sizeof(u16), + GFP_KERNEL); if (!tmp) { DBG_88E("%s: alloc eFuseWord fail!\n", __func__); goto eFuseWord_failed; diff --git a/drivers/staging/rtl8188eu/core/rtw_ieee80211.c b/drivers/staging/rtl8188eu/core/rtw_ieee80211.c index 5c4ff81987bd..094e8e78f0e8 100644 --- a/drivers/staging/rtl8188eu/core/rtw_ieee80211.c +++ b/drivers/staging/rtl8188eu/core/rtw_ieee80211.c @@ -234,7 +234,7 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv) ie += 2; /* SSID */ - ie = rtw_set_ie(ie, _SSID_IE_, pdev_network->Ssid.SsidLength, pdev_network->Ssid.Ssid, &sz); + ie = rtw_set_ie(ie, _SSID_IE_, pdev_network->ssid.ssid_length, pdev_network->ssid.ssid, &sz); /* supported rates */ if (pregistrypriv->wireless_mode == WIRELESS_11ABGN) { @@ -927,7 +927,7 @@ static int rtw_get_cipher_info(struct wlan_network *pnetwork) if (pbuf && (wpa_ielen > 0)) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s: wpa_ielen: %d", __func__, wpa_ielen)); - if (_SUCCESS == rtw_parse_wpa_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is8021x)) { + if (rtw_parse_wpa_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is8021x) == _SUCCESS) { pnetwork->BcnInfo.pairwise_cipher = pairwise_cipher; pnetwork->BcnInfo.group_cipher = group_cipher; pnetwork->BcnInfo.is_8021x = is8021x; @@ -940,7 +940,7 @@ static int rtw_get_cipher_info(struct wlan_network *pnetwork) if (pbuf && (wpa_ielen > 0)) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("get RSN IE\n")); - if (_SUCCESS == rtw_parse_wpa2_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is8021x)) { + if (rtw_parse_wpa2_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is8021x) == _SUCCESS) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("get RSN IE OK!!!\n")); pnetwork->BcnInfo.pairwise_cipher = pairwise_cipher; pnetwork->BcnInfo.group_cipher = group_cipher; @@ -975,9 +975,9 @@ void rtw_get_bcn_info(struct wlan_network *pnetwork) pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_OPENSYS; } rtw_get_sec_ie(pnetwork->network.ies, pnetwork->network.ie_length, NULL, &rsn_len, NULL, &wpa_len); - RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s: ssid =%s\n", __func__, pnetwork->network.Ssid.Ssid)); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s: ssid =%s\n", __func__, pnetwork->network.ssid.ssid)); RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s: wpa_len =%d rsn_len =%d\n", __func__, wpa_len, rsn_len)); - RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s: ssid =%s\n", __func__, pnetwork->network.Ssid.Ssid)); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s: ssid =%s\n", __func__, pnetwork->network.ssid.ssid)); RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s: wpa_len =%d rsn_len =%d\n", __func__, wpa_len, rsn_len)); if (rsn_len > 0) { diff --git a/drivers/staging/rtl8188eu/core/rtw_ioctl_set.c b/drivers/staging/rtl8188eu/core/rtw_ioctl_set.c index 0b3eb0b40975..7d56767cdff6 100644 --- a/drivers/staging/rtl8188eu/core/rtw_ioctl_set.c +++ b/drivers/staging/rtl8188eu/core/rtw_ioctl_set.c @@ -77,7 +77,7 @@ u8 rtw_do_join(struct adapter *padapter) pibss = padapter->registrypriv.dev_network.MacAddress; - memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid)); + memcpy(&pdev_network->ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid)); rtw_update_registrypriv_dev_network(padapter); @@ -208,7 +208,7 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid) struct wlan_network *pnetwork = &pmlmepriv->cur_network; DBG_88E_LEVEL(_drv_info_, "set ssid [%s] fw_state=0x%08x\n", - ssid->Ssid, get_fwstate(pmlmepriv)); + ssid->ssid, get_fwstate(pmlmepriv)); if (!padapter->hw_init_completed) { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, @@ -229,8 +229,8 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid) RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n")); - if (pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength && - !memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength)) { + if (pmlmepriv->assoc_ssid.ssid_length == ssid->ssid_length && + !memcmp(&pmlmepriv->assoc_ssid.ssid, ssid->ssid, ssid->ssid_length)) { if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("Set SSID is the same ssid, fw_state = 0x%08x\n", @@ -257,8 +257,8 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid) } } else { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("Set SSID not the same ssid\n")); - RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_ssid =[%s] len = 0x%x\n", ssid->Ssid, (unsigned int)ssid->SsidLength)); - RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("assoc_ssid =[%s] len = 0x%x\n", pmlmepriv->assoc_ssid.Ssid, (unsigned int)pmlmepriv->assoc_ssid.SsidLength)); + RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_ssid =[%s] len = 0x%x\n", ssid->ssid, (unsigned int)ssid->ssid_length)); + RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("assoc_ssid =[%s] len = 0x%x\n", pmlmepriv->assoc_ssid.ssid, (unsigned int)pmlmepriv->assoc_ssid.ssid_length)); rtw_disassoc_cmd(padapter, 0, true); diff --git a/drivers/staging/rtl8188eu/core/rtw_led.c b/drivers/staging/rtl8188eu/core/rtw_led.c index a2e7789aecbd..d1406cc99768 100644 --- a/drivers/staging/rtl8188eu/core/rtw_led.c +++ b/drivers/staging/rtl8188eu/core/rtw_led.c @@ -33,7 +33,7 @@ void BlinkWorkItemCallback(struct work_struct *work) struct LED_871x *pLed = container_of(work, struct LED_871x, BlinkWorkItem); - BlinkHandler(pLed); + blink_handler(pLed); } /* */ @@ -94,17 +94,17 @@ static void SwLedBlink1(struct LED_871x *pLed) /* Change LED according to BlinkingLedState specified. */ if (pLed->BlinkingLedState == RTW_LED_ON) { - SwLedOn(padapter, pLed); + sw_led_on(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { - SwLedOff(padapter, pLed); + sw_led_off(padapter, pLed); RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } if (padapter->pwrctrlpriv.rf_pwrstate != rf_on) { - SwLedOff(padapter, pLed); + sw_led_off(padapter, pLed); ResetLedStatus(pLed); return; } @@ -240,7 +240,7 @@ static void SwLedBlink1(struct LED_871x *pLed) static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAction) { struct led_priv *ledpriv = &padapter->ledpriv; - struct LED_871x *pLed = &ledpriv->SwLed0; + struct LED_871x *pLed = &ledpriv->sw_led; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; switch (LedAction) { @@ -445,7 +445,7 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct del_timer_sync(&pLed->BlinkTimer); pLed->bLedScanBlinkInProgress = false; } - SwLedOff(padapter, pLed); + sw_led_off(padapter, pLed); break; default: break; @@ -455,11 +455,7 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct ("Led %d\n", pLed->CurrLedState)); } -/* */ -/* Description: */ -/* Handler function of LED Blinking. */ -/* */ -void BlinkHandler(struct LED_871x *pLed) +void blink_handler(struct LED_871x *pLed) { struct adapter *padapter = pLed->padapter; @@ -469,7 +465,7 @@ void BlinkHandler(struct LED_871x *pLed) SwLedBlink1(pLed); } -void LedControl8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction) +void led_control_8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction) { if (padapter->bSurpriseRemoved || padapter->bDriverStopped || !padapter->hw_init_completed) diff --git a/drivers/staging/rtl8188eu/core/rtw_mlme.c b/drivers/staging/rtl8188eu/core/rtw_mlme.c index b9bd864f323c..ca0cf8a86671 100644 --- a/drivers/staging/rtl8188eu/core/rtw_mlme.c +++ b/drivers/staging/rtl8188eu/core/rtw_mlme.c @@ -24,11 +24,11 @@ extern const u8 MCS_rate_1R[16]; int rtw_init_mlme_priv(struct adapter *padapter) { - int i; - u8 *pbuf; - struct wlan_network *pnetwork; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - int res = _SUCCESS; + int i; + u8 *pbuf; + struct wlan_network *pnetwork; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + int res = _SUCCESS; /* We don't need to memset padapter->XXX to zero, because adapter is allocated by vzalloc(). */ @@ -39,9 +39,9 @@ int rtw_init_mlme_priv(struct adapter *padapter) pmlmepriv->cur_network.network.InfrastructureMode = Ndis802_11AutoUnknown; pmlmepriv->scan_mode = SCAN_ACTIVE;/* 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff) */ - spin_lock_init(&(pmlmepriv->lock)); - _rtw_init_queue(&(pmlmepriv->free_bss_pool)); - _rtw_init_queue(&(pmlmepriv->scanned_queue)); + spin_lock_init(&pmlmepriv->lock); + _rtw_init_queue(&pmlmepriv->free_bss_pool); + _rtw_init_queue(&pmlmepriv->scanned_queue); memset(&pmlmepriv->assoc_ssid, 0, sizeof(struct ndis_802_11_ssid)); @@ -56,9 +56,9 @@ int rtw_init_mlme_priv(struct adapter *padapter) pnetwork = (struct wlan_network *)pbuf; for (i = 0; i < MAX_BSS_CNT; i++) { - INIT_LIST_HEAD(&(pnetwork->list)); + INIT_LIST_HEAD(&pnetwork->list); - list_add_tail(&(pnetwork->list), &(pmlmepriv->free_bss_pool.queue)); + list_add_tail(&pnetwork->list, &pmlmepriv->free_bss_pool.queue); pnetwork++; } @@ -137,7 +137,7 @@ static void _rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network * unsigned long curr_time; u32 delta_time; u32 lifetime = SCANQUEUE_LIFETIME; - struct __queue *free_queue = &(pmlmepriv->free_bss_pool); + struct __queue *free_queue = &pmlmepriv->free_bss_pool; if (!pnetwork) return; @@ -154,21 +154,21 @@ static void _rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network * return; } spin_lock_bh(&free_queue->lock); - list_del_init(&(pnetwork->list)); - list_add_tail(&(pnetwork->list), &(free_queue->queue)); + list_del_init(&pnetwork->list); + list_add_tail(&pnetwork->list, &free_queue->queue); spin_unlock_bh(&free_queue->lock); } void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork) { - struct __queue *free_queue = &(pmlmepriv->free_bss_pool); + struct __queue *free_queue = &pmlmepriv->free_bss_pool; if (!pnetwork) return; if (pnetwork->fixed) return; - list_del_init(&(pnetwork->list)); - list_add_tail(&(pnetwork->list), get_list_head(free_queue)); + list_del_init(&pnetwork->list); + list_add_tail(&pnetwork->list, get_list_head(free_queue)); } /* @@ -179,7 +179,7 @@ void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network * struct wlan_network *rtw_find_network(struct __queue *scanned_queue, u8 *addr) { struct list_head *phead, *plist; - struct wlan_network *pnetwork = NULL; + struct wlan_network *pnetwork = NULL; u8 zero_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; if (!memcmp(zero_addr, addr, ETH_ALEN)) { @@ -230,8 +230,9 @@ int rtw_if_up(struct adapter *padapter) if (padapter->bDriverStopped || padapter->bSurpriseRemoved || !check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, - ("rtw_if_up:bDriverStopped(%d) OR bSurpriseRemoved(%d)", - padapter->bDriverStopped, padapter->bSurpriseRemoved)); + ("%s:bDriverStopped(%d) OR bSurpriseRemoved(%d)", + __func__, padapter->bDriverStopped, + padapter->bSurpriseRemoved)); res = false; } else { res = true; @@ -258,7 +259,7 @@ u8 *rtw_get_capability_from_ie(u8 *ie) u16 rtw_get_capability(struct wlan_bssid_ex *bss) { - __le16 val; + __le16 val; memcpy((u8 *)&val, rtw_get_capability_from_ie(bss->ies), 2); @@ -299,8 +300,8 @@ int rtw_is_same_ibss(struct adapter *adapter, struct wlan_network *pnetwork) static int is_same_ess(struct wlan_bssid_ex *a, struct wlan_bssid_ex *b) { - return (a->Ssid.SsidLength == b->Ssid.SsidLength) && - !memcmp(a->Ssid.Ssid, b->Ssid.Ssid, a->Ssid.SsidLength); + return (a->ssid.ssid_length == b->ssid.ssid_length) && + !memcmp(a->ssid.ssid, b->ssid.ssid, a->ssid.ssid_length); } int is_same_network(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst) @@ -314,20 +315,20 @@ int is_same_network(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst) s_cap = le16_to_cpu(le_scap); d_cap = le16_to_cpu(le_dcap); - return ((src->Ssid.SsidLength == dst->Ssid.SsidLength) && - ((!memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN)) == true) && - ((!memcmp(src->Ssid.Ssid, dst->Ssid.Ssid, src->Ssid.SsidLength)) == true) && + return ((src->ssid.ssid_length == dst->ssid.ssid_length) && + (!memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN)) && + (!memcmp(src->ssid.ssid, dst->ssid.ssid, src->ssid.ssid_length)) && ((s_cap & WLAN_CAPABILITY_IBSS) == (d_cap & WLAN_CAPABILITY_IBSS)) && ((s_cap & WLAN_CAPABILITY_ESS) == (d_cap & WLAN_CAPABILITY_ESS))); } -struct wlan_network *rtw_get_oldest_wlan_network(struct __queue *scanned_queue) +struct wlan_network *rtw_get_oldest_wlan_network(struct __queue *scanned_queue) { struct list_head *plist, *phead; - struct wlan_network *pwlan = NULL; - struct wlan_network *oldest = NULL; + struct wlan_network *pwlan = NULL; + struct wlan_network *oldest = NULL; phead = get_list_head(scanned_queue); @@ -354,7 +355,8 @@ void update_network(struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src, rtw_hal_antdiv_rssi_compared(padapter, dst, src); /* this will update src.Rssi, need consider again */ /* The rule below is 1/5 for sample value, 4/5 for history value */ - if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&(padapter->mlmepriv.cur_network.network), src)) { + if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && + is_same_network(&padapter->mlmepriv.cur_network.network, src)) { /* Take the recvpriv's value for the connected AP*/ ss_final = padapter->recvpriv.signal_strength; sq_final = padapter->recvpriv.signal_qual; @@ -384,11 +386,11 @@ void update_network(struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src, static void update_current_network(struct adapter *adapter, struct wlan_bssid_ex *pnetwork) { - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - if ((check_fwstate(pmlmepriv, _FW_LINKED) == true) && - (is_same_network(&(pmlmepriv->cur_network.network), pnetwork))) { - update_network(&(pmlmepriv->cur_network.network), pnetwork, adapter, true); + if (check_fwstate(pmlmepriv, _FW_LINKED) && + is_same_network(&pmlmepriv->cur_network.network, pnetwork)) { + update_network(&pmlmepriv->cur_network.network, pnetwork, adapter, true); rtw_update_protection(adapter, (pmlmepriv->cur_network.network.ies) + sizeof(struct ndis_802_11_fixed_ie), pmlmepriv->cur_network.network.ie_length); } @@ -400,20 +402,20 @@ static void update_current_network(struct adapter *adapter, struct wlan_bssid_ex void rtw_update_scanned_network(struct adapter *adapter, struct wlan_bssid_ex *target) { struct list_head *plist, *phead; - u32 bssid_ex_sz; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct __queue *queue = &(pmlmepriv->scanned_queue); - struct wlan_network *pnetwork = NULL; - struct wlan_network *oldest = NULL; + u32 bssid_ex_sz; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct __queue *queue = &pmlmepriv->scanned_queue; + struct wlan_network *pnetwork = NULL; + struct wlan_network *oldest = NULL; spin_lock_bh(&queue->lock); phead = get_list_head(queue); plist = phead->next; while (phead != plist) { - pnetwork = container_of(plist, struct wlan_network, list); + pnetwork = container_of(plist, struct wlan_network, list); - if (is_same_network(&(pnetwork->network), target)) + if (is_same_network(&pnetwork->network, target)) break; if ((oldest == ((struct wlan_network *)0)) || time_after(oldest->last_scanned, pnetwork->last_scanned)) @@ -424,12 +426,14 @@ void rtw_update_scanned_network(struct adapter *adapter, struct wlan_bssid_ex *t * with this beacon's information */ if (phead == plist) { - if (list_empty(&(pmlmepriv->free_bss_pool.queue))) { + if (list_empty(&pmlmepriv->free_bss_pool.queue)) { /* If there are no more slots, expire the oldest */ pnetwork = oldest; - rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); - memcpy(&(pnetwork->network), target, get_wlan_bssid_ex_sz(target)); + rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, + &target->PhyInfo.Optimum_antenna); + memcpy(&pnetwork->network, target, + get_wlan_bssid_ex_sz(target)); /* variable initialize */ pnetwork->fixed = false; pnetwork->last_scanned = jiffies; @@ -447,26 +451,28 @@ void rtw_update_scanned_network(struct adapter *adapter, struct wlan_bssid_ex *t pnetwork = rtw_alloc_network(pmlmepriv); /* will update scan_time */ if (!pnetwork) { - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("\n\n\nsomething wrong here\n\n\n")); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, + ("\n\n\nsomething wrong here\n\n\n")); goto exit; } bssid_ex_sz = get_wlan_bssid_ex_sz(target); target->Length = bssid_ex_sz; - rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); - memcpy(&(pnetwork->network), target, bssid_ex_sz); + rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, + &target->PhyInfo.Optimum_antenna); + memcpy(&pnetwork->network, target, bssid_ex_sz); pnetwork->last_scanned = jiffies; /* bss info not receiving from the right channel */ if (pnetwork->network.PhyInfo.SignalQuality == 101) pnetwork->network.PhyInfo.SignalQuality = 0; - list_add_tail(&(pnetwork->list), &(queue->queue)); + list_add_tail(&pnetwork->list, &queue->queue); } } else { - /* we have an entry and we are going to update it. But this entry may - * be already expired. In this case we do the same as we found a new - * net and call the new_net handler + /* we have an entry and we are going to update it. But this + * entry may be already expired. In this case we do the same + * as we found a new net and call the new_net handler */ bool update_ie = true; @@ -476,7 +482,7 @@ void rtw_update_scanned_network(struct adapter *adapter, struct wlan_bssid_ex *t if ((pnetwork->network.ie_length > target->ie_length) && (target->Reserved[0] == 1)) update_ie = false; - update_network(&(pnetwork->network), target, adapter, update_ie); + update_network(&pnetwork->network, target, adapter, update_ie); } exit: @@ -529,7 +535,7 @@ static int rtw_is_desired_network(struct adapter *adapter, struct wlan_network * bselected = false; } - if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { if (pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) bselected = false; } @@ -547,26 +553,28 @@ void rtw_survey_event_callback(struct adapter *adapter, u8 *pbuf) { u32 len; struct wlan_bssid_ex *pnetwork; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; pnetwork = (struct wlan_bssid_ex *)pbuf; - RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_survey_event_callback, ssid=%s\n", pnetwork->Ssid.Ssid)); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, + ("%s, ssid=%s\n", __func__, pnetwork->ssid.ssid)); len = get_wlan_bssid_ex_sz(pnetwork); if (len > (sizeof(struct wlan_bssid_ex))) { - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("\n****rtw_survey_event_callback: return a wrong bss ***\n")); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, + ("\n****%s: return a wrong bss ***\n", __func__)); return; } spin_lock_bh(&pmlmepriv->lock); /* update IBSS_network 's timestamp */ - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == true) { - if (!memcmp(&(pmlmepriv->cur_network.network.MacAddress), pnetwork->MacAddress, ETH_ALEN)) { + if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { + if (!memcmp(&pmlmepriv->cur_network.network.MacAddress, pnetwork->MacAddress, ETH_ALEN)) { struct wlan_network *ibss_wlan = NULL; memcpy(pmlmepriv->cur_network.network.ies, pnetwork->ies, 8); - spin_lock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_lock_bh(&pmlmepriv->scanned_queue.lock); ibss_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->MacAddress); if (ibss_wlan) { memcpy(ibss_wlan->network.ies, pnetwork->ies, 8); @@ -579,20 +587,18 @@ void rtw_survey_event_callback(struct adapter *adapter, u8 *pbuf) /* lock pmlmepriv->lock when you accessing network_q */ if (!check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) { - if (pnetwork->Ssid.Ssid[0] == 0) - pnetwork->Ssid.SsidLength = 0; + if (pnetwork->ssid.ssid[0] == 0) + pnetwork->ssid.ssid_length = 0; rtw_add_network(adapter, pnetwork); } exit: - spin_unlock_bh(&pmlmepriv->lock); - return; } void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf) { - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; spin_lock_bh(&pmlmepriv->lock); @@ -602,7 +608,8 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf) pmlmepriv->wps_probe_req_ie = NULL; } - RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_surveydone_event_callback: fw_state:%x\n\n", get_fwstate(pmlmepriv))); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, + ("%s: fw_state:%x\n\n", __func__, get_fwstate(pmlmepriv))); if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) { del_timer_sync(&pmlmepriv->scan_to_timer); @@ -614,7 +621,7 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf) rtw_set_signal_stat_timer(&adapter->recvpriv); if (pmlmepriv->to_join) { - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true)) { + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { if (!check_fwstate(pmlmepriv, _FW_LINKED)) { set_fwstate(pmlmepriv, _FW_UNDER_LINKING); @@ -622,14 +629,14 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf) mod_timer(&pmlmepriv->assoc_timer, jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT)); } else { - struct wlan_bssid_ex *pdev_network = &(adapter->registrypriv.dev_network); + struct wlan_bssid_ex *pdev_network = &adapter->registrypriv.dev_network; u8 *pibss = adapter->registrypriv.dev_network.MacAddress; _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("switching to adhoc master\n")); - memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid)); + memcpy(&pdev_network->ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid)); rtw_update_registrypriv_dev_network(adapter); rtw_generate_random_ibss(pibss); @@ -691,7 +698,7 @@ static void free_scanqueue(struct mlme_priv *pmlmepriv) struct __queue *scan_queue = &pmlmepriv->scanned_queue; struct list_head *plist, *phead, *ptemp; - RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+free_scanqueue\n")); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+%s\n", __func__)); spin_lock_bh(&scan_queue->lock); spin_lock_bh(&free_queue->lock); @@ -714,7 +721,7 @@ static void free_scanqueue(struct mlme_priv *pmlmepriv) */ void rtw_free_assoc_resources(struct adapter *adapter) { - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; spin_lock_bh(&pmlmepriv->scanned_queue.lock); rtw_free_assoc_resources_locked(adapter); @@ -727,21 +734,21 @@ void rtw_free_assoc_resources(struct adapter *adapter) void rtw_free_assoc_resources_locked(struct adapter *adapter) { struct wlan_network *pwlan = NULL; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - struct sta_priv *pstapriv = &adapter->stapriv; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct sta_priv *pstapriv = &adapter->stapriv; struct wlan_network *tgt_network = &pmlmepriv->cur_network; RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_free_assoc_resources\n")); RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("tgt_network->network.MacAddress=%pM ssid=%s\n", - tgt_network->network.MacAddress, tgt_network->network.Ssid.Ssid)); + tgt_network->network.MacAddress, tgt_network->network.ssid.ssid)); if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_AP_STATE)) { struct sta_info *psta; psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress); - spin_lock_bh(&(pstapriv->sta_hash_lock)); + spin_lock_bh(&pstapriv->sta_hash_lock); rtw_free_stainfo(adapter, psta); spin_unlock_bh(&pstapriv->sta_hash_lock); } @@ -752,7 +759,7 @@ void rtw_free_assoc_resources_locked(struct adapter *adapter) rtw_free_all_stainfo(adapter); psta = rtw_get_bcmc_stainfo(adapter); - spin_lock_bh(&(pstapriv->sta_hash_lock)); + spin_lock_bh(&pstapriv->sta_hash_lock); rtw_free_stainfo(adapter, psta); spin_unlock_bh(&pstapriv->sta_hash_lock); @@ -776,7 +783,7 @@ void rtw_free_assoc_resources_locked(struct adapter *adapter) */ void rtw_indicate_connect(struct adapter *padapter) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+%s\n", __func__)); @@ -785,7 +792,7 @@ void rtw_indicate_connect(struct adapter *padapter) if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { set_fwstate(pmlmepriv, _FW_LINKED); - LedControl8188eu(padapter, LED_CTL_LINK); + led_control_8188eu(padapter, LED_CTL_LINK); rtw_os_indicate_connect(padapter); } @@ -802,9 +809,9 @@ void rtw_indicate_connect(struct adapter *padapter) */ void rtw_indicate_disconnect(struct adapter *padapter) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_indicate_disconnect\n")); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+%s\n", __func__)); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS); @@ -816,7 +823,7 @@ void rtw_indicate_disconnect(struct adapter *padapter) rtw_os_indicate_disconnect(padapter); _clr_fwstate_(pmlmepriv, _FW_LINKED); - LedControl8188eu(padapter, LED_CTL_NO_LINK); + led_control_8188eu(padapter, LED_CTL_NO_LINK); rtw_clear_scan_deny(padapter); } @@ -900,8 +907,8 @@ static struct sta_info *rtw_joinbss_update_stainfo(struct adapter *padapter, str /* ptarget_wlan: found from scanned_queue */ static void rtw_joinbss_update_network(struct adapter *padapter, struct wlan_network *ptarget_wlan, struct wlan_network *pnetwork) { - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct wlan_network *cur_network = &(pmlmepriv->cur_network); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *cur_network = &pmlmepriv->cur_network; DBG_88E("%s\n", __func__); @@ -957,21 +964,21 @@ static void rtw_joinbss_update_network(struct adapter *padapter, struct wlan_net void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) { struct sta_info *ptarget_sta = NULL, *pcur_sta = NULL; - struct sta_priv *pstapriv = &adapter->stapriv; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct wlan_network *pnetwork = (struct wlan_network *)pbuf; - struct wlan_network *cur_network = &(pmlmepriv->cur_network); - struct wlan_network *pcur_wlan = NULL, *ptarget_wlan = NULL; - unsigned int the_same_macaddr = false; + struct sta_priv *pstapriv = &adapter->stapriv; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct wlan_network *pnetwork = (struct wlan_network *)pbuf; + struct wlan_network *cur_network = &pmlmepriv->cur_network; + struct wlan_network *pcur_wlan = NULL, *ptarget_wlan = NULL; + unsigned int the_same_macaddr = false; RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("joinbss event call back received with res=%d\n", pnetwork->join_res)); rtw_get_encrypt_decrypt_from_registrypriv(adapter); - if (pmlmepriv->assoc_ssid.SsidLength == 0) + if (pmlmepriv->assoc_ssid.ssid_length == 0) RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("@@@@@ joinbss event call back for Any SSid\n")); else - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("@@@@@ rtw_joinbss_event_callback for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("@@@@@ rtw_joinbss_event_callback for SSid:%s\n", pmlmepriv->assoc_ssid.ssid)); the_same_macaddr = !memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN); @@ -986,7 +993,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("\nrtw_joinbss_event_callback!! _enter_critical\n")); if (pnetwork->join_res > 0) { - spin_lock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_lock_bh(&pmlmepriv->scanned_queue.lock); if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) { /* s1. find ptarget_wlan */ if (check_fwstate(pmlmepriv, _FW_LINKED)) { @@ -999,20 +1006,20 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) pcur_sta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); if (pcur_sta) { - spin_lock_bh(&(pstapriv->sta_hash_lock)); + spin_lock_bh(&pstapriv->sta_hash_lock); rtw_free_stainfo(adapter, pcur_sta); spin_unlock_bh(&pstapriv->sta_hash_lock); } ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress); - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { if (ptarget_wlan) ptarget_wlan->fixed = true; } } } else { ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress); - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { if (ptarget_wlan) ptarget_wlan->fixed = true; } @@ -1028,7 +1035,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) } /* s3. find ptarget_sta & update ptarget_sta after update cur_network only for station mode */ - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { ptarget_sta = rtw_joinbss_update_stainfo(adapter, pnetwork); if (!ptarget_sta) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("Can't update stainfo when joinbss_event callback\n")); @@ -1038,7 +1045,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) } /* s4. indicate connect */ - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { rtw_indicate_connect(adapter); } else { /* adhoc mode will rtw_indicate_connect when rtw_stassoc_event_callback */ @@ -1063,7 +1070,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) mod_timer(&pmlmepriv->assoc_timer, jiffies + msecs_to_jiffies(1)); - if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == true) { + if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("fail! clear _FW_UNDER_LINKING ^^^fw_state=%x\n", get_fwstate(pmlmepriv))); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); } @@ -1079,7 +1086,7 @@ ignore_joinbss_callback: void rtw_joinbss_event_callback(struct adapter *adapter, u8 *pbuf) { - struct wlan_network *pnetwork = (struct wlan_network *)pbuf; + struct wlan_network *pnetwork = (struct wlan_network *)pbuf; mlmeext_joinbss_event_callback(adapter, pnetwork->join_res); @@ -1091,11 +1098,11 @@ static u8 search_max_mac_id(struct adapter *padapter) u8 mac_id; #if defined(CONFIG_88EU_AP_MODE) u8 aid; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_priv *pstapriv = &padapter->stapriv; #endif - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; #if defined(CONFIG_88EU_AP_MODE) if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { @@ -1133,10 +1140,10 @@ void rtw_stassoc_hw_rpt(struct adapter *adapter, struct sta_info *psta) void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf) { struct sta_info *psta; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct stassoc_event *pstassoc = (struct stassoc_event *)pbuf; - struct wlan_network *cur_network = &(pmlmepriv->cur_network); - struct wlan_network *ptarget_wlan = NULL; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct stassoc_event *pstassoc = (struct stassoc_event *)pbuf; + struct wlan_network *cur_network = &pmlmepriv->cur_network; + struct wlan_network *ptarget_wlan = NULL; if (!rtw_access_ctrl(adapter, pstassoc->macaddr)) return; @@ -1155,12 +1162,15 @@ void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf) psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); if (psta) { /* the sta have been in sta_info_queue => do nothing */ - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("Error: rtw_stassoc_event_callback: sta has been in sta_hash_queue\n")); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, + ("Error: %s: sta has been in sta_hash_queue\n", + __func__)); return; /* between drv has received this event before and fw have not yet to set key to CAM_ENTRY) */ } psta = rtw_alloc_stainfo(&adapter->stapriv, pstassoc->macaddr); if (!psta) { - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("Can't alloc sta_info when rtw_stassoc_event_callback\n")); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, + ("Can't alloc sta_info when %s\n", __func__)); return; } /* to do: init sta_info variable */ @@ -1177,7 +1187,7 @@ void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf) if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE))) { if (adapter->stapriv.asoc_sta_count == 2) { - spin_lock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_lock_bh(&pmlmepriv->scanned_queue.lock); ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); if (ptarget_wlan) ptarget_wlan->fixed = true; @@ -1197,10 +1207,10 @@ void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf) struct wlan_network *pwlan = NULL; struct wlan_bssid_ex *pdev_network = NULL; u8 *pibss = NULL; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct stadel_event *pstadel = (struct stadel_event *)pbuf; - struct sta_priv *pstapriv = &adapter->stapriv; - struct wlan_network *tgt_network = &(pmlmepriv->cur_network); + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct stadel_event *pstadel = (struct stadel_event *)pbuf; + struct sta_priv *pstapriv = &adapter->stapriv; + struct wlan_network *tgt_network = &pmlmepriv->cur_network; psta = rtw_get_stainfo(&adapter->stapriv, pstadel->macaddr); if (psta) @@ -1238,7 +1248,7 @@ void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf) rtw_free_assoc_resources(adapter); rtw_indicate_disconnect(adapter); - spin_lock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_lock_bh(&pmlmepriv->scanned_queue.lock); /* remove the network entry in scanned_queue */ pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); if (pwlan) { @@ -1250,12 +1260,12 @@ void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf) } if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { - spin_lock_bh(&(pstapriv->sta_hash_lock)); + spin_lock_bh(&pstapriv->sta_hash_lock); rtw_free_stainfo(adapter, psta); spin_unlock_bh(&pstapriv->sta_hash_lock); if (adapter->stapriv.asoc_sta_count == 1) { /* a sta + bc/mc_stainfo (not Ibss_stainfo) */ - spin_lock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_lock_bh(&pmlmepriv->scanned_queue.lock); /* free old ibss network */ pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); if (pwlan) { @@ -1264,12 +1274,12 @@ void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf) } spin_unlock_bh(&pmlmepriv->scanned_queue.lock); /* re-create ibss */ - pdev_network = &(adapter->registrypriv.dev_network); + pdev_network = &adapter->registrypriv.dev_network; pibss = adapter->registrypriv.dev_network.MacAddress; memcpy(pdev_network, &tgt_network->network, get_wlan_bssid_ex_sz(&tgt_network->network)); - memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid)); + memcpy(&pdev_network->ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid)); rtw_update_registrypriv_dev_network(adapter); @@ -1289,7 +1299,7 @@ void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf) void rtw_cpwm_event_callback(struct adapter *padapter, u8 *pbuf) { - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_cpwm_event_callback !!!\n")); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+%s !!!\n", __func__)); } /* @@ -1298,9 +1308,8 @@ void rtw_cpwm_event_callback(struct adapter *padapter, u8 *pbuf) */ void _rtw_join_timeout_handler (struct timer_list *t) { - struct adapter *adapter = - from_timer(adapter, t, mlmepriv.assoc_timer); - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct adapter *adapter = from_timer(adapter, t, mlmepriv.assoc_timer); + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; int do_join_r; DBG_88E("%s, fw_state=%x\n", __func__, get_fwstate(pmlmepriv)); @@ -1340,9 +1349,9 @@ void _rtw_join_timeout_handler (struct timer_list *t) */ void rtw_scan_timeout_handler (struct timer_list *t) { - struct adapter *adapter = - from_timer(adapter, t, mlmepriv.scan_to_timer); - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct adapter *adapter = from_timer(adapter, t, + mlmepriv.scan_to_timer); + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; DBG_88E(FUNC_ADPT_FMT" fw_state=%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv)); spin_lock_bh(&pmlmepriv->lock); @@ -1368,8 +1377,8 @@ static void rtw_auto_scan_handler(struct adapter *padapter) void rtw_dynamic_check_timer_handlder(struct timer_list *t) { - struct adapter *adapter = - from_timer(adapter, t, mlmepriv.dynamic_chk_timer); + struct adapter *adapter = from_timer(adapter, t, + mlmepriv.dynamic_chk_timer); struct registry_priv *pregistrypriv = &adapter->registrypriv; if (!adapter) @@ -1403,7 +1412,8 @@ static int rtw_check_join_candidate(struct mlme_priv *pmlmepriv { int updated = false; unsigned long since_scan; - struct adapter *adapter = container_of(pmlmepriv, struct adapter, mlmepriv); + struct adapter *adapter = container_of(pmlmepriv, struct adapter, + mlmepriv); /* check bssid, if needed */ if (pmlmepriv->assoc_by_bssid) { @@ -1412,9 +1422,9 @@ static int rtw_check_join_candidate(struct mlme_priv *pmlmepriv } /* check ssid, if needed */ - if (pmlmepriv->assoc_ssid.SsidLength) { - if (competitor->network.Ssid.SsidLength != pmlmepriv->assoc_ssid.SsidLength || - memcmp(competitor->network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) + if (pmlmepriv->assoc_ssid.ssid_length) { + if (competitor->network.ssid.ssid_length != pmlmepriv->assoc_ssid.ssid_length || + memcmp(competitor->network.ssid.ssid, pmlmepriv->assoc_ssid.ssid, pmlmepriv->assoc_ssid.ssid_length)) goto exit; } @@ -1435,8 +1445,8 @@ static int rtw_check_join_candidate(struct mlme_priv *pmlmepriv if (updated) { DBG_88E("[by_bssid:%u][assoc_ssid:%s]new candidate: %s(%pM rssi:%d\n", pmlmepriv->assoc_by_bssid, - pmlmepriv->assoc_ssid.Ssid, - (*candidate)->network.Ssid.Ssid, + pmlmepriv->assoc_ssid.ssid, + (*candidate)->network.ssid.ssid, (*candidate)->network.MacAddress, (int)(*candidate)->network.Rssi); DBG_88E("[to_roaming:%u]\n", pmlmepriv->to_roaming); @@ -1458,12 +1468,12 @@ int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv) int ret; struct list_head *phead; struct adapter *adapter; - struct __queue *queue = &(pmlmepriv->scanned_queue); - struct wlan_network *pnetwork = NULL; - struct wlan_network *candidate = NULL; - u8 supp_ant_div = false; + struct __queue *queue = &pmlmepriv->scanned_queue; + struct wlan_network *pnetwork = NULL; + struct wlan_network *candidate = NULL; + u8 supp_ant_div = false; - spin_lock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_lock_bh(&pmlmepriv->scanned_queue.lock); phead = get_list_head(queue); adapter = (struct adapter *)pmlmepriv->nic_hdl; pmlmepriv->pscanned = phead->next; @@ -1483,12 +1493,12 @@ int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv) goto exit; } else { DBG_88E("%s: candidate: %s(%pM ch:%u)\n", __func__, - candidate->network.Ssid.Ssid, candidate->network.MacAddress, + candidate->network.ssid.ssid, candidate->network.MacAddress, candidate->network.Configuration.DSConfig); } /* check for situation of _FW_LINKED */ - if (check_fwstate(pmlmepriv, _FW_LINKED) == true) { + if (check_fwstate(pmlmepriv, _FW_LINKED)) { DBG_88E("%s: _FW_LINKED while ask_for_joinbss!!!\n", __func__); rtw_disassoc_cmd(adapter, 0, true); @@ -1516,10 +1526,10 @@ exit: int rtw_set_auth(struct adapter *adapter, struct security_priv *psecuritypriv) { - struct cmd_obj *pcmd; - struct setauth_parm *psetauthparm; - struct cmd_priv *pcmdpriv = &(adapter->cmdpriv); - int res = _SUCCESS; + struct cmd_obj *pcmd; + struct setauth_parm *psetauthparm; + struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + int res = _SUCCESS; pcmd = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); if (!pcmd) { @@ -1550,12 +1560,12 @@ exit: int rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv, int keyid, u8 set_tx) { - u8 keylen; - struct cmd_obj *pcmd; - struct setkey_parm *psetkeyparm; - struct cmd_priv *pcmdpriv = &(adapter->cmdpriv); - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - int res = _SUCCESS; + u8 keylen; + struct cmd_obj *pcmd; + struct setkey_parm *psetkeyparm; + struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + int res = _SUCCESS; pcmd = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); if (!pcmd) @@ -1570,31 +1580,34 @@ int rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv, in if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { psetkeyparm->algorithm = (unsigned char)psecuritypriv->dot118021XGrpPrivacy; RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, - ("\n rtw_set_key: psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy=%d\n", - psetkeyparm->algorithm)); + ("\n %s: psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy=%d\n", + __func__, psetkeyparm->algorithm)); } else { psetkeyparm->algorithm = (u8)psecuritypriv->dot11PrivacyAlgrthm; RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, - ("\n rtw_set_key: psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm=%d\n", - psetkeyparm->algorithm)); + ("\n %s: psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm=%d\n", + __func__, psetkeyparm->algorithm)); } psetkeyparm->keyid = (u8)keyid;/* 0~3 */ psetkeyparm->set_tx = set_tx; pmlmepriv->key_mask |= BIT(psetkeyparm->keyid); - DBG_88E("==> rtw_set_key algorithm(%x), keyid(%x), key_mask(%x)\n", - psetkeyparm->algorithm, psetkeyparm->keyid, pmlmepriv->key_mask); + DBG_88E("==> %s algorithm(%x), keyid(%x), key_mask(%x)\n", + __func__, psetkeyparm->algorithm, psetkeyparm->keyid, + pmlmepriv->key_mask); RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, - ("\n rtw_set_key: psetkeyparm->algorithm=%d psetkeyparm->keyid=(u8)keyid=%d\n", - psetkeyparm->algorithm, keyid)); + ("\n %s: psetkeyparm->algorithm=%d psetkeyparm->keyid=(u8)keyid=%d\n", + __func__, psetkeyparm->algorithm, keyid)); switch (psetkeyparm->algorithm) { case _WEP40_: keylen = 5; - memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); + memcpy(&psetkeyparm->key[0], + &psecuritypriv->dot11DefKey[keyid].skey[0], keylen); break; case _WEP104_: keylen = 13; - memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); + memcpy(&psetkeyparm->key[0], + &psecuritypriv->dot11DefKey[keyid].skey[0], keylen); break; case _TKIP_: keylen = 16; @@ -1608,8 +1621,8 @@ int rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv, in break; default: RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, - ("\n rtw_set_key:psecuritypriv->dot11PrivacyAlgrthm=%x (must be 1 or 2 or 4 or 5)\n", - psecuritypriv->dot11PrivacyAlgrthm)); + ("\n %s:psecuritypriv->dot11PrivacyAlgrthm=%x (must be 1 or 2 or 4 or 5)\n", + __func__, psecuritypriv->dot11PrivacyAlgrthm)); res = _FAIL; goto err_free_parm; } @@ -1632,7 +1645,7 @@ err_free_cmd: /* adjust ies for rtw_joinbss_cmd in WMM */ int rtw_restruct_wmm_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len) { - unsigned int ielength = 0; + unsigned int ielength = 0; unsigned int i, j; /* i = 12; after the fixed IE */ @@ -1711,12 +1724,11 @@ static int rtw_append_pmkid(struct adapter *Adapter, int iEntry, u8 *ie, uint ie int rtw_restruct_sec_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len) { u8 authmode; - uint ielength; + uint ielength; int iEntry; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct security_priv *psecuritypriv = &adapter->securitypriv; - uint ndisauthmode = psecuritypriv->ndisauthtype; + uint ndisauthmode = psecuritypriv->ndisauthtype; uint ndissecuritytype = psecuritypriv->ndisencryptstatus; RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, @@ -1728,7 +1740,7 @@ int rtw_restruct_sec_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_ ielength = 12; if ((ndisauthmode == Ndis802_11AuthModeWPA) || (ndisauthmode == Ndis802_11AuthModeWPAPSK)) - authmode = _WPA_IE_ID_; + authmode = _WPA_IE_ID_; if ((ndisauthmode == Ndis802_11AuthModeWPA2) || (ndisauthmode == Ndis802_11AuthModeWPA2PSK)) authmode = _WPA2_IE_ID_; @@ -1745,12 +1757,9 @@ int rtw_restruct_sec_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_ } iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid); - if (iEntry < 0) { - return ielength; - } else { - if (authmode == _WPA2_IE_ID_) - ielength = rtw_append_pmkid(adapter, iEntry, out_ie, ielength); - } + if (iEntry >= 0 && authmode == _WPA2_IE_ID_) + ielength = rtw_append_pmkid(adapter, iEntry, out_ie, ielength); + return ielength; } @@ -1758,12 +1767,12 @@ void rtw_init_registrypriv_dev_network(struct adapter *adapter) { struct registry_priv *pregistrypriv = &adapter->registrypriv; struct eeprom_priv *peepriv = &adapter->eeprompriv; - struct wlan_bssid_ex *pdev_network = &pregistrypriv->dev_network; + struct wlan_bssid_ex *pdev_network = &pregistrypriv->dev_network; u8 *myhwaddr = myid(peepriv); memcpy(pdev_network->MacAddress, myhwaddr, ETH_ALEN); - memcpy(&pdev_network->Ssid, &pregistrypriv->ssid, sizeof(struct ndis_802_11_ssid)); + memcpy(&pdev_network->ssid, &pregistrypriv->ssid, sizeof(struct ndis_802_11_ssid)); pdev_network->Configuration.Length = sizeof(struct ndis_802_11_config); pdev_network->Configuration.BeaconPeriod = 100; @@ -1777,9 +1786,9 @@ void rtw_update_registrypriv_dev_network(struct adapter *adapter) { int sz = 0; struct registry_priv *pregistrypriv = &adapter->registrypriv; - struct wlan_bssid_ex *pdev_network = &pregistrypriv->dev_network; - struct security_priv *psecuritypriv = &adapter->securitypriv; - struct wlan_network *cur_network = &adapter->mlmepriv.cur_network; + struct wlan_bssid_ex *pdev_network = &pregistrypriv->dev_network; + struct security_priv *psecuritypriv = &adapter->securitypriv; + struct wlan_network *cur_network = &adapter->mlmepriv.cur_network; pdev_network->Privacy = psecuritypriv->dot11PrivacyAlgrthm > 0 ? 1 : 0; /* adhoc no 802.1x */ @@ -1829,9 +1838,9 @@ void rtw_get_encrypt_decrypt_from_registrypriv(struct adapter *adapter) /* the function is at passive_level */ void rtw_joinbss_reset(struct adapter *padapter) { - u8 threshold; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct ht_priv *phtpriv = &pmlmepriv->htpriv; + u8 threshold; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; /* todo: if you want to do something io/reg/hw setting before join_bss, please add code here */ pmlmepriv->num_FortyMHzIntolerant = 0; @@ -1861,9 +1870,9 @@ unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie, u8 *out_ enum ht_cap_ampdu_factor max_rx_ampdu_factor; unsigned char *p; unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct qos_priv *pqospriv = &pmlmepriv->qospriv; - struct ht_priv *phtpriv = &pmlmepriv->htpriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct qos_priv *pqospriv = &pmlmepriv->qospriv; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; u32 rx_packet_offset, max_recvbuf_sz; phtpriv->ht_option = false; @@ -1925,11 +1934,11 @@ unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie, u8 *out_ /* the function is > passive_level (in critical_section) */ void rtw_update_ht_cap(struct adapter *padapter, u8 *pie, uint ie_len) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct ht_priv *phtpriv = &pmlmepriv->htpriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; struct registry_priv *pregistrypriv = &padapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; if (!phtpriv->ht_option) return; @@ -1987,7 +1996,7 @@ void rtw_issue_addbareq_cmd(struct adapter *padapter, struct xmit_frame *pxmitfr u8 issued; int priority; struct sta_info *psta = NULL; - struct ht_priv *phtpriv; + struct ht_priv *phtpriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; if (is_multicast_ether_addr(pattrib->ra) || @@ -2020,7 +2029,7 @@ void rtw_issue_addbareq_cmd(struct adapter *padapter, struct xmit_frame *pxmitfr void rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; spin_lock_bh(&pmlmepriv->lock); _rtw_roaming(padapter, tgt_network); @@ -2029,9 +2038,8 @@ void rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network) void _rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; int do_join_r; - struct wlan_network *pnetwork; if (tgt_network) @@ -2041,9 +2049,9 @@ void _rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network) if (pmlmepriv->to_roaming > 0) { DBG_88E("roaming from %s(%pM length:%d\n", - pnetwork->network.Ssid.Ssid, pnetwork->network.MacAddress, - pnetwork->network.Ssid.SsidLength); - memcpy(&pmlmepriv->assoc_ssid, &pnetwork->network.Ssid, sizeof(struct ndis_802_11_ssid)); + pnetwork->network.ssid.ssid, pnetwork->network.MacAddress, + pnetwork->network.ssid.ssid_length); + memcpy(&pmlmepriv->assoc_ssid, &pnetwork->network.ssid, sizeof(struct ndis_802_11_ssid)); pmlmepriv->assoc_by_bssid = false; diff --git a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c index 6790b840aef8..8f28aefbe6f9 100644 --- a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c +++ b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c @@ -17,24 +17,20 @@ #include <mlme_osdep.h> #include <recv_osdep.h> -static u8 null_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; +static u8 null_addr[ETH_ALEN] = {}; /************************************************** OUI definitions for the vendor specific IE ***************************************************/ -unsigned char RTW_WPA_OUI[] = {0x00, 0x50, 0xf2, 0x01}; -unsigned char WMM_OUI[] = {0x00, 0x50, 0xf2, 0x02}; -unsigned char WPS_OUI[] = {0x00, 0x50, 0xf2, 0x04}; -unsigned char P2P_OUI[] = {0x50, 0x6F, 0x9A, 0x09}; -unsigned char WFD_OUI[] = {0x50, 0x6F, 0x9A, 0x0A}; +const u8 RTW_WPA_OUI[] = {0x00, 0x50, 0xf2, 0x01}; +const u8 WPS_OUI[] = {0x00, 0x50, 0xf2, 0x04}; +static const u8 WMM_OUI[] = {0x00, 0x50, 0xf2, 0x02}; +static const u8 P2P_OUI[] = {0x50, 0x6F, 0x9A, 0x09}; -unsigned char WMM_INFO_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; -unsigned char WMM_PARA_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; +static const u8 WMM_PARA_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; -unsigned char WPA_TKIP_CIPHER[4] = {0x00, 0x50, 0xf2, 0x02}; -unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02}; - -extern unsigned char REALTEK_96B_IE[]; +const u8 WPA_TKIP_CIPHER[4] = {0x00, 0x50, 0xf2, 0x02}; +const u8 RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02}; /******************************************************** MCS rate definitions @@ -56,7 +52,7 @@ static struct rt_channel_plan_2g RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = { {{}, 0}, /* 0x05, RT_CHANNEL_DOMAIN_2G_NULL */ }; -static struct rt_channel_plan_map RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { +static struct rt_channel_plan_map RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { /* 0x00 ~ 0x1F , Old Define ===== */ {0x02}, /* 0x00, RT_CHANNEL_DOMAIN_FCC */ {0x02}, /* 0x01, RT_CHANNEL_DOMAIN_IC */ @@ -154,8 +150,8 @@ int rtw_ch_set_search_ch(struct rt_channel_info *ch_set, const u32 ch) struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv) { - struct xmit_frame *pmgntframe; - struct xmit_buf *pxmitbuf; + struct xmit_frame *pmgntframe; + struct xmit_buf *pxmitbuf; pmgntframe = rtw_alloc_xmitframe(pxmitpriv); if (!pmgntframe) { @@ -184,7 +180,7 @@ Following are some TX functions for WiFi MLME void update_mgnt_tx_rate(struct adapter *padapter, u8 rate) { - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; pmlmeext->tx_rate = rate; DBG_88E("%s(): rate = %x\n", __func__, rate); @@ -192,7 +188,7 @@ void update_mgnt_tx_rate(struct adapter *padapter, u8 rate) void update_mgntframe_attrib(struct adapter *padapter, struct pkt_attrib *pattrib) { - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); @@ -259,7 +255,7 @@ static s32 dump_mgntframe_and_wait_ack(struct adapter *padapter, { s32 ret = _FAIL; u32 timeout_ms = 500;/* 500ms */ - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; if (padapter->bSurpriseRemoved || padapter->bDriverStopped) return -1; @@ -313,18 +309,18 @@ static int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) static void issue_beacon(struct adapter *padapter, int timeout_ms) { - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; - unsigned int rate_len; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); - u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + unsigned int rate_len; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; + u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (!pmgntframe) { @@ -333,7 +329,7 @@ static void issue_beacon(struct adapter *padapter, int timeout_ms) } #if defined(CONFIG_88EU_AP_MODE) spin_lock_bh(&pmlmepriv->bcn_update_lock); -#endif /* if defined (CONFIG_88EU_AP_MODE) */ +#endif /* update attribute */ pattrib = &pmgntframe->attrib; @@ -349,7 +345,7 @@ static void issue_beacon(struct adapter *padapter, int timeout_ms) *(fctrl) = 0; ether_addr_copy(pwlanhdr->addr1, bc_addr); - ether_addr_copy(pwlanhdr->addr2, myid(&(padapter->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, cur_network->MacAddress); SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); @@ -359,7 +355,7 @@ static void issue_beacon(struct adapter *padapter, int timeout_ms) pframe += sizeof(struct ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr); - if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { + if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { int len_diff; u8 *wps_ie; uint wps_ielen; @@ -406,14 +402,14 @@ static void issue_beacon(struct adapter *padapter, int timeout_ms) pattrib->pktlen += 2; /* SSID */ - pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); + pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->ssid.ssid_length, cur_network->ssid.ssid, &pattrib->pktlen); /* supported rates... */ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, min_t(unsigned int, rate_len, 8), cur_network->SupportedRates, &pattrib->pktlen); /* DS parameter set */ - pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); + pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&cur_network->Configuration.DSConfig, &pattrib->pktlen); { u8 erpinfo = 0; @@ -436,7 +432,7 @@ _issue_bcn: pmlmepriv->update_bcn = false; spin_unlock_bh(&pmlmepriv->bcn_update_lock); -#endif /* if defined (CONFIG_88EU_AP_MODE) */ +#endif if ((pattrib->pktlen + TXDESC_SIZE) > 512) { DBG_88E("beacon frame too large\n"); @@ -454,22 +450,22 @@ _issue_bcn: static void issue_probersp(struct adapter *padapter, unsigned char *da) { - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; - unsigned char *mac, *bssid; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + unsigned char *mac, *bssid; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; #if defined(CONFIG_88EU_AP_MODE) u8 *pwps_ie; uint wps_ielen; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -#endif /* if defined (CONFIG_88EU_AP_MODE) */ - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); - unsigned int rate_len; +#endif + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; + unsigned int rate_len; pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (!pmgntframe) { @@ -486,7 +482,7 @@ static void issue_probersp(struct adapter *padapter, unsigned char *da) pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct ieee80211_hdr *)pframe; - mac = myid(&(padapter->eeprompriv)); + mac = myid(&padapter->eeprompriv); bssid = cur_network->MacAddress; fctrl = &pwlanhdr->frame_control; @@ -507,7 +503,7 @@ static void issue_probersp(struct adapter *padapter, unsigned char *da) return; #if defined(CONFIG_88EU_AP_MODE) - if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { + if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { pwps_ie = rtw_get_wps_ie(cur_network->ies+_FIXED_IE_LENGTH_, cur_network->ie_length-_FIXED_IE_LENGTH_, NULL, &wps_ielen); /* inerset & update wps_probe_resp_ie */ @@ -566,16 +562,16 @@ static void issue_probersp(struct adapter *padapter, unsigned char *da) /* below for ad-hoc mode */ /* SSID */ - pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); + pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->ssid.ssid_length, cur_network->ssid.ssid, &pattrib->pktlen); /* supported rates... */ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, min_t(unsigned int, rate_len, 8), cur_network->SupportedRates, &pattrib->pktlen); /* DS parameter set */ - pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); + pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&cur_network->Configuration.DSConfig, &pattrib->pktlen); - if ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { + if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { u8 erpinfo = 0; u32 ATIMWindow; /* IBSS Parameter Set... */ @@ -603,18 +599,18 @@ static int issue_probereq(struct adapter *padapter, bool wait_ack) { int ret = _FAIL; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; - unsigned char *mac; - unsigned char bssrate[NumRates]; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - int bssrate_len = 0; - u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + unsigned char *mac; + unsigned char bssrate[NumRates]; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + int bssrate_len = 0; + u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+%s\n", __func__)); @@ -631,7 +627,7 @@ static int issue_probereq(struct adapter *padapter, pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; pwlanhdr = (struct ieee80211_hdr *)pframe; - mac = myid(&(padapter->eeprompriv)); + mac = myid(&padapter->eeprompriv); fctrl = &pwlanhdr->frame_control; *(fctrl) = 0; @@ -656,17 +652,17 @@ static int issue_probereq(struct adapter *padapter, pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr); if (pssid) - pframe = rtw_set_ie(pframe, _SSID_IE_, pssid->SsidLength, pssid->Ssid, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _SSID_IE_, pssid->ssid_length, pssid->ssid, &pattrib->pktlen); else - pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &pattrib->pktlen); get_rate_set(padapter, bssrate, &bssrate_len); if (bssrate_len > 8) { - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, bssrate, &(pattrib->pktlen)); - pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, bssrate, &pattrib->pktlen); + pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, bssrate_len - 8, bssrate + 8, &pattrib->pktlen); } else { - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, bssrate_len, bssrate, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, bssrate_len, bssrate, &pattrib->pktlen); } /* add wps_ie for wps2.0 */ @@ -749,10 +745,10 @@ static void issue_auth(struct adapter *padapter, struct sta_info *psta, __le16 le_val16; #endif int use_shared_key = 0; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (pmgntframe == NULL) @@ -782,9 +778,9 @@ static void issue_auth(struct adapter *padapter, struct sta_info *psta, ether_addr_copy(pwlanhdr->addr1, psta->hwaddr); ether_addr_copy(pwlanhdr->addr2, - myid(&(padapter->eeprompriv))); + myid(&padapter->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, - myid(&(padapter->eeprompriv))); + myid(&padapter->eeprompriv)); /* setting auth algo number */ val16 = (u16)psta->authalg; @@ -816,7 +812,7 @@ static void issue_auth(struct adapter *padapter, struct sta_info *psta, /* added challenging text... */ if ((psta->auth_seq == 2) && (psta->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) - pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, psta->chg_txt, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, psta->chg_txt, &pattrib->pktlen); #endif } else { __le32 le_tmp32; @@ -858,7 +854,7 @@ static void issue_auth(struct adapter *padapter, struct sta_info *psta, /* then checking to see if sending challenging text... */ if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) { - pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, pmlmeinfo->chg_txt, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, pmlmeinfo->chg_txt, &pattrib->pktlen); SetPrivacy(fctrl); @@ -883,17 +879,17 @@ static void issue_auth(struct adapter *padapter, struct sta_info *psta, static void issue_asocrsp(struct adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type) { - struct xmit_frame *pmgntframe; + struct xmit_frame *pmgntframe; struct ieee80211_hdr *pwlanhdr; struct pkt_attrib *pattrib; - unsigned char *pbuf, *pframe; + unsigned char *pbuf, *pframe; unsigned short val; __le16 *fctrl; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; u8 *ie = pnetwork->ies; __le16 lestatus, leval; @@ -917,7 +913,7 @@ static void issue_asocrsp(struct adapter *padapter, unsigned short status, ether_addr_copy((void *)GetAddr1Ptr(pwlanhdr), pstat->hwaddr); ether_addr_copy((void *)GetAddr2Ptr(pwlanhdr), - myid(&(padapter->eeprompriv))); + myid(&padapter->eeprompriv)); ether_addr_copy((void *)GetAddr3Ptr(pwlanhdr), pnetwork->MacAddress); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); @@ -944,10 +940,10 @@ static void issue_asocrsp(struct adapter *padapter, unsigned short status, pframe = rtw_set_fixed_ie(pframe, _ASOC_ID_, &leval, &pattrib->pktlen); if (pstat->bssratelen <= 8) { - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, pstat->bssratelen, pstat->bssrateset, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, pstat->bssratelen, pstat->bssrateset, &pattrib->pktlen); } else { - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pstat->bssrateset, &(pattrib->pktlen)); - pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (pstat->bssratelen-8), pstat->bssrateset+8, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pstat->bssrateset, &pattrib->pktlen); + pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, pstat->bssratelen-8, pstat->bssrateset+8, &pattrib->pktlen); } if ((pstat->flags & WLAN_STA_HT) && (pmlmepriv->htpriv.ht_option)) { @@ -990,7 +986,7 @@ static void issue_asocrsp(struct adapter *padapter, unsigned short status, } if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK) - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6, REALTEK_96B_IE, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6, REALTEK_96B_IE, &pattrib->pktlen); /* add WPS IE ie for wps 2.0 */ if (pmlmepriv->wps_assoc_resp_ie && pmlmepriv->wps_assoc_resp_ie_len > 0) { @@ -1008,21 +1004,21 @@ static void issue_asocrsp(struct adapter *padapter, unsigned short status, static void issue_assocreq(struct adapter *padapter) { int ret = _FAIL; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe, *p; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe, *p; struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; - unsigned int i, j, ie_len, index = 0; + unsigned int i, j, ie_len, index = 0; unsigned char bssrate[NumRates], sta_bssrate[NumRates]; struct ndis_802_11_var_ie *pIE; - struct registry_priv *pregpriv = &padapter->registrypriv; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - int bssrate_len = 0, sta_bssrate_len = 0; - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct registry_priv *pregpriv = &padapter->registrypriv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + int bssrate_len = 0, sta_bssrate_len = 0; + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (!pmgntframe) @@ -1039,7 +1035,7 @@ static void issue_assocreq(struct adapter *padapter) fctrl = &pwlanhdr->frame_control; *(fctrl) = 0; ether_addr_copy(pwlanhdr->addr1, pnetwork->MacAddress); - ether_addr_copy(pwlanhdr->addr2, myid(&(padapter->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, pnetwork->MacAddress); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); @@ -1063,7 +1059,7 @@ static void issue_assocreq(struct adapter *padapter) pattrib->pktlen += 2; /* SSID */ - pframe = rtw_set_ie(pframe, _SSID_IE_, pmlmeinfo->network.Ssid.SsidLength, pmlmeinfo->network.Ssid.Ssid, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _SSID_IE_, pmlmeinfo->network.ssid.ssid_length, pmlmeinfo->network.ssid.ssid, &pattrib->pktlen); /* supported rate & extended supported rate */ @@ -1110,16 +1106,16 @@ static void issue_assocreq(struct adapter *padapter) } if (bssrate_len > 8) { - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, bssrate, &(pattrib->pktlen)); - pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, bssrate, &pattrib->pktlen); + pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, bssrate_len - 8, bssrate + 8, &pattrib->pktlen); } else { - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, bssrate_len, bssrate, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, bssrate_len, bssrate, &pattrib->pktlen); } /* RSN */ p = rtw_get_ie((pmlmeinfo->network.ies + sizeof(struct ndis_802_11_fixed_ie)), _RSN_IE_2_, &ie_len, (pmlmeinfo->network.ie_length - sizeof(struct ndis_802_11_fixed_ie))); if (p) - pframe = rtw_set_ie(pframe, _RSN_IE_2_, ie_len, (p + 2), &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _RSN_IE_2_, ie_len, p + 2, &pattrib->pktlen); /* HT caps */ if (padapter->mlmepriv.htpriv.ht_option) { @@ -1139,7 +1135,7 @@ static void issue_assocreq(struct adapter *padapter) if (pregpriv->rx_stbc) pmlmeinfo->HT_caps.cap_info |= cpu_to_le16(0x0100);/* RX STBC One spatial stream */ memcpy((u8 *)&pmlmeinfo->HT_caps.mcs, MCS_rate_1R, 16); - pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ie_len, (u8 *)(&(pmlmeinfo->HT_caps)), &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ie_len, (u8 *)(&pmlmeinfo->HT_caps), &pattrib->pktlen); } } @@ -1159,7 +1155,7 @@ static void issue_assocreq(struct adapter *padapter) if (!memcmp(pIE->data, WPS_OUI, 4)) pIE->Length = 14; } - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, pIE->Length, pIE->data, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, pIE->Length, pIE->data, &pattrib->pktlen); } break; default: @@ -1168,7 +1164,7 @@ static void issue_assocreq(struct adapter *padapter) } if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK) - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6, REALTEK_96B_IE, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6, REALTEK_96B_IE, &pattrib->pktlen); pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); @@ -1187,23 +1183,23 @@ static int _issue_nulldata(struct adapter *padapter, unsigned char *da, unsigned int power_mode, bool wait_ack) { int ret = _FAIL; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; - struct xmit_priv *pxmitpriv; - struct mlme_ext_priv *pmlmeext; - struct mlme_ext_info *pmlmeinfo; - struct wlan_bssid_ex *pnetwork; + struct xmit_priv *pxmitpriv; + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; + struct wlan_bssid_ex *pnetwork; if (!padapter) goto exit; - pxmitpriv = &(padapter->xmitpriv); - pmlmeext = &(padapter->mlmeextpriv); - pmlmeinfo = &(pmlmeext->mlmext_info); - pnetwork = &(pmlmeinfo->network); + pxmitpriv = &padapter->xmitpriv; + pmlmeext = &padapter->mlmeextpriv; + pmlmeinfo = &pmlmeext->mlmext_info; + pnetwork = &pmlmeinfo->network; pmgntframe = alloc_mgtxmitframe(pxmitpriv); if (!pmgntframe) @@ -1222,16 +1218,16 @@ static int _issue_nulldata(struct adapter *padapter, unsigned char *da, fctrl = &pwlanhdr->frame_control; *(fctrl) = 0; - if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) + if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) SetFrDs(fctrl); - else if ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) + else if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) SetToDs(fctrl); if (power_mode) SetPwrMgt(fctrl); ether_addr_copy(pwlanhdr->addr1, da); - ether_addr_copy(pwlanhdr->addr2, myid(&(padapter->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, pnetwork->MacAddress); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); @@ -1262,9 +1258,9 @@ int issue_nulldata(struct adapter *padapter, unsigned char *da, int ret; int i = 0; unsigned long start = jiffies; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; /* da == NULL, assume it's null data for sta to ap*/ if (da == NULL) @@ -1308,16 +1304,16 @@ static int _issue_qos_nulldata(struct adapter *padapter, unsigned char *da, u16 tid, bool wait_ack) { int ret = _FAIL; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; unsigned short *qc; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; DBG_88E("%s\n", __func__); @@ -1343,9 +1339,9 @@ static int _issue_qos_nulldata(struct adapter *padapter, unsigned char *da, fctrl = &pwlanhdr->frame_control; *(fctrl) = 0; - if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) + if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) SetFrDs(fctrl); - else if ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) + else if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) SetToDs(fctrl); if (pattrib->mdata) @@ -1360,7 +1356,7 @@ static int _issue_qos_nulldata(struct adapter *padapter, unsigned char *da, SetAckpolicy(qc, pattrib->ack_policy); ether_addr_copy(pwlanhdr->addr1, da); - ether_addr_copy(pwlanhdr->addr2, myid(&(padapter->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, pnetwork->MacAddress); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); @@ -1391,9 +1387,9 @@ int issue_qos_nulldata(struct adapter *padapter, unsigned char *da, int ret; int i = 0; unsigned long start = jiffies; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; /* da == NULL, assume it's null data for sta to ap*/ if (da == NULL) @@ -1435,15 +1431,15 @@ exit: static int _issue_deauth(struct adapter *padapter, unsigned char *da, unsigned short reason, bool wait_ack) { - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; int ret = _FAIL; __le16 le_tmp; @@ -1465,7 +1461,7 @@ static int _issue_deauth(struct adapter *padapter, unsigned char *da, *(fctrl) = 0; ether_addr_copy(pwlanhdr->addr1, da); - ether_addr_copy(pwlanhdr->addr2, myid(&(padapter->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, pnetwork->MacAddress); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); @@ -1548,7 +1544,7 @@ static void issue_action_BA(struct adapter *padapter, unsigned char *raddr, u16 BA_para_set; u16 reason_code; u16 BA_timeout_value; - __le16 le_tmp; + __le16 le_tmp; u16 BA_starting_seqctrl = 0; enum ht_cap_ampdu_factor max_rx_ampdu_factor; struct xmit_frame *pmgntframe; @@ -1556,13 +1552,13 @@ static void issue_action_BA(struct adapter *padapter, unsigned char *raddr, u8 *pframe; struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; struct registry_priv *pregpriv = &padapter->registrypriv; - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; DBG_88E("%s, category=%d, action=%d, status=%d\n", __func__, category, action, status); @@ -1583,7 +1579,7 @@ static void issue_action_BA(struct adapter *padapter, unsigned char *raddr, *(fctrl) = 0; ether_addr_copy(pwlanhdr->addr1, raddr); - ether_addr_copy(pwlanhdr->addr2, myid(&(padapter->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, pnetwork->MacAddress); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); @@ -1593,8 +1589,8 @@ static void issue_action_BA(struct adapter *padapter, unsigned char *raddr, pframe += sizeof(struct ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr); - pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &category, &pattrib->pktlen); + pframe = rtw_set_fixed_ie(pframe, 1, &action, &pattrib->pktlen); if (category == 3) { switch (action) { @@ -1602,7 +1598,7 @@ static void issue_action_BA(struct adapter *padapter, unsigned char *raddr, do { pmlmeinfo->dialogToken++; } while (pmlmeinfo->dialogToken == 0); - pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &pmlmeinfo->dialogToken, &pattrib->pktlen); BA_para_set = 0x1002 | ((status & 0xf) << 2); /* immediate ack & 64 buffer size */ le_tmp = cpu_to_le16(BA_para_set); @@ -1616,7 +1612,7 @@ static void issue_action_BA(struct adapter *padapter, unsigned char *raddr, psta = rtw_get_stainfo(pstapriv, raddr); if (psta) { - start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07]&0xfff) + 1; + start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07] & 0xfff) + 1; DBG_88E("BA_starting_seqctrl=%d for TID=%d\n", start_seq, status & 0x07); @@ -1697,20 +1693,20 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter) { struct list_head *plist, *phead; unsigned char category, action; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - unsigned char *pframe; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + unsigned char *pframe; struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; - struct wlan_network *pnetwork = NULL; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct wlan_network *pnetwork = NULL; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct __queue *queue = &(pmlmepriv->scanned_queue); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct __queue *queue = &pmlmepriv->scanned_queue; u8 InfoContent[16] = {0}; u8 ICS[8][15]; - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; if ((pmlmepriv->num_FortyMHzIntolerant == 0) || (pmlmepriv->num_sta_no_ht == 0)) return; @@ -1740,7 +1736,7 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter) *(fctrl) = 0; ether_addr_copy(pwlanhdr->addr1, cur_network->MacAddress); - ether_addr_copy(pwlanhdr->addr2, myid(&(padapter->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, cur_network->MacAddress); SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); @@ -1750,8 +1746,8 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter) pframe += sizeof(struct ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr); - pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); - pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); + pframe = rtw_set_fixed_ie(pframe, 1, &category, &pattrib->pktlen); + pframe = rtw_set_fixed_ie(pframe, 1, &action, &pattrib->pktlen); /* */ if (pmlmepriv->num_FortyMHzIntolerant > 0) { @@ -1759,7 +1755,7 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter) iedata |= BIT(2);/* 20 MHz BSS Width Request */ - pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &pattrib->pktlen); } /* */ @@ -1767,7 +1763,7 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter) if (pmlmepriv->num_sta_no_ht > 0) { int i; - spin_lock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_lock_bh(&pmlmepriv->scanned_queue.lock); phead = get_list_head(queue); plist = phead->next; @@ -1814,7 +1810,7 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter) } } - pframe = rtw_set_ie(pframe, EID_BSSIntolerantChlReport, k, InfoContent, &(pattrib->pktlen)); + pframe = rtw_set_ie(pframe, EID_BSSIntolerantChlReport, k, InfoContent, &pattrib->pktlen); } } } @@ -1828,12 +1824,11 @@ unsigned int send_delba(struct adapter *padapter, u8 initiator, u8 *addr) { struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta = NULL; - /* struct recv_reorder_ctrl *preorder_ctrl; */ - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u16 tid; - if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) + if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) return _SUCCESS; @@ -1845,7 +1840,7 @@ unsigned int send_delba(struct adapter *padapter, u8 initiator, u8 *addr) for (tid = 0; tid < MAXTID; tid++) { if (psta->recvreorder_ctrl[tid].enable) { DBG_88E("rx agg disable tid(%d)\n", tid); - issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid << 1) | initiator)&0x1F)); + issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid << 1) | initiator) & 0x1F)); psta->recvreorder_ctrl[tid].enable = false; psta->recvreorder_ctrl[tid].indicate_seq = 0xffff; } @@ -1854,7 +1849,7 @@ unsigned int send_delba(struct adapter *padapter, u8 initiator, u8 *addr) for (tid = 0; tid < MAXTID; tid++) { if (psta->htpriv.agg_enable_bitmap & BIT(tid)) { DBG_88E("tx agg disable tid(%d)\n", tid); - issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid << 1) | initiator)&0x1F)); + issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid << 1) | initiator) & 0x1F)); psta->htpriv.agg_enable_bitmap &= ~BIT(tid); psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); } @@ -1867,9 +1862,8 @@ unsigned int send_delba(struct adapter *padapter, u8 initiator, u8 *addr) unsigned int send_beacon(struct adapter *padapter) { u8 bxmitok = false; - int issue = 0; + int issue = 0; int poll = 0; - unsigned long start = jiffies; rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); @@ -1908,10 +1902,10 @@ Following are some utility functions for WiFi MLME static void site_survey(struct adapter *padapter) { - unsigned char survey_channel = 0, val8; + unsigned char survey_channel = 0, val8; enum rt_scan_type ScanType = SCAN_PASSIVE; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u32 initialgain = 0; struct rtw_ieee80211_channel *ch; @@ -1935,7 +1929,7 @@ static void site_survey(struct adapter *padapter) int i; for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) { - if (pmlmeext->sitesurvey_res.ssid[i].SsidLength) { + if (pmlmeext->sitesurvey_res.ssid[i].ssid_length) { /* todo: to issue two probe req??? */ issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), @@ -2016,16 +2010,16 @@ static u8 collect_bss_info(struct adapter *padapter, struct recv_frame *precv_frame, struct wlan_bssid_ex *bssid) { - int i; - u32 len; + int i; + u32 len; u8 *p; u16 val16, subtype; u8 *pframe = precv_frame->pkt->data; u32 packet_len = precv_frame->pkt->len; u8 ie_offset; - struct registry_priv *pregistrypriv = &padapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct registry_priv *pregistrypriv = &padapter->registrypriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; len = packet_len - sizeof(struct ieee80211_hdr_3addr); @@ -2077,10 +2071,10 @@ static u8 collect_bss_info(struct adapter *padapter, DBG_88E("%s()-%d: IE too long (%d) for survey event\n", __func__, __LINE__, len); return _FAIL; } - memcpy(bssid->Ssid.Ssid, (p + 2), len); - bssid->Ssid.SsidLength = len; + memcpy(bssid->ssid.ssid, (p + 2), len); + bssid->ssid.ssid_length = len; } else { - bssid->Ssid.SsidLength = 0; + bssid->ssid.ssid_length = 0; } memset(bssid->SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX); @@ -2184,12 +2178,12 @@ static u8 collect_bss_info(struct adapter *padapter, static void start_create_ibss(struct adapter *padapter) { - unsigned short caps; + unsigned short caps; u8 val8; u8 join_type; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&(pmlmeinfo->network)); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network); pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); @@ -2200,7 +2194,7 @@ static void start_create_ibss(struct adapter *padapter) /* update capability */ caps = rtw_get_capability((struct wlan_bssid_ex *)pnetwork); update_capinfo(padapter, caps); - if (caps&cap_IBSS) {/* adhoc master */ + if (caps & cap_IBSS) {/* adhoc master */ val8 = 0xcf; rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); @@ -2236,11 +2230,11 @@ static void start_create_ibss(struct adapter *padapter) static void start_clnt_join(struct adapter *padapter) { - unsigned short caps; + unsigned short caps; u8 val8; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&(pmlmeinfo->network)); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network); int beacon_timeout; pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; @@ -2252,7 +2246,7 @@ static void start_clnt_join(struct adapter *padapter) /* update capability */ caps = rtw_get_capability((struct wlan_bssid_ex *)pnetwork); update_capinfo(padapter, caps); - if (caps&cap_ESS) { + if (caps & cap_ESS) { Set_MSR(padapter, WIFI_FW_STATION_STATE); val8 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) ? 0xcc : 0xcf; @@ -2270,7 +2264,7 @@ static void start_clnt_join(struct adapter *padapter) msecs_to_jiffies((REAUTH_TO * REAUTH_LIMIT) + (REASSOC_TO * REASSOC_LIMIT) + beacon_timeout)); pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE; - } else if (caps&cap_IBSS) { /* adhoc client */ + } else if (caps & cap_IBSS) { /* adhoc client */ Set_MSR(padapter, WIFI_FW_ADHOC_STATE); val8 = 0xcf; @@ -2291,8 +2285,8 @@ static void start_clnt_join(struct adapter *padapter) static void start_clnt_auth(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; del_timer_sync(&pmlmeext->link_timer); @@ -2310,7 +2304,7 @@ static void start_clnt_auth(struct adapter *padapter) /* issue deauth before issuing auth to deal with the situation */ /* Commented by Albert 2012/07/21 */ /* For the Win8 P2P connection, it will be hard to have a successful connection if this Wi-Fi doesn't connect to it. */ - issue_deauth(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_DEAUTH_LEAVING); + issue_deauth(padapter, (&pmlmeinfo->network)->MacAddress, WLAN_REASON_DEAUTH_LEAVING); DBG_88E_LEVEL(_drv_info_, "start auth\n"); issue_auth(padapter, NULL, 0); @@ -2320,8 +2314,8 @@ static void start_clnt_auth(struct adapter *padapter) static void start_clnt_assoc(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; del_timer_sync(&pmlmeext->link_timer); @@ -2337,9 +2331,9 @@ static unsigned int receive_disconnect(struct adapter *padapter, unsigned char *MacAddr, unsigned short reason) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; /* check A3 */ if (memcmp(MacAddr, pnetwork->MacAddress, ETH_ALEN)) @@ -2347,7 +2341,7 @@ static unsigned int receive_disconnect(struct adapter *padapter, DBG_88E("%s\n", __func__); - if ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) { + if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { pmlmeinfo->state = WIFI_FW_NULL_STATE; report_del_sta_event(padapter, MacAddr, reason); @@ -2511,12 +2505,12 @@ Following are the callback functions for each subtype of the management frames static unsigned int OnProbeReq(struct adapter *padapter, struct recv_frame *precv_frame) { - unsigned int ielen; - unsigned char *p; + unsigned int ielen; + unsigned char *p; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur = &(pmlmeinfo->network); + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur = &pmlmeinfo->network; u8 *pframe = precv_frame->pkt->data; uint len = precv_frame->pkt->len; @@ -2532,7 +2526,7 @@ static unsigned int OnProbeReq(struct adapter *padapter, /* check (wildcard) SSID */ if (p) { - if ((ielen != 0 && memcmp((void *)(p+2), (void *)cur->Ssid.Ssid, cur->Ssid.SsidLength)) || + if ((ielen != 0 && memcmp((void *)(p+2), (void *)cur->ssid.ssid, cur->ssid.ssid_length)) || (ielen == 0 && pmlmeinfo->hidden_ssid_mode)) return _SUCCESS; @@ -2546,7 +2540,7 @@ static unsigned int OnProbeReq(struct adapter *padapter, static unsigned int OnProbeRsp(struct adapter *padapter, struct recv_frame *precv_frame) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { report_survey_event(padapter, precv_frame); @@ -2560,16 +2554,16 @@ static unsigned int OnBeacon(struct adapter *padapter, struct recv_frame *precv_frame) { int cam_idx; - struct sta_info *psta; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct sta_info *psta; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct sta_priv *pstapriv = &padapter->stapriv; + struct sta_priv *pstapriv = &padapter->stapriv; u8 *pframe = precv_frame->pkt->data; uint len = precv_frame->pkt->len; struct wlan_bssid_ex *pbss; int ret = _SUCCESS; - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { report_survey_event(padapter, precv_frame); @@ -2582,8 +2576,8 @@ static unsigned int OnBeacon(struct adapter *padapter, pbss = (struct wlan_bssid_ex *)rtw_malloc(sizeof(struct wlan_bssid_ex)); if (pbss) { if (collect_bss_info(padapter, precv_frame, pbss) == _SUCCESS) { - update_network(&(pmlmepriv->cur_network.network), pbss, padapter, true); - rtw_get_bcn_info(&(pmlmepriv->cur_network)); + update_network(&pmlmepriv->cur_network.network, pbss, padapter, true); + rtw_get_bcn_info(&pmlmepriv->cur_network); } kfree(pbss); } @@ -2600,7 +2594,7 @@ static unsigned int OnBeacon(struct adapter *padapter, return _SUCCESS; } - if (((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) && (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { + if (((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) && (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); if (psta != NULL) { ret = rtw_check_bcn_info(padapter, pframe, len); @@ -2614,7 +2608,7 @@ static unsigned int OnBeacon(struct adapter *padapter, if ((sta_rx_pkts(psta) & 0xf) == 0) update_beacon_info(padapter, pframe, len, psta); } - } else if ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { + } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); if (psta != NULL) { /* update WMM, ERP in the beacon */ @@ -2651,21 +2645,21 @@ _END_ONBEACON_: static unsigned int OnAuth(struct adapter *padapter, struct recv_frame *precv_frame) { - unsigned int auth_mode, ie_len; + unsigned int auth_mode, ie_len; u16 seq; - unsigned char *sa, *p; + unsigned char *sa, *p; u16 algorithm; - int status; + int status; static struct sta_info stat; - struct sta_info *pstat = NULL; - struct sta_priv *pstapriv = &padapter->stapriv; + struct sta_info *pstat = NULL; + struct sta_priv *pstapriv = &padapter->stapriv; struct security_priv *psecuritypriv = &padapter->securitypriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 *pframe = precv_frame->pkt->data; uint len = precv_frame->pkt->len; - if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) + if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) return _FAIL; DBG_88E("+%s\n", __func__); @@ -2820,18 +2814,18 @@ auth_fail: static unsigned int OnAuthClient(struct adapter *padapter, struct recv_frame *precv_frame) { - unsigned int seq, len, status, offset; - unsigned char *p; - unsigned int go2asoc = 0; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + unsigned int seq, len, status, offset; + unsigned char *p; + unsigned int go2asoc = 0; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 *pframe = precv_frame->pkt->data; uint pkt_len = precv_frame->pkt->len; DBG_88E("%s\n", __func__); /* check A1 matches or not */ - if (memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) + if (memcmp(myid(&padapter->eeprompriv), get_da(pframe), ETH_ALEN)) return _SUCCESS; if (!(pmlmeinfo->state & WIFI_FW_AUTH_STATE)) @@ -2899,24 +2893,24 @@ static unsigned int OnAssocReq(struct adapter *padapter, #ifdef CONFIG_88EU_AP_MODE u16 capab_info; struct rtw_ieee802_11_elems elems; - struct sta_info *pstat; - unsigned char reassoc, *p, *pos, *wpa_ie; + struct sta_info *pstat; + unsigned char reassoc, *p, *pos, *wpa_ie; unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; - int i, wpa_ie_len, left; - unsigned char supportRate[16]; - int supportRateNum; - unsigned short status = _STATS_SUCCESSFUL_; - unsigned short frame_type, ie_offset = 0; + int i, wpa_ie_len, left; + unsigned char supportRate[16]; + int supportRateNum; + unsigned short status = _STATS_SUCCESSFUL_; + unsigned short frame_type, ie_offset = 0; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur = &(pmlmeinfo->network); + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur = &pmlmeinfo->network; struct sta_priv *pstapriv = &padapter->stapriv; u8 *pframe = precv_frame->pkt->data; uint ie_len, pkt_len = precv_frame->pkt->len; - if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) + if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) return _FAIL; frame_type = GetFrameSubType(pframe); @@ -2981,10 +2975,10 @@ static unsigned int OnAssocReq(struct adapter *padapter, goto OnAssocReqFail; } else { /* check if ssid match */ - if (memcmp((void *)(p+2), cur->Ssid.Ssid, cur->Ssid.SsidLength)) + if (memcmp((void *)(p+2), cur->ssid.ssid, cur->ssid.ssid_length)) status = _STATS_FAILURE_; - if (ie_len != cur->Ssid.SsidLength) + if (ie_len != cur->ssid.ssid_length) status = _STATS_FAILURE_; } @@ -3041,8 +3035,8 @@ static unsigned int OnAssocReq(struct adapter *padapter, pstat->dot8021xalg = 1;/* psk, todo:802.1x */ pstat->wpa_psk |= BIT(1); - pstat->wpa2_group_cipher = group_cipher&psecuritypriv->wpa2_group_cipher; - pstat->wpa2_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa2_pairwise_cipher; + pstat->wpa2_group_cipher = group_cipher & psecuritypriv->wpa2_group_cipher; + pstat->wpa2_pairwise_cipher = pairwise_cipher & psecuritypriv->wpa2_pairwise_cipher; if (!pstat->wpa2_group_cipher) status = WLAN_STATUS_INVALID_GROUP_CIPHER; @@ -3062,8 +3056,8 @@ static unsigned int OnAssocReq(struct adapter *padapter, pstat->dot8021xalg = 1;/* psk, todo:802.1x */ pstat->wpa_psk |= BIT(0); - pstat->wpa_group_cipher = group_cipher&psecuritypriv->wpa_group_cipher; - pstat->wpa_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa_pairwise_cipher; + pstat->wpa_group_cipher = group_cipher & psecuritypriv->wpa_group_cipher; + pstat->wpa_pairwise_cipher = pairwise_cipher & psecuritypriv->wpa_pairwise_cipher; if (!pstat->wpa_group_cipher) status = WLAN_STATUS_INVALID_GROUP_CIPHER; @@ -3159,30 +3153,30 @@ static unsigned int OnAssocReq(struct adapter *padapter, pstat->qos_option = 1; pstat->qos_info = *(p+8); - pstat->max_sp_len = (pstat->qos_info>>5)&0x3; + pstat->max_sp_len = (pstat->qos_info>>5) & 0x3; - if ((pstat->qos_info&0xf) != 0xf) + if ((pstat->qos_info & 0xf) != 0xf) pstat->has_legacy_ac = true; else pstat->has_legacy_ac = false; - if (pstat->qos_info&0xf) { - if (pstat->qos_info&BIT(0)) + if (pstat->qos_info & 0xf) { + if (pstat->qos_info & BIT(0)) pstat->uapsd_vo = BIT(0)|BIT(1); else pstat->uapsd_vo = 0; - if (pstat->qos_info&BIT(1)) + if (pstat->qos_info & BIT(1)) pstat->uapsd_vi = BIT(0)|BIT(1); else pstat->uapsd_vi = 0; - if (pstat->qos_info&BIT(2)) + if (pstat->qos_info & BIT(2)) pstat->uapsd_bk = BIT(0)|BIT(1); else pstat->uapsd_bk = 0; - if (pstat->qos_info&BIT(3)) + if (pstat->qos_info & BIT(3)) pstat->uapsd_be = BIT(0)|BIT(1); else pstat->uapsd_be = 0; @@ -3209,14 +3203,14 @@ static unsigned int OnAssocReq(struct adapter *padapter, } else { pstat->flags &= ~WLAN_STA_HT; } - if ((!pmlmepriv->htpriv.ht_option) && (pstat->flags&WLAN_STA_HT)) { + if ((!pmlmepriv->htpriv.ht_option) && (pstat->flags & WLAN_STA_HT)) { status = _STATS_FAILURE_; goto OnAssocReqFail; } if ((pstat->flags & WLAN_STA_HT) && - ((pstat->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || - (pstat->wpa_pairwise_cipher&WPA_CIPHER_TKIP))) { + ((pstat->wpa2_pairwise_cipher & WPA_CIPHER_TKIP) || + (pstat->wpa_pairwise_cipher & WPA_CIPHER_TKIP))) { DBG_88E("HT: %pM tried to " "use TKIP with HT association\n", pstat->hwaddr); @@ -3333,19 +3327,18 @@ static unsigned int OnAssocRsp(struct adapter *padapter, { uint i; int res; - unsigned short status; + unsigned short status; struct ndis_802_11_var_ie *pIE; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - /* struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); */ + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 *pframe = precv_frame->pkt->data; uint pkt_len = precv_frame->pkt->len; DBG_88E("%s\n", __func__); /* check A1 matches or not */ - if (memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) + if (memcmp(myid(&padapter->eeprompriv), get_da(pframe), ETH_ALEN)) return _SUCCESS; if (!(pmlmeinfo->state & (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE))) @@ -3372,7 +3365,7 @@ static unsigned int OnAssocRsp(struct adapter *padapter, pmlmeinfo->slotTime = (pmlmeinfo->capability & BIT(10)) ? 9 : 20; /* AID */ - pmlmeinfo->aid = (int)(le16_to_cpu(*(__le16 *)(pframe + WLAN_HDR_A3_LEN + 4))&0x3fff); + pmlmeinfo->aid = (int)(le16_to_cpu(*(__le16 *)(pframe + WLAN_HDR_A3_LEN + 4)) & 0x3fff); res = pmlmeinfo->aid; /* following are moved to join event callback function */ @@ -3420,12 +3413,12 @@ report_assoc_result: static unsigned int OnDeAuth(struct adapter *padapter, struct recv_frame *precv_frame) { - unsigned short reason; + unsigned short reason; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 *pframe = precv_frame->pkt->data; - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; /* check A3 */ if (memcmp(GetAddr3Ptr(pframe), pnetwork->MacAddress, ETH_ALEN)) @@ -3476,10 +3469,10 @@ static unsigned int OnDisassoc(struct adapter *padapter, { u16 reason; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 *pframe = precv_frame->pkt->data; - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; /* check A3 */ if (memcmp(GetAddr3Ptr(pframe), pnetwork->MacAddress, ETH_ALEN)) @@ -3588,21 +3581,22 @@ static unsigned int OnAction_back(struct adapter *padapter, u8 *addr; struct sta_info *psta = NULL; struct recv_reorder_ctrl *preorder_ctrl; - unsigned char *frame_body; - unsigned char category, action; - unsigned short tid, status, reason_code = 0; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + unsigned char *frame_body; + unsigned char category, action; + unsigned short tid, status, reason_code = 0; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 *pframe = precv_frame->pkt->data; struct sta_priv *pstapriv = &padapter->stapriv; + /* check RA matches or not */ - if (memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), + if (memcmp(myid(&padapter->eeprompriv), GetAddr1Ptr(pframe), ETH_ALEN))/* for if1, sta/ap mode */ return _SUCCESS; DBG_88E("%s\n", __func__); - if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) + if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE) if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) return _SUCCESS; @@ -3622,8 +3616,8 @@ static unsigned int OnAction_back(struct adapter *padapter, DBG_88E("%s, action=%d\n", __func__, action); switch (action) { case RTW_WLAN_ACTION_ADDBA_REQ: /* ADDBA request */ - memcpy(&(pmlmeinfo->ADDBA_req), &(frame_body[2]), sizeof(struct ADDBA_request)); - process_addba_req(padapter, (u8 *)&(pmlmeinfo->ADDBA_req), addr); + memcpy(&pmlmeinfo->ADDBA_req, &frame_body[2], sizeof(struct ADDBA_request)); + process_addba_req(padapter, (u8 *)&pmlmeinfo->ADDBA_req, addr); /* 37 = reject ADDBA Req */ issue_action_BA(padapter, addr, @@ -3665,9 +3659,9 @@ static unsigned int OnAction_back(struct adapter *padapter, static s32 rtw_action_public_decache(struct recv_frame *recv_frame, s32 token) { struct adapter *adapter = recv_frame->adapter; - struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); + struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; u8 *frame = recv_frame->pkt->data; - u16 seq_ctrl = ((recv_frame->attrib.seq_num&0xffff) << 4) | + u16 seq_ctrl = ((recv_frame->attrib.seq_num & 0xffff) << 4) | (recv_frame->attrib.frag_num & 0xf); if (GetRetry(frame)) { @@ -3749,7 +3743,7 @@ static unsigned int on_action_public(struct adapter *padapter, u8 category, action; /* check RA matches or not */ - if (memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN)) + if (memcmp(myid(&padapter->eeprompriv), GetAddr1Ptr(pframe), ETH_ALEN)) goto exit; category = frame_body[0]; @@ -3812,9 +3806,9 @@ static unsigned int OnAction(struct adapter *padapter, struct recv_frame *precv_frame) { int i; - unsigned char category; + unsigned char category; struct action_handler *ptable; - unsigned char *frame_body; + unsigned char *frame_body; u8 *pframe = precv_frame->pkt->data; frame_body = (unsigned char *)(pframe + sizeof(struct ieee80211_hdr_3addr)); @@ -3854,7 +3848,7 @@ static struct mlme_handler mlme_sta_tbl[] = { int init_hw_mlme_ext(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); return _SUCCESS; @@ -3862,14 +3856,14 @@ int init_hw_mlme_ext(struct adapter *padapter) static void init_mlme_ext_priv_value(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - unsigned char mixed_datarate[NumRates] = { + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + unsigned char mixed_datarate[NumRates] = { _1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, - _48M_RATE_, _54M_RATE_, 0xff + _48M_RATE_, _54M_RATE_, 0xff }; - unsigned char mixed_basicrate[NumRates] = { + unsigned char mixed_basicrate[NumRates] = { _1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _12M_RATE_, _24M_RATE_, 0xff, }; @@ -4025,12 +4019,12 @@ static u8 init_channel_set(struct adapter *padapter, u8 ChannelPlan, return chanset_size; } -int init_mlme_ext_priv(struct adapter *padapter) +int init_mlme_ext_priv(struct adapter *padapter) { struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; pmlmeext->padapter = padapter; @@ -4089,7 +4083,7 @@ void mgt_dispatcher(struct adapter *padapter, struct recv_frame *precv_frame) struct mlme_handler *ptable; #ifdef CONFIG_88EU_AP_MODE struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -#endif /* CONFIG_88EU_AP_MODE */ +#endif u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; u8 *pframe = precv_frame->pkt->data; struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, GetAddr2Ptr(pframe)); @@ -4170,7 +4164,7 @@ void report_survey_event(struct adapter *padapter, struct cmd_obj *pcmd_obj; u8 *pevtcmd; u32 cmdsz; - struct survey_event *psurvey_evt; + struct survey_event *psurvey_evt; struct C2HEvent_Header *pc2h_evt_hdr; struct mlme_ext_priv *pmlmeext; struct cmd_priv *pcmdpriv; @@ -4227,8 +4221,8 @@ void report_surveydone_event(struct adapter *padapter) u8 *pevtcmd; u32 cmdsz; struct surveydone_event *psurveydone_evt; - struct C2HEvent_Header *pc2h_evt_hdr; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct C2HEvent_Header *pc2h_evt_hdr; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); @@ -4269,10 +4263,10 @@ void report_join_res(struct adapter *padapter, int res) struct cmd_obj *pcmd_obj; u8 *pevtcmd; u32 cmdsz; - struct joinbss_event *pjoinbss_evt; - struct C2HEvent_Header *pc2h_evt_hdr; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct joinbss_event *pjoinbss_evt; + struct C2HEvent_Header *pc2h_evt_hdr; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); @@ -4301,7 +4295,7 @@ void report_join_res(struct adapter *padapter, int res) pc2h_evt_hdr->seq = atomic_inc_return(&pmlmeext->event_seq); pjoinbss_evt = (struct joinbss_event *)(pevtcmd + sizeof(struct C2HEvent_Header)); - memcpy((unsigned char *)(&(pjoinbss_evt->network.network)), &(pmlmeinfo->network), sizeof(struct wlan_bssid_ex)); + memcpy((unsigned char *)(&pjoinbss_evt->network.network), &pmlmeinfo->network, sizeof(struct wlan_bssid_ex)); pjoinbss_evt->network.join_res = res; pjoinbss_evt->network.aid = res; @@ -4319,10 +4313,10 @@ void report_del_sta_event(struct adapter *padapter, unsigned char *MacAddr, u8 *pevtcmd; u32 cmdsz; struct sta_info *psta; - int mac_id; - struct stadel_event *pdel_sta_evt; - struct C2HEvent_Header *pc2h_evt_hdr; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + int mac_id; + struct stadel_event *pdel_sta_evt; + struct C2HEvent_Header *pc2h_evt_hdr; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); @@ -4351,7 +4345,7 @@ void report_del_sta_event(struct adapter *padapter, unsigned char *MacAddr, pc2h_evt_hdr->seq = atomic_inc_return(&pmlmeext->event_seq); pdel_sta_evt = (struct stadel_event *)(pevtcmd + sizeof(struct C2HEvent_Header)); - ether_addr_copy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr); + ether_addr_copy((unsigned char *)(&pdel_sta_evt->macaddr), MacAddr); memcpy((unsigned char *)(pdel_sta_evt->rsvd), (unsigned char *)(&reason), 2); psta = rtw_get_stainfo(&padapter->stapriv, MacAddr); @@ -4373,9 +4367,9 @@ void report_add_sta_event(struct adapter *padapter, unsigned char *MacAddr, struct cmd_obj *pcmd_obj; u8 *pevtcmd; u32 cmdsz; - struct stassoc_event *padd_sta_evt; - struct C2HEvent_Header *pc2h_evt_hdr; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct stassoc_event *padd_sta_evt; + struct C2HEvent_Header *pc2h_evt_hdr; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); @@ -4404,7 +4398,7 @@ void report_add_sta_event(struct adapter *padapter, unsigned char *MacAddr, pc2h_evt_hdr->seq = atomic_inc_return(&pmlmeext->event_seq); padd_sta_evt = (struct stassoc_event *)(pevtcmd + sizeof(struct C2HEvent_Header)); - ether_addr_copy((unsigned char *)(&(padd_sta_evt->macaddr)), MacAddr); + ether_addr_copy((unsigned char *)(&padd_sta_evt->macaddr), MacAddr); padd_sta_evt->cam_id = cam_idx; DBG_88E("%s: add STA\n", __func__); @@ -4421,9 +4415,9 @@ Following are the event callback functions /* for sta/adhoc mode */ void update_sta_info(struct adapter *padapter, struct sta_info *psta) { - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; /* ERP */ VCS_update(padapter, psta); @@ -4461,11 +4455,11 @@ void update_sta_info(struct adapter *padapter, struct sta_info *psta) void mlmeext_joinbss_event_callback(struct adapter *padapter, int join_res) { - struct sta_info *psta, *psta_bmc; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); - struct sta_priv *pstapriv = &padapter->stapriv; + struct sta_info *psta, *psta_bmc; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; + struct sta_priv *pstapriv = &padapter->stapriv; u8 join_type; u16 media_status; @@ -4480,7 +4474,7 @@ void mlmeext_joinbss_event_callback(struct adapter *padapter, int join_res) goto exit_mlmeext_joinbss_event_callback; } - if ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { + if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { /* for bc/mc */ psta_bmc = rtw_get_bcmc_stainfo(padapter); if (psta_bmc) { @@ -4528,7 +4522,7 @@ void mlmeext_joinbss_event_callback(struct adapter *padapter, int join_res) join_type = 2; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); - if ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) { + if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { /* correcting TSF */ correct_TSF(padapter, pmlmeext); } @@ -4541,13 +4535,13 @@ exit_mlmeext_joinbss_event_callback: void mlmeext_sta_add_event_callback(struct adapter *padapter, struct sta_info *psta) { - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 join_type; DBG_88E("%s\n", __func__); - if ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { + if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) { if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) {/* adhoc master or sta_count>1 */ /* nothing to do */ } else { /* adhoc client */ @@ -4578,8 +4572,8 @@ void mlmeext_sta_add_event_callback(struct adapter *padapter, struct sta_info *p void mlmeext_sta_del_event_callback(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; if (is_client_associated_to_ap(padapter) || is_IBSS_empty(padapter)) { rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, NULL); @@ -4630,12 +4624,12 @@ static u8 chk_ap_is_alive(struct adapter *padapter, struct sta_info *psta) void linked_status_chk(struct adapter *padapter) { - u32 i; - struct sta_info *psta; - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct sta_priv *pstapriv = &padapter->stapriv; + u32 i; + struct sta_info *psta; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct sta_priv *pstapriv = &padapter->stapriv; if (is_client_associated_to_ap(padapter)) { /* linked infrastructure client mode */ @@ -4664,7 +4658,7 @@ void linked_status_chk(struct adapter *padapter) } if (rx_chk != _SUCCESS) - issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, psta->hwaddr, 3, 1); + issue_probereq_ex(padapter, &pmlmeinfo->network.ssid, psta->hwaddr, 3, 1); if ((tx_chk != _SUCCESS && pmlmeinfo->link_count++ == 0xf) || rx_chk != _SUCCESS) { tx_chk = issue_nulldata(padapter, psta->hwaddr, 0, 3, 1); @@ -4680,15 +4674,15 @@ void linked_status_chk(struct adapter *padapter) if (rx_chk != _SUCCESS) { if (pmlmeext->retry == 0) { issue_probereq(padapter, - &pmlmeinfo->network.Ssid, + &pmlmeinfo->network.ssid, pmlmeinfo->network.MacAddress, false); issue_probereq(padapter, - &pmlmeinfo->network.Ssid, + &pmlmeinfo->network.ssid, pmlmeinfo->network.MacAddress, false); issue_probereq(padapter, - &pmlmeinfo->network.Ssid, + &pmlmeinfo->network.ssid, pmlmeinfo->network.MacAddress, false); } @@ -4750,10 +4744,10 @@ void survey_timer_hdl(struct timer_list *t) { struct adapter *padapter = from_timer(padapter, t, mlmeextpriv.survey_timer); - struct cmd_obj *ph2c; - struct sitesurvey_parm *psurveyPara; - struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct cmd_obj *ph2c; + struct sitesurvey_parm *psurveyPara; + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; /* issue rtw_sitesurvey_cmd */ if (pmlmeext->sitesurvey_res.state > SCAN_START) { @@ -4790,8 +4784,8 @@ void link_timer_hdl(struct timer_list *t) { struct adapter *padapter = from_timer(padapter, t, mlmeextpriv.link_timer); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) { DBG_88E("%s:no beacon while connecting\n", __func__); @@ -4826,7 +4820,7 @@ void link_timer_hdl(struct timer_list *t) void addba_timer_hdl(struct timer_list *t) { struct sta_info *psta = from_timer(psta, t, addba_retry_timer); - struct ht_priv *phtpriv; + struct ht_priv *phtpriv; if (!psta) return; @@ -4842,8 +4836,8 @@ void addba_timer_hdl(struct timer_list *t) u8 setopmode_hdl(struct adapter *padapter, u8 *pbuf) { u8 type; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct setopmode_parm *psetop = (struct setopmode_parm *)pbuf; if (psetop->mode == Ndis802_11APMode) { @@ -4867,11 +4861,10 @@ u8 setopmode_hdl(struct adapter *padapter, u8 *pbuf) u8 createbss_hdl(struct adapter *padapter, u8 *pbuf) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&(pmlmeinfo->network)); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network); struct wlan_bssid_ex *pparm = (struct wlan_bssid_ex *)pbuf; - /* u32 initialgain; */ if (pparm->InfrastructureMode == Ndis802_11APMode) { #ifdef CONFIG_88EU_AP_MODE @@ -4929,10 +4922,10 @@ u8 join_cmd_hdl(struct adapter *padapter, u8 *pbuf) { u8 join_type; struct ndis_802_11_var_ie *pIE; - struct registry_priv *pregpriv = &padapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&(pmlmeinfo->network)); + struct registry_priv *pregpriv = &padapter->registrypriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network); struct wlan_bssid_ex *pparm = (struct wlan_bssid_ex *)pbuf; u32 i; @@ -5041,9 +5034,9 @@ u8 join_cmd_hdl(struct adapter *padapter, u8 *pbuf) u8 disconnect_hdl(struct adapter *padapter, unsigned char *pbuf) { struct disconnect_parm *param = (struct disconnect_parm *)pbuf; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&(pmlmeinfo->network)); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network); u8 val8; if (is_client_associated_to_ap(padapter)) @@ -5055,7 +5048,7 @@ u8 disconnect_hdl(struct adapter *padapter, unsigned char *pbuf) /* restore to initial setting. */ update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); - if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) { + if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) { /* Stop BCN */ val8 = 0; rtw_hal_set_hwreg(padapter, HW_VAR_BCN_FUNC, (u8 *)(&val8)); @@ -5088,7 +5081,7 @@ static int rtw_scan_ch_decision(struct adapter *padapter, { int i, j; int set_idx; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; /* clear out first */ memset(out, 0, sizeof(struct rtw_ieee80211_channel)*out_num); @@ -5127,12 +5120,12 @@ static int rtw_scan_ch_decision(struct adapter *padapter, u8 sitesurvey_cmd_hdl(struct adapter *padapter, u8 *pbuf) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf; u8 bdelayscan = false; u8 val8; - u32 initialgain; - u32 i; + u32 initialgain; + u32 i; if (pmlmeext->sitesurvey_res.state == SCAN_DISABLE) { /* for first time sitesurvey_cmd */ @@ -5143,11 +5136,11 @@ u8 sitesurvey_cmd_hdl(struct adapter *padapter, u8 *pbuf) pmlmeext->sitesurvey_res.channel_idx = 0; for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) { - if (pparm->ssid[i].SsidLength) { - memcpy(pmlmeext->sitesurvey_res.ssid[i].Ssid, pparm->ssid[i].Ssid, IW_ESSID_MAX_SIZE); - pmlmeext->sitesurvey_res.ssid[i].SsidLength = pparm->ssid[i].SsidLength; + if (pparm->ssid[i].ssid_length) { + memcpy(pmlmeext->sitesurvey_res.ssid[i].ssid, pparm->ssid[i].ssid, IW_ESSID_MAX_SIZE); + pmlmeext->sitesurvey_res.ssid[i].ssid_length = pparm->ssid[i].ssid_length; } else { - pmlmeext->sitesurvey_res.ssid[i].SsidLength = 0; + pmlmeext->sitesurvey_res.ssid[i].ssid_length = 0; } } @@ -5199,22 +5192,22 @@ u8 sitesurvey_cmd_hdl(struct adapter *padapter, u8 *pbuf) u8 setauth_hdl(struct adapter *padapter, unsigned char *pbuf) { - struct setauth_parm *pparm = (struct setauth_parm *)pbuf; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct setauth_parm *pparm = (struct setauth_parm *)pbuf; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; if (pparm->mode < 4) pmlmeinfo->auth_algo = pparm->mode; - return H2C_SUCCESS; + return H2C_SUCCESS; } u8 setkey_hdl(struct adapter *padapter, u8 *pbuf) { - unsigned short ctrl; - struct setkey_parm *pparm = (struct setkey_parm *)pbuf; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + unsigned short ctrl; + struct setkey_parm *pparm = (struct setkey_parm *)pbuf; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + u8 null_sta[ETH_ALEN] = {}; /* main tx key for wep. */ if (pparm->set_tx) @@ -5234,9 +5227,9 @@ u8 set_stakey_hdl(struct adapter *padapter, u8 *pbuf) { u16 ctrl = 0; u8 cam_id;/* cam_entry */ - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct set_stakey_parm *pparm = (struct set_stakey_parm *)pbuf; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct set_stakey_parm *pparm = (struct set_stakey_parm *)pbuf; /* cam_entry: */ /* 0~3 for default key */ @@ -5255,7 +5248,7 @@ u8 set_stakey_hdl(struct adapter *padapter, u8 *pbuf) DBG_88E_LEVEL(_drv_info_, "set pairwise key to hw: alg:%d(WEP40-1 WEP104-5 TKIP-2 AES-4) camid:%d\n", pparm->algorithm, cam_id); - if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { + if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { struct sta_info *psta; struct sta_priv *pstapriv = &padapter->stapriv; @@ -5303,33 +5296,32 @@ u8 set_stakey_hdl(struct adapter *padapter, u8 *pbuf) u8 add_ba_hdl(struct adapter *padapter, unsigned char *pbuf) { - struct addBaReq_parm *pparm = (struct addBaReq_parm *)pbuf; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - + struct addBaReq_parm *pparm = (struct addBaReq_parm *)pbuf; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, pparm->addr); if (!psta) - return H2C_SUCCESS; + return H2C_SUCCESS; if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) || - ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) { + ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) { issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid); mod_timer(&psta->addba_retry_timer, jiffies + msecs_to_jiffies(ADDBA_TO)); } else { psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid); } - return H2C_SUCCESS; + return H2C_SUCCESS; } u8 set_tx_beacon_cmd(struct adapter *padapter) { - struct cmd_obj *ph2c; - struct wlan_bssid_ex *ptxBeacon_parm; - struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct cmd_obj *ph2c; + struct wlan_bssid_ex *ptxBeacon_parm; + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u8 res = _SUCCESS; int len_diff = 0; @@ -5339,7 +5331,7 @@ u8 set_tx_beacon_cmd(struct adapter *padapter) goto exit; } - ptxBeacon_parm = kmemdup(&(pmlmeinfo->network), + ptxBeacon_parm = kmemdup(&pmlmeinfo->network, sizeof(struct wlan_bssid_ex), GFP_ATOMIC); if (ptxBeacon_parm == NULL) { kfree(ph2c); @@ -5364,12 +5356,12 @@ u8 mlme_evt_hdl(struct adapter *padapter, unsigned char *pbuf) { u8 evt_code; u16 evt_sz; - uint *peventbuf; + uint *peventbuf; void (*event_callback)(struct adapter *dev, u8 *pbuf); peventbuf = (uint *)pbuf; - evt_sz = (u16)(*peventbuf&0xffff); - evt_code = (u8)((*peventbuf>>16)&0xff); + evt_sz = (u16)(*peventbuf & 0xffff); + evt_code = (u8)((*peventbuf>>16) & 0xff); /* checking if event code is valid */ if (evt_code >= MAX_C2HEVT) { @@ -5408,14 +5400,14 @@ u8 tx_beacon_hdl(struct adapter *padapter, unsigned char *pbuf) struct sta_info *psta_bmc; struct list_head *xmitframe_plist, *xmitframe_phead; struct xmit_frame *pxmitframe = NULL; - struct sta_priv *pstapriv = &padapter->stapriv; + struct sta_priv *pstapriv = &padapter->stapriv; /* for BC/MC Frames */ psta_bmc = rtw_get_bcmc_stainfo(padapter); if (!psta_bmc) return H2C_SUCCESS; - if ((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len > 0)) { + if ((pstapriv->tim_bitmap & BIT(0)) && (psta_bmc->sleepq_len > 0)) { msleep(10);/* 10ms, ATIM(HIQ) Windows */ spin_lock_bh(&psta_bmc->sleep_q.lock); @@ -5454,7 +5446,7 @@ u8 tx_beacon_hdl(struct adapter *padapter, unsigned char *pbuf) u8 set_ch_hdl(struct adapter *padapter, u8 *pbuf) { struct set_ch_parm *set_ch_parm; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if (!pbuf) return H2C_PARAMETERS_ERROR; @@ -5471,13 +5463,13 @@ u8 set_ch_hdl(struct adapter *padapter, u8 *pbuf) set_channel_bwmode(padapter, set_ch_parm->ch, set_ch_parm->ch_offset, set_ch_parm->bw); - return H2C_SUCCESS; + return H2C_SUCCESS; } u8 set_chplan_hdl(struct adapter *padapter, unsigned char *pbuf) { struct SetChannelPlan_param *setChannelPlan_param; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if (!pbuf) return H2C_PARAMETERS_ERROR; @@ -5487,5 +5479,5 @@ u8 set_chplan_hdl(struct adapter *padapter, unsigned char *pbuf) pmlmeext->max_chan_nums = init_channel_set(padapter, setChannelPlan_param->channel_plan, pmlmeext->channel_set); init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list); - return H2C_SUCCESS; + return H2C_SUCCESS; } diff --git a/drivers/staging/rtl8188eu/core/rtw_pwrctrl.c b/drivers/staging/rtl8188eu/core/rtw_pwrctrl.c index 9764e85c000c..6a846d08d449 100644 --- a/drivers/staging/rtl8188eu/core/rtw_pwrctrl.c +++ b/drivers/staging/rtl8188eu/core/rtw_pwrctrl.c @@ -47,7 +47,7 @@ static int rtw_hw_suspend(struct adapter *padapter) if (check_fwstate(pmlmepriv, _FW_LINKED)) { _clr_fwstate_(pmlmepriv, _FW_LINKED); - LedControl8188eu(padapter, LED_CTL_NO_LINK); + led_control_8188eu(padapter, LED_CTL_NO_LINK); rtw_os_indicate_disconnect(padapter); diff --git a/drivers/staging/rtl8188eu/core/rtw_recv.c b/drivers/staging/rtl8188eu/core/rtw_recv.c index dc447cc78c32..1d83affc08ce 100644 --- a/drivers/staging/rtl8188eu/core/rtw_recv.c +++ b/drivers/staging/rtl8188eu/core/rtw_recv.c @@ -650,8 +650,8 @@ int sta2sta_data_frame(struct adapter *adapter, struct recv_frame *precv_frame, u8 *sta_addr = NULL; bool mcast = is_multicast_ether_addr(pattrib->dst); - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true)) { + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || + check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { /* filter packets that SA is myself or multicast or broadcast */ if (!memcmp(myhwaddr, pattrib->src, ETH_ALEN)) { RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, (" SA==myself\n")); @@ -729,9 +729,9 @@ static int ap2sta_data_frame( u8 *myhwaddr = myid(&adapter->eeprompriv); bool mcast = is_multicast_ether_addr(pattrib->dst); - if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) && - (check_fwstate(pmlmepriv, _FW_LINKED) == true || - check_fwstate(pmlmepriv, _FW_UNDER_LINKING))) { + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && + (check_fwstate(pmlmepriv, _FW_LINKED) || + check_fwstate(pmlmepriv, _FW_UNDER_LINKING))) { /* filter packets that SA is myself or multicast or broadcast */ if (!memcmp(myhwaddr, pattrib->src, ETH_ALEN)) { RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, (" SA==myself\n")); @@ -817,7 +817,7 @@ static int sta2ap_data_frame(struct adapter *adapter, unsigned char *mybssid = get_bssid(pmlmepriv); int ret = _SUCCESS; - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { /* For AP mode, RA = BSSID, TX = STA(SRC_ADDR), A3 = DST_ADDR */ if (memcmp(pattrib->bssid, mybssid, ETH_ALEN)) { ret = _FAIL; @@ -949,7 +949,7 @@ static int validate_recv_ctrl_frame(struct adapter *padapter, pxmitframe->attrib.triggered = 1; spin_unlock_bh(&psta->sleep_q.lock); - if (rtw_hal_xmit(padapter, pxmitframe) == true) + if (rtw_hal_xmit(padapter, pxmitframe)) rtw_os_xmit_complete(padapter, pxmitframe); spin_lock_bh(&psta->sleep_q.lock); @@ -1229,7 +1229,7 @@ static int validate_recv_frame(struct adapter *adapter, retval = _FAIL; /* only data frame return _SUCCESS */ break; case WIFI_DATA_TYPE: /* data */ - LedControl8188eu(adapter, LED_CTL_RX); + led_control_8188eu(adapter, LED_CTL_RX); pattrib->qos = (subtype & BIT(7)) ? 1 : 0; retval = validate_recv_data_frame(adapter, precv_frame); if (retval == _FAIL) { @@ -1838,7 +1838,7 @@ void rtw_reordering_ctrl_timeout_handler(struct timer_list *t) spin_lock_bh(&ppending_recvframe_queue->lock); - if (recv_indicatepkts_in_order(padapter, preorder_ctrl, true) == true) + if (recv_indicatepkts_in_order(padapter, preorder_ctrl, true)) mod_timer(&preorder_ctrl->reordering_ctrl_timer, jiffies + msecs_to_jiffies(REORDER_WAIT_TIME)); @@ -1912,7 +1912,7 @@ static int recv_func_posthandle(struct adapter *padapter, struct __queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; /* DATA FRAME */ - LedControl8188eu(padapter, LED_CTL_RX); + led_control_8188eu(padapter, LED_CTL_RX); prframe = decryptor(padapter, prframe); if (!prframe) { diff --git a/drivers/staging/rtl8188eu/core/rtw_security.c b/drivers/staging/rtl8188eu/core/rtw_security.c index f7407632e80b..2f90f60f1681 100644 --- a/drivers/staging/rtl8188eu/core/rtw_security.c +++ b/drivers/staging/rtl8188eu/core/rtw_security.c @@ -154,7 +154,7 @@ void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe) pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset; - crypto_ops = try_then_request_module(lib80211_get_crypto_ops("WEP"), "lib80211_crypt_wep"); + crypto_ops = lib80211_get_crypto_ops("WEP"); if (!crypto_ops) return; @@ -210,7 +210,7 @@ int rtw_wep_decrypt(struct adapter *padapter, u8 *precvframe) void *crypto_private = NULL; int status = _SUCCESS; const int keyindex = prxattrib->key_index; - struct lib80211_crypto_ops *crypto_ops = try_then_request_module(lib80211_get_crypto_ops("WEP"), "lib80211_crypt_wep"); + struct lib80211_crypto_ops *crypto_ops = lib80211_get_crypto_ops("WEP"); char iv[4], icv[4]; if (!crypto_ops) { @@ -1259,7 +1259,7 @@ u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe) length = pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len; aes_cipher(prwskey, pattrib->hdrlen, pframe, length); - } else{ + } else { length = pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len; aes_cipher(prwskey, pattrib->hdrlen, pframe, length); @@ -1267,7 +1267,7 @@ u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe) pframe = (u8 *)round_up((size_t)(pframe), 8); } } - } else{ + } else { RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("%s: stainfo==NULL!!!\n", __func__)); res = _FAIL; } @@ -1291,7 +1291,7 @@ u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe) struct sk_buff *skb = ((struct recv_frame *)precvframe)->pkt; void *crypto_private = NULL; u8 *key, *pframe = skb->data; - struct lib80211_crypto_ops *crypto_ops = try_then_request_module(lib80211_get_crypto_ops("CCMP"), "lib80211_crypt_ccmp"); + struct lib80211_crypto_ops *crypto_ops = lib80211_get_crypto_ops("CCMP"); struct security_priv *psecuritypriv = &padapter->securitypriv; char iv[8], icv[8]; diff --git a/drivers/staging/rtl8188eu/core/rtw_sreset.c b/drivers/staging/rtl8188eu/core/rtw_sreset.c index fb5adaf4a42c..a8397b132002 100644 --- a/drivers/staging/rtl8188eu/core/rtw_sreset.c +++ b/drivers/staging/rtl8188eu/core/rtw_sreset.c @@ -12,10 +12,10 @@ void rtw_hal_sreset_init(struct adapter *padapter) { struct sreset_priv *psrtpriv = &padapter->HalData->srestpriv; - psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; + psrtpriv->wifi_error_status = WIFI_STATUS_SUCCESS; } void sreset_set_wifi_error_status(struct adapter *padapter, u32 status) { - padapter->HalData->srestpriv.Wifi_Error_Status = status; + padapter->HalData->srestpriv.wifi_error_status = status; } diff --git a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c b/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c index f12a12b19d3f..91a30142c567 100644 --- a/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c +++ b/drivers/staging/rtl8188eu/core/rtw_sta_mgt.c @@ -429,7 +429,7 @@ struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) while (phead != plist) { psta = container_of(plist, struct sta_info, hash_list); - if ((!memcmp(psta->hwaddr, addr, ETH_ALEN)) == true) { + if (!memcmp(psta->hwaddr, addr, ETH_ALEN)) { /* if found the matched address */ break; } diff --git a/drivers/staging/rtl8188eu/core/rtw_wlan_util.c b/drivers/staging/rtl8188eu/core/rtw_wlan_util.c index 3e05e2c7f61b..4480deef95a1 100644 --- a/drivers/staging/rtl8188eu/core/rtw_wlan_util.c +++ b/drivers/staging/rtl8188eu/core/rtw_wlan_util.c @@ -12,20 +12,20 @@ #include <drv_types.h> #include <wifi.h> -static unsigned char ARTHEROS_OUI1[] = {0x00, 0x03, 0x7f}; -static unsigned char ARTHEROS_OUI2[] = {0x00, 0x13, 0x74}; +static const u8 ARTHEROS_OUI1[] = {0x00, 0x03, 0x7f}; +static const u8 ARTHEROS_OUI2[] = {0x00, 0x13, 0x74}; -static unsigned char BROADCOM_OUI1[] = {0x00, 0x10, 0x18}; -static unsigned char BROADCOM_OUI2[] = {0x00, 0x0a, 0xf7}; +static const u8 BROADCOM_OUI1[] = {0x00, 0x10, 0x18}; +static const u8 BROADCOM_OUI2[] = {0x00, 0x0a, 0xf7}; -static unsigned char CISCO_OUI[] = {0x00, 0x40, 0x96}; -static unsigned char MARVELL_OUI[] = {0x00, 0x50, 0x43}; -static unsigned char RALINK_OUI[] = {0x00, 0x0c, 0x43}; -static unsigned char REALTEK_OUI[] = {0x00, 0xe0, 0x4c}; -static unsigned char AIRGOCAP_OUI[] = {0x00, 0x0a, 0xf5}; -static unsigned char EPIGRAM_OUI[] = {0x00, 0x90, 0x4c}; +static const u8 CISCO_OUI[] = {0x00, 0x40, 0x96}; +static const u8 MARVELL_OUI[] = {0x00, 0x50, 0x43}; +static const u8 RALINK_OUI[] = {0x00, 0x0c, 0x43}; +static const u8 REALTEK_OUI[] = {0x00, 0xe0, 0x4c}; +static const u8 AIRGOCAP_OUI[] = {0x00, 0x0a, 0xf5}; +static const u8 EPIGRAM_OUI[] = {0x00, 0x90, 0x4c}; -unsigned char REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20}; +u8 REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20}; #define R2T_PHY_DELAY (0) @@ -33,20 +33,20 @@ unsigned char REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20}; #define WAIT_FOR_BCN_TO_MIN (6000) #define WAIT_FOR_BCN_TO_MAX (20000) -static u8 rtw_basic_rate_cck[4] = { +static const u8 rtw_basic_rate_cck[4] = { IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK }; -static u8 rtw_basic_rate_ofdm[3] = { +static const u8 rtw_basic_rate_ofdm[3] = { IEEE80211_OFDM_RATE_6MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_12MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_24MB | IEEE80211_BASIC_RATE_MASK }; -static u8 rtw_basic_rate_mix[7] = { +static const u8 rtw_basic_rate_mix[7] = { IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK, @@ -56,28 +56,29 @@ static u8 rtw_basic_rate_mix[7] = { IEEE80211_OFDM_RATE_24MB | IEEE80211_BASIC_RATE_MASK }; -int cckrates_included(unsigned char *rate, int ratelen) +bool cckrates_included(unsigned char *rate, int ratelen) { - int i; + int i; for (i = 0; i < ratelen; i++) { - if ((((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || - (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22)) + u8 r = rate[i] & 0x7f; + + if (r == 2 || r == 4 || r == 11 || r == 22) return true; } return false; } -int cckratesonly_included(unsigned char *rate, int ratelen) +bool cckratesonly_included(unsigned char *rate, int ratelen) { - int i; + int i; for (i = 0; i < ratelen; i++) { - if ((((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && - (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22)) + u8 r = rate[i] & 0x7f; + + if (r != 2 && r != 4 && r != 11 && r != 22) return false; } - return true; } @@ -155,7 +156,7 @@ static unsigned char ratetbl_val_2wifirate(unsigned char rate) } } -static int is_basicrate(struct adapter *padapter, unsigned char rate) +static bool is_basicrate(struct adapter *padapter, unsigned char rate) { int i; unsigned char val; @@ -176,7 +177,7 @@ static unsigned int ratetbl2rateset(struct adapter *padapter, unsigned char *rat { int i; unsigned char rate; - unsigned int len = 0; + unsigned int len = 0; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; for (i = 0; i < NumRates; i++) { @@ -190,7 +191,7 @@ static unsigned int ratetbl2rateset(struct adapter *padapter, unsigned char *rat default: rate = ratetbl_val_2wifirate(rate); - if (is_basicrate(padapter, rate) == true) + if (is_basicrate(padapter, rate)) rate |= IEEE80211_BASIC_RATE_MASK; rateset[len] = rate; @@ -212,8 +213,8 @@ void get_rate_set(struct adapter *padapter, unsigned char *pbssrate, int *bssrat void UpdateBrateTbl(struct adapter *Adapter, u8 *mbrate) { - u8 i; - u8 rate; + u8 i; + u8 rate; /* 1M, 2M, 5.5M, 11M, 6M, 12M, 24M are mandatory. */ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { @@ -234,8 +235,8 @@ void UpdateBrateTbl(struct adapter *Adapter, u8 *mbrate) void UpdateBrateTblForSoftAP(u8 *bssrateset, u32 bssratelen) { - u8 i; - u8 rate; + u8 i; + u8 rate; for (i = 0; i < bssratelen; i++) { rate = bssrateset[i] & 0x7f; @@ -252,14 +253,14 @@ void UpdateBrateTblForSoftAP(u8 *bssrateset, u32 bssratelen) void Save_DM_Func_Flag(struct adapter *padapter) { - u8 saveflag = true; + u8 saveflag = true; rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&saveflag)); } void Restore_DM_Func_Flag(struct adapter *padapter) { - u8 saveflag = false; + u8 saveflag = false; rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&saveflag)); } @@ -369,16 +370,17 @@ u16 get_beacon_interval(struct wlan_bssid_ex *bss) int is_client_associated_to_ap(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext; - struct mlme_ext_info *pmlmeinfo; + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; if (!padapter) return _FAIL; pmlmeext = &padapter->mlmeextpriv; - pmlmeinfo = &(pmlmeext->mlmext_info); + pmlmeinfo = &pmlmeext->mlmext_info; - if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)) + if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && + (pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) return true; else return _FAIL; @@ -386,10 +388,11 @@ int is_client_associated_to_ap(struct adapter *padapter) int is_client_associated_to_ibss(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) + if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && + (pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) return true; else return _FAIL; @@ -398,8 +401,8 @@ int is_client_associated_to_ibss(struct adapter *padapter) int is_IBSS_empty(struct adapter *padapter) { unsigned int i; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) { if (pmlmeinfo->FW_sta_info[i].status == 1) @@ -425,9 +428,9 @@ void invalidate_cam_all(struct adapter *padapter) void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key) { - unsigned int i, val, addr; + unsigned int i, val, addr; int j; - u32 cam_val[2]; + u32 cam_val[2]; addr = entry << 3; @@ -441,7 +444,8 @@ void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key) break; default: i = (j - 2) << 2; - val = key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24); + val = key[i] | (key[i + 1] << 8) | (key[i + 2] << 16) | + (key[i + 3] << 24); break; } @@ -454,9 +458,8 @@ void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key) void clear_cam_entry(struct adapter *padapter, u8 entry) { - u8 null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; - u8 null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + u8 null_sta[ETH_ALEN] = {}; + u8 null_key[16] = {}; write_cam(padapter, entry, 0, null_sta, null_key); } @@ -464,8 +467,8 @@ void clear_cam_entry(struct adapter *padapter, u8 entry) int allocate_fw_sta_entry(struct adapter *padapter) { unsigned int mac_id; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; for (mac_id = IBSS_START_MAC_ID; mac_id < NUM_STA; mac_id++) { if (pmlmeinfo->FW_sta_info[mac_id].status == 0) { @@ -480,8 +483,8 @@ int allocate_fw_sta_entry(struct adapter *padapter) void flush_all_cam_entry(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, NULL); @@ -490,10 +493,9 @@ void flush_all_cam_entry(struct adapter *padapter) int WMM_param_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) { - /* struct registry_priv *pregpriv = &padapter->registrypriv; */ - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; if (pmlmepriv->qospriv.qos_option == 0) { pmlmeinfo->WMM_enable = 0; @@ -501,21 +503,21 @@ int WMM_param_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) } pmlmeinfo->WMM_enable = 1; - memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element)); + memcpy(&pmlmeinfo->WMM_param, pIE->data + 6, sizeof(struct WMM_para_element)); return true; } void WMMOnAssocRsp(struct adapter *padapter) { - u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; - u8 acm_mask; - u16 TXOP; - u32 acParm, i; - u32 edca[4], inx[4]; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - struct registry_priv *pregpriv = &padapter->registrypriv; + u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; + u8 acm_mask; + u16 TXOP; + u32 acParm, i; + u32 edca[4], inx[4]; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct registry_priv *pregpriv = &padapter->registrypriv; if (pmlmeinfo->WMM_enable == 0) { padapter->mlmepriv.acm_mask = 0; @@ -575,11 +577,11 @@ void WMMOnAssocRsp(struct adapter *padapter) inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; if (pregpriv->wifi_spec == 1) { - u32 j, change_inx = false; + u32 j, change_inx = false; /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */ for (i = 0; i < 4; i++) { - for (j = i+1; j < 4; j++) { + for (j = i + 1; j < 4; j++) { /* compare CW and AIFS */ if ((edca[j] & 0xFFFF) < (edca[i] & 0xFFFF)) { change_inx = true; @@ -606,14 +608,14 @@ void WMMOnAssocRsp(struct adapter *padapter) static void bwmode_update_check(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) { - unsigned char new_bwmode; - unsigned char new_ch_offset; - struct HT_info_element *pHT_info; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + unsigned char new_bwmode; + unsigned char new_ch_offset; + struct HT_info_element *pHT_info; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct registry_priv *pregistrypriv = &padapter->registrypriv; - struct ht_priv *phtpriv = &pmlmepriv->htpriv; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; if (!pIE) return; @@ -660,11 +662,9 @@ static void bwmode_update_check(struct adapter *padapter, struct ndis_802_11_var if (pmlmeinfo->bwmode_updated) { struct sta_info *psta; - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; struct sta_priv *pstapriv = &padapter->stapriv; - /* set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); */ - /* update ap's stainfo */ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); if (psta) { @@ -684,12 +684,12 @@ static void bwmode_update_check(struct adapter *padapter, struct ndis_802_11_var void HT_caps_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) { - unsigned int i; - u8 max_AMPDU_len, min_MPDU_spacing; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct ht_priv *phtpriv = &pmlmepriv->htpriv; + unsigned int i; + u8 max_AMPDU_len, min_MPDU_spacing; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; u8 *HT_cap = (u8 *)(&pmlmeinfo->HT_caps); if (!pIE) @@ -727,10 +727,10 @@ void HT_caps_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) void HT_info_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct ht_priv *phtpriv = &pmlmepriv->htpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; if (!pIE) return; @@ -742,16 +742,15 @@ void HT_info_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) return; pmlmeinfo->HT_info_enable = 1; - memcpy(&(pmlmeinfo->HT_info), pIE->data, pIE->Length); + memcpy(&pmlmeinfo->HT_info, pIE->data, pIE->Length); } void HTOnAssocRsp(struct adapter *padapter) { - unsigned char max_AMPDU_len; - unsigned char min_MPDU_spacing; - /* struct registry_priv *pregpriv = &padapter->registrypriv; */ - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + unsigned char max_AMPDU_len; + unsigned char min_MPDU_spacing; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; DBG_88E("%s\n", __func__); @@ -762,11 +761,11 @@ void HTOnAssocRsp(struct adapter *padapter) return; } - /* handle A-MPDU parameter field */ - /* - AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k - AMPDU_para [4:2]:Min MPDU Start Spacing - */ + /* handle A-MPDU parameter field + * + * AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k + * AMPDU_para [4:2]:Min MPDU Start Spacing + */ max_AMPDU_len = pmlmeinfo->HT_caps.ampdu_params_info & 0x03; min_MPDU_spacing = (pmlmeinfo->HT_caps.ampdu_params_info & 0x1c) >> 2; @@ -778,21 +777,21 @@ void HTOnAssocRsp(struct adapter *padapter) void ERP_IE_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; if (pIE->Length > 1) return; pmlmeinfo->ERP_enable = 1; - memcpy(&(pmlmeinfo->ERP_IE), pIE->data, pIE->Length); + memcpy(&pmlmeinfo->ERP_IE, pIE->data, pIE->Length); } void VCS_update(struct adapter *padapter, struct sta_info *psta) { - struct registry_priv *pregpriv = &padapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct registry_priv *pregpriv = &padapter->registrypriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; switch (pregpriv->vrtl_carrier_sense) { /* 0:off 1:on 2:auto */ case 0: /* off */ @@ -828,11 +827,10 @@ void VCS_update(struct adapter *padapter, struct sta_info *psta) int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len) { - unsigned int len; - unsigned char *p; - unsigned short val16, subtype; - struct wlan_network *cur_network = &(Adapter->mlmepriv.cur_network); - /* u8 wpa_ie[255], rsn_ie[255]; */ + unsigned int len; + unsigned char *p; + unsigned short val16, subtype; + struct wlan_network *cur_network = &Adapter->mlmepriv.cur_network; u16 wpa_len = 0, rsn_len = 0; u8 encryp_protocol = 0; struct wlan_bssid_ex *bssid; @@ -842,8 +840,8 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len) u8 *pbssid = GetAddr3Ptr(pframe); struct HT_info_element *pht_info = NULL; u32 bcn_channel; - unsigned short ht_cap_info; - unsigned char ht_info_infos_0; + unsigned short ht_cap_info; + unsigned char ht_info_infos_0; int ssid_len; if (!is_client_associated_to_ap(Adapter)) @@ -897,7 +895,7 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len) ht_info_infos_0 = 0; } if (ht_cap_info != cur_network->BcnInfo.ht_cap_info || - ((ht_info_infos_0&0x03) != (cur_network->BcnInfo.ht_info_infos_0&0x03))) { + ((ht_info_infos_0 & 0x03) != (cur_network->BcnInfo.ht_info_infos_0 & 0x03))) { DBG_88E("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, ht_cap_info, ht_info_infos_0); DBG_88E("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, @@ -937,17 +935,17 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len) if (ssid_len > NDIS_802_11_LENGTH_SSID) ssid_len = 0; } - memcpy(bssid->Ssid.Ssid, (p + 2), ssid_len); - bssid->Ssid.SsidLength = ssid_len; + memcpy(bssid->ssid.ssid, (p + 2), ssid_len); + bssid->ssid.ssid_length = ssid_len; - RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s bssid.Ssid.Ssid:%s bssid.Ssid.SsidLength:%d " - "cur_network->network.Ssid.Ssid:%s len:%d\n", __func__, bssid->Ssid.Ssid, - bssid->Ssid.SsidLength, cur_network->network.Ssid.Ssid, - cur_network->network.Ssid.SsidLength)); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s bssid.ssid.ssid:%s bssid.ssid.ssid_length:%d " + "cur_network->network.ssid.ssid:%s len:%d\n", __func__, bssid->ssid.ssid, + bssid->ssid.ssid_length, cur_network->network.ssid.ssid, + cur_network->network.ssid.ssid_length)); - if (memcmp(bssid->Ssid.Ssid, cur_network->network.Ssid.Ssid, 32) || - bssid->Ssid.SsidLength != cur_network->network.Ssid.SsidLength) { - if (bssid->Ssid.Ssid[0] != '\0' && bssid->Ssid.SsidLength != 0) { /* not hidden ssid */ + if (memcmp(bssid->ssid.ssid, cur_network->network.ssid.ssid, 32) || + bssid->ssid.ssid_length != cur_network->network.ssid.ssid_length) { + if (bssid->ssid.ssid[0] != '\0' && bssid->ssid.ssid_length != 0) { /* not hidden ssid */ DBG_88E("%s(), SSID is not match return FAIL\n", __func__); goto _mismatch; } @@ -986,18 +984,20 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len) } if (encryp_protocol == ENCRYP_PROTOCOL_WPA || encryp_protocol == ENCRYP_PROTOCOL_WPA2) { - pbuf = rtw_get_wpa_ie(&bssid->ies[12], &wpa_ielen, bssid->ie_length-12); + pbuf = rtw_get_wpa_ie(&bssid->ies[12], &wpa_ielen, + bssid->ie_length - 12); if (pbuf && (wpa_ielen > 0)) { - if (_SUCCESS == rtw_parse_wpa_ie(pbuf, wpa_ielen+2, &group_cipher, &pairwise_cipher, &is_8021x)) { + if (_SUCCESS == rtw_parse_wpa_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is_8021x)) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s pnetwork->pairwise_cipher: %d, group_cipher is %d, is_8021x is %d\n", __func__, pairwise_cipher, group_cipher, is_8021x)); } } else { - pbuf = rtw_get_wpa2_ie(&bssid->ies[12], &wpa_ielen, bssid->ie_length-12); + pbuf = rtw_get_wpa2_ie(&bssid->ies[12], &wpa_ielen, + bssid->ie_length - 12); if (pbuf && (wpa_ielen > 0)) { - if (_SUCCESS == rtw_parse_wpa2_ie(pbuf, wpa_ielen+2, &group_cipher, &pairwise_cipher, &is_8021x)) { + if (_SUCCESS == rtw_parse_wpa2_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is_8021x)) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s pnetwork->pairwise_cipher: %d, pnetwork->group_cipher is %d, is_802x is %d\n", __func__, pairwise_cipher, group_cipher, is_8021x)); @@ -1061,8 +1061,8 @@ unsigned int is_ap_in_tkip(struct adapter *padapter) u32 i; struct ndis_802_11_var_ie *pIE; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; if (rtw_get_capability((struct wlan_bssid_ex *)cur_network) & WLAN_CAPABILITY_PRIVACY) { for (i = sizeof(struct ndis_802_11_fixed_ie); i < pmlmeinfo->network.ie_length;) { @@ -1093,8 +1093,8 @@ unsigned int is_ap_in_wep(struct adapter *padapter) u32 i; struct ndis_802_11_var_ie *pIE; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; if (rtw_get_capability((struct wlan_bssid_ex *)cur_network) & WLAN_CAPABILITY_PRIVACY) { for (i = sizeof(struct ndis_802_11_fixed_ie); i < pmlmeinfo->network.ie_length;) { @@ -1123,29 +1123,29 @@ static int wifirate2_ratetbl_inx(unsigned char rate) rate = rate & 0x7f; switch (rate) { - case 54*2: + case 108: return 11; - case 48*2: + case 96: return 10; - case 36*2: + case 72: return 9; - case 24*2: + case 48: return 8; - case 18*2: + case 36: return 7; - case 12*2: + case 24: return 6; - case 9*2: + case 18: return 5; - case 6*2: + case 12: return 4; - case 11*2: + case 22: return 3; case 11: return 2; - case 2*2: + case 4: return 1; - case 1*2: + case 2: return 0; default: return 0; @@ -1190,9 +1190,9 @@ unsigned int update_MSC_rate(struct ieee80211_ht_cap *pHT_caps) int support_short_GI(struct adapter *padapter, struct ieee80211_ht_cap *pHT_caps) { - unsigned char bit_offset; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + unsigned char bit_offset; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; if (!(pmlmeinfo->HT_enable)) return _FAIL; @@ -1264,8 +1264,8 @@ unsigned char check_assoc_AP(u8 *pframe, uint len) { unsigned int i; struct ndis_802_11_var_ie *pIE; - u8 epigram_vendor_flag; - u8 ralink_vendor_flag; + u8 epigram_vendor_flag; + u8 ralink_vendor_flag; epigram_vendor_flag = 0; ralink_vendor_flag = 0; @@ -1334,8 +1334,8 @@ unsigned char check_assoc_AP(u8 *pframe, uint len) void update_IOT_info(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; switch (pmlmeinfo->assoc_AP_vendor) { case HT_IOT_PEER_MARVELL: @@ -1365,9 +1365,9 @@ void update_IOT_info(struct adapter *padapter) void update_capinfo(struct adapter *Adapter, u16 updateCap) { - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - bool ShortPreamble; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + bool ShortPreamble; /* Check preamble mode, 2005.01.06, by rcnjko. */ /* Mark to update preamble value forever, 2008.03.18 by lanhsin */ @@ -1440,16 +1440,15 @@ void update_wireless_mode(struct adapter *padapter) rtw_hal_set_hwreg(padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer); - if (pmlmeext->cur_wireless_mode & WIRELESS_11B) - update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB); - else - update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB); + update_mgnt_tx_rate(padapter, + pmlmeext->cur_wireless_mode & WIRELESS_11B ? + IEEE80211_CCK_RATE_1MB : IEEE80211_OFDM_RATE_6MB); } void update_bmc_sta_support_rate(struct adapter *padapter, u32 mac_id) { - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { /* Only B, B/G, and B/G/N AP could use CCK rate */ @@ -1461,11 +1460,11 @@ void update_bmc_sta_support_rate(struct adapter *padapter, u32 mac_id) int update_sta_support_rate(struct adapter *padapter, u8 *pvar_ie, uint var_ie_len, int cam_idx) { - unsigned int ie_len; + unsigned int ie_len; struct ndis_802_11_var_ie *pIE; - int supportRateNum = 0; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + int supportRateNum = 0; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; pIE = (struct ndis_802_11_var_ie *)rtw_get_ie(pvar_ie, _SUPPORTEDRATES_IE_, &ie_len, var_ie_len); if (!pIE) @@ -1493,19 +1492,18 @@ void process_addba_req(struct adapter *padapter, u8 *paddba_req, u8 *addr) u16 param; struct recv_reorder_ctrl *preorder_ctrl; struct sta_priv *pstapriv = &padapter->stapriv; - struct ADDBA_request *preq = (struct ADDBA_request *)paddba_req; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct ADDBA_request *preq = (struct ADDBA_request *)paddba_req; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; psta = rtw_get_stainfo(pstapriv, addr); if (psta) { param = le16_to_cpu(preq->BA_para_set); - tid = (param>>2)&0x0f; + tid = (param >> 2) & 0x0f; preorder_ctrl = &psta->recvreorder_ctrl[tid]; preorder_ctrl->indicate_seq = 0xffff; - preorder_ctrl->enable = (pmlmeinfo->accept_addba_req) ? true - : false; + preorder_ctrl->enable = pmlmeinfo->accept_addba_req; } } @@ -1517,7 +1515,7 @@ void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) pIE = pframe + sizeof(struct ieee80211_hdr_3addr); pbuf = (__le32 *)pIE; - pmlmeext->TSFValue = le32_to_cpu(*(pbuf+1)); + pmlmeext->TSFValue = le32_to_cpu(*(pbuf + 1)); pmlmeext->TSFValue = pmlmeext->TSFValue << 32; diff --git a/drivers/staging/rtl8188eu/core/rtw_xmit.c b/drivers/staging/rtl8188eu/core/rtw_xmit.c index 0a3e710590ed..952f2ab51347 100644 --- a/drivers/staging/rtl8188eu/core/rtw_xmit.c +++ b/drivers/staging/rtl8188eu/core/rtw_xmit.c @@ -174,7 +174,9 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter) pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf; - rtw_alloc_hwxmits(padapter); + res = rtw_alloc_hwxmits(padapter); + if (res == _FAIL) + goto exit; rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); for (i = 0; i < 4; i++) @@ -467,7 +469,8 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra: %pM\n", (pattrib->ra))); res = _FAIL; goto exit; - } else if ((check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) && (!(psta->state & _FW_LINKED))) { + } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) && + !(psta->state & _FW_LINKED)) { res = _FAIL; goto exit; } @@ -591,7 +594,7 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr struct pkt_attrib *pattrib = &pxmitframe->attrib; struct security_priv *psecuritypriv = &padapter->securitypriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - u8 priority[4] = {0x0, 0x0, 0x0, 0x0}; + u8 priority[4] = {}; u8 hw_hdr_offset = 0; if (pattrib->psta) @@ -604,9 +607,7 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr if (pattrib->encrypt == _TKIP_) { /* encode mic code */ if (stainfo) { - u8 null_key[16] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0}; + u8 null_key[16] = {}; pframe = pxmitframe->buf_addr + hw_hdr_offset; @@ -627,7 +628,7 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr if (pframe[1] & 2) /* From Ds == 1 */ rtw_secmicappend(&micdata, &pframe[24], 6); else - rtw_secmicappend(&micdata, &pframe[10], 6); + rtw_secmicappend(&micdata, &pframe[10], 6); } else { /* ToDS == 0 */ rtw_secmicappend(&micdata, &pframe[4], 6); /* DA */ if (pframe[1] & 2) /* From Ds == 1 */ @@ -758,7 +759,7 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr SetFrameSubType(fctrl, pattrib->subtype); if (pattrib->subtype & WIFI_DATA_TYPE) { - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { /* to_ds = 1, fr_ds = 0; */ /* Data transfer to AP */ SetToDs(fctrl); @@ -1504,7 +1505,7 @@ exit: return res; } -void rtw_alloc_hwxmits(struct adapter *padapter) +s32 rtw_alloc_hwxmits(struct adapter *padapter) { struct hw_xmit *hwxmits; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; @@ -1513,6 +1514,8 @@ void rtw_alloc_hwxmits(struct adapter *padapter) pxmitpriv->hwxmits = kcalloc(pxmitpriv->hwxmit_entry, sizeof(struct hw_xmit), GFP_KERNEL); + if (!pxmitpriv->hwxmits) + return _FAIL; hwxmits = pxmitpriv->hwxmits; @@ -1520,6 +1523,7 @@ void rtw_alloc_hwxmits(struct adapter *padapter) hwxmits[1] .sta_queue = &pxmitpriv->vi_pending; hwxmits[2] .sta_queue = &pxmitpriv->be_pending; hwxmits[3] .sta_queue = &pxmitpriv->bk_pending; + return _SUCCESS; } void rtw_free_hwxmits(struct adapter *padapter) @@ -1606,7 +1610,7 @@ s32 rtw_xmit(struct adapter *padapter, struct sk_buff **ppkt) } pxmitframe->pkt = *ppkt; - LedControl8188eu(padapter, LED_CTL_TX); + led_control_8188eu(padapter, LED_CTL_TX); pxmitframe->attrib.qsel = pxmitframe->attrib.priority; @@ -1984,7 +1988,7 @@ void xmit_delivery_enabled_frames(struct adapter *padapter, struct sta_info *pst pxmitframe->attrib.triggered = 1; - if (rtw_hal_xmit(padapter, pxmitframe) == true) + if (rtw_hal_xmit(padapter, pxmitframe)) rtw_os_xmit_complete(padapter, pxmitframe); if ((psta->sleepq_ac_len == 0) && (!psta->has_legacy_ac) && (wmmps_ac)) { @@ -2029,7 +2033,7 @@ int rtw_sctx_wait(struct submit_ctx *sctx) return ret; } -static bool rtw_sctx_chk_waring_status(int status) +static bool rtw_sctx_chk_warning_status(int status) { switch (status) { case RTW_SCTX_DONE_UNKNOWN: @@ -2047,7 +2051,7 @@ static bool rtw_sctx_chk_waring_status(int status) void rtw_sctx_done_err(struct submit_ctx **sctx, int status) { if (*sctx) { - if (rtw_sctx_chk_waring_status(status)) + if (rtw_sctx_chk_warning_status(status)) DBG_88E("%s status:%d\n", __func__, status); (*sctx)->status = status; complete(&((*sctx)->done)); diff --git a/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c b/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c index 6dbd7d261f1e..9ddd51685063 100644 --- a/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c +++ b/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c @@ -1,24 +1,13 @@ // SPDX-License-Identifier: GPL-2.0 -/*++ -Copyright (c) Realtek Semiconductor Corp. All rights reserved. +/* + * Copyright (c) Realtek Semiconductor Corp. All rights reserved. + */ -Module Name: - RateAdaptive.c - -Abstract: - Implement Rate Adaptive functions for common operations. - -Major Change History: - When Who What - ---------- --------------- ------------------------------- - 2011-08-12 Page Create. - ---*/ #include "odm_precomp.h" /* Rate adaptive parameters */ -static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = { +static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE + 1] = { {5, 4, 3, 2, 0, 3}, /* 92 , idx = 0 */ {6, 5, 4, 3, 0, 4}, /* 86 , idx = 1 */ {6, 5, 4, 2, 0, 4}, /* 81 , idx = 2 */ @@ -44,7 +33,7 @@ static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = { {49, 16, 16, 0, 0, 48} }; /* 3, idx = 0x16 */ -static u8 PT_PENALTY[RETRYSIZE+1] = {34, 31, 30, 24, 0, 32}; +static u8 PT_PENALTY[RETRYSIZE + 1] = {34, 31, 30, 24, 0, 32}; /* wilson modify */ static u8 RETRY_PENALTY_IDX[2][RATESIZE] = { @@ -92,11 +81,8 @@ static u16 DynamicTxRPTTiming[6] = { /* End Rate adaptive parameters */ -static void odm_SetTxRPTTiming_8188E( - struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo, - u8 extend - ) +static void odm_SetTxRPTTiming_8188E(struct odm_dm_struct *dm_odm, + struct odm_ra_info *pRaInfo, u8 extend) { u8 idx = 0; @@ -117,20 +103,20 @@ static void odm_SetTxRPTTiming_8188E( pRaInfo->RptTime = DynamicTxRPTTiming[idx]; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("pRaInfo->RptTime = 0x%x\n", pRaInfo->RptTime)); + ("pRaInfo->RptTime = 0x%x\n", pRaInfo->RptTime)); } static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo) + struct odm_ra_info *pRaInfo) { u8 RateID, LowestRate, HighestRate; u8 i; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, - ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n")); + ODM_DBG_TRACE, ("=====>%s()\n", __func__)); if (!pRaInfo) { ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("odm_RateDown_8188E(): pRaInfo is NULL\n")); + ("%s(): pRaInfo is NULL\n", __func__)); return -1; } RateID = pRaInfo->PreRate; @@ -146,7 +132,7 @@ static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, pRaInfo->RateSGI = 0; } else if (RateID > LowestRate) { if (RateID > 0) { - for (i = RateID-1; i > LowestRate; i--) { + for (i = RateID - 1; i > LowestRate; i--) { if (pRaInfo->RAUseRate & BIT(i)) { RateID = i; goto RateDownFinish; @@ -173,30 +159,28 @@ RateDownFinish: pRaInfo->DecisionRate = RateID; odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 2); ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, - ODM_DBG_LOUD, ("Rate down, RPT Timing default\n")); + ODM_DBG_LOUD, ("Rate down, RPT Timing default\n")); ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("RAWaitingCounter %d, RAPendingCounter %d", + ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter)); ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI)); + ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI)); ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("<===== odm_RateDown_8188E()\n")); + ("<===== %s()\n", __func__)); return 0; } -static int odm_RateUp_8188E( - struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo - ) +static int odm_RateUp_8188E(struct odm_dm_struct *dm_odm, + struct odm_ra_info *pRaInfo) { u8 RateID, HighestRate; u8 i; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, - ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n")); + ODM_DBG_TRACE, ("=====>%s()\n", __func__)); if (!pRaInfo) { ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("odm_RateUp_8188E(): pRaInfo is NULL\n")); + ("%s(): pRaInfo is NULL\n", __func__)); return -1; } RateID = pRaInfo->PreRate; @@ -213,10 +197,10 @@ static int odm_RateUp_8188E( } odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 0); ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("odm_RateUp_8188E():Decrease RPT Timing\n")); + ("%s():Decrease RPT Timing\n", __func__)); if (RateID < HighestRate) { - for (i = RateID+1; i <= HighestRate; i++) { + for (i = RateID + 1; i <= HighestRate; i++) { if (pRaInfo->RAUseRate & BIT(i)) { RateID = i; goto RateUpfinish; @@ -232,19 +216,19 @@ static int odm_RateUp_8188E( } RateUpfinish: if (pRaInfo->RAWaitingCounter == - (4+PendingForRateUpFail[pRaInfo->RAPendingCounter])) + (4 + PendingForRateUpFail[pRaInfo->RAPendingCounter])) pRaInfo->RAWaitingCounter = 0; else pRaInfo->RAWaitingCounter++; pRaInfo->DecisionRate = RateID; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("Rate up to RateID %d\n", RateID)); + ("Rate up to RateID %d\n", RateID)); ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("RAWaitingCounter %d, RAPendingCounter %d", - pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter)); + ("RAWaitingCounter %d, RAPendingCounter %d", + pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter)); ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, - ODM_DBG_TRACE, ("<===== odm_RateUp_8188E()\n")); + ODM_DBG_TRACE, ("<===== %s()\n", __func__)); return 0; } @@ -253,20 +237,21 @@ static void odm_ResetRaCounter_8188E(struct odm_ra_info *pRaInfo) u8 RateID; RateID = pRaInfo->DecisionRate; - pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; - pRaInfo->NscDown = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; + pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID] + + N_THRESHOLD_LOW[RateID]) >> 1; + pRaInfo->NscDown = (N_THRESHOLD_HIGH[RateID] + + N_THRESHOLD_LOW[RateID]) >> 1; } static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo - ) + struct odm_ra_info *pRaInfo) { u8 RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0, i = 0; /* u32 pool_retry; */ static u8 DynamicTxRPTTimingCounter; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("=====>odm_RateDecision_8188E()\n")); + ("=====>%s()\n", __func__)); if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) { /* STA used and data packet exits */ if ((pRaInfo->RssiStaRA < (pRaInfo->PreRssiStaRA - 3)) || @@ -317,7 +302,7 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm, else pRaInfo->NscUp = 0; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD, + ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE | ODM_COMP_INIT, ODM_DBG_LOUD, (" RssiStaRa = %d RtyPtID =%d PenaltyID1 = 0x%x PenaltyID2 = 0x%x RateID =%d NscDown =%d NscUp =%d SGI =%d\n", pRaInfo->RssiStaRA, RtyPtID, PenaltyID1, PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI)); if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) || @@ -345,7 +330,8 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm, odm_ResetRaCounter_8188E(pRaInfo); } - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateDecision_8188E()\n")); + ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + ("<===== %s()\n", __func__)); } static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo) @@ -356,41 +342,41 @@ static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_inf switch (pRaInfo->RateID) { case RATR_INX_WIRELESS_NGB: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff015; + pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff015; break; case RATR_INX_WIRELESS_NG: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff010; + pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff010; break; case RATR_INX_WIRELESS_NB: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff005; + pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff005; break; case RATR_INX_WIRELESS_N: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff000; + pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff000; break; case RATR_INX_WIRELESS_GB: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff5; + pRaInfo->RAUseRate = pRaInfo->RateMask & 0x00000ff5; break; case RATR_INX_WIRELESS_G: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff0; + pRaInfo->RAUseRate = pRaInfo->RateMask & 0x00000ff0; break; case RATR_INX_WIRELESS_B: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0000000d; + pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0000000d; break; case 12: MaskFromReg = usb_read32(adapt, REG_ARFR0); - pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg; + pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg; break; case 13: MaskFromReg = usb_read32(adapt, REG_ARFR1); - pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg; + pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg; break; case 14: MaskFromReg = usb_read32(adapt, REG_ARFR2); - pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg; + pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg; break; case 15: MaskFromReg = usb_read32(adapt, REG_ARFR3); - pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg; + pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg; break; default: pRaInfo->RAUseRate = (pRaInfo->RateMask); @@ -399,7 +385,7 @@ static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_inf /* Highest rate */ if (pRaInfo->RAUseRate) { for (i = RATESIZE; i >= 0; i--) { - if ((pRaInfo->RAUseRate)&BIT(i)) { + if (pRaInfo->RAUseRate & BIT(i)) { pRaInfo->HighestRate = i; break; } @@ -511,15 +497,17 @@ static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo) j >>= 1; temp_stage = (pRaInfo->PTStage + 1) >> 1; if (temp_stage > j) - stage_id = temp_stage-j; + stage_id = temp_stage - j; else stage_id = 0; - pRaInfo->PTSmoothFactor = (pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2; + pRaInfo->PTSmoothFactor = (pRaInfo->PTSmoothFactor >> 1) + + (pRaInfo->PTSmoothFactor >> 2) + + stage_id * 16 + 2; if (pRaInfo->PTSmoothFactor > 192) pRaInfo->PTSmoothFactor = 192; stage_id = pRaInfo->PTSmoothFactor >> 6; - temp_stage = stage_id*2; + temp_stage = stage_id * 2; if (temp_stage != 0) temp_stage -= 1; if (pRaInfo->DROP > 3) @@ -527,13 +515,11 @@ static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo) pRaInfo->PTStage = temp_stage; } -static void -odm_RATxRPTTimerSetting( - struct odm_dm_struct *dm_odm, - u16 minRptTime -) +static void odm_RATxRPTTimerSetting(struct odm_dm_struct *dm_odm, + u16 minRptTime) { - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" =====>odm_RATxRPTTimerSetting()\n")); + ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + (" =====>%s()\n", __func__)); if (dm_odm->CurrminRptTime != minRptTime) { ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, @@ -541,7 +527,8 @@ odm_RATxRPTTimerSetting( rtw_rpt_timer_cfg_cmd(dm_odm->Adapter, minRptTime); dm_odm->CurrminRptTime = minRptTime; } - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" <===== odm_RATxRPTTimerSetting()\n")); + ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + (" <===== %s()\n", __func__)); } int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid) @@ -551,7 +538,7 @@ int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid) u8 max_rate_idx = 0x13; /* MCS7 */ if (dm_odm->pWirelessMode) - WirelessMode = *(dm_odm->pWirelessMode); + WirelessMode = *dm_odm->pWirelessMode; if (WirelessMode != 0xFF) { if (WirelessMode & ODM_WM_N24G) @@ -563,8 +550,8 @@ int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid) } ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("ODM_RAInfo_Init(): WirelessMode:0x%08x , max_raid_idx:0x%02x\n", - WirelessMode, max_rate_idx)); + ("%s(): WirelessMode:0x%08x , max_raid_idx:0x%02x\n", + __func__, WirelessMode, max_rate_idx)); pRaInfo->DecisionRate = max_rate_idx; pRaInfo->PreRate = max_rate_idx; @@ -576,8 +563,8 @@ int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid) pRaInfo->PreRssiStaRA = 0; pRaInfo->SGIEnable = 0; pRaInfo->RAUseRate = 0xffffffff; - pRaInfo->NscDown = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; - pRaInfo->NscUp = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; + pRaInfo->NscDown = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2; + pRaInfo->NscUp = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2; pRaInfo->RateSGI = 0; pRaInfo->Active = 1; /* Active is not used at present. by page, 110819 */ pRaInfo->RptTime = 0x927c; @@ -632,7 +619,7 @@ u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid) return 0; DecisionRate = dm_odm->RAInfo[macid].DecisionRate; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" macid =%d DecisionRate = 0x%x\n", macid, DecisionRate)); + (" macid =%d DecisionRate = 0x%x\n", macid, DecisionRate)); return DecisionRate; } @@ -658,7 +645,7 @@ void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rate ("macid =%d RateID = 0x%x RateMask = 0x%x SGIEnable =%d\n", macid, RateID, RateMask, SGIEnable)); - pRaInfo = &(dm_odm->RAInfo[macid]); + pRaInfo = &dm_odm->RAInfo[macid]; pRaInfo->RateID = RateID; pRaInfo->RateMask = RateMask; pRaInfo->SGIEnable = SGIEnable; @@ -674,7 +661,7 @@ void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi) ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" macid =%d Rssi =%d\n", macid, Rssi)); - pRaInfo = &(dm_odm->RAInfo[macid]); + pRaInfo = &dm_odm->RAInfo[macid]; pRaInfo->RssiStaRA = Rssi; } @@ -694,8 +681,8 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 u16 minRptTime = 0x927c; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("=====>ODM_RA_TxRPT2Handle_8188E(): valid0 =%d valid1 =%d BufferLength =%d\n", - macid_entry0, macid_entry1, TxRPT_Len)); + ("=====>%s(): valid0 =%d valid1 =%d BufferLength =%d\n", + __func__, macid_entry0, macid_entry1, TxRPT_Len)); ItemNum = TxRPT_Len >> 3; pBuffer = TxRPT_Buf; @@ -708,7 +695,7 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 else valid = (1 << MacId) & macid_entry0; - pRAInfo = &(dm_odm->RAInfo[MacId]); + pRAInfo = &dm_odm->RAInfo[MacId]; if (valid) { pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer); pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer); @@ -769,5 +756,6 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 odm_RATxRPTTimerSetting(dm_odm, minRptTime); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n")); + ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, + ("<===== %s()\n", __func__)); } diff --git a/drivers/staging/rtl8188eu/hal/odm.c b/drivers/staging/rtl8188eu/hal/odm.c index 4ab490c1c13b..ba3c3e5a8216 100644 --- a/drivers/staging/rtl8188eu/hal/odm.c +++ b/drivers/staging/rtl8188eu/hal/odm.c @@ -209,17 +209,8 @@ void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue) { - /* Hook call by reference pointer. */ - switch (CmnInfo) { - /* Dynamic call by reference pointer. */ - case ODM_CMNINFO_STA_STATUS: + if (CmnInfo == ODM_CMNINFO_STA_STATUS) pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue; - break; - /* To remove the compiler warning, must add an empty default statement to handle the other values. */ - default: - /* do nothing */ - break; - } } void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) @@ -1025,10 +1016,10 @@ void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm) pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false; Adapter->recvpriv.bIsAnyNonBEPkts = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VO_PARAM))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VI_PARAM))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BE_PARAM))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BK_PARAM))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Original VO PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VO_PARAM))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Original VI PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VI_PARAM))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Original BE PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BE_PARAM))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Original BK PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BK_PARAM))); } /* ODM_InitEdcaTurbo */ void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) diff --git a/drivers/staging/rtl8188eu/hal/odm_hwconfig.c b/drivers/staging/rtl8188eu/hal/odm_hwconfig.c index 82d6b2e18b29..7ae476ffcd8c 100644 --- a/drivers/staging/rtl8188eu/hal/odm_hwconfig.c +++ b/drivers/staging/rtl8188eu/hal/odm_hwconfig.c @@ -53,20 +53,11 @@ static s32 odm_signal_scale_mapping(struct odm_dm_struct *dm_odm, s32 currsig) static u8 odm_evm_db_to_percentage(s8 value) { /* -33dB~0dB to 0%~99% */ - s8 ret_val; - - ret_val = value; - - if (ret_val >= 0) - ret_val = 0; - if (ret_val <= -33) - ret_val = -33; - - ret_val = 0 - ret_val; - ret_val *= 3; + s8 ret_val = clamp(-value, 0, 33) * 3; if (ret_val == 99) ret_val = 100; + return ret_val; } @@ -76,23 +67,24 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, struct odm_per_pkt_info *pPktinfo) { struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table; - u8 i, Max_spatial_stream; + u8 i, max_spatial_stream; s8 rx_pwr[4], rx_pwr_all = 0; u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT; u8 RSSI, total_rssi = 0; - u8 isCCKrate = 0; + bool is_cck_rate; u8 rf_rx_num = 0; u8 cck_highpwr = 0; u8 LNA_idx, VGA_idx; struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus; - isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false; + is_cck_rate = pPktinfo->Rate >= DESC92C_RATE1M && + pPktinfo->Rate <= DESC92C_RATE11M; pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1; pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1; - if (isCCKrate) { + if (is_cck_rate) { u8 cck_agc_rpt; dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++; @@ -224,11 +216,11 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, /* (3)EVM of HT rate */ if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15) - Max_spatial_stream = 2; /* both spatial stream make sense */ + max_spatial_stream = 2; /* both spatial stream make sense */ else - Max_spatial_stream = 1; /* only spatial stream 1 makes sense */ + max_spatial_stream = 1; /* only spatial stream 1 makes sense */ - for (i = 0; i < Max_spatial_stream; i++) { + for (i = 0; i < max_spatial_stream; i++) { /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */ /* fill most significant bit to "zero" when doing shifting operation which may change a negative */ /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */ @@ -243,7 +235,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, } /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */ /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */ - if (isCCKrate) { + if (is_cck_rate) { pPhyInfo->SignalStrength = (u8)(odm_signal_scale_mapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */ } else { if (rf_rx_num != 0) @@ -264,7 +256,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, { s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK; s32 UndecoratedSmoothedOFDM, RSSI_Ave; - u8 isCCKrate = 0; + bool is_cck_rate; u8 RSSI_max, RSSI_min, i; u32 OFDM_pkt = 0; u32 Weighting = 0; @@ -280,7 +272,8 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, if ((!pPktinfo->bPacketMatchBSSID)) return; - isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false; + is_cck_rate = pPktinfo->Rate >= DESC92C_RATE1M && + pPktinfo->Rate <= DESC92C_RATE11M; /* Smart Antenna Debug Message------------------ */ @@ -308,7 +301,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { - if (!isCCKrate) { /* ofdm rate */ + if (!is_cck_rate) { /* ofdm rate */ if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_B] == 0) { RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A]; } else { diff --git a/drivers/staging/rtl8188eu/hal/phy.c b/drivers/staging/rtl8188eu/hal/phy.c index 482d48e003b7..51c40abfafaa 100644 --- a/drivers/staging/rtl8188eu/hal/phy.c +++ b/drivers/staging/rtl8188eu/hal/phy.c @@ -437,9 +437,9 @@ void rtl88eu_dm_txpower_tracking_callback_thermalmeter(struct adapter *adapt) thermal_val = (u8)(thermal_avg / thermal_avg_count); if (dm_odm->RFCalibrateInfo.bDoneTxpower && - !dm_odm->RFCalibrateInfo.bReloadtxpowerindex) + !dm_odm->RFCalibrateInfo.bReloadtxpowerindex) { delta = abs(thermal_val - dm_odm->RFCalibrateInfo.ThermalValue); - else { + } else { delta = abs(thermal_val - hal_data->EEPROMThermalMeter); if (dm_odm->RFCalibrateInfo.bReloadtxpowerindex) { dm_odm->RFCalibrateInfo.bReloadtxpowerindex = false; @@ -1225,15 +1225,10 @@ void rtl88eu_phy_iq_calibrate(struct adapter *adapt, bool recovery) return; } - for (i = 0; i < 8; i++) { - result[0][i] = 0; - result[1][i] = 0; - result[2][i] = 0; - if ((i == 0) || (i == 2) || (i == 4) || (i == 6)) - result[3][i] = 0x100; - else - result[3][i] = 0; - } + memset(result, 0, sizeof(result)); + for (i = 0; i < 8; i += 2) + result[3][i] = 0x100; + final = 0xff; pathaok = false; pathbok = false; diff --git a/drivers/staging/rtl8188eu/hal/rf.c b/drivers/staging/rtl8188eu/hal/rf.c index 81e30a1a6bfd..6fe4daea8fd5 100644 --- a/drivers/staging/rtl8188eu/hal/rf.c +++ b/drivers/staging/rtl8188eu/hal/rf.c @@ -164,20 +164,9 @@ static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel, /* increase power diff defined by Realtek for regulatory */ if (hal_data->pwrGroupCnt == 1) chnlGroup = 0; - if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup) { - if (channel < 3) - chnlGroup = 0; - else if (channel < 6) - chnlGroup = 1; - else if (channel < 9) - chnlGroup = 2; - else if (channel < 12) - chnlGroup = 3; - else if (channel < 14) - chnlGroup = 4; - else if (channel == 14) - chnlGroup = 5; - } + if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup) + Hal_GetChnlGroup88E(channel, &chnlGroup); + write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] + ((index < 2) ? powerbase0[rf] : powerbase1[rf]); break; diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c b/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c index b832bbf202a5..47352f210c0b 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c @@ -22,7 +22,7 @@ static u8 _is_fw_read_cmd_down(struct adapter *adapt, u8 msgbox_num) { u8 read_down = false; - int retry_cnts = 100; + int retry_cnts = 100; u8 valid; @@ -90,15 +90,14 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p /* Write Ext command */ msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE); - for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++) { + for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++) usb_write8(adapt, msgbox_ex_addr+cmd_idx, *((u8 *)(&h2c_cmd_ex)+cmd_idx)); - } } /* Write command */ msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE); - for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) { + for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) usb_write8(adapt, msgbox_addr+cmd_idx, *((u8 *)(&h2c_cmd)+cmd_idx)); - } + bcmd_down = true; adapt->HalData->LastHMEBoxNum = @@ -119,7 +118,6 @@ exit: void rtw_hal_add_ra_tid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level) { struct odm_dm_struct *odmpriv = &pAdapter->HalData->odmpriv; - u8 macid, init_rate, raid, shortGIrate = false; macid = arg&0x1f; @@ -212,9 +210,9 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength) struct ieee80211_hdr *pwlanhdr; __le16 *fctrl; u32 rate_len, pktlen; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); + struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; pwlanhdr = (struct ieee80211_hdr *)pframe; @@ -223,7 +221,7 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength) *(fctrl) = 0; ether_addr_copy(pwlanhdr->addr1, bc_addr); - ether_addr_copy(pwlanhdr->addr2, myid(&(adapt->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, cur_network->MacAddress); SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); @@ -258,7 +256,7 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength) /* below for ad-hoc mode */ /* SSID */ - pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); + pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->ssid.ssid_length, cur_network->ssid.ssid, &pktlen); /* supported rates... */ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); @@ -295,10 +293,10 @@ _ConstructBeacon: static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength) { struct ieee80211_hdr *pwlanhdr; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; __le16 *fctrl; - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; pwlanhdr = (struct ieee80211_hdr *)pframe; @@ -315,7 +313,7 @@ static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength) ether_addr_copy(pwlanhdr->addr1, pnetwork->MacAddress); /* TA. */ - ether_addr_copy(pwlanhdr->addr2, myid(&(adapt->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv)); *pLength = 16; } @@ -332,10 +330,10 @@ static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe, __le16 *fctrl; u32 pktlen; struct mlme_priv *pmlmepriv = &adapt->mlmepriv; - struct wlan_network *cur_network = &pmlmepriv->cur_network; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *pnetwork = &(pmlmeinfo->network); + struct wlan_network *cur_network = &pmlmepriv->cur_network; + struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network; pwlanhdr = (struct ieee80211_hdr *)pframe; @@ -348,19 +346,19 @@ static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe, case Ndis802_11Infrastructure: SetToDs(fctrl); ether_addr_copy(pwlanhdr->addr1, pnetwork->MacAddress); - ether_addr_copy(pwlanhdr->addr2, myid(&(adapt->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, StaAddr); break; case Ndis802_11APMode: SetFrDs(fctrl); ether_addr_copy(pwlanhdr->addr1, StaAddr); ether_addr_copy(pwlanhdr->addr2, pnetwork->MacAddress); - ether_addr_copy(pwlanhdr->addr3, myid(&(adapt->eeprompriv))); + ether_addr_copy(pwlanhdr->addr3, myid(&adapt->eeprompriv)); break; case Ndis802_11IBSS: default: ether_addr_copy(pwlanhdr->addr1, StaAddr); - ether_addr_copy(pwlanhdr->addr2, myid(&(adapt->eeprompriv))); + ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv)); ether_addr_copy(pwlanhdr->addr3, pnetwork->MacAddress); break; } @@ -392,13 +390,13 @@ static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u __le16 *fctrl; u8 *mac, *bssid; u32 pktlen; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); + struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; pwlanhdr = (struct ieee80211_hdr *)pframe; - mac = myid(&(adapt->eeprompriv)); + mac = myid(&adapt->eeprompriv); bssid = cur_network->MacAddress; fctrl = &pwlanhdr->frame_control; @@ -435,11 +433,11 @@ static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u /* 2009.10.15 by tynli. */ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) { - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; struct xmit_priv *pxmitpriv; struct mlme_ext_priv *pmlmeext; - struct mlme_ext_info *pmlmeinfo; + struct mlme_ext_info *pmlmeinfo; u32 BeaconLength = 0, ProbeRspLength = 0, PSPollLength; u32 NullDataLength, QosNullLength; u8 *ReservedPagePacket; @@ -459,7 +457,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) pxmitpriv = &adapt->xmitpriv; pmlmeext = &adapt->mlmeextpriv; pmlmeinfo = &pmlmeext->mlmext_info; - pnetwork = &(pmlmeinfo->network); + pnetwork = &pmlmeinfo->network; TxDescLen = TXDESC_SIZE; PageNum = 0; @@ -477,7 +475,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) PageNum += PageNeed; adapt->HalData->FwRsvdPageStartOffset = PageNum; - BufIndex += PageNeed*128; + BufIndex += PageNeed * 128; /* 3 (2) ps-poll *1 page */ RsvdPageLoc.LocPsPoll = PageNum; @@ -487,7 +485,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength); PageNum += PageNeed; - BufIndex += PageNeed*128; + BufIndex += PageNeed * 128; /* 3 (3) null data * 1 page */ RsvdPageLoc.LocNullData = PageNum; @@ -497,7 +495,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength); PageNum += PageNeed; - BufIndex += PageNeed*128; + BufIndex += PageNeed * 128; /* 3 (4) probe response * 1page */ RsvdPageLoc.LocProbeRsp = PageNum; @@ -507,7 +505,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) PageNeed = (u8)PageNum_128(TxDescLen + ProbeRspLength); PageNum += PageNeed; - BufIndex += PageNeed*128; + BufIndex += PageNeed * 128; /* 3 (5) Qos null data */ RsvdPageLoc.LocQosNull = PageNum; @@ -543,10 +541,10 @@ exit: void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) { struct hal_data_8188e *haldata = adapt->HalData; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - bool bSendBeacon = false; - bool bcn_valid = false; + struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + bool bSendBeacon = false; + bool bcn_valid = false; u8 DLBcnCount = 0; u32 poll = 0; diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c index 31e80d693f32..086f98d38cba 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c @@ -232,9 +232,8 @@ s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) /* Let last entry point to the start entry of ring buffer */ status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy); - if (status != _SUCCESS) { + if (status != _SUCCESS) return status; - } } return status; @@ -373,7 +372,7 @@ static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, } } -static void Hal_GetChnlGroup88E(u8 chnl, u8 *group) +void Hal_GetChnlGroup88E(u8 chnl, u8 *group) { if (chnl < 3) /* Channel 1-2 */ *group = 0; diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c b/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c index 412b76271a3d..35806b27fdee 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188eu_led.c @@ -10,60 +10,46 @@ #include <rtl8188e_hal.h> #include <usb_ops_linux.h> -/* LED object. */ - -/* LED_819xUsb routines. */ -/* Description: */ -/* Turn on LED according to LedPin specified. */ -void SwLedOn(struct adapter *padapter, struct LED_871x *pLed) +void sw_led_on(struct adapter *padapter, struct LED_871x *pLed) { - u8 LedCfg; + u8 led_cfg; if (padapter->bSurpriseRemoved || padapter->bDriverStopped) return; - LedCfg = usb_read8(padapter, REG_LEDCFG2); - usb_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0) | BIT(5) | BIT(6)); /* SW control led0 on. */ + led_cfg = usb_read8(padapter, REG_LEDCFG2); + usb_write8(padapter, REG_LEDCFG2, (led_cfg & 0xf0) | BIT(5) | BIT(6)); pLed->bLedOn = true; } -/* Description: */ -/* Turn off LED according to LedPin specified. */ -void SwLedOff(struct adapter *padapter, struct LED_871x *pLed) +void sw_led_off(struct adapter *padapter, struct LED_871x *pLed) { - u8 LedCfg; + u8 led_cfg; if (padapter->bSurpriseRemoved || padapter->bDriverStopped) goto exit; - LedCfg = usb_read8(padapter, REG_LEDCFG2);/* 0x4E */ + led_cfg = usb_read8(padapter, REG_LEDCFG2);/* 0x4E */ /* Open-drain arrangement for controlling the LED) */ - LedCfg &= 0x90; /* Set to software control. */ - usb_write8(padapter, REG_LEDCFG2, (LedCfg | BIT(3))); - LedCfg = usb_read8(padapter, REG_MAC_PINMUX_CFG); - LedCfg &= 0xFE; - usb_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); + led_cfg &= 0x90; /* Set to software control. */ + usb_write8(padapter, REG_LEDCFG2, (led_cfg | BIT(3))); + led_cfg = usb_read8(padapter, REG_MAC_PINMUX_CFG); + led_cfg &= 0xFE; + usb_write8(padapter, REG_MAC_PINMUX_CFG, led_cfg); exit: pLed->bLedOn = false; } -/* Interface to manipulate LED objects. */ -/* Default LED behavior. */ - -/* Description: */ -/* Initialize all LED_871x objects. */ void rtw_hal_sw_led_init(struct adapter *padapter) { - struct led_priv *pledpriv = &(padapter->ledpriv); + struct led_priv *pledpriv = &padapter->ledpriv; - InitLed871x(padapter, &(pledpriv->SwLed0)); + InitLed871x(padapter, &pledpriv->sw_led); } -/* Description: */ -/* DeInitialize all LED_819xUsb objects. */ void rtw_hal_sw_led_deinit(struct adapter *padapter) { - struct led_priv *ledpriv = &(padapter->ledpriv); + struct led_priv *ledpriv = &padapter->ledpriv; - DeInitLed871x(&(ledpriv->SwLed0)); + DeInitLed871x(&ledpriv->sw_led); } diff --git a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c b/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c index a11bee16d070..9e5f23392d58 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c @@ -412,7 +412,8 @@ static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) return len; } -s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitpriv) +bool rtl8188eu_xmitframe_complete(struct adapter *adapt, + struct xmit_priv *pxmitpriv) { struct xmit_frame *pxmitframe = NULL; struct xmit_frame *pfirstframe = NULL; @@ -439,14 +440,14 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n")); pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if (pxmitbuf == NULL) + if (!pxmitbuf) return false; /* 3 1. pick up first frame */ rtw_free_xmitframe(pxmitpriv, pxmitframe); pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); - if (pxmitframe == NULL) { + if (!pxmitframe) { /* no more xmit frame, release xmit buffer */ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); return false; @@ -597,7 +598,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp * true dump packet directly * false enqueue packet */ -s32 rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe) +bool rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe) { s32 res; struct xmit_buf *pxmitbuf = NULL; @@ -610,7 +611,7 @@ s32 rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe) if (rtw_txframes_sta_ac_pending(adapt, pattrib) > 0) goto enqueue; - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == true) + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING)) goto enqueue; pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); diff --git a/drivers/staging/rtl8188eu/include/hal_intf.h b/drivers/staging/rtl8188eu/include/hal_intf.h index e5be27af7bf5..8b65fcba1967 100644 --- a/drivers/staging/rtl8188eu/include/hal_intf.h +++ b/drivers/staging/rtl8188eu/include/hal_intf.h @@ -185,7 +185,7 @@ u32 rtw_hal_inirp_init(struct adapter *padapter); void rtw_hal_inirp_deinit(struct adapter *padapter); void usb_intf_stop(struct adapter *padapter); -s32 rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe); +bool rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe); s32 rtw_hal_mgnt_xmit(struct adapter *padapter, struct xmit_frame *pmgntframe); diff --git a/drivers/staging/rtl8188eu/include/odm.h b/drivers/staging/rtl8188eu/include/odm.h index 947481de9cb1..8245cea2feef 100644 --- a/drivers/staging/rtl8188eu/include/odm.h +++ b/drivers/staging/rtl8188eu/include/odm.h @@ -1045,7 +1045,6 @@ extern u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8]; void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal); void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm); -void odm_DIGbyRSSI_LPS(struct odm_dm_struct *pDM_Odm); void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres); bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState); diff --git a/drivers/staging/rtl8188eu/include/odm_hwconfig.h b/drivers/staging/rtl8188eu/include/odm_hwconfig.h index 8cef32dc6350..2cd8a47a3673 100644 --- a/drivers/staging/rtl8188eu/include/odm_hwconfig.h +++ b/drivers/staging/rtl8188eu/include/odm_hwconfig.h @@ -93,18 +93,9 @@ struct phy_status_rpt { #endif }; -void odm_Init_RSSIForDM(struct odm_dm_struct *pDM_Odm); - void ODM_PhyStatusQuery(struct odm_dm_struct *pDM_Odm, struct odm_phy_status_info *pPhyInfo, u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo); -void ODM_MacStatusQuery(struct odm_dm_struct *pDM_Odm, - u8 *pMacStatus, - u8 MacID, - bool bPacketMatchBSSID, - bool bPacketToSelf, - bool bPacketBeacon); - #endif diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h index a86b07d3c82a..eb4655ecf6e0 100644 --- a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h +++ b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h @@ -329,6 +329,8 @@ struct hal_data_8188e { u8 UsbRxAggPageTimeout; }; +void Hal_GetChnlGroup88E(u8 chnl, u8 *group); + /* rtl8188e_hal_init.c */ void _8051Reset88E(struct adapter *padapter); void rtl8188e_InitializeFirmwareVars(struct adapter *padapter); diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_xmit.h b/drivers/staging/rtl8188eu/include/rtl8188e_xmit.h index 20d35480dab8..421e9f45306f 100644 --- a/drivers/staging/rtl8188eu/include/rtl8188e_xmit.h +++ b/drivers/staging/rtl8188eu/include/rtl8188e_xmit.h @@ -149,8 +149,8 @@ s32 rtl8188eu_init_xmit_priv(struct adapter *padapter); s32 rtl8188eu_xmit_buf_handler(struct adapter *padapter); #define hal_xmit_handler rtl8188eu_xmit_buf_handler void rtl8188eu_xmit_tasklet(void *priv); -s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, - struct xmit_priv *pxmitpriv); +bool rtl8188eu_xmitframe_complete(struct adapter *padapter, + struct xmit_priv *pxmitpriv); void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf); diff --git a/drivers/staging/rtl8188eu/include/rtw_led.h b/drivers/staging/rtl8188eu/include/rtw_led.h index e50237ab05c4..ee62ed76a465 100644 --- a/drivers/staging/rtl8188eu/include/rtw_led.h +++ b/drivers/staging/rtl8188eu/include/rtw_led.h @@ -76,12 +76,10 @@ struct LED_871x { ((struct LED_871x *)_LED_871x)->CurrLedState == LED_BLINK_WPS_STOP || \ ((struct LED_871x *)_LED_871x)->bLedWPSBlinkInProgress) -void LedControl8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction); +void led_control_8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction); struct led_priv { - /* add for led control */ - struct LED_871x SwLed0; - /* add for led control */ + struct LED_871x sw_led; }; void BlinkWorkItemCallback(struct work_struct *work); @@ -93,8 +91,8 @@ void InitLed871x(struct adapter *padapter, struct LED_871x *pLed); void DeInitLed871x(struct LED_871x *pLed); /* hal... */ -void BlinkHandler(struct LED_871x *pLed); -void SwLedOn(struct adapter *padapter, struct LED_871x *pLed); -void SwLedOff(struct adapter *padapter, struct LED_871x *pLed); +void blink_handler(struct LED_871x *pLed); +void sw_led_on(struct adapter *padapter, struct LED_871x *pLed); +void sw_led_off(struct adapter *padapter, struct LED_871x *pLed); #endif /* __RTW_LED_H_ */ diff --git a/drivers/staging/rtl8188eu/include/rtw_mlme.h b/drivers/staging/rtl8188eu/include/rtw_mlme.h index 8d9d663f0645..bfef66525944 100644 --- a/drivers/staging/rtl8188eu/include/rtw_mlme.h +++ b/drivers/staging/rtl8188eu/include/rtw_mlme.h @@ -211,9 +211,9 @@ int hostapd_mode_init(struct adapter *padapter); void hostapd_mode_unload(struct adapter *padapter); #endif -extern unsigned char WPA_TKIP_CIPHER[4]; -extern unsigned char RSN_TKIP_CIPHER[4]; -extern unsigned char REALTEK_96B_IE[]; +extern const u8 WPA_TKIP_CIPHER[4]; +extern const u8 RSN_TKIP_CIPHER[4]; +extern u8 REALTEK_96B_IE[]; extern const u8 MCS_rate_1R[16]; void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf); @@ -285,7 +285,7 @@ static inline void _clr_fwstate_(struct mlme_priv *pmlmepriv, int state) static inline void clr_fwstate(struct mlme_priv *pmlmepriv, int state) { spin_lock_bh(&pmlmepriv->lock); - if (check_fwstate(pmlmepriv, state) == true) + if (check_fwstate(pmlmepriv, state)) pmlmepriv->fw_state ^= state; spin_unlock_bh(&pmlmepriv->lock); } diff --git a/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h b/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h index 9526da3efcc4..1fb2349bd0a0 100644 --- a/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h +++ b/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h @@ -80,15 +80,8 @@ #define _48M_RATE_ 10 #define _54M_RATE_ 11 - -extern unsigned char RTW_WPA_OUI[]; -extern unsigned char WMM_OUI[]; -extern unsigned char WPS_OUI[]; -extern unsigned char WFD_OUI[]; -extern unsigned char P2P_OUI[]; - -extern unsigned char WMM_INFO_OUI[]; -extern unsigned char WMM_PARA_OUI[]; +extern const u8 RTW_WPA_OUI[]; +extern const u8 WPS_OUI[]; /* Channel Plan Type. */ /* Note: */ @@ -580,8 +573,8 @@ void addba_timer_hdl(struct timer_list *t); mod_timer(&mlmeext->link_timer, jiffies + \ msecs_to_jiffies(ms)) -int cckrates_included(unsigned char *rate, int ratelen); -int cckratesonly_included(unsigned char *rate, int ratelen); +bool cckrates_included(unsigned char *rate, int ratelen); +bool cckratesonly_included(unsigned char *rate, int ratelen); void process_addba_req(struct adapter *padapter, u8 *paddba_req, u8 *addr); diff --git a/drivers/staging/rtl8188eu/include/rtw_recv.h b/drivers/staging/rtl8188eu/include/rtw_recv.h index 54b7ba367293..8fc500496f92 100644 --- a/drivers/staging/rtl8188eu/include/rtw_recv.h +++ b/drivers/staging/rtl8188eu/include/rtw_recv.h @@ -27,7 +27,7 @@ /* for Rx reordering buffer control */ struct recv_reorder_ctrl { struct adapter *padapter; - u8 enable; + bool enable; u16 indicate_seq;/* wstart_b, init_value=0xffff */ u16 wend_b; u8 wsize_b; diff --git a/drivers/staging/rtl8188eu/include/rtw_sreset.h b/drivers/staging/rtl8188eu/include/rtw_sreset.h index 3ee6a4a7847d..ea3c0d93bf0b 100644 --- a/drivers/staging/rtl8188eu/include/rtw_sreset.h +++ b/drivers/staging/rtl8188eu/include/rtw_sreset.h @@ -11,7 +11,7 @@ #include <drv_types.h> struct sreset_priv { - u8 Wifi_Error_Status; + u8 wifi_error_status; }; #include <rtl8188e_hal.h> diff --git a/drivers/staging/rtl8188eu/include/rtw_xmit.h b/drivers/staging/rtl8188eu/include/rtw_xmit.h index 788f59c74ea1..ba7e15fbde72 100644 --- a/drivers/staging/rtl8188eu/include/rtw_xmit.h +++ b/drivers/staging/rtl8188eu/include/rtw_xmit.h @@ -336,7 +336,7 @@ s32 rtw_txframes_sta_ac_pending(struct adapter *padapter, void rtw_init_hwxmits(struct hw_xmit *phwxmit, int entry); s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter); void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv); -void rtw_alloc_hwxmits(struct adapter *padapter); +s32 rtw_alloc_hwxmits(struct adapter *padapter); void rtw_free_hwxmits(struct adapter *padapter); s32 rtw_xmit(struct adapter *padapter, struct sk_buff **pkt); diff --git a/drivers/staging/rtl8188eu/include/wifi.h b/drivers/staging/rtl8188eu/include/wifi.h index 0664d5f30a96..5e91b9428c16 100644 --- a/drivers/staging/rtl8188eu/include/wifi.h +++ b/drivers/staging/rtl8188eu/include/wifi.h @@ -791,18 +791,6 @@ enum ht_cap_ampdu_factor { #define WPS_CM_SW_DISPLAY_P 0x2008 #define WPS_CM_LCD_DISPLAY_P 0x4008 -#define P2P_PRIVATE_IOCTL_SET_LEN 64 - -enum P2P_PROTO_WK_ID { - P2P_FIND_PHASE_WK = 0, - P2P_RESTORE_STATE_WK = 1, - P2P_PRE_TX_PROVDISC_PROCESS_WK = 2, - P2P_PRE_TX_NEGOREQ_PROCESS_WK = 3, - P2P_PRE_TX_INVITEREQ_PROCESS_WK = 4, - P2P_AP_P2P_CH_SWITCH_PROCESS_WK = 5, - P2P_RO_CH_WK = 6, -}; - /* =====================WFD Section===================== */ /* For Wi-Fi Display */ #define WFD_ATTR_DEVICE_INFO 0x00 diff --git a/drivers/staging/rtl8188eu/include/wlan_bssdef.h b/drivers/staging/rtl8188eu/include/wlan_bssdef.h index 5e13a6ddf083..8462c9c2fd39 100644 --- a/drivers/staging/rtl8188eu/include/wlan_bssdef.h +++ b/drivers/staging/rtl8188eu/include/wlan_bssdef.h @@ -17,8 +17,8 @@ #define NDIS_802_11_RSSI long /* in dBm */ struct ndis_802_11_ssid { - u32 SsidLength; - u8 Ssid[32]; + u32 ssid_length; + u8 ssid[32]; }; enum NDIS_802_11_NETWORK_TYPE { @@ -180,7 +180,7 @@ struct wlan_bssid_ex { u32 Length; unsigned char MacAddress[ETH_ALEN]; u8 Reserved[2];/* 0]: IS beacon frame */ - struct ndis_802_11_ssid Ssid; + struct ndis_802_11_ssid ssid; u32 Privacy; NDIS_802_11_RSSI Rssi;/* in dBM,raw data ,get from PHY) */ enum NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; diff --git a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c index 4ecd2ff48c41..eaa4adb32a0d 100644 --- a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c @@ -116,8 +116,8 @@ static char *translate_scan(struct adapter *padapter, /* Add the ESSID */ iwe.cmd = SIOCGIWESSID; iwe.u.data.flags = 1; - iwe.u.data.length = min_t(u16, pnetwork->network.Ssid.SsidLength, 32); - start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid); + iwe.u.data.length = min_t(u16, pnetwork->network.ssid.ssid_length, 32); + start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.ssid.ssid); /* parsing HT_CAP_IE */ p = rtw_get_ie(&pnetwork->network.ies[12], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.ie_length-12); @@ -195,7 +195,7 @@ static char *translate_scan(struct adapter *padapter, else iwe.u.data.flags = IW_ENCODE_DISABLED; iwe.u.data.length = 0; - start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid); + start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.ssid.ssid); /*Add basic and extended rates */ max_rate = 0; @@ -235,7 +235,7 @@ static char *translate_scan(struct adapter *padapter, u8 *p; rtw_get_sec_ie(pnetwork->network.ies, pnetwork->network.ie_length, rsn_ie, &rsn_len, wpa_ie, &wpa_len); - RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_wx_get_scan: ssid =%s\n", pnetwork->network.Ssid.Ssid)); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_wx_get_scan: ssid =%s\n", pnetwork->network.ssid.ssid)); RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_wx_get_scan: wpa_len =%d rsn_len =%d\n", wpa_len, rsn_len)); if (wpa_len > 0) { @@ -296,7 +296,7 @@ static char *translate_scan(struct adapter *padapter, iwe.cmd = IWEVQUAL; iwe.u.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | IW_QUAL_NOISE_INVALID; - if (check_fwstate(pmlmepriv, _FW_LINKED) == true && + if (check_fwstate(pmlmepriv, _FW_LINKED) && is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network)) { ss = padapter->recvpriv.signal_strength; sq = padapter->recvpriv.signal_qual; @@ -631,7 +631,7 @@ static int rtw_wx_get_name(struct net_device *dev, RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("cmd_code =%x\n", info->cmd)); - if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == true) { + if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE)) { /* parsing HT_CAP_IE */ p = rtw_get_ie(&pcur_bss->ies[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->ie_length-12); if (p && ht_ielen > 0) @@ -1024,9 +1024,9 @@ static int rtw_wx_get_wap(struct net_device *dev, RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_wx_get_wap\n")); - if (((check_fwstate(pmlmepriv, _FW_LINKED)) == true) || - ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == true) || - ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) == true)) + if (check_fwstate(pmlmepriv, _FW_LINKED) || + check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) || + check_fwstate(pmlmepriv, WIFI_AP_STATE)) memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN); else eth_zero_addr(wrqu->ap_addr.sa_data); @@ -1124,8 +1124,8 @@ static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, int len = min_t(int, req->essid_len, IW_ESSID_MAX_SIZE); - memcpy(ssid[0].Ssid, req->essid, len); - ssid[0].SsidLength = len; + memcpy(ssid[0].ssid, req->essid, len); + ssid[0].ssid_length = len; DBG_88E("IW_SCAN_THIS_ESSID, ssid =%s, len =%d\n", req->essid, req->essid_len); @@ -1158,8 +1158,8 @@ static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, } sec_len = *(pos++); len -= 1; if (sec_len > 0 && sec_len <= len) { - ssid[ssid_index].SsidLength = sec_len; - memcpy(ssid[ssid_index].Ssid, pos, ssid[ssid_index].SsidLength); + ssid[ssid_index].ssid_length = sec_len; + memcpy(ssid[ssid_index].ssid, pos, ssid[ssid_index].ssid_length); ssid_index++; } pos += sec_len; @@ -1310,9 +1310,9 @@ static int rtw_wx_set_essid(struct net_device *dev, DBG_88E("ssid =%s, len =%d\n", extra, wrqu->essid.length); memset(&ndis_ssid, 0, sizeof(struct ndis_802_11_ssid)); - ndis_ssid.SsidLength = len; - memcpy(ndis_ssid.Ssid, extra, len); - src_ssid = ndis_ssid.Ssid; + ndis_ssid.ssid_length = len; + memcpy(ndis_ssid.ssid, extra, len); + src_ssid = ndis_ssid.ssid; RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: ssid =[%s]\n", src_ssid)); spin_lock_bh(&queue->lock); @@ -1324,18 +1324,18 @@ static int rtw_wx_set_essid(struct net_device *dev, pmlmepriv->pscanned = pmlmepriv->pscanned->next; - dst_ssid = pnetwork->network.Ssid.Ssid; + dst_ssid = pnetwork->network.ssid.ssid; RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: dst_ssid =%s\n", - pnetwork->network.Ssid.Ssid)); + pnetwork->network.ssid.ssid)); - if ((!memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength)) && - (pnetwork->network.Ssid.SsidLength == ndis_ssid.SsidLength)) { + if ((!memcmp(dst_ssid, src_ssid, ndis_ssid.ssid_length)) && + (pnetwork->network.ssid.ssid_length == ndis_ssid.ssid_length)) { RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: find match, set infra mode\n")); - if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { if (pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) continue; } @@ -1378,8 +1378,8 @@ static int rtw_wx_get_essid(struct net_device *dev, if ((check_fwstate(pmlmepriv, _FW_LINKED)) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))) { - len = pcur_bss->Ssid.SsidLength; - memcpy(extra, pcur_bss->Ssid.Ssid, len); + len = pcur_bss->ssid.ssid_length; + memcpy(extra, pcur_bss->ssid.ssid, len); } else { len = 0; *extra = 0; @@ -1691,7 +1691,7 @@ static int rtw_wx_get_enc(struct net_device *dev, struct iw_point *erq = &(wrqu->encoding); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - if (check_fwstate(pmlmepriv, _FW_LINKED) != true) { + if (!check_fwstate(pmlmepriv, _FW_LINKED)) { if (!check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { erq->length = 0; erq->flags |= IW_ENCODE_DISABLED; @@ -2425,7 +2425,7 @@ static int rtw_set_beacon(struct net_device *dev, struct ieee_param *param, int DBG_88E("%s, len =%d\n", __func__, len); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return -EINVAL; memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); @@ -2517,7 +2517,7 @@ static int rtw_del_sta(struct net_device *dev, struct ieee_param *param) DBG_88E("rtw_del_sta =%pM\n", (param->sta_addr)); - if (check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != true) + if (!check_fwstate(pmlmepriv, _FW_LINKED | WIFI_AP_STATE)) return -EINVAL; if (is_broadcast_ether_addr(param->sta_addr)) @@ -2553,7 +2553,7 @@ static int rtw_ioctl_get_sta_data(struct net_device *dev, struct ieee_param *par DBG_88E("rtw_ioctl_get_sta_info, sta_addr: %pM\n", (param_ex->sta_addr)); - if (check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != true) + if (!check_fwstate(pmlmepriv, _FW_LINKED | WIFI_AP_STATE)) return -EINVAL; if (is_broadcast_ether_addr(param_ex->sta_addr)) @@ -2607,7 +2607,7 @@ static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) DBG_88E("rtw_get_sta_wpaie, sta_addr: %pM\n", (param->sta_addr)); - if (check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != true) + if (!check_fwstate(pmlmepriv, _FW_LINKED | WIFI_AP_STATE)) return -EINVAL; if (is_broadcast_ether_addr(param->sta_addr)) @@ -2645,7 +2645,7 @@ static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, DBG_88E("%s, len =%d\n", __func__, len); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return -EINVAL; ie_len = len-12-2;/* 12 = param header, 2:no packed */ @@ -2680,7 +2680,7 @@ static int rtw_set_wps_probe_resp(struct net_device *dev, struct ieee_param *par DBG_88E("%s, len =%d\n", __func__, len); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return -EINVAL; ie_len = len-12-2;/* 12 = param header, 2:no packed */ @@ -2710,7 +2710,7 @@ static int rtw_set_wps_assoc_resp(struct net_device *dev, struct ieee_param *par DBG_88E("%s, len =%d\n", __func__, len); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return -EINVAL; ie_len = len-12-2;/* 12 = param header, 2:no packed */ @@ -2742,7 +2742,7 @@ static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, u8 value; - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return -EINVAL; if (param->u.wpa_param.name != 0) /* dummy test... */ @@ -2762,7 +2762,7 @@ static int rtw_ioctl_acl_remove_sta(struct net_device *dev, struct ieee_param *p struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return -EINVAL; if (is_broadcast_ether_addr(param->sta_addr)) @@ -2776,7 +2776,7 @@ static int rtw_ioctl_acl_add_sta(struct net_device *dev, struct ieee_param *para struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return -EINVAL; if (is_broadcast_ether_addr(param->sta_addr)) @@ -2791,7 +2791,7 @@ static int rtw_ioctl_set_macaddr_acl(struct net_device *dev, struct ieee_param * struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return -EINVAL; rtw_set_macaddr_acl(padapter, param->u.mlme.command); diff --git a/drivers/staging/rtl8188eu/os_dep/mlme_linux.c b/drivers/staging/rtl8188eu/os_dep/mlme_linux.c index d5ceb3beabbc..9db11b16cb93 100644 --- a/drivers/staging/rtl8188eu/os_dep/mlme_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/mlme_linux.c @@ -13,7 +13,7 @@ void rtw_init_mlme_timer(struct adapter *padapter) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; timer_setup(&pmlmepriv->assoc_timer, _rtw_join_timeout_handler, 0); timer_setup(&pmlmepriv->scan_to_timer, rtw_scan_timeout_handler, 0); @@ -36,34 +36,38 @@ static struct rt_pmkid_list backup_pmkid[NUM_PMKID_CACHE]; void rtw_reset_securitypriv(struct adapter *adapter) { - u8 backup_index = 0; - u8 backup_counter = 0x00; - u32 backup_time = 0; - - if (adapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { - /* 802.1x */ - /* We have to backup the PMK information for WiFi PMK Caching test item. */ - /* Backup the btkip_countermeasure information. */ - /* When the countermeasure is trigger, the driver have to disconnect with AP for 60 seconds. */ - memcpy(&backup_pmkid[0], &adapter->securitypriv.PMKIDList[0], sizeof(struct rt_pmkid_list) * NUM_PMKID_CACHE); - backup_index = adapter->securitypriv.PMKIDIndex; - backup_counter = adapter->securitypriv.btkip_countermeasure; - backup_time = adapter->securitypriv.btkip_countermeasure_time; - memset((unsigned char *)&adapter->securitypriv, 0, sizeof(struct security_priv)); - - /* Restore the PMK information to securitypriv structure for the following connection. */ - memcpy(&adapter->securitypriv.PMKIDList[0], - &backup_pmkid[0], - sizeof(struct rt_pmkid_list) * NUM_PMKID_CACHE); - adapter->securitypriv.PMKIDIndex = backup_index; - adapter->securitypriv.btkip_countermeasure = backup_counter; - adapter->securitypriv.btkip_countermeasure_time = backup_time; - adapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; - adapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; + u8 backup_index; + u8 backup_counter; + u32 backup_time; + struct security_priv *psec_priv = &adapter->securitypriv; + + if (psec_priv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { + /* 802.1x + * We have to backup the PMK information for WiFi PMK Caching + * test item. Backup the btkip_countermeasure information. When + * the countermeasure is trigger, the driver have to disconnect + * with AP for 60 seconds. + */ + memcpy(backup_pmkid, psec_priv->PMKIDList, + sizeof(struct rt_pmkid_list) * NUM_PMKID_CACHE); + backup_index = psec_priv->PMKIDIndex; + backup_counter = psec_priv->btkip_countermeasure; + backup_time = psec_priv->btkip_countermeasure_time; + + memset(psec_priv, 0, sizeof(*psec_priv)); + + /* Restore the PMK information to securitypriv structure + * for the following connection. + */ + memcpy(psec_priv->PMKIDList, backup_pmkid, + sizeof(struct rt_pmkid_list) * NUM_PMKID_CACHE); + psec_priv->PMKIDIndex = backup_index; + psec_priv->btkip_countermeasure = backup_counter; + psec_priv->btkip_countermeasure_time = backup_time; + psec_priv->ndisauthtype = Ndis802_11AuthModeOpen; + psec_priv->ndisencryptstatus = Ndis802_11WEPDisabled; } else { /* reset values in securitypriv */ - struct security_priv *psec_priv = &adapter->securitypriv; - psec_priv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; psec_priv->dot11PrivacyAlgrthm = _NO_PRIVACY_; psec_priv->dot11PrivacyKeyIndex = 0; @@ -76,15 +80,16 @@ void rtw_reset_securitypriv(struct adapter *adapter) void rtw_os_indicate_disconnect(struct adapter *adapter) { - netif_carrier_off(adapter->pnetdev); /* Do it first for tx broadcast pkt after disconnection issue! */ + /* Do it first for tx broadcast pkt after disconnection issue! */ + netif_carrier_off(adapter->pnetdev); rtw_indicate_wx_disassoc_event(adapter); rtw_reset_securitypriv(adapter); } void rtw_report_sec_ie(struct adapter *adapter, u8 authmode, u8 *sec_ie) { - uint len; - u8 *buff, *p, i; + uint len; + u8 *buff, *p, i; union iwreq_data wrqu; RT_TRACE(_module_mlme_osdep_c_, _drv_info_, @@ -99,14 +104,13 @@ void rtw_report_sec_ie(struct adapter *adapter, u8 authmode, u8 *sec_ie) memset(buff, 0, IW_CUSTOM_MAX); p = buff; p += sprintf(p, "ASSOCINFO(ReqIEs ="); - len = sec_ie[1]+2; + len = sec_ie[1] + 2; len = min_t(uint, len, IW_CUSTOM_MAX); for (i = 0; i < len; i++) p += sprintf(p, "%02x", sec_ie[i]); p += sprintf(p, ")"); memset(&wrqu, 0, sizeof(wrqu)); - wrqu.data.length = p-buff; - wrqu.data.length = min_t(__u16, wrqu.data.length, IW_CUSTOM_MAX); + wrqu.data.length = min_t(__u16, p - buff, IW_CUSTOM_MAX); wireless_send_event(adapter->pnetdev, IWEVCUSTOM, &wrqu, buff); kfree(buff); } @@ -119,7 +123,7 @@ void init_addba_retry_timer(struct adapter *padapter, struct sta_info *psta) void init_mlme_ext_timer(struct adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; timer_setup(&pmlmeext->survey_timer, survey_timer_hdl, 0); timer_setup(&pmlmeext->link_timer, link_timer_hdl, 0); diff --git a/drivers/staging/rtl8188eu/os_dep/os_intfs.c b/drivers/staging/rtl8188eu/os_dep/os_intfs.c index dac9f98b4808..8dde5a40e253 100644 --- a/drivers/staging/rtl8188eu/os_dep/os_intfs.c +++ b/drivers/staging/rtl8188eu/os_dep/os_intfs.c @@ -131,18 +131,18 @@ MODULE_PARM_DESC(debug, "Set debug level (1-9) (default 1)"); static bool rtw_monitor_enable; module_param_named(monitor_enable, rtw_monitor_enable, bool, 0444); -MODULE_PARM_DESC(monitor_enable, "Enable monitor inferface (default: false)"); +MODULE_PARM_DESC(monitor_enable, "Enable monitor interface (default: false)"); static int netdev_close(struct net_device *pnetdev); static void loadparam(struct adapter *padapter, struct net_device *pnetdev) { - struct registry_priv *registry_par = &padapter->registrypriv; + struct registry_priv *registry_par = &padapter->registrypriv; GlobalDebugLevel = rtw_debug; - memcpy(registry_par->ssid.Ssid, "ANY", 3); - registry_par->ssid.SsidLength = 3; + memcpy(registry_par->ssid.ssid, "ANY", 3); + registry_par->ssid.ssid_length = 3; registry_par->channel = (u8)rtw_channel; registry_par->wireless_mode = (u8)rtw_wireless_mode; @@ -198,8 +198,8 @@ static int rtw_net_set_mac_address(struct net_device *pnetdev, void *p) static struct net_device_stats *rtw_net_get_stats(struct net_device *pnetdev) { struct adapter *padapter = (struct adapter *)rtw_netdev_priv(pnetdev); - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct recv_priv *precvpriv = &(padapter->recvpriv); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct recv_priv *precvpriv = &padapter->recvpriv; padapter->stats.tx_packets = pxmitpriv->tx_pkts; padapter->stats.rx_packets = precvpriv->rx_pkts; @@ -248,7 +248,7 @@ static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb, struct net_device *sb_dev, select_queue_fallback_t fallback) { - struct adapter *padapter = rtw_netdev_priv(dev); + struct adapter *padapter = rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; skb->priority = rtw_classify8021d(skb); @@ -263,15 +263,15 @@ u16 rtw_recv_select_queue(struct sk_buff *skb) { struct iphdr *piphdr; unsigned int dscp; - __be16 eth_type; + __be16 eth_type; u32 priority; u8 *pdata = skb->data; - memcpy(ð_type, pdata+(ETH_ALEN<<1), 2); + memcpy(ð_type, pdata + (ETH_ALEN << 1), 2); switch (eth_type) { case htons(ETH_P_IP): - piphdr = (struct iphdr *)(pdata+ETH_HLEN); + piphdr = (struct iphdr *)(pdata + ETH_HLEN); dscp = piphdr->tos & 0xfc; priority = dscp >> 5; break; @@ -286,7 +286,7 @@ static const struct net_device_ops rtw_netdev_ops = { .ndo_open = netdev_open, .ndo_stop = netdev_close, .ndo_start_xmit = rtw_xmit_entry, - .ndo_select_queue = rtw_select_queue, + .ndo_select_queue = rtw_select_queue, .ndo_set_mac_address = rtw_net_set_mac_address, .ndo_get_stats = rtw_net_get_stats, .ndo_do_ioctl = rtw_ioctl, @@ -323,7 +323,7 @@ struct net_device *rtw_init_netdev(struct adapter *old_padapter) padapter->pnetdev = pnetdev; DBG_88E("register rtw_netdev_ops to netdev_ops\n"); pnetdev->netdev_ops = &rtw_netdev_ops; - pnetdev->watchdog_timeo = HZ*3; /* 3 second timeout */ + pnetdev->watchdog_timeo = HZ * 3; /* 3 second timeout */ pnetdev->wireless_handlers = (struct iw_handler_def *)&rtw_handlers_def; loadparam(padapter, pnetdev); @@ -361,7 +361,7 @@ void rtw_stop_drv_threads(struct adapter *padapter) static u8 rtw_init_default_value(struct adapter *padapter) { struct registry_priv *pregistrypriv = &padapter->registrypriv; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; @@ -431,7 +431,7 @@ u8 rtw_reset_drv_sw(struct adapter *padapter) u8 rtw_init_drv_sw(struct adapter *padapter) { - u8 ret8 = _SUCCESS; + u8 ret8 = _SUCCESS; RT_TRACE(_module_os_intfs_c_, _drv_info_, ("+rtw_init_drv_sw\n")); @@ -578,7 +578,7 @@ static int _netdev_open(struct net_device *pnetdev) } rtw_hal_inirp_init(padapter); - LedControl8188eu(padapter, LED_CTL_NO_LINK); + led_control_8188eu(padapter, LED_CTL_NO_LINK); padapter->bup = true; } @@ -661,7 +661,7 @@ int rtw_ips_pwr_up(struct adapter *padapter) result = ips_netdrv_open(padapter); - LedControl8188eu(padapter, LED_CTL_NO_LINK); + led_control_8188eu(padapter, LED_CTL_NO_LINK); DBG_88E("<=== rtw_ips_pwr_up.............. in %dms\n", jiffies_to_msecs(jiffies - start_time)); @@ -676,7 +676,7 @@ void rtw_ips_pwr_down(struct adapter *padapter) padapter->net_closed = true; - LedControl8188eu(padapter, LED_CTL_POWER_OFF); + led_control_8188eu(padapter, LED_CTL_POWER_OFF); rtw_ips_dev_unload(padapter); DBG_88E("<=== rtw_ips_pwr_down..................... in %dms\n", @@ -728,7 +728,7 @@ static int netdev_close(struct net_device *pnetdev) /* s2-4. */ rtw_free_network_queue(padapter, true); /* Close LED */ - LedControl8188eu(padapter, LED_CTL_POWER_OFF); + led_control_8188eu(padapter, LED_CTL_POWER_OFF); } RT_TRACE(_module_os_intfs_c_, _drv_info_, ("-88eu_drv - drv_close\n")); diff --git a/drivers/staging/rtl8188eu/os_dep/recv_linux.c b/drivers/staging/rtl8188eu/os_dep/recv_linux.c index 6f74f49bf3ab..9c9339863a4a 100644 --- a/drivers/staging/rtl8188eu/os_dep/recv_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/recv_linux.c @@ -38,7 +38,7 @@ void rtw_handle_tkip_mic_err(struct adapter *padapter, u8 bgroup) } else { cur_time = jiffies; - if (cur_time - psecuritypriv->last_mic_err_time < 60*HZ) { + if (cur_time - psecuritypriv->last_mic_err_time < 60 * HZ) { psecuritypriv->btkip_countermeasure = true; psecuritypriv->last_mic_err_time = 0; psecuritypriv->btkip_countermeasure_time = cur_time; @@ -69,13 +69,13 @@ int rtw_recv_indicatepkt(struct adapter *padapter, struct sk_buff *skb; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - precvpriv = &(padapter->recvpriv); - pfree_recv_queue = &(precvpriv->free_recv_queue); + precvpriv = &padapter->recvpriv; + pfree_recv_queue = &precvpriv->free_recv_queue; skb = precv_frame->pkt; if (!skb) { RT_TRACE(_module_recv_osdep_c_, _drv_err_, - ("rtw_recv_indicatepkt():skb == NULL something wrong!!!!\n")); + ("%s():skb == NULL something wrong!!!!\n", __func__)); goto _recv_indicatepkt_drop; } @@ -126,7 +126,7 @@ _recv_indicatepkt_end: rtw_free_recvframe(precv_frame, pfree_recv_queue); RT_TRACE(_module_recv_osdep_c_, _drv_info_, - ("\n rtw_recv_indicatepkt :after netif_rx!!!!\n")); + ("\n %s :after netif_rx!!!!\n", __func__)); return _SUCCESS; diff --git a/drivers/staging/rtl8188eu/os_dep/rtw_android.c b/drivers/staging/rtl8188eu/os_dep/rtw_android.c index 34080c0ce14a..7a090615dcbc 100644 --- a/drivers/staging/rtl8188eu/os_dep/rtw_android.c +++ b/drivers/staging/rtl8188eu/os_dep/rtw_android.c @@ -84,7 +84,7 @@ static int rtw_android_get_rssi(struct net_device *net, char *command, if (check_fwstate(pmlmepriv, _FW_LINKED)) { bytes_written += snprintf(&command[bytes_written], total_len, "%s rssi %d", - pcur_network->network.Ssid.Ssid, + pcur_network->network.ssid.ssid, padapter->recvpriv.rssi); } return bytes_written; @@ -127,12 +127,6 @@ static int android_get_p2p_addr(struct net_device *net, char *command, return ETH_ALEN; } -static int rtw_android_set_block(struct net_device *net, char *command, - int total_len) -{ - return 0; -} - int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) { int ret = 0; @@ -186,8 +180,6 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) priv_cmd.total_len); break; case ANDROID_WIFI_CMD_BLOCK: - bytes_written = rtw_android_set_block(net, command, - priv_cmd.total_len); break; case ANDROID_WIFI_CMD_RXFILTER_START: break; diff --git a/drivers/staging/rtl8188eu/os_dep/usb_intf.c b/drivers/staging/rtl8188eu/os_dep/usb_intf.c index 28cbd6b3d26c..664d93a7f90d 100644 --- a/drivers/staging/rtl8188eu/os_dep/usb_intf.c +++ b/drivers/staging/rtl8188eu/os_dep/usb_intf.c @@ -35,6 +35,7 @@ static const struct usb_device_id rtw_usb_id_tbl[] = { {USB_DEVICE(0x2001, 0x330F)}, /* DLink DWA-125 REV D1 */ {USB_DEVICE(0x2001, 0x3310)}, /* Dlink DWA-123 REV D1 */ {USB_DEVICE(0x2001, 0x3311)}, /* DLink GO-USB-N150 REV B1 */ + {USB_DEVICE(0x2001, 0x331B)}, /* D-Link DWA-121 rev B1 */ {USB_DEVICE(0x2357, 0x010c)}, /* TP-Link TL-WN722N v2 */ {USB_DEVICE(0x0df6, 0x0076)}, /* Sitecom N150 v2 */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0xffef)}, /* Rosewill RNX-N150NUB */ @@ -227,10 +228,10 @@ static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message) check_fwstate(pmlmepriv, _FW_LINKED)) { pr_debug("%s:%d %s(%pM), length:%d assoc_ssid.length:%d\n", __func__, __LINE__, - pmlmepriv->cur_network.network.Ssid.Ssid, + pmlmepriv->cur_network.network.ssid.ssid, pmlmepriv->cur_network.network.MacAddress, - pmlmepriv->cur_network.network.Ssid.SsidLength, - pmlmepriv->assoc_ssid.SsidLength); + pmlmepriv->cur_network.network.ssid.ssid_length, + pmlmepriv->assoc_ssid.ssid_length); pmlmepriv->to_roaming = 1; } diff --git a/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c b/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c index d6a499692e96..e4f2af2974ed 100644 --- a/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c @@ -25,23 +25,24 @@ static void interrupt_handler_8188eu(struct adapter *adapt, u16 pkt_len, u8 *pbu /* C2H Event */ if (pbuf[0] != 0) - memcpy(&(haldata->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16); + memcpy(&haldata->C2hArray[0], + &pbuf[USB_INTR_CONTENT_C2H_OFFSET], 16); } static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) { - u8 *pbuf; - u8 shift_sz = 0; - u16 pkt_cnt; - u32 pkt_offset, skb_len, alloc_sz; - s32 transfer_len; - struct recv_stat *prxstat; - struct phy_stat *pphy_status = NULL; + u8 *pbuf; + u8 shift_sz = 0; + u16 pkt_cnt; + u32 pkt_offset, skb_len, alloc_sz; + s32 transfer_len; + struct recv_stat *prxstat; + struct phy_stat *pphy_status = NULL; struct sk_buff *pkt_copy = NULL; - struct recv_frame *precvframe = NULL; - struct rx_pkt_attrib *pattrib = NULL; + struct recv_frame *precvframe = NULL; + struct rx_pkt_attrib *pattrib = NULL; struct hal_data_8188e *haldata = adapt->HalData; - struct recv_priv *precvpriv = &adapt->recvpriv; + struct recv_priv *precvpriv = &adapt->recvpriv; struct __queue *pfree_recv_queue = &precvpriv->free_recv_queue; transfer_len = (s32)pskb->len; @@ -52,14 +53,16 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) do { RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, - ("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n", - prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); + ("%s: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n", + __func__, prxstat->rxdw0, prxstat->rxdw1, + prxstat->rxdw2, prxstat->rxdw4)); prxstat = (struct recv_stat *)pbuf; precvframe = rtw_alloc_recvframe(pfree_recv_queue); if (!precvframe) { - RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("recvbuf2recvframe: precvframe==NULL\n")); + RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, + ("%s: precvframe==NULL\n", __func__)); DBG_88E("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __func__, __LINE__); goto _exit_recvbuf2recvframe; } @@ -83,7 +86,8 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) { - RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recvbuf2recvframe: pkt_len<=0\n")); + RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, + ("%s: pkt_len<=0\n", __func__)); DBG_88E("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfer_len\n", __func__, __LINE__); rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; @@ -121,7 +125,8 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); skb_put(precvframe->pkt, skb_len); } else { - DBG_88E("recvbuf2recvframe: alloc_skb fail , drop frag frame\n"); + DBG_88E("%s: alloc_skb fail , drop frag frame\n", + __func__); rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } @@ -143,20 +148,19 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) update_recvframe_phyinfo_88e(precvframe, pphy_status); if (rtw_recv_entry(precvframe) != _SUCCESS) { RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, - ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); + ("%s: rtw_recv_entry(precvframe) != _SUCCESS\n", + __func__)); } } else if (pattrib->pkt_rpt_type == TX_REPORT1) { /* CCX-TXRPT ack for xmit mgmt frames. */ handle_txrpt_ccx_88e(adapt, precvframe->pkt->data); rtw_free_recvframe(precvframe, pfree_recv_queue); } else if (pattrib->pkt_rpt_type == TX_REPORT2) { - ODM_RA_TxRPT2Handle_8188E( - &haldata->odmpriv, - precvframe->pkt->data, - pattrib->pkt_len, - pattrib->MacIDValidEntry[0], - pattrib->MacIDValidEntry[1] - ); + ODM_RA_TxRPT2Handle_8188E(&haldata->odmpriv, + precvframe->pkt->data, + pattrib->pkt_len, + pattrib->MacIDValidEntry[0], + pattrib->MacIDValidEntry[1]); rtw_free_recvframe(precvframe, pfree_recv_queue); } else if (pattrib->pkt_rpt_type == HIS_REPORT) { interrupt_handler_8188eu(adapt, pattrib->pkt_len, precvframe->pkt->data); @@ -169,7 +173,7 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) pkt_copy = NULL; if (transfer_len > 0 && pkt_cnt == 0) - pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; + pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff; } while ((transfer_len > 0) && (pkt_cnt > 0)); @@ -197,7 +201,7 @@ unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr) static int usbctrl_vendorreq(struct adapter *adapt, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) { - struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt); + struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt); struct usb_device *udev = dvobjpriv->pusbdev; unsigned int pipe; int status = 0; @@ -206,7 +210,9 @@ static int usbctrl_vendorreq(struct adapter *adapt, u8 request, u16 value, u16 i int vendorreq_times = 0; if ((adapt->bSurpriseRemoved) || (adapt->pwrctrlpriv.pnp_bstop_trx)) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usbctrl_vendorreq:(adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + ("%s:(adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n", + __func__)); status = -EPERM; goto exit; } @@ -254,11 +260,10 @@ static int usbctrl_vendorreq(struct adapter *adapt, u8 request, u16 value, u16 i len, status, *(u32 *)pdata, vendorreq_times); if (status < 0) { - if (status == (-ESHUTDOWN) || status == -ENODEV) { + if (status == (-ESHUTDOWN) || status == -ENODEV) adapt->bSurpriseRemoved = true; - } else { - adapt->HalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL; - } + else + adapt->HalData->srestpriv.wifi_error_status = USB_VEN_REQ_CMD_FAIL; } else { /* status != len && status >= 0 */ if (status > 0) { if (requesttype == 0x01) { @@ -269,7 +274,7 @@ static int usbctrl_vendorreq(struct adapter *adapt, u8 request, u16 value, u16 i } } - /* firmware download is checksumed, don't retry */ + /* firmware download is checksummed, don't retry */ if ((value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len) break; } @@ -294,7 +299,7 @@ u8 usb_read8(struct adapter *adapter, u32 addr) requesttype = 0x01;/* read_in */ index = 0;/* n/a */ - wvalue = (u16)(addr&0x0000ffff); + wvalue = (u16)(addr & 0x0000ffff); len = 1; usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype); @@ -314,11 +319,11 @@ u16 usb_read16(struct adapter *adapter, u32 addr) request = 0x05; requesttype = 0x01;/* read_in */ index = 0;/* n/a */ - wvalue = (u16)(addr&0x0000ffff); + wvalue = (u16)(addr & 0x0000ffff); len = 2; usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype); - return (u16)(le32_to_cpu(data)&0xffff); + return (u16)(le32_to_cpu(data) & 0xffff); } u32 usb_read32(struct adapter *adapter, u32 addr) @@ -334,7 +339,7 @@ u32 usb_read32(struct adapter *adapter, u32 addr) requesttype = 0x01;/* read_in */ index = 0;/* n/a */ - wvalue = (u16)(addr&0x0000ffff); + wvalue = (u16)(addr & 0x0000ffff); len = 4; usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype); @@ -344,16 +349,17 @@ u32 usb_read32(struct adapter *adapter, u32 addr) static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) { - struct recv_buf *precvbuf = (struct recv_buf *)purb->context; - struct adapter *adapt = (struct adapter *)precvbuf->adapter; + struct recv_buf *precvbuf = (struct recv_buf *)purb->context; + struct adapter *adapt = (struct adapter *)precvbuf->adapter; struct recv_priv *precvpriv = &adapt->recvpriv; - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete!!!\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s!!!\n", __func__)); if (adapt->bSurpriseRemoved || adapt->bDriverStopped || adapt->bReadPortCancel) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", - adapt->bDriverStopped, adapt->bSurpriseRemoved)); + ("%s:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", + __func__, adapt->bDriverStopped, + adapt->bSurpriseRemoved)); precvbuf->reuse = true; DBG_88E("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", @@ -365,7 +371,8 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) if (purb->status == 0) { /* SUCCESS */ if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); + ("%s: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n", + __func__)); precvbuf->reuse = true; usb_read_port(adapt, RECV_BULK_IN_ADDR, precvbuf); DBG_88E("%s()-%d: RX Warning!\n", __func__, __LINE__); @@ -381,9 +388,11 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) usb_read_port(adapt, RECV_BULK_IN_ADDR, precvbuf); } } else { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete : purb->status(%d) != 0\n", purb->status)); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + ("%s : purb->status(%d) != 0\n", + __func__, purb->status)); - DBG_88E("###=> usb_read_port_complete => urb status(%d)\n", purb->status); + DBG_88E("###=> %s => urb status(%d)\n", __func__, purb->status); skb_put(precvbuf->pskb, purb->actual_length); precvbuf->pskb = NULL; @@ -396,11 +405,12 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) /* fall through */ case -ENOENT: adapt->bDriverStopped = true; - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete:bDriverStopped=true\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + ("%s:bDriverStopped=true\n", __func__)); break; case -EPROTO: case -EOVERFLOW: - adapt->HalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; + adapt->HalData->srestpriv.wifi_error_status = USB_READ_PORT_FAIL; precvbuf->reuse = true; usb_read_port(adapt, RECV_BULK_IN_ADDR, precvbuf); break; @@ -416,9 +426,9 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) u32 usb_read_port(struct adapter *adapter, u32 addr, struct recv_buf *precvbuf) { struct urb *purb = NULL; - struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); - struct recv_priv *precvpriv = &adapter->recvpriv; - struct usb_device *pusbd = pdvobj->pusbdev; + struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); + struct recv_priv *precvpriv = &adapter->recvpriv; + struct usb_device *pusbd = pdvobj->pusbdev; int err; unsigned int pipe; u32 ret = _SUCCESS; @@ -426,13 +436,14 @@ u32 usb_read_port(struct adapter *adapter, u32 addr, struct recv_buf *precvbuf) if (adapter->bDriverStopped || adapter->bSurpriseRemoved || adapter->pwrctrlpriv.pnp_bstop_trx) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port:(adapt->bDriverStopped ||adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); + ("%s:(adapt->bDriverStopped ||adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n", + __func__)); return _FAIL; } if (!precvbuf) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port:precvbuf==NULL\n")); + ("%s:precvbuf==NULL\n", __func__)); return _FAIL; } @@ -447,7 +458,7 @@ u32 usb_read_port(struct adapter *adapter, u32 addr, struct recv_buf *precvbuf) precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ); if (!precvbuf->pskb) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("init_recvbuf(): alloc_skb fail!\n")); - DBG_88E("#### usb_read_port() alloc_skb fail!#####\n"); + DBG_88E("#### %s() alloc_skb fail!#####\n", __func__); return _FAIL; } } else { /* reuse skb */ @@ -509,7 +520,7 @@ int usb_write8(struct adapter *adapter, u32 addr, u8 val) request = 0x05; requesttype = 0x00;/* write_out */ index = 0;/* n/a */ - wvalue = (u16)(addr&0x0000ffff); + wvalue = (u16)(addr & 0x0000ffff); len = 1; data = val; return usbctrl_vendorreq(adapter, request, wvalue, @@ -529,7 +540,7 @@ int usb_write16(struct adapter *adapter, u32 addr, u16 val) requesttype = 0x00;/* write_out */ index = 0;/* n/a */ - wvalue = (u16)(addr&0x0000ffff); + wvalue = (u16)(addr & 0x0000ffff); len = 2; data = cpu_to_le32(val & 0x0000ffff); @@ -551,7 +562,7 @@ int usb_write32(struct adapter *adapter, u32 addr, u32 val) requesttype = 0x00;/* write_out */ index = 0;/* n/a */ - wvalue = (u16)(addr&0x0000ffff); + wvalue = (u16)(addr & 0x0000ffff); len = 4; data = cpu_to_le32(val); @@ -562,8 +573,8 @@ int usb_write32(struct adapter *adapter, u32 addr, u32 val) static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) { struct xmit_buf *pxmitbuf = (struct xmit_buf *)purb->context; - struct adapter *padapter = pxmitbuf->padapter; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct adapter *padapter = pxmitbuf->padapter; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; switch (pxmitbuf->flags) { case VO_QUEUE_INX: @@ -590,8 +601,9 @@ static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) if (padapter->bSurpriseRemoved || padapter->bDriverStopped || padapter->bWritePortCancel) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", - padapter->bDriverStopped, padapter->bSurpriseRemoved)); + ("%s:bDriverStopped(%d) OR bSurpriseRemoved(%d)", + __func__, padapter->bDriverStopped, + padapter->bSurpriseRemoved)); DBG_88E("%s(): TX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bWritePortCancel(%d) pxmitbuf->ext_tag(%x)\n", __func__, padapter->bDriverStopped, padapter->bSurpriseRemoved, padapter->bReadPortCancel, @@ -601,12 +613,15 @@ static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) } if (purb->status) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete : purb->status(%d) != 0\n", purb->status)); - DBG_88E("###=> urb_write_port_complete status(%d)\n", purb->status); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + ("%s : purb->status(%d) != 0\n", + __func__, purb->status)); + DBG_88E("###=> %s status(%d)\n", __func__, purb->status); if ((purb->status == -EPIPE) || (purb->status == -EPROTO)) { sreset_set_wifi_error_status(padapter, USB_WRITE_PORT_FAIL); } else if (purb->status == -EINPROGRESS) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete: EINPROGRESS\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + ("%s: EINPROGRESS\n", __func__)); goto check_completion; } else if (purb->status == -ENOENT) { DBG_88E("%s: -ENOENT\n", __func__); @@ -615,15 +630,17 @@ static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) DBG_88E("%s: -ECONNRESET\n", __func__); goto check_completion; } else if (purb->status == -ESHUTDOWN) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete: ESHUTDOWN\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + ("%s: ESHUTDOWN\n", __func__)); padapter->bDriverStopped = true; - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete:bDriverStopped = true\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + ("%s:bDriverStopped = true\n", __func__)); goto check_completion; } else { padapter->bSurpriseRemoved = true; DBG_88E("bSurpriseRemoved = true\n"); - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete:bSurpriseRemoved = true\n")); - + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + ("%s:bSurpriseRemoved = true\n", __func__)); goto check_completion; } } @@ -645,17 +662,18 @@ u32 usb_write_port(struct adapter *padapter, u32 addr, u32 cnt, struct xmit_buf int status; u32 ret = _FAIL; struct urb *purb = NULL; - struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct xmit_frame *pxmitframe = (struct xmit_frame *)xmitbuf->priv_data; struct usb_device *pusbd = pdvobj->pusbdev; - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("+usb_write_port\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("+%s\n", __func__)); if ((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) || (padapter->pwrctrlpriv.pnp_bstop_trx)) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); + ("%s:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n", + __func__)); rtw_sctx_done_err(&xmitbuf->sctx, RTW_SCTX_DONE_TX_DENY); goto exit; } @@ -703,8 +721,10 @@ u32 usb_write_port(struct adapter *padapter, u32 addr, u32 cnt, struct xmit_buf status = usb_submit_urb(purb, GFP_ATOMIC); if (status) { rtw_sctx_done_err(&xmitbuf->sctx, RTW_SCTX_DONE_WRITE_PORT_ERR); - DBG_88E("usb_write_port, status =%d\n", status); - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_write_port(): usb_submit_urb, status =%x\n", status)); + DBG_88E("%s, status =%d\n", __func__, status); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + ("%s(): usb_submit_urb, status =%x\n", + __func__, status)); switch (status) { case -ENODEV: @@ -720,7 +740,7 @@ u32 usb_write_port(struct adapter *padapter, u32 addr, u32 cnt, struct xmit_buf /* We add the URB_ZERO_PACKET flag to urb so that the host will send the zero packet automatically. */ - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("-usb_write_port\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("-%s\n", __func__)); exit: if (ret != _SUCCESS) @@ -776,7 +796,6 @@ void rtl8188eu_recv_tasklet(void *priv) void rtl8188eu_xmit_tasklet(void *priv) { - int ret = false; struct adapter *adapt = priv; struct xmit_priv *pxmitpriv = &adapt->xmitpriv; @@ -791,9 +810,7 @@ void rtl8188eu_xmit_tasklet(void *priv) break; } - ret = rtl8188eu_xmitframe_complete(adapt, pxmitpriv); - - if (!ret) + if (!rtl8188eu_xmitframe_complete(adapt, pxmitpriv)) break; } } diff --git a/drivers/staging/rtl8192e/dot11d.c b/drivers/staging/rtl8192e/dot11d.c index a1c096124683..68f53013cb95 100644 --- a/drivers/staging/rtl8192e/dot11d.c +++ b/drivers/staging/rtl8192e/dot11d.c @@ -15,11 +15,11 @@ #include "dot11d.h" struct channel_list { - u8 Channel[32]; - u8 Len; + u8 channel[32]; + u8 len; }; -static struct channel_list ChannelPlan[] = { +static struct channel_list channel_array[] = { {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 24}, {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11}, @@ -44,130 +44,130 @@ static struct channel_list ChannelPlan[] = { void dot11d_init(struct rtllib_device *ieee) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(ieee); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(ieee); - pDot11dInfo->bEnabled = false; + dot11d_info->enabled = false; - pDot11dInfo->State = DOT11D_STATE_NONE; - pDot11dInfo->CountryIeLen = 0; - memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER + 1); - memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER + 1); + dot11d_info->state = DOT11D_STATE_NONE; + dot11d_info->country_len = 0; + memset(dot11d_info->channel_map, 0, MAX_CHANNEL_NUMBER + 1); + memset(dot11d_info->max_tx_power_list, 0xFF, MAX_CHANNEL_NUMBER + 1); RESET_CIE_WATCHDOG(ieee); } EXPORT_SYMBOL(dot11d_init); -void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee) +void dot11d_channel_map(u8 channel_plan, struct rtllib_device *ieee) { int i, max_chan = 14, min_chan = 1; - ieee->bGlobalDomain = false; + ieee->global_domain = false; - if (ChannelPlan[channel_plan].Len != 0) { + if (channel_array[channel_plan].len != 0) { memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map)); - for (i = 0; i < ChannelPlan[channel_plan].Len; i++) { - if (ChannelPlan[channel_plan].Channel[i] < min_chan || - ChannelPlan[channel_plan].Channel[i] > max_chan) + for (i = 0; i < channel_array[channel_plan].len; i++) { + if (channel_array[channel_plan].channel[i] < min_chan || + channel_array[channel_plan].channel[i] > max_chan) break; - GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan - [channel_plan].Channel[i]] = 1; + GET_DOT11D_INFO(ieee)->channel_map[channel_array + [channel_plan].channel[i]] = 1; } } switch (channel_plan) { case COUNTRY_CODE_GLOBAL_DOMAIN: - ieee->bGlobalDomain = true; + ieee->global_domain = true; for (i = 12; i <= 14; i++) GET_DOT11D_INFO(ieee)->channel_map[i] = 2; - ieee->IbssStartChnl = 10; + ieee->bss_start_channel = 10; ieee->ibss_maxjoin_chal = 11; break; case COUNTRY_CODE_WORLD_WIDE_13: for (i = 12; i <= 13; i++) GET_DOT11D_INFO(ieee)->channel_map[i] = 2; - ieee->IbssStartChnl = 10; + ieee->bss_start_channel = 10; ieee->ibss_maxjoin_chal = 11; break; default: - ieee->IbssStartChnl = 1; + ieee->bss_start_channel = 1; ieee->ibss_maxjoin_chal = 14; break; } } -EXPORT_SYMBOL(Dot11d_Channelmap); +EXPORT_SYMBOL(dot11d_channel_map); -void Dot11d_Reset(struct rtllib_device *ieee) +void dot11d_reset(struct rtllib_device *ieee) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(ieee); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(ieee); u32 i; - memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER + 1); - memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER + 1); + memset(dot11d_info->channel_map, 0, MAX_CHANNEL_NUMBER + 1); + memset(dot11d_info->max_tx_power_list, 0xFF, MAX_CHANNEL_NUMBER + 1); for (i = 1; i <= 11; i++) - (pDot11dInfo->channel_map)[i] = 1; + (dot11d_info->channel_map)[i] = 1; for (i = 12; i <= 14; i++) - (pDot11dInfo->channel_map)[i] = 2; - pDot11dInfo->State = DOT11D_STATE_NONE; - pDot11dInfo->CountryIeLen = 0; + (dot11d_info->channel_map)[i] = 2; + dot11d_info->state = DOT11D_STATE_NONE; + dot11d_info->country_len = 0; RESET_CIE_WATCHDOG(ieee); } -void Dot11d_UpdateCountryIe(struct rtllib_device *dev, u8 *pTaddr, - u16 CoutryIeLen, u8 *pCoutryIe) +void dot11d_update_country(struct rtllib_device *dev, u8 *address, + u16 country_len, u8 *country) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev); - u8 i, j, NumTriples, MaxChnlNum; - struct chnl_txpow_triple *pTriple; - - memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER + 1); - memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER + 1); - MaxChnlNum = 0; - NumTriples = (CoutryIeLen - 3) / 3; - pTriple = (struct chnl_txpow_triple *)(pCoutryIe + 3); - for (i = 0; i < NumTriples; i++) { - if (MaxChnlNum >= pTriple->FirstChnl) { + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(dev); + u8 i, j, number_of_triples, max_channel_number; + struct chnl_txpow_triple *triple; + + memset(dot11d_info->channel_map, 0, MAX_CHANNEL_NUMBER + 1); + memset(dot11d_info->max_tx_power_list, 0xFF, MAX_CHANNEL_NUMBER + 1); + max_channel_number = 0; + number_of_triples = (country_len - 3) / 3; + triple = (struct chnl_txpow_triple *)(country + 3); + for (i = 0; i < number_of_triples; i++) { + if (max_channel_number >= triple->first_channel) { netdev_info(dev->dev, "%s: Invalid country IE, skip it......1\n", __func__); return; } - if (MAX_CHANNEL_NUMBER < (pTriple->FirstChnl + - pTriple->NumChnls)) { + if (MAX_CHANNEL_NUMBER < (triple->first_channel + + triple->num_channels)) { netdev_info(dev->dev, "%s: Invalid country IE, skip it......2\n", __func__); return; } - for (j = 0; j < pTriple->NumChnls; j++) { - pDot11dInfo->channel_map[pTriple->FirstChnl + j] = 1; - pDot11dInfo->MaxTxPwrDbmList[pTriple->FirstChnl + j] = - pTriple->MaxTxPowerInDbm; - MaxChnlNum = pTriple->FirstChnl + j; + for (j = 0; j < triple->num_channels; j++) { + dot11d_info->channel_map[triple->first_channel + j] = 1; + dot11d_info->max_tx_power_list[triple->first_channel + j] = + triple->max_tx_power; + max_channel_number = triple->first_channel + j; } - pTriple = (struct chnl_txpow_triple *)((u8 *)pTriple + 3); + triple = (struct chnl_txpow_triple *)((u8 *)triple + 3); } - UPDATE_CIE_SRC(dev, pTaddr); + UPDATE_CIE_SRC(dev, address); - pDot11dInfo->CountryIeLen = CoutryIeLen; - memcpy(pDot11dInfo->CountryIeBuf, pCoutryIe, CoutryIeLen); - pDot11dInfo->State = DOT11D_STATE_LEARNED; + dot11d_info->country_len = country_len; + memcpy(dot11d_info->country_buffer, country, country_len); + dot11d_info->state = DOT11D_STATE_LEARNED; } -void DOT11D_ScanComplete(struct rtllib_device *dev) +void dot11d_scan_complete(struct rtllib_device *dev) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(dev); - switch (pDot11dInfo->State) { + switch (dot11d_info->state) { case DOT11D_STATE_LEARNED: - pDot11dInfo->State = DOT11D_STATE_DONE; + dot11d_info->state = DOT11D_STATE_DONE; break; case DOT11D_STATE_DONE: - Dot11d_Reset(dev); + dot11d_reset(dev); break; case DOT11D_STATE_NONE: break; diff --git a/drivers/staging/rtl8192e/dot11d.h b/drivers/staging/rtl8192e/dot11d.h index 7fa3c4d963c4..6d2b93acfa43 100644 --- a/drivers/staging/rtl8192e/dot11d.h +++ b/drivers/staging/rtl8192e/dot11d.h @@ -1,14 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * The full GNU General Public License is included in this distribution in the - * file called LICENSE. - * * Contact Information: * wlanfae <wlanfae@realtek.com> ******************************************************************************/ @@ -18,9 +11,9 @@ #include "rtllib.h" struct chnl_txpow_triple { - u8 FirstChnl; - u8 NumChnls; - u8 MaxTxPowerInDbm; + u8 first_channel; + u8 num_channels; + u8 max_tx_power; }; enum dot11d_state { @@ -30,62 +23,62 @@ enum dot11d_state { }; /** - * struct rt_dot11d_info * @CountryIeLen: value greater than 0 if - * @CountryIeBuf contains valid country information element. + * struct rt_dot11d_info * @country_len: value greater than 0 if + * @country_buffer contains valid country information element. * @channel_map: holds channel values * 0 - invalid, * 1 - valid (active scan), * 2 - valid (passive scan) - * @CountryIeSrcAddr - Source AP of the country IE + * @country_src_addr - Source AP of the country IE */ struct rt_dot11d_info { - bool bEnabled; + bool enabled; - u16 CountryIeLen; - u8 CountryIeBuf[MAX_IE_LEN]; - u8 CountryIeSrcAddr[6]; - u8 CountryIeWatchdog; + u16 country_len; + u8 country_buffer[MAX_IE_LEN]; + u8 country_src_addr[6]; + u8 country_watchdog; u8 channel_map[MAX_CHANNEL_NUMBER + 1]; - u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER + 1]; + u8 max_tx_power_list[MAX_CHANNEL_NUMBER + 1]; - enum dot11d_state State; + enum dot11d_state state; }; -static inline void cpMacAddr(unsigned char *des, unsigned char *src) +static inline void copy_mac_addr(unsigned char *des, unsigned char *src) { memcpy(des, src, 6); } -#define GET_DOT11D_INFO(__pIeeeDev) \ - ((struct rt_dot11d_info *)((__pIeeeDev)->pDot11dInfo)) +#define GET_DOT11D_INFO(__ieee_dev) \ + ((struct rt_dot11d_info *)((__ieee_dev)->dot11d_info)) -#define IS_DOT11D_ENABLE(__pIeeeDev) \ - (GET_DOT11D_INFO(__pIeeeDev)->bEnabled) -#define IS_COUNTRY_IE_VALID(__pIeeeDev) \ - (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0) +#define IS_DOT11D_ENABLE(__ieee_dev) \ + (GET_DOT11D_INFO(__ieee_dev)->enabled) +#define IS_COUNTRY_IE_VALID(__ieee_dev) \ + (GET_DOT11D_INFO(__ieee_dev)->country_len > 0) -#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) \ +#define IS_EQUAL_CIE_SRC(__ieee_dev, __address) \ ether_addr_equal_unaligned( \ - GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) -#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) \ - cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) + GET_DOT11D_INFO(__ieee_dev)->country_src_addr, __address) +#define UPDATE_CIE_SRC(__ieee_dev, __address) \ + copy_mac_addr(GET_DOT11D_INFO(__ieee_dev)->country_src_addr, __address) -#define GET_CIE_WATCHDOG(__pIeeeDev) \ - (GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog) -static inline void RESET_CIE_WATCHDOG(struct rtllib_device *__pIeeeDev) +#define GET_CIE_WATCHDOG(__ieee_dev) \ + (GET_DOT11D_INFO(__ieee_dev)->country_watchdog) +static inline void RESET_CIE_WATCHDOG(struct rtllib_device *__ieee_dev) { - GET_CIE_WATCHDOG(__pIeeeDev) = 0; + GET_CIE_WATCHDOG(__ieee_dev) = 0; } -#define UPDATE_CIE_WATCHDOG(__pIeeeDev) (++GET_CIE_WATCHDOG(__pIeeeDev)) +#define UPDATE_CIE_WATCHDOG(__ieee_dev) (++GET_CIE_WATCHDOG(__ieee_dev)) void dot11d_init(struct rtllib_device *dev); -void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee); -void Dot11d_Reset(struct rtllib_device *dev); -void Dot11d_UpdateCountryIe(struct rtllib_device *dev, u8 *pTaddr, - u16 CoutryIeLen, u8 *pCoutryIe); -void DOT11D_ScanComplete(struct rtllib_device *dev); +void dot11d_channel_map(u8 channel_plan, struct rtllib_device *ieee); +void dot11d_reset(struct rtllib_device *dev); +void dot11d_update_country(struct rtllib_device *dev, u8 *address, + u16 country_len, u8 *country); +void dot11d_scan_complete(struct rtllib_device *dev); #endif diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c index 1c6ed5b2a6f9..19bb04b3f097 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c @@ -660,9 +660,9 @@ static void _rtl92e_hwconfig(struct net_device *dev) case WIRELESS_MODE_AUTO: case WIRELESS_MODE_N_24G: regBwOpMode = BW_OPMODE_20MHZ; - regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | - RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; - regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | + RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; break; case WIRELESS_MODE_N_5G: regBwOpMode = BW_OPMODE_5G; @@ -961,7 +961,7 @@ static void _rtl92e_net_update(struct net_device *dev) net = &priv->rtllib->current_network; rtl92e_config_rate(dev, &rate_config); priv->dot11CurrentPreambleMode = PREAMBLE_AUTO; - priv->basic_rate = rate_config &= 0x15f; + priv->basic_rate = rate_config &= 0x15f; rtl92e_writew(dev, BSSIDR, *(u16 *)net->bssid); rtl92e_writel(dev, BSSIDR + 2, *(u32 *)(net->bssid + 2)); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c index 96f265eee007..253f1911a3f4 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c @@ -436,7 +436,7 @@ static int _rtl92e_qos_handle_probe_response(struct r8192_priv *priv, network->qos_data.param_count)) { network->qos_data.old_param_count = network->qos_data.param_count; - priv->rtllib->wmm_acm = network->qos_data.wmm_acm; + priv->rtllib->wmm_acm = network->qos_data.wmm_acm; schedule_work(&priv->qos_activate); RT_TRACE(COMP_QOS, "QoS parameters change call qos_activate\n"); @@ -1049,7 +1049,7 @@ static short _rtl92e_get_channel_map(struct net_device *dev) } RT_TRACE(COMP_INIT, "Channel plan is %d\n", priv->ChannelPlan); dot11d_init(priv->rtllib); - Dot11d_Channelmap(priv->ChannelPlan, priv->rtllib); + dot11d_channel_map(priv->ChannelPlan, priv->rtllib); for (i = 1; i <= 11; i++) (priv->rtllib->active_channel_map)[i] = 1; (priv->rtllib->active_channel_map)[12] = 2; @@ -1573,7 +1573,7 @@ static void _rtl92e_free_rx_ring(struct net_device *dev) pci_unmap_single(priv->pdev, *((dma_addr_t *)skb->cb), priv->rxbuffersize, PCI_DMA_FROMDEVICE); - kfree_skb(skb); + kfree_skb(skb); } pci_free_consistent(priv->pdev, @@ -1728,8 +1728,7 @@ static short _rtl92e_tx(struct net_device *dev, struct sk_buff *skb) MAX_DEV_ADDR_SIZE); struct tx_desc *pdesc = NULL; struct rtllib_hdr_1addr *header = NULL; - u16 fc = 0, type = 0, stype = 0; - bool multi_addr = false, broad_addr = false, uni_addr = false; + u16 fc = 0, type = 0; u8 *pda_addr = NULL; int idx; u32 fwinfo_size = 0; @@ -1747,22 +1746,14 @@ static short _rtl92e_tx(struct net_device *dev, struct sk_buff *skb) header = (struct rtllib_hdr_1addr *)(((u8 *)skb->data) + fwinfo_size); fc = le16_to_cpu(header->frame_ctl); type = WLAN_FC_GET_TYPE(fc); - stype = WLAN_FC_GET_STYPE(fc); pda_addr = header->addr1; if (is_broadcast_ether_addr(pda_addr)) - broad_addr = true; + priv->stats.txbytesbroadcast += skb->len - fwinfo_size; else if (is_multicast_ether_addr(pda_addr)) - multi_addr = true; - else - uni_addr = true; - - if (uni_addr) - priv->stats.txbytesunicast += skb->len - fwinfo_size; - else if (multi_addr) priv->stats.txbytesmulticast += skb->len - fwinfo_size; else - priv->stats.txbytesbroadcast += skb->len - fwinfo_size; + priv->stats.txbytesunicast += skb->len - fwinfo_size; spin_lock_irqsave(&priv->irq_th_lock, flags); ring = &priv->tx_ring[tcb_desc->queue_index]; @@ -2515,7 +2506,7 @@ static int _rtl92e_pci_probe(struct pci_dev *pdev, if (dev_alloc_name(dev, ifname) < 0) { RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n"); - dev_alloc_name(dev, ifname); + dev_alloc_name(dev, ifname); } RT_TRACE(COMP_INIT, "Driver probe completed1\n"); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c index 9bf95bd0ad13..157bcee34067 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c @@ -996,7 +996,7 @@ static void _rtl92e_dm_check_tx_power_tracking_tssi(struct net_device *dev) tx_power_track_counter++; - if (tx_power_track_counter >= 180) { + if (tx_power_track_counter >= 180) { schedule_delayed_work(&priv->txpower_tracking_wq, 0); tx_power_track_counter = 0; } diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c index 843e874b8a06..44e06cba7b7b 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c @@ -738,7 +738,7 @@ static int _rtl92e_wx_set_enc(struct net_device *dev, else if (wrqu->encoding.length == 0xd) { ieee->pairwise_key_type = KEY_TYPE_WEP104; - rtl92e_enable_hw_security_config(dev); + rtl92e_enable_hw_security_config(dev); rtl92e_set_key(dev, key_idx, key_idx, KEY_TYPE_WEP104, zero_addr[key_idx], 0, hwkey); rtl92e_set_swcam(dev, key_idx, key_idx, KEY_TYPE_WEP104, @@ -1049,9 +1049,9 @@ static int _rtl92e_wx_set_promisc_mode(struct net_device *dev, (bPromiscuousOn) ? (true) : (false); ieee->IntelPromiscuousModeInfo.bFilterSourceStationFrame = (bFilterSourceStationFrame) ? (true) : (false); - (bPromiscuousOn) ? - (rtllib_EnableIntelPromiscuousMode(dev, false)) : - (rtllib_DisableIntelPromiscuousMode(dev, false)); + (bPromiscuousOn) ? + (rtllib_EnableIntelPromiscuousMode(dev, false)) : + (rtllib_DisableIntelPromiscuousMode(dev, false)); netdev_info(dev, "=======>%s(), on = %d, filter src sta = %d\n", diff --git a/drivers/staging/rtl8192e/rtl819x_BAProc.c b/drivers/staging/rtl8192e/rtl819x_BAProc.c index 687dbb04ed2e..2d330d2bbf6d 100644 --- a/drivers/staging/rtl8192e/rtl819x_BAProc.c +++ b/drivers/staging/rtl8192e/rtl819x_BAProc.c @@ -139,7 +139,7 @@ static struct sk_buff *rtllib_DELBA(struct rtllib_device *ieee, u8 *dst, { union delba_param_set DelbaParamSet; struct sk_buff *skb = NULL; - struct rtllib_hdr_3addr *Delba = NULL; + struct rtllib_hdr_3addr *Delba = NULL; u8 *tag = NULL; u16 len = 6 + ieee->tx_headroom; @@ -316,7 +316,7 @@ OnADDBAReq_Fail: int rtllib_rx_ADDBARsp(struct rtllib_device *ieee, struct sk_buff *skb) { - struct rtllib_hdr_3addr *rsp = NULL; + struct rtllib_hdr_3addr *rsp = NULL; struct ba_record *pPendingBA, *pAdmittedBA; struct tx_ts_record *pTS = NULL; u8 *dst = NULL, *pDialogToken = NULL, *tag = NULL; @@ -420,7 +420,7 @@ OnADDBARsp_Reject: int rtllib_rx_DELBA(struct rtllib_device *ieee, struct sk_buff *skb) { - struct rtllib_hdr_3addr *delba = NULL; + struct rtllib_hdr_3addr *delba = NULL; union delba_param_set *pDelBaParamSet = NULL; u8 *dst = NULL; diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h index c01474a6db1e..61ebd12831c3 100644 --- a/drivers/staging/rtl8192e/rtllib.h +++ b/drivers/staging/rtl8192e/rtllib.h @@ -1560,11 +1560,11 @@ struct rtllib_device { u16 scan_watch_dog; /* map of allowed channels. 0 is dummy */ - void *pDot11dInfo; - bool bGlobalDomain; + void *dot11d_info; + bool global_domain; u8 active_channel_map[MAX_CHANNEL_NUMBER+1]; - u8 IbssStartChnl; + u8 bss_start_channel; u8 ibss_maxjoin_chal; int rate; /* current rate */ diff --git a/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c b/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c index bc45cf098b04..2581ed6d14fa 100644 --- a/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c +++ b/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c @@ -1,12 +1,7 @@ -/* - * Host AP crypt: host-based CCMP encryption implementation for Host AP driver +// SPDX-License-Identifier: GPL-2.0 +/* Host AP crypt: host-based CCMP encryption implementation for Host AP driver * * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. See README and COPYING for - * more details. */ #include <linux/module.h> @@ -67,7 +62,7 @@ static void *rtllib_ccmp_init(int key_idx) goto fail; priv->key_idx = key_idx; - priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); + priv->tfm = (void *)crypto_alloc_cipher("aes", 0, 0); if (IS_ERR(priv->tfm)) { pr_debug("Could not allocate crypto API aes\n"); priv->tfm = NULL; @@ -377,10 +372,11 @@ static int rtllib_ccmp_set_key(void *key, int len, u8 *seq, void *priv) data->rx_pn[5] = seq[0]; } crypto_cipher_setkey((void *)data->tfm, data->key, CCMP_TK_LEN); - } else if (len == 0) + } else if (len == 0) { data->key_set = 0; - else + } else { return -1; + } return 0; } diff --git a/drivers/staging/rtl8192e/rtllib_crypt_tkip.c b/drivers/staging/rtl8192e/rtllib_crypt_tkip.c index f38f1f74fcd6..55da8c9dfe50 100644 --- a/drivers/staging/rtl8192e/rtllib_crypt_tkip.c +++ b/drivers/staging/rtl8192e/rtllib_crypt_tkip.c @@ -285,7 +285,7 @@ static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK, static int rtllib_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv) { struct rtllib_tkip_data *tkey = priv; - int len; + int len; u8 *pos; struct rtllib_hdr_4addr *hdr; struct cb_desc *tcb_desc = (struct cb_desc *)(skb->cb + diff --git a/drivers/staging/rtl8192e/rtllib_rx.c b/drivers/staging/rtl8192e/rtllib_rx.c index fa580ce1cf43..debc2e40af00 100644 --- a/drivers/staging/rtl8192e/rtllib_rx.c +++ b/drivers/staging/rtl8192e/rtllib_rx.c @@ -913,7 +913,7 @@ static size_t rtllib_rx_get_hdrlen(struct rtllib_device *ieee, rx_stats->bContainHTC = true; } - if (RTLLIB_QOS_HAS_SEQ(fc)) + if (RTLLIB_QOS_HAS_SEQ(fc)) rx_stats->bIsQosData = true; return hdrlen; @@ -1812,7 +1812,7 @@ static inline void rtllib_extract_country_ie( netdev_info(ieee->dev, "Received beacon ContryIE, SSID: <%s>\n", network->ssid); - Dot11d_UpdateCountryIe(ieee, addr2, + dot11d_update_country(ieee, addr2, info_element->len, info_element->data); } diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c b/drivers/staging/rtl8192e/rtllib_softmac.c index 287d0c11fa38..ee275857868f 100644 --- a/drivers/staging/rtl8192e/rtllib_softmac.c +++ b/drivers/staging/rtl8192e/rtllib_softmac.c @@ -564,7 +564,7 @@ out: if (ieee->state >= RTLLIB_LINKED) { if (IS_DOT11D_ENABLE(ieee)) - DOT11D_ScanComplete(ieee); + dot11d_scan_complete(ieee); } mutex_unlock(&ieee->scan_mutex); @@ -623,7 +623,7 @@ static void rtllib_softmac_scan_wq(void *data) out: if (IS_DOT11D_ENABLE(ieee)) - DOT11D_ScanComplete(ieee); + dot11d_scan_complete(ieee); ieee->current_network.channel = last_channel; out1: @@ -1688,8 +1688,8 @@ inline void rtllib_softmac_new_net(struct rtllib_device *ieee, ieee->current_network.ssid_len); tmp_ssid_len = ieee->current_network.ssid_len; } - memcpy(&ieee->current_network, net, - sizeof(ieee->current_network)); + memcpy(&ieee->current_network, net, + sizeof(ieee->current_network)); if (!ssidbroad) { memcpy(ieee->current_network.ssid, tmp_ssid, tmp_ssid_len); @@ -2627,7 +2627,7 @@ static void rtllib_start_ibss_wq(void *data) /* the network definitively is not here.. create a new cell */ if (ieee->state == RTLLIB_NOLINK) { netdev_info(ieee->dev, "creating new IBSS cell\n"); - ieee->current_network.channel = ieee->IbssStartChnl; + ieee->current_network.channel = ieee->bss_start_channel; if (!ieee->wap_set) eth_random_addr(ieee->current_network.bssid); @@ -2719,7 +2719,7 @@ static void rtllib_start_bss(struct rtllib_device *ieee) unsigned long flags; if (IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee)) { - if (!ieee->bGlobalDomain) + if (!ieee->global_domain) return; } /* check if we have already found the net we @@ -2759,7 +2759,7 @@ void rtllib_disassociate(struct rtllib_device *ieee) if (ieee->data_hard_stop) ieee->data_hard_stop(ieee->dev); if (IS_DOT11D_ENABLE(ieee)) - Dot11d_Reset(ieee); + dot11d_reset(ieee); ieee->state = RTLLIB_NOLINK; ieee->is_set_key = false; ieee->wap_set = 0; @@ -2974,8 +2974,8 @@ void rtllib_softmac_init(struct rtllib_device *ieee) ieee->state = RTLLIB_NOLINK; for (i = 0; i < 5; i++) ieee->seq_ctrl[i] = 0; - ieee->pDot11dInfo = kzalloc(sizeof(struct rt_dot11d_info), GFP_ATOMIC); - if (!ieee->pDot11dInfo) + ieee->dot11d_info = kzalloc(sizeof(struct rt_dot11d_info), GFP_ATOMIC); + if (!ieee->dot11d_info) netdev_err(ieee->dev, "Can't alloc memory for DOT11D\n"); ieee->LinkDetectInfo.SlotIndex = 0; ieee->LinkDetectInfo.SlotNum = 2; @@ -3049,8 +3049,8 @@ void rtllib_softmac_init(struct rtllib_device *ieee) void rtllib_softmac_free(struct rtllib_device *ieee) { mutex_lock(&ieee->wx_mutex); - kfree(ieee->pDot11dInfo); - ieee->pDot11dInfo = NULL; + kfree(ieee->dot11d_info); + ieee->dot11d_info = NULL; del_timer_sync(&ieee->associate_timer); cancel_delayed_work_sync(&ieee->associate_retry_wq); diff --git a/drivers/staging/rtl8192e/rtllib_wx.c b/drivers/staging/rtl8192e/rtllib_wx.c index 74d4d2df3eb3..4f4904a300e0 100644 --- a/drivers/staging/rtl8192e/rtllib_wx.c +++ b/drivers/staging/rtl8192e/rtllib_wx.c @@ -541,8 +541,8 @@ int rtllib_wx_set_encode_ext(struct rtllib_device *ieee, if (idx < 1 || idx > NUM_WEP_KEYS) return -EINVAL; idx--; - } else{ - idx = ieee->crypt_info.tx_keyidx; + } else { + idx = ieee->crypt_info.tx_keyidx; } if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) { crypt = &ieee->crypt_info.crypt[idx]; diff --git a/drivers/staging/rtl8192u/Makefile b/drivers/staging/rtl8192u/Makefile index 3022728a364c..dcd51bf4aed3 100644 --- a/drivers/staging/rtl8192u/Makefile +++ b/drivers/staging/rtl8192u/Makefile @@ -7,7 +7,7 @@ ccflags-y += -O2 ccflags-y += -DCONFIG_FORCE_HARD_FLOAT=y ccflags-y += -DJACKSON_NEW_8187 -DJACKSON_NEW_RX ccflags-y += -DTHOMAS_BEACON -DTHOMAS_TASKLET -DTHOMAS_SKB -DTHOMAS_TURBO -ccflags-y += -Idrivers/staging/rtl8192u/ieee80211 +ccflags-y += -I $(srctree)/$(src)/ieee80211 r8192u_usb-y := r8192U_core.o r8180_93cx6.o r8192U_wx.o \ r8190_rtl8256.o r819xU_phy.o r819xU_firmware.o \ diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c index 041f1b123888..3534ddb900d1 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c @@ -71,7 +71,7 @@ static void *ieee80211_ccmp_init(int key_idx) goto fail; priv->key_idx = key_idx; - priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); + priv->tfm = (void *)crypto_alloc_cipher("aes", 0, 0); if (IS_ERR(priv->tfm)) { pr_debug("ieee80211_crypt_ccmp: could not allocate crypto API aes\n"); priv->tfm = NULL; diff --git a/drivers/staging/rtl8192u/r8192U.h b/drivers/staging/rtl8192u/r8192U.h index e65a893fd084..ec33fb9122e9 100644 --- a/drivers/staging/rtl8192u/r8192U.h +++ b/drivers/staging/rtl8192u/r8192U.h @@ -364,13 +364,13 @@ typedef enum _firmware_status { FW_STATUS_5_READY = 5, } firmware_status_e; -typedef struct _rt_firmare_seg_container { +typedef struct _fw_seg_container { u16 seg_size; u8 *seg_ptr; } fw_seg_container, *pfw_seg_container; typedef struct _rt_firmware { firmware_status_e firmware_status; - u16 cmdpacket_frag_thresold; + u16 cmdpacket_frag_threshold; #define RTL8190_MAX_FIRMWARE_CODE_SIZE 64000 u8 firmware_buf[RTL8190_MAX_FIRMWARE_CODE_SIZE]; u16 firmware_buf_size; diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c index 0ac0bbf7d923..f1eaab337dca 100644 --- a/drivers/staging/rtl8192u/r8192U_core.c +++ b/drivers/staging/rtl8192u/r8192U_core.c @@ -4957,20 +4957,18 @@ static void rtl8192_usb_disconnect(struct usb_interface *intf) struct net_device *dev = usb_get_intfdata(intf); struct r8192_priv *priv = ieee80211_priv(dev); - if (dev) { - unregister_netdev(dev); - - RT_TRACE(COMP_DOWN, - "=============>wlan driver to be removed\n"); - rtl8192_proc_remove_one(dev); - - rtl8192_down(dev); - kfree(priv->pFirmware); - priv->pFirmware = NULL; - rtl8192_usb_deleteendpoints(dev); - usleep_range(10000, 11000); - } + unregister_netdev(dev); + + RT_TRACE(COMP_DOWN, "=============>wlan driver to be removed\n"); + rtl8192_proc_remove_one(dev); + + rtl8192_down(dev); + kfree(priv->pFirmware); + priv->pFirmware = NULL; + rtl8192_usb_deleteendpoints(dev); + usleep_range(10000, 11000); free_ieee80211(dev); + RT_TRACE(COMP_DOWN, "wlan driver removed\n"); } diff --git a/drivers/staging/rtl8192u/r8192U_dm.c b/drivers/staging/rtl8192u/r8192U_dm.c index 5fb5f583f703..6c9f9d82477d 100644 --- a/drivers/staging/rtl8192u/r8192U_dm.c +++ b/drivers/staging/rtl8192u/r8192U_dm.c @@ -2983,7 +2983,7 @@ static void dm_init_dynamic_txpower(struct net_device *dev) static void dm_dynamic_txpower(struct net_device *dev) { struct r8192_priv *priv = ieee80211_priv(dev); - unsigned int txhipower_threshhold = 0; + unsigned int txhipower_threshold = 0; unsigned int txlowpower_threshold = 0; if (priv->ieee80211->bdynamic_txpower_enable != true) { @@ -2993,18 +2993,18 @@ static void dm_dynamic_txpower(struct net_device *dev) } /*printk("priv->ieee80211->current_network.unknown_cap_exist is %d , priv->ieee80211->current_network.broadcom_cap_exist is %d\n", priv->ieee80211->current_network.unknown_cap_exist, priv->ieee80211->current_network.broadcom_cap_exist);*/ if ((priv->ieee80211->current_network.atheros_cap_exist) && (priv->ieee80211->mode == IEEE_G)) { - txhipower_threshhold = TX_POWER_ATHEROAP_THRESH_HIGH; + txhipower_threshold = TX_POWER_ATHEROAP_THRESH_HIGH; txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW; } else { - txhipower_threshhold = TX_POWER_NEAR_FIELD_THRESH_HIGH; + txhipower_threshold = TX_POWER_NEAR_FIELD_THRESH_HIGH; txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW; } - /*printk("=======>%s(): txhipower_threshhold is %d, txlowpower_threshold is %d\n", __func__, txhipower_threshhold, txlowpower_threshold);*/ + /*printk("=======>%s(): txhipower_threshold is %d, txlowpower_threshold is %d\n", __func__, txhipower_threshold, txlowpower_threshold);*/ RT_TRACE(COMP_TXAGC, "priv->undecorated_smoothed_pwdb = %ld\n", priv->undecorated_smoothed_pwdb); if (priv->ieee80211->state == IEEE80211_LINKED) { - if (priv->undecorated_smoothed_pwdb >= txhipower_threshhold) { + if (priv->undecorated_smoothed_pwdb >= txhipower_threshold) { priv->bDynamicTxHighPower = true; priv->bDynamicTxLowPower = false; } else { diff --git a/drivers/staging/rtl8192u/r819xU_cmdpkt.c b/drivers/staging/rtl8192u/r819xU_cmdpkt.c index 900f7866d381..e064f43fd8b6 100644 --- a/drivers/staging/rtl8192u/r819xU_cmdpkt.c +++ b/drivers/staging/rtl8192u/r819xU_cmdpkt.c @@ -243,7 +243,7 @@ static void cmpk_handle_interrupt_status(struct net_device *dev, u8 *pmsg) cmdpkt_beacontimerinterrupt_819xusb(dev); } - /* Other informations in interrupt status we need? */ + /* Other information in interrupt status we need? */ DMESG("<---- cmpk_handle_interrupt_status()\n"); } diff --git a/drivers/staging/rtl8192u/r819xU_firmware.c b/drivers/staging/rtl8192u/r819xU_firmware.c index c3ea906f3af3..153d4ee0ec07 100644 --- a/drivers/staging/rtl8192u/r819xU_firmware.c +++ b/drivers/staging/rtl8192u/r819xU_firmware.c @@ -24,7 +24,7 @@ static void firmware_init_param(struct net_device *dev) struct r8192_priv *priv = ieee80211_priv(dev); rt_firmware *pfirmware = priv->pFirmware; - pfirmware->cmdpacket_frag_thresold = GET_COMMAND_PACKET_FRAG_THRESHOLD(MAX_TRANSMIT_BUFFER_SIZE); + pfirmware->cmdpacket_frag_threshold = GET_COMMAND_PACKET_FRAG_THRESHOLD(MAX_TRANSMIT_BUFFER_SIZE); } /* @@ -49,7 +49,7 @@ static bool fw_download_code(struct net_device *dev, u8 *code_virtual_address, firmware_init_param(dev); /* Fragmentation might be required */ - frag_threshold = pfirmware->cmdpacket_frag_thresold; + frag_threshold = pfirmware->cmdpacket_frag_threshold; do { if ((buffer_len - frag_offset) > frag_threshold) { frag_length = frag_threshold; diff --git a/drivers/staging/rtl8192u/r819xU_phyreg.h b/drivers/staging/rtl8192u/r819xU_phyreg.h index 65ee6088324c..dc9ddf100eab 100644 --- a/drivers/staging/rtl8192u/r819xU_phyreg.h +++ b/drivers/staging/rtl8192u/r819xU_phyreg.h @@ -53,7 +53,7 @@ /* page c */ #define rOFDM0_TRxPathEnable 0xc04 #define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ +#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ #define rOFDM0_XBRxAFE 0xc18 #define rOFDM0_XBRxIQImbalance 0xc1c #define rOFDM0_XCRxAFE 0xc20 diff --git a/drivers/staging/rtl8712/hal_init.c b/drivers/staging/rtl8712/hal_init.c index 7cdd609cab6c..4c6519ccab30 100644 --- a/drivers/staging/rtl8712/hal_init.c +++ b/drivers/staging/rtl8712/hal_init.c @@ -100,11 +100,11 @@ static void fill_fwpriv(struct _adapter *padapter, struct fw_priv *pfwpriv) pfwpriv->rf_config = RTL8712_RFC_1T2R; } pfwpriv->mp_mode = (pregpriv->mp_mode == 1) ? 1 : 0; - pfwpriv->vcsType = pregpriv->vrtl_carrier_sense; /* 0:off 1:on 2:auto */ - pfwpriv->vcsMode = pregpriv->vcs_type; /* 1:RTS/CTS 2:CTS to self */ - /* default enable turboMode */ - pfwpriv->turboMode = ((pregpriv->wifi_test == 1) ? 0 : 1); - pfwpriv->lowPowerMode = pregpriv->low_power; + pfwpriv->vcs_type = pregpriv->vrtl_carrier_sense; /* 0:off 1:on 2:auto */ + pfwpriv->vcs_mode = pregpriv->vcs_type; /* 1:RTS/CTS 2:CTS to self */ + /* default enable turbo_mode */ + pfwpriv->turbo_mode = ((pregpriv->wifi_test == 1) ? 0 : 1); + pfwpriv->low_power_mode = pregpriv->low_power; } static void update_fwhdr(struct fw_hdr *pfwhdr, const u8 *pmappedfw) diff --git a/drivers/staging/rtl8712/ieee80211.c b/drivers/staging/rtl8712/ieee80211.c index bb4f56a5fb01..2eae11dd6b42 100644 --- a/drivers/staging/rtl8712/ieee80211.c +++ b/drivers/staging/rtl8712/ieee80211.c @@ -408,7 +408,7 @@ int r8712_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen) match = true; break; } - cnt += in_ie[cnt + 1] + 2; /* goto next */ + cnt += in_ie[cnt + 1] + 2; /* goto next */ } return match; } diff --git a/drivers/staging/rtl8712/rtl8712_cmd.c b/drivers/staging/rtl8712/rtl8712_cmd.c index 1920d02f7c9f..8c36acedf507 100644 --- a/drivers/staging/rtl8712/rtl8712_cmd.c +++ b/drivers/staging/rtl8712/rtl8712_cmd.c @@ -147,17 +147,9 @@ static u8 write_macreg_hdl(struct _adapter *padapter, u8 *pbuf) static u8 read_bbreg_hdl(struct _adapter *padapter, u8 *pbuf) { - u32 val; - void (*pcmd_callback)(struct _adapter *dev, struct cmd_obj *pcmd); struct cmd_obj *pcmd = (struct cmd_obj *)pbuf; - if (pcmd->rsp && pcmd->rspsz > 0) - memcpy(pcmd->rsp, (u8 *)&val, pcmd->rspsz); - pcmd_callback = cmd_callback[pcmd->cmdcode].callback; - if (!pcmd_callback) - r8712_free_cmd_obj(pcmd); - else - pcmd_callback(padapter, pcmd); + r8712_free_cmd_obj(pcmd); return H2C_SUCCESS; } diff --git a/drivers/staging/rtl8712/rtl8712_cmd.h b/drivers/staging/rtl8712/rtl8712_cmd.h index 92fb77666d44..1ef86b8c592f 100644 --- a/drivers/staging/rtl8712/rtl8712_cmd.h +++ b/drivers/staging/rtl8712/rtl8712_cmd.h @@ -140,7 +140,7 @@ enum rtl8712_h2c_cmd { static struct _cmd_callback cmd_callback[] = { {GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/ {GEN_CMD_CODE(_Write_MACREG), NULL}, - {GEN_CMD_CODE(_Read_BBREG), &r8712_getbbrfreg_cmdrsp_callback}, + {GEN_CMD_CODE(_Read_BBREG), NULL}, {GEN_CMD_CODE(_Write_BBREG), NULL}, {GEN_CMD_CODE(_Read_RFREG), &r8712_getbbrfreg_cmdrsp_callback}, {GEN_CMD_CODE(_Write_RFREG), NULL}, /*5*/ diff --git a/drivers/staging/rtl8712/rtl8712_efuse.c b/drivers/staging/rtl8712/rtl8712_efuse.c index 8bc45ffd3029..39eb74374d0b 100644 --- a/drivers/staging/rtl8712/rtl8712_efuse.c +++ b/drivers/staging/rtl8712/rtl8712_efuse.c @@ -358,7 +358,7 @@ u8 r8712_efuse_pg_packet_write(struct _adapter *padapter, const u8 offset, u8 pg_header = 0; u16 efuse_addr = 0, curr_size = 0; u8 efuse_data, target_word_cnts = 0; - static int repeat_times; + int repeat_times; int sub_repeat; u8 bResult = true; diff --git a/drivers/staging/rtl8712/rtl8712_hal.h b/drivers/staging/rtl8712/rtl8712_hal.h index 42f519739128..66cc4645e2d1 100644 --- a/drivers/staging/rtl8712/rtl8712_hal.h +++ b/drivers/staging/rtl8712/rtl8712_hal.h @@ -72,13 +72,13 @@ struct fw_priv { /*8-bytes alignment required*/ unsigned char regulatory_class_3; /*regulatory class bit map 3*/ unsigned char rfintfs; /* 0:SWSI, 1:HWSI, 2:HWPI*/ unsigned char def_nettype; - unsigned char turboMode; - unsigned char lowPowerMode;/* 0: normal mode, 1: low power mode*/ + unsigned char turbo_mode; + unsigned char low_power_mode;/* 0: normal mode, 1: low power mode*/ /*--- long word 2 ----*/ unsigned char lbk_mode; /*0x00: normal, 0x03: MACLBK, 0x01: PHYLBK*/ unsigned char mp_mode; /* 1: for MP use, 0: for normal driver */ - unsigned char vcsType; /* 0:off 1:on 2:auto */ - unsigned char vcsMode; /* 1:RTS/CTS 2:CTS to self */ + unsigned char vcs_type; /* 0:off 1:on 2:auto */ + unsigned char vcs_mode; /* 1:RTS/CTS 2:CTS to self */ unsigned char rsvd022; unsigned char rsvd023; unsigned char rsvd024; diff --git a/drivers/staging/rtl8712/rtl8712_led.c b/drivers/staging/rtl8712/rtl8712_led.c index 5b1004b2df47..07fcf9b9b811 100644 --- a/drivers/staging/rtl8712/rtl8712_led.c +++ b/drivers/staging/rtl8712/rtl8712_led.c @@ -939,7 +939,7 @@ static void SwLedControlMode1(struct _adapter *padapter, } if (pLed->bLedLinkBlinkInProgress) { del_timer(&pLed->BlinkTimer); - pLed->bLedLinkBlinkInProgress = false; + pLed->bLedLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { del_timer(&pLed->BlinkTimer); @@ -991,7 +991,7 @@ static void SwLedControlMode1(struct _adapter *padapter, } if (pLed->bLedLinkBlinkInProgress) { del_timer(&pLed->BlinkTimer); - pLed->bLedLinkBlinkInProgress = false; + pLed->bLedLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { del_timer(&pLed->BlinkTimer); @@ -1018,7 +1018,7 @@ static void SwLedControlMode1(struct _adapter *padapter, } if (pLed->bLedLinkBlinkInProgress) { del_timer(&pLed->BlinkTimer); - pLed->bLedLinkBlinkInProgress = false; + pLed->bLedLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { del_timer(&pLed->BlinkTimer); diff --git a/drivers/staging/rtl8712/rtl871x_cmd.h b/drivers/staging/rtl8712/rtl871x_cmd.h index 75a126d8e26c..262984c58efb 100644 --- a/drivers/staging/rtl8712/rtl871x_cmd.h +++ b/drivers/staging/rtl8712/rtl871x_cmd.h @@ -422,7 +422,7 @@ struct getrfintfs_parm { * * mac[0] == 0 * ==> CMD mode, return H2C_SUCCESS. - * The following condition must be ture under CMD mode + * The following condition must be true under CMD mode * mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0; * s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7; * s2 == (b1 << 8 | b0); diff --git a/drivers/staging/rtl8712/rtl871x_mlme.c b/drivers/staging/rtl8712/rtl871x_mlme.c index 986a1d526918..3f17ef6f7e39 100644 --- a/drivers/staging/rtl8712/rtl871x_mlme.c +++ b/drivers/staging/rtl8712/rtl871x_mlme.c @@ -259,7 +259,7 @@ int r8712_is_same_ibss(struct _adapter *adapter, struct wlan_network *pnetwork) static int is_same_network(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst) { - u16 s_cap, d_cap; + u16 s_cap, d_cap; memcpy((u8 *)&s_cap, r8712_get_capability_from_ie(src->IEs), 2); memcpy((u8 *)&d_cap, r8712_get_capability_from_ie(dst->IEs), 2); diff --git a/drivers/staging/rtl8712/rtl871x_recv.c b/drivers/staging/rtl8712/rtl871x_recv.c index f10896df094b..28f736913292 100644 --- a/drivers/staging/rtl8712/rtl871x_recv.c +++ b/drivers/staging/rtl8712/rtl871x_recv.c @@ -54,7 +54,7 @@ sint _r8712_init_recv_priv(struct recv_priv *precvpriv, sint i; union recv_frame *precvframe; - memset((unsigned char *)precvpriv, 0, sizeof(struct recv_priv)); + memset((unsigned char *)precvpriv, 0, sizeof(struct recv_priv)); spin_lock_init(&precvpriv->lock); _init_queue(&precvpriv->free_recv_queue); _init_queue(&precvpriv->recv_pending_queue); @@ -325,7 +325,7 @@ static sint sta2sta_data_frame(struct _adapter *adapter, */ if (memcmp(pattrib->bssid, pattrib->src, ETH_ALEN)) return _FAIL; - sta_addr = pattrib->bssid; + sta_addr = pattrib->bssid; } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { if (bmcast) { /* For AP mode, if DA == MCAST, then BSSID should @@ -404,7 +404,7 @@ static sint ap2sta_data_frame(struct _adapter *adapter, if (bmcast) *psta = r8712_get_bcmc_stainfo(adapter); else - *psta = r8712_get_stainfo(pstapriv, pattrib->bssid); + *psta = r8712_get_stainfo(pstapriv, pattrib->bssid); if (*psta == NULL) return _FAIL; } else if (check_fwstate(pmlmepriv, WIFI_MP_STATE) && diff --git a/drivers/staging/rtl8712/rtl871x_sta_mgt.c b/drivers/staging/rtl8712/rtl871x_sta_mgt.c index 9648ee15b40e..7c30b9e68e70 100644 --- a/drivers/staging/rtl8712/rtl871x_sta_mgt.c +++ b/drivers/staging/rtl8712/rtl871x_sta_mgt.c @@ -25,7 +25,7 @@ static void _init_stainfo(struct sta_info *psta) { memset((u8 *)psta, 0, sizeof(struct sta_info)); - spin_lock_init(&psta->lock); + spin_lock_init(&psta->lock); INIT_LIST_HEAD(&psta->list); INIT_LIST_HEAD(&psta->hash_list); _r8712_init_sta_xmit_priv(&psta->sta_xmitpriv); diff --git a/drivers/staging/rtl8712/rtl871x_xmit.c b/drivers/staging/rtl8712/rtl871x_xmit.c index 5c7dc9c6f76b..7c8857409916 100644 --- a/drivers/staging/rtl8712/rtl871x_xmit.c +++ b/drivers/staging/rtl8712/rtl871x_xmit.c @@ -193,8 +193,8 @@ sint r8712_update_attrib(struct _adapter *padapter, _pkt *pkt, pattrib->ether_type = ntohs(etherhdr.h_proto); -{ - /*If driver xmit ARP packet, driver can set ps mode to initial + /* + * If driver xmit ARP packet, driver can set ps mode to initial * setting. It stands for getting DHCP or fix IP. */ if (pattrib->ether_type == 0x0806) { @@ -206,7 +206,7 @@ sint r8712_update_attrib(struct _adapter *padapter, _pkt *pkt, padapter->registrypriv.smart_ps); } } -} + memcpy(pattrib->dst, ðerhdr.h_dest, ETH_ALEN); memcpy(pattrib->src, ðerhdr.h_source, ETH_ALEN); pattrib->pctrl = 0; @@ -949,7 +949,7 @@ static void alloc_hwxmits(struct _adapter *padapter) pxmitpriv->vo_txqueue.head = 0; hwxmits[1] .phwtxqueue = &pxmitpriv->vo_txqueue; hwxmits[1] .sta_queue = &pxmitpriv->vo_pending; - pxmitpriv->vi_txqueue.head = 0; + pxmitpriv->vi_txqueue.head = 0; hwxmits[2] .phwtxqueue = &pxmitpriv->vi_txqueue; hwxmits[2] .sta_queue = &pxmitpriv->vi_pending; pxmitpriv->bk_txqueue.head = 0; diff --git a/drivers/staging/rtl8712/usb_intf.c b/drivers/staging/rtl8712/usb_intf.c index 92d75d7c51ae..005010de9997 100644 --- a/drivers/staging/rtl8712/usb_intf.c +++ b/drivers/staging/rtl8712/usb_intf.c @@ -196,10 +196,6 @@ static int r871x_suspend(struct usb_interface *pusb_intf, pm_message_t state) struct _adapter *padapter = netdev_priv(pnetdev); netdev_info(pnetdev, "Suspending...\n"); - if (!pnetdev || !netif_running(pnetdev)) { - netdev_info(pnetdev, "Unable to suspend\n"); - return 0; - } padapter->bSuspended = true; rtl871x_intf_stop(padapter); if (pnetdev->netdev_ops->ndo_stop) @@ -221,10 +217,6 @@ static int r871x_resume(struct usb_interface *pusb_intf) struct _adapter *padapter = netdev_priv(pnetdev); netdev_info(pnetdev, "Resuming...\n"); - if (!pnetdev || !netif_running(pnetdev)) { - netdev_info(pnetdev, "Unable to resume\n"); - return 0; - } netif_device_attach(pnetdev); if (pnetdev->netdev_ops->ndo_open) pnetdev->netdev_ops->ndo_open(pnetdev); @@ -232,13 +224,6 @@ static int r871x_resume(struct usb_interface *pusb_intf) rtl871x_intf_resume(padapter); return 0; } - -static int r871x_reset_resume(struct usb_interface *pusb_intf) -{ - /* dummy routine */ - return 0; -} - #endif static struct drv_priv drvpriv = { @@ -249,7 +234,6 @@ static struct drv_priv drvpriv = { #ifdef CONFIG_PM .r871xu_drv.suspend = r871x_suspend, .r871xu_drv.resume = r871x_resume, - .r871xu_drv.reset_resume = r871x_reset_resume, #endif }; diff --git a/drivers/staging/rtl8723bs/TODO b/drivers/staging/rtl8723bs/TODO index 80dbdaca3a8f..58e02f944b6d 100644 --- a/drivers/staging/rtl8723bs/TODO +++ b/drivers/staging/rtl8723bs/TODO @@ -1,6 +1,6 @@ TODO: - find and remove code blocks guarded by never set CONFIG_FOO defines -- find and remove remaining code valid only for 5 HGz. Most of the obvious +- find and remove remaining code valid only for 5 GHz. Most of the obvious ones have been removed, but things like channel > 14 still exist. - find and remove any code for other chips that is left over - convert any remaining unusual variable types diff --git a/drivers/staging/rtl8723bs/core/rtw_ap.c b/drivers/staging/rtl8723bs/core/rtw_ap.c index 2691241bfd84..cbbfef389874 100644 --- a/drivers/staging/rtl8723bs/core/rtw_ap.c +++ b/drivers/staging/rtl8723bs/core/rtw_ap.c @@ -21,7 +21,6 @@ void init_mlme_ap_info(struct adapter *padapter) struct sta_priv *pstapriv = &padapter->stapriv; struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; - spin_lock_init(&pmlmepriv->bcn_update_lock); /* for ACL */ @@ -69,7 +68,6 @@ static void update_BCNTIM(struct adapter *padapter) /* update TIM IE */ /* if (pstapriv->tim_bitmap) */ if (true) { - u8 *p, *dst_ie, *premainder_ie = NULL, *pbackup_remainder_ie = NULL; __le16 tim_bitmap_le; uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen; @@ -83,7 +81,6 @@ static void update_BCNTIM(struct adapter *padapter) pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_ ); if (p != NULL && tim_ielen > 0) { - tim_ielen += 2; premainder_ie = p+tim_ielen; @@ -94,9 +91,7 @@ static void update_BCNTIM(struct adapter *padapter) /* append TIM IE from dst_ie offset */ dst_ie = p; - } else{ - - + } else { tim_ielen = 0; /* calucate head_len */ @@ -121,7 +116,6 @@ static void update_BCNTIM(struct adapter *padapter) if (p != NULL) offset += tmp_len+2; - /* DS Parameter Set IE, len =3 */ offset += 3; @@ -131,12 +125,9 @@ static void update_BCNTIM(struct adapter *padapter) /* append TIM IE from offset */ dst_ie = pie + offset; - } - if (remainder_ielen > 0) { - pbackup_remainder_ie = rtw_malloc(remainder_ielen); if (pbackup_remainder_ie && premainder_ie) memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); @@ -160,7 +151,6 @@ static void update_BCNTIM(struct adapter *padapter) *dst_ie++ = 0; if (tim_ielen == 4) { - __le16 pvb; if (pstapriv->tim_bitmap&0xff00) @@ -171,15 +161,12 @@ static void update_BCNTIM(struct adapter *padapter) *dst_ie++ = le16_to_cpu(pvb); } else if (tim_ielen == 5) { - - memcpy(dst_ie, &tim_bitmap_le, 2); dst_ie += 2; } /* copy remainder IE */ if (pbackup_remainder_ie) { - memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); kfree(pbackup_remainder_ie); @@ -187,7 +174,6 @@ static void update_BCNTIM(struct adapter *padapter) offset = (uint)(dst_ie - pie); pnetwork_mlmeext->IELength = offset + remainder_ielen; - } } @@ -223,7 +209,6 @@ void expire_timeout_chk(struct adapter *padapter) char chk_alive_list[NUM_STA]; int i; - spin_lock_bh(&pstapriv->auth_list_lock); phead = &pstapriv->auth_list; @@ -237,16 +222,13 @@ void expire_timeout_chk(struct adapter *padapter) } #endif while (phead != plist) { - psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); plist = get_next(plist); if (psta->expire_to > 0) { - psta->expire_to--; if (psta->expire_to == 0) { - list_del_init(&psta->auth_list); pstapriv->auth_list_cnt--; @@ -267,13 +249,11 @@ void expire_timeout_chk(struct adapter *padapter) spin_lock_bh(&pstapriv->auth_list_lock); } } - } spin_unlock_bh(&pstapriv->auth_list_lock); psta = NULL; - spin_lock_bh(&pstapriv->asoc_list_lock); phead = &pstapriv->asoc_list; @@ -287,7 +267,6 @@ void expire_timeout_chk(struct adapter *padapter) } #endif while (phead != plist) { - psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); #ifdef CONFIG_AUTO_AP_MODE @@ -304,11 +283,9 @@ void expire_timeout_chk(struct adapter *padapter) } if (psta->expire_to == 0) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if (padapter->registrypriv.wifi_spec == 1) { - psta->expire_to = pstapriv->expire_to; continue; } @@ -336,7 +313,6 @@ void expire_timeout_chk(struct adapter *padapter) if (stainfo_offset_valid(stainfo_offset)) chk_alive_list[chk_alive_num++] = stainfo_offset; - continue; } list_del_init(&psta->asoc_list); @@ -347,9 +323,7 @@ void expire_timeout_chk(struct adapter *padapter) psta->state ); updated = ap_free_sta(padapter, psta, false, WLAN_REASON_DEAUTH_LEAVING); - } else{ - - + } else { /* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */ if (psta->sleepq_len > (NR_XMITFRAME/pstapriv->asoc_list_cnt) && padapter->xmitpriv.free_xmitframe_cnt < (( @@ -404,7 +378,6 @@ void expire_timeout_chk(struct adapter *padapter) psta->keep_alive_trycnt = 0; continue; } else if (psta->keep_alive_trycnt <= 3) { - DBG_871X( "ack check for asoc expire, keep_alive_trycnt =%d\n", psta->keep_alive_trycnt); @@ -453,7 +426,6 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level) shortGIrate = query_ra_short_GI(psta); if (pcur_network->Configuration.DSConfig > 14) { - if (tx_ra_bitmap & 0xffff000) sta_band |= WIRELESS_11_5N; @@ -474,7 +446,6 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level) psta->raid = rtw_hal_networktype_to_raid(padapter, psta); if (psta->aid < NUM_STA) { - u8 arg[4] = {0}; arg[0] = psta->mac_id; @@ -486,12 +457,9 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level) __func__, psta->mac_id, psta->raid, shortGIrate, tx_ra_bitmap); rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, rssi_level); - } else{ - - + } else { DBG_871X("station aid %d exceed the max number\n", psta->aid); } - } void update_bmc_sta(struct adapter *padapter) @@ -507,7 +475,6 @@ void update_bmc_sta(struct adapter *padapter) struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); if (psta) { - psta->aid = 0;/* default set to 0 */ /* psta->mac_id = psta->aid+4; */ psta->mac_id = psta->aid + 1;/* mac_id = 1 for bc/mc stainfo */ @@ -571,12 +538,9 @@ void update_bmc_sta(struct adapter *padapter) psta->state = _FW_LINKED; spin_unlock_bh(&psta->lock); - } else{ - - + } else { DBG_871X("add_RATid_bmc_sta error!\n"); } - } /* notes: */ @@ -611,7 +575,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta) else psta->ieee8021x_blocked = false; - /* update sta's cap */ /* ERP */ @@ -619,7 +582,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta) /* HT related cap */ if (phtpriv_sta->ht_option) { - /* check if sta supports rx ampdu */ phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; @@ -640,7 +602,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta) phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; - /* check if sta support s Short GI 20M */ if (( phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info @@ -651,7 +612,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta) if (( phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info ) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) { - if (psta->bw_mode == CHANNEL_WIDTH_40) /* according to psta->bw_mode */ phtpriv_sta->sgi_40m = true; else @@ -663,7 +623,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta) /* B0 Config LDPC Coding Capability */ if (TEST_FLAG(phtpriv_ap->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAPABILITY_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap))) { - SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX)); DBG_871X("Enable HT Tx LDPC for STA(%d)\n", psta->aid); } @@ -671,13 +630,10 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta) /* B7 B8 B9 Config STBC setting */ if (TEST_FLAG(phtpriv_ap->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAPABILITY_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap))) { - SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX)); DBG_871X("Enable HT Tx STBC for STA(%d)\n", psta->aid); } - } else{ - - + } else { phtpriv_sta->ampdu_enable = false; phtpriv_sta->sgi_20m = false; @@ -704,16 +660,12 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta) memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); - /* add ratid */ /* add_RATid(padapter, psta);//move to ap_sta_info_defer_update() */ - spin_lock_bh(&psta->lock); psta->state |= _FW_LINKED; spin_unlock_bh(&psta->lock); - - } static void update_ap_info(struct adapter *padapter, struct sta_info *psta) @@ -731,7 +683,6 @@ static void update_ap_info(struct adapter *padapter, struct sta_info *psta) /* HT related cap */ if (phtpriv_ap->ht_option) { - /* check if sta supports rx ampdu */ /* phtpriv_ap->ampdu_enable = phtpriv_ap->ampdu_enable; */ @@ -743,11 +694,8 @@ static void update_ap_info(struct adapter *padapter, struct sta_info *psta) if ((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) phtpriv_ap->sgi_40m = true; - psta->qos_option = true; - } else{ - - + } else { phtpriv_ap->ampdu_enable = false; phtpriv_ap->sgi_20m = false; @@ -772,7 +720,6 @@ static void update_hw_ht_param(struct adapter *padapter) DBG_871X("%s\n", __func__); - /* handle A-MPDU parameter field */ /* AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k @@ -805,7 +752,6 @@ static void update_hw_ht_param(struct adapter *padapter) /* Config current HT Protection mode. */ /* */ /* pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; */ - } void start_bss_network(struct adapter *padapter, u8 *pbuf) @@ -833,7 +779,6 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) cur_bwmode = CHANNEL_WIDTH_20; cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - /* check if there is wps ie, */ /* if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, */ /* and at first time the security ie (RSN/WPA IE) will not include in beacon. */ @@ -845,14 +790,12 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) )) pmlmeext->bstart_bss = true; - /* todo: update wmm, ht cap */ /* pmlmeinfo->WMM_enable; */ /* pmlmeinfo->HT_enable; */ if (pmlmepriv->qospriv.qos_option) pmlmeinfo->WMM_enable = true; if (pmlmepriv->htpriv.ht_option) { - pmlmeinfo->WMM_enable = true; pmlmeinfo->HT_enable = true; /* pmlmeinfo->HT_info_enable = true; */ @@ -900,12 +843,10 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); if (!pmlmepriv->cur_network.join_res) { /* setting only at first time */ - /* u32 initialgain; */ /* initialgain = 0x1e; */ - /* disable dynamic functions, such as high power, DIG */ /* Save_DM_Func_Flag(padapter); */ /* Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, false); */ @@ -914,7 +855,6 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, true); /* rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); */ - } /* set channel, bwmode */ @@ -925,7 +865,6 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) (pnetwork->IELength - sizeof(struct ndis_802_11_fix_ie)) ); if (p && ie_len) { - pht_info = (struct HT_info_element *)(p+2); if (cur_channel > 14) { @@ -937,12 +876,10 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) } if ((cbw40_enable) && (pht_info->infos[0] & BIT(2))) { - /* switch to the 40M Hz mode */ /* pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; */ cur_bwmode = CHANNEL_WIDTH_40; switch (pht_info->infos[0] & 0x3) { - case 1: /* pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; */ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; @@ -958,9 +895,7 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } - } - } set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); @@ -991,9 +926,7 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) rtw_get_capability((struct wlan_bssid_ex *)pnetwork) ); - if (pmlmeext->bstart_bss) { - update_beacon(padapter, _TIM_IE_, NULL, true); #ifndef CONFIG_INTERRUPT_BASED_TXBCN /* other case will tx beacon when bcn interrupt coming in. */ @@ -1002,15 +935,12 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) DBG_871X("issue_beacon, fail!\n"); #endif /* CONFIG_INTERRUPT_BASED_TXBCN */ - } - /* update bc/mc sta_info */ update_bmc_sta(padapter); /* pmlmeext->bstart_bss = true; */ - } int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) @@ -1050,7 +980,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return _FAIL; - if (len < 0 || len > MAX_IE_SZ) return _FAIL; @@ -1060,7 +989,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) memcpy(ie, pbuf, pbss_network->IELength); - if (pbss_network->InfrastructureMode != Ndis802_11APMode) return _FAIL; @@ -1086,7 +1014,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) (pbss_network->IELength - _BEACON_IE_OFFSET_) ); if (p && ie_len > 0) { - memset(&pbss_network->Ssid, 0, sizeof(struct ndis_802_11_ssid)); memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); pbss_network->Ssid.SsidLength = ie_len; @@ -1105,7 +1032,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) pbss_network->Configuration.DSConfig = channel; - memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); /* get supported rates */ p = rtw_get_ie( @@ -1115,7 +1041,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) (pbss_network->IELength - _BEACON_IE_OFFSET_) ); if (p != NULL) { - memcpy(supportRate, p+2, ie_len); supportRateNum = ie_len; } @@ -1128,17 +1053,14 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) pbss_network->IELength - _BEACON_IE_OFFSET_ ); if (p != NULL) { - memcpy(supportRate+supportRateNum, p+2, ie_len); supportRateNum += ie_len; - } network_type = rtw_check_network_type(supportRate, supportRateNum, channel); rtw_set_supported_rate(pbss_network->SupportedRates, network_type); - /* parsing ERP_IE */ p = rtw_get_ie( ie + _BEACON_IE_OFFSET_, @@ -1168,7 +1090,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) (pbss_network->IELength - _BEACON_IE_OFFSET_) ); if (p && ie_len > 0) { - if (rtw_parse_wpa2_ie( p, ie_len+2, @@ -1176,7 +1097,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) &pairwise_cipher, NULL ) == _SUCCESS) { - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; psecuritypriv->dot8021xalg = 1;/* psk, todo:802.1x */ @@ -1185,7 +1105,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) psecuritypriv->wpa2_group_cipher = group_cipher; psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; } - } /* wpa */ @@ -1194,7 +1113,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; for (p = ie + _BEACON_IE_OFFSET_; ; p += (ie_len + 2)) { - p = rtw_get_ie( p, _SSN_IE_1_, @@ -1202,7 +1120,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)) ); if ((p) && (!memcmp(p+2, OUI1, 4))) { - if (rtw_parse_wpa_ie( p, ie_len+2, @@ -1210,7 +1127,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) &pairwise_cipher, NULL ) == _SUCCESS) { - psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; psecuritypriv->dot8021xalg = 1;/* psk, todo:802.1x */ @@ -1222,22 +1138,17 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) } break; - } if ((p == NULL) || (ie_len == 0)) break; - - } /* wmm */ ie_len = 0; pmlmepriv->qospriv.qos_option = 0; if (pregistrypriv->wmm_enable) { - for (p = ie + _BEACON_IE_OFFSET_; ; p += (ie_len + 2)) { - p = rtw_get_ie( p, _VENDOR_SPECIFIC_IE_, @@ -1245,7 +1156,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)) ); if ((p) && !memcmp(p+2, WMM_PARA_IE, 6)) { - pmlmepriv->qospriv.qos_option = 1; *(p+8) |= BIT(7);/* QoS Info, support U-APSD */ @@ -1261,7 +1171,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) if ((p == NULL) || (ie_len == 0)) break; - } } @@ -1273,7 +1182,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) (pbss_network->IELength - _BEACON_IE_OFFSET_) ); if (p && ie_len > 0) { - u8 rf_type = 0; u8 max_rx_ampdu_factor = 0; struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); @@ -1294,26 +1202,20 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) if (!TEST_FLAG(pmlmepriv->htpriv.ldpc_cap, LDPC_HT_ENABLE_RX)) pht_cap->cap_info &= cpu_to_le16(~(IEEE80211_HT_CAP_LDPC_CODING)); - if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_TX)) pht_cap->cap_info &= cpu_to_le16(~(IEEE80211_HT_CAP_TX_STBC)); - if (!TEST_FLAG(pmlmepriv->htpriv.stbc_cap, STBC_HT_ENABLE_RX)) pht_cap->cap_info &= cpu_to_le16(~(IEEE80211_HT_CAP_RX_STBC_3R)); - pht_cap->ampdu_params_info &= ~( IEEE80211_HT_CAP_AMPDU_FACTOR|IEEE80211_HT_CAP_AMPDU_DENSITY ); if ((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) { - pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); - } else{ - - + } else { pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); } @@ -1328,13 +1230,11 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); if (rf_type == RF_1T1R) { - pht_cap->supp_mcs_set[0] = 0xff; pht_cap->supp_mcs_set[1] = 0x0; } memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len); - } /* parsing HT_INFO_IE */ @@ -1347,9 +1247,7 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) if (p && ie_len > 0) pHT_info_ie = p; - switch (network_type) { - case WIRELESS_11B: pbss_network->NetworkTypeInUse = Ndis802_11DS; break; @@ -1373,21 +1271,18 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) if ((psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP)) { - /* todo: */ /* ht_cap = false; */ } /* ht_cap */ if (pregistrypriv->ht_enable && ht_cap) { - pmlmepriv->htpriv.ht_option = true; pmlmepriv->qospriv.qos_option = 1; if (pregistrypriv->ampdu_enable == 1) pmlmepriv->htpriv.ampdu_enable = true; - HT_caps_handler(padapter, (struct ndis_80211_var_ie *)pHT_caps_ie); HT_info_handler(padapter, (struct ndis_80211_var_ie *)pHT_info_ie); @@ -1401,15 +1296,12 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) /* start_bss_network(padapter, (u8 *)pbss_network); */ rtw_startbss_cmd(padapter, RTW_CMDF_WAIT_ACK); - /* alloc sta_info for ap itself */ psta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); if (!psta) { - psta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); if (psta == NULL) return _FAIL; - } /* update AP's sta info */ @@ -1424,7 +1316,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) /* update_bmc_sta(padapter); */ return ret; - } void rtw_set_macaddr_acl(struct adapter *padapter, int mode) @@ -1457,21 +1348,17 @@ int rtw_acl_add_sta(struct adapter *padapter, u8 *addr) if ((NUM_ACL-1) < pacl_list->num) return (-1); - spin_lock_bh(&(pacl_node_q->lock)); phead = get_list_head(pacl_node_q); plist = get_next(phead); while (phead != plist) { - paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); plist = get_next(plist); if (!memcmp(paclnode->addr, addr, ETH_ALEN)) { - if (paclnode->valid == true) { - added = true; DBG_871X("%s, sta has been added\n", __func__); break; @@ -1481,19 +1368,15 @@ int rtw_acl_add_sta(struct adapter *padapter, u8 *addr) spin_unlock_bh(&(pacl_node_q->lock)); - if (added) return ret; - spin_lock_bh(&(pacl_node_q->lock)); for (i = 0; i < NUM_ACL; i++) { - paclnode = &pacl_list->aclnode[i]; if (!paclnode->valid) { - INIT_LIST_HEAD(&paclnode->list); memcpy(paclnode->addr, addr, ETH_ALEN); @@ -1538,7 +1421,6 @@ int rtw_acl_remove_sta(struct adapter *padapter, u8 *addr) plist = get_next(phead); while (phead != plist) { - paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); plist = get_next(plist); @@ -1546,9 +1428,7 @@ int rtw_acl_remove_sta(struct adapter *padapter, u8 *addr) !memcmp(paclnode->addr, addr, ETH_ALEN) || !memcmp(baddr, addr, ETH_ALEN) ) { - if (paclnode->valid) { - paclnode->valid = false; list_del_init(&paclnode->list); @@ -1563,7 +1443,6 @@ int rtw_acl_remove_sta(struct adapter *padapter, u8 *addr) DBG_871X("%s, acl_num =%d\n", __func__, pacl_list->num); return ret; - } u8 rtw_ap_set_pairwise_key(struct adapter *padapter, struct sta_info *psta) @@ -1588,20 +1467,17 @@ u8 rtw_ap_set_pairwise_key(struct adapter *padapter, struct sta_info *psta) init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); - psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); - res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: return res; - } static int rtw_ap_set_key( @@ -1643,7 +1519,6 @@ static int rtw_ap_set_key( psetkeyparm->set_tx = set_tx; switch (alg) { - case _WEP40_: keylen = 5; break; @@ -1665,7 +1540,6 @@ static int rtw_ap_set_key( pcmd->rsp = NULL; pcmd->rspsz = 0; - INIT_LIST_HEAD(&pcmd->list); res = rtw_enqueue_cmd(pcmdpriv, pcmd); @@ -1693,7 +1567,6 @@ int rtw_ap_set_wep_key( u8 alg; switch (keylen) { - case 5: alg = _WEP40_; break; @@ -1712,7 +1585,6 @@ int rtw_ap_set_wep_key( static void update_bcn_fixed_ie(struct adapter *padapter) { DBG_871X("%s\n", __func__); - } static void update_bcn_erpinfo_ie(struct adapter *padapter) @@ -1737,7 +1609,6 @@ static void update_bcn_erpinfo_ie(struct adapter *padapter) (pnetwork->IELength - _BEACON_IE_OFFSET_) ); if (p && len > 0) { - struct ndis_80211_var_ie *pIE = (struct ndis_80211_var_ie *)p; if (pmlmepriv->num_sta_non_erp == 1) @@ -1754,37 +1625,31 @@ static void update_bcn_erpinfo_ie(struct adapter *padapter) ERP_IE_handler(padapter, pIE); } - } static void update_bcn_htcap_ie(struct adapter *padapter) { DBG_871X("%s\n", __func__); - } static void update_bcn_htinfo_ie(struct adapter *padapter) { DBG_871X("%s\n", __func__); - } static void update_bcn_rsn_ie(struct adapter *padapter) { DBG_871X("%s\n", __func__); - } static void update_bcn_wpa_ie(struct adapter *padapter) { DBG_871X("%s\n", __func__); - } static void update_bcn_wmm_ie(struct adapter *padapter) { DBG_871X("%s\n", __func__); - } static void update_bcn_wps_ie(struct adapter *padapter) @@ -1802,7 +1667,6 @@ static void update_bcn_wps_ie(struct adapter *padapter) unsigned char *ie = pnetwork->IEs; u32 ielen = pnetwork->IELength; - DBG_871X("%s\n", __func__); pwps_ie = rtw_get_wps_ie( @@ -1826,7 +1690,6 @@ static void update_bcn_wps_ie(struct adapter *padapter) remainder_ielen = ielen - wps_offset - wps_ielen; if (remainder_ielen > 0) { - pbackup_remainder_ie = rtw_malloc(remainder_ielen); if (pbackup_remainder_ie) memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); @@ -1834,7 +1697,6 @@ static void update_bcn_wps_ie(struct adapter *padapter) wps_ielen = (uint)pwps_ie_src[1];/* to get ie data len */ if ((wps_offset+wps_ielen+2+remainder_ielen) <= MAX_IE_SZ) { - memcpy(pwps_ie, pwps_ie_src, wps_ielen+2); pwps_ie += (wps_ielen+2); @@ -1850,7 +1712,6 @@ static void update_bcn_wps_ie(struct adapter *padapter) /* deal with the case without set_tx_beacon_cmd() in update_beacon() */ #if defined(CONFIG_INTERRUPT_BASED_TXBCN) if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { - u8 sr = 0; rtw_get_wps_attr_content( @@ -1871,7 +1732,6 @@ static void update_bcn_wps_ie(struct adapter *padapter) static void update_bcn_p2p_ie(struct adapter *padapter) { - } static void update_bcn_vendor_spec_ie(struct adapter *padapter, u8 *oui) @@ -1892,9 +1752,6 @@ static void update_bcn_vendor_spec_ie(struct adapter *padapter, u8 *oui) else DBG_871X("unknown OUI type!\n"); - - - } void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx) @@ -1918,7 +1775,6 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx) spin_lock_bh(&pmlmepriv->bcn_update_lock); switch (ie_id) { - case 0xFF: update_bcn_fixed_ie(padapter);/* 8: TimeStamp, 2: Beacon Interval 2:Capability */ @@ -1971,12 +1827,10 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx) #ifndef CONFIG_INTERRUPT_BASED_TXBCN if (tx) { - /* send_beacon(padapter);//send_beacon must execute on TSR level */ set_tx_beacon_cmd(padapter); } #endif /* CONFIG_INTERRUPT_BASED_TXBCN */ - } /* @@ -2060,14 +1914,12 @@ static int rtw_ht_operation_update(struct adapter *padapter) __func__, pmlmepriv->ht_op_mode, op_mode_changes); return op_mode_changes; - } void associated_clients_update(struct adapter *padapter, u8 updated) { /* update associcated stations cap. */ if (updated) { - struct list_head *phead, *plist; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; @@ -2079,7 +1931,6 @@ void associated_clients_update(struct adapter *padapter, u8 updated) /* check asoc_queue */ while (phead != plist) { - psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); @@ -2088,9 +1939,7 @@ void associated_clients_update(struct adapter *padapter, u8 updated) } spin_unlock_bh(&pstapriv->asoc_list_lock); - } - } /* called > TSR LEVEL for USB or SDIO Interface*/ @@ -2101,102 +1950,75 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta) struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); if (!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) { - if (!psta->no_short_preamble_set) { - psta->no_short_preamble_set = 1; pmlmepriv->num_sta_no_short_preamble++; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_preamble == 1)) { - beacon_updated = true; update_beacon(padapter, 0xFF, NULL, true); } - } - } else{ - - + } else { if (psta->no_short_preamble_set) { - psta->no_short_preamble_set = 0; pmlmepriv->num_sta_no_short_preamble--; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_preamble == 0)) { - beacon_updated = true; update_beacon(padapter, 0xFF, NULL, true); } - } } if (psta->flags & WLAN_STA_NONERP) { - if (!psta->nonerp_set) { - psta->nonerp_set = 1; pmlmepriv->num_sta_non_erp++; if (pmlmepriv->num_sta_non_erp == 1) { - beacon_updated = true; update_beacon(padapter, _ERPINFO_IE_, NULL, true); } } - - } else{ - - + } else { if (psta->nonerp_set) { - psta->nonerp_set = 0; pmlmepriv->num_sta_non_erp--; if (pmlmepriv->num_sta_non_erp == 0) { - beacon_updated = true; update_beacon(padapter, _ERPINFO_IE_, NULL, true); } } - } - if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) { - if (!psta->no_short_slot_time_set) { - psta->no_short_slot_time_set = 1; pmlmepriv->num_sta_no_short_slot_time++; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_slot_time == 1)) { - beacon_updated = true; update_beacon(padapter, 0xFF, NULL, true); } - } - } else{ - - + } else { if (psta->no_short_slot_time_set) { - psta->no_short_slot_time_set = 0; pmlmepriv->num_sta_no_short_slot_time--; if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && (pmlmepriv->num_sta_no_short_slot_time == 0)) { - beacon_updated = true; update_beacon(padapter, 0xFF, NULL, true); } @@ -2204,7 +2026,6 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta) } if (psta->flags & WLAN_STA_HT) { - u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); DBG_871X("HT: STA " MAC_FMT " HT Capabilities " @@ -2237,9 +2058,7 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta) pmlmepriv->num_sta_ht_20mhz); } - } else{ - - + } else { if (!psta->no_ht_set) { psta->no_ht_set = 1; pmlmepriv->num_sta_no_ht++; @@ -2253,7 +2072,6 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta) } if (rtw_ht_operation_update(padapter) > 0) { - update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, false); update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, true); } @@ -2262,7 +2080,6 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta) associated_clients_update(padapter, beacon_updated); DBG_871X("%s, updated =%d\n", __func__, beacon_updated); - } u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta) @@ -2279,7 +2096,6 @@ u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta) pmlmepriv->num_sta_no_short_preamble--; if (pmlmeext->cur_wireless_mode > WIRELESS_11B && pmlmepriv->num_sta_no_short_preamble == 0){ - beacon_updated = true; update_beacon(padapter, 0xFF, NULL, true); } @@ -2289,7 +2105,6 @@ u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta) psta->nonerp_set = 0; pmlmepriv->num_sta_non_erp--; if (pmlmepriv->num_sta_non_erp == 0) { - beacon_updated = true; update_beacon(padapter, _ERPINFO_IE_, NULL, true); } @@ -2300,7 +2115,6 @@ u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta) pmlmepriv->num_sta_no_short_slot_time--; if (pmlmeext->cur_wireless_mode > WIRELESS_11B && pmlmepriv->num_sta_no_short_slot_time == 0){ - beacon_updated = true; update_beacon(padapter, 0xFF, NULL, true); } @@ -2322,7 +2136,6 @@ u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta) } if (rtw_ht_operation_update(padapter) > 0) { - update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, false); update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, true); } @@ -2333,7 +2146,6 @@ u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta) DBG_871X("%s, updated =%d\n", __func__, beacon_updated); return beacon_updated; - } u8 ap_free_sta( @@ -2349,7 +2161,6 @@ u8 ap_free_sta( return beacon_updated; if (active == true) { - /* tear down Rx AMPDU */ send_delba(padapter, 0, psta->hwaddr);/* recipient */ @@ -2362,13 +2173,11 @@ u8 ap_free_sta( psta->htpriv.agg_enable_bitmap = 0x0;/* reset */ psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */ - /* report_del_sta_event(padapter, psta->hwaddr, reason); */ /* clear cam entry / key */ rtw_clearstakey_cmd(padapter, psta, true); - spin_lock_bh(&psta->lock); psta->state &= ~_FW_LINKED; spin_unlock_bh(&psta->lock); @@ -2381,9 +2190,7 @@ u8 ap_free_sta( rtw_free_stainfo(padapter, psta); - return beacon_updated; - } int rtw_sta_flush(struct adapter *padapter) @@ -2401,14 +2208,12 @@ int rtw_sta_flush(struct adapter *padapter) if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) return ret; - spin_lock_bh(&pstapriv->asoc_list_lock); phead = &pstapriv->asoc_list; plist = get_next(phead); /* free sta asoc_queue */ while (phead != plist) { - psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); @@ -2422,13 +2227,11 @@ int rtw_sta_flush(struct adapter *padapter) } spin_unlock_bh(&pstapriv->asoc_list_lock); - issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); associated_clients_update(padapter, true); return ret; - } /* called > TSR LEVEL for USB or SDIO Interface*/ @@ -2437,7 +2240,6 @@ void sta_info_update(struct adapter *padapter, struct sta_info *psta) int flags = psta->flags; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - /* update wmm cap. */ if (WLAN_STA_WME&flags) psta->qos_option = 1; @@ -2449,12 +2251,9 @@ void sta_info_update(struct adapter *padapter, struct sta_info *psta) /* update 802.11n ht cap. */ if (WLAN_STA_HT&flags) { - psta->htpriv.ht_option = true; psta->qos_option = 1; - } else{ - - + } else { psta->htpriv.ht_option = false; } @@ -2462,8 +2261,6 @@ void sta_info_update(struct adapter *padapter, struct sta_info *psta) psta->htpriv.ht_option = false; update_sta_info_apmode(padapter, psta); - - } /* called >= TSR LEVEL for USB or SDIO Interface*/ @@ -2473,7 +2270,6 @@ void ap_sta_info_defer_update(struct adapter *padapter, struct sta_info *psta) struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); if (psta->state & _FW_LINKED) { - pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; /* add ratid */ @@ -2506,7 +2302,6 @@ void rtw_ap_restore_network(struct adapter *padapter) if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) { - /* restore group key, WEP keys is restored in ips_leave() */ rtw_set_key( padapter, @@ -2531,7 +2326,6 @@ void rtw_ap_restore_network(struct adapter *padapter) stainfo_offset = rtw_stainfo_offset(pstapriv, psta); if (stainfo_offset_valid(stainfo_offset)) chk_alive_list[chk_alive_num++] = stainfo_offset; - } spin_unlock_bh(&pstapriv->asoc_list_lock); @@ -2548,12 +2342,10 @@ void rtw_ap_restore_network(struct adapter *padapter) /* per sta pairwise key and settings */ if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) { - rtw_setstakey_cmd(padapter, psta, true, false); } } } - } void start_ap_mode(struct adapter *padapter) @@ -2595,7 +2387,6 @@ void start_ap_mode(struct adapter *padapter) pmlmepriv->p2p_beacon_ie = NULL; pmlmepriv->p2p_probe_resp_ie = NULL; - /* for ACL */ INIT_LIST_HEAD(&(pacl_list->acl_node_q.queue)); pacl_list->num = 0; @@ -2604,7 +2395,6 @@ void start_ap_mode(struct adapter *padapter) INIT_LIST_HEAD(&pacl_list->aclnode[i].list); pacl_list->aclnode[i].valid = false; } - } void stop_ap_mode(struct adapter *padapter) @@ -2635,12 +2425,10 @@ void stop_ap_mode(struct adapter *padapter) phead = get_list_head(pacl_node_q); plist = get_next(phead); while (phead != plist) { - paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); plist = get_next(plist); if (paclnode->valid == true) { - paclnode->valid = false; list_del_init(&paclnode->list); diff --git a/drivers/staging/rtl8723bs/core/rtw_cmd.c b/drivers/staging/rtl8723bs/core/rtw_cmd.c index 830be63391b7..91520ca3bbad 100644 --- a/drivers/staging/rtl8723bs/core/rtw_cmd.c +++ b/drivers/staging/rtl8723bs/core/rtw_cmd.c @@ -166,10 +166,8 @@ sint _rtw_init_cmd_priv(struct cmd_priv *pcmdpriv) { sint res = _SUCCESS; - sema_init(&(pcmdpriv->cmd_queue_sema), 0); - /* sema_init(&(pcmdpriv->cmd_done_sema), 0); */ - sema_init(&(pcmdpriv->terminate_cmdthread_sema), 0); - + init_completion(&pcmdpriv->cmd_queue_comp); + init_completion(&pcmdpriv->terminate_cmdthread_comp); _rtw_init_queue(&(pcmdpriv->cmd_queue)); @@ -286,7 +284,7 @@ struct cmd_obj *_rtw_dequeue_cmd(struct __queue *queue) spin_lock_irqsave(&queue->lock, irqL); if (list_empty(&(queue->queue))) obj = NULL; - else{ + else { obj = LIST_CONTAINOR(get_next(&(queue->queue)), struct cmd_obj, list); list_del_init(&obj->list); } @@ -369,7 +367,7 @@ u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj); if (res == _SUCCESS) - up(&pcmdpriv->cmd_queue_sema); + complete(&pcmdpriv->cmd_queue_comp); exit: return res; @@ -410,8 +408,8 @@ void rtw_stop_cmd_thread(struct adapter *adapter) atomic_read(&(adapter->cmdpriv.cmdthd_running)) == true && adapter->cmdpriv.stop_req == 0) { adapter->cmdpriv.stop_req = 1; - up(&adapter->cmdpriv.cmd_queue_sema); - down(&adapter->cmdpriv.terminate_cmdthread_sema); + complete(&adapter->cmdpriv.cmd_queue_comp); + wait_for_completion(&adapter->cmdpriv.terminate_cmdthread_comp); } } @@ -435,13 +433,13 @@ int rtw_cmd_thread(void *context) pcmdpriv->stop_req = 0; atomic_set(&(pcmdpriv->cmdthd_running), true); - up(&pcmdpriv->terminate_cmdthread_sema); + complete(&pcmdpriv->terminate_cmdthread_comp); RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("start r871x rtw_cmd_thread !!!!\n")); while (1) { - if (down_interruptible(&pcmdpriv->cmd_queue_sema)) { - DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" down_interruptible(&pcmdpriv->cmd_queue_sema) return != 0, break\n", FUNC_ADPT_ARG(padapter)); + if (wait_for_completion_interruptible(&pcmdpriv->cmd_queue_comp)) { + DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" wait_for_completion_interruptible(&pcmdpriv->cmd_queue_comp) return != 0, break\n", FUNC_ADPT_ARG(padapter)); break; } @@ -502,7 +500,7 @@ _next: } pcmdpriv->cmd_seq++; - } else{ + } else { pcmd->res = H2C_PARAMETERS_ERROR; } @@ -546,11 +544,11 @@ post_process: if (pcmd_callback == NULL) { RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("mlme_cmd_hdl(): pcmd_callback = 0x%p, cmdcode = 0x%x\n", pcmd_callback, pcmd->cmdcode)); rtw_free_cmd_obj(pcmd); - } else{ + } else { /* todo: !!! fill rsp_buf to pcmd->rsp if (pcmd->rsp!= NULL) */ pcmd_callback(pcmd->padapter, pcmd);/* need conider that free cmd_obj in rtw_cmd_callback */ } - } else{ + } else { RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("%s: cmdcode = 0x%x callback not defined!\n", __func__, pcmd->cmdcode)); rtw_free_cmd_obj(pcmd); } @@ -581,7 +579,7 @@ post_process: rtw_free_cmd_obj(pcmd); } while (1); - up(&pcmdpriv->terminate_cmdthread_sema); + complete(&pcmdpriv->terminate_cmdthread_comp); atomic_set(&(pcmdpriv->cmdthd_running), false); thread_exit(); @@ -837,14 +835,6 @@ u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork) } psecnetwork = (struct wlan_bssid_ex *)&psecuritypriv->sec_bss; - if (psecnetwork == NULL) { - kfree(pcmd); - res = _FAIL; - - RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("rtw_joinbss_cmd :psecnetwork == NULL!!!\n")); - - goto exit; - } memset(psecnetwork, 0, t_len); @@ -880,7 +870,7 @@ u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork) if (psecnetwork->IELength != tmp_len) { psecnetwork->IELength = tmp_len; pqospriv->qos_option = 1; /* There is WMM IE in this corresp. beacon */ - } else{ + } else { pqospriv->qos_option = 0;/* There is no WMM IE in this corresp. beacon */ } } @@ -987,7 +977,7 @@ u8 rtw_setopmode_cmd(struct adapter *padapter, enum NDIS_802_11_NETWORK_INFRAST init_h2fwcmd_w_parm_no_rsp(ph2c, psetop, _SetOpMode_CMD_); res = rtw_enqueue_cmd(pcmdpriv, ph2c); - } else{ + } else { setopmode_hdl(padapter, (u8 *)psetop); kfree(psetop); } @@ -1022,7 +1012,7 @@ u8 rtw_setstakey_cmd(struct adapter *padapter, struct sta_info *sta, u8 unicast_ if (unicast_key == true) { memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16); - } else{ + } else { memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16); } @@ -1049,7 +1039,7 @@ u8 rtw_setstakey_cmd(struct adapter *padapter, struct sta_info *sta, u8 unicast_ ph2c->rsp = (u8 *) psetstakey_rsp; ph2c->rspsz = sizeof(struct set_stakey_rsp); res = rtw_enqueue_cmd(pcmdpriv, ph2c); - } else{ + } else { set_stakey_hdl(padapter, (u8 *)psetstakey_para); kfree(psetstakey_para); } @@ -1072,7 +1062,7 @@ u8 rtw_clearstakey_cmd(struct adapter *padapter, struct sta_info *sta, u8 enqueu clear_cam_entry(padapter, cam_id); rtw_camid_free(padapter, cam_id); } - } else{ + } else { ph2c = rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; @@ -1291,7 +1281,7 @@ u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue, u8 swconf init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelPlan_param, GEN_CMD_CODE(_SetChannelPlan)); res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); - } else{ + } else { /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ if (H2C_SUCCESS != set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param)) res = _FAIL; @@ -1392,7 +1382,7 @@ u8 traffic_status_watchdog(struct adapter *padapter, u8 from_timer) pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 30; } } - } else{ + } else { /* DBG_871X("(+)Tx = %d, Rx = %d\n", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod, pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); */ if (pmlmepriv->LinkDetectInfo.TrafficTransitionCount >= 2) @@ -1414,7 +1404,7 @@ u8 traffic_status_watchdog(struct adapter *padapter, u8 from_timer) else rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_TRAFFIC_BUSY, 1); } - } else{ + } else { struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); int n_assoc_iface = 0; @@ -1564,7 +1554,7 @@ u8 rtw_lps_ctrl_wk_cmd(struct adapter *padapter, u8 lps_ctrl_type, u8 enqueue) init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); res = rtw_enqueue_cmd(pcmdpriv, ph2c); - } else{ + } else { lps_ctrl_wk_hdl(padapter, lps_ctrl_type); } @@ -1623,7 +1613,7 @@ static void rtw_lps_change_dtim_hdl(struct adapter *padapter, u8 dtim) if (rtw_btcoex_IsBtControlLps(padapter) == true) return; - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); if (pwrpriv->dtim != dtim) { DBG_871X("change DTIM from %d to %d, bFwCurrentInPSMode =%d, ps_mode =%d\n", pwrpriv->dtim, dtim, @@ -1640,7 +1630,7 @@ static void rtw_lps_change_dtim_hdl(struct adapter *padapter, u8 dtim) rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); } - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); } static void rtw_dm_ra_mask_hdl(struct adapter *padapter, struct sta_info *psta) @@ -1766,7 +1756,7 @@ static void rtw_chk_hi_queue_hdl(struct adapter *padapter) if (update_tim == true) update_beacon(padapter, _TIM_IE_, NULL, true); - } else{/* re check again */ + } else {/* re check again */ rtw_chk_hi_queue_cmd(padapter); } @@ -1956,7 +1946,7 @@ static void c2h_wk_callback(_workitem *work) if (c2h_evt != NULL) { /* This C2H event is read, clear it */ c2h_evt_clear(adapter); - } else{ + } else { c2h_evt = rtw_malloc(16); if (c2h_evt != NULL) { /* This C2H event is not read, read & clear now */ @@ -1980,7 +1970,7 @@ static void c2h_wk_callback(_workitem *work) /* Handle CCX report here */ rtw_hal_c2h_handler(adapter, c2h_evt); kfree(c2h_evt); - } else{ + } else { /* Enqueue into cmd_thread for others */ rtw_c2h_wk_cmd(adapter, c2h_evt); } @@ -2130,7 +2120,7 @@ void rtw_createbss_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd) } rtw_indicate_connect(padapter); - } else{ + } else { pwlan = _rtw_alloc_network(pmlmepriv); spin_lock_bh(&(pmlmepriv->scanned_queue.lock)); if (pwlan == NULL) { @@ -2141,7 +2131,7 @@ void rtw_createbss_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd) goto createbss_cmd_fail; } pwlan->last_scanned = jiffies; - } else{ + } else { list_add_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); } diff --git a/drivers/staging/rtl8723bs/core/rtw_debug.c b/drivers/staging/rtl8723bs/core/rtw_debug.c index a2a2cefd1786..a3c8a712bdc2 100644 --- a/drivers/staging/rtl8723bs/core/rtw_debug.c +++ b/drivers/staging/rtl8723bs/core/rtw_debug.c @@ -519,7 +519,7 @@ int proc_get_ap_info(struct seq_file *m, void *v) } } - } else{ + } else { DBG_871X_SEL_NL(m, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); } diff --git a/drivers/staging/rtl8723bs/core/rtw_efuse.c b/drivers/staging/rtl8723bs/core/rtw_efuse.c index b3247c9642ea..eea3bece59a1 100644 --- a/drivers/staging/rtl8723bs/core/rtw_efuse.c +++ b/drivers/staging/rtl8723bs/core/rtw_efuse.c @@ -70,7 +70,7 @@ Efuse_Write1ByteToFakeContent( } if (fakeEfuseBank == 0) fakeEfuseContent[Offset] = Value; - else{ + else { fakeBTEfuseContent[fakeEfuseBank-1][Offset] = Value; } return true; @@ -303,7 +303,7 @@ bool bPseudoTest) if (tmpidx < 100) { *data = rtw_read8(padapter, EFUSE_CTRL); bResult = true; - } else{ + } else { *data = 0xff; bResult = false; DBG_871X("%s: [ERROR] addr = 0x%x bResult =%d time out 1s !!!\n", __func__, addr, bResult); @@ -359,7 +359,7 @@ bool bPseudoTest) if (tmpidx < 100) { bResult = true; - } else{ + } else { bResult = false; DBG_871X("%s: [ERROR] addr = 0x%x , efuseValue = 0x%x , bResult =%d time out 1s !!!\n", __func__, addr, efuseValue, bResult); diff --git a/drivers/staging/rtl8723bs/core/rtw_ieee80211.c b/drivers/staging/rtl8723bs/core/rtw_ieee80211.c index 33f2649ba2ec..ac203c01c098 100644 --- a/drivers/staging/rtl8723bs/core/rtw_ieee80211.c +++ b/drivers/staging/rtl8723bs/core/rtw_ieee80211.c @@ -99,7 +99,7 @@ int rtw_check_network_type(unsigned char *rate, int ratelen, int channel) return WIRELESS_INVALID; else return WIRELESS_11A; - } else{ /* could be pure B, pure G, or B/G */ + } else { /* could be pure B, pure G, or B/G */ if (rtw_is_cckratesonly_included(rate)) return WIRELESS_11B; else if (rtw_is_cckrates_included(rate)) @@ -157,7 +157,7 @@ u8 *rtw_get_ie(u8 *pbuf, sint index, sint *len, sint limit) if (*p == index) { *len = *(p + 1); return p; - } else{ + } else { tmp = *(p + 1); p += (tmp + 2); i += (tmp + 2); @@ -205,7 +205,7 @@ u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, u *ielen = in_ie[cnt+1]+2; break; - } else{ + } else { cnt += in_ie[cnt+1]+2; /* goto next */ } } @@ -336,7 +336,7 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv) wireless_mode = WIRELESS_11A_5N; else wireless_mode = WIRELESS_11BG_24N; - } else{ + } else { wireless_mode = pregistrypriv->wireless_mode; } @@ -347,7 +347,7 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv) if (rateLen > 8) { ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, pdev_network->SupportedRates, &sz); /* ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); */ - } else{ + } else { ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, pdev_network->SupportedRates, &sz); } @@ -404,7 +404,7 @@ unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit) return pbuf; - } else{ + } else { *wpa_ie_len = 0; return NULL; } @@ -642,7 +642,7 @@ int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len) *wapi_len = in_ie[cnt+1]+2; cnt += in_ie[cnt+1]+2; /* get next */ - } else{ + } else { cnt += in_ie[cnt+1]+2; /* get next */ } } @@ -684,7 +684,7 @@ int rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie, *wpa_len = in_ie[cnt+1]+2; cnt += in_ie[cnt+1]+2; /* get next */ - } else{ + } else { if (authmode == _WPA2_IE_ID_) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("\n get_rsn_ie: sec_idx =%d in_ie[cnt+1]+2 =%d\n", sec_idx, in_ie[cnt+1]+2)); @@ -700,7 +700,7 @@ int rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie, *rsn_len = in_ie[cnt+1]+2; cnt += in_ie[cnt+1]+2; /* get next */ - } else{ + } else { cnt += in_ie[cnt+1]+2; /* get next */ } } @@ -765,7 +765,7 @@ u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen) cnt += in_ie[cnt+1]+2; break; - } else{ + } else { cnt += in_ie[cnt+1]+2; /* goto next */ } } @@ -817,7 +817,7 @@ u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id, u8 *buf_att *len_attr = attr_len; break; - } else{ + } else { attr_ptr += attr_len; /* goto next */ } } @@ -1252,7 +1252,7 @@ u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate) max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); else if (MCS_rate[0] & BIT(0)) max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); - } else{ + } else { if (MCS_rate[1]) { if (MCS_rate[1] & BIT(7)) max_rate = (bw_40MHz) ? ((short_GI)?3000:2700):((short_GI)?1444:1300); @@ -1270,7 +1270,7 @@ u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate) max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260); else if (MCS_rate[1] & BIT(0)) max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); - } else{ + } else { if (MCS_rate[0] & BIT(7)) max_rate = (bw_40MHz) ? ((short_GI)?1500:1350):((short_GI)?722:650); else if (MCS_rate[0] & BIT(6)) diff --git a/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c b/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c index 35ca825a7e5a..0c8a050b2a81 100644 --- a/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c +++ b/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c @@ -95,20 +95,20 @@ u8 rtw_do_join(struct adapter *padapter) pmlmepriv->to_join = false; RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("rtw_do_join(): site survey return error\n.")); } - } else{ + } else { pmlmepriv->to_join = false; ret = _FAIL; } goto exit; - } else{ + } else { int select_ret; spin_unlock_bh(&(pmlmepriv->scanned_queue.lock)); select_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv); if (select_ret == _SUCCESS) { pmlmepriv->to_join = false; _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); - } else{ + } else { if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) { /* submit createbss_cmd to change to a ADHOC_MASTER */ @@ -135,7 +135,7 @@ u8 rtw_do_join(struct adapter *padapter) RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("***Error => rtw_select_and_join_from_scanned_queue FAIL under STA_Mode***\n ")); - } else{ + } else { /* can't associate ; reset under-linking */ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); @@ -150,7 +150,7 @@ u8 rtw_do_join(struct adapter *padapter) pmlmepriv->to_join = false; RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("do_join(): site survey return error\n.")); } - } else{ + } else { ret = _FAIL; pmlmepriv->to_join = false; } @@ -289,13 +289,13 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid) _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); } - } else{ + } else { goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */ } } else { rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 1); } - } else{ + } else { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("Set SSID not the same ssid\n")); RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_ssid =[%s] len = 0x%x\n", ssid->Ssid, (unsigned int)ssid->SsidLength)); RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("assoc_ssid =[%s] len = 0x%x\n", pmlmepriv->assoc_ssid.Ssid, (unsigned int)pmlmepriv->assoc_ssid.SsidLength)); @@ -670,7 +670,7 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter) short_GI, psta->htpriv.ht_cap.supp_mcs_set ); - } else{ + } else { while ((pcur_bss->SupportedRates[i] != 0) && (pcur_bss->SupportedRates[i] != 0xFF)) { rate = pcur_bss->SupportedRates[i]&0x7F; if (rate > max_rate) diff --git a/drivers/staging/rtl8723bs/core/rtw_mlme.c b/drivers/staging/rtl8723bs/core/rtw_mlme.c index 4c5d5cf9dfe0..406e313477aa 100644 --- a/drivers/staging/rtl8723bs/core/rtw_mlme.c +++ b/drivers/staging/rtl8723bs/core/rtw_mlme.c @@ -902,7 +902,7 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf) if (rtw_select_and_join_from_scanned_queue(pmlmepriv) == _SUCCESS) { _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); - } else{ + } else { struct wlan_bssid_ex *pdev_network = &(adapter->registrypriv.dev_network); u8 *pibss = adapter->registrypriv.dev_network.MacAddress; @@ -925,7 +925,7 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf) pmlmepriv->to_join = false; } } - } else{ + } else { int s_ret; set_fwstate(pmlmepriv, _FW_UNDER_LINKING); pmlmepriv->to_join = false; @@ -935,7 +935,7 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf) } else if (s_ret == 2) {/* there is no need to wait for join */ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); rtw_indicate_connect(adapter); - } else{ + } else { DBG_871X("try_to_join, but select scanning queue fail, to_roam:%d\n", rtw_to_roam(adapter)); if (rtw_to_roam(adapter) != 0) { @@ -1389,7 +1389,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) if (pmlmepriv->assoc_ssid.SsidLength == 0) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("@@@@@ joinbss event call back for Any SSid\n")); - } else{ + } else { RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("@@@@@ rtw_joinbss_event_callback for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); } @@ -1416,7 +1416,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) if (check_fwstate(pmlmepriv, _FW_LINKED)) { if (the_same_macaddr == true) { ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); - } else{ + } else { pcur_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); if (pcur_wlan) pcur_wlan->fixed = false; @@ -1432,7 +1432,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) } } - } else{ + } else { ptarget_wlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, pnetwork); if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) { if (ptarget_wlan) @@ -1443,7 +1443,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) /* s2. update cur_network */ if (ptarget_wlan) { rtw_joinbss_update_network(adapter, ptarget_wlan, pnetwork); - } else{ + } else { DBG_871X_LEVEL(_drv_always_, "Can't find ptarget_wlan when joinbss_event callback\n"); spin_unlock_bh(&(pmlmepriv->scanned_queue.lock)); goto ignore_joinbss_callback; @@ -1464,7 +1464,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) { pmlmepriv->cur_network_scanned = ptarget_wlan; rtw_indicate_connect(adapter); - } else{ + } else { /* adhoc mode will rtw_indicate_connect when rtw_stassoc_event_callback */ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("adhoc mode, fw_state:%x", get_fwstate(pmlmepriv))); } @@ -1475,7 +1475,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("Cancel assoc_timer\n")); - } else{ + } else { RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("rtw_joinbss_event_callback err: fw_state:%x", get_fwstate(pmlmepriv))); spin_unlock_bh(&(pmlmepriv->scanned_queue.lock)); goto ignore_joinbss_callback; @@ -1494,7 +1494,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); } - } else{/* if join_res < 0 (join fails), then try again */ + } else {/* if join_res < 0 (join fails), then try again */ #ifdef REJOIN res = _FAIL; @@ -1510,7 +1510,7 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) } else if (res == 2) {/* there is no need to wait for join */ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); rtw_indicate_connect(adapter); - } else{ + } else { RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("Set Assoc_Timer = 1; can't find match ssid in scanned_q\n")); #endif @@ -1846,7 +1846,7 @@ void _rtw_join_timeout_handler(struct timer_list *t) } } - } else{ + } else { rtw_indicate_disconnect(adapter); free_scanqueue(pmlmepriv);/* */ @@ -1956,11 +1956,11 @@ void rtw_dynamic_check_timer_handler(struct adapter *adapter) if (bEnterPS) { /* rtw_lps_ctrl_wk_cmd(adapter, LPS_CTRL_ENTER, 1); */ rtw_hal_dm_watchdog_in_lps(adapter); - } else{ + } else { /* call rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1) in traffic_status_watchdog() */ } - } else{ + } else { if (is_primary_adapter(adapter)) { rtw_dynamic_chk_wk_cmd(adapter); } @@ -2373,10 +2373,8 @@ sint rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv, s INIT_LIST_HEAD(&pcmd->list); - /* sema_init(&(pcmd->cmd_sem), 0); */ - res = rtw_enqueue_cmd(pcmdpriv, pcmd); - } else{ + } else { setkey_hdl(adapter, (u8 *)psetkeyparm); kfree((u8 *) psetkeyparm); } @@ -2434,7 +2432,7 @@ static int SecIsInPMKIDList(struct adapter *Adapter, u8 *bssid) if ((psecuritypriv->PMKIDList[i].bUsed) && (!memcmp(psecuritypriv->PMKIDList[i].Bssid, bssid, ETH_ALEN))) { break; - } else{ + } else { i++; /* continue; */ } @@ -2521,7 +2519,7 @@ sint rtw_restruct_sec_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie, uint in iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid); if (iEntry < 0) { return ielength; - } else{ + } else { if (authmode == _WPA2_IE_ID_) ielength = rtw_append_pmkid(adapter, iEntry, out_ie, ielength); } @@ -2636,7 +2634,7 @@ void rtw_joinbss_reset(struct adapter *padapter) else threshold = 0; rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); - } else{ + } else { threshold = 1; rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); } @@ -3132,7 +3130,7 @@ sint rtw_linked_check(struct adapter *padapter) (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == true)) { if (padapter->stapriv.asoc_sta_count > 2) return true; - } else{ /* Station mode */ + } else { /* Station mode */ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == true) return true; } diff --git a/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c b/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c index 8445d516c93d..ebb45acb4446 100644 --- a/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c +++ b/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c @@ -865,7 +865,7 @@ unsigned int OnBeacon(struct adapter *padapter, union recv_frame *precv_frame) /* DBG_871X("update_bcn_info\n"); */ update_beacon_info(padapter, pframe, len, psta); } - } else{ + } else { /* allocate a new CAM entry for IBSS station */ cam_idx = allocate_fw_sta_entry(padapter); if (cam_idx == NUM_STA) @@ -977,7 +977,7 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame) /* pstat->flags = 0; */ /* pstat->capability = 0; */ - } else{ + } else { spin_lock_bh(&pstapriv->asoc_list_lock); if (list_empty(&pstat->asoc_list) == false) { @@ -1019,13 +1019,13 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame) pstat->state |= WIFI_FW_AUTH_SUCCESS; pstat->expire_to = pstapriv->assoc_to; pstat->authalg = algorithm; - } else{ + } else { DBG_871X("(2)auth rejected because out of seq [rx_seq =%d, exp_seq =%d]!\n", seq, pstat->auth_seq+1); status = _STATS_OUT_OF_AUTH_SEQ_; goto auth_fail; } - } else{ /* shared system or auto authentication */ + } else { /* shared system or auto authentication */ if (seq == 1) { /* prepare for the challenging txt... */ memset((void *)pstat->chg_txt, 78, 128); @@ -1052,12 +1052,12 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame) pstat->state |= WIFI_FW_AUTH_SUCCESS; /* challenging txt is correct... */ pstat->expire_to = pstapriv->assoc_to; - } else{ + } else { DBG_871X("auth rejected because challenge failure!\n"); status = _STATS_CHALLENGE_FAIL_; goto auth_fail; } - } else{ + } else { DBG_871X("(3)auth rejected because out of seq [rx_seq =%d, exp_seq =%d]!\n", seq, pstat->auth_seq+1); status = _STATS_OUT_OF_AUTH_SEQ_; @@ -1149,17 +1149,17 @@ unsigned int OnAuthClient(struct adapter *padapter, union recv_frame *precv_fram set_link_timer(pmlmeext, REAUTH_TO); return _SUCCESS; - } else{ + } else { /* open system */ go2asoc = 1; } } else if (seq == 4) { if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) { go2asoc = 1; - } else{ + } else { goto authclnt_fail; } - } else{ + } else { /* this is also illegal */ /* DBG_871X("marc: clnt auth failed due to illegal seq =%x\n", seq); */ goto authclnt_fail; @@ -1207,7 +1207,7 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame) if (frame_type == WIFI_ASSOCREQ) { reassoc = 0; ie_offset = _ASOCREQ_IE_OFFSET_; - } else{ /* WIFI_REASSOCREQ */ + } else { /* WIFI_REASSOCREQ */ reassoc = 1; ie_offset = _REASOCREQ_IE_OFFSET_; } @@ -1241,11 +1241,11 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame) if (!((pstat->state) & WIFI_FW_ASSOC_SUCCESS)) { status = _RSON_CLS2_; goto asoc_class2_error; - } else{ + } else { pstat->state &= (~WIFI_FW_ASSOC_SUCCESS); pstat->state |= WIFI_FW_ASSOC_STATE; } - } else{ + } else { pstat->state &= (~WIFI_FW_AUTH_SUCCESS); pstat->state |= WIFI_FW_ASSOC_STATE; } @@ -1344,7 +1344,7 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame) if (!pstat->wpa2_pairwise_cipher) status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; - } else{ + } else { status = WLAN_STATUS_INVALID_IE; } @@ -1368,7 +1368,7 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame) if (!pstat->wpa_pairwise_cipher) status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; - } else{ + } else { status = WLAN_STATUS_INVALID_IE; } @@ -1417,7 +1417,7 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame) } } - } else{ + } else { int copy_len; if (psecuritypriv->wpa_psk == 0) { @@ -1436,7 +1436,7 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame) "used\n"); pstat->flags |= WLAN_STA_WPS; copy_len = 0; - } else{ + } else { copy_len = ((wpa_ie_len+2) > sizeof(pstat->wpa_ie)) ? (sizeof(pstat->wpa_ie)):(wpa_ie_len+2); } @@ -1793,7 +1793,7 @@ unsigned int OnDeAuth(struct adapter *padapter, union recv_frame *precv_frame) return _SUCCESS; - } else{ + } else { int ignore_received_deauth = 0; /* Commented by Albert 20130604 */ @@ -1867,7 +1867,7 @@ unsigned int OnDisassoc(struct adapter *padapter, union recv_frame *precv_frame) } return _SUCCESS; - } else{ + } else { DBG_871X_LEVEL(_drv_always_, "sta recv disassoc reason code(%d) sta:%pM\n", reason, GetAddr3Ptr(pframe)); @@ -1969,7 +1969,7 @@ unsigned int OnAction_back(struct adapter *padapter, union recv_frame *precv_fra if (pmlmeinfo->accept_addba_req) { issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 0); - } else{ + } else { issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 37);/* reject ADDBA Req */ } @@ -1984,7 +1984,7 @@ unsigned int OnAction_back(struct adapter *padapter, union recv_frame *precv_fra DBG_871X("agg_enable for TID =%d\n", tid); psta->htpriv.agg_enable_bitmap |= 1 << tid; psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); - } else{ + } else { psta->htpriv.agg_enable_bitmap &= ~BIT(tid); } @@ -2692,7 +2692,7 @@ void issue_probersp(struct adapter *padapter, unsigned char *da, u8 is_valid_p2p pframe += remainder_ielen; pattrib->pktlen += remainder_ielen; } - } else{ + } else { memcpy(pframe, cur_network->IEs, cur_network->IELength); pframe += cur_network->IELength; pattrib->pktlen += cur_network->IELength; @@ -2731,7 +2731,7 @@ void issue_probersp(struct adapter *padapter, unsigned char *da, u8 is_valid_p2p pattrib->pktlen += ssid_ielen_diff; } } - } else{ + } else { /* timestamp will be inserted by hardware */ pframe += 8; pattrib->pktlen += 8; @@ -2867,7 +2867,7 @@ static int _issue_probereq(struct adapter *padapter, /* unicast probe request frame */ memcpy(pwlanhdr->addr1, da, ETH_ALEN); memcpy(pwlanhdr->addr3, da, ETH_ALEN); - } else{ + } else { /* broadcast probe request frame */ memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); @@ -2892,7 +2892,7 @@ static int _issue_probereq(struct adapter *padapter, if (bssrate_len > 8) { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, bssrate, &(pattrib->pktlen)); pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); - } else{ + } else { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, bssrate_len, bssrate, &(pattrib->pktlen)); } @@ -3040,7 +3040,7 @@ void issue_auth(struct adapter *padapter, struct sta_info *psta, unsigned short if ((psta->auth_seq == 2) && (psta->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, psta->chg_txt, &(pattrib->pktlen)); - } else{ + } else { memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN); memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); @@ -3168,7 +3168,7 @@ void issue_asocrsp(struct adapter *padapter, unsigned short status, struct sta_i if (pstat->bssratelen <= 8) { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, pstat->bssratelen, pstat->bssrateset, &(pattrib->pktlen)); - } else{ + } else { pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pstat->bssrateset, &(pattrib->pktlen)); pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (pstat->bssratelen-8), pstat->bssrateset+8, &(pattrib->pktlen)); } @@ -3487,7 +3487,7 @@ static int _issue_nulldata(struct adapter *padapter, unsigned char *da, if (wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); - } else{ + } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } @@ -3656,7 +3656,7 @@ static int _issue_qos_nulldata(struct adapter *padapter, unsigned char *da, if (wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); - } else{ + } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } @@ -3765,7 +3765,7 @@ static int _issue_deauth(struct adapter *padapter, unsigned char *da, if (wait_ack) { ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); - } else{ + } else { dump_mgntframe(padapter, pmgntframe); ret = _SUCCESS; } @@ -4271,7 +4271,7 @@ unsigned int send_beacon(struct adapter *padapter) if (false == bxmitok) { DBG_871X("%s fail! %u ms\n", __func__, jiffies_to_msecs(jiffies - start)); return _FAIL; - } else{ + } else { unsigned long passing_time = jiffies_to_msecs(jiffies - start); if (passing_time > 100 || issue > 3) @@ -4331,7 +4331,7 @@ void site_survey(struct adapter *padapter) else #endif set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); - } else{ + } else { #ifdef DBG_FIXED_CHAN if (pmlmeext->fixed_chan != 0xff) SelectChannel(padapter, pmlmeext->fixed_chan); @@ -4379,7 +4379,7 @@ void site_survey(struct adapter *padapter) } #endif - } else{ + } else { /* channel number is 0 or this channel is not valid. */ @@ -4641,7 +4641,7 @@ void start_create_ibss(struct adapter *padapter) report_join_res(padapter, -1); pmlmeinfo->state = WIFI_FW_NULL_STATE; - } else{ + } else { rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress); join_type = 0; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); @@ -4650,7 +4650,7 @@ void start_create_ibss(struct adapter *padapter) pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; rtw_indicate_connect(padapter); } - } else{ + } else { DBG_871X("start_create_ibss, invalid cap:%x\n", caps); return; } @@ -4711,7 +4711,7 @@ void start_clnt_join(struct adapter *padapter) pmlmeinfo->state = WIFI_FW_ADHOC_STATE; report_join_res(padapter, 1); - } else{ + } else { /* DBG_871X("marc: invalid cap:%x\n", caps); */ return; } @@ -4914,7 +4914,7 @@ static void process_80211d(struct adapter *padapter, struct wlan_bssid_ex *bssid j++; k++; } - } else{ + } else { /* keep original STA 2.4G channel plan */ while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0) && @@ -4976,7 +4976,7 @@ static void process_80211d(struct adapter *padapter, struct wlan_bssid_ex *bssid j++; k++; } - } else{ + } else { /* keep original STA 5G channel plan */ while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) { chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; @@ -5334,13 +5334,6 @@ void report_add_sta_event(struct adapter *padapter, unsigned char *MacAddr, int return; } - -bool rtw_port_switch_chk(struct adapter *adapter) -{ - bool switch_needed = false; - return switch_needed; -} - /**************************************************************************** Following are the event callback functions @@ -5378,7 +5371,7 @@ void update_sta_info(struct adapter *padapter, struct sta_info *psta) psta->htpriv.beamform_cap = pmlmepriv->htpriv.beamform_cap; memcpy(&psta->htpriv.ht_cap, &pmlmeinfo->HT_caps, sizeof(struct rtw_ieee80211_ht_cap)); - } else{ + } else { psta->htpriv.ht_option = false; psta->htpriv.ampdu_enable = false; @@ -5414,7 +5407,6 @@ static void rtw_mlmeext_disconnect(struct adapter *padapter) struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&(pmlmeinfo->network)); - u8 state_backup = (pmlmeinfo->state&0x03); /* set_opmode_cmd(padapter, infra_client_with_mlme); */ @@ -5440,17 +5432,6 @@ static void rtw_mlmeext_disconnect(struct adapter *padapter) pmlmeinfo->state = WIFI_FW_NULL_STATE; - if (state_backup == WIFI_FW_STATION_STATE) { - if (rtw_port_switch_chk(padapter)) { - rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); - { - struct adapter *port0_iface = dvobj_get_port0_adapter(adapter_to_dvobj(padapter)); - if (port0_iface) - rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, 0); - } - } - } - /* switch to the 20M Hz mode after disconnect */ pmlmeext->cur_bwmode = CHANNEL_WIDTH_20; pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; @@ -5530,9 +5511,6 @@ void mlmeext_joinbss_event_callback(struct adapter *padapter, int join_res) rtw_hal_macid_wakeup(padapter, psta->mac_id); } - if (rtw_port_switch_chk(padapter)) - rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); - join_type = 2; rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); @@ -5565,7 +5543,7 @@ void mlmeext_sta_add_event_callback(struct adapter *padapter, struct sta_info *p if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { /* adhoc master or sta_count>1 */ /* nothing to do */ - } else{ /* adhoc client */ + } else { /* adhoc client */ /* update TSF Value */ /* update_TSF(pmlmeext, pframe, len); */ @@ -5699,7 +5677,7 @@ static u8 chk_ap_is_alive(struct adapter *padapter, struct sta_info *psta) && sta_rx_probersp_pkts(psta) == sta_last_rx_probersp_pkts(psta) ) { ret = false; - } else{ + } else { ret = true; } @@ -5803,14 +5781,14 @@ void linked_status_chk(struct adapter *padapter) if (pmlmeinfo->FW_sta_info[i].retry < 3) { pmlmeinfo->FW_sta_info[i].retry++; - } else{ + } else { pmlmeinfo->FW_sta_info[i].retry = 0; pmlmeinfo->FW_sta_info[i].status = 0; report_del_sta_event(padapter, psta->hwaddr , 65535/* indicate disconnect caused by no rx */ ); } - } else{ + } else { pmlmeinfo->FW_sta_info[i].retry = 0; pmlmeinfo->FW_sta_info[i].rx_pkt = (u32)sta_rx_pkts(psta); } @@ -6018,7 +5996,7 @@ static int rtw_auto_ap_start_beacon(struct adapter *adapter) rateLen = rtw_get_rateset_len(supportRate); if (rateLen > 8) { ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, supportRate, &sz); - } else{ + } else { ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, supportRate, &sz); } @@ -6030,7 +6008,7 @@ static int rtw_auto_ap_start_beacon(struct adapter *adapter) struct mlme_ext_priv *pbuddy_mlmeext = &pbuddystruct adapter->mlmeextpriv; oper_channel = pbuddy_mlmeext->cur_channel; - } else{ + } else { oper_channel = adapter_to_dvobj(adapter)->oper_channel; } ie = rtw_set_ie(ie, _DSSET_IE_, 1, &oper_channel, &sz); @@ -6045,7 +6023,7 @@ static int rtw_auto_ap_start_beacon(struct adapter *adapter) /* lunch ap mode & start to issue beacon */ if (rtw_check_beacon_data(adapter, pbuf, sz) == _SUCCESS) { - } else{ + } else { ret = -EINVAL; } @@ -6074,7 +6052,7 @@ u8 setopmode_hdl(struct adapter *padapter, u8 *pbuf) type = _HW_STATE_STATION_; } else if (psetop->mode == Ndis802_11IBSS) { type = _HW_STATE_ADHOC_; - } else{ + } else { type = _HW_STATE_NOLINK_; } @@ -6087,18 +6065,6 @@ u8 setopmode_hdl(struct adapter *padapter, u8 *pbuf) rtw_auto_ap_start_beacon(padapter); #endif - if (rtw_port_switch_chk(padapter)) { - rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); - - if (psetop->mode == Ndis802_11APMode) - adapter_to_pwrctl(padapter)->fw_psmode_iface_id = 0xff; /* ap mode won't dowload rsvd pages */ - else if (psetop->mode == Ndis802_11Infrastructure) { - struct adapter *port0_iface = dvobj_get_port0_adapter(adapter_to_dvobj(padapter)); - if (port0_iface) - rtw_lps_ctrl_wk_cmd(port0_iface, LPS_CTRL_CONNECT, 0); - } - } - if (psetop->mode == Ndis802_11APMode) { /* Do this after port switch to */ /* prevent from downloading rsvd page to wrong port */ @@ -6592,7 +6558,7 @@ u8 add_ba_hdl(struct adapter *padapter, unsigned char *pbuf) issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid); /* _set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); */ _set_timer(&psta->addba_retry_timer, ADDBA_TO); - } else{ + } else { psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid); } return H2C_SUCCESS; diff --git a/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c b/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c index 59a667753266..5c468c5057b1 100644 --- a/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c +++ b/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c @@ -45,9 +45,9 @@ void ips_enter(struct adapter *padapter) rtw_btcoex_IpsNotify(padapter, pwrpriv->ips_mode_req); - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); _ips_enter(padapter); - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); } int _ips_leave(struct adapter *padapter) @@ -85,9 +85,9 @@ int ips_leave(struct adapter *padapter) if (!is_primary_adapter(padapter)) return _SUCCESS; - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); ret = _ips_leave(padapter); - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); if (_SUCCESS == ret) rtw_btcoex_IpsNotify(padapter, IPS_NONE); @@ -158,9 +158,9 @@ void rtw_ps_processor(struct adapter *padapter) struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; u32 ps_deny = 0; - down(&adapter_to_pwrctl(padapter)->lock); + mutex_lock(&adapter_to_pwrctl(padapter)->lock); ps_deny = rtw_ps_deny_get(padapter); - up(&adapter_to_pwrctl(padapter)->lock); + mutex_unlock(&adapter_to_pwrctl(padapter)->lock); if (ps_deny != 0) { DBG_871X(FUNC_ADPT_FMT ": ps_deny = 0x%08X, skip power save!\n", FUNC_ADPT_ARG(padapter), ps_deny); @@ -269,7 +269,7 @@ void rtw_set_rpwm(struct adapter *padapter, u8 pslv) if (pwrpriv->brpwmtimeout == true) { DBG_871X("%s: RPWM timeout, force to set RPWM(0x%02X) again!\n", __func__, pslv); - } else{ + } else { if ((pwrpriv->rpwm == pslv) || ((pwrpriv->rpwm >= PS_STATE_S2) && (pslv >= PS_STATE_S2))) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, @@ -413,7 +413,7 @@ void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_a return; - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); /* if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) */ if (ps_mode == PS_MODE_ACTIVE) { @@ -459,7 +459,7 @@ void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_a rtw_btcoex_LpsNotify(padapter, ps_mode); } - } else{ + } else { if ((PS_RDY_CHECK(padapter) && check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) || ((rtw_btcoex_IsBtControlLps(padapter) == true) && (rtw_btcoex_IsLpsOn(padapter) == true)) @@ -494,7 +494,7 @@ void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_a } } - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); } /* @@ -628,14 +628,14 @@ void LeaveAllPowerSaveModeDirect(struct adapter *Adapter) return; } - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); rtw_set_rpwm(Adapter, PS_STATE_S4); - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); rtw_lps_ctrl_wk_cmd(pri_padapter, LPS_CTRL_LEAVE, 0); - } else{ + } else { if (pwrpriv->rf_pwrstate == rf_off) if (false == ips_leave(pri_padapter)) DBG_871X("======> ips_leave fail.............\n"); @@ -696,7 +696,7 @@ void LPS_Leave_check( cond_resched(); while (1) { - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); if ((padapter->bSurpriseRemoved == true) || (padapter->hw_init_completed == false) @@ -704,7 +704,7 @@ void LPS_Leave_check( ) bReady = true; - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); if (true == bReady) break; @@ -732,11 +732,10 @@ void cpwm_int_hdl( pwrpriv = adapter_to_pwrctl(padapter); - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); if (pwrpriv->rpwm < PS_STATE_S2) { DBG_871X("%s: Redundant CPWM Int. RPWM = 0x%02X CPWM = 0x%02x\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); - up(&pwrpriv->lock); goto exit; } @@ -745,15 +744,15 @@ void cpwm_int_hdl( if (pwrpriv->cpwm >= PS_STATE_S2) { if (pwrpriv->alives & CMD_ALIVE) - up(&padapter->cmdpriv.cmd_queue_sema); + complete(&padapter->cmdpriv.cmd_queue_comp); if (pwrpriv->alives & XMIT_ALIVE) - up(&padapter->xmitpriv.xmit_sema); + complete(&padapter->xmitpriv.xmit_comp); } - up(&pwrpriv->lock); - exit: + mutex_unlock(&pwrpriv->lock); + RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ("cpwm_int_hdl: cpwm = 0x%02x\n", pwrpriv->cpwm)); } @@ -783,12 +782,12 @@ static void rpwmtimeout_workitem_callback(struct work_struct *work) padapter = dvobj->if1; /* DBG_871X("+%s: rpwm = 0x%02X cpwm = 0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); */ - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) { DBG_871X("%s: rpwm = 0x%02X cpwm = 0x%02X CPWM done!\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); goto exit; } - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); if (rtw_read8(padapter, 0x100) != 0xEA) { struct reportpwrstate_parm report; @@ -800,7 +799,7 @@ static void rpwmtimeout_workitem_callback(struct work_struct *work) return; } - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) { DBG_871X("%s: cpwm =%d, nothing to do!\n", __func__, pwrpriv->cpwm); @@ -811,7 +810,7 @@ static void rpwmtimeout_workitem_callback(struct work_struct *work) pwrpriv->brpwmtimeout = false; exit: - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); } /* @@ -867,7 +866,7 @@ s32 rtw_register_task_alive(struct adapter *padapter, u32 task) pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S2; - down(&pwrctrl->lock); + mutex_lock(&pwrctrl->lock); register_task_alive(pwrctrl, task); @@ -884,7 +883,7 @@ s32 rtw_register_task_alive(struct adapter *padapter, u32 task) } } - up(&pwrctrl->lock); + mutex_unlock(&pwrctrl->lock); if (_FAIL == res) if (pwrctrl->cpwm >= PS_STATE_S2) @@ -920,7 +919,7 @@ void rtw_unregister_task_alive(struct adapter *padapter, u32 task) pslv = PS_STATE_S2; } - down(&pwrctrl->lock); + mutex_lock(&pwrctrl->lock); unregister_task_alive(pwrctrl, task); @@ -936,7 +935,7 @@ void rtw_unregister_task_alive(struct adapter *padapter, u32 task) } - up(&pwrctrl->lock); + mutex_unlock(&pwrctrl->lock); } /* @@ -962,7 +961,7 @@ s32 rtw_register_tx_alive(struct adapter *padapter) pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S2; - down(&pwrctrl->lock); + mutex_lock(&pwrctrl->lock); register_task_alive(pwrctrl, XMIT_ALIVE); @@ -979,7 +978,7 @@ s32 rtw_register_tx_alive(struct adapter *padapter) } } - up(&pwrctrl->lock); + mutex_unlock(&pwrctrl->lock); if (_FAIL == res) if (pwrctrl->cpwm >= PS_STATE_S2) @@ -1011,7 +1010,7 @@ s32 rtw_register_cmd_alive(struct adapter *padapter) pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S2; - down(&pwrctrl->lock); + mutex_lock(&pwrctrl->lock); register_task_alive(pwrctrl, CMD_ALIVE); @@ -1028,7 +1027,7 @@ s32 rtw_register_cmd_alive(struct adapter *padapter) } } - up(&pwrctrl->lock); + mutex_unlock(&pwrctrl->lock); if (_FAIL == res) if (pwrctrl->cpwm >= PS_STATE_S2) @@ -1061,7 +1060,7 @@ void rtw_unregister_tx_alive(struct adapter *padapter) pslv = PS_STATE_S2; } - down(&pwrctrl->lock); + mutex_lock(&pwrctrl->lock); unregister_task_alive(pwrctrl, XMIT_ALIVE); @@ -1076,7 +1075,7 @@ void rtw_unregister_tx_alive(struct adapter *padapter) rtw_set_rpwm(padapter, pslv); } - up(&pwrctrl->lock); + mutex_unlock(&pwrctrl->lock); } /* @@ -1103,7 +1102,7 @@ void rtw_unregister_cmd_alive(struct adapter *padapter) pslv = PS_STATE_S2; } - down(&pwrctrl->lock); + mutex_lock(&pwrctrl->lock); unregister_task_alive(pwrctrl, CMD_ALIVE); @@ -1119,15 +1118,14 @@ void rtw_unregister_cmd_alive(struct adapter *padapter) } } - up(&pwrctrl->lock); + mutex_unlock(&pwrctrl->lock); } void rtw_init_pwrctrl_priv(struct adapter *padapter) { struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); - sema_init(&pwrctrlpriv->lock, 1); - sema_init(&pwrctrlpriv->check_32k_lock, 1); + mutex_init(&pwrctrlpriv->lock); pwrctrlpriv->rf_pwrstate = rf_on; pwrctrlpriv->ips_enter_cnts = 0; pwrctrlpriv->ips_leave_cnts = 0; @@ -1357,13 +1355,13 @@ void rtw_ps_deny(struct adapter *padapter, enum PS_DENY_REASON reason) pwrpriv = adapter_to_pwrctl(padapter); - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); if (pwrpriv->ps_deny & BIT(reason)) { DBG_871X(FUNC_ADPT_FMT ": [WARNING] Reason %d had been set before!!\n", FUNC_ADPT_ARG(padapter), reason); } pwrpriv->ps_deny |= BIT(reason); - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); /* DBG_871X("-" FUNC_ADPT_FMT ": Now PS deny for 0x%08X\n", */ /* FUNC_ADPT_ARG(padapter), pwrpriv->ps_deny); */ @@ -1383,13 +1381,13 @@ void rtw_ps_deny_cancel(struct adapter *padapter, enum PS_DENY_REASON reason) pwrpriv = adapter_to_pwrctl(padapter); - down(&pwrpriv->lock); + mutex_lock(&pwrpriv->lock); if ((pwrpriv->ps_deny & BIT(reason)) == 0) { DBG_871X(FUNC_ADPT_FMT ": [ERROR] Reason %d had been canceled before!!\n", FUNC_ADPT_ARG(padapter), reason); } pwrpriv->ps_deny &= ~BIT(reason); - up(&pwrpriv->lock); + mutex_unlock(&pwrpriv->lock); /* DBG_871X("-" FUNC_ADPT_FMT ": Now PS deny for 0x%08X\n", */ /* FUNC_ADPT_ARG(padapter), pwrpriv->ps_deny); */ diff --git a/drivers/staging/rtl8723bs/core/rtw_recv.c b/drivers/staging/rtl8723bs/core/rtw_recv.c index 02f821d42658..b543e9768e88 100644 --- a/drivers/staging/rtl8723bs/core/rtw_recv.c +++ b/drivers/staging/rtl8723bs/core/rtw_recv.c @@ -113,7 +113,7 @@ union recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue) if (list_empty(&pfree_recv_queue->queue)) precvframe = NULL; - else{ + else { phead = get_list_head(pfree_recv_queue); plist = get_next(phead); @@ -291,7 +291,7 @@ struct recv_buf *rtw_dequeue_recvbuf(struct __queue *queue) if (list_empty(&queue->queue)) precvbuf = NULL; - else{ + else { phead = get_list_head(queue); plist = get_next(phead); @@ -411,7 +411,7 @@ sint recvframe_chkmic(struct adapter *adapter, union recv_frame *precvframe) rtw_handle_tkip_mic_err(adapter, (u8)IS_MCAST(prxattrib->ra)); RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, (" mic error :prxattrib->bdecrypted =%d ", prxattrib->bdecrypted)); DBG_871X(" mic error :prxattrib->bdecrypted =%d\n", prxattrib->bdecrypted); - } else{ + } else { RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, (" mic error :prxattrib->bdecrypted =%d ", prxattrib->bdecrypted)); DBG_871X(" mic error :prxattrib->bdecrypted =%d\n", prxattrib->bdecrypted); } @@ -591,7 +591,7 @@ union recv_frame *portctrl(struct adapter *adapter, union recv_frame *precv_fram rtw_free_recvframe(precv_frame, &adapter->recvpriv.free_recv_queue); prtnframe = NULL; } - } else{ + } else { /* allowed */ /* check decryption status, and decrypt the frame if needed */ RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("########portctrl:psta->ieee8021x_blocked == 0\n")); @@ -669,7 +669,7 @@ void process_pwrbit_data(struct adapter *padapter, union recv_frame *precv_frame /* DBG_871X("to sleep, sta_dz_bitmap =%x\n", pstapriv->sta_dz_bitmap); */ } - } else{ + } else { if (psta->state & WIFI_SLEEP_STATE) { /* psta->state ^= WIFI_SLEEP_STATE; */ /* pstapriv->sta_dz_bitmap &= ~BIT(psta->aid); */ @@ -831,7 +831,7 @@ sint sta2sta_data_frame( ret = _FAIL; goto exit; } - } else{ /* not mc-frame */ + } else { /* not mc-frame */ /* For AP mode, if DA is non-MCAST, then it must be BSSID, and bssid == BSSID */ if (memcmp(pattrib->bssid, pattrib->dst, ETH_ALEN)) { ret = _FAIL; @@ -988,7 +988,7 @@ sint ap2sta_data_frame( /* Special case */ ret = RTW_RX_HANDLED; goto exit; - } else{ + } else { if (!memcmp(myhwaddr, pattrib->dst, ETH_ALEN) && (!bmcast)) { *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); /* get sta_info */ if (*psta == NULL) { @@ -1187,7 +1187,7 @@ sint validate_recv_ctrl_frame(struct adapter *padapter, union recv_frame *precv_ /* spin_unlock_bh(&psta->sleep_q.lock); */ spin_unlock_bh(&pxmitpriv->lock); - } else{ + } else { /* spin_unlock_bh(&psta->sleep_q.lock); */ spin_unlock_bh(&pxmitpriv->lock); @@ -1198,7 +1198,7 @@ sint validate_recv_ctrl_frame(struct adapter *padapter, union recv_frame *precv_ /* issue nulldata with More data bit = 0 to indicate we have no buffered packets */ issue_nulldata_in_interrupt(padapter, psta->hwaddr); - } else{ + } else { DBG_871X("error!psta->sleepq_len =%d\n", psta->sleepq_len); psta->sleepq_len = 0; } @@ -1355,7 +1355,7 @@ sint validate_recv_data_frame(struct adapter *adapter, union recv_frame *precv_f if (pattrib->priority != 0 && pattrib->priority != 3) adapter->recvpriv.bIsAnyNonBEPkts = true; - } else{ + } else { pattrib->priority = 0; pattrib->hdrlen = pattrib->to_fr_ds == 3 ? 30 : 24; } @@ -1386,7 +1386,7 @@ sint validate_recv_data_frame(struct adapter *adapter, union recv_frame *precv_f RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("\n pattrib->encrypt =%d\n", pattrib->encrypt)); SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt); - } else{ + } else { pattrib->encrypt = 0; pattrib->iv_len = pattrib->icv_len = 0; } @@ -1847,7 +1847,7 @@ union recv_frame *recvframe_chk_defrag(struct adapter *padapter, union recv_fram prtnframe = NULL; - } else{ + } else { /* can't find this ta's defrag_queue, so free this recv_frame */ rtw_free_recvframe(precv_frame, pfree_recv_queue); prtnframe = NULL; @@ -1870,7 +1870,7 @@ union recv_frame *recvframe_chk_defrag(struct adapter *padapter, union recv_fram precv_frame = recvframe_defrag(padapter, pdefrag_q); prtnframe = precv_frame; - } else{ + } else { /* can't find this ta's defrag_queue, so free this recv_frame */ rtw_free_recvframe(precv_frame, pfree_recv_queue); prtnframe = NULL; @@ -2190,7 +2190,7 @@ int recv_indicatepkts_in_order(struct adapter *padapter, struct recv_reorder_ctr if (amsdu_to_msdu(padapter, prframe) != _SUCCESS) rtw_free_recvframe(prframe, &precvpriv->free_recv_queue); - } else{ + } else { /* error condition; */ } @@ -2198,7 +2198,7 @@ int recv_indicatepkts_in_order(struct adapter *padapter, struct recv_reorder_ctr /* Update local variables. */ bPktInBuf = false; - } else{ + } else { bPktInBuf = true; break; } @@ -2333,7 +2333,7 @@ int recv_indicatepkt_reorder(struct adapter *padapter, union recv_frame *prframe if (recv_indicatepkts_in_order(padapter, preorder_ctrl, false) == true) { _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); spin_unlock_bh(&ppending_recvframe_queue->lock); - } else{ + } else { spin_unlock_bh(&ppending_recvframe_queue->lock); del_timer_sync(&preorder_ctrl->reordering_ctrl_timer); } @@ -2410,7 +2410,7 @@ int process_recv_indicatepkts(struct adapter *padapter, union recv_frame *prfram rtw_recv_indicatepkt(padapter, prframe); - } else{ + } else { RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func free_indicatepkt\n")); RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); diff --git a/drivers/staging/rtl8723bs/core/rtw_security.c b/drivers/staging/rtl8723bs/core/rtw_security.c index 240818b4a2c9..979056c3d397 100644 --- a/drivers/staging/rtl8723bs/core/rtw_security.c +++ b/drivers/staging/rtl8723bs/core/rtw_security.c @@ -252,7 +252,7 @@ void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe) arcfour_encrypt(&mycontext, payload, payload, length); arcfour_encrypt(&mycontext, payload+length, crc, 4); - } else{ + } else { length = pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len; *((__le32 *)crc) = getcrc32(payload, length); arcfour_init(&mycontext, wepkey, 3+keylength); @@ -821,7 +821,7 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe) /* prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; */ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; prwskeylen = 16; - } else{ + } else { prwskey = &stainfo->dot118021x_UncstKey.skey[0]; prwskeylen = 16; } @@ -1117,7 +1117,7 @@ static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext) byte_sub(ciphertext, intermediatea); shift_row(intermediatea, intermediateb); xor_128(intermediateb, round_key, ciphertext); - } else{ /* 1 - 9 */ + } else { /* 1 - 9 */ byte_sub(ciphertext, intermediatea); shift_row(intermediatea, intermediateb); mix_column(&intermediateb[0], &intermediatea[0]); diff --git a/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c b/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c index 82716fd5c6f0..b9d36db762a9 100644 --- a/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c +++ b/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c @@ -206,7 +206,7 @@ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) spin_unlock_bh(&(pstapriv->sta_hash_lock)); psta = NULL; return psta; - } else{ + } else { psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list); list_del_init(&(psta->list)); diff --git a/drivers/staging/rtl8723bs/core/rtw_wlan_util.c b/drivers/staging/rtl8723bs/core/rtw_wlan_util.c index 2c65af319a60..2c172966ea60 100644 --- a/drivers/staging/rtl8723bs/core/rtw_wlan_util.c +++ b/drivers/staging/rtl8723bs/core/rtw_wlan_util.c @@ -889,7 +889,7 @@ void WMMOnAssocRsp(struct adapter *padapter) TXOP = 0x2f; acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); - } else{ + } else { edca[0] = edca[1] = edca[2] = edca[3] = 0; for (i = 0; i < 4; i++) { @@ -1028,7 +1028,7 @@ static void bwmode_update_check(struct adapter *padapter, struct ndis_80211_var_ new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; break; } - } else{ + } else { new_bwmode = CHANNEL_WIDTH_20; new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; } @@ -1060,7 +1060,7 @@ static void bwmode_update_check(struct adapter *padapter, struct ndis_80211_var_ /* bwmode */ psta->bw_mode = pmlmeext->cur_bwmode; phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; - } else{ + } else { psta->bw_mode = CHANNEL_WIDTH_20; phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; } @@ -1094,7 +1094,7 @@ void HT_caps_handler(struct adapter *padapter, struct ndis_80211_var_ie *pIE) /* Commented by Albert 2010/07/12 */ /* Got the endian issue here. */ pmlmeinfo->HT_caps.u.HT_cap[i] &= (pIE->data[i]); - } else{ + } else { /* modify from fw by Thomas 2010/11/17 */ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3)) max_AMPDU_len = (pIE->data[i] & 0x3); @@ -1191,7 +1191,7 @@ void HTOnAssocRsp(struct adapter *padapter) if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) { pmlmeinfo->HT_enable = 1; - } else{ + } else { pmlmeinfo->HT_enable = 0; /* set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); */ return; @@ -1239,7 +1239,7 @@ void VCS_update(struct adapter *padapter, struct sta_info *psta) if (pregpriv->vcs_type == 1) { /* 1:RTS/CTS 2:CTS to self */ psta->rtsen = 1; psta->cts2self = 0; - } else{ + } else { psta->rtsen = 0; psta->cts2self = 1; } @@ -1251,11 +1251,11 @@ void VCS_update(struct adapter *padapter, struct sta_info *psta) if (pregpriv->vcs_type == 1) { psta->rtsen = 1; psta->cts2self = 0; - } else{ + } else { psta->rtsen = 0; psta->cts2self = 1; } - } else{ + } else { psta->rtsen = 0; psta->cts2self = 0; } @@ -1751,7 +1751,7 @@ void update_capinfo(struct adapter *Adapter, u16 updateCap) pmlmeinfo->preamble_mode = PREAMBLE_SHORT; rtw_hal_set_hwreg(Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble); } - } else{ + } else { /* Long Preamble */ if (pmlmeinfo->preamble_mode != PREAMBLE_LONG) { /* PREAMBLE_SHORT or PREAMBLE_AUTO */ ShortPreamble = false; @@ -1804,7 +1804,7 @@ void update_wireless_mode(struct adapter *padapter) network_type = WIRELESS_11_5N; network_type |= WIRELESS_11A; - } else{ + } else { if (pmlmeinfo->VHT_enable) network_type = WIRELESS_11AC; else if (pmlmeinfo->HT_enable) @@ -1839,7 +1839,7 @@ void update_sta_basic_rate(struct sta_info *psta, u8 wireless_mode) /* Only B, B/G, and B/G/N AP could use CCK rate */ memcpy(psta->bssrateset, rtw_basic_rate_cck, 4); psta->bssratelen = 4; - } else{ + } else { memcpy(psta->bssrateset, rtw_basic_rate_ofdm, 3); psta->bssratelen = 3; } @@ -2038,7 +2038,7 @@ void rtw_alloc_macid(struct adapter *padapter, struct sta_info *psta) if (i > (NUM_STA-1)) { psta->mac_id = NUM_STA; DBG_871X(" no room for more MACIDs\n"); - } else{ + } else { psta->mac_id = i; DBG_871X("%s = %d\n", __func__, psta->mac_id); } @@ -2147,7 +2147,7 @@ int rtw_set_gpio_output_value(struct net_device *netdev, int gpio_num, bool isH DBG_871X("%s Set gpio %x[%d]=%d\n", __func__, REG_GPIO_PIN_CTRL+1, gpio_num, isHigh); res = 0; - } else{ + } else { DBG_871X("%s The gpio is input, not be set!\n", __func__); res = -1; } diff --git a/drivers/staging/rtl8723bs/core/rtw_xmit.c b/drivers/staging/rtl8723bs/core/rtw_xmit.c index edb678190b4b..b87f13a0b563 100644 --- a/drivers/staging/rtl8723bs/core/rtw_xmit.c +++ b/drivers/staging/rtl8723bs/core/rtw_xmit.c @@ -45,8 +45,8 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter) spin_lock_init(&pxmitpriv->lock); spin_lock_init(&pxmitpriv->lock_sctx); - sema_init(&pxmitpriv->xmit_sema, 0); - sema_init(&pxmitpriv->terminate_xmitthread_sema, 0); + init_completion(&pxmitpriv->xmit_comp); + init_completion(&pxmitpriv->terminate_xmitthread_comp); /* Please insert all the queue initializaiton using _rtw_init_queue below @@ -260,7 +260,9 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter) } } - rtw_alloc_hwxmits(padapter); + res = rtw_alloc_hwxmits(padapter); + if (res == _FAIL) + goto exit; rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); for (i = 0; i < 4; i++) { @@ -385,7 +387,7 @@ static void update_attrib_vcs_info(struct adapter *padapter, struct xmit_frame * if (pmlmeext->cur_wireless_mode < WIRELESS_11_24N || padapter->registrypriv.wifi_spec) { if (sz > padapter->registrypriv.rts_thresh) pattrib->vcs_mode = RTS_CTS; - else{ + else { if (pattrib->rtsen) pattrib->vcs_mode = RTS_CTS; else if (pattrib->cts2self) @@ -393,7 +395,7 @@ static void update_attrib_vcs_info(struct adapter *padapter, struct xmit_frame * else pattrib->vcs_mode = NONE_VCS; } - } else{ + } else { while (true) { /* IOT action */ if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS) && (pattrib->ampdu_en == true) && @@ -523,7 +525,7 @@ static s32 update_attrib_sec_info(struct adapter *padapter, struct pkt_attrib *p res = _FAIL; goto exit; } - } else{ + } else { GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast); switch (psecuritypriv->dot11AuthAlgrthm) { @@ -833,7 +835,7 @@ static s32 update_attrib(struct adapter *padapter, _pkt *pkt, struct pkt_attrib if (check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) { if (pattrib->qos_en) set_qos(&pktfile, pattrib); - } else{ + } else { if (pqospriv->qos_option) { set_qos(&pktfile, pattrib); @@ -949,7 +951,7 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr length = pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len-((pattrib->bswenc) ? pattrib->icv_len : 0); rtw_secmicappend(&micdata, payload, length); payload = payload+length; - } else{ + } else { length = pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-((pattrib->bswenc) ? pattrib->icv_len : 0); rtw_secmicappend(&micdata, payload, length); payload = payload+length+pattrib->icv_len; @@ -1134,7 +1136,7 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq+1)&0xfff; pattrib->ampdu_en = true;/* AGG EN */ - } else{ + } else { /* DBG_871X("tx ampdu over run\n"); */ psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum+1)&0xfff; pattrib->ampdu_en = true;/* AGG EN */ @@ -1144,7 +1146,7 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr } } - } else{ + } else { } @@ -1570,7 +1572,7 @@ void rtw_update_protection(struct adapter *padapter, u8 *ie, uint ie_len) perp = rtw_get_ie(ie, _ERPINFO_IE_, &erp_len, ie_len); if (perp == NULL) pxmitpriv->vcs = NONE_VCS; - else{ + else { protection = (*(perp + 2)) & BIT(1); if (protection) { if (pregistrypriv->vcs_type == RTS_CTS) @@ -1810,7 +1812,7 @@ s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) if (pxmitbuf->buf_tag == XMITBUF_CMD) { } else if (pxmitbuf->buf_tag == XMITBUF_MGNT) { rtw_free_xmitbuf_ext(pxmitpriv, pxmitbuf); - } else{ + } else { spin_lock_irqsave(&pfree_xmitbuf_queue->lock, irqL); list_del_init(&pxmitbuf->list); @@ -2144,7 +2146,7 @@ exit: return res; } -void rtw_alloc_hwxmits(struct adapter *padapter) +s32 rtw_alloc_hwxmits(struct adapter *padapter) { struct hw_xmit *hwxmits; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; @@ -2155,10 +2157,8 @@ void rtw_alloc_hwxmits(struct adapter *padapter) pxmitpriv->hwxmits = rtw_zmalloc(sizeof(struct hw_xmit) * pxmitpriv->hwxmit_entry); - if (pxmitpriv->hwxmits == NULL) { - DBG_871X("alloc hwxmits fail!...\n"); - return; - } + if (!pxmitpriv->hwxmits) + return _FAIL; hwxmits = pxmitpriv->hwxmits; @@ -2204,7 +2204,7 @@ void rtw_alloc_hwxmits(struct adapter *padapter) } - + return _SUCCESS; } void rtw_free_hwxmits(struct adapter *padapter) @@ -2389,7 +2389,7 @@ sint xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct xmit_fr if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == false) { DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_fwstate); - return ret; + return ret; } /* if (pattrib->psta) @@ -2684,7 +2684,7 @@ void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta) if (psta->sleepq_ac_len > 0) { pxmitframe->attrib.mdata = 1; pxmitframe->attrib.eosp = 0; - } else{ + } else { pxmitframe->attrib.mdata = 0; pxmitframe->attrib.eosp = 1; } @@ -2839,7 +2839,7 @@ void xmit_delivery_enabled_frames(struct adapter *padapter, struct sta_info *pst if (psta->sleepq_ac_len > 0) { pxmitframe->attrib.mdata = 1; pxmitframe->attrib.eosp = 0; - } else{ + } else { pxmitframe->attrib.mdata = 0; pxmitframe->attrib.eosp = 1; } @@ -2879,7 +2879,7 @@ void enqueue_pending_xmitbuf( list_add_tail(&pxmitbuf->list, get_list_head(pqueue)); spin_unlock_bh(&pqueue->lock); - up(&(pri_adapter->xmitpriv.xmit_sema)); + complete(&(pri_adapter->xmitpriv.xmit_comp)); } void enqueue_pending_xmitbuf_to_head( @@ -2998,7 +2998,7 @@ int rtw_xmit_thread(void *context) flush_signals_thread(); } while (_SUCCESS == err); - up(&padapter->xmitpriv.terminate_xmitthread_sema); + complete(&padapter->xmitpriv.terminate_xmitthread_comp); thread_exit(); } @@ -3033,7 +3033,7 @@ int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg) return ret; } -static bool rtw_sctx_chk_waring_status(int status) +static bool rtw_sctx_chk_warning_status(int status) { switch (status) { case RTW_SCTX_DONE_UNKNOWN: @@ -3051,7 +3051,7 @@ static bool rtw_sctx_chk_waring_status(int status) void rtw_sctx_done_err(struct submit_ctx **sctx, int status) { if (*sctx) { - if (rtw_sctx_chk_waring_status(status)) + if (rtw_sctx_chk_warning_status(status)) DBG_871X("%s status:%d\n", __func__, status); (*sctx)->status = status; complete(&((*sctx)->done)); diff --git a/drivers/staging/rtl8723bs/hal/hal_btcoex.c b/drivers/staging/rtl8723bs/hal/hal_btcoex.c index 14284b1867f3..2b43f6d3c762 100644 --- a/drivers/staging/rtl8723bs/hal/hal_btcoex.c +++ b/drivers/staging/rtl8723bs/hal/hal_btcoex.c @@ -259,7 +259,7 @@ static void halbtcoutsrc_AggregationCheck(PBTC_COEXIST pBtCoexist) if (pBtCoexist->btInfo.bRejectAggPkt) rtw_btcoex_RejectApAggregatedPacket(padapter, true); - else{ + else { if (pBtCoexist->btInfo.bPreBtCtrlAggBufSize != pBtCoexist->btInfo.bBtCtrlAggBufSize){ @@ -1209,7 +1209,7 @@ void EXhalbtcoutsrc_SpecialPacketNotify(PBTC_COEXIST pBtCoexist, u8 pktType) packetType = BTC_PACKET_EAPOL; else if (PACKET_ARP == pktType) packetType = BTC_PACKET_ARP; - else{ + else { packetType = BTC_PACKET_UNKNOWN; return; } diff --git a/drivers/staging/rtl8723bs/hal/odm_EdcaTurboCheck.c b/drivers/staging/rtl8723bs/hal/odm_EdcaTurboCheck.c index 0e674f39ef03..b7ebce7a6ff9 100644 --- a/drivers/staging/rtl8723bs/hal/odm_EdcaTurboCheck.c +++ b/drivers/staging/rtl8723bs/hal/odm_EdcaTurboCheck.c @@ -39,16 +39,16 @@ void ODM_EdcaTurboInit(void *pDM_VOID) Adapter->recvpriv.bIsAnyNonBEPkts = false; ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, - ("Orginial VO PARAM: 0x%x\n", + ("Original VO PARAM: 0x%x\n", rtw_read32(pDM_Odm->Adapter, ODM_EDCA_VO_PARAM))); ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, - ("Orginial VI PARAM: 0x%x\n", + ("Original VI PARAM: 0x%x\n", rtw_read32(pDM_Odm->Adapter, ODM_EDCA_VI_PARAM))); ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, - ("Orginial BE PARAM: 0x%x\n", + ("Original BE PARAM: 0x%x\n", rtw_read32(pDM_Odm->Adapter, ODM_EDCA_BE_PARAM))); ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, - ("Orginial BK PARAM: 0x%x\n", + ("Original BK PARAM: 0x%x\n", rtw_read32(pDM_Odm->Adapter, ODM_EDCA_BK_PARAM))); } /* ODM_InitEdcaTurbo */ diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c index c7e55618b9a8..85fd12cca4ae 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c @@ -4502,8 +4502,8 @@ void rtl8723b_stop_thread(struct adapter *padapter) /* stop xmit_buf_thread */ if (xmitpriv->SdioXmitThread) { - up(&xmitpriv->SdioXmitSema); - down(&xmitpriv->SdioXmitTerminateSema); + complete(&xmitpriv->SdioXmitStart); + wait_for_completion(&xmitpriv->SdioXmitTerminate); xmitpriv->SdioXmitThread = NULL; } #endif diff --git a/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c b/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c index 85aba8a503cd..26742960ed65 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c @@ -262,7 +262,7 @@ static void rtl8723bs_recv_tasklet(void *priv) while (ptr < precvbuf->ptail) { precvframe = try_alloc_recvframe(precvpriv, precvbuf); - if(!precvframe) + if (!precvframe) return; /* rx desc parsing */ @@ -271,8 +271,8 @@ static void rtl8723bs_recv_tasklet(void *priv) pattrib = &precvframe->u.hdr.attrib; - if(rx_crc_err(precvpriv, p_hal_data, - pattrib, precvframe)) + if (rx_crc_err(precvpriv, p_hal_data, + pattrib, precvframe)) break; rx_report_sz = RXDESC_SIZE + pattrib->drvinfo_sz; @@ -280,8 +280,8 @@ static void rtl8723bs_recv_tasklet(void *priv) pattrib->shift_sz + pattrib->pkt_len; - if(pkt_exceeds_tail(precvpriv, ptr + pkt_offset, - precvbuf->ptail, precvframe)) + if (pkt_exceeds_tail(precvpriv, ptr + pkt_offset, + precvbuf->ptail, precvframe)) break; if ((pattrib->crc_err) || (pattrib->icv_err)) { diff --git a/drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c b/drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c index 10b3f9733bad..69c4db5b5b0c 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c @@ -148,7 +148,7 @@ s32 rtl8723bs_xmit_buf_handler(struct adapter *padapter) pxmitpriv = &padapter->xmitpriv; - if (down_interruptible(&pxmitpriv->xmit_sema)) { + if (wait_for_completion_interruptible(&pxmitpriv->xmit_comp)) { DBG_871X_LEVEL(_drv_emerg_, "%s: down SdioXmitBufSema fail!\n", __func__); return _FAIL; } @@ -312,7 +312,7 @@ static s32 xmit_xmitframes(struct adapter *padapter, struct xmit_priv *pxmitpriv DBG_871X_LEVEL(_drv_err_, "%s: xmit_buf is not enough!\n", __func__); #endif err = -2; - up(&(pxmitpriv->xmit_sema)); + complete(&(pxmitpriv->xmit_comp)); break; } k = 0; @@ -420,8 +420,8 @@ static s32 rtl8723bs_xmit_handler(struct adapter *padapter) pxmitpriv = &padapter->xmitpriv; - if (down_interruptible(&pxmitpriv->SdioXmitSema)) { - DBG_871X_LEVEL(_drv_emerg_, "%s: down sema fail!\n", __func__); + if (wait_for_completion_interruptible(&pxmitpriv->SdioXmitStart)) { + DBG_871X_LEVEL(_drv_emerg_, "%s: SdioXmitStart fail!\n", __func__); return _FAIL; } @@ -490,10 +490,6 @@ int rtl8723bs_xmit_thread(void *context) DBG_871X("start "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); - /* For now, no one would down sema to check thread is running, */ - /* so mark this temporary, Lucas@20130820 */ -/* up(&pxmitpriv->SdioXmitTerminateSema); */ - do { ret = rtl8723bs_xmit_handler(padapter); if (signal_pending(current)) { @@ -501,7 +497,7 @@ int rtl8723bs_xmit_thread(void *context) } } while (_SUCCESS == ret); - up(&pxmitpriv->SdioXmitTerminateSema); + complete(&pxmitpriv->SdioXmitTerminate); RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("-%s\n", __func__)); @@ -590,7 +586,7 @@ s32 rtl8723bs_hal_xmit( return true; } - up(&pxmitpriv->SdioXmitSema); + complete(&pxmitpriv->SdioXmitStart); return false; } @@ -611,7 +607,7 @@ s32 rtl8723bs_hal_xmitframe_enqueue( #ifdef CONFIG_SDIO_TX_TASKLET tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); #else - up(&pxmitpriv->SdioXmitSema); + complete(&pxmitpriv->SdioXmitStart); #endif } @@ -634,8 +630,8 @@ s32 rtl8723bs_init_xmit_priv(struct adapter *padapter) phal = GET_HAL_DATA(padapter); spin_lock_init(&phal->SdioTxFIFOFreePageLock); - sema_init(&xmitpriv->SdioXmitSema, 0); - sema_init(&xmitpriv->SdioXmitTerminateSema, 0); + init_completion(&xmitpriv->SdioXmitStart); + init_completion(&xmitpriv->SdioXmitTerminate); return _SUCCESS; } diff --git a/drivers/staging/rtl8723bs/hal/sdio_ops.c b/drivers/staging/rtl8723bs/hal/sdio_ops.c index d6b93e1f78d8..3fee34484577 100644 --- a/drivers/staging/rtl8723bs/hal/sdio_ops.c +++ b/drivers/staging/rtl8723bs/hal/sdio_ops.c @@ -1023,7 +1023,7 @@ void sd_int_dpc(struct adapter *adapter) u8 freepage[4]; _sdio_local_read(adapter, SDIO_REG_FREE_TXPG, 4, freepage); - up(&(adapter->xmitpriv.xmit_sema)); + complete(&(adapter->xmitpriv.xmit_comp)); } if (hal->sdio_hisr & SDIO_HISR_CPWM1) { diff --git a/drivers/staging/rtl8723bs/include/drv_types.h b/drivers/staging/rtl8723bs/include/drv_types.h index 062fda9962be..bafb2c30e7fb 100644 --- a/drivers/staging/rtl8723bs/include/drv_types.h +++ b/drivers/staging/rtl8723bs/include/drv_types.h @@ -65,7 +65,6 @@ enum _NIC_VERSION { #include <rtw_event.h> #include <rtw_mlme_ext.h> #include <rtw_ap.h> -#include <rtw_efuse.h> #include <rtw_version.h> #include <rtw_odm.h> diff --git a/drivers/staging/rtl8723bs/include/ieee80211.h b/drivers/staging/rtl8723bs/include/ieee80211.h index bcc8dfa8e672..9efb4dcb9d3a 100644 --- a/drivers/staging/rtl8723bs/include/ieee80211.h +++ b/drivers/staging/rtl8723bs/include/ieee80211.h @@ -850,18 +850,18 @@ enum ieee80211_state { #define IP_FMT "%pI4" #define IP_ARG(x) (x) -extern __inline int is_multicast_mac_addr(const u8 *addr) +static inline int is_multicast_mac_addr(const u8 *addr) { return ((addr[0] != 0xff) && (0x01 & addr[0])); } -extern __inline int is_broadcast_mac_addr(const u8 *addr) +static inline int is_broadcast_mac_addr(const u8 *addr) { return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \ (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff)); } -extern __inline int is_zero_mac_addr(const u8 *addr) +static inline int is_zero_mac_addr(const u8 *addr) { return ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && \ (addr[3] == 0x00) && (addr[4] == 0x00) && (addr[5] == 0x00)); diff --git a/drivers/staging/rtl8723bs/include/osdep_service_linux.h b/drivers/staging/rtl8723bs/include/osdep_service_linux.h index 58d1e1019241..2f1b51e614fb 100644 --- a/drivers/staging/rtl8723bs/include/osdep_service_linux.h +++ b/drivers/staging/rtl8723bs/include/osdep_service_linux.h @@ -22,7 +22,6 @@ #include <asm/byteorder.h> #include <linux/atomic.h> #include <linux/io.h> - #include <linux/semaphore.h> #include <linux/sem.h> #include <linux/sched.h> #include <linux/etherdevice.h> @@ -41,7 +40,6 @@ #include <net/ieee80211_radiotap.h> #include <net/cfg80211.h> - typedef struct semaphore _sema; typedef spinlock_t _lock; typedef struct mutex _mutex; typedef struct timer_list _timer; diff --git a/drivers/staging/rtl8723bs/include/rtw_cmd.h b/drivers/staging/rtl8723bs/include/rtw_cmd.h index 1530d0ea1d51..299b55538788 100644 --- a/drivers/staging/rtl8723bs/include/rtw_cmd.h +++ b/drivers/staging/rtl8723bs/include/rtw_cmd.h @@ -7,6 +7,7 @@ #ifndef __RTW_CMD_H_ #define __RTW_CMD_H_ +#include <linux/completion.h> #define C2H_MEM_SZ (16*1024) @@ -27,7 +28,6 @@ u8 *rsp; u32 rspsz; struct submit_ctx *sctx; - /* _sema cmd_sem; */ struct list_head list; }; @@ -38,9 +38,8 @@ }; struct cmd_priv { - _sema cmd_queue_sema; - /* _sema cmd_done_sema; */ - _sema terminate_cmdthread_sema; + struct completion cmd_queue_comp; + struct completion terminate_cmdthread_comp; struct __queue cmd_queue; u8 cmd_seq; u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */ @@ -543,7 +542,7 @@ struct Tx_Beacon_param mac[0] == 0 ==> CMD mode, return H2C_SUCCESS. - The following condition must be ture under CMD mode + The following condition must be true under CMD mode mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0; s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7; s2 == (b1 << 8 | b0); diff --git a/drivers/staging/rtl8723bs/include/rtw_io.h b/drivers/staging/rtl8723bs/include/rtw_io.h index 4f8be55da65d..99d104b3647a 100644 --- a/drivers/staging/rtl8723bs/include/rtw_io.h +++ b/drivers/staging/rtl8723bs/include/rtw_io.h @@ -115,7 +115,6 @@ struct io_req { u32 command; u32 status; u8 *pbuf; - _sema sema; void (*_async_io_callback)(struct adapter *padater, struct io_req *pio_req, u8 *cnxt); u8 *cnxt; diff --git a/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h b/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h index 4c3141882143..f6eabad4bbe0 100644 --- a/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h +++ b/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h @@ -648,7 +648,6 @@ void report_survey_event(struct adapter *padapter, union recv_frame *precv_frame void report_surveydone_event(struct adapter *padapter); void report_del_sta_event(struct adapter *padapter, unsigned char* MacAddr, unsigned short reason); void report_add_sta_event(struct adapter *padapter, unsigned char* MacAddr, int cam_idx); -bool rtw_port_switch_chk(struct adapter *adapter); void report_wmm_edca_update(struct adapter *padapter); void beacon_timing_control(struct adapter *padapter); diff --git a/drivers/staging/rtl8723bs/include/rtw_mp.h b/drivers/staging/rtl8723bs/include/rtw_mp.h index 839084733201..bb3970d58573 100644 --- a/drivers/staging/rtl8723bs/include/rtw_mp.h +++ b/drivers/staging/rtl8723bs/include/rtw_mp.h @@ -62,7 +62,6 @@ typedef struct _MPT_CONTEXT /* Indicate if the driver is unloading or unloaded. */ bool bMptDrvUnload; - _sema MPh2c_Sema; _timer MPh2c_timeout_timer; /* Event used to sync H2c for BT control */ diff --git a/drivers/staging/rtl8723bs/include/rtw_pwrctrl.h b/drivers/staging/rtl8723bs/include/rtw_pwrctrl.h index 72df6cffe62e..e2a4c680125f 100644 --- a/drivers/staging/rtl8723bs/include/rtw_pwrctrl.h +++ b/drivers/staging/rtl8723bs/include/rtw_pwrctrl.h @@ -7,6 +7,7 @@ #ifndef __RTW_PWRCTRL_H_ #define __RTW_PWRCTRL_H_ +#include <linux/mutex.h> #define FW_PWR0 0 #define FW_PWR1 1 @@ -93,10 +94,6 @@ struct reportpwrstate_parm { unsigned short rsvd; }; - -typedef _sema _pwrlock; - - #define LPS_DELAY_TIME 1*HZ /* 1 sec */ #define EXE_PWR_NONE 0x01 @@ -207,8 +204,7 @@ typedef struct pno_scan_info struct pwrctrl_priv { - _pwrlock lock; - _pwrlock check_32k_lock; + struct mutex lock; volatile u8 rpwm; /* requested power state for fw */ volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */ volatile u8 tog; /* toggling */ diff --git a/drivers/staging/rtl8723bs/include/rtw_xmit.h b/drivers/staging/rtl8723bs/include/rtw_xmit.h index a75b668d09a6..37f42b2f22f1 100644 --- a/drivers/staging/rtl8723bs/include/rtw_xmit.h +++ b/drivers/staging/rtl8723bs/include/rtw_xmit.h @@ -7,6 +7,7 @@ #ifndef _RTW_XMIT_H_ #define _RTW_XMIT_H_ +#include <linux/completion.h> #define MAX_XMITBUF_SZ (20480) /* 20k */ @@ -364,8 +365,8 @@ struct xmit_priv { _lock lock; - _sema xmit_sema; - _sema terminate_xmitthread_sema; + struct completion xmit_comp; + struct completion terminate_xmitthread_comp; /* struct __queue blk_strms[MAX_NUMBLKS]; */ struct __queue be_pending; @@ -419,8 +420,8 @@ struct xmit_priv { struct tasklet_struct xmit_tasklet; #else void *SdioXmitThread; - _sema SdioXmitSema; - _sema SdioXmitTerminateSema; + struct completion SdioXmitStart; + struct completion SdioXmitTerminate; #endif /* CONFIG_SDIO_TX_TASKLET */ struct __queue free_xmitbuf_queue; @@ -486,7 +487,7 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter); void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv); -void rtw_alloc_hwxmits(struct adapter *padapter); +s32 rtw_alloc_hwxmits(struct adapter *padapter); void rtw_free_hwxmits(struct adapter *padapter); diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c index b8631baf128d..8fb03efd588b 100644 --- a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c +++ b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c @@ -2975,7 +2975,7 @@ static int rtw_dbg_port(struct net_device *dev, struct registry_priv *pregpriv = &padapter->registrypriv; /* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, 0x3: enable both 2.4g and 5g */ /* default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */ - if (pregpriv && (extra_arg == 0 || extra_arg == 1|| extra_arg == 2 || extra_arg == 3)) { + if (extra_arg == 0 || extra_arg == 1 || extra_arg == 2 || extra_arg == 3) { pregpriv->rx_stbc = extra_arg; DBG_871X("set rx_stbc =%d\n", pregpriv->rx_stbc); } else @@ -2987,7 +2987,7 @@ static int rtw_dbg_port(struct net_device *dev, { struct registry_priv *pregpriv = &padapter->registrypriv; /* 0: disable, 0x1:enable (but wifi_spec should be 0), 0x2: force enable (don't care wifi_spec) */ - if (pregpriv && extra_arg < 3) { + if (extra_arg < 3) { pregpriv->ampdu_enable = extra_arg; DBG_871X("set ampdu_enable =%d\n", pregpriv->ampdu_enable); } else diff --git a/drivers/staging/rtl8723bs/os_dep/os_intfs.c b/drivers/staging/rtl8723bs/os_dep/os_intfs.c index 181642358e3f..143e3f9b31aa 100644 --- a/drivers/staging/rtl8723bs/os_dep/os_intfs.c +++ b/drivers/staging/rtl8723bs/os_dep/os_intfs.c @@ -585,7 +585,7 @@ u32 rtw_start_drv_threads(struct adapter *padapter) if (IS_ERR(padapter->cmdThread)) _status = _FAIL; else - down(&padapter->cmdpriv.terminate_cmdthread_sema); /* wait for cmd_thread to run */ + wait_for_completion(&padapter->cmdpriv.terminate_cmdthread_comp); /* wait for cmd_thread to run */ rtw_hal_start_thread(padapter); return _status; @@ -598,8 +598,8 @@ void rtw_stop_drv_threads (struct adapter *padapter) rtw_stop_cmd_thread(padapter); /* Below is to termindate tx_thread... */ - up(&padapter->xmitpriv.xmit_sema); - down(&padapter->xmitpriv.terminate_xmitthread_sema); + complete(&padapter->xmitpriv.xmit_comp); + wait_for_completion(&padapter->xmitpriv.terminate_xmitthread_comp); RT_TRACE(_module_os_intfs_c_, _drv_info_, ("\n drv_halt: rtw_xmit_thread can be terminated !\n")); rtw_hal_stop_thread(padapter); diff --git a/drivers/staging/rtl8723bs/os_dep/osdep_service.c b/drivers/staging/rtl8723bs/os_dep/osdep_service.c index e14d7cc411c9..73b87da15eb2 100644 --- a/drivers/staging/rtl8723bs/os_dep/osdep_service.c +++ b/drivers/staging/rtl8723bs/os_dep/osdep_service.c @@ -137,7 +137,7 @@ static int isFileReadable(char *path) ret = PTR_ERR(fp); } else { - oldfs = get_fs(); set_fs(get_ds()); + oldfs = get_fs(); set_fs(KERNEL_DS); if (1!=readFile(fp, &buf, 1)) ret = -EINVAL; @@ -165,7 +165,7 @@ static int retriveFromFile(char *path, u8 *buf, u32 sz) if (0 == (ret =openFile(&fp, path, O_RDONLY, 0))) { DBG_871X("%s openFile path:%s fp =%p\n", __func__, path , fp); - oldfs = get_fs(); set_fs(get_ds()); + oldfs = get_fs(); set_fs(KERNEL_DS); ret =readFile(fp, buf, sz); set_fs(oldfs); closeFile(fp); diff --git a/drivers/staging/rtl8723bs/os_dep/sdio_intf.c b/drivers/staging/rtl8723bs/os_dep/sdio_intf.c index 7c03b69b8ed3..6d02904de63f 100644 --- a/drivers/staging/rtl8723bs/os_dep/sdio_intf.c +++ b/drivers/staging/rtl8723bs/os_dep/sdio_intf.c @@ -22,7 +22,7 @@ static const struct sdio_device_id sdio_ids[] = { SDIO_DEVICE(0x024c, 0xb723), }, { /* end: all zeroes */ }, }; -static const struct acpi_device_id acpi_ids[] __used = { +static const struct acpi_device_id acpi_ids[] = { {"OBDA8723", 0x0000}, {} }; diff --git a/drivers/staging/rtl8723bs/os_dep/xmit_linux.c b/drivers/staging/rtl8723bs/os_dep/xmit_linux.c index 2cf903c66854..4e4e565d991c 100644 --- a/drivers/staging/rtl8723bs/os_dep/xmit_linux.c +++ b/drivers/staging/rtl8723bs/os_dep/xmit_linux.c @@ -101,7 +101,7 @@ void rtw_os_xmit_schedule(struct adapter *padapter) return; if (!list_empty(&padapter->xmitpriv.pending_xmitbuf_queue.queue)) - up(&pri_adapter->xmitpriv.xmit_sema); + complete(&pri_adapter->xmitpriv.xmit_comp); } static void rtw_check_xmit_resource(struct adapter *padapter, _pkt *pkt) diff --git a/drivers/staging/rtlwifi/Kconfig b/drivers/staging/rtlwifi/Kconfig index 7b4276f5c41f..28286a87a601 100644 --- a/drivers/staging/rtlwifi/Kconfig +++ b/drivers/staging/rtlwifi/Kconfig @@ -2,7 +2,7 @@ config R8822BE tristate "Realtek RTL8822BE Wireless Network Adapter" depends on PCI && MAC80211 && m select FW_LOADER - ---help--- + help This is the staging driver for Realtek RTL8822BE 802.11ac PCIe wireless network adapters. diff --git a/drivers/staging/rtlwifi/base.c b/drivers/staging/rtlwifi/base.c index 50b1c187a920..35df2cf60619 100644 --- a/drivers/staging/rtlwifi/base.c +++ b/drivers/staging/rtlwifi/base.c @@ -756,21 +756,30 @@ u8 rtl_mrate_idx_to_arfr_id(struct ieee80211_hw *hw, u8 rate_index, return ret; } +static inline u8 _rtl_rate_id(struct ieee80211_hw *hw, + struct rtl_sta_info *sta_entry, + int rate_index) +{ + struct rtl_priv *rtlpriv = rtl_priv(hw); + + if (rtlpriv->cfg->spec_ver & RTL_SPEC_NEW_RATEID) { + int wireless_mode = sta_entry ? + sta_entry->wireless_mode : WIRELESS_MODE_G; + + return rtl_mrate_idx_to_arfr_id(hw, rate_index, wireless_mode); + } else { + return rate_index; + } +} + static void _rtl_txrate_selectmode(struct ieee80211_hw *hw, struct ieee80211_sta *sta, struct rtl_tcb_desc *tcb_desc) { -#define SET_RATE_ID(rate_id) \ - ((rtlpriv->cfg->spec_ver & RTL_SPEC_NEW_RATEID) ? \ - rtl_mrate_idx_to_arfr_id(hw, rate_id, \ - (sta_entry ? sta_entry->wireless_mode : \ - WIRELESS_MODE_G)) : \ - rate_id) - struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); struct rtl_sta_info *sta_entry = NULL; - u8 ratr_index = SET_RATE_ID(RATR_INX_WIRELESS_MC); + u8 ratr_index = _rtl_rate_id(hw, sta_entry, RATR_INX_WIRELESS_MC); if (sta) { sta_entry = (struct rtl_sta_info *)sta->drv_priv; @@ -786,7 +795,8 @@ static void _rtl_txrate_selectmode(struct ieee80211_hw *hw, rtlpriv->cfg->maps[RTL_RC_CCK_RATE2M]; tcb_desc->use_driver_rate = 1; tcb_desc->ratr_index = - SET_RATE_ID(RATR_INX_WIRELESS_MC); + _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_MC); } else { tcb_desc->ratr_index = ratr_index; } @@ -807,25 +817,32 @@ static void _rtl_txrate_selectmode(struct ieee80211_hw *hw, ; /* use sta_entry->ratr_index */ else if (mac->mode == WIRELESS_MODE_AC_5G) tcb_desc->ratr_index = - SET_RATE_ID(RATR_INX_WIRELESS_AC_5N); + _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_AC_5N); else if (mac->mode == WIRELESS_MODE_AC_24G) tcb_desc->ratr_index = - SET_RATE_ID(RATR_INX_WIRELESS_AC_24N); + _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_AC_24N); else if (mac->mode == WIRELESS_MODE_N_24G) tcb_desc->ratr_index = - SET_RATE_ID(RATR_INX_WIRELESS_NGB); + _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_NGB); else if (mac->mode == WIRELESS_MODE_N_5G) tcb_desc->ratr_index = - SET_RATE_ID(RATR_INX_WIRELESS_NG); + _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_NG); else if (mac->mode & WIRELESS_MODE_G) tcb_desc->ratr_index = - SET_RATE_ID(RATR_INX_WIRELESS_GB); + _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_GB); else if (mac->mode & WIRELESS_MODE_B) tcb_desc->ratr_index = - SET_RATE_ID(RATR_INX_WIRELESS_B); + _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_B); else if (mac->mode & WIRELESS_MODE_A) tcb_desc->ratr_index = - SET_RATE_ID(RATR_INX_WIRELESS_G); + _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_G); } else if (mac->opmode == NL80211_IFTYPE_AP || mac->opmode == NL80211_IFTYPE_ADHOC) { @@ -839,7 +856,6 @@ static void _rtl_txrate_selectmode(struct ieee80211_hw *hw, } } } -#undef SET_RATE_ID } static void _rtl_query_bandwidth_mode(struct ieee80211_hw *hw, @@ -1216,13 +1232,6 @@ void rtl_get_tcb_desc(struct ieee80211_hw *hw, struct ieee80211_sta *sta, struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc) { -#define SET_RATE_ID(rate_id) \ - ((rtlpriv->cfg->spec_ver & RTL_SPEC_NEW_RATEID) ? \ - rtl_mrate_idx_to_arfr_id(hw, rate_id, \ - (sta_entry ? sta_entry->wireless_mode : \ - WIRELESS_MODE_G)) : \ - rate_id) - struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw)); struct ieee80211_hdr *hdr = rtl_get_hdr(skb); @@ -1238,7 +1247,8 @@ void rtl_get_tcb_desc(struct ieee80211_hw *hw, if (!ieee80211_is_data(fc)) { tcb_desc->use_driver_rate = true; - tcb_desc->ratr_index = SET_RATE_ID(RATR_INX_WIRELESS_MC); + tcb_desc->ratr_index = _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_MC); tcb_desc->disable_ratefallback = 1; tcb_desc->mac_id = 0; tcb_desc->packet_bw = false; @@ -1258,7 +1268,8 @@ void rtl_get_tcb_desc(struct ieee80211_hw *hw, */ if (info->control.rates[0].idx == 0 || ieee80211_is_nullfunc(fc)) { tcb_desc->use_driver_rate = true; - tcb_desc->ratr_index = SET_RATE_ID(RATR_INX_WIRELESS_MC); + tcb_desc->ratr_index = _rtl_rate_id(hw, sta_entry, + RATR_INX_WIRELESS_MC); tcb_desc->disable_ratefallback = 1; } else if (sta && sta->vht_cap.vht_supported) { @@ -1291,7 +1302,6 @@ void rtl_get_tcb_desc(struct ieee80211_hw *hw, _rtl_qurey_shortpreamble_mode(hw, tcb_desc, info); _rtl_query_shortgi(hw, sta, tcb_desc, info); _rtl_query_protection_mode(hw, tcb_desc, info); -#undef SET_RATE_ID } bool rtl_tx_mgmt_proc(struct ieee80211_hw *hw, struct sk_buff *skb) @@ -1432,8 +1442,8 @@ static void setup_special_tx(struct rtl_priv *rtlpriv, struct rtl_ps_ctl *ppsc, rtlpriv->ra.is_special_data = true; if (rtlpriv->cfg->ops->get_btc_status()) - rtlpriv->btcoexist.btc_ops->btc_special_packet_notify( - rtlpriv, type); + rtlpriv->btcoexist.btc_ops->btc_special_packet_notify(rtlpriv, + type); rtl_lps_leave(hw); ppsc->last_delaylps_stamp_jiffies = jiffies; } @@ -2120,8 +2130,7 @@ label_lps_done: if (rtlpriv->link_info.roam_times >= 5) { pr_err("AP off, try to reconnect now\n"); rtlpriv->link_info.roam_times = 0; - ieee80211_connection_loss( - rtlpriv->mac80211.vif); + ieee80211_connection_loss(rtlpriv->mac80211.vif); } } else { rtlpriv->link_info.roam_times = 0; diff --git a/drivers/staging/rtlwifi/base.h b/drivers/staging/rtlwifi/base.h index 4299ca181365..591f433be1c3 100644 --- a/drivers/staging/rtlwifi/base.h +++ b/drivers/staging/rtlwifi/base.h @@ -151,9 +151,9 @@ void rtl_c2hcmd_wq_callback(void *data); void rtl_c2hcmd_launcher(struct ieee80211_hw *hw, int exec); void rtl_c2hcmd_enqueue(struct ieee80211_hw *hw, u8 tag, u8 len, u8 *val); -u8 rtl_mrate_idx_to_arfr_id( - struct ieee80211_hw *hw, u8 rate_index, - enum wireless_mode wirelessmode); +u8 rtl_mrate_idx_to_arfr_id(struct ieee80211_hw *hw, + u8 rate_index, + enum wireless_mode wirelessmode); void rtl_get_tcb_desc(struct ieee80211_hw *hw, struct ieee80211_tx_info *info, struct ieee80211_sta *sta, diff --git a/drivers/staging/rtlwifi/btcoexist/halbtcoutsrc.c b/drivers/staging/rtlwifi/btcoexist/halbtcoutsrc.c index 24e19ffd4431..b519d181b419 100644 --- a/drivers/staging/rtlwifi/btcoexist/halbtcoutsrc.c +++ b/drivers/staging/rtlwifi/btcoexist/halbtcoutsrc.c @@ -476,17 +476,6 @@ static u32 halbtc_get_wifi_link_status(struct btc_coexist *btcoexist) return ret_val; } -static s32 halbtc_get_wifi_rssi(struct rtl_priv *rtlpriv) -{ - int undec_sm_pwdb = 0; - - if (rtlpriv->mac80211.link_state >= MAC80211_LINKED) - undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb; - else /* associated entry pwdb */ - undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb; - return undec_sm_pwdb; -} - static bool halbtc_get(void *void_btcoexist, u8 get_type, void *out_buf) { struct btc_coexist *btcoexist = (struct btc_coexist *)void_btcoexist; @@ -585,7 +574,7 @@ static bool halbtc_get(void *void_btcoexist, u8 get_type, void *out_buf) *bool_tmp = false; break; case BTC_GET_S4_WIFI_RSSI: - *s32_tmp = halbtc_get_wifi_rssi(rtlpriv); + *s32_tmp = rtlpriv->dm.undec_sm_pwdb; break; case BTC_GET_S4_HS_RSSI: *s32_tmp = 0; diff --git a/drivers/staging/rtlwifi/core.c b/drivers/staging/rtlwifi/core.c index ca37f7511c4d..a9902818ae7e 100644 --- a/drivers/staging/rtlwifi/core.c +++ b/drivers/staging/rtlwifi/core.c @@ -1882,7 +1882,8 @@ bool rtl_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version, return true; default: WARN_ONCE(true, - "rtlwifi: %s(): Unknown CMD!!\n", __func__); + "rtlwifi: %s(): Unknown CMD!!\n", + __func__); break; } } diff --git a/drivers/staging/rtlwifi/efuse.c b/drivers/staging/rtlwifi/efuse.c index abb0f720cf21..a7c9e186f2b2 100644 --- a/drivers/staging/rtlwifi/efuse.c +++ b/drivers/staging/rtlwifi/efuse.c @@ -919,7 +919,7 @@ static int efuse_pg_packet_write(struct ieee80211_hw *hw, struct rtl_priv *rtlpriv = rtl_priv(hw); struct pgpkt_struct target_pkt; u8 write_state = PG_STATE_HEADER; - int continual = true, dataempty = true, result = true; + int continual = true, result = true; u16 efuse_addr = 0; u8 efuse_data; u8 target_word_cnts = 0; @@ -946,7 +946,6 @@ static int efuse_pg_packet_write(struct ieee80211_hw *hw, while (continual && (efuse_addr < (EFUSE_MAX_SIZE - rtlpriv->cfg->maps[EFUSE_OOB_PROTECT_BYTES_LEN]))) { if (write_state == PG_STATE_HEADER) { - dataempty = true; badworden = 0x0F; RTPRINT(rtlpriv, FEEPROM, EFUSE_PG, "efuse PG_STATE_HEADER\n"); @@ -1182,13 +1181,12 @@ static u16 efuse_get_current_size(struct ieee80211_hw *hw) { int continual = true; u16 efuse_addr = 0; - u8 hoffset, hworden; + u8 hworden; u8 efuse_data, word_cnts; while (continual && efuse_one_byte_read(hw, efuse_addr, &efuse_data) && (efuse_addr < EFUSE_MAX_SIZE)) { if (efuse_data != 0xFF) { - hoffset = (efuse_data >> 4) & 0x0F; hworden = efuse_data & 0x0F; word_cnts = efuse_calculate_word_cnts(hworden); efuse_addr = efuse_addr + (word_cnts * 2) + 1; diff --git a/drivers/staging/rtlwifi/halmac/halmac_88xx/halmac_func_88xx.c b/drivers/staging/rtlwifi/halmac/halmac_88xx/halmac_func_88xx.c index 53f55f129a76..ddbeff8224ab 100644 --- a/drivers/staging/rtlwifi/halmac/halmac_88xx/halmac_func_88xx.c +++ b/drivers/staging/rtlwifi/halmac/halmac_88xx/halmac_func_88xx.c @@ -2466,8 +2466,11 @@ halmac_parse_psd_data_88xx(struct halmac_adapter *halmac_adapter, u8 *c2h_buf, segment_size = (u8)PSD_DATA_GET_SEGMENT_SIZE(c2h_buf); psd_set->data_size = total_size; - if (!psd_set->data) + if (!psd_set->data) { psd_set->data = kzalloc(psd_set->data_size, GFP_KERNEL); + if (!psd_set->data) + return HALMAC_RET_MALLOC_FAIL; + } if (segment_id == 0) psd_set->segment_size = segment_size; diff --git a/drivers/staging/rtlwifi/pci.h b/drivers/staging/rtlwifi/pci.h index 7535ac24bfbb..0e55baec95a8 100644 --- a/drivers/staging/rtlwifi/pci.h +++ b/drivers/staging/rtlwifi/pci.h @@ -205,7 +205,8 @@ struct rtl_pci { /*Bcn control register setting */ u32 reg_bcn_ctrl_val; - /*ASPM*/ u8 const_pci_aspm; + /*ASPM*/ + u8 const_pci_aspm; u8 const_amdpci_aspm; u8 const_hwsw_rfoff_d3; u8 const_support_pciaspm; diff --git a/drivers/staging/rtlwifi/phydm/phydm.c b/drivers/staging/rtlwifi/phydm/phydm.c index 27635feedba2..52b85b3ddb34 100644 --- a/drivers/staging/rtlwifi/phydm/phydm.c +++ b/drivers/staging/rtlwifi/phydm/phydm.c @@ -477,7 +477,7 @@ static void phydm_supportability_init(void *dm_void) } else { ODM_RT_TRACE(dm, ODM_COMP_INIT, - "ODM adaptivity is set to disnabled!!!\n"); + "ODM adaptivity is set to disabled!!!\n"); /**/ } diff --git a/drivers/staging/rtlwifi/phydm/phydm_adc_sampling.c b/drivers/staging/rtlwifi/phydm/phydm_adc_sampling.c index d6cea73fa185..f2468b82f745 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_adc_sampling.c +++ b/drivers/staging/rtlwifi/phydm/phydm_adc_sampling.c @@ -551,11 +551,10 @@ void phydm_lamode_trigger_setting(void *dm_void, char input[][16], u32 *_used, /*dbg_print("echo cmd input_num = %d\n", input_num);*/ if ((strcmp(input[1], help) == 0)) { - PHYDM_SNPRINTF( - output + used, out_len - used, - "{En} {0:BB,1:BB_MAC,2:RF0,3:RF1,4:MAC}\n {BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA type} {TrigTime}\n {polling_time/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n"); - /**/ - } else if (is_enable_la_mode == 1) { + PHYDM_SNPRINTF(output + used, + out_len - used, + "{En} {0:BB,1:BB_MAC,2:RF0,3:RF1,4:MAC}\n {BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA type} {TrigTime}\n {polling_time/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n"); + } else if (is_enable_la_mode) { PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]); trig_mode = (u8)var1[1]; @@ -575,7 +574,7 @@ void phydm_lamode_trigger_setting(void *dm_void, char input[][16], u32 *_used, PHYDM_SSCANF(input[10], DCMD_DECIMAL, &var1[9]); dma_data_sig_sel = (u8)var1[3]; - trigger_time_mu_sec = var1[4]; /*unit: us*/ + trigger_time_mu_sec = var1[4]; /* unit: us */ adc_smp->la_mac_ref_mask = var1[5]; adc_smp->la_dbg_port = var1[6]; diff --git a/drivers/staging/rtlwifi/phydm/phydm_ccx.c b/drivers/staging/rtlwifi/phydm/phydm_ccx.c index 57138606d9be..5e01ea8f4b68 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_ccx.c +++ b/drivers/staging/rtlwifi/phydm/phydm_ccx.c @@ -317,7 +317,7 @@ void phydm_get_nhm_result(void *dm_void) ccx_info->NHM_result[10] = (u8)((value32 & MASKBYTE2) >> 16); ccx_info->NHM_result[11] = (u8)((value32 & MASKBYTE3) >> 24); - /*Get NHM duration*/ + /* Get NHM duration */ value32 = odm_read_4byte(dm, ODM_REG_NHM_CNT10_TO_CNT11_11N); ccx_info->NHM_duration = (u16)(value32 & MASKLWORD); } @@ -331,14 +331,15 @@ bool phydm_check_nhm_ready(void *dm_void) bool ret = false; if (dm->support_ic_type & ODM_IC_11AC_SERIES) { - value32 = - odm_get_bb_reg(dm, ODM_REG_CLM_RESULT_11AC, MASKDWORD); + value32 = odm_get_bb_reg(dm, + ODM_REG_CLM_RESULT_11AC, + MASKDWORD); for (i = 0; i < 200; i++) { ODM_delay_ms(1); if (odm_get_bb_reg(dm, ODM_REG_NHM_DUR_READY_11AC, BIT(17))) { - ret = 1; + ret = true; break; } } @@ -351,7 +352,7 @@ bool phydm_check_nhm_ready(void *dm_void) ODM_delay_ms(1); if (odm_get_bb_reg(dm, ODM_REG_NHM_DUR_READY_11AC, BIT(17))) { - ret = 1; + ret = true; break; } } diff --git a/drivers/staging/rtlwifi/phydm/phydm_debug.c b/drivers/staging/rtlwifi/phydm/phydm_debug.c index b5b69d5f1a41..91f2c054d83b 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_debug.c +++ b/drivers/staging/rtlwifi/phydm/phydm_debug.c @@ -140,26 +140,17 @@ static inline void phydm_print_csi(struct phy_dm_struct *dm, u32 used, dword_h = odm_get_bb_reg(dm, 0xF74, MASKDWORD); dword_l = odm_get_bb_reg(dm, 0xF5C, MASKDWORD); - if (index % 2 == 0) - PHYDM_SNPRINTF( - output + used, out_len - used, - "%02x %02x %02x %02x %02x %02x %02x %02x\n", - dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, - (dword_l & MASKBYTE2) >> 16, - (dword_l & MASKBYTE3) >> 24, - dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, - (dword_h & MASKBYTE2) >> 16, - (dword_h & MASKBYTE3) >> 24); - else - PHYDM_SNPRINTF( - output + used, out_len - used, - "%02x %02x %02x %02x %02x %02x %02x %02x\n", - dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, - (dword_l & MASKBYTE2) >> 16, - (dword_l & MASKBYTE3) >> 24, - dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, - (dword_h & MASKBYTE2) >> 16, - (dword_h & MASKBYTE3) >> 24); + PHYDM_SNPRINTF(output + used, + out_len - used, + "%02x %02x %02x %02x %02x %02x %02x %02x\n", + dword_l & MASKBYTE0, + (dword_l & MASKBYTE1) >> 8, + (dword_l & MASKBYTE2) >> 16, + (dword_l & MASKBYTE3) >> 24, + dword_h & MASKBYTE0, + (dword_h & MASKBYTE1) >> 8, + (dword_h & MASKBYTE2) >> 16, + (dword_h & MASKBYTE3) >> 24); } } @@ -168,9 +159,7 @@ void phydm_init_debug_setting(struct phy_dm_struct *dm) dm->debug_level = ODM_DBG_TRACE; dm->fw_debug_components = 0; - dm->debug_components = - - 0; + dm->debug_components = 0; dm->fw_buff_is_enpty = true; dm->pre_c2h_seq = 0; diff --git a/drivers/staging/rtlwifi/phydm/phydm_dig.c b/drivers/staging/rtlwifi/phydm/phydm_dig.c index f10776fbe2d9..99c805cc380b 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_dig.c +++ b/drivers/staging/rtlwifi/phydm/phydm_dig.c @@ -599,13 +599,8 @@ void odm_dig_init(void *dm_void) (DM_DIG_MAX_PAUSE_TYPE + 1)); dig_tab->pause_cckpd_level = 0; - if (dm->board_type & (ODM_BOARD_EXT_PA | ODM_BOARD_EXT_LNA)) { - dig_tab->rx_gain_range_max = DM_DIG_MAX_NIC; - dig_tab->rx_gain_range_min = DM_DIG_MIN_NIC; - } else { - dig_tab->rx_gain_range_max = DM_DIG_MAX_NIC; - dig_tab->rx_gain_range_min = DM_DIG_MIN_NIC; - } + dig_tab->rx_gain_range_max = DM_DIG_MAX_NIC; + dig_tab->rx_gain_range_min = DM_DIG_MIN_NIC; dig_tab->enable_adjust_big_jump = 1; if (dm->support_ic_type & ODM_RTL8822B) { diff --git a/drivers/staging/rtlwifi/phydm/phydm_edcaturbocheck.c b/drivers/staging/rtlwifi/phydm/phydm_edcaturbocheck.c index cd12512628c0..b5bd4fb20c90 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_edcaturbocheck.c +++ b/drivers/staging/rtlwifi/phydm/phydm_edcaturbocheck.c @@ -25,13 +25,13 @@ void odm_edca_turbo_init(void *dm_void) dm->dm_edca_table.is_current_turbo_edca = false; dm->dm_edca_table.is_cur_rdl_state = false; - ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial VO PARAM: 0x%x\n", + ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Original VO PARAM: 0x%x\n", odm_read_4byte(dm, ODM_EDCA_VO_PARAM)); - ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial VI PARAM: 0x%x\n", + ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Original VI PARAM: 0x%x\n", odm_read_4byte(dm, ODM_EDCA_VI_PARAM)); - ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial BE PARAM: 0x%x\n", + ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Original BE PARAM: 0x%x\n", odm_read_4byte(dm, ODM_EDCA_BE_PARAM)); - ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Orginial BK PARAM: 0x%x\n", + ODM_RT_TRACE(dm, ODM_COMP_EDCA_TURBO, "Original BK PARAM: 0x%x\n", odm_read_4byte(dm, ODM_EDCA_BK_PARAM)); } /* ODM_InitEdcaTurbo */ diff --git a/drivers/staging/rtlwifi/phydm/phydm_hwconfig.c b/drivers/staging/rtlwifi/phydm/phydm_hwconfig.c index 4bf86e5a451f..a4ad39ab3ddf 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_hwconfig.c +++ b/drivers/staging/rtlwifi/phydm/phydm_hwconfig.c @@ -45,8 +45,8 @@ static u32 phydm_process_rssi_pwdb(struct phy_dm_struct *dm, u32 weighting = 0, undecorated_smoothed_pwdb; /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */ - if (entry->rssi_stat.ofdm_pkt == - 64) { /* speed up when all packets are OFDM*/ + if (entry->rssi_stat.ofdm_pkt == 64) { + /* speed up when all packets are OFDM */ undecorated_smoothed_pwdb = undecorated_smoothed_ofdm; ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR, "PWDB_0[%d] = (( %d ))\n", pktinfo->station_id, @@ -477,26 +477,6 @@ static u8 odm_query_rx_pwr_percentage(s8 ant_power) return 100 + ant_power; } -/* - * 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. - * IF other SW team do not support the feature, remove this section.?? - */ - -s32 odm_signal_scale_mapping(struct phy_dm_struct *dm, s32 curr_sig) -{ - { - return curr_sig; - } -} - -static u8 odm_sq_process_patch_rt_cid_819x_lenovo(struct phy_dm_struct *dm, - u8 is_cck_rate, u8 pwdb_all, - u8 path, u8 RSSI) -{ - u8 sq = 0; - return sq; -} - static u8 odm_evm_db_to_percentage(s8 value) { /* -33dB~0dB to 0%~99% */ @@ -748,16 +728,10 @@ static void odm_rx_phy_status92c_series_parsing( * from 0~100. */ /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */ - if (is_cck_rate) { - phy_info->signal_strength = (u8)( - odm_signal_scale_mapping(dm, pwdb_all)); /*pwdb_all;*/ - } else { - if (rf_rx_num != 0) { - phy_info->signal_strength = - (u8)(odm_signal_scale_mapping(dm, total_rssi /= - rf_rx_num)); - } - } + if (is_cck_rate) + phy_info->signal_strength = pwdb_all; + else if (rf_rx_num != 0) + phy_info->signal_strength = (total_rssi /= rf_rx_num); /* For 92C/92D HW (Hybrid) Antenna Diversity */ } @@ -901,13 +875,10 @@ static void odm_rx_phy_status_jaguar_series_parsing( phy_info->recv_signal_power = rx_pwr_all; /*(3) Get Signal Quality (EVM)*/ { - u8 sq; + u8 sq = 0; - if ((dm->support_platform == ODM_WIN) && - (dm->patch_id == RT_CID_819X_LENOVO)) - sq = odm_sq_process_patch_rt_cid_819x_lenovo( - dm, is_cck_rate, pwdb_all, 0, 0); - else + if (!(dm->support_platform == ODM_WIN && + dm->patch_id == RT_CID_819X_LENOVO)) sq = phydm_get_signal_quality_8812(phy_info, dm, phy_sta_rpt); @@ -1051,21 +1022,19 @@ static void odm_rx_phy_status_jaguar_series_parsing( */ /*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/ if (is_cck_rate) { - phy_info->signal_strength = (u8)( - odm_signal_scale_mapping(dm, pwdb_all)); /*pwdb_all;*/ - } else { - if (rf_rx_num != 0) { - /* 2015/01 Sean, use the best two RSSI only, - * suggested by Ynlin and ChenYu. - */ - if (rf_rx_num == 1) - avg_rssi = best_rssi; - else - avg_rssi = (best_rssi + second_rssi) / 2; - phy_info->signal_strength = - (u8)(odm_signal_scale_mapping(dm, avg_rssi)); - } + phy_info->signal_strength = pwdb_all; + } else if (rf_rx_num != 0) { + /* 2015/01 Sean, use the best two RSSI only, + * suggested by Ynlin and ChenYu. + */ + if (rf_rx_num == 1) + avg_rssi = best_rssi; + else + avg_rssi = (best_rssi + second_rssi) / 2; + + phy_info->signal_strength = avg_rssi; } + dm->rx_pwdb_ave = dm->rx_pwdb_ave + phy_info->rx_pwdb_all; dm->dm_fat_table.antsel_rx_keep_0 = phy_sta_rpt->antidx_anta; @@ -1750,8 +1719,6 @@ static void phydm_get_rx_phy_status_type2(struct phy_dm_struct *dm, ODM_RTL8710B)) { /* JJ ADD 20161014 */ if (rxsc == 3) bw = ODM_BW40M; - else if ((rxsc == 1) || (rxsc == 2)) - bw = ODM_BW20M; else bw = ODM_BW20M; } @@ -1874,44 +1841,8 @@ void phydm_rx_phy_status_new_type(struct phy_dm_struct *phydm, u8 *phy_status, /* Update signal strength to UI, and phy_info->rx_pwdb_all is the * maximum RSSI of all path */ - phy_info->signal_strength = - (u8)(odm_signal_scale_mapping(phydm, phy_info->rx_pwdb_all)); + phy_info->signal_strength = phy_info->rx_pwdb_all; /* Calculate average RSSI and smoothed RSSI */ phydm_process_rssi_for_dm_new_type(phydm, phy_info, pktinfo); } - -u32 query_phydm_trx_capability(struct phy_dm_struct *dm) -{ - u32 value32 = 0xFFFFFFFF; - - return value32; -} - -u32 query_phydm_stbc_capability(struct phy_dm_struct *dm) -{ - u32 value32 = 0xFFFFFFFF; - - return value32; -} - -u32 query_phydm_ldpc_capability(struct phy_dm_struct *dm) -{ - u32 value32 = 0xFFFFFFFF; - - return value32; -} - -u32 query_phydm_txbf_parameters(struct phy_dm_struct *dm) -{ - u32 value32 = 0xFFFFFFFF; - - return value32; -} - -u32 query_phydm_txbf_capability(struct phy_dm_struct *dm) -{ - u32 value32 = 0xFFFFFFFF; - - return value32; -} diff --git a/drivers/staging/rtlwifi/phydm/phydm_hwconfig.h b/drivers/staging/rtlwifi/phydm/phydm_hwconfig.h index 6ad5e0292a97..ee4b9f0af2a1 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_hwconfig.h +++ b/drivers/staging/rtlwifi/phydm/phydm_hwconfig.h @@ -216,8 +216,6 @@ odm_config_fw_with_header_file(struct phy_dm_struct *dm, u32 odm_get_hw_img_version(struct phy_dm_struct *dm); -s32 odm_signal_scale_mapping(struct phy_dm_struct *dm, s32 curr_sig); - /*For 8822B only!! need to move to FW finally */ /*==============================================*/ void phydm_rx_phy_status_new_type(struct phy_dm_struct *phydm, u8 *phy_status, @@ -486,14 +484,4 @@ struct phy_status_rpt_jaguar2_type2 { #endif }; -u32 query_phydm_trx_capability(struct phy_dm_struct *dm); - -u32 query_phydm_stbc_capability(struct phy_dm_struct *dm); - -u32 query_phydm_ldpc_capability(struct phy_dm_struct *dm); - -u32 query_phydm_txbf_parameters(struct phy_dm_struct *dm); - -u32 query_phydm_txbf_capability(struct phy_dm_struct *dm); - #endif /*#ifndef __HALHWOUTSRC_H__*/ diff --git a/drivers/staging/rtlwifi/phydm/phydm_psd.c b/drivers/staging/rtlwifi/phydm/phydm_psd.c index badc514ac0be..c93d871f1eb6 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_psd.c +++ b/drivers/staging/rtlwifi/phydm/phydm_psd.c @@ -336,12 +336,7 @@ void phydm_psd_init(void *dm_void) 2; /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */ } - if (dm->support_ic_type == ODM_RTL8812) - dm_psd_table->psd_pwr_common_offset = 0; - else if (dm->support_ic_type == ODM_RTL8821) - dm_psd_table->psd_pwr_common_offset = 0; - else - dm_psd_table->psd_pwr_common_offset = 0; + dm_psd_table->psd_pwr_common_offset = 0; phydm_psd_para_setting(dm, 1, 2, 3, 128, 0, 0, 7, 0); /*phydm_psd(dm, 0x3c, 0, 127);*/ /* target at -50dBm */ diff --git a/drivers/staging/rtlwifi/phydm/phydm_rainfo.c b/drivers/staging/rtlwifi/phydm/phydm_rainfo.c index b46791a727c7..ed740a93c8b6 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_rainfo.c +++ b/drivers/staging/rtlwifi/phydm/phydm_rainfo.c @@ -124,7 +124,7 @@ void odm_c2h_ra_para_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len) ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s %d\n", "VHT_EN =", cmd_buf[4]); ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s %d\n", - "Hightest rate =", cmd_buf[5]); + "Highest rate =", cmd_buf[5]); ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s 0x%x\n", "Lowest rate =", cmd_buf[6]); ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s 0x%x\n", diff --git a/drivers/staging/rtlwifi/phydm/rtl_phydm.c b/drivers/staging/rtlwifi/phydm/rtl_phydm.c index 9930ed954abb..4cc77b2016e1 100644 --- a/drivers/staging/rtlwifi/phydm/rtl_phydm.c +++ b/drivers/staging/rtlwifi/phydm/rtl_phydm.c @@ -180,6 +180,8 @@ static int rtl_phydm_init_priv(struct rtl_priv *rtlpriv, rtlpriv->phydm.internal = kzalloc(sizeof(struct phy_dm_struct), GFP_KERNEL); + if (!rtlpriv->phydm.internal) + return 0; _rtl_phydm_init_com_info(rtlpriv, ic, params); diff --git a/drivers/staging/rtlwifi/ps.c b/drivers/staging/rtlwifi/ps.c index 0ca0532c73da..5118773ea6f7 100644 --- a/drivers/staging/rtlwifi/ps.c +++ b/drivers/staging/rtlwifi/ps.c @@ -245,7 +245,7 @@ void rtl_ips_nic_off_wq_callback(void *data) /* call before RF off */ if (rtlpriv->cfg->ops->get_btc_status()) rtlpriv->btcoexist.btc_ops->btc_ips_notify(rtlpriv, - ppsc->inactive_pwrstate); + ppsc->inactive_pwrstate); /*rtl_pci_reset_trx_ring(hw); */ _rtl_ps_inactive_ps(hw); @@ -291,7 +291,7 @@ void rtl_ips_nic_on(struct ieee80211_hw *hw) rtlpriv->phydm.ops->phydm_reset_dm(rtlpriv); if (rtlpriv->cfg->ops->get_btc_status()) rtlpriv->btcoexist.btc_ops->btc_ips_notify(rtlpriv, - ppsc->inactive_pwrstate); + ppsc->inactive_pwrstate); } } mutex_unlock(&rtlpriv->locks.ips_mutex); diff --git a/drivers/staging/rtlwifi/rtl8822be/fw.c b/drivers/staging/rtlwifi/rtl8822be/fw.c index a40396614814..cf6b7a80b753 100644 --- a/drivers/staging/rtlwifi/rtl8822be/fw.c +++ b/drivers/staging/rtlwifi/rtl8822be/fw.c @@ -486,6 +486,8 @@ bool rtl8822b_halmac_cb_write_data_h2c(struct rtl_priv *rtlpriv, u8 *buf, /* without GFP_DMA, pci_map_single() may not work */ skb = __netdev_alloc_skb(NULL, size, GFP_ATOMIC | GFP_DMA); + if (!skb) + return false; memcpy((u8 *)skb_put(skb, size), buf, size); return _rtl8822be_send_bcn_or_cmd_packet(rtlpriv->hw, skb, H2C_QUEUE); @@ -741,6 +743,8 @@ void rtl8822be_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished) u1_rsvd_page_loc, 3); skb = dev_alloc_skb(totalpacketlen); + if (!skb) + return; memcpy((u8 *)skb_put(skb, totalpacketlen), &reserved_page_packet, totalpacketlen); diff --git a/drivers/staging/rts5208/general.c b/drivers/staging/rts5208/general.c index 79d245877264..0f912b011064 100644 --- a/drivers/staging/rts5208/general.c +++ b/drivers/staging/rts5208/general.c @@ -1,20 +1,9 @@ -/* Driver for Realtek PCI-Express card reader +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/general.h b/drivers/staging/rts5208/general.h index 90a1f9297f5e..53e2dbabf04b 100644 --- a/drivers/staging/rts5208/general.h +++ b/drivers/staging/rts5208/general.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/ms.c b/drivers/staging/rts5208/ms.c index f53adf15c685..1128eec3bd08 100644 --- a/drivers/staging/rts5208/ms.c +++ b/drivers/staging/rts5208/ms.c @@ -1,20 +1,9 @@ -/* Driver for Realtek PCI-Express card reader +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) @@ -1676,7 +1665,10 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, return STATUS_FAIL; } - ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE); + retval = ms_read_extra_data(chip, old_blk, i, extra, + MS_EXTRA_SIZE); + if (retval != STATUS_SUCCESS) + return STATUS_FAIL; retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); diff --git a/drivers/staging/rts5208/ms.h b/drivers/staging/rts5208/ms.h index 71f98cc03eed..952cc14dd079 100644 --- a/drivers/staging/rts5208/ms.h +++ b/drivers/staging/rts5208/ms.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx.c b/drivers/staging/rts5208/rtsx.c index 69e6abe14abf..fa597953e9a0 100644 --- a/drivers/staging/rts5208/rtsx.c +++ b/drivers/staging/rts5208/rtsx.c @@ -1,20 +1,9 @@ -/* Driver for Realtek PCI-Express card reader +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) @@ -237,12 +226,6 @@ static struct scsi_host_template rtsx_host_template = { /* limit the total size of a transfer to 120 KB */ .max_sectors = 240, - /* merge commands... this seems to help performance, but - * periodically someone should test to see which setting is more - * optimal. - */ - .use_clustering = 1, - /* emulated HBA */ .emulated = 1, diff --git a/drivers/staging/rts5208/rtsx.h b/drivers/staging/rts5208/rtsx.h index 514536a6f92b..2e101da83220 100644 --- a/drivers/staging/rts5208/rtsx.h +++ b/drivers/staging/rts5208/rtsx.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx_card.c b/drivers/staging/rts5208/rtsx_card.c index 6dc541e06fb9..294f381518fa 100644 --- a/drivers/staging/rts5208/rtsx_card.c +++ b/drivers/staging/rts5208/rtsx_card.c @@ -1,20 +1,9 @@ -/* Driver for Realtek PCI-Express card reader +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx_card.h b/drivers/staging/rts5208/rtsx_card.h index 820b1113ea89..39727371cd7a 100644 --- a/drivers/staging/rts5208/rtsx_card.h +++ b/drivers/staging/rts5208/rtsx_card.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx_chip.c b/drivers/staging/rts5208/rtsx_chip.c index 94fb35429bf1..76c35f3c0208 100644 --- a/drivers/staging/rts5208/rtsx_chip.c +++ b/drivers/staging/rts5208/rtsx_chip.c @@ -1,20 +1,9 @@ -/* Driver for Realtek PCI-Express card reader +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx_chip.h b/drivers/staging/rts5208/rtsx_chip.h index ec1c3d96d31a..7325362f835f 100644 --- a/drivers/staging/rts5208/rtsx_chip.h +++ b/drivers/staging/rts5208/rtsx_chip.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx_scsi.c b/drivers/staging/rts5208/rtsx_scsi.c index 9c594a778425..1deb74112ad4 100644 --- a/drivers/staging/rts5208/rtsx_scsi.c +++ b/drivers/staging/rts5208/rtsx_scsi.c @@ -1,20 +1,9 @@ -/* Driver for Realtek PCI-Express card reader +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx_scsi.h b/drivers/staging/rts5208/rtsx_scsi.h index 30f3724848fe..df6138c97aaa 100644 --- a/drivers/staging/rts5208/rtsx_scsi.h +++ b/drivers/staging/rts5208/rtsx_scsi.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx_sys.h b/drivers/staging/rts5208/rtsx_sys.h index 817700c0d794..77094809c814 100644 --- a/drivers/staging/rts5208/rtsx_sys.h +++ b/drivers/staging/rts5208/rtsx_sys.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx_transport.c b/drivers/staging/rts5208/rtsx_transport.c index b4a796c570c2..8277d7895608 100644 --- a/drivers/staging/rts5208/rtsx_transport.c +++ b/drivers/staging/rts5208/rtsx_transport.c @@ -1,21 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/rtsx_transport.h b/drivers/staging/rts5208/rtsx_transport.h index 99740c33f2fb..097efed24b79 100644 --- a/drivers/staging/rts5208/rtsx_transport.h +++ b/drivers/staging/rts5208/rtsx_transport.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/sd.c b/drivers/staging/rts5208/sd.c index ff1a9aa152ce..c256a2398651 100644 --- a/drivers/staging/rts5208/sd.c +++ b/drivers/staging/rts5208/sd.c @@ -1,20 +1,9 @@ -/* Driver for Realtek PCI-Express card reader +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) @@ -4448,7 +4437,12 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) rtsx_init_cmd(chip); rtsx_add_cmd(chip, CHECK_REG_CMD, 0xFD30, 0x02, 0x02); - rtsx_send_cmd(chip, SD_CARD, 250); + retval = rtsx_send_cmd(chip, SD_CARD, 250); + if (retval < 0) { + write_err = true; + rtsx_clear_sd_error(chip); + goto sd_execute_write_cmd_failed; + } retval = sd_update_lock_status(chip); if (retval != STATUS_SUCCESS) { diff --git a/drivers/staging/rts5208/sd.h b/drivers/staging/rts5208/sd.h index 900be444acf9..e124526360b2 100644 --- a/drivers/staging/rts5208/sd.h +++ b/drivers/staging/rts5208/sd.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/spi.c b/drivers/staging/rts5208/spi.c index 110cb9093f30..f1e9e80044ed 100644 --- a/drivers/staging/rts5208/spi.c +++ b/drivers/staging/rts5208/spi.c @@ -1,20 +1,9 @@ -/* Driver for Realtek PCI-Express card reader +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/spi.h b/drivers/staging/rts5208/spi.h index c8d2beacd9e5..dcf93c80b2d5 100644 --- a/drivers/staging/rts5208/spi.h +++ b/drivers/staging/rts5208/spi.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/xd.c b/drivers/staging/rts5208/xd.c index d71f19ceb6fa..c5ee04ecd1c9 100644 --- a/drivers/staging/rts5208/xd.c +++ b/drivers/staging/rts5208/xd.c @@ -1,20 +1,9 @@ -/* Driver for Realtek PCI-Express card reader +// SPDX-License-Identifier: GPL-2.0+ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) diff --git a/drivers/staging/rts5208/xd.h b/drivers/staging/rts5208/xd.h index d5f10880efb7..57b94129b26f 100644 --- a/drivers/staging/rts5208/xd.h +++ b/drivers/staging/rts5208/xd.h @@ -1,21 +1,9 @@ -/* Driver for Realtek PCI-Express card reader - * Header file +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Driver for Realtek PCI-Express card reader * * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2, or (at your option) any - * later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - * * Author: * Wei WANG (wei_wang@realsil.com.cn) * Micky Ching (micky_ching@realsil.com.cn) @@ -102,7 +90,7 @@ #define NO_OFFSET 0x0 #define WITH_OFFSET 0x1 -#define Sect_Per_Page 4 +#define SECT_PER_PAGE 4 #define XD_ADDR_MODE_2C XD_ADDR_MODE_2A #define ZONE0_BAD_BLOCK 23 diff --git a/drivers/staging/sm750fb/ddk750_display.c b/drivers/staging/sm750fb/ddk750_display.c index 1273e7d18925..f38051eedb6c 100644 --- a/drivers/staging/sm750fb/ddk750_display.c +++ b/drivers/staging/sm750fb/ddk750_display.c @@ -5,7 +5,7 @@ #include "ddk750_power.h" #include "ddk750_dvi.h" -static void setDisplayControl(int ctrl, int disp_state) +static void set_display_control(int ctrl, int disp_state) { /* state != 0 means turn on both timing & plane en_bit */ unsigned long reg, val, reserved; @@ -137,12 +137,12 @@ void ddk750_setLogicalDispOut(enum disp_output output) if (output & PRI_TP_USAGE) { /* set primary timing and plane en_bit */ - setDisplayControl(0, (output & PRI_TP_MASK) >> PRI_TP_OFFSET); + set_display_control(0, (output & PRI_TP_MASK) >> PRI_TP_OFFSET); } if (output & SEC_TP_USAGE) { /* set secondary timing and plane en_bit*/ - setDisplayControl(1, (output & SEC_TP_MASK) >> SEC_TP_OFFSET); + set_display_control(1, (output & SEC_TP_MASK) >> SEC_TP_OFFSET); } if (output & PNL_SEQ_USAGE) { diff --git a/drivers/staging/sm750fb/sm750_accel.c b/drivers/staging/sm750fb/sm750_accel.c index 1035e91e7cd3..eed840b251da 100644 --- a/drivers/staging/sm750fb/sm750_accel.c +++ b/drivers/staging/sm750fb/sm750_accel.c @@ -383,7 +383,8 @@ int sm750_hw_imageblit(struct lynx_accel *accel, write_dpPort(accel, *(unsigned int *)(pSrcbuf + (j * 4))); if (ulBytesRemain) { - memcpy(ajRemain, pSrcbuf+ul4BytesPerScan, ulBytesRemain); + memcpy(ajRemain, pSrcbuf + ul4BytesPerScan, + ulBytesRemain); write_dpPort(accel, *(unsigned int *)ajRemain); } diff --git a/drivers/staging/speakup/Kconfig b/drivers/staging/speakup/Kconfig index efd6f4560d3e..d8ec780f7741 100644 --- a/drivers/staging/speakup/Kconfig +++ b/drivers/staging/speakup/Kconfig @@ -3,7 +3,7 @@ menu "Speakup console speech" config SPEAKUP depends on VT tristate "Speakup core" - ---help--- + help This is the Speakup screen reader. Think of it as a video console for blind people. If built in to the kernel, it can speak everything on the text console from @@ -43,7 +43,7 @@ config SPEAKUP if SPEAKUP config SPEAKUP_SYNTH_ACNTSA tristate "Accent SA synthesizer support" - ---help--- + help This is the Speakup driver for the Accent SA synthesizer. You can say y to build it into the kernel, or m to build it as a module. See the configuration @@ -52,7 +52,7 @@ config SPEAKUP_SYNTH_ACNTSA config SPEAKUP_SYNTH_ACNTPC tristate "Accent PC synthesizer support" depends on ISA || COMPILE_TEST - ---help--- + help This is the Speakup driver for the accent pc synthesizer. You can say y to build it into the kernel, or m to build it as a module. See the configuration @@ -60,7 +60,7 @@ config SPEAKUP_SYNTH_ACNTPC config SPEAKUP_SYNTH_APOLLO tristate "Apollo II synthesizer support" - ---help--- + help This is the Speakup driver for the Apollo II synthesizer. You can say y to build it into the kernel, or m to build it as a module. See the configuration @@ -68,7 +68,7 @@ config SPEAKUP_SYNTH_APOLLO config SPEAKUP_SYNTH_AUDPTR tristate "Audapter synthesizer support" - ---help--- + help This is the Speakup driver for the Audapter synthesizer. You can say y to build it into the kernel, or m to build it as a module. See the configuration help on the @@ -76,7 +76,7 @@ config SPEAKUP_SYNTH_AUDPTR config SPEAKUP_SYNTH_BNS tristate "Braille 'n' Speak synthesizer support" - ---help--- + help This is the Speakup driver for the Braille 'n' Speak synthesizer. You can say y to build it into the kernel, or m to build it as a module. See the configuration @@ -84,7 +84,7 @@ config SPEAKUP_SYNTH_BNS config SPEAKUP_SYNTH_DECTLK tristate "DECtalk Express synthesizer support" - ---help--- + help This is the Speakup driver for the DecTalk Express synthesizer. You can say y to build it into the kernel, @@ -93,7 +93,7 @@ config SPEAKUP_SYNTH_DECTLK config SPEAKUP_SYNTH_DECEXT tristate "DECtalk External (old) synthesizer support" - ---help--- + help This is the Speakup driver for the DecTalk External (old) synthesizer. You can say y to build it into the @@ -105,7 +105,7 @@ config SPEAKUP_SYNTH_DECPC depends on m depends on ISA || COMPILE_TEST tristate "DECtalk PC (big ISA card) synthesizer support" - ---help--- + help This is the Speakup driver for the DecTalk PC (full length ISA) synthesizer. You can say m to build it as @@ -127,7 +127,7 @@ config SPEAKUP_SYNTH_DECPC config SPEAKUP_SYNTH_DTLK tristate "DoubleTalk PC synthesizer support" depends on ISA || COMPILE_TEST - ---help--- + help This is the Speakup driver for the internal DoubleTalk PC synthesizer. You can say y to build it into the @@ -138,7 +138,7 @@ config SPEAKUP_SYNTH_DTLK config SPEAKUP_SYNTH_KEYPC tristate "Keynote Gold PC synthesizer support" depends on ISA || COMPILE_TEST - ---help--- + help This is the Speakup driver for the Keynote Gold PC synthesizer. You can say y to build it into the @@ -148,7 +148,7 @@ config SPEAKUP_SYNTH_KEYPC config SPEAKUP_SYNTH_LTLK tristate "DoubleTalk LT/LiteTalk synthesizer support" ----help--- +help This is the Speakup driver for the LiteTalk/DoubleTalk LT synthesizer. You can say y to build it into the @@ -158,7 +158,7 @@ config SPEAKUP_SYNTH_LTLK config SPEAKUP_SYNTH_SOFT tristate "Userspace software synthesizer support" - ---help--- + help This is the software synthesizer device node. It will register a device /dev/softsynth which midware programs @@ -169,7 +169,7 @@ config SPEAKUP_SYNTH_SOFT config SPEAKUP_SYNTH_SPKOUT tristate "Speak Out synthesizer support" - ---help--- + help This is the Speakup driver for the Speakout synthesizer. You can say y to build it into the kernel, or m to @@ -178,7 +178,7 @@ config SPEAKUP_SYNTH_SPKOUT config SPEAKUP_SYNTH_TXPRT tristate "Transport synthesizer support" - ---help--- + help This is the Speakup driver for the Transport synthesizer. You can say y to build it into the kernel, @@ -187,7 +187,7 @@ config SPEAKUP_SYNTH_TXPRT config SPEAKUP_SYNTH_DUMMY tristate "Dummy synthesizer driver (for testing)" - ---help--- + help This is a dummy Speakup driver for plugging a mere serial terminal. This is handy if you want to test speakup but diff --git a/drivers/staging/speakup/i18n.c b/drivers/staging/speakup/i18n.c index cea8707653f5..ee240d36f947 100644 --- a/drivers/staging/speakup/i18n.c +++ b/drivers/staging/speakup/i18n.c @@ -336,7 +336,7 @@ static char *speakup_default_msgs[MSG_LAST_INDEX] = { [MSG_FUNCNAME_SPELL_DELAY_DEC] = "spell delay decrement", [MSG_FUNCNAME_SPELL_DELAY_INC] = "spell delay increment", [MSG_FUNCNAME_SPELL_WORD] = "spell word", - [MSG_FUNCNAME_SPELL_WORD_PHONETICALLY] = "spell word phoneticly", + [MSG_FUNCNAME_SPELL_WORD_PHONETICALLY] = "spell word phonetically", [MSG_FUNCNAME_TONE_DEC] = "tone decrement", [MSG_FUNCNAME_TONE_INC] = "tone increment", [MSG_FUNCNAME_VOICE_DEC] = "voice decrement", diff --git a/drivers/staging/speakup/kobjects.c b/drivers/staging/speakup/kobjects.c index 08f11cc17371..11c704b27c3c 100644 --- a/drivers/staging/speakup/kobjects.c +++ b/drivers/staging/speakup/kobjects.c @@ -154,6 +154,7 @@ static ssize_t chars_chartab_store(struct kobject *kobj, continue; } + /* Do not replace with kstrtoul: here we need temp to be updated */ index = simple_strtoul(cp, &temp, 10); if (index > 255) { rejected++; @@ -545,7 +546,7 @@ ssize_t spk_var_show(struct kobject *kobj, struct kobj_attribute *attr, int rv = 0; struct st_var_header *param; struct var_t *var; - char *cp1; + char *cp1; char *cp; char ch; unsigned long flags; @@ -787,6 +788,7 @@ static ssize_t message_store_helper(const char *buf, size_t count, continue; } + /* Do not replace with kstrtoul: here we need temp to be updated */ index = simple_strtoul(cp, &temp, 10); while ((temp < linefeed) && (*temp == ' ' || *temp == '\t')) diff --git a/drivers/staging/speakup/main.c b/drivers/staging/speakup/main.c index 869f40ebf1a7..b6a65b0c1896 100644 --- a/drivers/staging/speakup/main.c +++ b/drivers/staging/speakup/main.c @@ -901,7 +901,8 @@ static int get_sentence_buf(struct vc_data *vc, int read_punc) while (start < end) { sentbuf[bn][i] = get_char(vc, (u_short *)start, &tmp); if (i > 0) { - if (sentbuf[bn][i] == SPACE && sentbuf[bn][i - 1] == '.' && + if (sentbuf[bn][i] == SPACE && + sentbuf[bn][i - 1] == '.' && numsentences[bn] < 9) { /* Sentence Marker */ numsentences[bn]++; @@ -1235,7 +1236,8 @@ int spk_set_key_info(const u_char *key_info, u_char *k_buffer) key_data_len = (states + 1) * (num_keys + 1); if (key_data_len + SHIFT_TBL_SIZE + 4 >= sizeof(spk_key_buf)) { pr_debug("too many key_infos (%d over %u)\n", - key_data_len + SHIFT_TBL_SIZE + 4, (unsigned int)(sizeof(spk_key_buf))); + key_data_len + SHIFT_TBL_SIZE + 4, + (unsigned int)(sizeof(spk_key_buf))); return -EINVAL; } memset(k_buffer, 0, SHIFT_TBL_SIZE); @@ -1249,8 +1251,8 @@ int spk_set_key_info(const u_char *key_info, u_char *k_buffer) for (i = 1; i <= states; i++) { ch = *cp1++; if (ch >= SHIFT_TBL_SIZE) { - pr_debug("(%d) not valid shift state (max_allowed = %d)\n", ch, - SHIFT_TBL_SIZE); + pr_debug("(%d) not valid shift state (max_allowed = %d)\n", + ch, SHIFT_TBL_SIZE); return -EINVAL; } spk_shift_table[ch] = i; @@ -1258,7 +1260,8 @@ int spk_set_key_info(const u_char *key_info, u_char *k_buffer) keymap_flags = *cp1++; while ((ch = *cp1)) { if (ch >= MAX_KEY) { - pr_debug("(%d), not valid key, (max_allowed = %d)\n", ch, MAX_KEY); + pr_debug("(%d), not valid key, (max_allowed = %d)\n", + ch, MAX_KEY); return -EINVAL; } spk_our_keys[ch] = cp1; @@ -1979,6 +1982,7 @@ oops: return 1; } + /* Do not replace with kstrtoul: here we need cp to be updated */ goto_pos = simple_strtoul(goto_buf, &cp, 10); if (*cp == 'x') { diff --git a/drivers/staging/speakup/speakup_acntpc.c b/drivers/staging/speakup/speakup_acntpc.c index 28519754b2f0..c94328a5bd4a 100644 --- a/drivers/staging/speakup/speakup_acntpc.c +++ b/drivers/staging/speakup/speakup_acntpc.c @@ -298,7 +298,8 @@ static void accent_release(void) { spk_stop_serial_interrupt(); if (speakup_info.port_tts) - synth_release_region(speakup_info.port_tts-1, SYNTH_IO_EXTENT); + synth_release_region(speakup_info.port_tts - 1, + SYNTH_IO_EXTENT); speakup_info.port_tts = 0; } diff --git a/drivers/staging/speakup/speakup_decext.c b/drivers/staging/speakup/speakup_decext.c index 3741c0fcf5bb..ddbb7e97d118 100644 --- a/drivers/staging/speakup/speakup_decext.c +++ b/drivers/staging/speakup/speakup_decext.c @@ -192,7 +192,8 @@ static void do_catch_up(struct spk_synth *synth) synth->io_ops->synth_out(synth, PROCSPEECH); if (time_after_eq(jiffies, jiff_max)) { if (!in_escape) - synth->io_ops->synth_out(synth, PROCSPEECH); + synth->io_ops->synth_out(synth, + PROCSPEECH); spin_lock_irqsave(&speakup_info.spinlock, flags); jiffy_delta_val = jiffy_delta->u.n.value; diff --git a/drivers/staging/speakup/speakup_decpc.c b/drivers/staging/speakup/speakup_decpc.c index 6649309e0342..459ee0c0bd57 100644 --- a/drivers/staging/speakup/speakup_decpc.c +++ b/drivers/staging/speakup/speakup_decpc.c @@ -302,12 +302,12 @@ static void synth_flush(struct spk_synth *synth) while (dt_ctrl(CTRL_flush)) { if (--timeout == 0) break; -udelay(50); + udelay(50); } for (timeout = 0; timeout < 10; timeout++) { if (dt_waitbit(STAT_dma_ready)) break; -udelay(50); + udelay(50); } outb_p(DMA_sync, speakup_info.port_tts + 4); outb_p(0, speakup_info.port_tts + 4); @@ -315,7 +315,7 @@ udelay(50); for (timeout = 0; timeout < 10; timeout++) { if (!(dt_getstatus() & STAT_flushing)) break; -udelay(50); + udelay(50); } dma_state = dt_getstatus() & STAT_dma_state; dma_state ^= STAT_dma_state; diff --git a/drivers/staging/speakup/speakup_dectlk.c b/drivers/staging/speakup/speakup_dectlk.c index a144f28ee1a8..dccb4ea29d37 100644 --- a/drivers/staging/speakup/speakup_dectlk.c +++ b/drivers/staging/speakup/speakup_dectlk.c @@ -260,7 +260,8 @@ static void do_catch_up(struct spk_synth *synth) synth->io_ops->synth_out(synth, PROCSPEECH); if (time_after_eq(jiffies, jiff_max)) { if (!in_escape) - synth->io_ops->synth_out(synth, PROCSPEECH); + synth->io_ops->synth_out(synth, + PROCSPEECH); spin_lock_irqsave(&speakup_info.spinlock, flags); jiffy_delta_val = jiffy_delta->u.n.value; diff --git a/drivers/staging/speakup/speakup_keypc.c b/drivers/staging/speakup/speakup_keypc.c index 3901734982a4..b788272da4f9 100644 --- a/drivers/staging/speakup/speakup_keypc.c +++ b/drivers/staging/speakup/speakup_keypc.c @@ -177,7 +177,7 @@ static void do_catch_up(struct spk_synth *synth) jiffy_delta = spk_get_var(JIFFY); delay_time = spk_get_var(DELAY); full_time = spk_get_var(FULL); -spin_lock_irqsave(&speakup_info.spinlock, flags); + spin_lock_irqsave(&speakup_info.spinlock, flags); jiffy_delta_val = jiffy_delta->u.n.value; spin_unlock_irqrestore(&speakup_info.spinlock, flags); diff --git a/drivers/staging/speakup/speakup_soft.c b/drivers/staging/speakup/speakup_soft.c index 947c79532e10..9d85a3a1af4c 100644 --- a/drivers/staging/speakup/speakup_soft.c +++ b/drivers/staging/speakup/speakup_soft.c @@ -12,7 +12,9 @@ #include <linux/unistd.h> #include <linux/miscdevice.h> /* for misc_register, and SYNTH_MINOR */ #include <linux/poll.h> /* for poll_wait() */ -#include <linux/sched/signal.h> /* schedule(), signal_pending(), TASK_INTERRUPTIBLE */ + +/* schedule(), signal_pending(), TASK_INTERRUPTIBLE */ +#include <linux/sched/signal.h> #include "spk_priv.h" #include "speakup.h" @@ -208,12 +210,15 @@ static ssize_t softsynthx_read(struct file *fp, char __user *buf, size_t count, return -EINVAL; spin_lock_irqsave(&speakup_info.spinlock, flags); + synth_soft.alive = 1; while (1) { prepare_to_wait(&speakup_event, &wait, TASK_INTERRUPTIBLE); - if (!unicode) - synth_buffer_skip_nonlatin1(); - if (!synth_buffer_empty() || speakup_info.flushing) - break; + if (synth_current() == &synth_soft) { + if (!unicode) + synth_buffer_skip_nonlatin1(); + if (!synth_buffer_empty() || speakup_info.flushing) + break; + } spin_unlock_irqrestore(&speakup_info.spinlock, flags); if (fp->f_flags & O_NONBLOCK) { finish_wait(&speakup_event, &wait); @@ -233,6 +238,8 @@ static ssize_t softsynthx_read(struct file *fp, char __user *buf, size_t count, /* Keep 3 bytes available for a 16bit UTF-8-encoded character */ while (chars_sent <= count - bytes_per_ch) { + if (synth_current() != &synth_soft) + break; if (speakup_info.flushing) { speakup_info.flushing = 0; ch = '\x18'; @@ -329,7 +336,8 @@ static __poll_t softsynth_poll(struct file *fp, struct poll_table_struct *wait) poll_wait(fp, &speakup_event, wait); spin_lock_irqsave(&speakup_info.spinlock, flags); - if (!synth_buffer_empty() || speakup_info.flushing) + if (synth_current() == &synth_soft && + (!synth_buffer_empty() || speakup_info.flushing)) ret = EPOLLIN | EPOLLRDNORM; spin_unlock_irqrestore(&speakup_info.spinlock, flags); return ret; diff --git a/drivers/staging/speakup/spk_priv.h b/drivers/staging/speakup/spk_priv.h index 7b3a16e1fa23..ac6a74883af4 100644 --- a/drivers/staging/speakup/spk_priv.h +++ b/drivers/staging/speakup/spk_priv.h @@ -54,8 +54,10 @@ ssize_t spk_var_store(struct kobject *kobj, struct kobj_attribute *attr, int spk_serial_synth_probe(struct spk_synth *synth); int spk_ttyio_synth_probe(struct spk_synth *synth); -const char *spk_serial_synth_immediate(struct spk_synth *synth, const char *buff); -const char *spk_ttyio_synth_immediate(struct spk_synth *synth, const char *buff); +const char *spk_serial_synth_immediate(struct spk_synth *synth, + const char *buff); +const char *spk_ttyio_synth_immediate(struct spk_synth *synth, + const char *buff); void spk_do_catch_up(struct spk_synth *synth); void spk_do_catch_up_unicode(struct spk_synth *synth); void spk_synth_flush(struct spk_synth *synth); @@ -72,6 +74,7 @@ int synth_request_region(unsigned long start, unsigned long n); int synth_release_region(unsigned long start, unsigned long n); int synth_add(struct spk_synth *in_synth); void synth_remove(struct spk_synth *in_synth); +struct spk_synth *synth_current(void); extern struct speakup_info_t speakup_info; diff --git a/drivers/staging/speakup/spk_priv_keyinfo.h b/drivers/staging/speakup/spk_priv_keyinfo.h index cc99fcd1bc6e..1f789bd1c678 100644 --- a/drivers/staging/speakup/spk_priv_keyinfo.h +++ b/drivers/staging/speakup/spk_priv_keyinfo.h @@ -61,11 +61,16 @@ #define SPEAKUP_HELP 0x2d #define TOGGLE_CURSORING 0x2e #define READ_ALL_DOC 0x2f -#define SPKUP_MAX_FUNC 0x30 /* one greater than the last func handler */ + +/* one greater than the last func handler */ +#define SPKUP_MAX_FUNC 0x30 + #define SPK_KEY 0x80 #define FIRST_EDIT_BITS 0x22 #define FIRST_SET_VAR SPELL_DELAY -#define VAR_START 0x40 /* increase if adding more than 0x3f functions */ + +/* increase if adding more than 0x3f functions */ +#define VAR_START 0x40 /* keys for setting variables, must be ordered same as the enum for var_ids */ /* with dec being even and inc being 1 greater */ diff --git a/drivers/staging/speakup/spk_ttyio.c b/drivers/staging/speakup/spk_ttyio.c index 979e3ae249c1..0057eb980bec 100644 --- a/drivers/staging/speakup/spk_ttyio.c +++ b/drivers/staging/speakup/spk_ttyio.c @@ -10,7 +10,7 @@ struct spk_ldisc_data { char buf; - struct semaphore sem; + struct completion completion; bool buf_free; }; @@ -55,7 +55,7 @@ static int spk_ttyio_ldisc_open(struct tty_struct *tty) if (!ldisc_data) return -ENOMEM; - sema_init(&ldisc_data->sem, 0); + init_completion(&ldisc_data->completion); ldisc_data->buf_free = true; speakup_tty->disc_data = ldisc_data; @@ -95,7 +95,7 @@ static int spk_ttyio_receive_buf2(struct tty_struct *tty, ldisc_data->buf = cp[0]; ldisc_data->buf_free = false; - up(&ldisc_data->sem); + complete(&ldisc_data->completion); return 1; } @@ -128,7 +128,8 @@ struct spk_io_ops spk_ttyio_ops = { }; EXPORT_SYMBOL_GPL(spk_ttyio_ops); -static inline void get_termios(struct tty_struct *tty, struct ktermios *out_termios) +static inline void get_termios(struct tty_struct *tty, + struct ktermios *out_termios) { down_read(&tty->termios_rwsem); *out_termios = tty->termios; @@ -167,8 +168,9 @@ static int spk_ttyio_initialise_ldisc(struct spk_synth *synth) tmp_termios.c_cflag |= CRTSCTS; tty_set_termios(tty, &tmp_termios); /* - * check c_cflag to see if it's updated as tty_set_termios may not return - * error even when no tty bits are changed by the request. + * check c_cflag to see if it's updated as tty_set_termios + * may not return error even when no tty bits are + * changed by the request. */ get_termios(tty, &tmp_termios); if (!(tmp_termios.c_cflag & CRTSCTS)) @@ -207,10 +209,11 @@ static int spk_ttyio_out(struct spk_synth *in_synth, const char ch) /* No room */ return 0; if (ret < 0) { - pr_warn("%s: I/O error, deactivating speakup\n", in_synth->long_name); - /* No synth any more, so nobody will restart TTYs, and we thus - * need to do it ourselves. Now that there is no synth we can - * let application flood anyway + pr_warn("%s: I/O error, deactivating speakup\n", + in_synth->long_name); + /* No synth any more, so nobody will restart TTYs, + * and we thus need to do it ourselves. Now that there + * is no synth we can let application flood anyway */ in_synth->alive = 0; speakup_start_ttys(); @@ -265,7 +268,8 @@ static void spk_ttyio_send_xchar(char ch) return; } - speakup_tty->ops->send_xchar(speakup_tty, ch); + if (speakup_tty->ops->send_xchar) + speakup_tty->ops->send_xchar(speakup_tty, ch); mutex_unlock(&speakup_tty_mutex); } @@ -277,7 +281,8 @@ static void spk_ttyio_tiocmset(unsigned int set, unsigned int clear) return; } - speakup_tty->ops->tiocmset(speakup_tty, set, clear); + if (speakup_tty->ops->tiocmset) + speakup_tty->ops->tiocmset(speakup_tty, set, clear); mutex_unlock(&speakup_tty_mutex); } @@ -286,7 +291,8 @@ static unsigned char ttyio_in(int timeout) struct spk_ldisc_data *ldisc_data = speakup_tty->disc_data; char rv; - if (down_timeout(&ldisc_data->sem, usecs_to_jiffies(timeout)) == -ETIME) { + if (wait_for_completion_timeout(&ldisc_data->completion, + usecs_to_jiffies(timeout)) == 0) { if (timeout) pr_warn("spk_ttyio: timeout (%d) while waiting for input\n", timeout); @@ -368,7 +374,8 @@ const char *spk_ttyio_synth_immediate(struct spk_synth *synth, const char *buff) while ((ch = *buff)) { if (ch == '\n') ch = synth->procspeech; - if (tty_write_room(speakup_tty) < 1 || !synth->io_ops->synth_out(synth, ch)) + if (tty_write_room(speakup_tty) < 1 || + !synth->io_ops->synth_out(synth, ch)) return buff; buff++; } diff --git a/drivers/staging/speakup/synth.c b/drivers/staging/speakup/synth.c index 25f259ee4ffc..3568bfb89912 100644 --- a/drivers/staging/speakup/synth.c +++ b/drivers/staging/speakup/synth.c @@ -481,4 +481,10 @@ void synth_remove(struct spk_synth *in_synth) } EXPORT_SYMBOL_GPL(synth_remove); +struct spk_synth *synth_current(void) +{ + return synth; +} +EXPORT_SYMBOL_GPL(synth_current); + short spk_punc_masks[] = { 0, SOME, MOST, PUNC, PUNC | B_SYM }; diff --git a/drivers/staging/speakup/varhandlers.c b/drivers/staging/speakup/varhandlers.c index 1b545152cc49..5741d1cb6227 100644 --- a/drivers/staging/speakup/varhandlers.c +++ b/drivers/staging/speakup/varhandlers.c @@ -238,7 +238,8 @@ int spk_set_num_var(int input, struct st_var_header *var, int how) if (!var_data->u.n.out_str) sprintf(cp, var_data->u.n.synth_fmt, (int)val); else - sprintf(cp, var_data->u.n.synth_fmt, var_data->u.n.out_str[val]); + sprintf(cp, var_data->u.n.synth_fmt, + var_data->u.n.out_str[val]); synth_printf("%s", cp); return 0; } @@ -328,6 +329,7 @@ char *spk_s2uchar(char *start, char *dest) { int val; + /* Do not replace with kstrtoul: here we need start to be updated */ val = simple_strtoul(skip_spaces(start), &start, 10); if (*start == ',') start++; diff --git a/drivers/staging/unisys/visorhba/Makefile b/drivers/staging/unisys/visorhba/Makefile index a8a8e0e0fb09..97e48757944a 100644 --- a/drivers/staging/unisys/visorhba/Makefile +++ b/drivers/staging/unisys/visorhba/Makefile @@ -6,5 +6,4 @@ obj-$(CONFIG_UNISYS_VISORHBA) += visorhba.o visorhba-y := visorhba_main.o -ccflags-y += -Idrivers/staging/unisys/include - +ccflags-y += -I $(srctree)/$(src)/../include diff --git a/drivers/staging/unisys/visorhba/visorhba_main.c b/drivers/staging/unisys/visorhba/visorhba_main.c index 4fc521c51c0e..2dad36a05518 100644 --- a/drivers/staging/unisys/visorhba/visorhba_main.c +++ b/drivers/staging/unisys/visorhba/visorhba_main.c @@ -645,7 +645,6 @@ static struct scsi_host_template visorhba_driver_template = { .this_id = -1, .slave_alloc = visorhba_slave_alloc, .slave_destroy = visorhba_slave_destroy, - .use_clustering = ENABLE_CLUSTERING, }; /* @@ -681,19 +680,7 @@ static int info_debugfs_show(struct seq_file *seq, void *v) return 0; } - -static int info_debugfs_open(struct inode *inode, struct file *file) -{ - return single_open(file, info_debugfs_show, inode->i_private); -} - -static const struct file_operations info_debugfs_fops = { - .owner = THIS_MODULE, - .open = info_debugfs_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; +DEFINE_SHOW_ATTRIBUTE(info_debugfs); /* * complete_taskmgmt_command - Complete task management diff --git a/drivers/staging/unisys/visornic/Makefile b/drivers/staging/unisys/visornic/Makefile index 439e95e03300..336a746f793b 100644 --- a/drivers/staging/unisys/visornic/Makefile +++ b/drivers/staging/unisys/visornic/Makefile @@ -6,5 +6,4 @@ obj-$(CONFIG_UNISYS_VISORNIC) += visornic.o visornic-y := visornic_main.o -ccflags-y += -Idrivers/staging/unisys/include - +ccflags-y += -I $(srctree)/$(src)/../include diff --git a/drivers/staging/unisys/visornic/visornic_main.c b/drivers/staging/unisys/visornic/visornic_main.c index 3647b8f1ed28..1c1a470d2e50 100644 --- a/drivers/staging/unisys/visornic/visornic_main.c +++ b/drivers/staging/unisys/visornic/visornic_main.c @@ -896,9 +896,7 @@ static netdev_tx_t visornic_xmit(struct sk_buff *skb, struct net_device *netdev) ((skb_end_pointer(skb) - skb->data) >= ETH_MIN_PACKET_SIZE)) { /* pad the packet out to minimum size */ padlen = ETH_MIN_PACKET_SIZE - len; - memset(&skb->data[len], 0, padlen); - skb->tail += padlen; - skb->len += padlen; + skb_put_zero(skb, padlen); len += padlen; firstfraglen += padlen; } @@ -2095,7 +2093,7 @@ static int visornic_resume(struct visor_device *dev, mod_timer(&devdata->irq_poll_timer, msecs_to_jiffies(2)); rtnl_lock(); - dev_open(netdev); + dev_open(netdev, NULL); rtnl_unlock(); complete_func(dev, 0); diff --git a/drivers/staging/vboxvideo/Makefile b/drivers/staging/vboxvideo/Makefile index 3f6094aa9cdf..1224f313af0c 100644 --- a/drivers/staging/vboxvideo/Makefile +++ b/drivers/staging/vboxvideo/Makefile @@ -1,6 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 -ccflags-y := -Iinclude/drm - vboxvideo-y := hgsmi_base.o modesetting.o vbva_base.o \ vbox_drv.o vbox_fb.o vbox_hgsmi.o vbox_irq.o vbox_main.o \ vbox_mode.o vbox_prime.o vbox_ttm.o diff --git a/drivers/staging/vboxvideo/TODO b/drivers/staging/vboxvideo/TODO index 2e0f99c3f10c..7f97c47a4042 100644 --- a/drivers/staging/vboxvideo/TODO +++ b/drivers/staging/vboxvideo/TODO @@ -1,5 +1,8 @@ TODO: -Get a full review from the drm-maintainers on dri-devel done on this driver +-Drop all the logic around initial_mode_queried, the master_set and + master_drop callbacks and everything related to this. kms clients can handle + hotplugs. -Extend this TODO with the results of that review Please send any patches to Greg Kroah-Hartman <gregkh@linuxfoundation.org>, diff --git a/drivers/staging/vboxvideo/hgsmi_base.c b/drivers/staging/vboxvideo/hgsmi_base.c index 15ff5f42e2cd..361d3193258e 100644 --- a/drivers/staging/vboxvideo/hgsmi_base.c +++ b/drivers/staging/vboxvideo/hgsmi_base.c @@ -1,27 +1,8 @@ -/* - * Copyright (C) 2006-2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ +// SPDX-License-Identifier: MIT +/* Copyright (C) 2006-2017 Oracle Corporation */ +#include <linux/vbox_err.h> #include "vbox_drv.h" -#include "vbox_err.h" #include "vboxvideo_guest.h" #include "vboxvideo_vbe.h" #include "hgsmi_channels.h" @@ -29,9 +10,9 @@ /** * Inform the host of the location of the host flags in VRAM via an HGSMI cmd. - * @param ctx the context of the guest heap to use. - * @param location the offset chosen for the flags within guest VRAM. - * @returns 0 on success, -errno on failure + * Return: 0 or negative errno value. + * @ctx: The context of the guest heap to use. + * @location: The offset chosen for the flags within guest VRAM. */ int hgsmi_report_flags_location(struct gen_pool *ctx, u32 location) { @@ -53,9 +34,9 @@ int hgsmi_report_flags_location(struct gen_pool *ctx, u32 location) /** * Notify the host of HGSMI-related guest capabilities via an HGSMI command. - * @param ctx the context of the guest heap to use. - * @param caps the capabilities to report, see vbva_caps. - * @returns 0 on success, -errno on failure + * Return: 0 or negative errno value. + * @ctx: The context of the guest heap to use. + * @caps: The capabilities to report, see vbva_caps. */ int hgsmi_send_caps_info(struct gen_pool *ctx, u32 caps) { @@ -70,7 +51,7 @@ int hgsmi_send_caps_info(struct gen_pool *ctx, u32 caps) hgsmi_buffer_submit(ctx, p); - WARN_ON_ONCE(RT_FAILURE(p->rc)); + WARN_ON_ONCE(p->rc < 0); hgsmi_buffer_free(ctx, p); @@ -91,11 +72,10 @@ int hgsmi_test_query_conf(struct gen_pool *ctx) /** * Query the host for an HGSMI configuration parameter via an HGSMI command. - * @param ctx the context containing the heap used - * @param index the index of the parameter to query, - * @see vbva_conf32::index - * @param value_ret where to store the value of the parameter on success - * @returns 0 on success, -errno on failure + * Return: 0 or negative errno value. + * @ctx: The context containing the heap used. + * @index: The index of the parameter to query. + * @value_ret: Where to store the value of the parameter on success. */ int hgsmi_query_conf(struct gen_pool *ctx, u32 index, u32 *value_ret) { @@ -120,16 +100,15 @@ int hgsmi_query_conf(struct gen_pool *ctx, u32 index, u32 *value_ret) /** * Pass the host a new mouse pointer shape via an HGSMI command. - * - * @param ctx the context containing the heap to be used - * @param flags cursor flags, @see VMMDevReqMousePointer::flags - * @param hot_x horizontal position of the hot spot - * @param hot_y vertical position of the hot spot - * @param width width in pixels of the cursor - * @param height height in pixels of the cursor - * @param pixels pixel data, @see VMMDevReqMousePointer for the format - * @param len size in bytes of the pixel data - * @returns 0 on success, -errno on failure + * Return: 0 or negative errno value. + * @ctx: The context containing the heap to be used. + * @flags: Cursor flags. + * @hot_x: Horizontal position of the hot spot. + * @hot_y: Vertical position of the hot spot. + * @width: Width in pixels of the cursor. + * @height: Height in pixels of the cursor. + * @pixels: Pixel data, @see VMMDevReqMousePointer for the format. + * @len: Size in bytes of the pixel data. */ int hgsmi_update_pointer_shape(struct gen_pool *ctx, u32 flags, u32 hot_x, u32 hot_y, u32 width, u32 height, @@ -195,13 +174,13 @@ int hgsmi_update_pointer_shape(struct gen_pool *ctx, u32 flags, * Report the guest cursor position. The host may wish to use this information * to re-position its own cursor (though this is currently unlikely). The * current host cursor position is returned. - * @param ctx The context containing the heap used. - * @param report_position Are we reporting a position? - * @param x Guest cursor X position. - * @param y Guest cursor Y position. - * @param x_host Host cursor X position is stored here. Optional. - * @param y_host Host cursor Y position is stored here. Optional. - * @returns 0 on success, -errno on failure + * Return: 0 or negative errno value. + * @ctx: The context containing the heap used. + * @report_position: Are we reporting a position? + * @x: Guest cursor X position. + * @y: Guest cursor Y position. + * @x_host: Host cursor X position is stored here. Optional. + * @y_host: Host cursor Y position is stored here. Optional. */ int hgsmi_cursor_position(struct gen_pool *ctx, bool report_position, u32 x, u32 y, u32 *x_host, u32 *y_host) @@ -226,21 +205,3 @@ int hgsmi_cursor_position(struct gen_pool *ctx, bool report_position, return 0; } - -/** - * @todo Mouse pointer position to be read from VMMDev memory, address of the - * memory region can be queried from VMMDev via an IOCTL. This VMMDev memory - * region will contain host information which is needed by the guest. - * - * Reading will not cause a switch to the host. - * - * Have to take into account: - * * synchronization: host must write to the memory only from EMT, - * large structures must be read under flag, which tells the host - * that the guest is currently reading the memory (OWNER flag?). - * * guest writes: may be allocate a page for the host info and make - * the page readonly for the guest. - * * the information should be available only for additions drivers. - * * VMMDev additions driver will inform the host which version of the info - * it expects, host must support all versions. - */ diff --git a/drivers/staging/vboxvideo/hgsmi_ch_setup.h b/drivers/staging/vboxvideo/hgsmi_ch_setup.h index 8e6d9e11a69c..4e93418d6a13 100644 --- a/drivers/staging/vboxvideo/hgsmi_ch_setup.h +++ b/drivers/staging/vboxvideo/hgsmi_ch_setup.h @@ -1,24 +1,5 @@ -/* - * Copyright (C) 2006-2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ +/* SPDX-License-Identifier: MIT */ +/* Copyright (C) 2006-2017 Oracle Corporation */ #ifndef __HGSMI_CH_SETUP_H__ #define __HGSMI_CH_SETUP_H__ @@ -36,29 +17,14 @@ struct hgsmi_buffer_location { } __packed; /* HGSMI setup and configuration data structures. */ -/* host->guest commands pending, should be accessed under FIFO lock only */ + #define HGSMIHOSTFLAGS_COMMANDS_PENDING 0x01u -/* IRQ is fired, should be accessed under VGAState::lock only */ #define HGSMIHOSTFLAGS_IRQ 0x02u -/* vsync interrupt flag, should be accessed under VGAState::lock only */ #define HGSMIHOSTFLAGS_VSYNC 0x10u -/** monitor hotplug flag, should be accessed under VGAState::lock only */ #define HGSMIHOSTFLAGS_HOTPLUG 0x20u -/** - * Cursor capability state change flag, should be accessed under - * VGAState::lock only. @see vbva_conf32. - */ #define HGSMIHOSTFLAGS_CURSOR_CAPABILITIES 0x40u struct hgsmi_host_flags { - /* - * Host flags can be accessed and modified in multiple threads - * concurrently, e.g. CrOpenGL HGCM and GUI threads when completing - * HGSMI 3D and Video Accel respectively, EMT thread when dealing with - * HGSMI command processing, etc. - * Besides settings/cleaning flags atomically, some flags have their - * own special sync restrictions, see comments for flags above. - */ u32 host_flags; u32 reserved[3]; } __packed; diff --git a/drivers/staging/vboxvideo/hgsmi_channels.h b/drivers/staging/vboxvideo/hgsmi_channels.h index a2a34b2167b4..9b83f4ff3faf 100644 --- a/drivers/staging/vboxvideo/hgsmi_channels.h +++ b/drivers/staging/vboxvideo/hgsmi_channels.h @@ -1,24 +1,5 @@ -/* - * Copyright (C) 2006-2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ +/* SPDX-License-Identifier: MIT */ +/* Copyright (C) 2006-2017 Oracle Corporation */ #ifndef __HGSMI_CHANNELS_H__ #define __HGSMI_CHANNELS_H__ diff --git a/drivers/staging/vboxvideo/hgsmi_defs.h b/drivers/staging/vboxvideo/hgsmi_defs.h index 5b21fb974d20..6c8df1cdb087 100644 --- a/drivers/staging/vboxvideo/hgsmi_defs.h +++ b/drivers/staging/vboxvideo/hgsmi_defs.h @@ -1,24 +1,5 @@ -/* - * Copyright (C) 2006-2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ +/* SPDX-License-Identifier: MIT */ +/* Copyright (C) 2006-2017 Oracle Corporation */ #ifndef __HGSMI_DEFS_H__ #define __HGSMI_DEFS_H__ diff --git a/drivers/staging/vboxvideo/modesetting.c b/drivers/staging/vboxvideo/modesetting.c index 7616b8aab23a..7580b9002379 100644 --- a/drivers/staging/vboxvideo/modesetting.c +++ b/drivers/staging/vboxvideo/modesetting.c @@ -1,27 +1,8 @@ -/* - * Copyright (C) 2006-2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ +// SPDX-License-Identifier: MIT +/* Copyright (C) 2006-2017 Oracle Corporation */ +#include <linux/vbox_err.h> #include "vbox_drv.h" -#include "vbox_err.h" #include "vboxvideo_guest.h" #include "vboxvideo_vbe.h" #include "hgsmi_channels.h" @@ -30,18 +11,18 @@ * Set a video mode via an HGSMI request. The views must have been * initialised first using @a VBoxHGSMISendViewInfo and if the mode is being * set on the first display then it must be set first using registers. - * @param ctx The context containing the heap to use - * @param display The screen number - * @param origin_x The horizontal displacement relative to the first scrn - * @param origin_y The vertical displacement relative to the first screen - * @param start_offset The offset of the visible area of the framebuffer - * relative to the framebuffer start - * @param pitch The offset in bytes between the starts of two adjecent - * scan lines in video RAM - * @param width The mode width - * @param height The mode height - * @param bpp The colour depth of the mode - * @param flags Flags + * @ctx: The context containing the heap to use. + * @display: The screen number. + * @origin_x: The horizontal displacement relative to the first scrn. + * @origin_y: The vertical displacement relative to the first screen. + * @start_offset: The offset of the visible area of the framebuffer + * relative to the framebuffer start. + * @pitch: The offset in bytes between the starts of two adjecent + * scan lines in video RAM. + * @width: The mode width. + * @height: The mode height. + * @bpp: The colour depth of the mode. + * @flags: Flags. */ void hgsmi_process_display_info(struct gen_pool *ctx, u32 display, s32 origin_x, s32 origin_y, u32 start_offset, @@ -74,12 +55,12 @@ void hgsmi_process_display_info(struct gen_pool *ctx, u32 display, * expressed. This information remains valid until the next VBVA resize event * for any screen, at which time it is reset to the bounding rectangle of all * virtual screens. - * @param ctx The context containing the heap to use. - * @param origin_x Upper left X co-ordinate relative to the first screen. - * @param origin_y Upper left Y co-ordinate relative to the first screen. - * @param width Rectangle width. - * @param height Rectangle height. - * @returns 0 on success, -errno on failure + * Return: 0 or negative errno value. + * @ctx: The context containing the heap to use. + * @origin_x: Upper left X co-ordinate relative to the first screen. + * @origin_y: Upper left Y co-ordinate relative to the first screen. + * @width: Rectangle width. + * @height: Rectangle height. */ int hgsmi_update_input_mapping(struct gen_pool *ctx, s32 origin_x, s32 origin_y, u32 width, u32 height) @@ -104,10 +85,10 @@ int hgsmi_update_input_mapping(struct gen_pool *ctx, s32 origin_x, s32 origin_y, /** * Get most recent video mode hints. - * @param ctx The context containing the heap to use. - * @param screens The number of screens to query hints for, starting at 0. - * @param hints Array of vbva_modehint structures for receiving the hints. - * @returns 0 on success, -errno on failure + * Return: 0 or negative errno value. + * @ctx: The context containing the heap to use. + * @screens: The number of screens to query hints for, starting at 0. + * @hints: Array of vbva_modehint structures for receiving the hints. */ int hgsmi_get_mode_hints(struct gen_pool *ctx, unsigned int screens, struct vbva_modehint *hints) @@ -130,7 +111,7 @@ int hgsmi_get_mode_hints(struct gen_pool *ctx, unsigned int screens, hgsmi_buffer_submit(ctx, p); - if (RT_FAILURE(p->rc)) { + if (p->rc < 0) { hgsmi_buffer_free(ctx, p); return -EIO; } diff --git a/drivers/staging/vboxvideo/vbox_drv.c b/drivers/staging/vboxvideo/vbox_drv.c index 257030460fb6..e7755a179850 100644 --- a/drivers/staging/vboxvideo/vbox_drv.c +++ b/drivers/staging/vboxvideo/vbox_drv.c @@ -1,38 +1,21 @@ +// SPDX-License-Identifier: MIT /* * Copyright (C) 2013-2017 Oracle Corporation * This file is based on ast_drv.c * Copyright 2012 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * * Authors: Dave Airlie <airlied@redhat.com> * Michael Thayer <michael.thayer@oracle.com, * Hans de Goede <hdegoede@redhat.com> */ -#include <linux/module.h> #include <linux/console.h> +#include <linux/module.h> +#include <linux/pci.h> #include <linux/vt_kern.h> -#include <drm/drmP.h> #include <drm/drm_crtc_helper.h> +#include <drm/drm_drv.h> +#include <drm/drm_file.h> +#include <drm/drm_ioctl.h> #include "vbox_drv.h" @@ -44,8 +27,8 @@ module_param_named(modeset, vbox_modeset, int, 0400); static struct drm_driver driver; static const struct pci_device_id pciidlist[] = { - { 0x80ee, 0xbeef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, - { 0, 0, 0}, + { PCI_DEVICE(0x80ee, 0xbeef) }, + { } }; MODULE_DEVICE_TABLE(pci, pciidlist); @@ -138,6 +121,7 @@ static void vbox_pci_remove(struct pci_dev *pdev) drm_dev_put(&vbox->ddev); } +#ifdef CONFIG_PM_SLEEP static int vbox_pm_suspend(struct device *dev) { struct vbox_private *vbox = dev_get_drvdata(dev); @@ -193,13 +177,16 @@ static const struct dev_pm_ops vbox_pm_ops = { .poweroff = vbox_pm_poweroff, .restore = vbox_pm_resume, }; +#endif static struct pci_driver vbox_pci_driver = { .name = DRIVER_NAME, .id_table = pciidlist, .probe = vbox_pci_probe, .remove = vbox_pci_remove, +#ifdef CONFIG_PM_SLEEP .driver.pm = &vbox_pm_ops, +#endif }; static const struct file_operations vbox_fops = { @@ -207,11 +194,9 @@ static const struct file_operations vbox_fops = { .open = drm_open, .release = drm_release, .unlocked_ioctl = drm_ioctl, + .compat_ioctl = drm_compat_ioctl, .mmap = vbox_mmap, .poll = drm_poll, -#ifdef CONFIG_COMPAT - .compat_ioctl = drm_compat_ioctl, -#endif .read = drm_read, }; @@ -227,21 +212,6 @@ static int vbox_master_set(struct drm_device *dev, */ vbox->initial_mode_queried = false; - mutex_lock(&vbox->hw_mutex); - /* - * Disable VBVA when someone releases master in case the next person - * tries tries to do VESA. - */ - /** @todo work out if anyone is likely to and whether it will work. */ - /* - * Update: we also disable it because if the new master does not do - * dirty rectangle reporting (e.g. old versions of Plymouth) then at - * least the first screen will still be updated. We enable it as soon - * as we receive a dirty rectangle report. - */ - vbox_disable_accel(vbox); - mutex_unlock(&vbox->hw_mutex); - return 0; } @@ -251,17 +221,11 @@ static void vbox_master_drop(struct drm_device *dev, struct drm_file *file_priv) /* See vbox_master_set() */ vbox->initial_mode_queried = false; - - mutex_lock(&vbox->hw_mutex); - vbox_disable_accel(vbox); - mutex_unlock(&vbox->hw_mutex); } static struct drm_driver driver = { .driver_features = - DRIVER_MODESET | DRIVER_GEM | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | - DRIVER_PRIME | DRIVER_ATOMIC, - .dev_priv_size = 0, + DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | DRIVER_ATOMIC, .lastclose = drm_fb_helper_lastclose, .master_set = vbox_master_set, @@ -279,7 +243,6 @@ static struct drm_driver driver = { .gem_free_object_unlocked = vbox_gem_free_object, .dumb_create = vbox_dumb_create, .dumb_map_offset = vbox_dumb_mmap_offset, - .dumb_destroy = drm_gem_dumb_destroy, .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, .gem_prime_export = drm_gem_prime_export, @@ -315,5 +278,6 @@ module_init(vbox_init); module_exit(vbox_exit); MODULE_AUTHOR("Oracle Corporation"); +MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); MODULE_DESCRIPTION(DRIVER_DESC); MODULE_LICENSE("GPL and additional rights"); diff --git a/drivers/staging/vboxvideo/vbox_drv.h b/drivers/staging/vboxvideo/vbox_drv.h index 73395a7536c5..aa40e5cc2861 100644 --- a/drivers/staging/vboxvideo/vbox_drv.h +++ b/drivers/staging/vboxvideo/vbox_drv.h @@ -1,28 +1,8 @@ +/* SPDX-License-Identifier: MIT */ /* * Copyright (C) 2013-2017 Oracle Corporation * This file is based on ast_drv.h * Copyright 2012 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * * Authors: Dave Airlie <airlied@redhat.com> * Michael Thayer <michael.thayer@oracle.com, * Hans de Goede <hdegoede@redhat.com> @@ -32,10 +12,10 @@ #include <linux/genalloc.h> #include <linux/io.h> +#include <linux/irqreturn.h> #include <linux/string.h> #include <linux/version.h> -#include <drm/drmP.h> #include <drm/drm_encoder.h> #include <drm/drm_fb_helper.h> #include <drm/drm_gem.h> @@ -89,23 +69,21 @@ struct vbox_private { struct vbva_buf_ctx *vbva_info; bool any_pitch; u32 num_crtcs; - /** Amount of available VRAM, including space used for buffers. */ + /* Amount of available VRAM, including space used for buffers. */ u32 full_vram_size; - /** Amount of available VRAM, not including space used for buffers. */ + /* Amount of available VRAM, not including space used for buffers. */ u32 available_vram_size; - /** Array of structures for receiving mode hints. */ + /* Array of structures for receiving mode hints. */ struct vbva_modehint *last_mode_hints; int fb_mtrr; struct { - struct drm_global_reference mem_global_ref; - struct ttm_bo_global_ref bo_global_ref; struct ttm_bo_device bdev; } ttm; struct mutex hw_mutex; /* protects modeset and accel/vbva accesses */ - /** + /* * We decide whether or not user-space supports display hot-plug * depending on whether they react to a hot-plug event after the initial * mode query. @@ -114,7 +92,7 @@ struct vbox_private { struct work_struct hotplug_work; u32 input_mapping_width; u32 input_mapping_height; - /** + /* * Is user-space using an X.Org-style layout of one large frame-buffer * encompassing all screen ones or is the fbdev console active? */ @@ -184,10 +162,6 @@ void vbox_hw_fini(struct vbox_private *vbox); int vbox_mode_init(struct vbox_private *vbox); void vbox_mode_fini(struct vbox_private *vbox); -#define DRM_MODE_FB_CMD drm_mode_fb_cmd2 - -void vbox_enable_accel(struct vbox_private *vbox); -void vbox_disable_accel(struct vbox_private *vbox); void vbox_report_caps(struct vbox_private *vbox); void vbox_framebuffer_dirty_rectangles(struct drm_framebuffer *fb, @@ -196,7 +170,7 @@ void vbox_framebuffer_dirty_rectangles(struct drm_framebuffer *fb, int vbox_framebuffer_init(struct vbox_private *vbox, struct vbox_framebuffer *vbox_fb, - const struct DRM_MODE_FB_CMD *mode_cmd, + const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object *obj); int vboxfb_create(struct drm_fb_helper *helper, diff --git a/drivers/staging/vboxvideo/vbox_err.h b/drivers/staging/vboxvideo/vbox_err.h deleted file mode 100644 index 562db8630eb0..000000000000 --- a/drivers/staging/vboxvideo/vbox_err.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef __VBOX_ERR_H__ -#define __VBOX_ERR_H__ - -/** - * @name VirtualBox virtual-hardware error macros - * @{ - */ - -#define VINF_SUCCESS 0 -#define VERR_INVALID_PARAMETER (-2) -#define VERR_INVALID_POINTER (-6) -#define VERR_NO_MEMORY (-8) -#define VERR_NOT_IMPLEMENTED (-12) -#define VERR_INVALID_FUNCTION (-36) -#define VERR_NOT_SUPPORTED (-37) -#define VERR_TOO_MUCH_DATA (-42) -#define VERR_INVALID_STATE (-79) -#define VERR_OUT_OF_RESOURCES (-80) -#define VERR_ALREADY_EXISTS (-105) -#define VERR_INTERNAL_ERROR (-225) - -#define RT_SUCCESS_NP(rc) ((int)(rc) >= VINF_SUCCESS) -#define RT_SUCCESS(rc) (likely(RT_SUCCESS_NP(rc))) -#define RT_FAILURE(rc) (unlikely(!RT_SUCCESS_NP(rc))) - -/** @} */ - -#endif diff --git a/drivers/staging/vboxvideo/vbox_fb.c b/drivers/staging/vboxvideo/vbox_fb.c index d1a1f74c8de3..83a04afd1766 100644 --- a/drivers/staging/vboxvideo/vbox_fb.c +++ b/drivers/staging/vboxvideo/vbox_fb.c @@ -1,46 +1,27 @@ +// SPDX-License-Identifier: MIT /* * Copyright (C) 2013-2017 Oracle Corporation * This file is based on ast_fb.c * Copyright 2012 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * * Authors: Dave Airlie <airlied@redhat.com> * Michael Thayer <michael.thayer@oracle.com, */ -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/tty.h> -#include <linux/sysrq.h> #include <linux/delay.h> +#include <linux/errno.h> #include <linux/fb.h> #include <linux/init.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/module.h> +#include <linux/pci.h> +#include <linux/string.h> +#include <linux/sysrq.h> +#include <linux/tty.h> -#include <drm/drmP.h> #include <drm/drm_crtc.h> -#include <drm/drm_fb_helper.h> #include <drm/drm_crtc_helper.h> +#include <drm/drm_fb_helper.h> +#include <drm/drm_fourcc.h> #include "vbox_drv.h" #include "vboxvideo.h" @@ -54,16 +35,10 @@ static struct fb_deferred_io vbox_defio = { static struct fb_ops vboxfb_ops = { .owner = THIS_MODULE, - .fb_check_var = drm_fb_helper_check_var, - .fb_set_par = drm_fb_helper_set_par, + DRM_FB_HELPER_DEFAULT_OPS, .fb_fillrect = drm_fb_helper_sys_fillrect, .fb_copyarea = drm_fb_helper_sys_copyarea, .fb_imageblit = drm_fb_helper_sys_imageblit, - .fb_pan_display = drm_fb_helper_pan_display, - .fb_blank = drm_fb_helper_blank, - .fb_setcmap = drm_fb_helper_setcmap, - .fb_debug_enter = drm_fb_helper_debug_enter, - .fb_debug_leave = drm_fb_helper_debug_leave, }; int vboxfb_create(struct drm_fb_helper *helper, @@ -72,7 +47,7 @@ int vboxfb_create(struct drm_fb_helper *helper, struct vbox_private *vbox = container_of(helper, struct vbox_private, fb_helper); struct pci_dev *pdev = vbox->ddev.pdev; - struct DRM_MODE_FB_CMD mode_cmd; + struct drm_mode_fb_cmd2 mode_cmd; struct drm_framebuffer *fb; struct fb_info *info; struct drm_gem_object *gobj; @@ -122,11 +97,6 @@ int vboxfb_create(struct drm_fb_helper *helper, strcpy(info->fix.id, "vboxdrmfb"); - /* - * The last flag forces a mode set on VT switches even if the kernel - * does not think it is needed. - */ - info->flags = FBINFO_DEFAULT | FBINFO_MISC_ALWAYS_SETPAR; info->fbops = &vboxfb_ops; /* diff --git a/drivers/staging/vboxvideo/vbox_hgsmi.c b/drivers/staging/vboxvideo/vbox_hgsmi.c index 822fd31121cb..94b60654a012 100644 --- a/drivers/staging/vboxvideo/vbox_hgsmi.c +++ b/drivers/staging/vboxvideo/vbox_hgsmi.c @@ -1,26 +1,6 @@ +// SPDX-License-Identifier: MIT /* * Copyright (C) 2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * * Authors: Hans de Goede <hdegoede@redhat.com> */ diff --git a/drivers/staging/vboxvideo/vbox_irq.c b/drivers/staging/vboxvideo/vbox_irq.c index 09f858ec1369..195484713365 100644 --- a/drivers/staging/vboxvideo/vbox_irq.c +++ b/drivers/staging/vboxvideo/vbox_irq.c @@ -1,33 +1,17 @@ +// SPDX-License-Identifier: MIT /* * Copyright (C) 2016-2017 Oracle Corporation * This file is based on qxl_irq.c * Copyright 2013 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * * Authors: Dave Airlie * Alon Levy * Michael Thayer <michael.thayer@oracle.com, * Hans de Goede <hdegoede@redhat.com> */ -#include <drm/drm_crtc_helper.h> +#include <linux/pci.h> +#include <drm/drm_irq.h> +#include <drm/drm_probe_helper.h> #include "vbox_drv.h" #include "vboxvideo.h" @@ -72,7 +56,7 @@ irqreturn_t vbox_irq_handler(int irq, void *arg) return IRQ_HANDLED; } -/** +/* * Check that the position hints provided by the host are suitable for GNOME * shell (i.e. all screens disjoint and hints for all enabled screens) and if * not replace them with default ones. Providing valid hints improves the @@ -118,9 +102,7 @@ static void validate_or_set_position_hints(struct vbox_private *vbox) } } -/** - * Query the host for the most recent video mode hints. - */ +/* Query the host for the most recent video mode hints. */ static void vbox_update_mode_hints(struct vbox_private *vbox) { struct drm_device *dev = &vbox->ddev; diff --git a/drivers/staging/vboxvideo/vbox_main.c b/drivers/staging/vboxvideo/vbox_main.c index 7466c1103ff6..e1fb70a42d32 100644 --- a/drivers/staging/vboxvideo/vbox_main.c +++ b/drivers/staging/vboxvideo/vbox_main.c @@ -1,37 +1,18 @@ +// SPDX-License-Identifier: MIT /* * Copyright (C) 2013-2017 Oracle Corporation * This file is based on ast_main.c * Copyright 2012 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * * Authors: Dave Airlie <airlied@redhat.com>, * Michael Thayer <michael.thayer@oracle.com, * Hans de Goede <hdegoede@redhat.com> */ + +#include <linux/vbox_err.h> #include <drm/drm_fb_helper.h> #include <drm/drm_crtc_helper.h> #include "vbox_drv.h" -#include "vbox_err.h" #include "vboxvideo_guest.h" #include "vboxvideo_vbe.h" @@ -46,40 +27,6 @@ static void vbox_user_framebuffer_destroy(struct drm_framebuffer *fb) kfree(fb); } -void vbox_enable_accel(struct vbox_private *vbox) -{ - unsigned int i; - struct vbva_buffer *vbva; - - if (!vbox->vbva_info || !vbox->vbva_buffers) { - /* Should never happen... */ - DRM_ERROR("vboxvideo: failed to set up VBVA.\n"); - return; - } - - for (i = 0; i < vbox->num_crtcs; ++i) { - if (vbox->vbva_info[i].vbva) - continue; - - vbva = (void __force *)vbox->vbva_buffers + - i * VBVA_MIN_BUFFER_SIZE; - if (!vbva_enable(&vbox->vbva_info[i], - vbox->guest_pool, vbva, i)) { - /* very old host or driver error. */ - DRM_ERROR("vboxvideo: vbva_enable failed\n"); - return; - } - } -} - -void vbox_disable_accel(struct vbox_private *vbox) -{ - unsigned int i; - - for (i = 0; i < vbox->num_crtcs; ++i) - vbva_disable(&vbox->vbva_info[i], vbox->guest_pool, i); -} - void vbox_report_caps(struct vbox_private *vbox) { u32 caps = VBVACAPS_DISABLE_CURSOR_INTEGRATION | @@ -91,12 +38,7 @@ void vbox_report_caps(struct vbox_private *vbox) hgsmi_send_caps_info(vbox->guest_pool, caps); } -/** - * Send information about dirty rectangles to VBVA. If necessary we enable - * VBVA first, as this is normally disabled after a change of master in case - * the new master does not send dirty rectangle information (is this even - * allowed?) - */ +/* Send information about dirty rectangles to VBVA. */ void vbox_framebuffer_dirty_rectangles(struct drm_framebuffer *fb, struct drm_clip_rect *rects, unsigned int num_rects) @@ -116,16 +58,14 @@ void vbox_framebuffer_dirty_rectangles(struct drm_framebuffer *fb, crtc_x = crtc->primary->state->src_x >> 16; crtc_y = crtc->primary->state->src_y >> 16; - vbox_enable_accel(vbox); - for (i = 0; i < num_rects; ++i) { struct vbva_cmd_hdr cmd_hdr; unsigned int crtc_id = to_vbox_crtc(crtc)->crtc_id; - if ((rects[i].x1 > crtc_x + mode->hdisplay) || - (rects[i].y1 > crtc_y + mode->vdisplay) || - (rects[i].x2 < crtc_x) || - (rects[i].y2 < crtc_y)) + if (rects[i].x1 > crtc_x + mode->hdisplay || + rects[i].y1 > crtc_y + mode->vdisplay || + rects[i].x2 < crtc_x || + rects[i].y2 < crtc_y) continue; cmd_hdr.x = (s16)rects[i].x1; @@ -163,7 +103,7 @@ static const struct drm_framebuffer_funcs vbox_fb_funcs = { int vbox_framebuffer_init(struct vbox_private *vbox, struct vbox_framebuffer *vbox_fb, - const struct DRM_MODE_FB_CMD *mode_cmd, + const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object *obj) { int ret; @@ -181,6 +121,7 @@ int vbox_framebuffer_init(struct vbox_private *vbox, static int vbox_accel_init(struct vbox_private *vbox) { + struct vbva_buffer *vbva; unsigned int i; vbox->vbva_info = devm_kcalloc(vbox->ddev.dev, vbox->num_crtcs, @@ -198,22 +139,34 @@ static int vbox_accel_init(struct vbox_private *vbox) if (!vbox->vbva_buffers) return -ENOMEM; - for (i = 0; i < vbox->num_crtcs; ++i) + for (i = 0; i < vbox->num_crtcs; ++i) { vbva_setup_buffer_context(&vbox->vbva_info[i], vbox->available_vram_size + i * VBVA_MIN_BUFFER_SIZE, VBVA_MIN_BUFFER_SIZE); + vbva = (void __force *)vbox->vbva_buffers + + i * VBVA_MIN_BUFFER_SIZE; + if (!vbva_enable(&vbox->vbva_info[i], + vbox->guest_pool, vbva, i)) { + /* very old host or driver error. */ + DRM_ERROR("vboxvideo: vbva_enable failed\n"); + } + } return 0; } static void vbox_accel_fini(struct vbox_private *vbox) { - vbox_disable_accel(vbox); + unsigned int i; + + for (i = 0; i < vbox->num_crtcs; ++i) + vbva_disable(&vbox->vbva_info[i], vbox->guest_pool, i); + pci_iounmap(vbox->ddev.pdev, vbox->vbva_buffers); } -/** Do we support the 4.3 plus mode hint reporting interface? */ +/* Do we support the 4.3 plus mode hint reporting interface? */ static bool have_hgsmi_mode_hints(struct vbox_private *vbox) { u32 have_hints, have_cursor; @@ -244,10 +197,6 @@ bool vbox_check_supported(u16 id) return dispi_id == id; } -/** - * Set up our heaps and data exchange buffers in VRAM before handing the rest - * to the memory manager. - */ int vbox_hw_init(struct vbox_private *vbox) { int ret = -ENOMEM; diff --git a/drivers/staging/vboxvideo/vbox_mode.c b/drivers/staging/vboxvideo/vbox_mode.c index 6acc965247ff..213551394495 100644 --- a/drivers/staging/vboxvideo/vbox_mode.c +++ b/drivers/staging/vboxvideo/vbox_mode.c @@ -1,47 +1,28 @@ +// SPDX-License-Identifier: MIT /* * Copyright (C) 2013-2017 Oracle Corporation * This file is based on ast_mode.c * Copyright 2012 Red Hat Inc. * Parts based on xf86-video-ast * Copyright (c) 2005 ASPEED Technology Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - */ -/* * Authors: Dave Airlie <airlied@redhat.com> * Michael Thayer <michael.thayer@oracle.com, * Hans de Goede <hdegoede@redhat.com> */ #include <linux/export.h> + #include <drm/drm_atomic.h> -#include <drm/drm_crtc_helper.h> -#include <drm/drm_plane_helper.h> #include <drm/drm_atomic_helper.h> +#include <drm/drm_fourcc.h> +#include <drm/drm_plane_helper.h> +#include <drm/drm_probe_helper.h> +#include <drm/drm_vblank.h> +#include "hgsmi_channels.h" #include "vbox_drv.h" #include "vboxvideo.h" -#include "hgsmi_channels.h" -/** +/* * Set a graphics mode. Poke any required values into registers, do an HGSMI * mode set and tell the host we support advanced graphics functions. */ @@ -84,7 +65,7 @@ static void vbox_do_modeset(struct drm_crtc *crtc) } flags = VBVA_SCREEN_F_ACTIVE; - flags |= (fb && crtc->state->active) ? 0 : VBVA_SCREEN_F_BLANK; + flags |= (fb && crtc->state->enable) ? 0 : VBVA_SCREEN_F_BLANK; flags |= vbox_crtc->disconnected ? VBVA_SCREEN_F_DISABLED : 0; hgsmi_process_display_info(vbox->guest_pool, vbox_crtc->crtc_id, x_offset, y_offset, @@ -190,7 +171,6 @@ static bool vbox_set_up_input_mapping(struct vbox_private *vbox) static void vbox_crtc_set_base_and_mode(struct drm_crtc *crtc, struct drm_framebuffer *fb, - struct drm_display_mode *mode, int x, int y) { struct vbox_bo *bo = gem_to_vbox_bo(to_vbox_framebuffer(fb)->obj); @@ -200,8 +180,11 @@ static void vbox_crtc_set_base_and_mode(struct drm_crtc *crtc, mutex_lock(&vbox->hw_mutex); - vbox_crtc->width = mode->hdisplay; - vbox_crtc->height = mode->vdisplay; + if (crtc->state->enable) { + vbox_crtc->width = crtc->state->mode.hdisplay; + vbox_crtc->height = crtc->state->mode.vdisplay; + } + vbox_crtc->x = x; vbox_crtc->y = y; vbox_crtc->fb_offset = vbox_bo_gpu_offset(bo); @@ -301,7 +284,7 @@ static void vbox_primary_atomic_update(struct drm_plane *plane, struct drm_crtc *crtc = plane->state->crtc; struct drm_framebuffer *fb = plane->state->fb; - vbox_crtc_set_base_and_mode(crtc, fb, &crtc->state->mode, + vbox_crtc_set_base_and_mode(crtc, fb, plane->state->src_x >> 16, plane->state->src_y >> 16); } @@ -312,7 +295,7 @@ static void vbox_primary_atomic_disable(struct drm_plane *plane, struct drm_crtc *crtc = old_state->crtc; /* vbox_do_modeset checks plane->state->fb and will disable if NULL */ - vbox_crtc_set_base_and_mode(crtc, old_state->fb, &crtc->state->mode, + vbox_crtc_set_base_and_mode(crtc, old_state->fb, old_state->src_x >> 16, old_state->src_y >> 16); } @@ -378,7 +361,7 @@ static int vbox_cursor_atomic_check(struct drm_plane *plane, return 0; } -/** +/* * Copy the ARGB image and generate the mask, which is needed in case the host * does not support ARGB cursors. The mask is a 1BPP bitmap with the bit set * if the corresponding alpha value in the ARGB image is greater than 0xF0. @@ -499,7 +482,7 @@ static void vbox_cursor_cleanup_fb(struct drm_plane *plane, vbox_bo_unpin(bo); } -static const uint32_t vbox_cursor_plane_formats[] = { +static const u32 vbox_cursor_plane_formats[] = { DRM_FORMAT_ARGB8888, }; @@ -520,7 +503,7 @@ static const struct drm_plane_funcs vbox_cursor_plane_funcs = { .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, }; -static const uint32_t vbox_primary_plane_formats[] = { +static const u32 vbox_primary_plane_formats[] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_ARGB8888, }; @@ -549,7 +532,7 @@ static struct drm_plane *vbox_create_plane(struct vbox_private *vbox, const struct drm_plane_helper_funcs *helper_funcs = NULL; const struct drm_plane_funcs *funcs; struct drm_plane *plane; - const uint32_t *formats; + const u32 *formats; int num_formats; int err; @@ -672,11 +655,11 @@ static struct drm_encoder *vbox_encoder_init(struct drm_device *dev, return &vbox_encoder->base; } -/** +/* * Generate EDID data with a mode-unique serial number for the virtual - * monitor to try to persuade Unity that different modes correspond to - * different monitors and it should not try to force the same resolution on - * them. + * monitor to try to persuade Unity that different modes correspond to + * different monitors and it should not try to force the same resolution on + * them. */ static void vbox_set_edid(struct drm_connector *connector, int width, int height) diff --git a/drivers/staging/vboxvideo/vbox_prime.c b/drivers/staging/vboxvideo/vbox_prime.c index b7453e427a1d..d61985b0c6eb 100644 --- a/drivers/staging/vboxvideo/vbox_prime.c +++ b/drivers/staging/vboxvideo/vbox_prime.c @@ -1,25 +1,7 @@ +// SPDX-License-Identifier: MIT /* * Copyright (C) 2017 Oracle Corporation * Copyright 2017 Canonical - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * * Authors: Andreas Pokorny */ diff --git a/drivers/staging/vboxvideo/vbox_ttm.c b/drivers/staging/vboxvideo/vbox_ttm.c index 5ecfa7629173..30f270027acf 100644 --- a/drivers/staging/vboxvideo/vbox_ttm.c +++ b/drivers/staging/vboxvideo/vbox_ttm.c @@ -1,95 +1,21 @@ +// SPDX-License-Identifier: MIT /* * Copyright (C) 2013-2017 Oracle Corporation * This file is based on ast_ttm.c * Copyright 2012 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * * Authors: Dave Airlie <airlied@redhat.com> * Michael Thayer <michael.thayer@oracle.com> */ +#include <linux/pci.h> +#include <drm/drm_file.h> +#include <drm/ttm/ttm_page_alloc.h> #include "vbox_drv.h" -#include <ttm/ttm_page_alloc.h> static inline struct vbox_private *vbox_bdev(struct ttm_bo_device *bd) { return container_of(bd, struct vbox_private, ttm.bdev); } -static int vbox_ttm_mem_global_init(struct drm_global_reference *ref) -{ - return ttm_mem_global_init(ref->object); -} - -static void vbox_ttm_mem_global_release(struct drm_global_reference *ref) -{ - ttm_mem_global_release(ref->object); -} - -/** - * Adds the vbox memory manager object/structures to the global memory manager. - */ -static int vbox_ttm_global_init(struct vbox_private *vbox) -{ - struct drm_global_reference *global_ref; - int ret; - - global_ref = &vbox->ttm.mem_global_ref; - global_ref->global_type = DRM_GLOBAL_TTM_MEM; - global_ref->size = sizeof(struct ttm_mem_global); - global_ref->init = &vbox_ttm_mem_global_init; - global_ref->release = &vbox_ttm_mem_global_release; - ret = drm_global_item_ref(global_ref); - if (ret) { - DRM_ERROR("Failed setting up TTM memory subsystem.\n"); - return ret; - } - - vbox->ttm.bo_global_ref.mem_glob = vbox->ttm.mem_global_ref.object; - global_ref = &vbox->ttm.bo_global_ref.ref; - global_ref->global_type = DRM_GLOBAL_TTM_BO; - global_ref->size = sizeof(struct ttm_bo_global); - global_ref->init = &ttm_bo_global_init; - global_ref->release = &ttm_bo_global_release; - - ret = drm_global_item_ref(global_ref); - if (ret) { - DRM_ERROR("Failed setting up TTM BO subsystem.\n"); - drm_global_item_unref(&vbox->ttm.mem_global_ref); - return ret; - } - - return 0; -} - -/** - * Removes the vbox memory manager object from the global memory manager. - */ -static void vbox_ttm_global_release(struct vbox_private *vbox) -{ - drm_global_item_unref(&vbox->ttm.bo_global_ref.ref); - drm_global_item_unref(&vbox->ttm.mem_global_ref); -} - static void vbox_bo_ttm_destroy(struct ttm_buffer_object *tbo) { struct vbox_bo *bo; @@ -227,18 +153,13 @@ int vbox_mm_init(struct vbox_private *vbox) struct drm_device *dev = &vbox->ddev; struct ttm_bo_device *bdev = &vbox->ttm.bdev; - ret = vbox_ttm_global_init(vbox); - if (ret) - return ret; - ret = ttm_bo_device_init(&vbox->ttm.bdev, - vbox->ttm.bo_global_ref.ref.object, &vbox_bo_driver, dev->anon_inode->i_mapping, DRM_FILE_PAGE_OFFSET, true); if (ret) { DRM_ERROR("Error initialising bo driver; %d\n", ret); - goto err_ttm_global_release; + return ret; } ret = ttm_bo_init_mm(bdev, TTM_PL_VRAM, @@ -260,8 +181,6 @@ int vbox_mm_init(struct vbox_private *vbox) err_device_release: ttm_bo_device_release(&vbox->ttm.bdev); -err_ttm_global_release: - vbox_ttm_global_release(vbox); return ret; } @@ -275,7 +194,6 @@ void vbox_mm_fini(struct vbox_private *vbox) arch_phys_wc_del(vbox->fb_mtrr); #endif ttm_bo_device_release(&vbox->ttm.bdev); - vbox_ttm_global_release(vbox); } void vbox_ttm_placement(struct vbox_bo *bo, int domain) diff --git a/drivers/staging/vboxvideo/vboxvideo.h b/drivers/staging/vboxvideo/vboxvideo.h index d835d75d761c..0592004f71aa 100644 --- a/drivers/staging/vboxvideo/vboxvideo.h +++ b/drivers/staging/vboxvideo/vboxvideo.h @@ -1,33 +1,9 @@ -/* - * Copyright (C) 2006-2016 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - */ +/* SPDX-License-Identifier: MIT */ +/* Copyright (C) 2006-2016 Oracle Corporation */ #ifndef __VBOXVIDEO_H__ #define __VBOXVIDEO_H__ -/* - * This should be in sync with monitorCount <xsd:maxInclusive value="64"/> in - * src/VBox/Main/xml/VirtualBox-settings-common.xsd - */ #define VBOX_VIDEO_MAX_SCREENS 64 /* @@ -77,21 +53,14 @@ * read 32 bit value result of the last vbox command is returned */ -/** - * VBVA command header. - * - * @todo Where does this fit in? - */ struct vbva_cmd_hdr { - /** Coordinates of affected rectangle. */ s16 x; s16 y; u16 w; u16 h; } __packed; -/** @name VBVA ring defines. - * +/* * The VBVA ring buffer is suitable for transferring large (< 2GB) amount of * data. For example big bitmaps which do not fit to the buffer. * @@ -106,8 +75,8 @@ struct vbva_cmd_hdr { * VBVA_RING_BUFFER_THRESHOLD, the host fetched all record data and updates * data_offset. After that on each flush the host continues fetching the data * until the record is completed. - * */ + #define VBVA_RING_BUFFER_SIZE (4194304 - 1024) #define VBVA_RING_BUFFER_THRESHOLD (4096) @@ -122,11 +91,7 @@ struct vbva_cmd_hdr { #define VBVA_F_RECORD_PARTIAL 0x80000000u -/** - * VBVA record. - */ struct vbva_record { - /** The length of the record. Changed by guest. */ u32 len_and_flags; } __packed; @@ -144,7 +109,8 @@ struct vbva_record { /* The value for port IO to let the adapter to interpret the adapter memory. */ #define VBOX_VIDEO_INTERPRET_ADAPTER_MEMORY 0x00000000 -/* The value for port IO to let the adapter to interpret the display memory. +/* + * The value for port IO to let the adapter to interpret the display memory. * The display number is encoded in low 16 bits. */ #define VBOX_VIDEO_INTERPRET_DISPLAY_MEMORY_BASE 0x00010000 @@ -200,12 +166,12 @@ struct vbva_buffer { #define VBVA_CMDVBVA_CTL 18 /* Query most recent mode hints sent */ #define VBVA_QUERY_MODE_HINTS 19 -/** +/* * Report the guest virtual desktop position and size for mapping host and * guest pointer positions. */ #define VBVA_REPORT_INPUT_MAPPING 20 -/** Report the guest cursor position and query the host position. */ +/* Report the guest cursor position and query the host position. */ #define VBVA_CURSOR_POSITION 21 /* host->guest commands */ @@ -215,25 +181,24 @@ struct vbva_buffer { /* vbva_conf32::index */ #define VBOX_VBVA_CONF32_MONITOR_COUNT 0 #define VBOX_VBVA_CONF32_HOST_HEAP_SIZE 1 -/** +/* * Returns VINF_SUCCESS if the host can report mode hints via VBVA. * Set value to VERR_NOT_SUPPORTED before calling. */ #define VBOX_VBVA_CONF32_MODE_HINT_REPORTING 2 -/** +/* * Returns VINF_SUCCESS if the host can report guest cursor enabled status via * VBVA. Set value to VERR_NOT_SUPPORTED before calling. */ #define VBOX_VBVA_CONF32_GUEST_CURSOR_REPORTING 3 -/** +/* * Returns the currently available host cursor capabilities. Available if - * vbva_conf32::VBOX_VBVA_CONF32_GUEST_CURSOR_REPORTING returns success. - * @see VMMDevReqMouseStatus::mouseFeatures. + * VBOX_VBVA_CONF32_GUEST_CURSOR_REPORTING returns success. */ #define VBOX_VBVA_CONF32_CURSOR_CAPABILITIES 4 -/** Returns the supported flags in vbva_infoscreen::flags. */ +/* Returns the supported flags in vbva_infoscreen.flags. */ #define VBOX_VBVA_CONF32_SCREEN_FLAGS 5 -/** Returns the max size of VBVA record. */ +/* Returns the max size of VBVA record. */ #define VBOX_VBVA_CONF32_MAX_RECORD_SIZE 6 struct vbva_conf32 { @@ -241,20 +206,20 @@ struct vbva_conf32 { u32 value; } __packed; -/** Reserved for historical reasons. */ +/* Reserved for historical reasons. */ #define VBOX_VBVA_CURSOR_CAPABILITY_RESERVED0 BIT(0) -/** +/* * Guest cursor capability: can the host show a hardware cursor at the host * pointer location? */ #define VBOX_VBVA_CURSOR_CAPABILITY_HARDWARE BIT(1) -/** Reserved for historical reasons. */ +/* Reserved for historical reasons. */ #define VBOX_VBVA_CURSOR_CAPABILITY_RESERVED2 BIT(2) -/** Reserved for historical reasons. Must always be unset. */ +/* Reserved for historical reasons. Must always be unset. */ #define VBOX_VBVA_CURSOR_CAPABILITY_RESERVED3 BIT(3) -/** Reserved for historical reasons. */ +/* Reserved for historical reasons. */ #define VBOX_VBVA_CURSOR_CAPABILITY_RESERVED4 BIT(4) -/** Reserved for historical reasons. */ +/* Reserved for historical reasons. */ #define VBOX_VBVA_CURSOR_CAPABILITY_RESERVED5 BIT(5) struct vbva_infoview { @@ -275,21 +240,21 @@ struct vbva_flush { u32 reserved; } __packed; -/* vbva_infoscreen::flags */ +/* vbva_infoscreen.flags */ #define VBVA_SCREEN_F_NONE 0x0000 #define VBVA_SCREEN_F_ACTIVE 0x0001 -/** +/* * The virtual monitor has been disabled by the guest and should be removed * by the host and ignored for purposes of pointer position calculation. */ #define VBVA_SCREEN_F_DISABLED 0x0002 -/** +/* * The virtual monitor has been blanked by the guest and should be blacked * out by the host using width, height, etc values from the vbva_infoscreen * request. */ #define VBVA_SCREEN_F_BLANK 0x0004 -/** +/* * The virtual monitor has been blanked by the guest and should be blacked * out by the host using the previous mode values for width. height, etc. */ @@ -324,7 +289,7 @@ struct vbva_infoscreen { u16 flags; } __packed; -/* vbva_enable::flags */ +/* vbva_enable.flags */ #define VBVA_F_NONE 0x00000000 #define VBVA_F_ENABLE 0x00000001 #define VBVA_F_DISABLE 0x00000002 @@ -365,7 +330,6 @@ struct vbva_mouse_pointer_shape { /* Pointer data. * - **** * The data consists of 1 bpp AND mask followed by 32 bpp XOR (color) * mask. * @@ -387,30 +351,19 @@ struct vbva_mouse_pointer_shape { * Bytes in the gap between the AND and the XOR mask are undefined. * XOR mask scanlines have no gap between them and size of XOR mask is: * xor_len = width * 4 * height. - **** * * Preallocate 4 bytes for accessing actual data as p->data. */ u8 data[4]; } __packed; -/** - * @name vbva_mouse_pointer_shape::flags - * @note The VBOX_MOUSE_POINTER_* flags are used in the guest video driver, - * values must be <= 0x8000 and must not be changed. (try make more sense - * of this, please). - * @{ - */ - -/** pointer is visible */ +/* pointer is visible */ #define VBOX_MOUSE_POINTER_VISIBLE 0x0001 -/** pointer has alpha channel */ +/* pointer has alpha channel */ #define VBOX_MOUSE_POINTER_ALPHA 0x0002 -/** pointerData contains new pointer shape */ +/* pointerData contains new pointer shape */ #define VBOX_MOUSE_POINTER_SHAPE 0x0004 -/** @} */ - /* * The guest driver can handle asynch guest cmd completion by reading the * command offset from io port. @@ -418,11 +371,11 @@ struct vbva_mouse_pointer_shape { #define VBVACAPS_COMPLETEGCMD_BY_IOREAD 0x00000001 /* the guest driver can handle video adapter IRQs */ #define VBVACAPS_IRQ 0x00000002 -/** The guest can read video mode hints sent via VBVA. */ +/* The guest can read video mode hints sent via VBVA. */ #define VBVACAPS_VIDEO_MODE_HINTS 0x00000004 -/** The guest can switch to a software cursor on demand. */ +/* The guest can switch to a software cursor on demand. */ #define VBVACAPS_DISABLE_CURSOR_INTEGRATION 0x00000008 -/** The guest does not depend on host handling the VBE registers. */ +/* The guest does not depend on host handling the VBE registers. */ #define VBVACAPS_USE_VBVA_ONLY 0x00000010 struct vbva_caps { @@ -430,17 +383,17 @@ struct vbva_caps { u32 caps; } __packed; -/** Query the most recent mode hints received from the host. */ +/* Query the most recent mode hints received from the host. */ struct vbva_query_mode_hints { - /** The maximum number of screens to return hints for. */ + /* The maximum number of screens to return hints for. */ u16 hints_queried_count; - /** The size of the mode hint structures directly following this one. */ + /* The size of the mode hint structures directly following this one. */ u16 hint_structure_guest_size; - /** Return code for the operation. Initialise to VERR_NOT_SUPPORTED. */ + /* Return code for the operation. Initialise to VERR_NOT_SUPPORTED. */ s32 rc; } __packed; -/** +/* * Structure in which a mode hint is returned. The guest allocates an array * of these immediately after the vbva_query_mode_hints structure. * To accommodate future extensions, the vbva_query_mode_hints structure @@ -455,37 +408,35 @@ struct vbva_modehint { u32 cy; u32 bpp; /* Which has never been used... */ u32 display; - u32 dx; /**< X offset into the virtual frame-buffer. */ - u32 dy; /**< Y offset into the virtual frame-buffer. */ + u32 dx; /* X offset into the virtual frame-buffer. */ + u32 dy; /* Y offset into the virtual frame-buffer. */ u32 enabled; /* Not flags. Add new members for new flags. */ } __packed; #define VBVAMODEHINT_MAGIC 0x0801add9u -/** +/* * Report the rectangle relative to which absolute pointer events should be * expressed. This information remains valid until the next VBVA resize event * for any screen, at which time it is reset to the bounding rectangle of all * virtual screens and must be re-set. - * @see VBVA_REPORT_INPUT_MAPPING. */ struct vbva_report_input_mapping { - s32 x; /**< Upper left X co-ordinate relative to the first screen. */ - s32 y; /**< Upper left Y co-ordinate relative to the first screen. */ - u32 cx; /**< Rectangle width. */ - u32 cy; /**< Rectangle height. */ + s32 x; /* Upper left X co-ordinate relative to the first screen. */ + s32 y; /* Upper left Y co-ordinate relative to the first screen. */ + u32 cx; /* Rectangle width. */ + u32 cy; /* Rectangle height. */ } __packed; -/** +/* * Report the guest cursor position and query the host one. The host may wish * to use the guest information to re-position its own cursor (though this is * currently unlikely). - * @see VBVA_CURSOR_POSITION */ struct vbva_cursor_position { - u32 report_position; /**< Are we reporting a position? */ - u32 x; /**< Guest cursor X position */ - u32 y; /**< Guest cursor Y position */ + u32 report_position; /* Are we reporting a position? */ + u32 x; /* Guest cursor X position */ + u32 y; /* Guest cursor Y position */ } __packed; #endif diff --git a/drivers/staging/vboxvideo/vboxvideo_guest.h b/drivers/staging/vboxvideo/vboxvideo_guest.h index d09da841711a..55fcee3a6470 100644 --- a/drivers/staging/vboxvideo/vboxvideo_guest.h +++ b/drivers/staging/vboxvideo/vboxvideo_guest.h @@ -1,24 +1,5 @@ -/* - * Copyright (C) 2006-2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ +/* SPDX-License-Identifier: MIT */ +/* Copyright (C) 2006-2016 Oracle Corporation */ #ifndef __VBOXVIDEO_GUEST_H__ #define __VBOXVIDEO_GUEST_H__ @@ -26,30 +7,26 @@ #include <linux/genalloc.h> #include "vboxvideo.h" -/** +/* * Structure grouping the context needed for sending graphics acceleration * information to the host via VBVA. Each screen has its own VBVA buffer. */ struct vbva_buf_ctx { - /** Offset of the buffer in the VRAM section for the screen */ + /* Offset of the buffer in the VRAM section for the screen */ u32 buffer_offset; - /** Length of the buffer in bytes */ + /* Length of the buffer in bytes */ u32 buffer_length; - /** Set if we wrote to the buffer faster than the host could read it */ + /* Set if we wrote to the buffer faster than the host could read it */ bool buffer_overflow; - /** VBVA record that we are currently preparing for the host, or NULL */ + /* VBVA record that we are currently preparing for the host, or NULL */ struct vbva_record *record; - /** + /* * Pointer to the VBVA buffer mapped into the current address space. * Will be NULL if VBVA is not enabled. */ struct vbva_buffer *vbva; }; -/** - * @name Base HGSMI APIs - * @{ - */ int hgsmi_report_flags_location(struct gen_pool *ctx, u32 location); int hgsmi_send_caps_info(struct gen_pool *ctx, u32 caps); int hgsmi_test_query_conf(struct gen_pool *ctx); @@ -59,12 +36,7 @@ int hgsmi_update_pointer_shape(struct gen_pool *ctx, u32 flags, u8 *pixels, u32 len); int hgsmi_cursor_position(struct gen_pool *ctx, bool report_position, u32 x, u32 y, u32 *x_host, u32 *y_host); -/** @} */ -/** - * @name VBVA APIs - * @{ - */ bool vbva_enable(struct vbva_buf_ctx *vbva_ctx, struct gen_pool *ctx, struct vbva_buffer *vbva, s32 screen); void vbva_disable(struct vbva_buf_ctx *vbva_ctx, struct gen_pool *ctx, @@ -76,12 +48,7 @@ bool vbva_write(struct vbva_buf_ctx *vbva_ctx, struct gen_pool *ctx, const void *p, u32 len); void vbva_setup_buffer_context(struct vbva_buf_ctx *vbva_ctx, u32 buffer_offset, u32 buffer_length); -/** @} */ -/** - * @name Modesetting APIs - * @{ - */ void hgsmi_process_display_info(struct gen_pool *ctx, u32 display, s32 origin_x, s32 origin_y, u32 start_offset, u32 pitch, u32 width, u32 height, @@ -90,6 +57,5 @@ int hgsmi_update_input_mapping(struct gen_pool *ctx, s32 origin_x, s32 origin_y, u32 width, u32 height); int hgsmi_get_mode_hints(struct gen_pool *ctx, unsigned int screens, struct vbva_modehint *hints); -/** @} */ #endif diff --git a/drivers/staging/vboxvideo/vboxvideo_vbe.h b/drivers/staging/vboxvideo/vboxvideo_vbe.h index f842f4d9c80a..427235869297 100644 --- a/drivers/staging/vboxvideo/vboxvideo_vbe.h +++ b/drivers/staging/vboxvideo/vboxvideo_vbe.h @@ -1,35 +1,11 @@ -/* - * Copyright (C) 2006-2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ +/* SPDX-License-Identifier: MIT */ +/* Copyright (C) 2006-2016 Oracle Corporation */ #ifndef __VBOXVIDEO_VBE_H__ #define __VBOXVIDEO_VBE_H__ /* GUEST <-> HOST Communication API */ -/** - * @todo FIXME: Either dynamicly ask host for this or put somewhere high in - * physical memory like 0xE0000000. - */ - #define VBE_DISPI_BANK_ADDRESS 0xA0000 #define VBE_DISPI_BANK_SIZE_KB 64 @@ -71,12 +47,6 @@ #define VBE_DISPI_ENABLED 0x01 #define VBE_DISPI_GETCAPS 0x02 #define VBE_DISPI_8BIT_DAC 0x20 -/** - * @note this definition is a BOCHS legacy, used only in the video BIOS - * code and ignored by the emulated hardware. - */ -#define VBE_DISPI_LFB_ENABLED 0x40 -#define VBE_DISPI_NOCLEARMEM 0x80 #define VGA_PORT_HGSMI_HOST 0x3b0 #define VGA_PORT_HGSMI_GUEST 0x3d0 diff --git a/drivers/staging/vboxvideo/vbva_base.c b/drivers/staging/vboxvideo/vbva_base.c index c10c782f94e1..36bc9824ec3f 100644 --- a/drivers/staging/vboxvideo/vbva_base.c +++ b/drivers/staging/vboxvideo/vbva_base.c @@ -1,27 +1,8 @@ -/* - * Copyright (C) 2006-2017 Oracle Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ +// SPDX-License-Identifier: MIT +/* Copyright (C) 2006-2017 Oracle Corporation */ +#include <linux/vbox_err.h> #include "vbox_drv.h" -#include "vbox_err.h" #include "vboxvideo_guest.h" #include "hgsmi_channels.h" @@ -144,7 +125,7 @@ static bool vbva_inform_host(struct vbva_buf_ctx *vbva_ctx, hgsmi_buffer_submit(ctx, p); if (enable) - ret = RT_SUCCESS(p->base.result); + ret = p->base.result >= 0; else ret = true; diff --git a/drivers/staging/vc04_services/bcm2835-audio/Kconfig b/drivers/staging/vc04_services/bcm2835-audio/Kconfig index 9f536533c257..62c1c8ba4ad4 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/Kconfig +++ b/drivers/staging/vc04_services/bcm2835-audio/Kconfig @@ -1,6 +1,6 @@ config SND_BCM2835 tristate "BCM2835 Audio" - depends on ARCH_BCM2835 && SND + depends on (ARCH_BCM2835 || COMPILE_TEST) && SND select SND_PCM select BCM2835_VCHIQ help diff --git a/drivers/staging/vc04_services/bcm2835-audio/Makefile b/drivers/staging/vc04_services/bcm2835-audio/Makefile index d7b88d164d15..536bd0c11ddb 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/Makefile +++ b/drivers/staging/vc04_services/bcm2835-audio/Makefile @@ -1,5 +1,4 @@ obj-$(CONFIG_SND_BCM2835) += snd-bcm2835.o snd-bcm2835-objs := bcm2835.o bcm2835-ctl.o bcm2835-pcm.o bcm2835-vchiq.o -ccflags-y += -Idrivers/staging/vc04_services -D__VCCOREVER__=0x04000000 - +ccflags-y += -I $(srctree)/$(src)/.. -D__VCCOREVER__=0x04000000 diff --git a/drivers/staging/vc04_services/bcm2835-audio/TODO b/drivers/staging/vc04_services/bcm2835-audio/TODO index 73d41fa631ac..cb8ead3e9108 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/TODO +++ b/drivers/staging/vc04_services/bcm2835-audio/TODO @@ -4,26 +4,7 @@ * * ***************************************************************************** +1) Revisit multi-cards options and PCM route mixer control (as per comment +https://lkml.org/lkml/2018/9/8/200) -1) Document the device tree node - -The downstream tree(the tree that the driver was imported from) at -http://www.github.com/raspberrypi/linux uses this node: - -audio: audio { - compatible = "brcm,bcm2835-audio"; - brcm,pwm-channels = <8>; -}; - -Since the driver requires the use of VCHIQ, it may be useful to have a link -in the device tree to the VCHIQ driver. - -2) Gracefully handle the case where VCHIQ is missing from the device tree or -it has not been initialized yet. - -3) Review error handling and remove duplicate code. - -4) Cleanup the logging mechanism. The driver should probably be using the -standard kernel logging mechanisms such as dev_info, dev_dbg, and friends. - -5) Fix the remaining checkpatch.pl errors and warnings. +2) Fix the remaining checkpatch.pl errors and warnings. diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c index e66da11af5cf..bc1eaa3a0773 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c @@ -74,6 +74,7 @@ void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream, atomic_set(&alsa_stream->pos, pos); alsa_stream->period_offset += bytes; + alsa_stream->interpolate_start = ktime_get(); if (alsa_stream->period_offset >= alsa_stream->period_size) { alsa_stream->period_offset %= alsa_stream->period_size; snd_pcm_period_elapsed(substream); @@ -164,14 +165,11 @@ static int snd_bcm2835_playback_spdif_open(struct snd_pcm_substream *substream) return snd_bcm2835_playback_open_generic(substream, 1); } -/* close callback */ static int snd_bcm2835_playback_close(struct snd_pcm_substream *substream) { - /* the hardware-specific codes will be here */ - - struct bcm2835_chip *chip; - struct snd_pcm_runtime *runtime; struct bcm2835_alsa_stream *alsa_stream; + struct snd_pcm_runtime *runtime; + struct bcm2835_chip *chip; chip = snd_pcm_substream_chip(substream); mutex_lock(&chip->audio_mutex); @@ -195,20 +193,17 @@ static int snd_bcm2835_playback_close(struct snd_pcm_substream *substream) return 0; } -/* hw_params callback */ static int snd_bcm2835_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); } -/* hw_free callback */ static int snd_bcm2835_pcm_hw_free(struct snd_pcm_substream *substream) { return snd_pcm_lib_free_pages(substream); } -/* prepare callback */ static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream) { struct bcm2835_chip *chip = snd_pcm_substream_chip(substream); @@ -243,6 +238,7 @@ static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream) atomic_set(&alsa_stream->pos, 0); alsa_stream->period_offset = 0; alsa_stream->draining = false; + alsa_stream->interpolate_start = ktime_get(); return 0; } @@ -292,6 +288,24 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; + ktime_t now = ktime_get(); + + /* Give userspace better delay reporting by interpolating between GPU + * notifications, assuming audio speed is close enough to the clock + * used for ktime + */ + + if ((ktime_to_ns(alsa_stream->interpolate_start)) && + (ktime_compare(alsa_stream->interpolate_start, now) < 0)) { + u64 interval = + (ktime_to_ns(ktime_sub(now, + alsa_stream->interpolate_start))); + u64 frames_output_in_interval = + div_u64((interval * runtime->rate), 1000000000); + snd_pcm_sframes_t frames_output_in_interval_sized = + -frames_output_in_interval; + runtime->delay = frames_output_in_interval_sized; + } return snd_pcm_indirect_playback_pointer(substream, &alsa_stream->pcm_indirect, diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c index 781754f36da7..23fba01107b9 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c @@ -89,19 +89,14 @@ static int bcm2835_audio_send_simple(struct bcm2835_audio_instance *instance, return bcm2835_audio_send_msg(instance, &m, wait); } -static const u32 BCM2835_AUDIO_WRITE_COOKIE1 = ('B' << 24 | 'C' << 16 | - 'M' << 8 | 'A'); -static const u32 BCM2835_AUDIO_WRITE_COOKIE2 = ('D' << 24 | 'A' << 16 | - 'T' << 8 | 'A'); - static void audio_vchi_callback(void *param, const VCHI_CALLBACK_REASON_T reason, void *msg_handle) { struct bcm2835_audio_instance *instance = param; - int status; - int msg_len; struct vc_audio_msg m; + int msg_len; + int status; if (reason != VCHI_CALLBACK_MSG_AVAILABLE) return; @@ -109,15 +104,15 @@ static void audio_vchi_callback(void *param, status = vchi_msg_dequeue(instance->vchi_handle, &m, sizeof(m), &msg_len, VCHI_FLAGS_NONE); if (m.type == VC_AUDIO_MSG_TYPE_RESULT) { - instance->result = m.u.result.success; + instance->result = m.result.success; complete(&instance->msg_avail_comp); } else if (m.type == VC_AUDIO_MSG_TYPE_COMPLETE) { - if (m.u.complete.cookie1 != BCM2835_AUDIO_WRITE_COOKIE1 || - m.u.complete.cookie2 != BCM2835_AUDIO_WRITE_COOKIE2) + if (m.complete.cookie1 != VC_AUDIO_WRITE_COOKIE1 || + m.complete.cookie2 != VC_AUDIO_WRITE_COOKIE2) dev_err(instance->dev, "invalid cookie\n"); else bcm2835_playback_fifo(instance->alsa_stream, - m.u.complete.count); + m.complete.count); } else { dev_err(instance->dev, "unexpected callback type=%d\n", m.type); } @@ -127,7 +122,7 @@ static int vc_vchi_audio_init(VCHI_INSTANCE_T vchi_instance, struct bcm2835_audio_instance *instance) { - SERVICE_CREATION_T params = { + struct service_creation params = { .version = VCHI_VERSION_EX(VC_AUDIOSERV_VER, VC_AUDIOSERV_MIN_VER), .service_id = VC_AUDIO_SERVER_NAME, .callback = audio_vchi_callback, @@ -143,7 +138,6 @@ vc_vchi_audio_init(VCHI_INSTANCE_T vchi_instance, dev_err(instance->dev, "failed to open VCHI service connection (status=%d)\n", status); - kfree(instance); return -EPERM; } @@ -254,11 +248,11 @@ int bcm2835_audio_set_ctls(struct bcm2835_alsa_stream *alsa_stream) struct vc_audio_msg m = {}; m.type = VC_AUDIO_MSG_TYPE_CONTROL; - m.u.control.dest = chip->dest; + m.control.dest = chip->dest; if (!chip->mute) - m.u.control.volume = CHIP_MIN_VOLUME; + m.control.volume = CHIP_MIN_VOLUME; else - m.u.control.volume = alsa2chip(chip->volume); + m.control.volume = alsa2chip(chip->volume); return bcm2835_audio_send_msg(alsa_stream->instance, &m, true); } @@ -269,9 +263,9 @@ int bcm2835_audio_set_params(struct bcm2835_alsa_stream *alsa_stream, { struct vc_audio_msg m = { .type = VC_AUDIO_MSG_TYPE_CONFIG, - .u.config.channels = channels, - .u.config.samplerate = samplerate, - .u.config.bps = bps, + .config.channels = channels, + .config.samplerate = samplerate, + .config.bps = bps, }; int err; @@ -299,7 +293,7 @@ int bcm2835_audio_drain(struct bcm2835_alsa_stream *alsa_stream) { struct vc_audio_msg m = { .type = VC_AUDIO_MSG_TYPE_STOP, - .u.stop.draining = 1, + .stop.draining = 1, }; return bcm2835_audio_send_msg(alsa_stream->instance, &m, false); @@ -327,10 +321,10 @@ int bcm2835_audio_write(struct bcm2835_alsa_stream *alsa_stream, struct bcm2835_audio_instance *instance = alsa_stream->instance; struct vc_audio_msg m = { .type = VC_AUDIO_MSG_TYPE_WRITE, - .u.write.count = size, - .u.write.max_packet = instance->max_packet, - .u.write.cookie1 = BCM2835_AUDIO_WRITE_COOKIE1, - .u.write.cookie2 = BCM2835_AUDIO_WRITE_COOKIE2, + .write.count = size, + .write.max_packet = instance->max_packet, + .write.cookie1 = VC_AUDIO_WRITE_COOKIE1, + .write.cookie2 = VC_AUDIO_WRITE_COOKIE2, }; unsigned int count; int err, status; diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c index 87d56ab1ffa0..cf5f80f5ca6b 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c @@ -6,13 +6,13 @@ #include <linux/init.h> #include <linux/slab.h> #include <linux/module.h> -#include <linux/of.h> #include "bcm2835.h" static bool enable_hdmi; static bool enable_headphones; static bool enable_compat_alsa = true; +static int num_channels = MAX_SUBSTREAMS; module_param(enable_hdmi, bool, 0444); MODULE_PARM_DESC(enable_hdmi, "Enables HDMI virtual audio device"); @@ -21,6 +21,8 @@ MODULE_PARM_DESC(enable_headphones, "Enables Headphones virtual audio device"); module_param(enable_compat_alsa, bool, 0444); MODULE_PARM_DESC(enable_compat_alsa, "Enables ALSA compatibility virtual audio device"); +module_param(num_channels, int, 0644); +MODULE_PARM_DESC(num_channels, "Number of audio channels (default: 8)"); static void bcm2835_devm_free_vchi_ctx(struct device *dev, void *res) { @@ -39,8 +41,6 @@ static int bcm2835_devm_add_vchi_ctx(struct device *dev) if (!vchi_ctx) return -ENOMEM; - memset(vchi_ctx, 0, sizeof(*vchi_ctx)); - ret = bcm2835_new_vchi_ctx(dev, vchi_ctx); if (ret) { devres_free(vchi_ctx); @@ -163,8 +163,8 @@ static int snd_add_child_device(struct device *dev, struct bcm2835_audio_driver *audio_driver, u32 numchans) { - struct snd_card *card; struct bcm2835_chip *chip; + struct snd_card *card; int err; err = snd_card_new(dev, -1, NULL, THIS_MODULE, sizeof(*chip), &card); @@ -227,12 +227,12 @@ static int snd_add_child_device(struct device *dev, static int snd_add_child_devices(struct device *device, u32 numchans) { - int i; - int count_devices = 0; - int minchannels = 0; - int extrachannels = 0; int extrachannels_per_driver = 0; int extrachannels_remainder = 0; + int count_devices = 0; + int extrachannels = 0; + int minchannels = 0; + int i; for (i = 0; i < ARRAY_SIZE(children_devices); i++) if (*children_devices[i].is_enabled) @@ -260,9 +260,9 @@ static int snd_add_child_devices(struct device *device, u32 numchans) extrachannels_remainder); for (i = 0; i < ARRAY_SIZE(children_devices); i++) { - int err; - int numchannels_this_device; struct bcm2835_audio_driver *audio_driver; + int numchannels_this_device; + int err; if (!*children_devices[i].is_enabled) continue; @@ -293,31 +293,22 @@ static int snd_add_child_devices(struct device *device, u32 numchans) return 0; } -static int snd_bcm2835_alsa_probe_dt(struct platform_device *pdev) +static int snd_bcm2835_alsa_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - u32 numchans; int err; - err = of_property_read_u32(dev->of_node, "brcm,pwm-channels", - &numchans); - if (err) { - dev_err(dev, "Failed to get DT property 'brcm,pwm-channels'"); - return err; - } - - if (numchans == 0 || numchans > MAX_SUBSTREAMS) { - numchans = MAX_SUBSTREAMS; - dev_warn(dev, - "Illegal 'brcm,pwm-channels' value, will use %u\n", - numchans); + if (num_channels <= 0 || num_channels > MAX_SUBSTREAMS) { + num_channels = MAX_SUBSTREAMS; + dev_warn(dev, "Illegal num_channels value, will use %u\n", + num_channels); } err = bcm2835_devm_add_vchi_ctx(dev); if (err) return err; - err = snd_add_child_devices(dev, numchans); + err = snd_add_child_devices(dev, num_channels); if (err) return err; @@ -339,43 +330,19 @@ static int snd_bcm2835_alsa_resume(struct platform_device *pdev) #endif -static const struct of_device_id snd_bcm2835_of_match_table[] = { - { .compatible = "brcm,bcm2835-audio",}, - {}, -}; -MODULE_DEVICE_TABLE(of, snd_bcm2835_of_match_table); - -static struct platform_driver bcm2835_alsa0_driver = { - .probe = snd_bcm2835_alsa_probe_dt, +static struct platform_driver bcm2835_alsa_driver = { + .probe = snd_bcm2835_alsa_probe, #ifdef CONFIG_PM .suspend = snd_bcm2835_alsa_suspend, .resume = snd_bcm2835_alsa_resume, #endif .driver = { .name = "bcm2835_audio", - .of_match_table = snd_bcm2835_of_match_table, }, }; - -static int bcm2835_alsa_device_init(void) -{ - int retval; - - retval = platform_driver_register(&bcm2835_alsa0_driver); - if (retval) - pr_err("Error registering bcm2835_audio driver %d .\n", retval); - - return retval; -} - -static void bcm2835_alsa_device_exit(void) -{ - platform_driver_unregister(&bcm2835_alsa0_driver); -} - -late_initcall(bcm2835_alsa_device_init); -module_exit(bcm2835_alsa_device_exit); +module_platform_driver(bcm2835_alsa_driver); MODULE_AUTHOR("Dom Cobley"); MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:bcm2835_audio"); diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h index 34a0125ce646..ed0feb34b6c8 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h @@ -77,6 +77,7 @@ struct bcm2835_alsa_stream { unsigned int period_offset; unsigned int buffer_size; unsigned int period_size; + ktime_t interpolate_start; struct bcm2835_audio_instance *instance; int idx; diff --git a/drivers/staging/vc04_services/bcm2835-audio/vc_vchi_audioserv_defs.h b/drivers/staging/vc04_services/bcm2835-audio/vc_vchi_audioserv_defs.h index 1a7f0884ac9c..d6401e914ac9 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/vc_vchi_audioserv_defs.h +++ b/drivers/staging/vc04_services/bcm2835-audio/vc_vchi_audioserv_defs.h @@ -7,8 +7,10 @@ #define VC_AUDIOSERV_MIN_VER 1 #define VC_AUDIOSERV_VER 2 -/* FourCC code used for VCHI connection */ +/* FourCC codes used for VCHI communication */ #define VC_AUDIO_SERVER_NAME MAKE_FOURCC("AUDS") +#define VC_AUDIO_WRITE_COOKIE1 MAKE_FOURCC("BCMA") +#define VC_AUDIO_WRITE_COOKIE2 MAKE_FOURCC("DATA") /* * List of screens that are currently supported @@ -91,7 +93,7 @@ struct vc_audio_msg { struct vc_audio_write write; struct vc_audio_result result; struct vc_audio_complete complete; - } u; + }; }; #endif /* _VC_AUDIO_DEFS_H_ */ diff --git a/drivers/staging/vc04_services/bcm2835-camera/Makefile b/drivers/staging/vc04_services/bcm2835-camera/Makefile index 2a4565e682d8..472f21e1f2a1 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/Makefile +++ b/drivers/staging/vc04_services/bcm2835-camera/Makefile @@ -7,5 +7,5 @@ bcm2835-v4l2-$(CONFIG_VIDEO_BCM2835) := \ obj-$(CONFIG_VIDEO_BCM2835) += bcm2835-v4l2.o ccflags-y += \ - -Idrivers/staging/vc04_services \ + -I $(srctree)/$(src)/.. \ -D__VCCOREVER__=0x04000000 diff --git a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c index c04bdf070c87..7c6cf41645eb 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c @@ -43,11 +43,6 @@ #define MAX_BCM2835_CAMERAS 2 -MODULE_DESCRIPTION("Broadcom 2835 MMAL video capture"); -MODULE_AUTHOR("Vincent Sanders"); -MODULE_LICENSE("GPL"); -MODULE_VERSION(BM2835_MMAL_VERSION); - int bcm2835_v4l2_debug; module_param_named(debug, bcm2835_v4l2_debug, int, 0644); MODULE_PARM_DESC(bcm2835_v4l2_debug, "Debug level 0-2"); @@ -1375,10 +1370,6 @@ static int vidioc_g_parm(struct file *file, void *priv, return 0; } -#define FRACT_CMP(a, OP, b) \ - ((u64)(a).numerator * (b).denominator OP \ - (u64)(b).numerator * (a).denominator) - static int vidioc_s_parm(struct file *file, void *priv, struct v4l2_streamparm *parm) { @@ -1392,8 +1383,8 @@ static int vidioc_s_parm(struct file *file, void *priv, /* tpf: {*, 0} resets timing; clip to [min, max]*/ tpf = tpf.denominator ? tpf : tpf_default; - tpf = FRACT_CMP(tpf, <, tpf_min) ? tpf_min : tpf; - tpf = FRACT_CMP(tpf, >, tpf_max) ? tpf_max : tpf; + tpf = V4L2_FRACT_COMPARE(tpf, <, tpf_min) ? tpf_min : tpf; + tpf = V4L2_FRACT_COMPARE(tpf, >, tpf_max) ? tpf_max : tpf; dev->capture.timeperframe = tpf; parm->parm.capture.timeperframe = tpf; @@ -1544,8 +1535,11 @@ static int mmal_init(struct bm2835_mmal_dev *dev) struct vchiq_mmal_component *camera; ret = vchiq_mmal_init(&dev->instance); - if (ret < 0) + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: vchiq mmal init failed %d\n", + __func__, ret); return ret; + } /* get the camera component ready */ ret = vchiq_mmal_component_init(dev->instance, "ril.camera", @@ -1554,7 +1548,9 @@ static int mmal_init(struct bm2835_mmal_dev *dev) goto unreg_mmal; camera = dev->component[MMAL_COMPONENT_CAMERA]; - if (camera->outputs < MMAL_CAMERA_PORT_COUNT) { + if (camera->outputs < MMAL_CAMERA_PORT_COUNT) { + v4l2_err(&dev->v4l2_dev, "%s: too few camera outputs %d needed %d\n", + __func__, camera->outputs, MMAL_CAMERA_PORT_COUNT); ret = -EINVAL; goto unreg_camera; } @@ -1562,8 +1558,11 @@ static int mmal_init(struct bm2835_mmal_dev *dev) ret = set_camera_parameters(dev->instance, camera, dev); - if (ret < 0) + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: unable to set camera parameters: %d\n", + __func__, ret); goto unreg_camera; + } /* There was an error in the firmware that meant the camera component * produced BGR instead of RGB. @@ -1652,8 +1651,8 @@ static int mmal_init(struct bm2835_mmal_dev *dev) if (dev->component[MMAL_COMPONENT_PREVIEW]->inputs < 1) { ret = -EINVAL; - pr_debug("too few input ports %d needed %d\n", - dev->component[MMAL_COMPONENT_PREVIEW]->inputs, 1); + v4l2_err(&dev->v4l2_dev, "%s: too few input ports %d needed %d\n", + __func__, dev->component[MMAL_COMPONENT_PREVIEW]->inputs, 1); goto unreg_preview; } @@ -1666,8 +1665,8 @@ static int mmal_init(struct bm2835_mmal_dev *dev) if (dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs < 1) { ret = -EINVAL; - v4l2_err(&dev->v4l2_dev, "too few input ports %d needed %d\n", - dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs, + v4l2_err(&dev->v4l2_dev, "%s: too few input ports %d needed %d\n", + __func__, dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs, 1); goto unreg_image_encoder; } @@ -1681,8 +1680,8 @@ static int mmal_init(struct bm2835_mmal_dev *dev) if (dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs < 1) { ret = -EINVAL; - v4l2_err(&dev->v4l2_dev, "too few input ports %d needed %d\n", - dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs, + v4l2_err(&dev->v4l2_dev, "%s: too few input ports %d needed %d\n", + __func__, dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs, 1); goto unreg_vid_encoder; } @@ -1711,8 +1710,11 @@ static int mmal_init(struct bm2835_mmal_dev *dev) sizeof(enable)); } ret = bm2835_mmal_set_all_camera_controls(dev); - if (ret < 0) + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: failed to set all camera controls: %d\n", + __func__, ret); goto unreg_vid_encoder; + } return 0; @@ -1841,6 +1843,12 @@ static int bcm2835_mmal_probe(struct platform_device *pdev) num_cameras = get_num_cameras(instance, resolutions, MAX_BCM2835_CAMERAS); + + if (num_cameras < 1) { + ret = -ENODEV; + goto cleanup_mmal; + } + if (num_cameras > MAX_BCM2835_CAMERAS) num_cameras = MAX_BCM2835_CAMERAS; @@ -1872,21 +1880,29 @@ static int bcm2835_mmal_probe(struct platform_device *pdev) snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s", BM2835_MMAL_MODULE_NAME); ret = v4l2_device_register(NULL, &dev->v4l2_dev); - if (ret) + if (ret) { + dev_err(&pdev->dev, "%s: could not register V4L2 device: %d\n", + __func__, ret); goto free_dev; + } /* setup v4l controls */ ret = bm2835_mmal_init_controls(dev, &dev->ctrl_handler); - if (ret < 0) + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: could not init controls: %d\n", + __func__, ret); goto unreg_dev; + } dev->v4l2_dev.ctrl_handler = &dev->ctrl_handler; /* mmal init */ dev->instance = instance; ret = mmal_init(dev); - if (ret < 0) + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: mmal init failed: %d\n", + __func__, ret); goto unreg_dev; - + } /* initialize queue */ q = &dev->capture.vb_vidq; memset(q, 0, sizeof(*q)); @@ -1904,16 +1920,19 @@ static int bcm2835_mmal_probe(struct platform_device *pdev) /* initialise video devices */ ret = bm2835_mmal_init_device(dev, &dev->vdev); - if (ret < 0) + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: could not init device: %d\n", + __func__, ret); goto unreg_dev; + } /* Really want to call vidioc_s_fmt_vid_cap with the default * format, but currently the APIs don't join up. */ ret = mmal_setup_components(dev, &default_v4l2_format); if (ret < 0) { - v4l2_err(&dev->v4l2_dev, - "%s: could not setup components\n", __func__); + v4l2_err(&dev->v4l2_dev, "%s: could not setup components: %d\n", + __func__, ret); goto unreg_dev; } @@ -1937,8 +1956,9 @@ cleanup_gdev: bcm2835_cleanup_instance(gdev[i]); gdev[i] = NULL; } - pr_info("%s: error %d while loading driver\n", - BM2835_MMAL_MODULE_NAME, ret); + +cleanup_mmal: + vchiq_mmal_finalise(instance); return ret; } @@ -1966,3 +1986,9 @@ static struct platform_driver bcm2835_camera_driver = { }; module_platform_driver(bcm2835_camera_driver) + +MODULE_DESCRIPTION("Broadcom 2835 MMAL video capture"); +MODULE_AUTHOR("Vincent Sanders"); +MODULE_LICENSE("GPL"); +MODULE_VERSION(BM2835_MMAL_VERSION); +MODULE_ALIAS("platform:bcm2835-camera"); diff --git a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c index cc2d9933b969..16af735af5c3 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c @@ -139,7 +139,7 @@ struct mmal_msg_context { struct { /* message handle to release */ - VCHI_HELD_MSG_T msg_handle; + struct vchi_held_msg msg_handle; /* pointer to received message */ struct mmal_msg *msg; /* received message length */ @@ -527,7 +527,7 @@ static void service_callback(void *param, int status; u32 msg_len; struct mmal_msg *msg; - VCHI_HELD_MSG_T msg_handle; + struct vchi_held_msg msg_handle; struct mmal_msg_context *msg_context; if (!instance) { @@ -625,7 +625,7 @@ static int send_synchronous_mmal_msg(struct vchiq_mmal_instance *instance, struct mmal_msg *msg, unsigned int payload_len, struct mmal_msg **msg_out, - VCHI_HELD_MSG_T *msg_handle_out) + struct vchi_held_msg *msg_handle_out) { struct mmal_msg_context *msg_context; int ret; @@ -751,7 +751,7 @@ static int port_info_set(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; pr_debug("setting port info port %p\n", port); if (!port) @@ -812,7 +812,7 @@ static int port_info_get(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; /* port info time */ m.h.type = MMAL_MSG_TYPE_PORT_INFO_GET; @@ -908,7 +908,7 @@ static int create_component(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; /* build component create message */ m.h.type = MMAL_MSG_TYPE_COMPONENT_CREATE; @@ -955,7 +955,7 @@ static int destroy_component(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; m.h.type = MMAL_MSG_TYPE_COMPONENT_DESTROY; m.u.component_destroy.component_handle = component->handle; @@ -988,7 +988,7 @@ static int enable_component(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; m.h.type = MMAL_MSG_TYPE_COMPONENT_ENABLE; m.u.component_enable.component_handle = component->handle; @@ -1020,7 +1020,7 @@ static int disable_component(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; m.h.type = MMAL_MSG_TYPE_COMPONENT_DISABLE; m.u.component_disable.component_handle = component->handle; @@ -1053,7 +1053,7 @@ static int get_version(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; m.h.type = MMAL_MSG_TYPE_GET_VERSION; @@ -1086,7 +1086,7 @@ static int port_action_port(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; m.h.type = MMAL_MSG_TYPE_PORT_ACTION; m.u.port_action_port.component_handle = port->component->handle; @@ -1130,7 +1130,7 @@ static int port_action_handle(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; m.h.type = MMAL_MSG_TYPE_PORT_ACTION; @@ -1175,7 +1175,7 @@ static int port_parameter_set(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; m.h.type = MMAL_MSG_TYPE_PORT_PARAMETER_SET; @@ -1216,7 +1216,7 @@ static int port_parameter_get(struct vchiq_mmal_instance *instance, int ret; struct mmal_msg m; struct mmal_msg *rmsg; - VCHI_HELD_MSG_T rmsg_handle; + struct vchi_held_msg rmsg_handle; m.h.type = MMAL_MSG_TYPE_PORT_PARAMETER_GET; @@ -1623,8 +1623,11 @@ int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance, component = &instance->component[instance->component_idx]; ret = create_component(instance, component, name); - if (ret < 0) + if (ret < 0) { + pr_err("%s: failed to create component %d (Not enough GPU mem?)\n", + __func__, ret); goto unlock; + } /* ports info needs gathering */ component->control.type = MMAL_PORT_TYPE_CONTROL; @@ -1803,7 +1806,7 @@ int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance) int status; struct vchiq_mmal_instance *instance; static VCHI_INSTANCE_T vchi_instance; - SERVICE_CREATION_T params = { + struct service_creation params = { .version = VCHI_VERSION_EX(VC_MMAL_VER, VC_MMAL_MIN_VER), .service_id = VC_MMAL_SERVER_NAME, .callback = service_callback, diff --git a/drivers/staging/vc04_services/interface/vchi/TODO b/drivers/staging/vc04_services/interface/vchi/TODO index 0b3ec75ff627..fc2752bc95b2 100644 --- a/drivers/staging/vc04_services/interface/vchi/TODO +++ b/drivers/staging/vc04_services/interface/vchi/TODO @@ -49,3 +49,45 @@ such as dev_info, dev_dbg, and friends. A short top-down description of this driver's architecture (function of kthreads, userspace, limitations) could be very helpful for reviewers. + +7) Review and comment memory barriers + +There is a heavy use of memory barriers in this driver, it would be very +beneficial to go over all of them and, if correct, comment on their merits. +Extra points to whomever confidently reviews the remote_event_*() family of +functions. + +8) Get rid of custom function return values + +Most functions use a custom set of return values, we should force proper Linux +error numbers. Special care is needed for VCHIQ_RETRY. + +9) Reformat core code with more sane indentations + +The code follows the 80 characters limitation yet tends to go 3 or 4 levels of +indentation deep making it very unpleasant to read. This is specially relevant +in the character driver ioctl code and in the core thread functions. + +10) Reorganize file structure: Move char driver to it's own file and join both +platform files + +The cdev is defined alongside with the platform code in vchiq_arm.c. It would +be nice to completely decouple it from the actual core code. For instance to be +able to use bcm2835-audio without having /dev/vchiq created. One could argue +it's better for security reasons or general cleanliness. It could even be +interesting to create two different kernel modules, something the likes of +vchiq-core.ko and vchiq-dev.ko. This would also ease the upstreaming process. + +The code in vchiq_bcm2835_arm.c should fit in the generic platform file. + +12) Get rid of all the struct typedefs + +Most structs are typedefd, it's not encouraged in the kernel. + +13) Get rid of all non essential global structures and create a proper per +device structure + +The first thing one generally sees in a probe function is a memory allocation +for all the device specific data. This structure is then passed all over the +driver. This is good practice since it makes the driver work regardless of the +number of devices probed. diff --git a/drivers/staging/vc04_services/interface/vchi/vchi.h b/drivers/staging/vc04_services/interface/vchi/vchi.h index 01381904775d..0b6fc0d31f4c 100644 --- a/drivers/staging/vc04_services/interface/vchi/vchi.h +++ b/drivers/staging/vc04_services/interface/vchi/vchi.h @@ -36,7 +36,6 @@ #include "interface/vchi/vchi_cfg.h" #include "interface/vchi/vchi_common.h" -#include "vchi_mh.h" /****************************************************************************** Global defs @@ -67,18 +66,18 @@ struct opaque_vchi_service_t; // Descriptor for a held message. Allocated by client, initialised by vchi_msg_hold, // vchi_msg_iter_hold or vchi_msg_iter_hold_next. Fields are for internal VCHI use only. -typedef struct { +struct vchi_held_msg { struct opaque_vchi_service_t *service; void *message; -} VCHI_HELD_MSG_T; +}; // structure used to provide the information needed to open a server or a client -typedef struct { +struct service_creation { struct vchi_version version; int32_t service_id; VCHI_CALLBACK_T callback; void *callback_param; -} SERVICE_CREATION_T; +}; // Opaque handle for a VCHI instance typedef struct opaque_vchi_instance_handle_t *VCHI_INSTANCE_T; @@ -113,17 +112,12 @@ extern uint32_t vchi_current_time(VCHI_INSTANCE_T instance_handle); /****************************************************************************** Global service API *****************************************************************************/ -// Routine to create a named service -extern int32_t vchi_service_create(VCHI_INSTANCE_T instance_handle, - SERVICE_CREATION_T *setup, - VCHI_SERVICE_HANDLE_T *handle); - // Routine to destroy a service extern int32_t vchi_service_destroy(const VCHI_SERVICE_HANDLE_T handle); // Routine to open a named service extern int32_t vchi_service_open(VCHI_INSTANCE_T instance_handle, - SERVICE_CREATION_T *setup, + struct service_creation *setup, VCHI_SERVICE_HANDLE_T *handle); extern int32_t vchi_get_peer_version(const VCHI_SERVICE_HANDLE_T handle, @@ -182,11 +176,11 @@ extern int32_t vchi_msg_hold(VCHI_SERVICE_HANDLE_T handle, void **data, // } may be NULL, as info can be uint32_t *msg_size, // } obtained from HELD_MSG_T VCHI_FLAGS_T flags, - VCHI_HELD_MSG_T *message_descriptor); + struct vchi_held_msg *message_descriptor); // Initialise an iterator to look through messages in place extern int32_t vchi_msg_look_ahead(VCHI_SERVICE_HANDLE_T handle, - VCHI_MSG_ITER_T *iter, + struct vchi_msg_iter *iter, VCHI_FLAGS_T flags); /****************************************************************************** @@ -194,42 +188,42 @@ extern int32_t vchi_msg_look_ahead(VCHI_SERVICE_HANDLE_T handle, *****************************************************************************/ // Routine to get the address of a held message -extern void *vchi_held_msg_ptr(const VCHI_HELD_MSG_T *message); +extern void *vchi_held_msg_ptr(const struct vchi_held_msg *message); // Routine to get the size of a held message -extern int32_t vchi_held_msg_size(const VCHI_HELD_MSG_T *message); +extern int32_t vchi_held_msg_size(const struct vchi_held_msg *message); // Routine to get the transmit timestamp as written into the header by the peer -extern uint32_t vchi_held_msg_tx_timestamp(const VCHI_HELD_MSG_T *message); +extern uint32_t vchi_held_msg_tx_timestamp(const struct vchi_held_msg *message); // Routine to get the reception timestamp, written as we parsed the header -extern uint32_t vchi_held_msg_rx_timestamp(const VCHI_HELD_MSG_T *message); +extern uint32_t vchi_held_msg_rx_timestamp(const struct vchi_held_msg *message); // Routine to release a held message after it has been processed -extern int32_t vchi_held_msg_release(VCHI_HELD_MSG_T *message); +extern int32_t vchi_held_msg_release(struct vchi_held_msg *message); // Indicates whether the iterator has a next message. -extern int32_t vchi_msg_iter_has_next(const VCHI_MSG_ITER_T *iter); +extern int32_t vchi_msg_iter_has_next(const struct vchi_msg_iter *iter); // Return the pointer and length for the next message and advance the iterator. -extern int32_t vchi_msg_iter_next(VCHI_MSG_ITER_T *iter, +extern int32_t vchi_msg_iter_next(struct vchi_msg_iter *iter, void **data, uint32_t *msg_size); // Remove the last message returned by vchi_msg_iter_next. // Can only be called once after each call to vchi_msg_iter_next. -extern int32_t vchi_msg_iter_remove(VCHI_MSG_ITER_T *iter); +extern int32_t vchi_msg_iter_remove(struct vchi_msg_iter *iter); // Hold the last message returned by vchi_msg_iter_next. // Can only be called once after each call to vchi_msg_iter_next. -extern int32_t vchi_msg_iter_hold(VCHI_MSG_ITER_T *iter, - VCHI_HELD_MSG_T *message); +extern int32_t vchi_msg_iter_hold(struct vchi_msg_iter *iter, + struct vchi_held_msg *message); // Return information for the next message, and hold it, advancing the iterator. -extern int32_t vchi_msg_iter_hold_next(VCHI_MSG_ITER_T *iter, +extern int32_t vchi_msg_iter_hold_next(struct vchi_msg_iter *iter, void **data, // } may be NULL uint32_t *msg_size, // } - VCHI_HELD_MSG_T *message); + struct vchi_held_msg *message); /****************************************************************************** Global bulk API @@ -244,7 +238,6 @@ extern int32_t vchi_bulk_queue_receive(VCHI_SERVICE_HANDLE_T handle, // Prepare interface for a transfer from the other side into relocatable memory. int32_t vchi_bulk_queue_receive_reloc(const VCHI_SERVICE_HANDLE_T handle, - VCHI_MEM_HANDLE_T h_dst, uint32_t offset, uint32_t data_size, const VCHI_FLAGS_T flags, @@ -266,7 +259,6 @@ extern int32_t vchi_bulk_queue_transmit(VCHI_SERVICE_HANDLE_T handle, #endif extern int32_t vchi_bulk_queue_transmit_reloc(VCHI_SERVICE_HANDLE_T handle, - VCHI_MEM_HANDLE_T h_src, uint32_t offset, uint32_t data_size, VCHI_FLAGS_T flags, diff --git a/drivers/staging/vc04_services/interface/vchi/vchi_common.h b/drivers/staging/vc04_services/interface/vchi/vchi_common.h index 8eb2bb9f0fe2..35f331f80812 100644 --- a/drivers/staging/vc04_services/interface/vchi/vchi_common.h +++ b/drivers/staging/vc04_services/interface/vchi/vchi_common.h @@ -127,9 +127,9 @@ typedef void (*VCHI_CALLBACK_T)(void *callback_param, //my service local param * '-vec_len' elements. Thus to append a header onto an existing vector, * you can do this: * - * void foo(const VCHI_MSG_VECTOR_T *v, int n) + * void foo(const struct vchi_msg_vector *v, int n) * { - * VCHI_MSG_VECTOR_T nv[2]; + * struct vchi_msg_vector nv[2]; * nv[0].vec_base = my_header; * nv[0].vec_len = sizeof my_header; * nv[1].vec_base = v; @@ -137,10 +137,10 @@ typedef void (*VCHI_CALLBACK_T)(void *callback_param, //my service local param * ... * */ -typedef struct vchi_msg_vector { +struct vchi_msg_vector { const void *vec_base; int32_t vec_len; -} VCHI_MSG_VECTOR_T; +}; // Opaque type for a connection API typedef struct opaque_vchi_connection_api_t VCHI_CONNECTION_API_T; @@ -154,11 +154,11 @@ typedef struct opaque_vchi_message_driver_t VCHI_MESSAGE_DRIVER_T; // will not proceed to messages received since. Behaviour is undefined if an iterator // is used again after messages for that service are removed/dequeued by any // means other than vchi_msg_iter_... calls on the iterator itself. -typedef struct { +struct vchi_msg_iter { struct opaque_vchi_service_t *service; void *last; void *next; void *remove; -} VCHI_MSG_ITER_T; +}; #endif // VCHI_COMMON_H_ diff --git a/drivers/staging/vc04_services/interface/vchi/vchi_mh.h b/drivers/staging/vc04_services/interface/vchi/vchi_mh.h deleted file mode 100644 index 198bd076b666..000000000000 --- a/drivers/staging/vc04_services/interface/vchi/vchi_mh.h +++ /dev/null @@ -1,42 +0,0 @@ -/** - * Copyright (c) 2010-2012 Broadcom. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The names of the above-listed copyright holders may not be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2, as published by the Free - * Software Foundation. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS - * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef VCHI_MH_H_ -#define VCHI_MH_H_ - -#include <linux/types.h> - -typedef int32_t VCHI_MEM_HANDLE_T; -#define VCHI_MEM_HANDLE_INVALID 0 - -#endif diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c index 83d740feab96..dd4898861b83 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c @@ -48,7 +48,6 @@ #include "vchiq_arm.h" #include "vchiq_connected.h" -#include "vchiq_killable.h" #include "vchiq_pagelist.h" #define MAX_FRAGMENTS (VCHIQ_NUM_CURRENT_BULKS * 2) @@ -61,11 +60,11 @@ struct vchiq_2835_state { int inited; - VCHIQ_ARM_STATE_T arm_state; + struct vchiq_arm_state arm_state; }; struct vchiq_pagelist_info { - PAGELIST_T *pagelist; + struct pagelist *pagelist; size_t pagelist_buffer_size; dma_addr_t dma_addr; enum dma_data_direction dma_dir; @@ -106,12 +105,12 @@ static void free_pagelist(struct vchiq_pagelist_info *pagelistinfo, int actual); -int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state) +int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state) { struct device *dev = &pdev->dev; struct vchiq_drvdata *drvdata = platform_get_drvdata(pdev); struct rpi_firmware *fw = drvdata->fw; - VCHIQ_SLOT_ZERO_T *vchiq_slot_zero; + struct vchiq_slot_zero *vchiq_slot_zero; struct resource *res; void *slot_mem; dma_addr_t slot_phys; @@ -163,7 +162,7 @@ int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state) *(char **)&g_fragments_base[i * g_fragments_size] = NULL; sema_init(&g_free_fragments_sema, MAX_FRAGMENTS); - if (vchiq_init_state(state, vchiq_slot_zero, 0) != VCHIQ_SUCCESS) + if (vchiq_init_state(state, vchiq_slot_zero) != VCHIQ_SUCCESS) return -EINVAL; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -204,7 +203,7 @@ int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state) } VCHIQ_STATUS_T -vchiq_platform_init_state(VCHIQ_STATE_T *state) +vchiq_platform_init_state(struct vchiq_state *state) { VCHIQ_STATUS_T status = VCHIQ_SUCCESS; struct vchiq_2835_state *platform_state; @@ -221,8 +220,8 @@ vchiq_platform_init_state(VCHIQ_STATE_T *state) return status; } -VCHIQ_ARM_STATE_T* -vchiq_platform_get_arm_state(VCHIQ_STATE_T *state) +struct vchiq_arm_state* +vchiq_platform_get_arm_state(struct vchiq_state *state) { struct vchiq_2835_state *platform_state; @@ -234,7 +233,7 @@ vchiq_platform_get_arm_state(VCHIQ_STATE_T *state) } void -remote_event_signal(REMOTE_EVENT_T *event) +remote_event_signal(struct remote_event *event) { wmb(); @@ -247,13 +246,11 @@ remote_event_signal(REMOTE_EVENT_T *event) } VCHIQ_STATUS_T -vchiq_prepare_bulk_data(VCHIQ_BULK_T *bulk, VCHI_MEM_HANDLE_T memhandle, - void *offset, int size, int dir) +vchiq_prepare_bulk_data(struct vchiq_bulk *bulk, void *offset, int size, + int dir) { struct vchiq_pagelist_info *pagelistinfo; - WARN_ON(memhandle != VCHI_MEM_HANDLE_INVALID); - pagelistinfo = create_pagelist((char __user *)offset, size, (dir == VCHIQ_BULK_RECEIVE) ? PAGELIST_READ @@ -262,7 +259,6 @@ vchiq_prepare_bulk_data(VCHIQ_BULK_T *bulk, VCHI_MEM_HANDLE_T memhandle, if (!pagelistinfo) return VCHIQ_ERROR; - bulk->handle = memhandle; bulk->data = (void *)(unsigned long)pagelistinfo->dma_addr; /* @@ -275,7 +271,7 @@ vchiq_prepare_bulk_data(VCHIQ_BULK_T *bulk, VCHI_MEM_HANDLE_T memhandle, } void -vchiq_complete_bulk(VCHIQ_BULK_T *bulk) +vchiq_complete_bulk(struct vchiq_bulk *bulk) { if (bulk && bulk->remote_data && bulk->actual) free_pagelist((struct vchiq_pagelist_info *)bulk->remote_data, @@ -283,16 +279,6 @@ vchiq_complete_bulk(VCHIQ_BULK_T *bulk) } void -vchiq_transfer_bulk(VCHIQ_BULK_T *bulk) -{ - /* - * This should only be called on the master (VideoCore) side, but - * provide an implementation to avoid the need for ifdefery. - */ - BUG(); -} - -void vchiq_dump_platform_state(void *dump_context) { char buf[80]; @@ -304,29 +290,29 @@ vchiq_dump_platform_state(void *dump_context) } VCHIQ_STATUS_T -vchiq_platform_suspend(VCHIQ_STATE_T *state) +vchiq_platform_suspend(struct vchiq_state *state) { return VCHIQ_ERROR; } VCHIQ_STATUS_T -vchiq_platform_resume(VCHIQ_STATE_T *state) +vchiq_platform_resume(struct vchiq_state *state) { return VCHIQ_SUCCESS; } void -vchiq_platform_paused(VCHIQ_STATE_T *state) +vchiq_platform_paused(struct vchiq_state *state) { } void -vchiq_platform_resumed(VCHIQ_STATE_T *state) +vchiq_platform_resumed(struct vchiq_state *state) { } int -vchiq_platform_videocore_wanted(VCHIQ_STATE_T *state) +vchiq_platform_videocore_wanted(struct vchiq_state *state) { return 1; // autosuspend not supported - videocore always wanted } @@ -337,12 +323,12 @@ vchiq_platform_use_suspend_timer(void) return 0; } void -vchiq_dump_platform_use_state(VCHIQ_STATE_T *state) +vchiq_dump_platform_use_state(struct vchiq_state *state) { vchiq_log_info(vchiq_arm_log_level, "Suspend timer not in use"); } void -vchiq_platform_handle_timeout(VCHIQ_STATE_T *state) +vchiq_platform_handle_timeout(struct vchiq_state *state) { (void)state; } @@ -353,7 +339,7 @@ vchiq_platform_handle_timeout(VCHIQ_STATE_T *state) static irqreturn_t vchiq_doorbell_irq(int irq, void *dev_id) { - VCHIQ_STATE_T *state = dev_id; + struct vchiq_state *state = dev_id; irqreturn_t ret = IRQ_NONE; unsigned int status; @@ -398,7 +384,7 @@ cleanup_pagelistinfo(struct vchiq_pagelist_info *pagelistinfo) static struct vchiq_pagelist_info * create_pagelist(char __user *buf, size_t count, unsigned short type) { - PAGELIST_T *pagelist; + struct pagelist *pagelist; struct vchiq_pagelist_info *pagelistinfo; struct page **pages; u32 *addrs; @@ -412,7 +398,7 @@ create_pagelist(char __user *buf, size_t count, unsigned short type) offset = ((unsigned int)(unsigned long)buf & (PAGE_SIZE - 1)); num_pages = DIV_ROUND_UP(count + offset, PAGE_SIZE); - pagelist_size = sizeof(PAGELIST_T) + + pagelist_size = sizeof(struct pagelist) + (num_pages * sizeof(u32)) + (num_pages * sizeof(pages[0]) + (num_pages * sizeof(struct scatterlist))) + @@ -421,10 +407,8 @@ create_pagelist(char __user *buf, size_t count, unsigned short type) /* Allocate enough storage to hold the page pointers and the page * list */ - pagelist = dma_zalloc_coherent(g_dev, - pagelist_size, - &dma_addr, - GFP_KERNEL); + pagelist = dma_alloc_coherent(g_dev, pagelist_size, &dma_addr, + GFP_KERNEL); vchiq_log_trace(vchiq_arm_log_level, "%s - %pK", __func__, pagelist); @@ -557,7 +541,7 @@ create_pagelist(char __user *buf, size_t count, unsigned short type) (g_cache_line_size - 1)))) { char *fragments; - if (down_interruptible(&g_free_fragments_sema) != 0) { + if (down_killable(&g_free_fragments_sema)) { cleanup_pagelistinfo(pagelistinfo); return NULL; } @@ -580,8 +564,8 @@ static void free_pagelist(struct vchiq_pagelist_info *pagelistinfo, int actual) { - PAGELIST_T *pagelist = pagelistinfo->pagelist; - struct page **pages = pagelistinfo->pages; + struct pagelist *pagelist = pagelistinfo->pagelist; + struct page **pages = pagelistinfo->pages; unsigned int num_pages = pagelistinfo->num_pages; vchiq_log_trace(vchiq_arm_log_level, "%s - %pK, %d", diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c index 45de21c210c1..064d0db4c51e 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c @@ -44,18 +44,18 @@ #include <linux/highmem.h> #include <linux/pagemap.h> #include <linux/bug.h> -#include <linux/semaphore.h> +#include <linux/completion.h> #include <linux/list.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/compat.h> +#include <linux/dma-mapping.h> #include <soc/bcm2835/raspberrypi-firmware.h> #include "vchiq_core.h" #include "vchiq_ioctl.h" #include "vchiq_arm.h" #include "vchiq_debugfs.h" -#include "vchiq_killable.h" #define DEVICE_NAME "vchiq" @@ -63,8 +63,6 @@ #undef MODULE_PARAM_PREFIX #define MODULE_PARAM_PREFIX DEVICE_NAME "." -#define VCHIQ_MINOR 0 - /* Some per-instance constants */ #define MAX_COMPLETIONS 128 #define MAX_SERVICES 64 @@ -111,8 +109,8 @@ static const char *const resume_state_names[] = { static void suspend_timer_callback(struct timer_list *t); -typedef struct user_service_struct { - VCHIQ_SERVICE_T *service; +struct user_service { + struct vchiq_service *service; void *userdata; VCHIQ_INSTANCE_T instance; char is_vchi; @@ -121,11 +119,11 @@ typedef struct user_service_struct { int message_available_pos; int msg_insert; int msg_remove; - struct semaphore insert_event; - struct semaphore remove_event; - struct semaphore close_event; - VCHIQ_HEADER_T * msg_queue[MSG_QUEUE_SIZE]; -} USER_SERVICE_T; + struct completion insert_event; + struct completion remove_event; + struct completion close_event; + struct vchiq_header *msg_queue[MSG_QUEUE_SIZE]; +}; struct bulk_waiter_node { struct bulk_waiter bulk_waiter; @@ -134,12 +132,12 @@ struct bulk_waiter_node { }; struct vchiq_instance_struct { - VCHIQ_STATE_T *state; - VCHIQ_COMPLETION_DATA_T completions[MAX_COMPLETIONS]; + struct vchiq_state *state; + struct vchiq_completion_data completions[MAX_COMPLETIONS]; int completion_insert; int completion_remove; - struct semaphore insert_event; - struct semaphore remove_event; + struct completion insert_event; + struct completion remove_event; struct mutex completion_mutex; int connected; @@ -152,23 +150,23 @@ struct vchiq_instance_struct { struct list_head bulk_waiter_list; struct mutex bulk_waiter_list_mutex; - VCHIQ_DEBUGFS_NODE_T debugfs_node; + struct vchiq_debugfs_node debugfs_node; }; -typedef struct dump_context_struct { +struct dump_context { char __user *buf; size_t actual; size_t space; loff_t offset; -} DUMP_CONTEXT_T; +}; static struct cdev vchiq_cdev; static dev_t vchiq_devid; -static VCHIQ_STATE_T g_state; +static struct vchiq_state g_state; static struct class *vchiq_class; -static struct device *vchiq_dev; static DEFINE_SPINLOCK(msg_queue_spinlock); static struct platform_device *bcm2835_camera; +static struct platform_device *bcm2835_audio; static struct vchiq_drvdata bcm2835_drvdata = { .cache_line_size = 32, @@ -210,7 +208,7 @@ vchiq_blocking_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, void *data, VCHIQ_STATUS_T vchiq_initialise(VCHIQ_INSTANCE_T *instance_out) { VCHIQ_STATUS_T status = VCHIQ_ERROR; - VCHIQ_STATE_T *state; + struct vchiq_state *state; VCHIQ_INSTANCE_T instance = NULL; int i; @@ -263,7 +261,7 @@ EXPORT_SYMBOL(vchiq_initialise); VCHIQ_STATUS_T vchiq_shutdown(VCHIQ_INSTANCE_T instance) { VCHIQ_STATUS_T status; - VCHIQ_STATE_T *state = instance->state; + struct vchiq_state *state = instance->state; vchiq_log_trace(vchiq_core_log_level, "%s(%p) called", __func__, instance); @@ -280,16 +278,11 @@ VCHIQ_STATUS_T vchiq_shutdown(VCHIQ_INSTANCE_T instance) "%s(%p): returning %d", __func__, instance, status); if (status == VCHIQ_SUCCESS) { - struct list_head *pos, *next; + struct bulk_waiter_node *waiter, *next; - list_for_each_safe(pos, next, - &instance->bulk_waiter_list) { - struct bulk_waiter_node *waiter; - - waiter = list_entry(pos, - struct bulk_waiter_node, - list); - list_del(pos); + list_for_each_entry_safe(waiter, next, + &instance->bulk_waiter_list, list) { + list_del(&waiter->list); vchiq_log_info(vchiq_arm_log_level, "bulk_waiter - cleaned up %pK for pid %d", waiter, waiter->pid); @@ -310,7 +303,7 @@ static int vchiq_is_connected(VCHIQ_INSTANCE_T instance) VCHIQ_STATUS_T vchiq_connect(VCHIQ_INSTANCE_T instance) { VCHIQ_STATUS_T status; - VCHIQ_STATE_T *state = instance->state; + struct vchiq_state *state = instance->state; vchiq_log_trace(vchiq_core_log_level, "%s(%p) called", __func__, instance); @@ -338,12 +331,12 @@ EXPORT_SYMBOL(vchiq_connect); VCHIQ_STATUS_T vchiq_add_service( VCHIQ_INSTANCE_T instance, - const VCHIQ_SERVICE_PARAMS_T *params, + const struct vchiq_service_params *params, VCHIQ_SERVICE_HANDLE_T *phandle) { VCHIQ_STATUS_T status; - VCHIQ_STATE_T *state = instance->state; - VCHIQ_SERVICE_T *service = NULL; + struct vchiq_state *state = instance->state; + struct vchiq_service *service = NULL; int srvstate; vchiq_log_trace(vchiq_core_log_level, @@ -377,12 +370,12 @@ EXPORT_SYMBOL(vchiq_add_service); VCHIQ_STATUS_T vchiq_open_service( VCHIQ_INSTANCE_T instance, - const VCHIQ_SERVICE_PARAMS_T *params, + const struct vchiq_service_params *params, VCHIQ_SERVICE_HANDLE_T *phandle) { VCHIQ_STATUS_T status = VCHIQ_ERROR; - VCHIQ_STATE_T *state = instance->state; - VCHIQ_SERVICE_T *service = NULL; + struct vchiq_state *state = instance->state; + struct vchiq_service *service = NULL; vchiq_log_trace(vchiq_core_log_level, "%s(%p) called", __func__, instance); @@ -424,9 +417,9 @@ vchiq_bulk_transmit(VCHIQ_SERVICE_HANDLE_T handle, const void *data, switch (mode) { case VCHIQ_BULK_MODE_NOCALLBACK: case VCHIQ_BULK_MODE_CALLBACK: - status = vchiq_bulk_transfer(handle, - VCHI_MEM_HANDLE_INVALID, (void *)data, size, userdata, - mode, VCHIQ_BULK_TRANSMIT); + status = vchiq_bulk_transfer(handle, (void *)data, size, + userdata, mode, + VCHIQ_BULK_TRANSMIT); break; case VCHIQ_BULK_MODE_BLOCKING: status = vchiq_blocking_bulk_transfer(handle, @@ -449,9 +442,8 @@ vchiq_bulk_receive(VCHIQ_SERVICE_HANDLE_T handle, void *data, switch (mode) { case VCHIQ_BULK_MODE_NOCALLBACK: case VCHIQ_BULK_MODE_CALLBACK: - status = vchiq_bulk_transfer(handle, - VCHI_MEM_HANDLE_INVALID, data, size, userdata, - mode, VCHIQ_BULK_RECEIVE); + status = vchiq_bulk_transfer(handle, data, size, userdata, + mode, VCHIQ_BULK_RECEIVE); break; case VCHIQ_BULK_MODE_BLOCKING: status = vchiq_blocking_bulk_transfer(handle, @@ -470,10 +462,9 @@ vchiq_blocking_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, void *data, unsigned int size, VCHIQ_BULK_DIR_T dir) { VCHIQ_INSTANCE_T instance; - VCHIQ_SERVICE_T *service; + struct vchiq_service *service; VCHIQ_STATUS_T status; struct bulk_waiter_node *waiter = NULL; - struct list_head *pos; service = find_service_by_handle(handle); if (!service) @@ -484,20 +475,16 @@ vchiq_blocking_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, void *data, unlock_service(service); mutex_lock(&instance->bulk_waiter_list_mutex); - list_for_each(pos, &instance->bulk_waiter_list) { - if (list_entry(pos, struct bulk_waiter_node, - list)->pid == current->pid) { - waiter = list_entry(pos, - struct bulk_waiter_node, - list); - list_del(pos); + list_for_each_entry(waiter, &instance->bulk_waiter_list, list) { + if (waiter->pid == current->pid) { + list_del(&waiter->list); break; } } mutex_unlock(&instance->bulk_waiter_list_mutex); if (waiter) { - VCHIQ_BULK_T *bulk = waiter->bulk_waiter.bulk; + struct vchiq_bulk *bulk = waiter->bulk_waiter.bulk; if (bulk) { /* This thread has an outstanding bulk transfer. */ @@ -523,12 +510,11 @@ vchiq_blocking_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, void *data, } } - status = vchiq_bulk_transfer(handle, VCHI_MEM_HANDLE_INVALID, - data, size, &waiter->bulk_waiter, VCHIQ_BULK_MODE_BLOCKING, - dir); + status = vchiq_bulk_transfer(handle, data, size, &waiter->bulk_waiter, + VCHIQ_BULK_MODE_BLOCKING, dir); if ((status != VCHIQ_RETRY) || fatal_signal_pending(current) || !waiter->bulk_waiter.bulk) { - VCHIQ_BULK_T *bulk = waiter->bulk_waiter.bulk; + struct vchiq_bulk *bulk = waiter->bulk_waiter.bulk; if (bulk) { /* Cancel the signal when the transfer @@ -559,10 +545,10 @@ vchiq_blocking_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, void *data, static VCHIQ_STATUS_T add_completion(VCHIQ_INSTANCE_T instance, VCHIQ_REASON_T reason, - VCHIQ_HEADER_T *header, USER_SERVICE_T *user_service, - void *bulk_userdata) + struct vchiq_header *header, struct user_service *user_service, + void *bulk_userdata) { - VCHIQ_COMPLETION_DATA_T *completion; + struct vchiq_completion_data *completion; int insert; DEBUG_INITIALISE(g_state.local) @@ -574,7 +560,7 @@ add_completion(VCHIQ_INSTANCE_T instance, VCHIQ_REASON_T reason, vchiq_log_trace(vchiq_arm_log_level, "%s - completion queue full", __func__); DEBUG_COUNT(COMPLETION_QUEUE_FULL_COUNT); - if (down_interruptible(&instance->remove_event) != 0) { + if (wait_for_completion_killable( &instance->remove_event)) { vchiq_log_info(vchiq_arm_log_level, "service_callback interrupted"); return VCHIQ_RETRY; @@ -612,7 +598,7 @@ add_completion(VCHIQ_INSTANCE_T instance, VCHIQ_REASON_T reason, insert++; instance->completion_insert = insert; - up(&instance->insert_event); + complete(&instance->insert_event); return VCHIQ_SUCCESS; } @@ -624,16 +610,16 @@ add_completion(VCHIQ_INSTANCE_T instance, VCHIQ_REASON_T reason, ***************************************************************************/ static VCHIQ_STATUS_T -service_callback(VCHIQ_REASON_T reason, VCHIQ_HEADER_T *header, - VCHIQ_SERVICE_HANDLE_T handle, void *bulk_userdata) +service_callback(VCHIQ_REASON_T reason, struct vchiq_header *header, + VCHIQ_SERVICE_HANDLE_T handle, void *bulk_userdata) { /* How do we ensure the callback goes to the right client? - ** The service_user data points to a USER_SERVICE_T record containing - ** the original callback and the user state structure, which contains a - ** circular buffer for completion records. + ** The service_user data points to a user_service record + ** containing the original callback and the user state structure, which + ** contains a circular buffer for completion records. */ - USER_SERVICE_T *user_service; - VCHIQ_SERVICE_T *service; + struct user_service *user_service; + struct vchiq_service *service; VCHIQ_INSTANCE_T instance; bool skip_completion = false; @@ -643,7 +629,7 @@ service_callback(VCHIQ_REASON_T reason, VCHIQ_HEADER_T *header, service = handle_to_service(handle); BUG_ON(!service); - user_service = (USER_SERVICE_T *)service->base.userdata; + user_service = (struct user_service *)service->base.userdata; instance = user_service->instance; if (!instance || instance->closing) @@ -685,7 +671,8 @@ service_callback(VCHIQ_REASON_T reason, VCHIQ_HEADER_T *header, } DEBUG_TRACE(SERVICE_CALLBACK_LINE); - if (down_interruptible(&user_service->remove_event) + if (wait_for_completion_killable( + &user_service->remove_event) != 0) { vchiq_log_info(vchiq_arm_log_level, "%s interrupted", __func__); @@ -717,7 +704,7 @@ service_callback(VCHIQ_REASON_T reason, VCHIQ_HEADER_T *header, } spin_unlock(&msg_queue_spinlock); - up(&user_service->insert_event); + complete(&user_service->insert_event); header = NULL; } @@ -746,7 +733,7 @@ user_service_free(void *userdata) * close_delivered * ***************************************************************************/ -static void close_delivered(USER_SERVICE_T *user_service) +static void close_delivered(struct user_service *user_service) { vchiq_log_info(vchiq_arm_log_level, "%s(handle=%x)", @@ -757,81 +744,55 @@ static void close_delivered(USER_SERVICE_T *user_service) unlock_service(user_service->service); /* Wake the user-thread blocked in close_ or remove_service */ - up(&user_service->close_event); + complete(&user_service->close_event); user_service->close_pending = 0; } } struct vchiq_io_copy_callback_context { - struct vchiq_element *current_element; - size_t current_element_offset; + struct vchiq_element *element; + size_t element_offset; unsigned long elements_to_go; - size_t current_offset; }; -static ssize_t -vchiq_ioc_copy_element_data( - void *context, - void *dest, - size_t offset, - size_t maxsize) +static ssize_t vchiq_ioc_copy_element_data(void *context, void *dest, + size_t offset, size_t maxsize) { - long res; + struct vchiq_io_copy_callback_context *cc = context; + size_t total_bytes_copied = 0; size_t bytes_this_round; - struct vchiq_io_copy_callback_context *copy_context = - (struct vchiq_io_copy_callback_context *)context; - if (offset != copy_context->current_offset) - return 0; - - if (!copy_context->elements_to_go) - return 0; - - /* - * Complex logic here to handle the case of 0 size elements - * in the middle of the array of elements. - * - * Need to skip over these 0 size elements. - */ - while (1) { - bytes_this_round = min(copy_context->current_element->size - - copy_context->current_element_offset, - maxsize); + while (total_bytes_copied < maxsize) { + if (!cc->elements_to_go) + return total_bytes_copied; - if (bytes_this_round) - break; - - copy_context->elements_to_go--; - copy_context->current_element++; - copy_context->current_element_offset = 0; - - if (!copy_context->elements_to_go) - return 0; - } + if (!cc->element->size) { + cc->elements_to_go--; + cc->element++; + cc->element_offset = 0; + continue; + } - res = copy_from_user(dest, - copy_context->current_element->data + - copy_context->current_element_offset, - bytes_this_round); + bytes_this_round = min(cc->element->size - cc->element_offset, + maxsize - total_bytes_copied); - if (res != 0) - return -EFAULT; + if (copy_from_user(dest + total_bytes_copied, + cc->element->data + cc->element_offset, + bytes_this_round)) + return -EFAULT; - copy_context->current_element_offset += bytes_this_round; - copy_context->current_offset += bytes_this_round; + cc->element_offset += bytes_this_round; + total_bytes_copied += bytes_this_round; - /* - * Check if done with current element, and if so advance to the next. - */ - if (copy_context->current_element_offset == - copy_context->current_element->size) { - copy_context->elements_to_go--; - copy_context->current_element++; - copy_context->current_element_offset = 0; + if (cc->element_offset == cc->element->size) { + cc->elements_to_go--; + cc->element++; + cc->element_offset = 0; + } } - return bytes_this_round; + return maxsize; } /************************************************************************** @@ -848,10 +809,9 @@ vchiq_ioc_queue_message(VCHIQ_SERVICE_HANDLE_T handle, unsigned long i; size_t total_size = 0; - context.current_element = elements; - context.current_element_offset = 0; + context.element = elements; + context.element_offset = 0; context.elements_to_go = count; - context.current_offset = 0; for (i = 0; i < count; i++) { if (!elements[i].data && elements[i].size != 0) @@ -874,7 +834,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { VCHIQ_INSTANCE_T instance = file->private_data; VCHIQ_STATUS_T status = VCHIQ_SUCCESS; - VCHIQ_SERVICE_T *service = NULL; + struct vchiq_service *service = NULL; long ret = 0; int i, rc; @@ -906,7 +866,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) if (status == VCHIQ_SUCCESS) { /* Wake the completion thread and ask it to exit */ instance->closing = 1; - up(&instance->insert_event); + complete(&instance->insert_event); } break; @@ -936,8 +896,8 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) break; case VCHIQ_IOC_CREATE_SERVICE: { - VCHIQ_CREATE_SERVICE_T args; - USER_SERVICE_T *user_service = NULL; + struct vchiq_create_service args; + struct user_service *user_service = NULL; void *userdata; int srvstate; @@ -948,7 +908,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) break; } - user_service = kmalloc(sizeof(USER_SERVICE_T), GFP_KERNEL); + user_service = kmalloc(sizeof(*user_service), GFP_KERNEL); if (!user_service) { ret = -ENOMEM; break; @@ -987,9 +947,9 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) instance->completion_remove - 1; user_service->msg_insert = 0; user_service->msg_remove = 0; - sema_init(&user_service->insert_event, 0); - sema_init(&user_service->remove_event, 0); - sema_init(&user_service->close_event, 0); + init_completion(&user_service->insert_event); + init_completion(&user_service->remove_event); + init_completion(&user_service->close_event); if (args.is_open) { status = vchiq_open_service_internal @@ -1004,7 +964,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } if (copy_to_user((void __user *) - &(((VCHIQ_CREATE_SERVICE_T __user *) + &(((struct vchiq_create_service __user *) arg)->handle), (const void *)&service->handle, sizeof(service->handle)) != 0) { @@ -1019,55 +979,38 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } } break; - case VCHIQ_IOC_CLOSE_SERVICE: { + case VCHIQ_IOC_CLOSE_SERVICE: + case VCHIQ_IOC_REMOVE_SERVICE: { VCHIQ_SERVICE_HANDLE_T handle = (VCHIQ_SERVICE_HANDLE_T)arg; + struct user_service *user_service; service = find_service_for_instance(instance, handle); - if (service != NULL) { - USER_SERVICE_T *user_service = - (USER_SERVICE_T *)service->base.userdata; - /* close_pending is false on first entry, and when the - wait in vchiq_close_service has been interrupted. */ - if (!user_service->close_pending) { - status = vchiq_close_service(service->handle); - if (status != VCHIQ_SUCCESS) - break; - } - - /* close_pending is true once the underlying service - has been closed until the client library calls the - CLOSE_DELIVERED ioctl, signalling close_event. */ - if (user_service->close_pending && - down_interruptible(&user_service->close_event)) - status = VCHIQ_RETRY; - } else + if (!service) { ret = -EINVAL; - } break; + break; + } - case VCHIQ_IOC_REMOVE_SERVICE: { - VCHIQ_SERVICE_HANDLE_T handle = (VCHIQ_SERVICE_HANDLE_T)arg; + user_service = service->base.userdata; - service = find_service_for_instance(instance, handle); - if (service != NULL) { - USER_SERVICE_T *user_service = - (USER_SERVICE_T *)service->base.userdata; - /* close_pending is false on first entry, and when the - wait in vchiq_close_service has been interrupted. */ - if (!user_service->close_pending) { - status = vchiq_remove_service(service->handle); - if (status != VCHIQ_SUCCESS) - break; - } + /* close_pending is false on first entry, and when the + wait in vchiq_close_service has been interrupted. */ + if (!user_service->close_pending) { + status = (cmd == VCHIQ_IOC_CLOSE_SERVICE) ? + vchiq_close_service(service->handle) : + vchiq_remove_service(service->handle); + if (status != VCHIQ_SUCCESS) + break; + } - /* close_pending is true once the underlying service - has been closed until the client library calls the - CLOSE_DELIVERED ioctl, signalling close_event. */ - if (user_service->close_pending && - down_interruptible(&user_service->close_event)) - status = VCHIQ_RETRY; - } else - ret = -EINVAL; - } break; + /* close_pending is true once the underlying service + has been closed until the client library calls the + CLOSE_DELIVERED ioctl, signalling close_event. */ + if (user_service->close_pending && + wait_for_completion_killable( + &user_service->close_event)) + status = VCHIQ_RETRY; + break; + } case VCHIQ_IOC_USE_SERVICE: case VCHIQ_IOC_RELEASE_SERVICE: { @@ -1097,7 +1040,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } break; case VCHIQ_IOC_QUEUE_MESSAGE: { - VCHIQ_QUEUE_MESSAGE_T args; + struct vchiq_queue_message args; if (copy_from_user (&args, (const void __user *)arg, @@ -1126,7 +1069,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) case VCHIQ_IOC_QUEUE_BULK_TRANSMIT: case VCHIQ_IOC_QUEUE_BULK_RECEIVE: { - VCHIQ_QUEUE_BULK_TRANSFER_T args; + struct vchiq_queue_bulk_transfer args; struct bulk_waiter_node *waiter = NULL; VCHIQ_BULK_DIR_T dir = @@ -1153,21 +1096,16 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ret = -ENOMEM; break; } + args.userdata = &waiter->bulk_waiter; } else if (args.mode == VCHIQ_BULK_MODE_WAITING) { - struct list_head *pos; - mutex_lock(&instance->bulk_waiter_list_mutex); - list_for_each(pos, &instance->bulk_waiter_list) { - if (list_entry(pos, struct bulk_waiter_node, - list)->pid == current->pid) { - waiter = list_entry(pos, - struct bulk_waiter_node, - list); - list_del(pos); + list_for_each_entry(waiter, &instance->bulk_waiter_list, + list) { + if (waiter->pid == current->pid) { + list_del(&waiter->list); break; } - } mutex_unlock(&instance->bulk_waiter_list_mutex); if (!waiter) { @@ -1182,14 +1120,13 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) current->pid); args.userdata = &waiter->bulk_waiter; } - status = vchiq_bulk_transfer - (args.handle, - VCHI_MEM_HANDLE_INVALID, - args.data, args.size, - args.userdata, args.mode, - dir); + + status = vchiq_bulk_transfer(args.handle, args.data, args.size, + args.userdata, args.mode, dir); + if (!waiter) break; + if ((status != VCHIQ_RETRY) || fatal_signal_pending(current) || !waiter->bulk_waiter.bulk) { if (waiter->bulk_waiter.bulk) { @@ -1212,7 +1149,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) waiter, current->pid); if (copy_to_user((void __user *) - &(((VCHIQ_QUEUE_BULK_TRANSFER_T __user *) + &(((struct vchiq_queue_bulk_transfer __user *) arg)->mode), (const void *)&mode_waiting, sizeof(mode_waiting)) != 0) @@ -1221,7 +1158,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } break; case VCHIQ_IOC_AWAIT_COMPLETION: { - VCHIQ_AWAIT_COMPLETION_T args; + struct vchiq_await_completion args; DEBUG_TRACE(AWAIT_COMPLETION_LINE); if (!instance->connected) { @@ -1245,7 +1182,8 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) DEBUG_TRACE(AWAIT_COMPLETION_LINE); mutex_unlock(&instance->completion_mutex); - rc = down_interruptible(&instance->insert_event); + rc = wait_for_completion_killable( + &instance->insert_event); mutex_lock(&instance->completion_mutex); if (rc != 0) { DEBUG_TRACE(AWAIT_COMPLETION_LINE); @@ -1262,10 +1200,10 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) int remove = instance->completion_remove; for (ret = 0; ret < args.count; ret++) { - VCHIQ_COMPLETION_DATA_T *completion; - VCHIQ_SERVICE_T *service; - USER_SERVICE_T *user_service; - VCHIQ_HEADER_T *header; + struct vchiq_completion_data *completion; + struct vchiq_service *service; + struct user_service *user_service; + struct vchiq_header *header; if (remove == instance->completion_insert) break; @@ -1290,7 +1228,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) int msglen; msglen = header->size + - sizeof(VCHIQ_HEADER_T); + sizeof(struct vchiq_header); /* This must be a VCHIQ-style service */ if (args.msgbufsize < msglen) { vchiq_log_error( @@ -1343,10 +1281,11 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) unlock_service(service); if (copy_to_user((void __user *)( - (size_t)args.buf + - ret * sizeof(VCHIQ_COMPLETION_DATA_T)), + (size_t)args.buf + ret * + sizeof(struct vchiq_completion_data)), completion, - sizeof(VCHIQ_COMPLETION_DATA_T)) != 0) { + sizeof(struct vchiq_completion_data)) + != 0) { if (ret == 0) ret = -EFAULT; break; @@ -1363,8 +1302,8 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) if (msgbufcount != args.msgbufcount) { if (copy_to_user((void __user *) - &((VCHIQ_AWAIT_COMPLETION_T *)arg)-> - msgbufcount, + &((struct vchiq_await_completion *)arg) + ->msgbufcount, &msgbufcount, sizeof(msgbufcount)) != 0) { ret = -EFAULT; @@ -1373,15 +1312,15 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } if (ret != 0) - up(&instance->remove_event); + complete(&instance->remove_event); mutex_unlock(&instance->completion_mutex); DEBUG_TRACE(AWAIT_COMPLETION_LINE); } break; case VCHIQ_IOC_DEQUEUE_MESSAGE: { - VCHIQ_DEQUEUE_MESSAGE_T args; - USER_SERVICE_T *user_service; - VCHIQ_HEADER_T *header; + struct vchiq_dequeue_message args; + struct user_service *user_service; + struct vchiq_header *header; DEBUG_TRACE(DEQUEUE_MESSAGE_LINE); if (copy_from_user @@ -1395,7 +1334,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ret = -EINVAL; break; } - user_service = (USER_SERVICE_T *)service->base.userdata; + user_service = (struct user_service *)service->base.userdata; if (user_service->is_vchi == 0) { ret = -EINVAL; break; @@ -1413,8 +1352,8 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) do { spin_unlock(&msg_queue_spinlock); DEBUG_TRACE(DEQUEUE_MESSAGE_LINE); - if (down_interruptible( - &user_service->insert_event) != 0) { + if (wait_for_completion_killable( + &user_service->insert_event)) { vchiq_log_info(vchiq_arm_log_level, "DEQUEUE_MESSAGE interrupted"); ret = -EINTR; @@ -1436,7 +1375,7 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) user_service->msg_remove++; spin_unlock(&msg_queue_spinlock); - up(&user_service->remove_event); + complete(&user_service->remove_event); if (header == NULL) ret = -ENOTCONN; else if (header->size <= args.bufsize) { @@ -1468,8 +1407,8 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } break; case VCHIQ_IOC_GET_CONFIG: { - VCHIQ_GET_CONFIG_T args; - VCHIQ_CONFIG_T config; + struct vchiq_get_config args; + struct vchiq_config config; if (copy_from_user(&args, (const void __user *)arg, sizeof(args)) != 0) { @@ -1480,18 +1419,16 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ret = -EINVAL; break; } - status = vchiq_get_config(instance, args.config_size, &config); - if (status == VCHIQ_SUCCESS) { - if (copy_to_user((void __user *)args.pconfig, - &config, args.config_size) != 0) { - ret = -EFAULT; - break; - } + + vchiq_get_config(&config); + if (copy_to_user(args.pconfig, &config, args.config_size)) { + ret = -EFAULT; + break; } } break; case VCHIQ_IOC_SET_SERVICE_OPTION: { - VCHIQ_SET_SERVICE_OPTION_T args; + struct vchiq_set_service_option args; if (copy_from_user( &args, (const void __user *)arg, @@ -1524,8 +1461,8 @@ vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) service = find_closed_service_for_instance(instance, handle); if (service != NULL) { - USER_SERVICE_T *user_service = - (USER_SERVICE_T *)service->base.userdata; + struct user_service *user_service = + (struct user_service *)service->base.userdata; close_delivered(user_service); } else ret = -EINVAL; @@ -1593,7 +1530,7 @@ vchiq_compat_ioctl_create_service( unsigned int cmd, unsigned long arg) { - VCHIQ_CREATE_SERVICE_T __user *args; + struct vchiq_create_service __user *args; struct vchiq_create_service32 __user *ptrargs32 = (struct vchiq_create_service32 __user *)arg; struct vchiq_create_service32 args32; @@ -1656,8 +1593,8 @@ vchiq_compat_ioctl_queue_message(struct file *file, unsigned int cmd, unsigned long arg) { - VCHIQ_QUEUE_MESSAGE_T *args; - struct vchiq_element *elements; + struct vchiq_queue_message *args; + struct vchiq_element __user *elements; struct vchiq_queue_message32 args32; unsigned int count; @@ -1723,7 +1660,7 @@ vchiq_compat_ioctl_queue_bulk(struct file *file, unsigned int cmd, unsigned long arg) { - VCHIQ_QUEUE_BULK_TRANSFER_T *args; + struct vchiq_queue_bulk_transfer __user *args; struct vchiq_queue_bulk_transfer32 args32; struct vchiq_queue_bulk_transfer32 *ptrargs32 = (struct vchiq_queue_bulk_transfer32 *)arg; @@ -1789,16 +1726,16 @@ vchiq_compat_ioctl_await_completion(struct file *file, unsigned int cmd, unsigned long arg) { - VCHIQ_AWAIT_COMPLETION_T *args; - VCHIQ_COMPLETION_DATA_T *completion; - VCHIQ_COMPLETION_DATA_T completiontemp; + struct vchiq_await_completion __user *args; + struct vchiq_completion_data __user *completion; + struct vchiq_completion_data completiontemp; struct vchiq_await_completion32 args32; struct vchiq_completion_data32 completion32; - unsigned int *msgbufcount32; + unsigned int __user *msgbufcount32; unsigned int msgbufcount_native; compat_uptr_t msgbuf32; - void *msgbuf; - void **msgbufptr; + void __user *msgbuf; + void * __user *msgbufptr; long ret; args = compat_alloc_user_space(sizeof(*args) + @@ -1807,11 +1744,11 @@ vchiq_compat_ioctl_await_completion(struct file *file, if (!args) return -EFAULT; - completion = (VCHIQ_COMPLETION_DATA_T *)(args + 1); - msgbufptr = (void __user **)(completion + 1); + completion = (struct vchiq_completion_data __user *)(args + 1); + msgbufptr = (void * __user *)(completion + 1); if (copy_from_user(&args32, - (struct vchiq_completion_data32 *)arg, + (struct vchiq_completion_data32 __user *)arg, sizeof(args32))) return -EFAULT; @@ -1939,7 +1876,7 @@ vchiq_compat_ioctl_dequeue_message(struct file *file, unsigned int cmd, unsigned long arg) { - VCHIQ_DEQUEUE_MESSAGE_T *args; + struct vchiq_dequeue_message __user *args; struct vchiq_dequeue_message32 args32; args = compat_alloc_user_space(sizeof(*args)); @@ -1947,7 +1884,7 @@ vchiq_compat_ioctl_dequeue_message(struct file *file, return -EFAULT; if (copy_from_user(&args32, - (struct vchiq_dequeue_message32 *)arg, + (struct vchiq_dequeue_message32 __user *)arg, sizeof(args32))) return -EFAULT; @@ -1974,7 +1911,7 @@ vchiq_compat_ioctl_get_config(struct file *file, unsigned int cmd, unsigned long arg) { - VCHIQ_GET_CONFIG_T *args; + struct vchiq_get_config __user *args; struct vchiq_get_config32 args32; args = compat_alloc_user_space(sizeof(*args)); @@ -1982,7 +1919,7 @@ vchiq_compat_ioctl_get_config(struct file *file, return -EFAULT; if (copy_from_user(&args32, - (struct vchiq_get_config32 *)arg, + (struct vchiq_get_config32 __user *)arg, sizeof(args32))) return -EFAULT; @@ -2017,201 +1954,152 @@ vchiq_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) #endif -/**************************************************************************** -* -* vchiq_open -* -***************************************************************************/ - -static int -vchiq_open(struct inode *inode, struct file *file) +static int vchiq_open(struct inode *inode, struct file *file) { - int dev = iminor(inode) & 0x0f; + struct vchiq_state *state = vchiq_get_state(); + VCHIQ_INSTANCE_T instance; vchiq_log_info(vchiq_arm_log_level, "vchiq_open"); - switch (dev) { - case VCHIQ_MINOR: { - VCHIQ_STATE_T *state = vchiq_get_state(); - VCHIQ_INSTANCE_T instance; - if (!state) { - vchiq_log_error(vchiq_arm_log_level, + if (!state) { + vchiq_log_error(vchiq_arm_log_level, "vchiq has no connection to VideoCore"); - return -ENOTCONN; - } - - instance = kzalloc(sizeof(*instance), GFP_KERNEL); - if (!instance) - return -ENOMEM; + return -ENOTCONN; + } - instance->state = state; - instance->pid = current->tgid; + instance = kzalloc(sizeof(*instance), GFP_KERNEL); + if (!instance) + return -ENOMEM; - vchiq_debugfs_add_instance(instance); + instance->state = state; + instance->pid = current->tgid; - sema_init(&instance->insert_event, 0); - sema_init(&instance->remove_event, 0); - mutex_init(&instance->completion_mutex); - mutex_init(&instance->bulk_waiter_list_mutex); - INIT_LIST_HEAD(&instance->bulk_waiter_list); + vchiq_debugfs_add_instance(instance); - file->private_data = instance; - } break; + init_completion(&instance->insert_event); + init_completion(&instance->remove_event); + mutex_init(&instance->completion_mutex); + mutex_init(&instance->bulk_waiter_list_mutex); + INIT_LIST_HEAD(&instance->bulk_waiter_list); - default: - vchiq_log_error(vchiq_arm_log_level, - "Unknown minor device: %d", dev); - return -ENXIO; - } + file->private_data = instance; return 0; } -/**************************************************************************** -* -* vchiq_release -* -***************************************************************************/ - -static int -vchiq_release(struct inode *inode, struct file *file) +static int vchiq_release(struct inode *inode, struct file *file) { - int dev = iminor(inode) & 0x0f; + VCHIQ_INSTANCE_T instance = file->private_data; + struct vchiq_state *state = vchiq_get_state(); + struct vchiq_service *service; int ret = 0; + int i; - switch (dev) { - case VCHIQ_MINOR: { - VCHIQ_INSTANCE_T instance = file->private_data; - VCHIQ_STATE_T *state = vchiq_get_state(); - VCHIQ_SERVICE_T *service; - int i; - - vchiq_log_info(vchiq_arm_log_level, - "%s: instance=%lx", - __func__, (unsigned long)instance); + vchiq_log_info(vchiq_arm_log_level, "%s: instance=%lx", __func__, + (unsigned long)instance); - if (!state) { - ret = -EPERM; - goto out; - } + if (!state) { + ret = -EPERM; + goto out; + } - /* Ensure videocore is awake to allow termination. */ - vchiq_use_internal(instance->state, NULL, - USE_TYPE_VCHIQ); + /* Ensure videocore is awake to allow termination. */ + vchiq_use_internal(instance->state, NULL, USE_TYPE_VCHIQ); - mutex_lock(&instance->completion_mutex); + mutex_lock(&instance->completion_mutex); - /* Wake the completion thread and ask it to exit */ - instance->closing = 1; - up(&instance->insert_event); + /* Wake the completion thread and ask it to exit */ + instance->closing = 1; + complete(&instance->insert_event); - mutex_unlock(&instance->completion_mutex); + mutex_unlock(&instance->completion_mutex); - /* Wake the slot handler if the completion queue is full. */ - up(&instance->remove_event); + /* Wake the slot handler if the completion queue is full. */ + complete(&instance->remove_event); - /* Mark all services for termination... */ - i = 0; - while ((service = next_service_by_instance(state, instance, - &i)) != NULL) { - USER_SERVICE_T *user_service = service->base.userdata; + /* Mark all services for termination... */ + i = 0; + while ((service = next_service_by_instance(state, instance, &i))) { + struct user_service *user_service = service->base.userdata; - /* Wake the slot handler if the msg queue is full. */ - up(&user_service->remove_event); + /* Wake the slot handler if the msg queue is full. */ + complete(&user_service->remove_event); - vchiq_terminate_service_internal(service); - unlock_service(service); - } + vchiq_terminate_service_internal(service); + unlock_service(service); + } - /* ...and wait for them to die */ - i = 0; - while ((service = next_service_by_instance(state, instance, &i)) - != NULL) { - USER_SERVICE_T *user_service = service->base.userdata; + /* ...and wait for them to die */ + i = 0; + while ((service = next_service_by_instance(state, instance, &i))) { + struct user_service *user_service = service->base.userdata; - down(&service->remove_event); + wait_for_completion(&service->remove_event); - BUG_ON(service->srvstate != VCHIQ_SRVSTATE_FREE); + BUG_ON(service->srvstate != VCHIQ_SRVSTATE_FREE); - spin_lock(&msg_queue_spinlock); - - while (user_service->msg_remove != - user_service->msg_insert) { - VCHIQ_HEADER_T *header; - int m = user_service->msg_remove & - (MSG_QUEUE_SIZE - 1); + spin_lock(&msg_queue_spinlock); - header = user_service->msg_queue[m]; - user_service->msg_remove++; - spin_unlock(&msg_queue_spinlock); - - if (header) - vchiq_release_message( - service->handle, - header); - spin_lock(&msg_queue_spinlock); - } + while (user_service->msg_remove != user_service->msg_insert) { + struct vchiq_header *header; + int m = user_service->msg_remove & (MSG_QUEUE_SIZE - 1); + header = user_service->msg_queue[m]; + user_service->msg_remove++; spin_unlock(&msg_queue_spinlock); - unlock_service(service); + if (header) + vchiq_release_message(service->handle, header); + spin_lock(&msg_queue_spinlock); } - /* Release any closed services */ - while (instance->completion_remove != - instance->completion_insert) { - VCHIQ_COMPLETION_DATA_T *completion; - VCHIQ_SERVICE_T *service; - - completion = &instance->completions[ - instance->completion_remove & - (MAX_COMPLETIONS - 1)]; - service = completion->service_userdata; - if (completion->reason == VCHIQ_SERVICE_CLOSED) { - USER_SERVICE_T *user_service = - service->base.userdata; - - /* Wake any blocked user-thread */ - if (instance->use_close_delivered) - up(&user_service->close_event); - unlock_service(service); - } - instance->completion_remove++; - } + spin_unlock(&msg_queue_spinlock); - /* Release the PEER service count. */ - vchiq_release_internal(instance->state, NULL); + unlock_service(service); + } - { - struct list_head *pos, *next; + /* Release any closed services */ + while (instance->completion_remove != + instance->completion_insert) { + struct vchiq_completion_data *completion; + struct vchiq_service *service; - list_for_each_safe(pos, next, - &instance->bulk_waiter_list) { - struct bulk_waiter_node *waiter; + completion = &instance->completions[ + instance->completion_remove & (MAX_COMPLETIONS - 1)]; + service = completion->service_userdata; + if (completion->reason == VCHIQ_SERVICE_CLOSED) { + struct user_service *user_service = + service->base.userdata; - waiter = list_entry(pos, - struct bulk_waiter_node, - list); - list_del(pos); - vchiq_log_info(vchiq_arm_log_level, - "bulk_waiter - cleaned up %pK for pid %d", - waiter, waiter->pid); - kfree(waiter); - } + /* Wake any blocked user-thread */ + if (instance->use_close_delivered) + complete(&user_service->close_event); + unlock_service(service); } + instance->completion_remove++; + } - vchiq_debugfs_remove_instance(instance); + /* Release the PEER service count. */ + vchiq_release_internal(instance->state, NULL); - kfree(instance); - file->private_data = NULL; - } break; + { + struct bulk_waiter_node *waiter, *next; - default: - vchiq_log_error(vchiq_arm_log_level, - "Unknown minor device: %d", dev); - ret = -ENXIO; + list_for_each_entry_safe(waiter, next, + &instance->bulk_waiter_list, list) { + list_del(&waiter->list); + vchiq_log_info(vchiq_arm_log_level, + "bulk_waiter - cleaned up %pK for pid %d", + waiter, waiter->pid); + kfree(waiter); + } } + vchiq_debugfs_remove_instance(instance); + + kfree(instance); + file->private_data = NULL; + out: return ret; } @@ -2225,7 +2113,7 @@ out: void vchiq_dump(void *dump_context, const char *str, int len) { - DUMP_CONTEXT_T *context = (DUMP_CONTEXT_T *)dump_context; + struct dump_context *context = (struct dump_context *)dump_context; if (context->actual < context->space) { int copy_bytes; @@ -2270,7 +2158,7 @@ vchiq_dump(void *dump_context, const char *str, int len) void vchiq_dump_platform_instances(void *dump_context) { - VCHIQ_STATE_T *state = vchiq_get_state(); + struct vchiq_state *state = vchiq_get_state(); char buf[80]; int len; int i; @@ -2279,7 +2167,7 @@ vchiq_dump_platform_instances(void *dump_context) marking those that have been dumped. */ for (i = 0; i < state->unused_service; i++) { - VCHIQ_SERVICE_T *service = state->services[i]; + struct vchiq_service *service = state->services[i]; VCHIQ_INSTANCE_T instance; if (service && (service->base.callback == service_callback)) { @@ -2290,7 +2178,7 @@ vchiq_dump_platform_instances(void *dump_context) } for (i = 0; i < state->unused_service; i++) { - VCHIQ_SERVICE_T *service = state->services[i]; + struct vchiq_service *service = state->services[i]; VCHIQ_INSTANCE_T instance; if (service && (service->base.callback == service_callback)) { @@ -2320,9 +2208,11 @@ vchiq_dump_platform_instances(void *dump_context) ***************************************************************************/ void -vchiq_dump_platform_service_state(void *dump_context, VCHIQ_SERVICE_T *service) +vchiq_dump_platform_service_state(void *dump_context, + struct vchiq_service *service) { - USER_SERVICE_T *user_service = (USER_SERVICE_T *)service->base.userdata; + struct user_service *user_service = + (struct user_service *)service->base.userdata; char buf[80]; int len; @@ -2353,7 +2243,7 @@ static ssize_t vchiq_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) { - DUMP_CONTEXT_T context; + struct dump_context context; context.buf = buf; context.actual = 0; @@ -2367,7 +2257,7 @@ vchiq_read(struct file *file, char __user *buf, return context.actual; } -VCHIQ_STATE_T * +struct vchiq_state * vchiq_get_state(void) { @@ -2398,9 +2288,9 @@ vchiq_fops = { */ int -vchiq_videocore_wanted(VCHIQ_STATE_T *state) +vchiq_videocore_wanted(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); if (!arm_state) /* autosuspend not supported - always return wanted */ @@ -2420,7 +2310,7 @@ vchiq_videocore_wanted(VCHIQ_STATE_T *state) static VCHIQ_STATUS_T vchiq_keepalive_vchiq_callback(VCHIQ_REASON_T reason, - VCHIQ_HEADER_T *header, + struct vchiq_header *header, VCHIQ_SERVICE_HANDLE_T service_user, void *bulk_user) { @@ -2432,14 +2322,14 @@ vchiq_keepalive_vchiq_callback(VCHIQ_REASON_T reason, static int vchiq_keepalive_thread_func(void *v) { - VCHIQ_STATE_T *state = (VCHIQ_STATE_T *) v; - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_state *state = (struct vchiq_state *)v; + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); VCHIQ_STATUS_T status; VCHIQ_INSTANCE_T instance; VCHIQ_SERVICE_HANDLE_T ka_handle; - VCHIQ_SERVICE_PARAMS_T params = { + struct vchiq_service_params params = { .fourcc = VCHIQ_MAKE_FOURCC('K', 'E', 'E', 'P'), .callback = vchiq_keepalive_vchiq_callback, .version = KEEPALIVE_VER, @@ -2470,7 +2360,7 @@ vchiq_keepalive_thread_func(void *v) while (1) { long rc = 0, uc = 0; - if (wait_for_completion_interruptible(&arm_state->ka_evt) + if (wait_for_completion_killable(&arm_state->ka_evt) != 0) { vchiq_log_error(vchiq_susp_log_level, "%s interrupted", __func__); @@ -2511,7 +2401,8 @@ exit: } VCHIQ_STATUS_T -vchiq_arm_init_state(VCHIQ_STATE_T *state, VCHIQ_ARM_STATE_T *arm_state) +vchiq_arm_init_state(struct vchiq_state *state, + struct vchiq_arm_state *arm_state) { if (arm_state) { rwlock_init(&arm_state->susp_res_lock); @@ -2607,8 +2498,8 @@ vchiq_arm_init_state(VCHIQ_STATE_T *state, VCHIQ_ARM_STATE_T *arm_state) */ void -set_suspend_state(VCHIQ_ARM_STATE_T *arm_state, - enum vc_suspend_status new_state) +set_suspend_state(struct vchiq_arm_state *arm_state, + enum vc_suspend_status new_state) { /* set the state in all cases */ arm_state->vc_suspend_state = new_state; @@ -2644,8 +2535,8 @@ set_suspend_state(VCHIQ_ARM_STATE_T *arm_state, } void -set_resume_state(VCHIQ_ARM_STATE_T *arm_state, - enum vc_resume_status new_state) +set_resume_state(struct vchiq_arm_state *arm_state, + enum vc_resume_status new_state) { /* set the state in all cases */ arm_state->vc_resume_state = new_state; @@ -2673,7 +2564,7 @@ set_resume_state(VCHIQ_ARM_STATE_T *arm_state, /* should be called with the write lock held */ inline void -start_suspend_timer(VCHIQ_ARM_STATE_T *arm_state) +start_suspend_timer(struct vchiq_arm_state *arm_state) { del_timer(&arm_state->suspend_timer); arm_state->suspend_timer.expires = jiffies + @@ -2684,7 +2575,7 @@ start_suspend_timer(VCHIQ_ARM_STATE_T *arm_state) /* should be called with the write lock held */ static inline void -stop_suspend_timer(VCHIQ_ARM_STATE_T *arm_state) +stop_suspend_timer(struct vchiq_arm_state *arm_state) { if (arm_state->suspend_timer_running) { del_timer(&arm_state->suspend_timer); @@ -2693,9 +2584,9 @@ stop_suspend_timer(VCHIQ_ARM_STATE_T *arm_state) } static inline int -need_resume(VCHIQ_STATE_T *state) +need_resume(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); return (arm_state->vc_suspend_state > VC_SUSPEND_IDLE) && (arm_state->vc_resume_state < VC_RESUME_REQUESTED) && @@ -2703,7 +2594,7 @@ need_resume(VCHIQ_STATE_T *state) } static int -block_resume(VCHIQ_ARM_STATE_T *arm_state) +block_resume(struct vchiq_arm_state *arm_state) { int status = VCHIQ_SUCCESS; const unsigned long timeout_val = @@ -2720,7 +2611,7 @@ block_resume(VCHIQ_ARM_STATE_T *arm_state) write_unlock_bh(&arm_state->susp_res_lock); vchiq_log_info(vchiq_susp_log_level, "%s wait for previously " "blocked clients", __func__); - if (wait_for_completion_interruptible_timeout( + if (wait_for_completion_killable_timeout( &arm_state->blocked_blocker, timeout_val) <= 0) { vchiq_log_error(vchiq_susp_log_level, "%s wait for " @@ -2746,7 +2637,7 @@ block_resume(VCHIQ_ARM_STATE_T *arm_state) write_unlock_bh(&arm_state->susp_res_lock); vchiq_log_info(vchiq_susp_log_level, "%s wait for resume", __func__); - if (wait_for_completion_interruptible_timeout( + if (wait_for_completion_killable_timeout( &arm_state->vc_resume_complete, timeout_val) <= 0) { vchiq_log_error(vchiq_susp_log_level, "%s wait for " @@ -2769,7 +2660,7 @@ out: } static inline void -unblock_resume(VCHIQ_ARM_STATE_T *arm_state) +unblock_resume(struct vchiq_arm_state *arm_state) { complete_all(&arm_state->resume_blocker); arm_state->resume_blocked = 0; @@ -2778,10 +2669,10 @@ unblock_resume(VCHIQ_ARM_STATE_T *arm_state) /* Initiate suspend via slot handler. Should be called with the write lock * held */ VCHIQ_STATUS_T -vchiq_arm_vcsuspend(VCHIQ_STATE_T *state) +vchiq_arm_vcsuspend(struct vchiq_state *state) { VCHIQ_STATUS_T status = VCHIQ_ERROR; - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); if (!arm_state) goto out; @@ -2827,9 +2718,9 @@ out: } void -vchiq_platform_check_suspend(VCHIQ_STATE_T *state) +vchiq_platform_check_suspend(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); int susp = 0; if (!arm_state) @@ -2854,9 +2745,9 @@ out: } static void -output_timeout_error(VCHIQ_STATE_T *state) +output_timeout_error(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); char err[50] = ""; int vc_use_count = arm_state->videocore_use_count; int active_services = state->unused_service; @@ -2867,7 +2758,7 @@ output_timeout_error(VCHIQ_STATE_T *state) goto output_msg; } for (i = 0; i < active_services; i++) { - VCHIQ_SERVICE_T *service_ptr = state->services[i]; + struct vchiq_service *service_ptr = state->services[i]; if (service_ptr && service_ptr->service_use_count && (service_ptr->srvstate != VCHIQ_SRVSTATE_FREE)) { @@ -2899,9 +2790,9 @@ output_msg: ** videocore failed to suspend in time or VCHIQ_ERROR if interrupted. */ VCHIQ_STATUS_T -vchiq_arm_force_suspend(VCHIQ_STATE_T *state) +vchiq_arm_force_suspend(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); VCHIQ_STATUS_T status = VCHIQ_ERROR; long rc = 0; int repeat = -1; @@ -2953,7 +2844,7 @@ vchiq_arm_force_suspend(VCHIQ_STATE_T *state) do { write_unlock_bh(&arm_state->susp_res_lock); - rc = wait_for_completion_interruptible_timeout( + rc = wait_for_completion_killable_timeout( &arm_state->vc_suspend_complete, msecs_to_jiffies(FORCE_SUSPEND_TIMEOUT_MS)); @@ -3010,9 +2901,9 @@ out: } void -vchiq_check_suspend(VCHIQ_STATE_T *state) +vchiq_check_suspend(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); if (!arm_state) goto out; @@ -3032,9 +2923,9 @@ out: } int -vchiq_arm_allow_resume(VCHIQ_STATE_T *state) +vchiq_arm_allow_resume(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); int resume = 0; int ret = -1; @@ -3049,7 +2940,7 @@ vchiq_arm_allow_resume(VCHIQ_STATE_T *state) write_unlock_bh(&arm_state->susp_res_lock); if (resume) { - if (wait_for_completion_interruptible( + if (wait_for_completion_killable( &arm_state->vc_resume_complete) < 0) { vchiq_log_error(vchiq_susp_log_level, "%s interrupted", __func__); @@ -3076,9 +2967,9 @@ out: /* This function should be called with the write lock held */ int -vchiq_check_resume(VCHIQ_STATE_T *state) +vchiq_check_resume(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); int resume = 0; if (!arm_state) @@ -3098,10 +2989,10 @@ out: } VCHIQ_STATUS_T -vchiq_use_internal(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, - enum USE_TYPE_E use_type) +vchiq_use_internal(struct vchiq_state *state, struct vchiq_service *service, + enum USE_TYPE_E use_type) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); VCHIQ_STATUS_T ret = VCHIQ_SUCCESS; char entity[16]; int *entity_uc; @@ -3231,9 +3122,9 @@ out: } VCHIQ_STATUS_T -vchiq_release_internal(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service) +vchiq_release_internal(struct vchiq_state *state, struct vchiq_service *service) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); VCHIQ_STATUS_T ret = VCHIQ_SUCCESS; char entity[16]; int *entity_uc; @@ -3293,9 +3184,9 @@ out: } void -vchiq_on_remote_use(VCHIQ_STATE_T *state) +vchiq_on_remote_use(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); atomic_inc(&arm_state->ka_use_count); @@ -3303,9 +3194,9 @@ vchiq_on_remote_use(VCHIQ_STATE_T *state) } void -vchiq_on_remote_release(VCHIQ_STATE_T *state) +vchiq_on_remote_release(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); atomic_inc(&arm_state->ka_release_count); @@ -3313,18 +3204,18 @@ vchiq_on_remote_release(VCHIQ_STATE_T *state) } VCHIQ_STATUS_T -vchiq_use_service_internal(VCHIQ_SERVICE_T *service) +vchiq_use_service_internal(struct vchiq_service *service) { return vchiq_use_internal(service->state, service, USE_TYPE_SERVICE); } VCHIQ_STATUS_T -vchiq_release_service_internal(VCHIQ_SERVICE_T *service) +vchiq_release_service_internal(struct vchiq_service *service) { return vchiq_release_internal(service->state, service); } -VCHIQ_DEBUGFS_NODE_T * +struct vchiq_debugfs_node * vchiq_instance_get_debugfs_node(VCHIQ_INSTANCE_T instance) { return &instance->debugfs_node; @@ -3333,7 +3224,7 @@ vchiq_instance_get_debugfs_node(VCHIQ_INSTANCE_T instance) int vchiq_instance_get_use_count(VCHIQ_INSTANCE_T instance) { - VCHIQ_SERVICE_T *service; + struct vchiq_service *service; int use_count = 0, i; i = 0; @@ -3360,7 +3251,7 @@ vchiq_instance_get_trace(VCHIQ_INSTANCE_T instance) void vchiq_instance_set_trace(VCHIQ_INSTANCE_T instance, int trace) { - VCHIQ_SERVICE_T *service; + struct vchiq_service *service; int i; i = 0; @@ -3374,8 +3265,9 @@ vchiq_instance_set_trace(VCHIQ_INSTANCE_T instance, int trace) static void suspend_timer_callback(struct timer_list *t) { - VCHIQ_ARM_STATE_T *arm_state = from_timer(arm_state, t, suspend_timer); - VCHIQ_STATE_T *state = arm_state->state; + struct vchiq_arm_state *arm_state = + from_timer(arm_state, t, suspend_timer); + struct vchiq_state *state = arm_state->state; vchiq_log_info(vchiq_susp_log_level, "%s - suspend timer expired - check suspend", __func__); @@ -3386,7 +3278,7 @@ VCHIQ_STATUS_T vchiq_use_service_no_resume(VCHIQ_SERVICE_HANDLE_T handle) { VCHIQ_STATUS_T ret = VCHIQ_ERROR; - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); + struct vchiq_service *service = find_service_by_handle(handle); if (service) { ret = vchiq_use_internal(service->state, service, @@ -3400,7 +3292,7 @@ VCHIQ_STATUS_T vchiq_use_service(VCHIQ_SERVICE_HANDLE_T handle) { VCHIQ_STATUS_T ret = VCHIQ_ERROR; - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); + struct vchiq_service *service = find_service_by_handle(handle); if (service) { ret = vchiq_use_internal(service->state, service, @@ -3414,7 +3306,7 @@ VCHIQ_STATUS_T vchiq_release_service(VCHIQ_SERVICE_HANDLE_T handle) { VCHIQ_STATUS_T ret = VCHIQ_ERROR; - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); + struct vchiq_service *service = find_service_by_handle(handle); if (service) { ret = vchiq_release_internal(service->state, service); @@ -3430,9 +3322,9 @@ struct service_data_struct { }; void -vchiq_dump_service_use_state(VCHIQ_STATE_T *state) +vchiq_dump_service_use_state(struct vchiq_state *state) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); struct service_data_struct *service_data; int i, found = 0; /* If there's more than 64 services, only dump ones with @@ -3464,7 +3356,7 @@ vchiq_dump_service_use_state(VCHIQ_STATE_T *state) only_nonzero = 1; for (i = 0; i < active_services; i++) { - VCHIQ_SERVICE_T *service_ptr = state->services[i]; + struct vchiq_service *service_ptr = state->services[i]; if (!service_ptr) continue; @@ -3516,9 +3408,9 @@ vchiq_dump_service_use_state(VCHIQ_STATE_T *state) } VCHIQ_STATUS_T -vchiq_check_service(VCHIQ_SERVICE_T *service) +vchiq_check_service(struct vchiq_service *service) { - VCHIQ_ARM_STATE_T *arm_state; + struct vchiq_arm_state *arm_state; VCHIQ_STATUS_T ret = VCHIQ_ERROR; if (!service || !service->state) @@ -3549,15 +3441,16 @@ out: } /* stub functions */ -void vchiq_on_remote_use_active(VCHIQ_STATE_T *state) +void vchiq_on_remote_use_active(struct vchiq_state *state) { (void)state; } -void vchiq_platform_conn_state_changed(VCHIQ_STATE_T *state, - VCHIQ_CONNSTATE_T oldstate, VCHIQ_CONNSTATE_T newstate) +void vchiq_platform_conn_state_changed(struct vchiq_state *state, + VCHIQ_CONNSTATE_T oldstate, + VCHIQ_CONNSTATE_T newstate) { - VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); + struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); vchiq_log_info(vchiq_susp_log_level, "%d: %s->%s", state->id, get_conn_state_name(oldstate), get_conn_state_name(newstate)); @@ -3593,11 +3486,34 @@ static const struct of_device_id vchiq_of_match[] = { }; MODULE_DEVICE_TABLE(of, vchiq_of_match); +static struct platform_device * +vchiq_register_child(struct platform_device *pdev, const char *name) +{ + struct platform_device_info pdevinfo; + struct platform_device *child; + + memset(&pdevinfo, 0, sizeof(pdevinfo)); + + pdevinfo.parent = &pdev->dev; + pdevinfo.name = name; + pdevinfo.id = PLATFORM_DEVID_NONE; + pdevinfo.dma_mask = DMA_BIT_MASK(32); + + child = platform_device_register_full(&pdevinfo); + if (IS_ERR(child)) { + dev_warn(&pdev->dev, "%s not registered\n", name); + child = NULL; + } + + return child; +} + static int vchiq_probe(struct platform_device *pdev) { struct device_node *fw_node; const struct of_device_id *of_id; struct vchiq_drvdata *drvdata; + struct device *vchiq_dev; int err; of_id = of_match_node(vchiq_of_match, pdev->dev.of_node); @@ -3623,34 +3539,22 @@ static int vchiq_probe(struct platform_device *pdev) if (err != 0) goto failed_platform_init; - err = alloc_chrdev_region(&vchiq_devid, VCHIQ_MINOR, 1, DEVICE_NAME); - if (err != 0) { - vchiq_log_error(vchiq_arm_log_level, - "Unable to allocate device number"); - goto failed_platform_init; - } cdev_init(&vchiq_cdev, &vchiq_fops); vchiq_cdev.owner = THIS_MODULE; err = cdev_add(&vchiq_cdev, vchiq_devid, 1); if (err != 0) { vchiq_log_error(vchiq_arm_log_level, "Unable to register device"); - goto failed_cdev_add; + goto failed_platform_init; } - /* create sysfs entries */ - vchiq_class = class_create(THIS_MODULE, DEVICE_NAME); - err = PTR_ERR(vchiq_class); - if (IS_ERR(vchiq_class)) - goto failed_class_create; - - vchiq_dev = device_create(vchiq_class, NULL, - vchiq_devid, NULL, "vchiq"); - err = PTR_ERR(vchiq_dev); - if (IS_ERR(vchiq_dev)) + vchiq_dev = device_create(vchiq_class, &pdev->dev, vchiq_devid, NULL, + "vchiq"); + if (IS_ERR(vchiq_dev)) { + err = PTR_ERR(vchiq_dev); goto failed_device_create; + } - /* create debugfs entries */ vchiq_debugfs_init(); vchiq_log_info(vchiq_arm_log_level, @@ -3658,18 +3562,13 @@ static int vchiq_probe(struct platform_device *pdev) VCHIQ_VERSION, VCHIQ_VERSION_MIN, MAJOR(vchiq_devid), MINOR(vchiq_devid)); - bcm2835_camera = platform_device_register_data(&pdev->dev, - "bcm2835-camera", -1, - NULL, 0); + bcm2835_camera = vchiq_register_child(pdev, "bcm2835-camera"); + bcm2835_audio = vchiq_register_child(pdev, "bcm2835_audio"); return 0; failed_device_create: - class_destroy(vchiq_class); -failed_class_create: cdev_del(&vchiq_cdev); -failed_cdev_add: - unregister_chrdev_region(vchiq_devid, 1); failed_platform_init: vchiq_log_warning(vchiq_arm_log_level, "could not load vchiq"); return err; @@ -3680,9 +3579,7 @@ static int vchiq_remove(struct platform_device *pdev) platform_device_unregister(bcm2835_camera); vchiq_debugfs_deinit(); device_destroy(vchiq_class, vchiq_devid); - class_destroy(vchiq_class); cdev_del(&vchiq_cdev); - unregister_chrdev_region(vchiq_devid, 1); return 0; } @@ -3695,7 +3592,48 @@ static struct platform_driver vchiq_driver = { .probe = vchiq_probe, .remove = vchiq_remove, }; -module_platform_driver(vchiq_driver); + +static int __init vchiq_driver_init(void) +{ + int ret; + + vchiq_class = class_create(THIS_MODULE, DEVICE_NAME); + if (IS_ERR(vchiq_class)) { + pr_err("Failed to create vchiq class\n"); + return PTR_ERR(vchiq_class); + } + + ret = alloc_chrdev_region(&vchiq_devid, 0, 1, DEVICE_NAME); + if (ret) { + pr_err("Failed to allocate vchiq's chrdev region\n"); + goto class_destroy; + } + + ret = platform_driver_register(&vchiq_driver); + if (ret) { + pr_err("Failed to register vchiq driver\n"); + goto region_unregister; + } + + return 0; + +region_unregister: + platform_driver_unregister(&vchiq_driver); + +class_destroy: + class_destroy(vchiq_class); + + return ret; +} +module_init(vchiq_driver_init); + +static void __exit vchiq_driver_exit(void) +{ + platform_driver_unregister(&vchiq_driver); + unregister_chrdev_region(vchiq_devid, 1); + class_destroy(vchiq_class); +} +module_exit(vchiq_driver_exit); MODULE_LICENSE("Dual BSD/GPL"); MODULE_DESCRIPTION("Videocore VCHIQ driver"); diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h index 2f3ebc99cbcf..cdb963054975 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h @@ -66,7 +66,7 @@ enum USE_TYPE_E { USE_TYPE_VCHIQ }; -typedef struct vchiq_arm_state_struct { +struct vchiq_arm_state { /* Keepalive-related data */ struct task_struct *ka_thread; struct completion ka_evt; @@ -83,7 +83,7 @@ typedef struct vchiq_arm_state_struct { unsigned int wake_address; - VCHIQ_STATE_T *state; + struct vchiq_state *state; struct timer_list suspend_timer; int suspend_timer_timeout; int suspend_timer_running; @@ -121,7 +121,7 @@ typedef struct vchiq_arm_state_struct { unsigned long long resume_start_time; unsigned long long last_wake_time; -} VCHIQ_ARM_STATE_T; +}; struct vchiq_drvdata { const unsigned int cache_line_size; @@ -131,31 +131,33 @@ struct vchiq_drvdata { extern int vchiq_arm_log_level; extern int vchiq_susp_log_level; -int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state); +int vchiq_platform_init(struct platform_device *pdev, + struct vchiq_state *state); -extern VCHIQ_STATE_T * +extern struct vchiq_state * vchiq_get_state(void); extern VCHIQ_STATUS_T -vchiq_arm_vcsuspend(VCHIQ_STATE_T *state); +vchiq_arm_vcsuspend(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_arm_force_suspend(VCHIQ_STATE_T *state); +vchiq_arm_force_suspend(struct vchiq_state *state); extern int -vchiq_arm_allow_resume(VCHIQ_STATE_T *state); +vchiq_arm_allow_resume(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_arm_vcresume(VCHIQ_STATE_T *state); +vchiq_arm_vcresume(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_arm_init_state(VCHIQ_STATE_T *state, VCHIQ_ARM_STATE_T *arm_state); +vchiq_arm_init_state(struct vchiq_state *state, + struct vchiq_arm_state *arm_state); extern int -vchiq_check_resume(VCHIQ_STATE_T *state); +vchiq_check_resume(struct vchiq_state *state); extern void -vchiq_check_suspend(VCHIQ_STATE_T *state); +vchiq_check_suspend(struct vchiq_state *state); VCHIQ_STATUS_T vchiq_use_service(VCHIQ_SERVICE_HANDLE_T handle); @@ -163,36 +165,37 @@ extern VCHIQ_STATUS_T vchiq_release_service(VCHIQ_SERVICE_HANDLE_T handle); extern VCHIQ_STATUS_T -vchiq_check_service(VCHIQ_SERVICE_T *service); +vchiq_check_service(struct vchiq_service *service); extern VCHIQ_STATUS_T -vchiq_platform_suspend(VCHIQ_STATE_T *state); +vchiq_platform_suspend(struct vchiq_state *state); extern int -vchiq_platform_videocore_wanted(VCHIQ_STATE_T *state); +vchiq_platform_videocore_wanted(struct vchiq_state *state); extern int vchiq_platform_use_suspend_timer(void); extern void -vchiq_dump_platform_use_state(VCHIQ_STATE_T *state); +vchiq_dump_platform_use_state(struct vchiq_state *state); extern void -vchiq_dump_service_use_state(VCHIQ_STATE_T *state); +vchiq_dump_service_use_state(struct vchiq_state *state); -extern VCHIQ_ARM_STATE_T* -vchiq_platform_get_arm_state(VCHIQ_STATE_T *state); +extern struct vchiq_arm_state* +vchiq_platform_get_arm_state(struct vchiq_state *state); extern int -vchiq_videocore_wanted(VCHIQ_STATE_T *state); +vchiq_videocore_wanted(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_use_internal(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, - enum USE_TYPE_E use_type); +vchiq_use_internal(struct vchiq_state *state, struct vchiq_service *service, + enum USE_TYPE_E use_type); extern VCHIQ_STATUS_T -vchiq_release_internal(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service); +vchiq_release_internal(struct vchiq_state *state, + struct vchiq_service *service); -extern VCHIQ_DEBUGFS_NODE_T * +extern struct vchiq_debugfs_node * vchiq_instance_get_debugfs_node(VCHIQ_INSTANCE_T instance); extern int @@ -208,14 +211,14 @@ extern void vchiq_instance_set_trace(VCHIQ_INSTANCE_T instance, int trace); extern void -set_suspend_state(VCHIQ_ARM_STATE_T *arm_state, - enum vc_suspend_status new_state); +set_suspend_state(struct vchiq_arm_state *arm_state, + enum vc_suspend_status new_state); extern void -set_resume_state(VCHIQ_ARM_STATE_T *arm_state, - enum vc_resume_status new_state); +set_resume_state(struct vchiq_arm_state *arm_state, + enum vc_resume_status new_state); extern void -start_suspend_timer(VCHIQ_ARM_STATE_T *arm_state); +start_suspend_timer(struct vchiq_arm_state *arm_state); #endif /* VCHIQ_ARM_H */ diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_connected.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_connected.c index 7ea29665bd0c..7d64e2ed7b42 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_connected.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_connected.c @@ -33,7 +33,6 @@ #include "vchiq_connected.h" #include "vchiq_core.h" -#include "vchiq_killable.h" #include <linux/module.h> #include <linux/mutex.h> diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c index 7642ced31436..53f5a1cb4636 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c @@ -32,7 +32,6 @@ */ #include "vchiq_core.h" -#include "vchiq_killable.h" #define VCHIQ_SLOT_HANDLER_STACK 8192 @@ -73,8 +72,8 @@ enum { }; /* we require this for consistency between endpoints */ -vchiq_static_assert(sizeof(VCHIQ_HEADER_T) == 8); -vchiq_static_assert(IS_POW2(sizeof(VCHIQ_HEADER_T))); +vchiq_static_assert(sizeof(struct vchiq_header) == 8); +vchiq_static_assert(IS_POW2(sizeof(struct vchiq_header))); vchiq_static_assert(IS_POW2(VCHIQ_NUM_CURRENT_BULKS)); vchiq_static_assert(IS_POW2(VCHIQ_NUM_SERVICE_BULKS)); vchiq_static_assert(IS_POW2(VCHIQ_MAX_SERVICES)); @@ -85,13 +84,11 @@ int vchiq_core_log_level = VCHIQ_LOG_DEFAULT; int vchiq_core_msg_log_level = VCHIQ_LOG_DEFAULT; int vchiq_sync_log_level = VCHIQ_LOG_DEFAULT; -static atomic_t pause_bulks_count = ATOMIC_INIT(0); - static DEFINE_SPINLOCK(service_spinlock); DEFINE_SPINLOCK(bulk_waiter_spinlock); static DEFINE_SPINLOCK(quota_spinlock); -VCHIQ_STATE_T *vchiq_states[VCHIQ_MAX_STATES]; +struct vchiq_state *vchiq_states[VCHIQ_MAX_STATES]; static unsigned int handle_seq; static const char *const srvstate_names[] = { @@ -130,7 +127,7 @@ static const char *const conn_state_names[] = { }; static void -release_message_sync(VCHIQ_STATE_T *state, VCHIQ_HEADER_T *header); +release_message_sync(struct vchiq_state *state, struct vchiq_header *header); static const char *msg_type_str(unsigned int msg_type) { @@ -155,7 +152,7 @@ static const char *msg_type_str(unsigned int msg_type) } static inline void -vchiq_set_service_state(VCHIQ_SERVICE_T *service, int newstate) +vchiq_set_service_state(struct vchiq_service *service, int newstate) { vchiq_log_info(vchiq_core_log_level, "%d: srv:%d %s->%s", service->state->id, service->localport, @@ -164,10 +161,10 @@ vchiq_set_service_state(VCHIQ_SERVICE_T *service, int newstate) service->srvstate = newstate; } -VCHIQ_SERVICE_T * +struct vchiq_service * find_service_by_handle(VCHIQ_SERVICE_HANDLE_T handle) { - VCHIQ_SERVICE_T *service; + struct vchiq_service *service; spin_lock(&service_spinlock); service = handle_to_service(handle); @@ -186,10 +183,10 @@ find_service_by_handle(VCHIQ_SERVICE_HANDLE_T handle) return service; } -VCHIQ_SERVICE_T * -find_service_by_port(VCHIQ_STATE_T *state, int localport) +struct vchiq_service * +find_service_by_port(struct vchiq_state *state, int localport) { - VCHIQ_SERVICE_T *service = NULL; + struct vchiq_service *service = NULL; if ((unsigned int)localport <= VCHIQ_PORT_MAX) { spin_lock(&service_spinlock); @@ -209,11 +206,11 @@ find_service_by_port(VCHIQ_STATE_T *state, int localport) return service; } -VCHIQ_SERVICE_T * +struct vchiq_service * find_service_for_instance(VCHIQ_INSTANCE_T instance, VCHIQ_SERVICE_HANDLE_T handle) { - VCHIQ_SERVICE_T *service; + struct vchiq_service *service; spin_lock(&service_spinlock); service = handle_to_service(handle); @@ -233,11 +230,11 @@ find_service_for_instance(VCHIQ_INSTANCE_T instance, return service; } -VCHIQ_SERVICE_T * +struct vchiq_service * find_closed_service_for_instance(VCHIQ_INSTANCE_T instance, VCHIQ_SERVICE_HANDLE_T handle) { - VCHIQ_SERVICE_T *service; + struct vchiq_service *service; spin_lock(&service_spinlock); service = handle_to_service(handle); @@ -259,16 +256,16 @@ find_closed_service_for_instance(VCHIQ_INSTANCE_T instance, return service; } -VCHIQ_SERVICE_T * -next_service_by_instance(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance, - int *pidx) +struct vchiq_service * +next_service_by_instance(struct vchiq_state *state, VCHIQ_INSTANCE_T instance, + int *pidx) { - VCHIQ_SERVICE_T *service = NULL; + struct vchiq_service *service = NULL; int idx = *pidx; spin_lock(&service_spinlock); while (idx < state->unused_service) { - VCHIQ_SERVICE_T *srv = state->services[idx++]; + struct vchiq_service *srv = state->services[idx++]; if (srv && (srv->srvstate != VCHIQ_SRVSTATE_FREE) && (srv->instance == instance)) { @@ -286,7 +283,7 @@ next_service_by_instance(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance, } void -lock_service(VCHIQ_SERVICE_T *service) +lock_service(struct vchiq_service *service) { spin_lock(&service_spinlock); WARN_ON(!service); @@ -298,7 +295,7 @@ lock_service(VCHIQ_SERVICE_T *service) } void -unlock_service(VCHIQ_SERVICE_T *service) +unlock_service(struct vchiq_service *service) { spin_lock(&service_spinlock); if (!service) { @@ -311,7 +308,7 @@ unlock_service(VCHIQ_SERVICE_T *service) } service->ref_count--; if (!service->ref_count) { - VCHIQ_STATE_T *state = service->state; + struct vchiq_state *state = service->state; WARN_ON(service->srvstate != VCHIQ_SRVSTATE_FREE); state->services[service->localport] = NULL; @@ -330,7 +327,7 @@ unlock: int vchiq_get_client_id(VCHIQ_SERVICE_HANDLE_T handle) { - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); + struct vchiq_service *service = find_service_by_handle(handle); int id; id = service ? service->client_id : 0; @@ -343,7 +340,7 @@ vchiq_get_client_id(VCHIQ_SERVICE_HANDLE_T handle) void * vchiq_get_service_userdata(VCHIQ_SERVICE_HANDLE_T handle) { - VCHIQ_SERVICE_T *service = handle_to_service(handle); + struct vchiq_service *service = handle_to_service(handle); return service ? service->base.userdata : NULL; } @@ -351,16 +348,16 @@ vchiq_get_service_userdata(VCHIQ_SERVICE_HANDLE_T handle) int vchiq_get_service_fourcc(VCHIQ_SERVICE_HANDLE_T handle) { - VCHIQ_SERVICE_T *service = handle_to_service(handle); + struct vchiq_service *service = handle_to_service(handle); return service ? service->base.fourcc : 0; } static void -mark_service_closing_internal(VCHIQ_SERVICE_T *service, int sh_thread) +mark_service_closing_internal(struct vchiq_service *service, int sh_thread) { - VCHIQ_STATE_T *state = service->state; - VCHIQ_SERVICE_QUOTA_T *service_quota; + struct vchiq_state *state = service->state; + struct vchiq_service_quota *service_quota; service->closing = 1; @@ -378,18 +375,18 @@ mark_service_closing_internal(VCHIQ_SERVICE_T *service, int sh_thread) /* Unblock any sending thread. */ service_quota = &state->service_quotas[service->localport]; - up(&service_quota->quota_event); + complete(&service_quota->quota_event); } static void -mark_service_closing(VCHIQ_SERVICE_T *service) +mark_service_closing(struct vchiq_service *service) { mark_service_closing_internal(service, 0); } static inline VCHIQ_STATUS_T -make_service_callback(VCHIQ_SERVICE_T *service, VCHIQ_REASON_T reason, - VCHIQ_HEADER_T *header, void *bulk_userdata) +make_service_callback(struct vchiq_service *service, VCHIQ_REASON_T reason, + struct vchiq_header *header, void *bulk_userdata) { VCHIQ_STATUS_T status; @@ -408,7 +405,7 @@ make_service_callback(VCHIQ_SERVICE_T *service, VCHIQ_REASON_T reason, } inline void -vchiq_set_conn_state(VCHIQ_STATE_T *state, VCHIQ_CONNSTATE_T newstate) +vchiq_set_conn_state(struct vchiq_state *state, VCHIQ_CONNSTATE_T newstate) { VCHIQ_CONNSTATE_T oldstate = state->conn_state; @@ -420,27 +417,23 @@ vchiq_set_conn_state(VCHIQ_STATE_T *state, VCHIQ_CONNSTATE_T newstate) } static inline void -remote_event_create(VCHIQ_STATE_T *state, REMOTE_EVENT_T *event) +remote_event_create(wait_queue_head_t *wq, struct remote_event *event) { event->armed = 0; /* Don't clear the 'fired' flag because it may already have been set ** by the other side. */ - sema_init((struct semaphore *)((char *)state + event->event), 0); + init_waitqueue_head(wq); } static inline int -remote_event_wait(VCHIQ_STATE_T *state, REMOTE_EVENT_T *event) +remote_event_wait(wait_queue_head_t *wq, struct remote_event *event) { if (!event->fired) { event->armed = 1; dsb(sy); - if (!event->fired) { - if (down_interruptible( - (struct semaphore *) - ((char *)state + event->event)) != 0) { - event->armed = 0; - return 0; - } + if (wait_event_killable(*wq, event->fired)) { + event->armed = 0; + return 0; } event->armed = 0; wmb(); @@ -451,26 +444,27 @@ remote_event_wait(VCHIQ_STATE_T *state, REMOTE_EVENT_T *event) } static inline void -remote_event_signal_local(VCHIQ_STATE_T *state, REMOTE_EVENT_T *event) +remote_event_signal_local(wait_queue_head_t *wq, struct remote_event *event) { + event->fired = 1; event->armed = 0; - up((struct semaphore *)((char *)state + event->event)); + wake_up_all(wq); } static inline void -remote_event_poll(VCHIQ_STATE_T *state, REMOTE_EVENT_T *event) +remote_event_poll(wait_queue_head_t *wq, struct remote_event *event) { if (event->fired && event->armed) - remote_event_signal_local(state, event); + remote_event_signal_local(wq, event); } void -remote_event_pollall(VCHIQ_STATE_T *state) +remote_event_pollall(struct vchiq_state *state) { - remote_event_poll(state, &state->local->sync_trigger); - remote_event_poll(state, &state->local->sync_release); - remote_event_poll(state, &state->local->trigger); - remote_event_poll(state, &state->local->recycle); + remote_event_poll(&state->sync_trigger_event, &state->local->sync_trigger); + remote_event_poll(&state->sync_release_event, &state->local->sync_release); + remote_event_poll(&state->trigger_event, &state->local->trigger); + remote_event_poll(&state->recycle_event, &state->local->recycle); } /* Round up message sizes so that any space at the end of a slot is always big @@ -481,23 +475,23 @@ static inline size_t calc_stride(size_t size) { /* Allow room for the header */ - size += sizeof(VCHIQ_HEADER_T); + size += sizeof(struct vchiq_header); /* Round up */ - return (size + sizeof(VCHIQ_HEADER_T) - 1) & ~(sizeof(VCHIQ_HEADER_T) - - 1); + return (size + sizeof(struct vchiq_header) - 1) & + ~(sizeof(struct vchiq_header) - 1); } /* Called by the slot handler thread */ -static VCHIQ_SERVICE_T * -get_listening_service(VCHIQ_STATE_T *state, int fourcc) +static struct vchiq_service * +get_listening_service(struct vchiq_state *state, int fourcc) { int i; WARN_ON(fourcc == VCHIQ_FOURCC_INVALID); for (i = 0; i < state->unused_service; i++) { - VCHIQ_SERVICE_T *service = state->services[i]; + struct vchiq_service *service = state->services[i]; if (service && (service->public_fourcc == fourcc) && @@ -513,13 +507,13 @@ get_listening_service(VCHIQ_STATE_T *state, int fourcc) } /* Called by the slot handler thread */ -static VCHIQ_SERVICE_T * -get_connected_service(VCHIQ_STATE_T *state, unsigned int port) +static struct vchiq_service * +get_connected_service(struct vchiq_state *state, unsigned int port) { int i; for (i = 0; i < state->unused_service; i++) { - VCHIQ_SERVICE_T *service = state->services[i]; + struct vchiq_service *service = state->services[i]; if (service && (service->srvstate == VCHIQ_SRVSTATE_OPEN) && (service->remoteport == port)) { @@ -531,7 +525,8 @@ get_connected_service(VCHIQ_STATE_T *state, unsigned int port) } inline void -request_poll(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, int poll_type) +request_poll(struct vchiq_state *state, struct vchiq_service *service, + int poll_type) { u32 value; @@ -554,26 +549,26 @@ request_poll(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, int poll_type) wmb(); /* ... and ensure the slot handler runs. */ - remote_event_signal_local(state, &state->local->trigger); + remote_event_signal_local(&state->trigger_event, &state->local->trigger); } /* Called from queue_message, by the slot handler and application threads, ** with slot_mutex held */ -static VCHIQ_HEADER_T * -reserve_space(VCHIQ_STATE_T *state, size_t space, int is_blocking) +static struct vchiq_header * +reserve_space(struct vchiq_state *state, size_t space, int is_blocking) { - VCHIQ_SHARED_STATE_T *local = state->local; + struct vchiq_shared_state *local = state->local; int tx_pos = state->local_tx_pos; int slot_space = VCHIQ_SLOT_SIZE - (tx_pos & VCHIQ_SLOT_MASK); if (space > slot_space) { - VCHIQ_HEADER_T *header; + struct vchiq_header *header; /* Fill the remaining space with padding */ WARN_ON(state->tx_data == NULL); - header = (VCHIQ_HEADER_T *) + header = (struct vchiq_header *) (state->tx_data + (tx_pos & VCHIQ_SLOT_MASK)); header->msgid = VCHIQ_MSGID_PADDING; - header->size = slot_space - sizeof(VCHIQ_HEADER_T); + header->size = slot_space - sizeof(struct vchiq_header); tx_pos += slot_space; } @@ -584,7 +579,7 @@ reserve_space(VCHIQ_STATE_T *state, size_t space, int is_blocking) /* If there is no free slot... */ - if (down_trylock(&state->slot_available_event) != 0) { + if (!try_wait_for_completion(&state->slot_available_event)) { /* ...wait for one. */ VCHIQ_STATS_INC(state, slot_stalls); @@ -595,13 +590,13 @@ reserve_space(VCHIQ_STATE_T *state, size_t space, int is_blocking) remote_event_signal(&state->remote->trigger); if (!is_blocking || - (down_interruptible( - &state->slot_available_event) != 0)) + (wait_for_completion_killable( + &state->slot_available_event))) return NULL; /* No space available */ } if (tx_pos == (state->slot_queue_available * VCHIQ_SLOT_SIZE)) { - up(&state->slot_available_event); + complete(&state->slot_available_event); pr_warn("%s: invalid tx_pos: %d\n", __func__, tx_pos); return NULL; } @@ -615,14 +610,16 @@ reserve_space(VCHIQ_STATE_T *state, size_t space, int is_blocking) state->local_tx_pos = tx_pos + space; - return (VCHIQ_HEADER_T *)(state->tx_data + (tx_pos & VCHIQ_SLOT_MASK)); + return (struct vchiq_header *)(state->tx_data + + (tx_pos & VCHIQ_SLOT_MASK)); } /* Called by the recycle thread. */ static void -process_free_queue(VCHIQ_STATE_T *state, BITSET_T *service_found, size_t length) +process_free_queue(struct vchiq_state *state, BITSET_T *service_found, + size_t length) { - VCHIQ_SHARED_STATE_T *local = state->local; + struct vchiq_shared_state *local = state->local; int slot_queue_available; /* Find slots which have been freed by the other side, and return them @@ -660,13 +657,13 @@ process_free_queue(VCHIQ_STATE_T *state, BITSET_T *service_found, size_t length) pos = 0; while (pos < VCHIQ_SLOT_SIZE) { - VCHIQ_HEADER_T *header = - (VCHIQ_HEADER_T *)(data + pos); + struct vchiq_header *header = + (struct vchiq_header *)(data + pos); int msgid = header->msgid; if (VCHIQ_MSG_TYPE(msgid) == VCHIQ_MSG_DATA) { int port = VCHIQ_MSG_SRCPORT(msgid); - VCHIQ_SERVICE_QUOTA_T *service_quota = + struct vchiq_service_quota *service_quota = &state->service_quotas[port]; int count; @@ -681,7 +678,7 @@ process_free_queue(VCHIQ_STATE_T *state, BITSET_T *service_found, size_t length) /* Signal the service that it ** has dropped below its quota */ - up(&service_quota->quota_event); + complete(&service_quota->quota_event); else if (count == 0) { vchiq_log_error(vchiq_core_log_level, "service %d message_use_count=%d (header %pK, msgid %x, header->msgid %x, header->size %x)", @@ -706,7 +703,7 @@ process_free_queue(VCHIQ_STATE_T *state, BITSET_T *service_found, size_t length) /* Signal the service in case ** it has dropped below its ** quota */ - up(&service_quota->quota_event); + complete(&service_quota->quota_event); vchiq_log_trace( vchiq_core_log_level, "%d: pfq:%d %x@%pK - slot_use->%d", @@ -747,7 +744,7 @@ process_free_queue(VCHIQ_STATE_T *state, BITSET_T *service_found, size_t length) count - 1; spin_unlock("a_spinlock); if (count == state->data_quota) - up(&state->data_quota_event); + complete(&state->data_quota_event); } /* @@ -757,7 +754,7 @@ process_free_queue(VCHIQ_STATE_T *state, BITSET_T *service_found, size_t length) mb(); state->slot_queue_available = slot_queue_available; - up(&state->slot_available_event); + complete(&state->slot_available_event); } } @@ -805,17 +802,15 @@ copy_message_data( /* Called by the slot handler and application threads */ static VCHIQ_STATUS_T -queue_message(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, - int msgid, - ssize_t (*copy_callback)(void *context, void *dest, - size_t offset, size_t maxsize), - void *context, - size_t size, - int flags) -{ - VCHIQ_SHARED_STATE_T *local; - VCHIQ_SERVICE_QUOTA_T *service_quota = NULL; - VCHIQ_HEADER_T *header; +queue_message(struct vchiq_state *state, struct vchiq_service *service, + int msgid, + ssize_t (*copy_callback)(void *context, void *dest, + size_t offset, size_t maxsize), + void *context, size_t size, int flags) +{ + struct vchiq_shared_state *local; + struct vchiq_service_quota *service_quota = NULL; + struct vchiq_header *header; int type = VCHIQ_MSG_TYPE(msgid); size_t stride; @@ -865,8 +860,8 @@ queue_message(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, spin_unlock("a_spinlock); mutex_unlock(&state->slot_mutex); - if (down_interruptible(&state->data_quota_event) - != 0) + if (wait_for_completion_killable( + &state->data_quota_event)) return VCHIQ_RETRY; mutex_lock(&state->slot_mutex); @@ -876,7 +871,7 @@ queue_message(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, if ((tx_end_index == state->previous_data_index) || (state->data_use_count < state->data_quota)) { /* Pass the signal on to other waiters */ - up(&state->data_quota_event); + complete(&state->data_quota_event); break; } } @@ -896,8 +891,8 @@ queue_message(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, service_quota->slot_use_count); VCHIQ_SERVICE_STATS_INC(service, quota_stalls); mutex_unlock(&state->slot_mutex); - if (down_interruptible(&service_quota->quota_event) - != 0) + if (wait_for_completion_killable( + &service_quota->quota_event)) return VCHIQ_RETRY; if (service->closing) return VCHIQ_ERROR; @@ -1055,16 +1050,14 @@ queue_message(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, /* Called by the slot handler and application threads */ static VCHIQ_STATUS_T -queue_message_sync(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, - int msgid, - ssize_t (*copy_callback)(void *context, void *dest, - size_t offset, size_t maxsize), - void *context, - int size, - int is_blocking) -{ - VCHIQ_SHARED_STATE_T *local; - VCHIQ_HEADER_T *header; +queue_message_sync(struct vchiq_state *state, struct vchiq_service *service, + int msgid, + ssize_t (*copy_callback)(void *context, void *dest, + size_t offset, size_t maxsize), + void *context, int size, int is_blocking) +{ + struct vchiq_shared_state *local; + struct vchiq_header *header; ssize_t callback_result; local = state->local; @@ -1073,11 +1066,11 @@ queue_message_sync(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, (mutex_lock_killable(&state->sync_mutex) != 0)) return VCHIQ_RETRY; - remote_event_wait(state, &local->sync_release); + remote_event_wait(&state->sync_release_event, &local->sync_release); rmb(); - header = (VCHIQ_HEADER_T *)SLOT_DATA_FROM_INDEX(state, + header = (struct vchiq_header *)SLOT_DATA_FROM_INDEX(state, local->slot_sync); { @@ -1140,9 +1133,6 @@ queue_message_sync(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, size); } - /* Make sure the new header is visible to the peer. */ - wmb(); - remote_event_signal(&state->remote->sync_trigger); if (VCHIQ_MSG_TYPE(msgid) != VCHIQ_MSG_PAUSE) @@ -1152,14 +1142,14 @@ queue_message_sync(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, } static inline void -claim_slot(VCHIQ_SLOT_INFO_T *slot) +claim_slot(struct vchiq_slot_info *slot) { slot->use_count++; } static void -release_slot(VCHIQ_STATE_T *state, VCHIQ_SLOT_INFO_T *slot_info, - VCHIQ_HEADER_T *header, VCHIQ_SERVICE_T *service) +release_slot(struct vchiq_state *state, struct vchiq_slot_info *slot_info, + struct vchiq_header *header, struct vchiq_service *service) { int release_count; @@ -1211,8 +1201,8 @@ release_slot(VCHIQ_STATE_T *state, VCHIQ_SLOT_INFO_T *slot_info, /* Called by the slot handler - don't hold the bulk mutex */ static VCHIQ_STATUS_T -notify_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue, - int retry_poll) +notify_bulks(struct vchiq_service *service, struct vchiq_bulk_queue *queue, + int retry_poll) { VCHIQ_STATUS_T status = VCHIQ_SUCCESS; @@ -1222,36 +1212,11 @@ notify_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue, (queue == &service->bulk_tx) ? 't' : 'r', queue->process, queue->remote_notify, queue->remove); - if (service->state->is_master) { - while (queue->remote_notify != queue->process) { - VCHIQ_BULK_T *bulk = - &queue->bulks[BULK_INDEX(queue->remote_notify)]; - int msgtype = (bulk->dir == VCHIQ_BULK_TRANSMIT) ? - VCHIQ_MSG_BULK_RX_DONE : VCHIQ_MSG_BULK_TX_DONE; - int msgid = VCHIQ_MAKE_MSG(msgtype, service->localport, - service->remoteport); - /* Only reply to non-dummy bulk requests */ - if (bulk->remote_data) { - status = queue_message( - service->state, - NULL, - msgid, - memcpy_copy_callback, - &bulk->actual, - 4, - 0); - if (status != VCHIQ_SUCCESS) - break; - } - queue->remote_notify++; - } - } else { - queue->remote_notify = queue->process; - } + queue->remote_notify = queue->process; if (status == VCHIQ_SUCCESS) { while (queue->remove != queue->remote_notify) { - VCHIQ_BULK_T *bulk = + struct vchiq_bulk *bulk = &queue->bulks[BULK_INDEX(queue->remove)]; /* Only generate callbacks for non-dummy bulk @@ -1282,7 +1247,7 @@ notify_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue, waiter = bulk->userdata; if (waiter) { waiter->actual = bulk->actual; - up(&waiter->event); + complete(&waiter->event); } spin_unlock(&bulk_waiter_spinlock); } else if (bulk->mode == @@ -1305,7 +1270,7 @@ notify_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue, } queue->remove++; - up(&service->bulk_remove_event); + complete(&service->bulk_remove_event); } if (!retry_poll) status = VCHIQ_SUCCESS; @@ -1321,7 +1286,7 @@ notify_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue, /* Called by the slot handler thread */ static void -poll_services(VCHIQ_STATE_T *state) +poll_services(struct vchiq_state *state) { int group, i; @@ -1331,7 +1296,7 @@ poll_services(VCHIQ_STATE_T *state) flags = atomic_xchg(&state->poll_services[group], 0); for (i = 0; flags; i++) { if (flags & (1 << i)) { - VCHIQ_SERVICE_T *service = + struct vchiq_service *service = find_service_by_port(state, (group<<5) + i); u32 service_flags; @@ -1385,66 +1350,10 @@ poll_services(VCHIQ_STATE_T *state) } } -/* Called by the slot handler or application threads, holding the bulk mutex. */ -static int -resolve_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue) -{ - VCHIQ_STATE_T *state = service->state; - int resolved = 0; - - while ((queue->process != queue->local_insert) && - (queue->process != queue->remote_insert)) { - VCHIQ_BULK_T *bulk = &queue->bulks[BULK_INDEX(queue->process)]; - - vchiq_log_trace(vchiq_core_log_level, - "%d: rb:%d %cx - li=%x ri=%x p=%x", - state->id, service->localport, - (queue == &service->bulk_tx) ? 't' : 'r', - queue->local_insert, queue->remote_insert, - queue->process); - - WARN_ON(!((int)(queue->local_insert - queue->process) > 0)); - WARN_ON(!((int)(queue->remote_insert - queue->process) > 0)); - - if (mutex_lock_killable(&state->bulk_transfer_mutex)) - break; - - vchiq_transfer_bulk(bulk); - mutex_unlock(&state->bulk_transfer_mutex); - - if (SRVTRACE_ENABLED(service, VCHIQ_LOG_INFO)) { - const char *header = (queue == &service->bulk_tx) ? - "Send Bulk to" : "Recv Bulk from"; - if (bulk->actual != VCHIQ_BULK_ACTUAL_ABORTED) - vchiq_log_info(SRVTRACE_LEVEL(service), - "%s %c%c%c%c d:%d len:%d %pK<->%pK", - header, - VCHIQ_FOURCC_AS_4CHARS( - service->base.fourcc), - service->remoteport, bulk->size, - bulk->data, bulk->remote_data); - else - vchiq_log_info(SRVTRACE_LEVEL(service), - "%s %c%c%c%c d:%d ABORTED - tx len:%d," - " rx len:%d %pK<->%pK", - header, - VCHIQ_FOURCC_AS_4CHARS( - service->base.fourcc), - service->remoteport, - bulk->size, bulk->remote_size, - bulk->data, bulk->remote_data); - } - - vchiq_complete_bulk(bulk); - queue->process++; - resolved++; - } - return resolved; -} - /* Called with the bulk_mutex held */ static void -abort_outstanding_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue) +abort_outstanding_bulks(struct vchiq_service *service, + struct vchiq_bulk_queue *queue) { int is_tx = (queue == &service->bulk_tx); @@ -1458,7 +1367,8 @@ abort_outstanding_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue) while ((queue->process != queue->local_insert) || (queue->process != queue->remote_insert)) { - VCHIQ_BULK_T *bulk = &queue->bulks[BULK_INDEX(queue->process)]; + struct vchiq_bulk *bulk = + &queue->bulks[BULK_INDEX(queue->process)]; if (queue->process == queue->remote_insert) { /* fabricate a matching dummy bulk */ @@ -1492,69 +1402,10 @@ abort_outstanding_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue) } } -/* Called from the slot handler thread */ -static void -pause_bulks(VCHIQ_STATE_T *state) -{ - if (unlikely(atomic_inc_return(&pause_bulks_count) != 1)) { - WARN_ON_ONCE(1); - atomic_set(&pause_bulks_count, 1); - return; - } - - /* Block bulk transfers from all services */ - mutex_lock(&state->bulk_transfer_mutex); -} - -/* Called from the slot handler thread */ -static void -resume_bulks(VCHIQ_STATE_T *state) -{ - int i; - - if (unlikely(atomic_dec_return(&pause_bulks_count) != 0)) { - WARN_ON_ONCE(1); - atomic_set(&pause_bulks_count, 0); - return; - } - - /* Allow bulk transfers from all services */ - mutex_unlock(&state->bulk_transfer_mutex); - - if (state->deferred_bulks == 0) - return; - - /* Deal with any bulks which had to be deferred due to being in - * paused state. Don't try to match up to number of deferred bulks - * in case we've had something come and close the service in the - * interim - just process all bulk queues for all services */ - vchiq_log_info(vchiq_core_log_level, "%s: processing %d deferred bulks", - __func__, state->deferred_bulks); - - for (i = 0; i < state->unused_service; i++) { - VCHIQ_SERVICE_T *service = state->services[i]; - int resolved_rx = 0; - int resolved_tx = 0; - - if (!service || (service->srvstate != VCHIQ_SRVSTATE_OPEN)) - continue; - - mutex_lock(&service->bulk_mutex); - resolved_rx = resolve_bulks(service, &service->bulk_rx); - resolved_tx = resolve_bulks(service, &service->bulk_tx); - mutex_unlock(&service->bulk_mutex); - if (resolved_rx) - notify_bulks(service, &service->bulk_rx, 1); - if (resolved_tx) - notify_bulks(service, &service->bulk_tx, 1); - } - state->deferred_bulks = 0; -} - static int -parse_open(VCHIQ_STATE_T *state, VCHIQ_HEADER_T *header) +parse_open(struct vchiq_state *state, struct vchiq_header *header) { - VCHIQ_SERVICE_T *service = NULL; + struct vchiq_service *service = NULL; int msgid, size; unsigned int localport, remoteport; @@ -1608,9 +1459,7 @@ parse_open(VCHIQ_STATE_T *state, VCHIQ_HEADER_T *header) service->sync = 0; /* Acknowledge the OPEN */ - if (service->sync && - (state->version_common >= - VCHIQ_VERSION_SYNCHRONOUS_MODE)) { + if (service->sync) { if (queue_message_sync( state, NULL, @@ -1676,10 +1525,10 @@ bail_not_ready: /* Called by the slot handler thread */ static void -parse_rx_slots(VCHIQ_STATE_T *state) +parse_rx_slots(struct vchiq_state *state) { - VCHIQ_SHARED_STATE_T *remote = state->remote; - VCHIQ_SERVICE_T *service = NULL; + struct vchiq_shared_state *remote = state->remote; + struct vchiq_service *service = NULL; int tx_pos; DEBUG_INITIALISE(state->local) @@ -1687,7 +1536,7 @@ parse_rx_slots(VCHIQ_STATE_T *state) tx_pos = remote->tx_pos; while (state->rx_pos != tx_pos) { - VCHIQ_HEADER_T *header; + struct vchiq_header *header; int msgid, size; int type; unsigned int localport, remoteport; @@ -1711,7 +1560,7 @@ parse_rx_slots(VCHIQ_STATE_T *state) state->rx_info->release_count = 0; } - header = (VCHIQ_HEADER_T *)(state->rx_data + + header = (struct vchiq_header *)(state->rx_data + (state->rx_pos & VCHIQ_SLOT_MASK)); DEBUG_VALUE(PARSE_HEADER, (int)(long)header); msgid = header->msgid; @@ -1814,7 +1663,7 @@ parse_rx_slots(VCHIQ_STATE_T *state) service->remoteport = remoteport; vchiq_set_service_state(service, VCHIQ_SRVSTATE_OPEN); - up(&service->remove_event); + complete(&service->remove_event); } else vchiq_log_error(vchiq_core_log_level, "OPENACK received in state %s", @@ -1866,90 +1715,32 @@ parse_rx_slots(VCHIQ_STATE_T *state) case VCHIQ_MSG_CONNECT: vchiq_log_info(vchiq_core_log_level, "%d: prs CONNECT@%pK", state->id, header); - state->version_common = ((VCHIQ_SLOT_ZERO_T *) + state->version_common = ((struct vchiq_slot_zero *) state->slot_data)->version; - up(&state->connect); + complete(&state->connect); break; case VCHIQ_MSG_BULK_RX: - case VCHIQ_MSG_BULK_TX: { - VCHIQ_BULK_QUEUE_T *queue; - - WARN_ON(!state->is_master); - queue = (type == VCHIQ_MSG_BULK_RX) ? - &service->bulk_tx : &service->bulk_rx; - if ((service->remoteport == remoteport) - && (service->srvstate == - VCHIQ_SRVSTATE_OPEN)) { - VCHIQ_BULK_T *bulk; - int resolved = 0; - - DEBUG_TRACE(PARSE_LINE); - if (mutex_lock_killable( - &service->bulk_mutex) != 0) { - DEBUG_TRACE(PARSE_LINE); - goto bail_not_ready; - } - - WARN_ON(!(queue->remote_insert < queue->remove + - VCHIQ_NUM_SERVICE_BULKS)); - bulk = &queue->bulks[ - BULK_INDEX(queue->remote_insert)]; - bulk->remote_data = - (void *)(long)((int *)header->data)[0]; - bulk->remote_size = ((int *)header->data)[1]; - wmb(); - - vchiq_log_info(vchiq_core_log_level, - "%d: prs %s@%pK (%d->%d) %x@%pK", - state->id, msg_type_str(type), - header, remoteport, localport, - bulk->remote_size, bulk->remote_data); - - queue->remote_insert++; - - if (atomic_read(&pause_bulks_count)) { - state->deferred_bulks++; - vchiq_log_info(vchiq_core_log_level, - "%s: deferring bulk (%d)", - __func__, - state->deferred_bulks); - if (state->conn_state != - VCHIQ_CONNSTATE_PAUSE_SENT) - vchiq_log_error( - vchiq_core_log_level, - "%s: bulks paused in " - "unexpected state %s", - __func__, - conn_state_names[ - state->conn_state]); - } else if (state->conn_state == - VCHIQ_CONNSTATE_CONNECTED) { - DEBUG_TRACE(PARSE_LINE); - resolved = resolve_bulks(service, - queue); - } - - mutex_unlock(&service->bulk_mutex); - if (resolved) - notify_bulks(service, queue, - 1/*retry_poll*/); - } - } break; + case VCHIQ_MSG_BULK_TX: + /* + * We should never receive a bulk request from the + * other side since we're not setup to perform as the + * master. + */ + WARN_ON(1); + break; case VCHIQ_MSG_BULK_RX_DONE: case VCHIQ_MSG_BULK_TX_DONE: - WARN_ON(state->is_master); if ((service->remoteport == remoteport) && (service->srvstate != VCHIQ_SRVSTATE_FREE)) { - VCHIQ_BULK_QUEUE_T *queue; - VCHIQ_BULK_T *bulk; + struct vchiq_bulk_queue *queue; + struct vchiq_bulk *bulk; queue = (type == VCHIQ_MSG_BULK_RX_DONE) ? &service->bulk_rx : &service->bulk_tx; DEBUG_TRACE(PARSE_LINE); - if (mutex_lock_killable( - &service->bulk_mutex) != 0) { + if (mutex_lock_killable(&service->bulk_mutex)) { DEBUG_TRACE(PARSE_LINE); goto bail_not_ready; } @@ -2026,8 +1817,6 @@ parse_rx_slots(VCHIQ_STATE_T *state) NULL, NULL, 0, QMFLAGS_NO_MUTEX_UNLOCK) == VCHIQ_RETRY) goto bail_not_ready; - if (state->is_master) - pause_bulks(state); } /* At this point slot_mutex is held */ vchiq_set_conn_state(state, VCHIQ_CONNSTATE_PAUSED); @@ -2039,8 +1828,6 @@ parse_rx_slots(VCHIQ_STATE_T *state) state->id, header, size); /* Release the slot mutex */ mutex_unlock(&state->slot_mutex); - if (state->is_master) - resume_bulks(state); vchiq_set_conn_state(state, VCHIQ_CONNSTATE_CONNECTED); vchiq_platform_resumed(state); break; @@ -2090,15 +1877,15 @@ bail_not_ready: static int slot_handler_func(void *v) { - VCHIQ_STATE_T *state = (VCHIQ_STATE_T *) v; - VCHIQ_SHARED_STATE_T *local = state->local; + struct vchiq_state *state = (struct vchiq_state *)v; + struct vchiq_shared_state *local = state->local; DEBUG_INITIALISE(local) while (1) { DEBUG_COUNT(SLOT_HANDLER_COUNT); DEBUG_TRACE(SLOT_HANDLER_LINE); - remote_event_wait(state, &local->trigger); + remote_event_wait(&state->trigger_event, &local->trigger); rmb(); @@ -2119,8 +1906,6 @@ slot_handler_func(void *v) break; case VCHIQ_CONNSTATE_PAUSING: - if (state->is_master) - pause_bulks(state); if (queue_message(state, NULL, VCHIQ_MAKE_MSG(VCHIQ_MSG_PAUSE, 0, 0), NULL, NULL, 0, @@ -2129,8 +1914,6 @@ slot_handler_func(void *v) vchiq_set_conn_state(state, VCHIQ_CONNSTATE_PAUSE_SENT); } else { - if (state->is_master) - resume_bulks(state); /* Retry later */ state->poll_needed = 1; } @@ -2145,8 +1928,6 @@ slot_handler_func(void *v) VCHIQ_MAKE_MSG(VCHIQ_MSG_RESUME, 0, 0), NULL, NULL, 0, QMFLAGS_NO_MUTEX_LOCK) != VCHIQ_RETRY) { - if (state->is_master) - resume_bulks(state); vchiq_set_conn_state(state, VCHIQ_CONNSTATE_CONNECTED); vchiq_platform_resumed(state); @@ -2180,8 +1961,8 @@ slot_handler_func(void *v) static int recycle_func(void *v) { - VCHIQ_STATE_T *state = (VCHIQ_STATE_T *) v; - VCHIQ_SHARED_STATE_T *local = state->local; + struct vchiq_state *state = (struct vchiq_state *)v; + struct vchiq_shared_state *local = state->local; BITSET_T *found; size_t length; @@ -2193,7 +1974,7 @@ recycle_func(void *v) return -ENOMEM; while (1) { - remote_event_wait(state, &local->recycle); + remote_event_wait(&state->recycle_event, &local->recycle); process_free_queue(state, found, length); } @@ -2204,18 +1985,19 @@ recycle_func(void *v) static int sync_func(void *v) { - VCHIQ_STATE_T *state = (VCHIQ_STATE_T *) v; - VCHIQ_SHARED_STATE_T *local = state->local; - VCHIQ_HEADER_T *header = (VCHIQ_HEADER_T *)SLOT_DATA_FROM_INDEX(state, - state->remote->slot_sync); + struct vchiq_state *state = (struct vchiq_state *)v; + struct vchiq_shared_state *local = state->local; + struct vchiq_header *header = + (struct vchiq_header *)SLOT_DATA_FROM_INDEX(state, + state->remote->slot_sync); while (1) { - VCHIQ_SERVICE_T *service; + struct vchiq_service *service; int msgid, size; int type; unsigned int localport, remoteport; - remote_event_wait(state, &local->sync_trigger); + remote_event_wait(&state->sync_trigger_event, &local->sync_trigger); rmb(); @@ -2269,7 +2051,7 @@ sync_func(void *v) vchiq_set_service_state(service, VCHIQ_SRVSTATE_OPENSYNC); service->sync = 1; - up(&service->remove_event); + complete(&service->remove_event); } release_message_sync(state, header); break; @@ -2308,7 +2090,7 @@ sync_func(void *v) } static void -init_bulk_queue(VCHIQ_BULK_QUEUE_T *queue) +init_bulk_queue(struct vchiq_bulk_queue *queue) { queue->local_insert = 0; queue->remote_insert = 0; @@ -2323,13 +2105,13 @@ get_conn_state_name(VCHIQ_CONNSTATE_T conn_state) return conn_state_names[conn_state]; } -VCHIQ_SLOT_ZERO_T * +struct vchiq_slot_zero * vchiq_init_slots(void *mem_base, int mem_size) { int mem_align = (int)((VCHIQ_SLOT_SIZE - (long)mem_base) & VCHIQ_SLOT_MASK); - VCHIQ_SLOT_ZERO_T *slot_zero = - (VCHIQ_SLOT_ZERO_T *)((char *)mem_base + mem_align); + struct vchiq_slot_zero *slot_zero = + (struct vchiq_slot_zero *)((char *)mem_base + mem_align); int num_slots = (mem_size - mem_align)/VCHIQ_SLOT_SIZE; int first_data_slot = VCHIQ_SLOT_ZERO_SLOTS; @@ -2343,12 +2125,12 @@ vchiq_init_slots(void *mem_base, int mem_size) return NULL; } - memset(slot_zero, 0, sizeof(VCHIQ_SLOT_ZERO_T)); + memset(slot_zero, 0, sizeof(struct vchiq_slot_zero)); slot_zero->magic = VCHIQ_MAGIC; slot_zero->version = VCHIQ_VERSION; slot_zero->version_min = VCHIQ_VERSION_MIN; - slot_zero->slot_zero_size = sizeof(VCHIQ_SLOT_ZERO_T); + slot_zero->slot_zero_size = sizeof(struct vchiq_slot_zero); slot_zero->slot_size = VCHIQ_SLOT_SIZE; slot_zero->max_slots = VCHIQ_MAX_SLOTS; slot_zero->max_slots_per_side = VCHIQ_MAX_SLOTS_PER_SIDE; @@ -2364,90 +2146,24 @@ vchiq_init_slots(void *mem_base, int mem_size) } VCHIQ_STATUS_T -vchiq_init_state(VCHIQ_STATE_T *state, VCHIQ_SLOT_ZERO_T *slot_zero, - int is_master) +vchiq_init_state(struct vchiq_state *state, struct vchiq_slot_zero *slot_zero) { - VCHIQ_SHARED_STATE_T *local; - VCHIQ_SHARED_STATE_T *remote; + struct vchiq_shared_state *local; + struct vchiq_shared_state *remote; VCHIQ_STATUS_T status; char threadname[16]; int i; vchiq_log_warning(vchiq_core_log_level, - "%s: slot_zero = %pK, is_master = %d", - __func__, slot_zero, is_master); + "%s: slot_zero = %pK", __func__, slot_zero); if (vchiq_states[0]) { pr_err("%s: VCHIQ state already initialized\n", __func__); return VCHIQ_ERROR; } - /* Check the input configuration */ - - if (slot_zero->magic != VCHIQ_MAGIC) { - vchiq_loud_error_header(); - vchiq_loud_error("Invalid VCHIQ magic value found."); - vchiq_loud_error("slot_zero=%pK: magic=%x (expected %x)", - slot_zero, slot_zero->magic, VCHIQ_MAGIC); - vchiq_loud_error_footer(); - return VCHIQ_ERROR; - } - - if (slot_zero->version < VCHIQ_VERSION_MIN) { - vchiq_loud_error_header(); - vchiq_loud_error("Incompatible VCHIQ versions found."); - vchiq_loud_error("slot_zero=%pK: VideoCore version=%d (minimum %d)", - slot_zero, slot_zero->version, VCHIQ_VERSION_MIN); - vchiq_loud_error("Restart with a newer VideoCore image."); - vchiq_loud_error_footer(); - return VCHIQ_ERROR; - } - - if (VCHIQ_VERSION < slot_zero->version_min) { - vchiq_loud_error_header(); - vchiq_loud_error("Incompatible VCHIQ versions found."); - vchiq_loud_error("slot_zero=%pK: version=%d (VideoCore minimum %d)", - slot_zero, VCHIQ_VERSION, slot_zero->version_min); - vchiq_loud_error("Restart with a newer kernel."); - vchiq_loud_error_footer(); - return VCHIQ_ERROR; - } - - if ((slot_zero->slot_zero_size != sizeof(VCHIQ_SLOT_ZERO_T)) || - (slot_zero->slot_size != VCHIQ_SLOT_SIZE) || - (slot_zero->max_slots != VCHIQ_MAX_SLOTS) || - (slot_zero->max_slots_per_side != VCHIQ_MAX_SLOTS_PER_SIDE)) { - vchiq_loud_error_header(); - if (slot_zero->slot_zero_size != sizeof(VCHIQ_SLOT_ZERO_T)) - vchiq_loud_error("slot_zero=%pK: slot_zero_size=%d (expected %d)", - slot_zero, slot_zero->slot_zero_size, - (int)sizeof(VCHIQ_SLOT_ZERO_T)); - if (slot_zero->slot_size != VCHIQ_SLOT_SIZE) - vchiq_loud_error("slot_zero=%pK: slot_size=%d (expected %d)", - slot_zero, slot_zero->slot_size, - VCHIQ_SLOT_SIZE); - if (slot_zero->max_slots != VCHIQ_MAX_SLOTS) - vchiq_loud_error("slot_zero=%pK: max_slots=%d (expected %d)", - slot_zero, slot_zero->max_slots, - VCHIQ_MAX_SLOTS); - if (slot_zero->max_slots_per_side != VCHIQ_MAX_SLOTS_PER_SIDE) - vchiq_loud_error("slot_zero=%pK: max_slots_per_side=%d (expected %d)", - slot_zero, slot_zero->max_slots_per_side, - VCHIQ_MAX_SLOTS_PER_SIDE); - vchiq_loud_error_footer(); - return VCHIQ_ERROR; - } - - if (VCHIQ_VERSION < slot_zero->version) - slot_zero->version = VCHIQ_VERSION; - - if (is_master) { - local = &slot_zero->master; - remote = &slot_zero->slave; - } else { - local = &slot_zero->slave; - remote = &slot_zero->master; - } + local = &slot_zero->slave; + remote = &slot_zero->master; if (local->initialised) { vchiq_loud_error_header(); @@ -2455,15 +2171,12 @@ vchiq_init_state(VCHIQ_STATE_T *state, VCHIQ_SLOT_ZERO_T *slot_zero, vchiq_loud_error("local state has already been " "initialised"); else - vchiq_loud_error("master/slave mismatch - two %ss", - is_master ? "master" : "slave"); + vchiq_loud_error("master/slave mismatch two slaves"); vchiq_loud_error_footer(); return VCHIQ_ERROR; } - memset(state, 0, sizeof(VCHIQ_STATE_T)); - - state->is_master = is_master; + memset(state, 0, sizeof(struct vchiq_state)); /* initialize shared state pointers @@ -2471,39 +2184,34 @@ vchiq_init_state(VCHIQ_STATE_T *state, VCHIQ_SLOT_ZERO_T *slot_zero, state->local = local; state->remote = remote; - state->slot_data = (VCHIQ_SLOT_T *)slot_zero; + state->slot_data = (struct vchiq_slot *)slot_zero; /* initialize events and mutexes */ - sema_init(&state->connect, 0); + init_completion(&state->connect); mutex_init(&state->mutex); - sema_init(&state->trigger_event, 0); - sema_init(&state->recycle_event, 0); - sema_init(&state->sync_trigger_event, 0); - sema_init(&state->sync_release_event, 0); - mutex_init(&state->slot_mutex); mutex_init(&state->recycle_mutex); mutex_init(&state->sync_mutex); mutex_init(&state->bulk_transfer_mutex); - sema_init(&state->slot_available_event, 0); - sema_init(&state->slot_remove_event, 0); - sema_init(&state->data_quota_event, 0); + init_completion(&state->slot_available_event); + init_completion(&state->slot_remove_event); + init_completion(&state->data_quota_event); state->slot_queue_available = 0; for (i = 0; i < VCHIQ_MAX_SERVICES; i++) { - VCHIQ_SERVICE_QUOTA_T *service_quota = + struct vchiq_service_quota *service_quota = &state->service_quotas[i]; - sema_init(&service_quota->quota_event, 0); + init_completion(&service_quota->quota_event); } for (i = local->slot_first; i <= local->slot_last; i++) { local->slot_queue[state->slot_queue_available++] = i; - up(&state->slot_available_event); + complete(&state->slot_available_event); } state->default_slot_quota = state->slot_queue_available/2; @@ -2515,24 +2223,18 @@ vchiq_init_state(VCHIQ_STATE_T *state, VCHIQ_SLOT_ZERO_T *slot_zero, state->data_use_count = 0; state->data_quota = state->slot_queue_available - 1; - local->trigger.event = offsetof(VCHIQ_STATE_T, trigger_event); - remote_event_create(state, &local->trigger); + remote_event_create(&state->trigger_event, &local->trigger); local->tx_pos = 0; - - local->recycle.event = offsetof(VCHIQ_STATE_T, recycle_event); - remote_event_create(state, &local->recycle); + remote_event_create(&state->recycle_event, &local->recycle); local->slot_queue_recycle = state->slot_queue_available; - - local->sync_trigger.event = offsetof(VCHIQ_STATE_T, sync_trigger_event); - remote_event_create(state, &local->sync_trigger); - - local->sync_release.event = offsetof(VCHIQ_STATE_T, sync_release_event); - remote_event_create(state, &local->sync_release); + remote_event_create(&state->sync_trigger_event, &local->sync_trigger); + remote_event_create(&state->sync_release_event, &local->sync_release); /* At start-of-day, the slot is empty and available */ - ((VCHIQ_HEADER_T *)SLOT_DATA_FROM_INDEX(state, local->slot_sync))->msgid - = VCHIQ_MSGID_PADDING; - remote_event_signal_local(state, &local->sync_release); + ((struct vchiq_header *) + SLOT_DATA_FROM_INDEX(state, local->slot_sync))->msgid = + VCHIQ_MSGID_PADDING; + remote_event_signal_local(&state->sync_release_event, &local->sync_release); local->debug[DEBUG_ENTRIES] = DEBUG_MAX; @@ -2598,17 +2300,18 @@ fail_free_handler_thread: } /* Called from application thread when a client or server service is created. */ -VCHIQ_SERVICE_T * -vchiq_add_service_internal(VCHIQ_STATE_T *state, - const VCHIQ_SERVICE_PARAMS_T *params, int srvstate, - VCHIQ_INSTANCE_T instance, VCHIQ_USERDATA_TERM_T userdata_term) -{ - VCHIQ_SERVICE_T *service; - VCHIQ_SERVICE_T **pservice = NULL; - VCHIQ_SERVICE_QUOTA_T *service_quota; +struct vchiq_service * +vchiq_add_service_internal(struct vchiq_state *state, + const struct vchiq_service_params *params, + int srvstate, VCHIQ_INSTANCE_T instance, + VCHIQ_USERDATA_TERM_T userdata_term) +{ + struct vchiq_service *service; + struct vchiq_service **pservice = NULL; + struct vchiq_service_quota *service_quota; int i; - service = kmalloc(sizeof(VCHIQ_SERVICE_T), GFP_KERNEL); + service = kmalloc(sizeof(*service), GFP_KERNEL); if (!service) return service; @@ -2637,8 +2340,8 @@ vchiq_add_service_internal(VCHIQ_STATE_T *state, service->service_use_count = 0; init_bulk_queue(&service->bulk_tx); init_bulk_queue(&service->bulk_rx); - sema_init(&service->remove_event, 0); - sema_init(&service->bulk_remove_event, 0); + init_completion(&service->remove_event); + init_completion(&service->bulk_remove_event); mutex_init(&service->bulk_mutex); memset(&service->stats, 0, sizeof(service->stats)); @@ -2660,7 +2363,7 @@ vchiq_add_service_internal(VCHIQ_STATE_T *state, if (srvstate == VCHIQ_SRVSTATE_OPENING) { for (i = 0; i < state->unused_service; i++) { - VCHIQ_SERVICE_T *srv = state->services[i]; + struct vchiq_service *srv = state->services[i]; if (!srv) { pservice = &state->services[i]; @@ -2669,7 +2372,7 @@ vchiq_add_service_internal(VCHIQ_STATE_T *state, } } else { for (i = (state->unused_service - 1); i >= 0; i--) { - VCHIQ_SERVICE_T *srv = state->services[i]; + struct vchiq_service *srv = state->services[i]; if (!srv) pservice = &state->services[i]; @@ -2730,7 +2433,7 @@ vchiq_add_service_internal(VCHIQ_STATE_T *state, } VCHIQ_STATUS_T -vchiq_open_service_internal(VCHIQ_SERVICE_T *service, int client_id) +vchiq_open_service_internal(struct vchiq_service *service, int client_id) { struct vchiq_open_payload payload = { service->base.fourcc, @@ -2753,7 +2456,7 @@ vchiq_open_service_internal(VCHIQ_SERVICE_T *service, int client_id) QMFLAGS_IS_BLOCKING); if (status == VCHIQ_SUCCESS) { /* Wait for the ACK/NAK */ - if (down_interruptible(&service->remove_event) != 0) { + if (wait_for_completion_killable(&service->remove_event)) { status = VCHIQ_RETRY; vchiq_release_service_internal(service); } else if ((service->srvstate != VCHIQ_SRVSTATE_OPEN) && @@ -2773,17 +2476,17 @@ vchiq_open_service_internal(VCHIQ_SERVICE_T *service, int client_id) } static void -release_service_messages(VCHIQ_SERVICE_T *service) +release_service_messages(struct vchiq_service *service) { - VCHIQ_STATE_T *state = service->state; + struct vchiq_state *state = service->state; int slot_last = state->remote->slot_last; int i; /* Release any claimed messages aimed at this service */ if (service->sync) { - VCHIQ_HEADER_T *header = - (VCHIQ_HEADER_T *)SLOT_DATA_FROM_INDEX(state, + struct vchiq_header *header = + (struct vchiq_header *)SLOT_DATA_FROM_INDEX(state, state->remote->slot_sync); if (VCHIQ_MSG_DSTPORT(header->msgid) == service->localport) release_message_sync(state, header); @@ -2792,7 +2495,7 @@ release_service_messages(VCHIQ_SERVICE_T *service) } for (i = state->remote->slot_first; i <= slot_last; i++) { - VCHIQ_SLOT_INFO_T *slot_info = + struct vchiq_slot_info *slot_info = SLOT_INFO_FROM_INDEX(state, i); if (slot_info->release_count != slot_info->use_count) { char *data = @@ -2808,8 +2511,8 @@ release_service_messages(VCHIQ_SERVICE_T *service) pos = 0; while (pos < end) { - VCHIQ_HEADER_T *header = - (VCHIQ_HEADER_T *)(data + pos); + struct vchiq_header *header = + (struct vchiq_header *)(data + pos); int msgid = header->msgid; int port = VCHIQ_MSG_DSTPORT(msgid); @@ -2834,7 +2537,7 @@ release_service_messages(VCHIQ_SERVICE_T *service) } static int -do_abort_bulks(VCHIQ_SERVICE_T *service) +do_abort_bulks(struct vchiq_service *service) { VCHIQ_STATUS_T status; @@ -2853,7 +2556,7 @@ do_abort_bulks(VCHIQ_SERVICE_T *service) } static VCHIQ_STATUS_T -close_service_complete(VCHIQ_SERVICE_T *service, int failstate) +close_service_complete(struct vchiq_service *service, int failstate) { VCHIQ_STATUS_T status; int is_server = (service->public_fourcc != VCHIQ_FOURCC_INVALID); @@ -2905,7 +2608,7 @@ close_service_complete(VCHIQ_SERVICE_T *service, int failstate) if (is_server) service->closing = 0; - up(&service->remove_event); + complete(&service->remove_event); } } else vchiq_set_service_state(service, failstate); @@ -2915,9 +2618,9 @@ close_service_complete(VCHIQ_SERVICE_T *service, int failstate) /* Called by the slot handler */ VCHIQ_STATUS_T -vchiq_close_service_internal(VCHIQ_SERVICE_T *service, int close_recvd) +vchiq_close_service_internal(struct vchiq_service *service, int close_recvd) { - VCHIQ_STATE_T *state = service->state; + struct vchiq_state *state = service->state; VCHIQ_STATUS_T status = VCHIQ_SUCCESS; int is_server = (service->public_fourcc != VCHIQ_FOURCC_INVALID); @@ -2946,7 +2649,7 @@ vchiq_close_service_internal(VCHIQ_SERVICE_T *service, int close_recvd) vchiq_set_service_state(service, VCHIQ_SRVSTATE_LISTENING); } - up(&service->remove_event); + complete(&service->remove_event); } else vchiq_free_service_internal(service); break; @@ -2955,7 +2658,7 @@ vchiq_close_service_internal(VCHIQ_SERVICE_T *service, int close_recvd) /* The open was rejected - tell the user */ vchiq_set_service_state(service, VCHIQ_SRVSTATE_CLOSEWAIT); - up(&service->remove_event); + complete(&service->remove_event); } else { /* Shutdown mid-open - let the other side know */ status = queue_message(state, service, @@ -2971,7 +2674,7 @@ vchiq_close_service_internal(VCHIQ_SERVICE_T *service, int close_recvd) mutex_lock(&state->sync_mutex); /* fall through */ case VCHIQ_SRVSTATE_OPEN: - if (state->is_master || close_recvd) { + if (close_recvd) { if (!do_abort_bulks(service)) status = VCHIQ_RETRY; } @@ -3018,11 +2721,9 @@ vchiq_close_service_internal(VCHIQ_SERVICE_T *service, int close_recvd) /* This happens when a process is killed mid-close */ break; - if (!state->is_master) { - if (!do_abort_bulks(service)) { - status = VCHIQ_RETRY; - break; - } + if (!do_abort_bulks(service)) { + status = VCHIQ_RETRY; + break; } if (status == VCHIQ_SUCCESS) @@ -3051,9 +2752,9 @@ vchiq_close_service_internal(VCHIQ_SERVICE_T *service, int close_recvd) /* Called from the application process upon process death */ void -vchiq_terminate_service_internal(VCHIQ_SERVICE_T *service) +vchiq_terminate_service_internal(struct vchiq_service *service) { - VCHIQ_STATE_T *state = service->state; + struct vchiq_state *state = service->state; vchiq_log_info(vchiq_core_log_level, "%d: tsi - (%d<->%d)", state->id, service->localport, service->remoteport); @@ -3066,9 +2767,9 @@ vchiq_terminate_service_internal(VCHIQ_SERVICE_T *service) /* Called from the slot handler */ void -vchiq_free_service_internal(VCHIQ_SERVICE_T *service) +vchiq_free_service_internal(struct vchiq_service *service) { - VCHIQ_STATE_T *state = service->state; + struct vchiq_state *state = service->state; vchiq_log_info(vchiq_core_log_level, "%d: fsi - (%d)", state->id, service->localport); @@ -3090,16 +2791,16 @@ vchiq_free_service_internal(VCHIQ_SERVICE_T *service) vchiq_set_service_state(service, VCHIQ_SRVSTATE_FREE); - up(&service->remove_event); + complete(&service->remove_event); /* Release the initial lock */ unlock_service(service); } VCHIQ_STATUS_T -vchiq_connect_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance) +vchiq_connect_internal(struct vchiq_state *state, VCHIQ_INSTANCE_T instance) { - VCHIQ_SERVICE_T *service; + struct vchiq_service *service; int i; /* Find all services registered to this client and enable them. */ @@ -3122,20 +2823,20 @@ vchiq_connect_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance) } if (state->conn_state == VCHIQ_CONNSTATE_CONNECTING) { - if (down_interruptible(&state->connect) != 0) + if (wait_for_completion_killable(&state->connect)) return VCHIQ_RETRY; vchiq_set_conn_state(state, VCHIQ_CONNSTATE_CONNECTED); - up(&state->connect); + complete(&state->connect); } return VCHIQ_SUCCESS; } VCHIQ_STATUS_T -vchiq_shutdown_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance) +vchiq_shutdown_internal(struct vchiq_state *state, VCHIQ_INSTANCE_T instance) { - VCHIQ_SERVICE_T *service; + struct vchiq_service *service; int i; /* Find all services registered to this client and enable them. */ @@ -3150,7 +2851,7 @@ vchiq_shutdown_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance) } VCHIQ_STATUS_T -vchiq_pause_internal(VCHIQ_STATE_T *state) +vchiq_pause_internal(struct vchiq_state *state) { VCHIQ_STATUS_T status = VCHIQ_SUCCESS; @@ -3173,7 +2874,7 @@ vchiq_pause_internal(VCHIQ_STATE_T *state) } VCHIQ_STATUS_T -vchiq_resume_internal(VCHIQ_STATE_T *state) +vchiq_resume_internal(struct vchiq_state *state) { VCHIQ_STATUS_T status = VCHIQ_SUCCESS; @@ -3192,7 +2893,7 @@ VCHIQ_STATUS_T vchiq_close_service(VCHIQ_SERVICE_HANDLE_T handle) { /* Unregister the service */ - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); + struct vchiq_service *service = find_service_by_handle(handle); VCHIQ_STATUS_T status = VCHIQ_SUCCESS; if (!service) @@ -3221,7 +2922,7 @@ vchiq_close_service(VCHIQ_SERVICE_HANDLE_T handle) } while (1) { - if (down_interruptible(&service->remove_event) != 0) { + if (wait_for_completion_killable(&service->remove_event)) { status = VCHIQ_RETRY; break; } @@ -3251,7 +2952,7 @@ VCHIQ_STATUS_T vchiq_remove_service(VCHIQ_SERVICE_HANDLE_T handle) { /* Unregister the service */ - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); + struct vchiq_service *service = find_service_by_handle(handle); VCHIQ_STATUS_T status = VCHIQ_SUCCESS; if (!service) @@ -3282,7 +2983,7 @@ vchiq_remove_service(VCHIQ_SERVICE_HANDLE_T handle) request_poll(service->state, service, VCHIQ_POLL_REMOVE); } while (1) { - if (down_interruptible(&service->remove_event) != 0) { + if (wait_for_completion_killable(&service->remove_event)) { status = VCHIQ_RETRY; break; } @@ -3313,25 +3014,24 @@ vchiq_remove_service(VCHIQ_SERVICE_HANDLE_T handle) * When called in blocking mode, the userdata field points to a bulk_waiter * structure. */ -VCHIQ_STATUS_T -vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, - VCHI_MEM_HANDLE_T memhandle, void *offset, int size, void *userdata, - VCHIQ_BULK_MODE_T mode, VCHIQ_BULK_DIR_T dir) -{ - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); - VCHIQ_BULK_QUEUE_T *queue; - VCHIQ_BULK_T *bulk; - VCHIQ_STATE_T *state; +VCHIQ_STATUS_T vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, + void *offset, int size, void *userdata, + VCHIQ_BULK_MODE_T mode, + VCHIQ_BULK_DIR_T dir) +{ + struct vchiq_service *service = find_service_by_handle(handle); + struct vchiq_bulk_queue *queue; + struct vchiq_bulk *bulk; + struct vchiq_state *state; struct bulk_waiter *bulk_waiter = NULL; const char dir_char = (dir == VCHIQ_BULK_TRANSMIT) ? 't' : 'r'; const int dir_msgtype = (dir == VCHIQ_BULK_TRANSMIT) ? VCHIQ_MSG_BULK_TX : VCHIQ_MSG_BULK_RX; VCHIQ_STATUS_T status = VCHIQ_ERROR; + int payload[2]; - if (!service || - (service->srvstate != VCHIQ_SRVSTATE_OPEN) || - ((memhandle == VCHI_MEM_HANDLE_INVALID) && (offset == NULL)) || - (vchiq_check_service(service) != VCHIQ_SUCCESS)) + if (!service || service->srvstate != VCHIQ_SRVSTATE_OPEN || + !offset || vchiq_check_service(service) != VCHIQ_SUCCESS) goto error_exit; switch (mode) { @@ -3340,7 +3040,7 @@ vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, break; case VCHIQ_BULK_MODE_BLOCKING: bulk_waiter = (struct bulk_waiter *)userdata; - sema_init(&bulk_waiter->event, 0); + init_completion(&bulk_waiter->event); bulk_waiter->actual = 0; bulk_waiter->bulk = NULL; break; @@ -3366,8 +3066,8 @@ vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, VCHIQ_SERVICE_STATS_INC(service, bulk_stalls); do { mutex_unlock(&service->bulk_mutex); - if (down_interruptible(&service->bulk_remove_event) - != 0) { + if (wait_for_completion_killable( + &service->bulk_remove_event)) { status = VCHIQ_RETRY; goto error_exit; } @@ -3388,8 +3088,7 @@ vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, bulk->size = size; bulk->actual = VCHIQ_BULK_ACTUAL_ABORTED; - if (vchiq_prepare_bulk_data(bulk, memhandle, offset, size, dir) != - VCHIQ_SUCCESS) + if (vchiq_prepare_bulk_data(bulk, offset, size, dir) != VCHIQ_SUCCESS) goto unlock_error_exit; wmb(); @@ -3409,32 +3108,25 @@ vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, if (service->srvstate != VCHIQ_SRVSTATE_OPEN) goto unlock_both_error_exit; - if (state->is_master) { - queue->local_insert++; - if (resolve_bulks(service, queue)) - request_poll(state, service, - (dir == VCHIQ_BULK_TRANSMIT) ? - VCHIQ_POLL_TXNOTIFY : VCHIQ_POLL_RXNOTIFY); - } else { - int payload[2] = { (int)(long)bulk->data, bulk->size }; - - status = queue_message(state, - NULL, - VCHIQ_MAKE_MSG(dir_msgtype, - service->localport, - service->remoteport), - memcpy_copy_callback, - &payload, - sizeof(payload), - QMFLAGS_IS_BLOCKING | - QMFLAGS_NO_MUTEX_LOCK | - QMFLAGS_NO_MUTEX_UNLOCK); - if (status != VCHIQ_SUCCESS) { - goto unlock_both_error_exit; - } - queue->local_insert++; + payload[0] = (int)(long)bulk->data; + payload[1] = bulk->size; + status = queue_message(state, + NULL, + VCHIQ_MAKE_MSG(dir_msgtype, + service->localport, + service->remoteport), + memcpy_copy_callback, + &payload, + sizeof(payload), + QMFLAGS_IS_BLOCKING | + QMFLAGS_NO_MUTEX_LOCK | + QMFLAGS_NO_MUTEX_UNLOCK); + if (status != VCHIQ_SUCCESS) { + goto unlock_both_error_exit; } + queue->local_insert++; + mutex_unlock(&state->slot_mutex); mutex_unlock(&service->bulk_mutex); @@ -3451,7 +3143,7 @@ waiting: if (bulk_waiter) { bulk_waiter->bulk = bulk; - if (down_interruptible(&bulk_waiter->event) != 0) + if (wait_for_completion_killable(&bulk_waiter->event)) status = VCHIQ_RETRY; else if (bulk_waiter->actual == VCHIQ_BULK_ACTUAL_ABORTED) status = VCHIQ_ERROR; @@ -3479,7 +3171,7 @@ vchiq_queue_message(VCHIQ_SERVICE_HANDLE_T handle, void *context, size_t size) { - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); + struct vchiq_service *service = find_service_by_handle(handle); VCHIQ_STATUS_T status = VCHIQ_ERROR; if (!service || @@ -3525,11 +3217,12 @@ error_exit: } void -vchiq_release_message(VCHIQ_SERVICE_HANDLE_T handle, VCHIQ_HEADER_T *header) +vchiq_release_message(VCHIQ_SERVICE_HANDLE_T handle, + struct vchiq_header *header) { - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); - VCHIQ_SHARED_STATE_T *remote; - VCHIQ_STATE_T *state; + struct vchiq_service *service = find_service_by_handle(handle); + struct vchiq_shared_state *remote; + struct vchiq_state *state; int slot_index; if (!service) @@ -3545,7 +3238,7 @@ vchiq_release_message(VCHIQ_SERVICE_HANDLE_T handle, VCHIQ_HEADER_T *header) int msgid = header->msgid; if (msgid & VCHIQ_MSGID_CLAIMED) { - VCHIQ_SLOT_INFO_T *slot_info = + struct vchiq_slot_info *slot_info = SLOT_INFO_FROM_INDEX(state, slot_index); release_slot(state, slot_info, header, service); @@ -3557,10 +3250,9 @@ vchiq_release_message(VCHIQ_SERVICE_HANDLE_T handle, VCHIQ_HEADER_T *header) } static void -release_message_sync(VCHIQ_STATE_T *state, VCHIQ_HEADER_T *header) +release_message_sync(struct vchiq_state *state, struct vchiq_header *header) { header->msgid = VCHIQ_MSGID_PADDING; - wmb(); remote_event_signal(&state->remote->sync_release); } @@ -3568,7 +3260,7 @@ VCHIQ_STATUS_T vchiq_get_peer_version(VCHIQ_SERVICE_HANDLE_T handle, short *peer_version) { VCHIQ_STATUS_T status = VCHIQ_ERROR; - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); + struct vchiq_service *service = find_service_by_handle(handle); if (!service || (vchiq_check_service(service) != VCHIQ_SUCCESS) || @@ -3583,35 +3275,21 @@ exit: return status; } -VCHIQ_STATUS_T -vchiq_get_config(VCHIQ_INSTANCE_T instance, - int config_size, VCHIQ_CONFIG_T *pconfig) +void vchiq_get_config(struct vchiq_config *config) { - VCHIQ_CONFIG_T config; - - (void)instance; - - config.max_msg_size = VCHIQ_MAX_MSG_SIZE; - config.bulk_threshold = VCHIQ_MAX_MSG_SIZE; - config.max_outstanding_bulks = VCHIQ_NUM_SERVICE_BULKS; - config.max_services = VCHIQ_MAX_SERVICES; - config.version = VCHIQ_VERSION; - config.version_min = VCHIQ_VERSION_MIN; - - if (config_size > sizeof(VCHIQ_CONFIG_T)) - return VCHIQ_ERROR; - - memcpy(pconfig, &config, - min(config_size, (int)(sizeof(VCHIQ_CONFIG_T)))); - - return VCHIQ_SUCCESS; + config->max_msg_size = VCHIQ_MAX_MSG_SIZE; + config->bulk_threshold = VCHIQ_MAX_MSG_SIZE; + config->max_outstanding_bulks = VCHIQ_NUM_SERVICE_BULKS; + config->max_services = VCHIQ_MAX_SERVICES; + config->version = VCHIQ_VERSION; + config->version_min = VCHIQ_VERSION_MIN; } VCHIQ_STATUS_T vchiq_set_service_option(VCHIQ_SERVICE_HANDLE_T handle, VCHIQ_SERVICE_OPTION_T option, int value) { - VCHIQ_SERVICE_T *service = find_service_by_handle(handle); + struct vchiq_service *service = find_service_by_handle(handle); VCHIQ_STATUS_T status = VCHIQ_ERROR; if (service) { @@ -3622,7 +3300,7 @@ vchiq_set_service_option(VCHIQ_SERVICE_HANDLE_T handle, break; case VCHIQ_SERVICE_OPTION_SLOT_QUOTA: { - VCHIQ_SERVICE_QUOTA_T *service_quota = + struct vchiq_service_quota *service_quota = &service->state->service_quotas[ service->localport]; if (value == 0) @@ -3635,14 +3313,14 @@ vchiq_set_service_option(VCHIQ_SERVICE_HANDLE_T handle, service_quota->message_use_count)) { /* Signal the service that it may have ** dropped below its quota */ - up(&service_quota->quota_event); + complete(&service_quota->quota_event); } status = VCHIQ_SUCCESS; } } break; case VCHIQ_SERVICE_OPTION_MESSAGE_QUOTA: { - VCHIQ_SERVICE_QUOTA_T *service_quota = + struct vchiq_service_quota *service_quota = &service->state->service_quotas[ service->localport]; if (value == 0) @@ -3656,7 +3334,7 @@ vchiq_set_service_option(VCHIQ_SERVICE_HANDLE_T handle, service_quota->slot_use_count)) /* Signal the service that it may have ** dropped below its quota */ - up(&service_quota->quota_event); + complete(&service_quota->quota_event); status = VCHIQ_SUCCESS; } } break; @@ -3685,8 +3363,8 @@ vchiq_set_service_option(VCHIQ_SERVICE_HANDLE_T handle, } static void -vchiq_dump_shared_state(void *dump_context, VCHIQ_STATE_T *state, - VCHIQ_SHARED_STATE_T *shared, const char *label) +vchiq_dump_shared_state(void *dump_context, struct vchiq_state *state, + struct vchiq_shared_state *shared, const char *label) { static const char *const debug_names[] = { "<entries>", @@ -3716,7 +3394,8 @@ vchiq_dump_shared_state(void *dump_context, VCHIQ_STATE_T *state, vchiq_dump(dump_context, buf, len + 1); for (i = shared->slot_first; i <= shared->slot_last; i++) { - VCHIQ_SLOT_INFO_T slot_info = *SLOT_INFO_FROM_INDEX(state, i); + struct vchiq_slot_info slot_info = + *SLOT_INFO_FROM_INDEX(state, i); if (slot_info.use_count != slot_info.release_count) { len = snprintf(buf, sizeof(buf), " %d: %d/%d", i, slot_info.use_count, @@ -3733,7 +3412,7 @@ vchiq_dump_shared_state(void *dump_context, VCHIQ_STATE_T *state, } void -vchiq_dump_state(void *dump_context, VCHIQ_STATE_T *state) +vchiq_dump_state(void *dump_context, struct vchiq_state *state) { char buf[80]; int len; @@ -3783,7 +3462,7 @@ vchiq_dump_state(void *dump_context, VCHIQ_STATE_T *state) vchiq_dump_platform_instances(dump_context); for (i = 0; i < state->unused_service; i++) { - VCHIQ_SERVICE_T *service = find_service_by_port(state, i); + struct vchiq_service *service = find_service_by_port(state, i); if (service) { vchiq_dump_service_state(dump_context, service); @@ -3793,7 +3472,7 @@ vchiq_dump_state(void *dump_context, VCHIQ_STATE_T *state) } void -vchiq_dump_service_state(void *dump_context, VCHIQ_SERVICE_T *service) +vchiq_dump_service_state(void *dump_context, struct vchiq_service *service) { char buf[80]; int len; @@ -3804,7 +3483,7 @@ vchiq_dump_service_state(void *dump_context, VCHIQ_SERVICE_T *service) if (service->srvstate != VCHIQ_SRVSTATE_FREE) { char remoteport[30]; - VCHIQ_SERVICE_QUOTA_T *service_quota = + struct vchiq_service_quota *service_quota = &service->state->service_quotas[service->localport]; int fourcc = service->base.fourcc; int tx_pending, rx_pending; @@ -3909,7 +3588,7 @@ vchiq_loud_error_footer(void) "================"); } -VCHIQ_STATUS_T vchiq_send_remote_use(VCHIQ_STATE_T *state) +VCHIQ_STATUS_T vchiq_send_remote_use(struct vchiq_state *state) { VCHIQ_STATUS_T status = VCHIQ_RETRY; @@ -3920,7 +3599,7 @@ VCHIQ_STATUS_T vchiq_send_remote_use(VCHIQ_STATE_T *state) return status; } -VCHIQ_STATUS_T vchiq_send_remote_release(VCHIQ_STATE_T *state) +VCHIQ_STATUS_T vchiq_send_remote_release(struct vchiq_state *state) { VCHIQ_STATUS_T status = VCHIQ_RETRY; @@ -3931,7 +3610,7 @@ VCHIQ_STATUS_T vchiq_send_remote_release(VCHIQ_STATE_T *state) return status; } -VCHIQ_STATUS_T vchiq_send_remote_use_active(VCHIQ_STATE_T *state) +VCHIQ_STATUS_T vchiq_send_remote_use_active(struct vchiq_state *state) { VCHIQ_STATUS_T status = VCHIQ_RETRY; diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h index 10deb5745dda..5f07db519633 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h @@ -35,8 +35,9 @@ #define VCHIQ_CORE_H #include <linux/mutex.h> -#include <linux/semaphore.h> +#include <linux/completion.h> #include <linux/kthread.h> +#include <linux/wait.h> #include "vchiq_cfg.h" @@ -89,7 +90,7 @@ vchiq_static_assert(IS_POW2(VCHIQ_MAX_SLOTS_PER_SIDE)); #define VCHIQ_SLOT_MASK (VCHIQ_SLOT_SIZE - 1) #define VCHIQ_SLOT_QUEUE_MASK (VCHIQ_MAX_SLOTS_PER_SIDE - 1) -#define VCHIQ_SLOT_ZERO_SLOTS ((sizeof(VCHIQ_SLOT_ZERO_T) + \ +#define VCHIQ_SLOT_ZERO_SLOTS ((sizeof(struct vchiq_slot_zero) + \ VCHIQ_SLOT_SIZE - 1) / VCHIQ_SLOT_SIZE) #define VCHIQ_MSG_PADDING 0 /* - */ @@ -238,51 +239,47 @@ typedef enum { typedef void (*VCHIQ_USERDATA_TERM_T)(void *userdata); -typedef struct vchiq_bulk_struct { +struct vchiq_bulk { short mode; short dir; void *userdata; - VCHI_MEM_HANDLE_T handle; void *data; int size; void *remote_data; int remote_size; int actual; -} VCHIQ_BULK_T; +}; -typedef struct vchiq_bulk_queue_struct { +struct vchiq_bulk_queue { int local_insert; /* Where to insert the next local bulk */ int remote_insert; /* Where to insert the next remote bulk (master) */ int process; /* Bulk to transfer next */ int remote_notify; /* Bulk to notify the remote client of next (mstr) */ int remove; /* Bulk to notify the local client of, and remove, ** next */ - VCHIQ_BULK_T bulks[VCHIQ_NUM_SERVICE_BULKS]; -} VCHIQ_BULK_QUEUE_T; + struct vchiq_bulk bulks[VCHIQ_NUM_SERVICE_BULKS]; +}; -typedef struct remote_event_struct { +struct remote_event { int armed; int fired; - /* Contains offset from the beginning of the VCHIQ_STATE_T structure */ - u32 event; -} REMOTE_EVENT_T; + u32 __unused; +}; typedef struct opaque_platform_state_t *VCHIQ_PLATFORM_STATE_T; -typedef struct vchiq_state_struct VCHIQ_STATE_T; - -typedef struct vchiq_slot_struct { +struct vchiq_slot { char data[VCHIQ_SLOT_SIZE]; -} VCHIQ_SLOT_T; +}; -typedef struct vchiq_slot_info_struct { +struct vchiq_slot_info { /* Use two counters rather than one to avoid the need for a mutex. */ short use_count; short release_count; -} VCHIQ_SLOT_INFO_T; +}; -typedef struct vchiq_service_struct { - VCHIQ_SERVICE_BASE_T base; +struct vchiq_service { + struct vchiq_service_base base; VCHIQ_SERVICE_HANDLE_T handle; unsigned int ref_count; int srvstate; @@ -300,16 +297,16 @@ typedef struct vchiq_service_struct { short version_min; short peer_version; - VCHIQ_STATE_T *state; + struct vchiq_state *state; VCHIQ_INSTANCE_T instance; int service_use_count; - VCHIQ_BULK_QUEUE_T bulk_tx; - VCHIQ_BULK_QUEUE_T bulk_rx; + struct vchiq_bulk_queue bulk_tx; + struct vchiq_bulk_queue bulk_rx; - struct semaphore remove_event; - struct semaphore bulk_remove_event; + struct completion remove_event; + struct completion bulk_remove_event; struct mutex bulk_mutex; struct service_stats_struct { @@ -327,22 +324,22 @@ typedef struct vchiq_service_struct { uint64_t bulk_tx_bytes; uint64_t bulk_rx_bytes; } stats; -} VCHIQ_SERVICE_T; +}; -/* The quota information is outside VCHIQ_SERVICE_T so that it can be - statically allocated, since for accounting reasons a service's slot - usage is carried over between users of the same port number. +/* The quota information is outside struct vchiq_service so that it can + * be statically allocated, since for accounting reasons a service's slot + * usage is carried over between users of the same port number. */ -typedef struct vchiq_service_quota_struct { +struct vchiq_service_quota { unsigned short slot_quota; unsigned short slot_use_count; unsigned short message_quota; unsigned short message_use_count; - struct semaphore quota_event; + struct completion quota_event; int previous_tx_index; -} VCHIQ_SERVICE_QUOTA_T; +}; -typedef struct vchiq_shared_state_struct { +struct vchiq_shared_state { /* A non-zero value here indicates that the content is valid. */ int initialised; @@ -356,7 +353,7 @@ typedef struct vchiq_shared_state_struct { /* Signalling this event indicates that owner's slot handler thread ** should run. */ - REMOTE_EVENT_T trigger; + struct remote_event trigger; /* Indicates the byte position within the stream where the next message ** will be written. The least significant bits are an index into the @@ -364,26 +361,26 @@ typedef struct vchiq_shared_state_struct { int tx_pos; /* This event should be signalled when a slot is recycled. */ - REMOTE_EVENT_T recycle; + struct remote_event recycle; /* The slot_queue index where the next recycled slot will be written. */ int slot_queue_recycle; /* This event should be signalled when a synchronous message is sent. */ - REMOTE_EVENT_T sync_trigger; + struct remote_event sync_trigger; /* This event should be signalled when a synchronous message has been ** released. */ - REMOTE_EVENT_T sync_release; + struct remote_event sync_release; /* A circular buffer of slot indexes. */ int slot_queue[VCHIQ_MAX_SLOTS_PER_SIDE]; /* Debugging state */ int debug[DEBUG_MAX]; -} VCHIQ_SHARED_STATE_T; +}; -typedef struct vchiq_slot_zero_struct { +struct vchiq_slot_zero { int magic; short version; short version_min; @@ -392,27 +389,26 @@ typedef struct vchiq_slot_zero_struct { int max_slots; int max_slots_per_side; int platform_data[2]; - VCHIQ_SHARED_STATE_T master; - VCHIQ_SHARED_STATE_T slave; - VCHIQ_SLOT_INFO_T slots[VCHIQ_MAX_SLOTS]; -} VCHIQ_SLOT_ZERO_T; + struct vchiq_shared_state master; + struct vchiq_shared_state slave; + struct vchiq_slot_info slots[VCHIQ_MAX_SLOTS]; +}; -struct vchiq_state_struct { +struct vchiq_state { int id; int initialised; VCHIQ_CONNSTATE_T conn_state; - int is_master; short version_common; - VCHIQ_SHARED_STATE_T *local; - VCHIQ_SHARED_STATE_T *remote; - VCHIQ_SLOT_T *slot_data; + struct vchiq_shared_state *local; + struct vchiq_shared_state *remote; + struct vchiq_slot *slot_data; unsigned short default_slot_quota; unsigned short default_message_quota; /* Event indicating connect message received */ - struct semaphore connect; + struct completion connect; /* Mutex protecting services */ struct mutex mutex; @@ -428,20 +424,20 @@ struct vchiq_state_struct { struct task_struct *sync_thread; /* Local implementation of the trigger remote event */ - struct semaphore trigger_event; + wait_queue_head_t trigger_event; /* Local implementation of the recycle remote event */ - struct semaphore recycle_event; + wait_queue_head_t recycle_event; /* Local implementation of the sync trigger remote event */ - struct semaphore sync_trigger_event; + wait_queue_head_t sync_trigger_event; /* Local implementation of the sync release remote event */ - struct semaphore sync_release_event; + wait_queue_head_t sync_release_event; char *tx_data; char *rx_data; - VCHIQ_SLOT_INFO_T *rx_info; + struct vchiq_slot_info *rx_info; struct mutex slot_mutex; @@ -483,16 +479,12 @@ struct vchiq_state_struct { int unused_service; /* Signalled when a free slot becomes available. */ - struct semaphore slot_available_event; + struct completion slot_available_event; - struct semaphore slot_remove_event; + struct completion slot_remove_event; /* Signalled when a free data slot becomes available. */ - struct semaphore data_quota_event; - - /* Incremented when there are bulk transfers which cannot be processed - * whilst paused and must be processed on resume */ - int deferred_bulks; + struct completion data_quota_event; struct state_stats_struct { int slot_stalls; @@ -502,16 +494,16 @@ struct vchiq_state_struct { int error_count; } stats; - VCHIQ_SERVICE_T * services[VCHIQ_MAX_SERVICES]; - VCHIQ_SERVICE_QUOTA_T service_quotas[VCHIQ_MAX_SERVICES]; - VCHIQ_SLOT_INFO_T slot_info[VCHIQ_MAX_SLOTS]; + struct vchiq_service *services[VCHIQ_MAX_SERVICES]; + struct vchiq_service_quota service_quotas[VCHIQ_MAX_SERVICES]; + struct vchiq_slot_info slot_info[VCHIQ_MAX_SLOTS]; VCHIQ_PLATFORM_STATE_T platform_state; }; struct bulk_waiter { - VCHIQ_BULK_T *bulk; - struct semaphore event; + struct vchiq_bulk *bulk; + struct completion event; int actual; }; @@ -521,60 +513,60 @@ extern int vchiq_core_log_level; extern int vchiq_core_msg_log_level; extern int vchiq_sync_log_level; -extern VCHIQ_STATE_T *vchiq_states[VCHIQ_MAX_STATES]; +extern struct vchiq_state *vchiq_states[VCHIQ_MAX_STATES]; extern const char * get_conn_state_name(VCHIQ_CONNSTATE_T conn_state); -extern VCHIQ_SLOT_ZERO_T * +extern struct vchiq_slot_zero * vchiq_init_slots(void *mem_base, int mem_size); extern VCHIQ_STATUS_T -vchiq_init_state(VCHIQ_STATE_T *state, VCHIQ_SLOT_ZERO_T *slot_zero, - int is_master); +vchiq_init_state(struct vchiq_state *state, struct vchiq_slot_zero *slot_zero); extern VCHIQ_STATUS_T -vchiq_connect_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance); +vchiq_connect_internal(struct vchiq_state *state, VCHIQ_INSTANCE_T instance); -extern VCHIQ_SERVICE_T * -vchiq_add_service_internal(VCHIQ_STATE_T *state, - const VCHIQ_SERVICE_PARAMS_T *params, int srvstate, - VCHIQ_INSTANCE_T instance, VCHIQ_USERDATA_TERM_T userdata_term); +extern struct vchiq_service * +vchiq_add_service_internal(struct vchiq_state *state, + const struct vchiq_service_params *params, + int srvstate, VCHIQ_INSTANCE_T instance, + VCHIQ_USERDATA_TERM_T userdata_term); extern VCHIQ_STATUS_T -vchiq_open_service_internal(VCHIQ_SERVICE_T *service, int client_id); +vchiq_open_service_internal(struct vchiq_service *service, int client_id); extern VCHIQ_STATUS_T -vchiq_close_service_internal(VCHIQ_SERVICE_T *service, int close_recvd); +vchiq_close_service_internal(struct vchiq_service *service, int close_recvd); extern void -vchiq_terminate_service_internal(VCHIQ_SERVICE_T *service); +vchiq_terminate_service_internal(struct vchiq_service *service); extern void -vchiq_free_service_internal(VCHIQ_SERVICE_T *service); +vchiq_free_service_internal(struct vchiq_service *service); extern VCHIQ_STATUS_T -vchiq_shutdown_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance); +vchiq_shutdown_internal(struct vchiq_state *state, VCHIQ_INSTANCE_T instance); extern VCHIQ_STATUS_T -vchiq_pause_internal(VCHIQ_STATE_T *state); +vchiq_pause_internal(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_resume_internal(VCHIQ_STATE_T *state); +vchiq_resume_internal(struct vchiq_state *state); extern void -remote_event_pollall(VCHIQ_STATE_T *state); +remote_event_pollall(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, - VCHI_MEM_HANDLE_T memhandle, void *offset, int size, void *userdata, - VCHIQ_BULK_MODE_T mode, VCHIQ_BULK_DIR_T dir); +vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, void *offset, int size, + void *userdata, VCHIQ_BULK_MODE_T mode, + VCHIQ_BULK_DIR_T dir); extern void -vchiq_dump_state(void *dump_context, VCHIQ_STATE_T *state); +vchiq_dump_state(void *dump_context, struct vchiq_state *state); extern void -vchiq_dump_service_state(void *dump_context, VCHIQ_SERVICE_T *service); +vchiq_dump_service_state(void *dump_context, struct vchiq_service *service); extern void vchiq_loud_error_header(void); @@ -583,12 +575,13 @@ extern void vchiq_loud_error_footer(void); extern void -request_poll(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, int poll_type); +request_poll(struct vchiq_state *state, struct vchiq_service *service, + int poll_type); -static inline VCHIQ_SERVICE_T * +static inline struct vchiq_service * handle_to_service(VCHIQ_SERVICE_HANDLE_T handle) { - VCHIQ_STATE_T *state = vchiq_states[(handle / VCHIQ_MAX_SERVICES) & + struct vchiq_state *state = vchiq_states[(handle / VCHIQ_MAX_SERVICES) & (VCHIQ_MAX_STATES - 1)]; if (!state) return NULL; @@ -596,57 +589,54 @@ handle_to_service(VCHIQ_SERVICE_HANDLE_T handle) return state->services[handle & (VCHIQ_MAX_SERVICES - 1)]; } -extern VCHIQ_SERVICE_T * +extern struct vchiq_service * find_service_by_handle(VCHIQ_SERVICE_HANDLE_T handle); -extern VCHIQ_SERVICE_T * -find_service_by_port(VCHIQ_STATE_T *state, int localport); +extern struct vchiq_service * +find_service_by_port(struct vchiq_state *state, int localport); -extern VCHIQ_SERVICE_T * +extern struct vchiq_service * find_service_for_instance(VCHIQ_INSTANCE_T instance, VCHIQ_SERVICE_HANDLE_T handle); -extern VCHIQ_SERVICE_T * +extern struct vchiq_service * find_closed_service_for_instance(VCHIQ_INSTANCE_T instance, VCHIQ_SERVICE_HANDLE_T handle); -extern VCHIQ_SERVICE_T * -next_service_by_instance(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance, - int *pidx); +extern struct vchiq_service * +next_service_by_instance(struct vchiq_state *state, VCHIQ_INSTANCE_T instance, + int *pidx); extern void -lock_service(VCHIQ_SERVICE_T *service); +lock_service(struct vchiq_service *service); extern void -unlock_service(VCHIQ_SERVICE_T *service); +unlock_service(struct vchiq_service *service); /* The following functions are called from vchiq_core, and external ** implementations must be provided. */ extern VCHIQ_STATUS_T -vchiq_prepare_bulk_data(VCHIQ_BULK_T *bulk, - VCHI_MEM_HANDLE_T memhandle, void *offset, int size, int dir); - -extern void -vchiq_transfer_bulk(VCHIQ_BULK_T *bulk); +vchiq_prepare_bulk_data(struct vchiq_bulk *bulk, void *offset, int size, + int dir); extern void -vchiq_complete_bulk(VCHIQ_BULK_T *bulk); +vchiq_complete_bulk(struct vchiq_bulk *bulk); extern void -remote_event_signal(REMOTE_EVENT_T *event); +remote_event_signal(struct remote_event *event); void -vchiq_platform_check_suspend(VCHIQ_STATE_T *state); +vchiq_platform_check_suspend(struct vchiq_state *state); extern void -vchiq_platform_paused(VCHIQ_STATE_T *state); +vchiq_platform_paused(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_platform_resume(VCHIQ_STATE_T *state); +vchiq_platform_resume(struct vchiq_state *state); extern void -vchiq_platform_resumed(VCHIQ_STATE_T *state); +vchiq_platform_resumed(struct vchiq_state *state); extern void vchiq_dump(void *dump_context, const char *str, int len); @@ -659,47 +649,48 @@ vchiq_dump_platform_instances(void *dump_context); extern void vchiq_dump_platform_service_state(void *dump_context, - VCHIQ_SERVICE_T *service); + struct vchiq_service *service); extern VCHIQ_STATUS_T -vchiq_use_service_internal(VCHIQ_SERVICE_T *service); +vchiq_use_service_internal(struct vchiq_service *service); extern VCHIQ_STATUS_T -vchiq_release_service_internal(VCHIQ_SERVICE_T *service); +vchiq_release_service_internal(struct vchiq_service *service); extern void -vchiq_on_remote_use(VCHIQ_STATE_T *state); +vchiq_on_remote_use(struct vchiq_state *state); extern void -vchiq_on_remote_release(VCHIQ_STATE_T *state); +vchiq_on_remote_release(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_platform_init_state(VCHIQ_STATE_T *state); +vchiq_platform_init_state(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_check_service(VCHIQ_SERVICE_T *service); +vchiq_check_service(struct vchiq_service *service); extern void -vchiq_on_remote_use_active(VCHIQ_STATE_T *state); +vchiq_on_remote_use_active(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_send_remote_use(VCHIQ_STATE_T *state); +vchiq_send_remote_use(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_send_remote_release(VCHIQ_STATE_T *state); +vchiq_send_remote_release(struct vchiq_state *state); extern VCHIQ_STATUS_T -vchiq_send_remote_use_active(VCHIQ_STATE_T *state); +vchiq_send_remote_use_active(struct vchiq_state *state); extern void -vchiq_platform_conn_state_changed(VCHIQ_STATE_T *state, - VCHIQ_CONNSTATE_T oldstate, VCHIQ_CONNSTATE_T newstate); +vchiq_platform_conn_state_changed(struct vchiq_state *state, + VCHIQ_CONNSTATE_T oldstate, + VCHIQ_CONNSTATE_T newstate); extern void -vchiq_platform_handle_timeout(VCHIQ_STATE_T *state); +vchiq_platform_handle_timeout(struct vchiq_state *state); extern void -vchiq_set_conn_state(VCHIQ_STATE_T *state, VCHIQ_CONNSTATE_T newstate); +vchiq_set_conn_state(struct vchiq_state *state, VCHIQ_CONNSTATE_T newstate); extern void vchiq_log_dump_mem(const char *label, uint32_t addr, const void *voidMem, diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.c index 6a9e71a61142..3928287cf5f7 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.c @@ -153,19 +153,7 @@ static int debugfs_usecount_show(struct seq_file *f, void *offset) return 0; } - -static int debugfs_usecount_open(struct inode *inode, struct file *file) -{ - return single_open(file, debugfs_usecount_show, inode->i_private); -} - -static const struct file_operations debugfs_usecount_fops = { - .owner = THIS_MODULE, - .open = debugfs_usecount_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; +DEFINE_SHOW_ATTRIBUTE(debugfs_usecount); static int debugfs_trace_show(struct seq_file *f, void *offset) { @@ -243,7 +231,8 @@ void vchiq_debugfs_add_instance(VCHIQ_INSTANCE_T instance) void vchiq_debugfs_remove_instance(VCHIQ_INSTANCE_T instance) { - VCHIQ_DEBUGFS_NODE_T *node = vchiq_instance_get_debugfs_node(instance); + struct vchiq_debugfs_node *node = + vchiq_instance_get_debugfs_node(instance); debugfs_remove_recursive(node->dentry); } diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.h index 3af6397ada19..5be1a5663f51 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.h @@ -36,9 +36,9 @@ #include "vchiq_core.h" -typedef struct vchiq_debugfs_node_struct { +struct vchiq_debugfs_node { struct dentry *dentry; -} VCHIQ_DEBUGFS_NODE_T; +}; void vchiq_debugfs_init(void); diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_if.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_if.h index e4109a83e628..13ed23eacfae 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_if.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_if.h @@ -34,12 +34,10 @@ #ifndef VCHIQ_IF_H #define VCHIQ_IF_H -#include "interface/vchi/vchi_mh.h" - #define VCHIQ_SERVICE_HANDLE_INVALID 0 #define VCHIQ_SLOT_SIZE 4096 -#define VCHIQ_MAX_MSG_SIZE (VCHIQ_SLOT_SIZE - sizeof(VCHIQ_HEADER_T)) +#define VCHIQ_MAX_MSG_SIZE (VCHIQ_SLOT_SIZE - sizeof(struct vchiq_header)) #define VCHIQ_CHANNEL_SIZE VCHIQ_MAX_MSG_SIZE /* For backwards compatibility */ #define VCHIQ_MAKE_FOURCC(x0, x1, x2, x3) \ @@ -78,7 +76,7 @@ typedef enum { VCHIQ_SERVICE_OPTION_TRACE } VCHIQ_SERVICE_OPTION_T; -typedef struct vchiq_header_struct { +struct vchiq_header { /* The message identifier - opaque to applications. */ int msgid; @@ -86,33 +84,34 @@ typedef struct vchiq_header_struct { unsigned int size; char data[0]; /* message */ -} VCHIQ_HEADER_T; +}; struct vchiq_element { - const void *data; + const void __user *data; unsigned int size; }; typedef unsigned int VCHIQ_SERVICE_HANDLE_T; -typedef VCHIQ_STATUS_T (*VCHIQ_CALLBACK_T)(VCHIQ_REASON_T, VCHIQ_HEADER_T *, - VCHIQ_SERVICE_HANDLE_T, void *); +typedef VCHIQ_STATUS_T (*VCHIQ_CALLBACK_T)(VCHIQ_REASON_T, + struct vchiq_header *, + VCHIQ_SERVICE_HANDLE_T, void *); -typedef struct vchiq_service_base_struct { +struct vchiq_service_base { int fourcc; VCHIQ_CALLBACK_T callback; void *userdata; -} VCHIQ_SERVICE_BASE_T; +}; -typedef struct vchiq_service_params_struct { +struct vchiq_service_params { int fourcc; VCHIQ_CALLBACK_T callback; void *userdata; short version; /* Increment for non-trivial changes */ short version_min; /* Update for incompatible changes */ -} VCHIQ_SERVICE_PARAMS_T; +}; -typedef struct vchiq_config_struct { +struct vchiq_config { unsigned int max_msg_size; unsigned int bulk_threshold; /* The message size above which it is better to use a bulk transfer @@ -121,7 +120,7 @@ typedef struct vchiq_config_struct { unsigned int max_services; short version; /* The version of VCHIQ */ short version_min; /* The minimum compatible version of VCHIQ */ -} VCHIQ_CONFIG_T; +}; typedef struct vchiq_instance_struct *VCHIQ_INSTANCE_T; typedef void (*VCHIQ_REMOTE_USE_CALLBACK_T)(void *cb_arg); @@ -130,10 +129,10 @@ extern VCHIQ_STATUS_T vchiq_initialise(VCHIQ_INSTANCE_T *pinstance); extern VCHIQ_STATUS_T vchiq_shutdown(VCHIQ_INSTANCE_T instance); extern VCHIQ_STATUS_T vchiq_connect(VCHIQ_INSTANCE_T instance); extern VCHIQ_STATUS_T vchiq_add_service(VCHIQ_INSTANCE_T instance, - const VCHIQ_SERVICE_PARAMS_T *params, + const struct vchiq_service_params *params, VCHIQ_SERVICE_HANDLE_T *pservice); extern VCHIQ_STATUS_T vchiq_open_service(VCHIQ_INSTANCE_T instance, - const VCHIQ_SERVICE_PARAMS_T *params, + const struct vchiq_service_params *params, VCHIQ_SERVICE_HANDLE_T *pservice); extern VCHIQ_STATUS_T vchiq_close_service(VCHIQ_SERVICE_HANDLE_T service); extern VCHIQ_STATUS_T vchiq_remove_service(VCHIQ_SERVICE_HANDLE_T service); @@ -148,7 +147,7 @@ vchiq_queue_message(VCHIQ_SERVICE_HANDLE_T handle, void *context, size_t size); extern void vchiq_release_message(VCHIQ_SERVICE_HANDLE_T service, - VCHIQ_HEADER_T *header); + struct vchiq_header *header); extern VCHIQ_STATUS_T vchiq_bulk_transmit(VCHIQ_SERVICE_HANDLE_T service, const void *data, unsigned int size, void *userdata, VCHIQ_BULK_MODE_T mode); @@ -156,16 +155,15 @@ extern VCHIQ_STATUS_T vchiq_bulk_receive(VCHIQ_SERVICE_HANDLE_T service, void *data, unsigned int size, void *userdata, VCHIQ_BULK_MODE_T mode); extern VCHIQ_STATUS_T vchiq_bulk_transmit_handle(VCHIQ_SERVICE_HANDLE_T service, - VCHI_MEM_HANDLE_T handle, const void *offset, unsigned int size, + const void *offset, unsigned int size, void *userdata, VCHIQ_BULK_MODE_T mode); extern VCHIQ_STATUS_T vchiq_bulk_receive_handle(VCHIQ_SERVICE_HANDLE_T service, - VCHI_MEM_HANDLE_T handle, void *offset, unsigned int size, - void *userdata, VCHIQ_BULK_MODE_T mode); + void *offset, unsigned int size, void *userdata, + VCHIQ_BULK_MODE_T mode); extern int vchiq_get_client_id(VCHIQ_SERVICE_HANDLE_T service); extern void *vchiq_get_service_userdata(VCHIQ_SERVICE_HANDLE_T service); extern int vchiq_get_service_fourcc(VCHIQ_SERVICE_HANDLE_T service); -extern VCHIQ_STATUS_T vchiq_get_config(VCHIQ_INSTANCE_T instance, - int config_size, VCHIQ_CONFIG_T *pconfig); +extern void vchiq_get_config(struct vchiq_config *config); extern VCHIQ_STATUS_T vchiq_set_service_option(VCHIQ_SERVICE_HANDLE_T service, VCHIQ_SERVICE_OPTION_T option, int value); diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_ioctl.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_ioctl.h index 9f859953f45c..56aef490e870 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_ioctl.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_ioctl.h @@ -40,90 +40,90 @@ #define VCHIQ_IOC_MAGIC 0xc4 #define VCHIQ_INVALID_HANDLE (~0) -typedef struct { - VCHIQ_SERVICE_PARAMS_T params; +struct vchiq_create_service { + struct vchiq_service_params params; int is_open; int is_vchi; unsigned int handle; /* OUT */ -} VCHIQ_CREATE_SERVICE_T; +}; -typedef struct { +struct vchiq_queue_message { unsigned int handle; unsigned int count; - const struct vchiq_element *elements; -} VCHIQ_QUEUE_MESSAGE_T; + const struct vchiq_element __user *elements; +}; -typedef struct { +struct vchiq_queue_bulk_transfer { unsigned int handle; void *data; unsigned int size; void *userdata; VCHIQ_BULK_MODE_T mode; -} VCHIQ_QUEUE_BULK_TRANSFER_T; +}; -typedef struct { +struct vchiq_completion_data { VCHIQ_REASON_T reason; - VCHIQ_HEADER_T *header; + struct vchiq_header *header; void *service_userdata; void *bulk_userdata; -} VCHIQ_COMPLETION_DATA_T; +}; -typedef struct { +struct vchiq_await_completion { unsigned int count; - VCHIQ_COMPLETION_DATA_T *buf; + struct vchiq_completion_data *buf; unsigned int msgbufsize; unsigned int msgbufcount; /* IN/OUT */ void **msgbufs; -} VCHIQ_AWAIT_COMPLETION_T; +}; -typedef struct { +struct vchiq_dequeue_message { unsigned int handle; int blocking; unsigned int bufsize; void *buf; -} VCHIQ_DEQUEUE_MESSAGE_T; +}; -typedef struct { +struct vchiq_get_config { unsigned int config_size; - VCHIQ_CONFIG_T *pconfig; -} VCHIQ_GET_CONFIG_T; + struct vchiq_config __user *pconfig; +}; -typedef struct { +struct vchiq_set_service_option { unsigned int handle; VCHIQ_SERVICE_OPTION_T option; int value; -} VCHIQ_SET_SERVICE_OPTION_T; +}; -typedef struct { +struct vchiq_dump_mem { void *virt_addr; size_t num_bytes; -} VCHIQ_DUMP_MEM_T; +}; #define VCHIQ_IOC_CONNECT _IO(VCHIQ_IOC_MAGIC, 0) #define VCHIQ_IOC_SHUTDOWN _IO(VCHIQ_IOC_MAGIC, 1) #define VCHIQ_IOC_CREATE_SERVICE \ - _IOWR(VCHIQ_IOC_MAGIC, 2, VCHIQ_CREATE_SERVICE_T) + _IOWR(VCHIQ_IOC_MAGIC, 2, struct vchiq_create_service) #define VCHIQ_IOC_REMOVE_SERVICE _IO(VCHIQ_IOC_MAGIC, 3) #define VCHIQ_IOC_QUEUE_MESSAGE \ - _IOW(VCHIQ_IOC_MAGIC, 4, VCHIQ_QUEUE_MESSAGE_T) + _IOW(VCHIQ_IOC_MAGIC, 4, struct vchiq_queue_message) #define VCHIQ_IOC_QUEUE_BULK_TRANSMIT \ - _IOWR(VCHIQ_IOC_MAGIC, 5, VCHIQ_QUEUE_BULK_TRANSFER_T) + _IOWR(VCHIQ_IOC_MAGIC, 5, struct vchiq_queue_bulk_transfer) #define VCHIQ_IOC_QUEUE_BULK_RECEIVE \ - _IOWR(VCHIQ_IOC_MAGIC, 6, VCHIQ_QUEUE_BULK_TRANSFER_T) + _IOWR(VCHIQ_IOC_MAGIC, 6, struct vchiq_queue_bulk_transfer) #define VCHIQ_IOC_AWAIT_COMPLETION \ - _IOWR(VCHIQ_IOC_MAGIC, 7, VCHIQ_AWAIT_COMPLETION_T) + _IOWR(VCHIQ_IOC_MAGIC, 7, struct vchiq_await_completion) #define VCHIQ_IOC_DEQUEUE_MESSAGE \ - _IOWR(VCHIQ_IOC_MAGIC, 8, VCHIQ_DEQUEUE_MESSAGE_T) + _IOWR(VCHIQ_IOC_MAGIC, 8, struct vchiq_dequeue_message) #define VCHIQ_IOC_GET_CLIENT_ID _IO(VCHIQ_IOC_MAGIC, 9) #define VCHIQ_IOC_GET_CONFIG \ - _IOWR(VCHIQ_IOC_MAGIC, 10, VCHIQ_GET_CONFIG_T) + _IOWR(VCHIQ_IOC_MAGIC, 10, struct vchiq_get_config) #define VCHIQ_IOC_CLOSE_SERVICE _IO(VCHIQ_IOC_MAGIC, 11) #define VCHIQ_IOC_USE_SERVICE _IO(VCHIQ_IOC_MAGIC, 12) #define VCHIQ_IOC_RELEASE_SERVICE _IO(VCHIQ_IOC_MAGIC, 13) #define VCHIQ_IOC_SET_SERVICE_OPTION \ - _IOW(VCHIQ_IOC_MAGIC, 14, VCHIQ_SET_SERVICE_OPTION_T) + _IOW(VCHIQ_IOC_MAGIC, 14, struct vchiq_set_service_option) #define VCHIQ_IOC_DUMP_PHYS_MEM \ - _IOW(VCHIQ_IOC_MAGIC, 15, VCHIQ_DUMP_MEM_T) + _IOW(VCHIQ_IOC_MAGIC, 15, struct vchiq_dump_mem) #define VCHIQ_IOC_LIB_VERSION _IO(VCHIQ_IOC_MAGIC, 16) #define VCHIQ_IOC_CLOSE_DELIVERED _IO(VCHIQ_IOC_MAGIC, 17) #define VCHIQ_IOC_MAX 17 diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_killable.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_killable.h deleted file mode 100644 index 778063ba312a..000000000000 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_killable.h +++ /dev/null @@ -1,55 +0,0 @@ -/** - * Copyright (c) 2010-2012 Broadcom. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The names of the above-listed copyright holders may not be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2, as published by the Free - * Software Foundation. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS - * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef VCHIQ_KILLABLE_H -#define VCHIQ_KILLABLE_H - -#include <linux/mutex.h> -#include <linux/semaphore.h> - -#define SHUTDOWN_SIGS (sigmask(SIGKILL) | sigmask(SIGINT) | sigmask(SIGQUIT) | sigmask(SIGTRAP) | sigmask(SIGSTOP) | sigmask(SIGCONT)) - -static inline int __must_check down_interruptible_killable(struct semaphore *sem) -{ - /* Allow interception of killable signals only. We don't want to be interrupted by harmless signals like SIGALRM */ - int ret; - sigset_t blocked, oldset; - siginitsetinv(&blocked, SHUTDOWN_SIGS); - sigprocmask(SIG_SETMASK, &blocked, &oldset); - ret = down_interruptible(sem); - sigprocmask(SIG_SETMASK, &oldset, NULL); - return ret; -} -#define down_interruptible down_interruptible_killable - -#endif diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_pagelist.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_pagelist.h index bec411061554..4eaf7398cf2e 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_pagelist.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_pagelist.h @@ -38,7 +38,7 @@ #define PAGELIST_READ 1 #define PAGELIST_READ_WITH_FRAGMENTS 2 -typedef struct pagelist_struct { +struct pagelist { u32 length; u16 type; u16 offset; @@ -46,6 +46,6 @@ typedef struct pagelist_struct { * of following pages at consecutive * addresses. */ -} PAGELIST_T; +}; #endif /* VCHIQ_PAGELIST_H */ diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_shim.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_shim.c index c3223fcdaf87..ab6ca8fd6f14 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_shim.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_shim.c @@ -44,7 +44,7 @@ struct shim_service { VCHIQ_SERVICE_HANDLE_T handle; - VCHIU_QUEUE_T queue; + struct vchiu_queue queue; VCHI_CALLBACK_T callback; void *callback_param; @@ -72,7 +72,7 @@ int32_t vchi_msg_peek(VCHI_SERVICE_HANDLE_T handle, VCHI_FLAGS_T flags) { struct shim_service *service = (struct shim_service *)handle; - VCHIQ_HEADER_T *header; + struct vchiq_header *header; WARN_ON((flags != VCHI_FLAGS_NONE) && (flags != VCHI_FLAGS_BLOCK_UNTIL_OP_COMPLETE)); @@ -104,7 +104,7 @@ EXPORT_SYMBOL(vchi_msg_peek); int32_t vchi_msg_remove(VCHI_SERVICE_HANDLE_T handle) { struct shim_service *service = (struct shim_service *)handle; - VCHIQ_HEADER_T *header; + struct vchiq_header *header; header = vchiu_queue_pop(&service->queue); @@ -357,7 +357,7 @@ int32_t vchi_msg_dequeue(VCHI_SERVICE_HANDLE_T handle, VCHI_FLAGS_T flags) { struct shim_service *service = (struct shim_service *)handle; - VCHIQ_HEADER_T *header; + struct vchiq_header *header; WARN_ON((flags != VCHI_FLAGS_NONE) && (flags != VCHI_FLAGS_BLOCK_UNTIL_OP_COMPLETE)); @@ -382,7 +382,7 @@ EXPORT_SYMBOL(vchi_msg_dequeue); /*********************************************************** * Name: vchi_held_msg_release * - * Arguments: VCHI_HELD_MSG_T *message + * Arguments: struct vchi_held_msg *message * * Description: Routine to release a held message (after it has been read with * vchi_msg_hold) @@ -390,7 +390,7 @@ EXPORT_SYMBOL(vchi_msg_dequeue); * Returns: int32_t - success == 0 * ***********************************************************/ -int32_t vchi_held_msg_release(VCHI_HELD_MSG_T *message) +int32_t vchi_held_msg_release(struct vchi_held_msg *message) { /* * Convert the service field pointer back to an @@ -401,7 +401,7 @@ int32_t vchi_held_msg_release(VCHI_HELD_MSG_T *message) */ vchiq_release_message((VCHIQ_SERVICE_HANDLE_T)(long)message->service, - (VCHIQ_HEADER_T *)message->message); + (struct vchiq_header *)message->message); return 0; } @@ -414,7 +414,7 @@ EXPORT_SYMBOL(vchi_held_msg_release); * void **data, * uint32_t *msg_size, * VCHI_FLAGS_T flags, - * VCHI_HELD_MSG_T *message_handle + * struct vchi_held_msg *message_handle * * Description: Routine to return a pointer to the current message (to allow * in place processing). The message is dequeued - don't forget @@ -428,10 +428,10 @@ int32_t vchi_msg_hold(VCHI_SERVICE_HANDLE_T handle, void **data, uint32_t *msg_size, VCHI_FLAGS_T flags, - VCHI_HELD_MSG_T *message_handle) + struct vchi_held_msg *message_handle) { struct shim_service *service = (struct shim_service *)handle; - VCHIQ_HEADER_T *header; + struct vchiq_header *header; WARN_ON((flags != VCHI_FLAGS_NONE) && (flags != VCHI_FLAGS_BLOCK_UNTIL_OP_COMPLETE)); @@ -530,7 +530,7 @@ EXPORT_SYMBOL(vchi_disconnect); * Name: vchi_service_create * * Arguments: VCHI_INSTANCE_T *instance_handle - * SERVICE_CREATION_T *setup, + * struct service_creation *setup, * VCHI_SERVICE_HANDLE_T *handle * * Description: Routine to open a service @@ -540,7 +540,9 @@ EXPORT_SYMBOL(vchi_disconnect); ***********************************************************/ static VCHIQ_STATUS_T shim_callback(VCHIQ_REASON_T reason, - VCHIQ_HEADER_T *header, VCHIQ_SERVICE_HANDLE_T handle, void *bulk_user) + struct vchiq_header *header, + VCHIQ_SERVICE_HANDLE_T handle, + void *bulk_user) { struct shim_service *service = (struct shim_service *)VCHIQ_GET_SERVICE_USERDATA(handle); @@ -600,7 +602,7 @@ done: } static struct shim_service *service_alloc(VCHIQ_INSTANCE_T instance, - SERVICE_CREATION_T *setup) + struct service_creation *setup) { struct shim_service *service = kzalloc(sizeof(struct shim_service), GFP_KERNEL); @@ -628,7 +630,7 @@ static void service_free(struct shim_service *service) } int32_t vchi_service_open(VCHI_INSTANCE_T instance_handle, - SERVICE_CREATION_T *setup, + struct service_creation *setup, VCHI_SERVICE_HANDLE_T *handle) { VCHIQ_INSTANCE_T instance = (VCHIQ_INSTANCE_T)instance_handle; @@ -637,7 +639,7 @@ int32_t vchi_service_open(VCHI_INSTANCE_T instance_handle, *handle = (VCHI_SERVICE_HANDLE_T)service; if (service) { - VCHIQ_SERVICE_PARAMS_T params; + struct vchiq_service_params params; VCHIQ_STATUS_T status; memset(¶ms, 0, sizeof(params)); @@ -660,38 +662,6 @@ int32_t vchi_service_open(VCHI_INSTANCE_T instance_handle, } EXPORT_SYMBOL(vchi_service_open); -int32_t vchi_service_create(VCHI_INSTANCE_T instance_handle, - SERVICE_CREATION_T *setup, - VCHI_SERVICE_HANDLE_T *handle) -{ - VCHIQ_INSTANCE_T instance = (VCHIQ_INSTANCE_T)instance_handle; - struct shim_service *service = service_alloc(instance, setup); - - *handle = (VCHI_SERVICE_HANDLE_T)service; - - if (service) { - VCHIQ_SERVICE_PARAMS_T params; - VCHIQ_STATUS_T status; - - memset(¶ms, 0, sizeof(params)); - params.fourcc = setup->service_id; - params.callback = shim_callback; - params.userdata = service; - params.version = setup->version.version; - params.version_min = setup->version.version_min; - status = vchiq_add_service(instance, ¶ms, &service->handle); - - if (status != VCHIQ_SUCCESS) { - service_free(service); - service = NULL; - *handle = NULL; - } - } - - return (service != NULL) ? 0 : -1; -} -EXPORT_SYMBOL(vchi_service_create); - int32_t vchi_service_close(const VCHI_SERVICE_HANDLE_T handle) { int32_t ret = -1; diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_util.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_util.c index 2e52f07bbaa9..55c5fd82b911 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_util.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_util.c @@ -32,14 +32,13 @@ */ #include "vchiq_util.h" -#include "vchiq_killable.h" static inline int is_pow2(int i) { return i && !(i & (i - 1)); } -int vchiu_queue_init(VCHIU_QUEUE_T *queue, int size) +int vchiu_queue_init(struct vchiu_queue *queue, int size) { WARN_ON(!is_pow2(size)); @@ -48,10 +47,11 @@ int vchiu_queue_init(VCHIU_QUEUE_T *queue, int size) queue->write = 0; queue->initialized = 1; - sema_init(&queue->pop, 0); - sema_init(&queue->push, 0); + init_completion(&queue->pop); + init_completion(&queue->push); - queue->storage = kcalloc(size, sizeof(VCHIQ_HEADER_T *), GFP_KERNEL); + queue->storage = kcalloc(size, sizeof(struct vchiq_header *), + GFP_KERNEL); if (!queue->storage) { vchiu_queue_delete(queue); return 0; @@ -59,94 +59,62 @@ int vchiu_queue_init(VCHIU_QUEUE_T *queue, int size) return 1; } -void vchiu_queue_delete(VCHIU_QUEUE_T *queue) +void vchiu_queue_delete(struct vchiu_queue *queue) { kfree(queue->storage); } -int vchiu_queue_is_empty(VCHIU_QUEUE_T *queue) +int vchiu_queue_is_empty(struct vchiu_queue *queue) { return queue->read == queue->write; } -int vchiu_queue_is_full(VCHIU_QUEUE_T *queue) +int vchiu_queue_is_full(struct vchiu_queue *queue) { return queue->write == queue->read + queue->size; } -void vchiu_queue_push(VCHIU_QUEUE_T *queue, VCHIQ_HEADER_T *header) +void vchiu_queue_push(struct vchiu_queue *queue, struct vchiq_header *header) { if (!queue->initialized) return; while (queue->write == queue->read + queue->size) { - if (down_interruptible(&queue->pop) != 0) + if (wait_for_completion_killable(&queue->pop)) flush_signals(current); } - /* - * Write to queue->storage must be visible after read from - * queue->read - */ - smp_mb(); - queue->storage[queue->write & (queue->size - 1)] = header; - - /* - * Write to queue->storage must be visible before write to - * queue->write - */ - smp_wmb(); - queue->write++; - up(&queue->push); + complete(&queue->push); } -VCHIQ_HEADER_T *vchiu_queue_peek(VCHIU_QUEUE_T *queue) +struct vchiq_header *vchiu_queue_peek(struct vchiu_queue *queue) { while (queue->write == queue->read) { - if (down_interruptible(&queue->push) != 0) + if (wait_for_completion_killable(&queue->push)) flush_signals(current); } - up(&queue->push); // We haven't removed anything from the queue. - - /* - * Read from queue->storage must be visible after read from - * queue->write - */ - smp_rmb(); + complete(&queue->push); // We haven't removed anything from the queue. return queue->storage[queue->read & (queue->size - 1)]; } -VCHIQ_HEADER_T *vchiu_queue_pop(VCHIU_QUEUE_T *queue) +struct vchiq_header *vchiu_queue_pop(struct vchiu_queue *queue) { - VCHIQ_HEADER_T *header; + struct vchiq_header *header; while (queue->write == queue->read) { - if (down_interruptible(&queue->push) != 0) + if (wait_for_completion_killable(&queue->push)) flush_signals(current); } - /* - * Read from queue->storage must be visible after read from - * queue->write - */ - smp_rmb(); - header = queue->storage[queue->read & (queue->size - 1)]; - - /* - * Read from queue->storage must be visible before write to - * queue->read - */ - smp_mb(); - queue->read++; - up(&queue->pop); + complete(&queue->pop); return header; } diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_util.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_util.h index 5a1540d349d3..d842194b4023 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_util.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_util.h @@ -35,7 +35,7 @@ #define VCHIQ_UTIL_H #include <linux/types.h> -#include <linux/semaphore.h> +#include <linux/completion.h> #include <linux/mutex.h> #include <linux/bitops.h> #include <linux/kthread.h> @@ -54,27 +54,28 @@ #include "vchiq_if.h" -typedef struct { +struct vchiu_queue { int size; int read; int write; int initialized; - struct semaphore pop; - struct semaphore push; + struct completion pop; + struct completion push; - VCHIQ_HEADER_T **storage; -} VCHIU_QUEUE_T; + struct vchiq_header **storage; +}; -extern int vchiu_queue_init(VCHIU_QUEUE_T *queue, int size); -extern void vchiu_queue_delete(VCHIU_QUEUE_T *queue); +extern int vchiu_queue_init(struct vchiu_queue *queue, int size); +extern void vchiu_queue_delete(struct vchiu_queue *queue); -extern int vchiu_queue_is_empty(VCHIU_QUEUE_T *queue); -extern int vchiu_queue_is_full(VCHIU_QUEUE_T *queue); +extern int vchiu_queue_is_empty(struct vchiu_queue *queue); +extern int vchiu_queue_is_full(struct vchiu_queue *queue); -extern void vchiu_queue_push(VCHIU_QUEUE_T *queue, VCHIQ_HEADER_T *header); +extern void vchiu_queue_push(struct vchiu_queue *queue, + struct vchiq_header *header); -extern VCHIQ_HEADER_T *vchiu_queue_peek(VCHIU_QUEUE_T *queue); -extern VCHIQ_HEADER_T *vchiu_queue_pop(VCHIU_QUEUE_T *queue); +extern struct vchiq_header *vchiu_queue_peek(struct vchiu_queue *queue); +extern struct vchiq_header *vchiu_queue_pop(struct vchiu_queue *queue); #endif diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/baseband.c index f0b163473426..b4cdc0b7fee7 100644 --- a/drivers/staging/vt6655/baseband.c +++ b/drivers/staging/vt6655/baseband.c @@ -13,7 +13,7 @@ * * Functions: * BBuGetFrameTime - Calculate data frame transmitting time - * BBvCaculateParameter - Caculate PhyLength, PhyService and Phy Signal + * BBvCalculateParameter - Calculate PhyLength, PhyService and Phy Signal * parameter for baseband Tx * BBbReadEmbedded - Embedded read baseband register via MAC * BBbWriteEmbedded - Embedded write baseband register via MAC @@ -1704,13 +1704,9 @@ static const unsigned short awcFrameTime[MAX_RATE] = { * Return Value: FrameTime * */ -unsigned int -BBuGetFrameTime( - unsigned char byPreambleType, - unsigned char byPktType, - unsigned int cbFrameLength, - unsigned short wRate -) +unsigned int BBuGetFrameTime(unsigned char byPreambleType, + unsigned char byPktType, + unsigned int cbFrameLength, unsigned short wRate) { unsigned int uFrameTime; unsigned int uPreamble; diff --git a/drivers/staging/vt6655/baseband.h b/drivers/staging/vt6655/baseband.h index 30d9e9d20a39..0cc2e07829c5 100644 --- a/drivers/staging/vt6655/baseband.h +++ b/drivers/staging/vt6655/baseband.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. * All rights reserved. diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c index 52e9e6b90b56..6ecbe925026d 100644 --- a/drivers/staging/vt6655/card.c +++ b/drivers/staging/vt6655/card.c @@ -60,14 +60,9 @@ static const unsigned short cwRXBCNTSFOff[MAX_RATE] = { /*--------------------- Static Functions --------------------------*/ -static -void -s_vCalculateOFDMRParameter( - unsigned char byRate, - u8 bb_type, - unsigned char *pbyTxRate, - unsigned char *pbyRsvTime -); +static void s_vCalculateOFDMRParameter(unsigned char byRate, u8 bb_type, + unsigned char *pbyTxRate, + unsigned char *pbyRsvTime); /*--------------------- Export Functions --------------------------*/ @@ -506,10 +501,7 @@ bool CARDbRadioPowerOn(struct vnt_private *priv) return bResult; } -void -CARDvSafeResetTx( - struct vnt_private *priv -) +void CARDvSafeResetTx(struct vnt_private *priv) { unsigned int uu; struct vnt_tx_desc *pCurrTD; diff --git a/drivers/staging/vt6655/card.h b/drivers/staging/vt6655/card.h index 5884fd56153e..d71022aa3f86 100644 --- a/drivers/staging/vt6655/card.h +++ b/drivers/staging/vt6655/card.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. * All rights reserved. diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c index 1ab0e8562d40..c6bb4aaf9bd0 100644 --- a/drivers/staging/vt6655/device_main.c +++ b/drivers/staging/vt6655/device_main.c @@ -440,12 +440,9 @@ static bool device_init_rings(struct vnt_private *priv) void *vir_pool; /*allocate all RD/TD rings a single pool*/ - vir_pool = dma_zalloc_coherent(&priv->pcid->dev, - priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) + - priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) + - priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) + - priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc), - &priv->pool_dma, GFP_ATOMIC); + vir_pool = dma_alloc_coherent(&priv->pcid->dev, + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) + priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc), + &priv->pool_dma, GFP_ATOMIC); if (!vir_pool) { dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n"); return false; @@ -459,13 +456,9 @@ static bool device_init_rings(struct vnt_private *priv) priv->rd1_pool_dma = priv->rd0_pool_dma + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc); - priv->tx0_bufs = dma_zalloc_coherent(&priv->pcid->dev, - priv->opts.tx_descs[0] * PKT_BUF_SZ + - priv->opts.tx_descs[1] * PKT_BUF_SZ + - CB_BEACON_BUF_SIZE + - CB_MAX_BUF_SIZE, - &priv->tx_bufs_dma0, - GFP_ATOMIC); + priv->tx0_bufs = dma_alloc_coherent(&priv->pcid->dev, + priv->opts.tx_descs[0] * PKT_BUF_SZ + priv->opts.tx_descs[1] * PKT_BUF_SZ + CB_BEACON_BUF_SIZE + CB_MAX_BUF_SIZE, + &priv->tx_bufs_dma0, GFP_ATOMIC); if (!priv->tx0_bufs) { dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n"); @@ -812,12 +805,12 @@ static bool device_alloc_rx_buf(struct vnt_private *priv, } static void device_free_rx_buf(struct vnt_private *priv, - struct vnt_rx_desc *rd) + struct vnt_rx_desc *rd) { struct vnt_rd_info *rd_info = rd->rd_info; dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma, - priv->rx_buf_sz, DMA_FROM_DEVICE); + priv->rx_buf_sz, DMA_FROM_DEVICE); dev_kfree_skb(rd_info->skb); } @@ -1040,8 +1033,6 @@ static void vnt_interrupt_process(struct vnt_private *priv) return; } - MACvIntDisable(priv->PortOffset); - spin_lock_irqsave(&priv->lock, flags); /* Read low level stats */ @@ -1129,8 +1120,6 @@ static void vnt_interrupt_process(struct vnt_private *priv) } spin_unlock_irqrestore(&priv->lock, flags); - - MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); } static void vnt_interrupt_work(struct work_struct *work) @@ -1140,14 +1129,17 @@ static void vnt_interrupt_work(struct work_struct *work) if (priv->vif) vnt_interrupt_process(priv); + + MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); } static irqreturn_t vnt_interrupt(int irq, void *arg) { struct vnt_private *priv = arg; - if (priv->vif) - schedule_work(&priv->interrupt_work); + schedule_work(&priv->interrupt_work); + + MACvIntDisable(priv->PortOffset); return IRQ_HANDLED; } diff --git a/drivers/staging/vt6656/key.c b/drivers/staging/vt6656/key.c index 91dede54cc1f..dcd933a6b66e 100644 --- a/drivers/staging/vt6656/key.c +++ b/drivers/staging/vt6656/key.c @@ -63,17 +63,19 @@ static int vnt_set_keymode(struct ieee80211_hw *hw, u8 *mac_addr, } switch (key_type) { - /* fallthrough */ case VNT_KEY_DEFAULTKEY: /* default key last entry */ entry = MAX_KEY_TABLE - 1; key->hw_key_idx = entry; + /* fall through */ case VNT_KEY_ALLGROUP: key_mode |= VNT_KEY_ALLGROUP; if (onfly_latch) key_mode |= VNT_KEY_ONFLY_ALL; + /* fall through */ case VNT_KEY_GROUP_ADDRESS: key_mode |= mode; + /* fall through */ case VNT_KEY_GROUP: key_mode |= (mode << 4); key_mode |= VNT_KEY_GROUP; diff --git a/drivers/staging/vt6656/mac.h b/drivers/staging/vt6656/mac.h index 94e700fcd0b6..3fd87f95c524 100644 --- a/drivers/staging/vt6656/mac.h +++ b/drivers/staging/vt6656/mac.h @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. * All rights reserved. diff --git a/drivers/staging/wilc1000/Makefile b/drivers/staging/wilc1000/Makefile index 37e8560e501e..2ad3feed9725 100644 --- a/drivers/staging/wilc1000/Makefile +++ b/drivers/staging/wilc1000/Makefile @@ -4,9 +4,8 @@ obj-$(CONFIG_WILC1000) += wilc1000.o ccflags-y += -DFIRMWARE_1002=\"atmel/wilc1002_firmware.bin\" \ -DFIRMWARE_1003=\"atmel/wilc1003_firmware.bin\" -wilc1000-objs := wilc_wfi_cfgoperations.o linux_wlan.o linux_mon.o \ - coreconfigurator.o host_interface.o \ - wilc_wlan_cfg.o wilc_wlan.o +wilc1000-objs := wilc_wfi_cfgoperations.o wilc_netdev.o wilc_mon.o \ + host_interface.o wilc_wlan_cfg.o wilc_wlan.o obj-$(CONFIG_WILC1000_SDIO) += wilc1000-sdio.o wilc1000-sdio-objs += wilc_sdio.o diff --git a/drivers/staging/wilc1000/coreconfigurator.c b/drivers/staging/wilc1000/coreconfigurator.c deleted file mode 100644 index d6d3a971be43..000000000000 --- a/drivers/staging/wilc1000/coreconfigurator.c +++ /dev/null @@ -1,287 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries. - * All rights reserved. - */ - -#include <linux/ieee80211.h> - -#include "coreconfigurator.h" - -#define TAG_PARAM_OFFSET (MAC_HDR_LEN + TIME_STAMP_LEN + \ - BEACON_INTERVAL_LEN + CAP_INFO_LEN) - -enum sub_frame_type { - ASSOC_REQ = 0x00, - ASSOC_RSP = 0x10, - REASSOC_REQ = 0x20, - REASSOC_RSP = 0x30, - PROBE_REQ = 0x40, - PROBE_RSP = 0x50, - BEACON = 0x80, - ATIM = 0x90, - DISASOC = 0xA0, - AUTH = 0xB0, - DEAUTH = 0xC0, - ACTION = 0xD0, - PS_POLL = 0xA4, - RTS = 0xB4, - CTS = 0xC4, - ACK = 0xD4, - CFEND = 0xE4, - CFEND_ACK = 0xF4, - DATA = 0x08, - DATA_ACK = 0x18, - DATA_POLL = 0x28, - DATA_POLL_ACK = 0x38, - NULL_FRAME = 0x48, - CFACK = 0x58, - CFPOLL = 0x68, - CFPOLL_ACK = 0x78, - QOS_DATA = 0x88, - QOS_DATA_ACK = 0x98, - QOS_DATA_POLL = 0xA8, - QOS_DATA_POLL_ACK = 0xB8, - QOS_NULL_FRAME = 0xC8, - QOS_CFPOLL = 0xE8, - QOS_CFPOLL_ACK = 0xF8, - BLOCKACK_REQ = 0x84, - BLOCKACK = 0x94, - FRAME_SUBTYPE_FORCE_32BIT = 0xFFFFFFFF -}; - -static inline u16 get_beacon_period(u8 *data) -{ - u16 bcn_per; - - bcn_per = data[0]; - bcn_per |= (data[1] << 8); - - return bcn_per; -} - -static inline u32 get_beacon_timestamp_lo(u8 *data) -{ - u32 time_stamp = 0; - u32 index = MAC_HDR_LEN; - - time_stamp |= data[index++]; - time_stamp |= (data[index++] << 8); - time_stamp |= (data[index++] << 16); - time_stamp |= (data[index] << 24); - - return time_stamp; -} - -static inline u32 get_beacon_timestamp_hi(u8 *data) -{ - u32 time_stamp = 0; - u32 index = (MAC_HDR_LEN + 4); - - time_stamp |= data[index++]; - time_stamp |= (data[index++] << 8); - time_stamp |= (data[index++] << 16); - time_stamp |= (data[index] << 24); - - return time_stamp; -} - -static inline enum sub_frame_type get_sub_type(u8 *header) -{ - return ((enum sub_frame_type)(header[0] & 0xFC)); -} - -static inline u8 get_to_ds(u8 *header) -{ - return (header[1] & 0x01); -} - -static inline u8 get_from_ds(u8 *header) -{ - return ((header[1] & 0x02) >> 1); -} - -static inline void get_address1(u8 *msa, u8 *addr) -{ - memcpy(addr, msa + 4, 6); -} - -static inline void get_address2(u8 *msa, u8 *addr) -{ - memcpy(addr, msa + 10, 6); -} - -static inline void get_address3(u8 *msa, u8 *addr) -{ - memcpy(addr, msa + 16, 6); -} - -static inline void get_bssid(u8 *data, u8 *bssid) -{ - if (get_from_ds(data) == 1) - get_address2(data, bssid); - else if (get_to_ds(data) == 1) - get_address1(data, bssid); - else - get_address3(data, bssid); -} - -static inline void get_ssid(u8 *data, u8 *ssid, u8 *p_ssid_len) -{ - u8 i, j, len; - - len = data[TAG_PARAM_OFFSET + 1]; - j = TAG_PARAM_OFFSET + 2; - - if (len >= MAX_SSID_LEN) - len = 0; - - for (i = 0; i < len; i++, j++) - ssid[i] = data[j]; - - ssid[len] = '\0'; - - *p_ssid_len = len; -} - -static inline u16 get_cap_info(u8 *data) -{ - u16 cap_info = 0; - u16 index = MAC_HDR_LEN; - enum sub_frame_type st; - - st = get_sub_type(data); - - if (st == BEACON || st == PROBE_RSP) - index += TIME_STAMP_LEN + BEACON_INTERVAL_LEN; - - cap_info = data[index]; - cap_info |= (data[index + 1] << 8); - - return cap_info; -} - -static inline u16 get_asoc_status(u8 *data) -{ - u16 asoc_status; - - asoc_status = data[3]; - return (asoc_status << 8) | data[2]; -} - -static u8 *get_tim_elm(u8 *msa, u16 rx_len, u16 tag_param_offset) -{ - u16 index; - - index = tag_param_offset; - - while (index < (rx_len - FCS_LEN)) { - if (msa[index] == WLAN_EID_TIM) - return &msa[index]; - index += (IE_HDR_LEN + msa[index + 1]); - } - - return NULL; -} - -static u8 get_current_channel_802_11n(u8 *msa, u16 rx_len) -{ - u16 index; - - index = TAG_PARAM_OFFSET; - while (index < (rx_len - FCS_LEN)) { - if (msa[index] == WLAN_EID_DS_PARAMS) - return msa[index + 2]; - index += msa[index + 1] + IE_HDR_LEN; - } - - return 0; -} - -s32 wilc_parse_network_info(u8 *msg_buffer, - struct network_info **ret_network_info) -{ - struct network_info *network_info; - u8 *wid_val, *msa, *tim_elm, *ies; - u32 tsf_lo, tsf_hi; - u16 wid_len, rx_len, ies_len; - u8 msg_type, index; - - msg_type = msg_buffer[0]; - - if ('N' != msg_type) - return -EFAULT; - - wid_len = MAKE_WORD16(msg_buffer[6], msg_buffer[7]); - wid_val = &msg_buffer[8]; - - network_info = kzalloc(sizeof(*network_info), GFP_KERNEL); - if (!network_info) - return -ENOMEM; - - network_info->rssi = wid_val[0]; - - msa = &wid_val[1]; - - rx_len = wid_len - 1; - network_info->cap_info = get_cap_info(msa); - network_info->tsf_lo = get_beacon_timestamp_lo(msa); - - tsf_lo = get_beacon_timestamp_lo(msa); - tsf_hi = get_beacon_timestamp_hi(msa); - - network_info->tsf_hi = tsf_lo | ((u64)tsf_hi << 32); - - get_ssid(msa, network_info->ssid, &network_info->ssid_len); - get_bssid(msa, network_info->bssid); - - network_info->ch = get_current_channel_802_11n(msa, rx_len - + FCS_LEN); - - index = MAC_HDR_LEN + TIME_STAMP_LEN; - - network_info->beacon_period = get_beacon_period(msa + index); - - index += BEACON_INTERVAL_LEN + CAP_INFO_LEN; - - tim_elm = get_tim_elm(msa, rx_len + FCS_LEN, index); - if (tim_elm) - network_info->dtim_period = tim_elm[3]; - ies = &msa[TAG_PARAM_OFFSET]; - ies_len = rx_len - TAG_PARAM_OFFSET; - - if (ies_len > 0) { - network_info->ies = kmemdup(ies, ies_len, GFP_KERNEL); - if (!network_info->ies) { - kfree(network_info); - return -ENOMEM; - } - } - network_info->ies_len = ies_len; - - *ret_network_info = network_info; - - return 0; -} - -s32 wilc_parse_assoc_resp_info(u8 *buffer, u32 buffer_len, - struct connect_info *ret_conn_info) -{ - u8 *ies; - u16 ies_len; - - ret_conn_info->status = get_asoc_status(buffer); - if (ret_conn_info->status == WLAN_STATUS_SUCCESS) { - ies = &buffer[CAP_INFO_LEN + STATUS_CODE_LEN + AID_LEN]; - ies_len = buffer_len - (CAP_INFO_LEN + STATUS_CODE_LEN + - AID_LEN); - - ret_conn_info->resp_ies = kmemdup(ies, ies_len, GFP_KERNEL); - if (!ret_conn_info->resp_ies) - return -ENOMEM; - - ret_conn_info->resp_ies_len = ies_len; - } - - return 0; -} diff --git a/drivers/staging/wilc1000/coreconfigurator.h b/drivers/staging/wilc1000/coreconfigurator.h deleted file mode 100644 index b62acb447383..000000000000 --- a/drivers/staging/wilc1000/coreconfigurator.h +++ /dev/null @@ -1,81 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries. - * All rights reserved. - */ - -#ifndef CORECONFIGURATOR_H -#define CORECONFIGURATOR_H - -#include "wilc_wlan_if.h" - -#define NUM_RSSI 5 - -#define MAC_HDR_LEN 24 -#define FCS_LEN 4 -#define TIME_STAMP_LEN 8 -#define BEACON_INTERVAL_LEN 2 -#define CAP_INFO_LEN 2 -#define STATUS_CODE_LEN 2 -#define AID_LEN 2 -#define IE_HDR_LEN 2 - -#define SET_CFG 0 -#define GET_CFG 1 - -#define MAX_STRING_LEN 256 -#define MAX_ASSOC_RESP_FRAME_SIZE MAX_STRING_LEN - -#define MAKE_WORD16(lsb, msb) ((((u16)(msb) << 8) & 0xFF00) | (lsb)) -#define MAKE_WORD32(lsw, msw) ((((u32)(msw) << 16) & 0xFFFF0000) | (lsw)) - -struct rssi_history_buffer { - bool full; - u8 index; - s8 samples[NUM_RSSI]; -}; - -struct network_info { - s8 rssi; - u16 cap_info; - u8 ssid[MAX_SSID_LEN]; - u8 ssid_len; - u8 bssid[6]; - u16 beacon_period; - u8 dtim_period; - u8 ch; - unsigned long time_scan_cached; - unsigned long time_scan; - bool new_network; - u8 found; - u32 tsf_lo; - u8 *ies; - u16 ies_len; - void *join_params; - struct rssi_history_buffer rssi_history; - u64 tsf_hi; -}; - -struct connect_info { - u8 bssid[6]; - u8 *req_ies; - size_t req_ies_len; - u8 *resp_ies; - u16 resp_ies_len; - u16 status; -}; - -struct disconnect_info { - u16 reason; - u8 *ie; - size_t ie_len; -}; - -s32 wilc_parse_network_info(u8 *msg_buffer, - struct network_info **ret_network_info); -s32 wilc_parse_assoc_resp_info(u8 *buffer, u32 buffer_len, - struct connect_info *ret_conn_info); -void wilc_scan_complete_received(struct wilc *wilc, u8 *buffer, u32 length); -void wilc_network_info_received(struct wilc *wilc, u8 *buffer, u32 length); -void wilc_gnrl_async_info_received(struct wilc *wilc, u8 *buffer, u32 length); -#endif diff --git a/drivers/staging/wilc1000/host_interface.c b/drivers/staging/wilc1000/host_interface.c index 01db8999335e..4dd9a20f6a0b 100644 --- a/drivers/staging/wilc1000/host_interface.c +++ b/drivers/staging/wilc1000/host_interface.c @@ -6,150 +6,79 @@ #include "wilc_wfi_netdevice.h" -#define HOST_IF_SCAN_TIMEOUT 4000 -#define HOST_IF_CONNECT_TIMEOUT 9500 +#define WILC_HIF_SCAN_TIMEOUT_MS 4000 +#define WILC_HIF_CONNECT_TIMEOUT_MS 9500 -#define FALSE_FRMWR_CHANNEL 100 +#define WILC_FALSE_FRMWR_CHANNEL 100 +#define WILC_MAX_RATES_SUPPORTED 12 -#define REAL_JOIN_REQ 0 - -struct host_if_wpa_attr { - u8 *key; - const u8 *mac_addr; - u8 *seq; - u8 seq_len; - u8 index; - u8 key_len; - u8 mode; -}; - -struct host_if_wep_attr { - u8 *key; - u8 key_len; - u8 index; - u8 mode; - enum authtype auth_type; -}; - -union host_if_key_attr { - struct host_if_wep_attr wep; - struct host_if_wpa_attr wpa; - struct host_if_pmkid_attr pmkid; -}; - -struct key_attr { - enum KEY_TYPE type; - u8 action; - union host_if_key_attr attr; -}; - -struct scan_attr { - u8 src; - u8 type; - u8 *ch_freq_list; - u8 ch_list_len; - u8 *ies; - size_t ies_len; - wilc_scan_result result; - void *arg; - struct hidden_network hidden_network; -}; - -struct connect_attr { - u8 *bssid; - u8 *ssid; - size_t ssid_len; - u8 *ies; - size_t ies_len; - u8 security; - wilc_connect_result result; - void *arg; - enum authtype auth_type; - u8 ch; - void *params; -}; - -struct rcvd_async_info { - u8 *buffer; - u32 len; +struct wilc_rcvd_mac_info { + u8 status; }; -struct channel_attr { - u8 set_ch; -}; - -struct beacon_attr { - u32 interval; - u32 dtim_period; - u32 head_len; - u8 *head; - u32 tail_len; - u8 *tail; -}; - -struct set_multicast { - bool enabled; +struct wilc_set_multicast { + u32 enabled; u32 cnt; u8 *mc_list; }; -struct del_all_sta { - u8 del_all_sta[MAX_NUM_STA][ETH_ALEN]; +struct wilc_del_all_sta { u8 assoc_sta; + u8 mac[WILC_MAX_NUM_STA][ETH_ALEN]; }; -struct del_sta { - u8 mac_addr[ETH_ALEN]; +struct wilc_op_mode { + __le32 mode; }; -struct power_mgmt_param { - bool enabled; - u32 timeout; -}; +struct wilc_reg_frame { + bool reg; + u8 reg_id; + __le16 frame_type; +} __packed; -struct set_ip_addr { - u8 *ip_addr; - u8 idx; -}; +struct wilc_drv_handler { + __le32 handler; + u8 mode; +} __packed; -struct sta_inactive_t { - u32 inactive_time; - u8 mac[6]; -}; +struct wilc_wep_key { + u8 index; + u8 key_len; + u8 key[0]; +} __packed; -struct tx_power { - u8 tx_pwr; -}; +struct wilc_sta_wpa_ptk { + u8 mac_addr[ETH_ALEN]; + u8 key_len; + u8 key[0]; +} __packed; -union message_body { - struct scan_attr scan_info; - struct connect_attr con_info; - struct rcvd_net_info net_info; - struct rcvd_async_info async_info; - struct key_attr key_info; - struct cfg_param_attr cfg_info; - struct channel_attr channel_info; - struct beacon_attr beacon_info; - struct add_sta_param add_sta_info; - struct del_sta del_sta_info; - struct add_sta_param edit_sta_info; - struct power_mgmt_param pwr_mgmt_info; - struct sta_inactive_t mac_info; - struct set_ip_addr ip_info; - struct drv_handler drv; - struct set_multicast multicast_info; - struct op_mode mode; - struct get_mac_addr get_mac_info; - struct ba_session_info session_info; - struct remain_ch remain_on_ch; - struct reg_frame reg_frame; +struct wilc_ap_wpa_ptk { + u8 mac_addr[ETH_ALEN]; + u8 index; + u8 key_len; + u8 key[0]; +} __packed; + +struct wilc_gtk_key { + u8 mac_addr[ETH_ALEN]; + u8 rsc[8]; + u8 index; + u8 key_len; + u8 key[0]; +} __packed; + +union wilc_message_body { + struct wilc_rcvd_net_info net_info; + struct wilc_rcvd_mac_info mac_info; + struct wilc_set_multicast mc_info; + struct wilc_remain_ch remain_on_ch; char *data; - struct del_all_sta del_all_sta_info; - struct tx_power tx_power; }; struct host_if_msg { - union message_body body; + union wilc_message_body body; struct wilc_vif *vif; struct work_struct work; void (*fn)(struct work_struct *ws); @@ -157,37 +86,50 @@ struct host_if_msg { bool is_sync; }; -struct join_bss_param { - enum bss_types bss_type; +struct wilc_noa_opp_enable { + u8 ct_window; + u8 cnt; + __le32 duration; + __le32 interval; + __le32 start_time; +} __packed; + +struct wilc_noa_opp_disable { + u8 cnt; + __le32 duration; + __le32 interval; + __le32 start_time; +} __packed; + +struct wilc_join_bss_param { + char ssid[IEEE80211_MAX_SSID_LEN]; + u8 ssid_terminator; + u8 bss_type; + u8 ch; + __le16 cap_info; + u8 sa[ETH_ALEN]; + u8 bssid[ETH_ALEN]; + __le16 beacon_period; u8 dtim_period; - u16 beacon_period; - u16 cap_info; - u8 bssid[6]; - char ssid[MAX_SSID_LEN]; - u8 ssid_len; - u8 supp_rates[MAX_RATES_SUPPORTED + 1]; - u8 ht_capable; + u8 supp_rates[WILC_MAX_RATES_SUPPORTED + 1]; u8 wmm_cap; u8 uapsd_cap; - bool rsn_found; + u8 ht_capable; + u8 rsn_found; u8 rsn_grp_policy; u8 mode_802_11i; - u8 rsn_pcip_policy[3]; - u8 rsn_auth_policy[3]; + u8 p_suites[3]; + u8 akm_suites[3]; u8 rsn_cap[2]; - u32 tsf; u8 noa_enabled; - u8 opp_enabled; - u8 ct_window; - u8 cnt; + __le32 tsf_lo; u8 idx; - u8 duration[4]; - u8 interval[4]; - u8 start_time[4]; -}; - -static struct host_if_drv *terminated_handle; -static struct mutex hif_deinit_lock; + u8 opp_enabled; + union { + struct wilc_noa_opp_disable opp_dis; + struct wilc_noa_opp_enable opp_en; + }; +} __packed; /* 'msg' should be free by the caller for syc */ static struct host_if_msg* @@ -242,429 +184,19 @@ static struct wilc_vif *wilc_get_vif_from_idx(struct wilc *wilc, int idx) { int index = idx - 1; - if (index < 0 || index >= NUM_CONCURRENT_IFC) + if (index < 0 || index >= WILC_NUM_CONCURRENT_IFC) return NULL; return wilc->vif[index]; } -static void handle_set_channel(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct channel_attr *hif_set_ch = &msg->body.channel_info; - int ret; - struct wid wid; - - wid.id = WID_CURRENT_CHANNEL; - wid.type = WID_CHAR; - wid.val = (char *)&hif_set_ch->set_ch; - wid.size = sizeof(char); - - ret = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - - if (ret) - netdev_err(vif->ndev, "Failed to set channel\n"); - kfree(msg); -} - -static void handle_set_wfi_drv_handler(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct drv_handler *hif_drv_handler = &msg->body.drv; - int ret; - struct wid wid; - u8 *currbyte, *buffer; - struct host_if_drv *hif_drv; - - if (!vif->hif_drv || !hif_drv_handler) - goto free_msg; - - hif_drv = vif->hif_drv; - - buffer = kzalloc(DRV_HANDLER_SIZE, GFP_KERNEL); - if (!buffer) - goto free_msg; - - currbyte = buffer; - *currbyte = hif_drv->driver_handler_id & DRV_HANDLER_MASK; - currbyte++; - *currbyte = (u32)0 & DRV_HANDLER_MASK; - currbyte++; - *currbyte = (u32)0 & DRV_HANDLER_MASK; - currbyte++; - *currbyte = (u32)0 & DRV_HANDLER_MASK; - currbyte++; - *currbyte = (hif_drv_handler->name | (hif_drv_handler->mode << 1)); - - wid.id = WID_SET_DRV_HANDLER; - wid.type = WID_STR; - wid.val = (s8 *)buffer; - wid.size = DRV_HANDLER_SIZE; - - ret = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - hif_drv->driver_handler_id); - if (ret) - netdev_err(vif->ndev, "Failed to set driver handler\n"); - - kfree(buffer); - -free_msg: - if (msg->is_sync) - complete(&msg->work_comp); - - kfree(msg); -} - -static void handle_set_operation_mode(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct op_mode *hif_op_mode = &msg->body.mode; - int ret; - struct wid wid; - - wid.id = WID_SET_OPERATION_MODE; - wid.type = WID_INT; - wid.val = (s8 *)&hif_op_mode->mode; - wid.size = sizeof(u32); - - ret = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - - if (ret) - netdev_err(vif->ndev, "Failed to set operation mode\n"); - - kfree(msg); -} - -static void handle_get_mac_address(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct get_mac_addr *get_mac_addr = &msg->body.get_mac_info; - int ret; - struct wid wid; - - wid.id = WID_MAC_ADDR; - wid.type = WID_STR; - wid.val = get_mac_addr->mac_addr; - wid.size = ETH_ALEN; - - ret = wilc_send_config_pkt(vif, GET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - - if (ret) - netdev_err(vif->ndev, "Failed to get mac address\n"); - complete(&msg->work_comp); - /* free 'msg' data later, in caller */ -} - -static void handle_cfg_param(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct cfg_param_attr *param = &msg->body.cfg_info; - int ret; - struct wid wid_list[32]; - struct host_if_drv *hif_drv = vif->hif_drv; - int i = 0; - - mutex_lock(&hif_drv->cfg_values_lock); - - if (param->flag & BSS_TYPE) { - u8 bss_type = param->bss_type; - - if (bss_type < 6) { - wid_list[i].id = WID_BSS_TYPE; - wid_list[i].val = (s8 *)¶m->bss_type; - wid_list[i].type = WID_CHAR; - wid_list[i].size = sizeof(char); - hif_drv->cfg_values.bss_type = bss_type; - } else { - netdev_err(vif->ndev, "check value 6 over\n"); - goto unlock; - } - i++; - } - if (param->flag & AUTH_TYPE) { - u8 auth_type = param->auth_type; - - if (auth_type == 1 || auth_type == 2 || auth_type == 5) { - wid_list[i].id = WID_AUTH_TYPE; - wid_list[i].val = (s8 *)¶m->auth_type; - wid_list[i].type = WID_CHAR; - wid_list[i].size = sizeof(char); - hif_drv->cfg_values.auth_type = auth_type; - } else { - netdev_err(vif->ndev, "Impossible value\n"); - goto unlock; - } - i++; - } - if (param->flag & AUTHEN_TIMEOUT) { - if (param->auth_timeout > 0) { - wid_list[i].id = WID_AUTH_TIMEOUT; - wid_list[i].val = (s8 *)¶m->auth_timeout; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.auth_timeout = param->auth_timeout; - } else { - netdev_err(vif->ndev, "Range(1 ~ 65535) over\n"); - goto unlock; - } - i++; - } - if (param->flag & POWER_MANAGEMENT) { - u8 pm_mode = param->power_mgmt_mode; - - if (pm_mode < 5) { - wid_list[i].id = WID_POWER_MANAGEMENT; - wid_list[i].val = (s8 *)¶m->power_mgmt_mode; - wid_list[i].type = WID_CHAR; - wid_list[i].size = sizeof(char); - hif_drv->cfg_values.power_mgmt_mode = pm_mode; - } else { - netdev_err(vif->ndev, "Invalid power mode\n"); - goto unlock; - } - i++; - } - if (param->flag & RETRY_SHORT) { - u16 retry_limit = param->short_retry_limit; - - if (retry_limit > 0 && retry_limit < 256) { - wid_list[i].id = WID_SHORT_RETRY_LIMIT; - wid_list[i].val = (s8 *)¶m->short_retry_limit; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.short_retry_limit = retry_limit; - } else { - netdev_err(vif->ndev, "Range(1~256) over\n"); - goto unlock; - } - i++; - } - if (param->flag & RETRY_LONG) { - u16 limit = param->long_retry_limit; - - if (limit > 0 && limit < 256) { - wid_list[i].id = WID_LONG_RETRY_LIMIT; - wid_list[i].val = (s8 *)¶m->long_retry_limit; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.long_retry_limit = limit; - } else { - netdev_err(vif->ndev, "Range(1~256) over\n"); - goto unlock; - } - i++; - } - if (param->flag & FRAG_THRESHOLD) { - u16 frag_th = param->frag_threshold; - - if (frag_th > 255 && frag_th < 7937) { - wid_list[i].id = WID_FRAG_THRESHOLD; - wid_list[i].val = (s8 *)¶m->frag_threshold; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.frag_threshold = frag_th; - } else { - netdev_err(vif->ndev, "Threshold Range fail\n"); - goto unlock; - } - i++; - } - if (param->flag & RTS_THRESHOLD) { - u16 rts_th = param->rts_threshold; - - if (rts_th > 255) { - wid_list[i].id = WID_RTS_THRESHOLD; - wid_list[i].val = (s8 *)¶m->rts_threshold; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.rts_threshold = rts_th; - } else { - netdev_err(vif->ndev, "Threshold Range fail\n"); - goto unlock; - } - i++; - } - if (param->flag & PREAMBLE) { - u16 preamble_type = param->preamble_type; - - if (param->preamble_type < 3) { - wid_list[i].id = WID_PREAMBLE; - wid_list[i].val = (s8 *)¶m->preamble_type; - wid_list[i].type = WID_CHAR; - wid_list[i].size = sizeof(char); - hif_drv->cfg_values.preamble_type = preamble_type; - } else { - netdev_err(vif->ndev, "Preamble Range(0~2) over\n"); - goto unlock; - } - i++; - } - if (param->flag & SHORT_SLOT_ALLOWED) { - u8 slot_allowed = param->short_slot_allowed; - - if (slot_allowed < 2) { - wid_list[i].id = WID_SHORT_SLOT_ALLOWED; - wid_list[i].val = (s8 *)¶m->short_slot_allowed; - wid_list[i].type = WID_CHAR; - wid_list[i].size = sizeof(char); - hif_drv->cfg_values.short_slot_allowed = slot_allowed; - } else { - netdev_err(vif->ndev, "Short slot(2) over\n"); - goto unlock; - } - i++; - } - if (param->flag & TXOP_PROT_DISABLE) { - u8 prot_disabled = param->txop_prot_disabled; - - if (param->txop_prot_disabled < 2) { - wid_list[i].id = WID_11N_TXOP_PROT_DISABLE; - wid_list[i].val = (s8 *)¶m->txop_prot_disabled; - wid_list[i].type = WID_CHAR; - wid_list[i].size = sizeof(char); - hif_drv->cfg_values.txop_prot_disabled = prot_disabled; - } else { - netdev_err(vif->ndev, "TXOP prot disable\n"); - goto unlock; - } - i++; - } - if (param->flag & BEACON_INTERVAL) { - u16 beacon_interval = param->beacon_interval; - - if (beacon_interval > 0) { - wid_list[i].id = WID_BEACON_INTERVAL; - wid_list[i].val = (s8 *)¶m->beacon_interval; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.beacon_interval = beacon_interval; - } else { - netdev_err(vif->ndev, "Beacon interval(1~65535)fail\n"); - goto unlock; - } - i++; - } - if (param->flag & DTIM_PERIOD) { - if (param->dtim_period > 0 && param->dtim_period < 256) { - wid_list[i].id = WID_DTIM_PERIOD; - wid_list[i].val = (s8 *)¶m->dtim_period; - wid_list[i].type = WID_CHAR; - wid_list[i].size = sizeof(char); - hif_drv->cfg_values.dtim_period = param->dtim_period; - } else { - netdev_err(vif->ndev, "DTIM range(1~255) fail\n"); - goto unlock; - } - i++; - } - if (param->flag & SITE_SURVEY) { - enum site_survey enabled = param->site_survey_enabled; - - if (enabled < 3) { - wid_list[i].id = WID_SITE_SURVEY; - wid_list[i].val = (s8 *)¶m->site_survey_enabled; - wid_list[i].type = WID_CHAR; - wid_list[i].size = sizeof(char); - hif_drv->cfg_values.site_survey_enabled = enabled; - } else { - netdev_err(vif->ndev, "Site survey disable\n"); - goto unlock; - } - i++; - } - if (param->flag & SITE_SURVEY_SCAN_TIME) { - u16 scan_time = param->site_survey_scan_time; - - if (scan_time > 0) { - wid_list[i].id = WID_SITE_SURVEY_SCAN_TIME; - wid_list[i].val = (s8 *)¶m->site_survey_scan_time; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.site_survey_scan_time = scan_time; - } else { - netdev_err(vif->ndev, "Site scan time(1~65535) over\n"); - goto unlock; - } - i++; - } - if (param->flag & ACTIVE_SCANTIME) { - u16 active_scan_time = param->active_scan_time; - - if (active_scan_time > 0) { - wid_list[i].id = WID_ACTIVE_SCAN_TIME; - wid_list[i].val = (s8 *)¶m->active_scan_time; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.active_scan_time = active_scan_time; - } else { - netdev_err(vif->ndev, "Active time(1~65535) over\n"); - goto unlock; - } - i++; - } - if (param->flag & PASSIVE_SCANTIME) { - u16 time = param->passive_scan_time; - - if (time > 0) { - wid_list[i].id = WID_PASSIVE_SCAN_TIME; - wid_list[i].val = (s8 *)¶m->passive_scan_time; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.passive_scan_time = time; - } else { - netdev_err(vif->ndev, "Passive time(1~65535) over\n"); - goto unlock; - } - i++; - } - if (param->flag & CURRENT_TX_RATE) { - enum current_tx_rate curr_tx_rate = param->curr_tx_rate; - - if (curr_tx_rate == AUTORATE || curr_tx_rate == MBPS_1 || - curr_tx_rate == MBPS_2 || curr_tx_rate == MBPS_5_5 || - curr_tx_rate == MBPS_11 || curr_tx_rate == MBPS_6 || - curr_tx_rate == MBPS_9 || curr_tx_rate == MBPS_12 || - curr_tx_rate == MBPS_18 || curr_tx_rate == MBPS_24 || - curr_tx_rate == MBPS_36 || curr_tx_rate == MBPS_48 || - curr_tx_rate == MBPS_54) { - wid_list[i].id = WID_CURRENT_TX_RATE; - wid_list[i].val = (s8 *)&curr_tx_rate; - wid_list[i].type = WID_SHORT; - wid_list[i].size = sizeof(u16); - hif_drv->cfg_values.curr_tx_rate = (u8)curr_tx_rate; - } else { - netdev_err(vif->ndev, "out of TX rate\n"); - goto unlock; - } - i++; - } - - ret = wilc_send_config_pkt(vif, SET_CFG, wid_list, - i, wilc_get_vif_idx(vif)); - - if (ret) - netdev_err(vif->ndev, "Error in setting CFG params\n"); - -unlock: - mutex_unlock(&hif_drv->cfg_values_lock); - kfree(msg); -} - static int handle_scan_done(struct wilc_vif *vif, enum scan_event evt) { int result = 0; u8 abort_running_scan; struct wid wid; struct host_if_drv *hif_drv = vif->hif_drv; - struct user_scan_req *scan_req; + struct wilc_user_scan_req *scan_req; if (evt == SCAN_EVENT_ABORTED) { abort_running_scan = 1; @@ -673,7 +205,7 @@ static int handle_scan_done(struct wilc_vif *vif, enum scan_event evt) wid.val = (s8 *)&abort_running_scan; wid.size = sizeof(char); - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, wilc_get_vif_idx(vif)); if (result) { @@ -689,30 +221,27 @@ static int handle_scan_done(struct wilc_vif *vif, enum scan_event evt) scan_req = &hif_drv->usr_scan_req; if (scan_req->scan_result) { - scan_req->scan_result(evt, NULL, scan_req->arg, NULL); + scan_req->scan_result(evt, NULL, scan_req->arg); scan_req->scan_result = NULL; } return result; } -static void handle_scan(struct work_struct *work) +int wilc_scan(struct wilc_vif *vif, u8 scan_source, u8 scan_type, + u8 *ch_freq_list, u8 ch_list_len, const u8 *ies, size_t ies_len, + void (*scan_result_fn)(enum scan_event, + struct wilc_rcvd_net_info *, void *), + void *user_arg, struct wilc_probe_ssid *search) { - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct scan_attr *scan_info = &msg->body.scan_info; int result = 0; struct wid wid_list[5]; u32 index = 0; u32 i; u8 *buffer; u8 valuesize = 0; - u8 *hdn_ntwk_wid_val = NULL; + u8 *search_ssid_vals = NULL; struct host_if_drv *hif_drv = vif->hif_drv; - struct hidden_network *hidden_net = &scan_info->hidden_network; - - hif_drv->usr_scan_req.scan_result = scan_info->result; - hif_drv->usr_scan_req.arg = scan_info->arg; if (hif_drv->hif_state >= HOST_IF_SCANNING && hif_drv->hif_state < HOST_IF_CONNECTED) { @@ -729,345 +258,135 @@ static void handle_scan(struct work_struct *work) hif_drv->usr_scan_req.ch_cnt = 0; - wid_list[index].id = WID_SSID_PROBE_REQ; - wid_list[index].type = WID_STR; - - for (i = 0; i < hidden_net->n_ssids; i++) - valuesize += ((hidden_net->net_info[i].ssid_len) + 1); - hdn_ntwk_wid_val = kmalloc(valuesize + 1, GFP_KERNEL); - wid_list[index].val = hdn_ntwk_wid_val; - if (wid_list[index].val) { - buffer = wid_list[index].val; - - *buffer++ = hidden_net->n_ssids; - - for (i = 0; i < hidden_net->n_ssids; i++) { - *buffer++ = hidden_net->net_info[i].ssid_len; - memcpy(buffer, hidden_net->net_info[i].ssid, - hidden_net->net_info[i].ssid_len); - buffer += hidden_net->net_info[i].ssid_len; + if (search) { + for (i = 0; i < search->n_ssids; i++) + valuesize += ((search->ssid_info[i].ssid_len) + 1); + search_ssid_vals = kmalloc(valuesize + 1, GFP_KERNEL); + if (search_ssid_vals) { + wid_list[index].id = WID_SSID_PROBE_REQ; + wid_list[index].type = WID_STR; + wid_list[index].val = search_ssid_vals; + buffer = wid_list[index].val; + + *buffer++ = search->n_ssids; + + for (i = 0; i < search->n_ssids; i++) { + *buffer++ = search->ssid_info[i].ssid_len; + memcpy(buffer, search->ssid_info[i].ssid, + search->ssid_info[i].ssid_len); + buffer += search->ssid_info[i].ssid_len; + } + wid_list[index].size = (s32)(valuesize + 1); + index++; } - - wid_list[index].size = (s32)(valuesize + 1); - index++; } wid_list[index].id = WID_INFO_ELEMENT_PROBE; wid_list[index].type = WID_BIN_DATA; - wid_list[index].val = scan_info->ies; - wid_list[index].size = scan_info->ies_len; + wid_list[index].val = (s8 *)ies; + wid_list[index].size = ies_len; index++; wid_list[index].id = WID_SCAN_TYPE; wid_list[index].type = WID_CHAR; wid_list[index].size = sizeof(char); - wid_list[index].val = (s8 *)&scan_info->type; + wid_list[index].val = (s8 *)&scan_type; index++; wid_list[index].id = WID_SCAN_CHANNEL_LIST; wid_list[index].type = WID_BIN_DATA; - if (scan_info->ch_freq_list && - scan_info->ch_list_len > 0) { - int i; - - for (i = 0; i < scan_info->ch_list_len; i++) { - if (scan_info->ch_freq_list[i] > 0) - scan_info->ch_freq_list[i] -= 1; + if (ch_freq_list && ch_list_len > 0) { + for (i = 0; i < ch_list_len; i++) { + if (ch_freq_list[i] > 0) + ch_freq_list[i] -= 1; } } - wid_list[index].val = scan_info->ch_freq_list; - wid_list[index].size = scan_info->ch_list_len; + wid_list[index].val = ch_freq_list; + wid_list[index].size = ch_list_len; index++; wid_list[index].id = WID_START_SCAN_REQ; wid_list[index].type = WID_CHAR; wid_list[index].size = sizeof(char); - wid_list[index].val = (s8 *)&scan_info->src; + wid_list[index].val = (s8 *)&scan_source; index++; - result = wilc_send_config_pkt(vif, SET_CFG, wid_list, + result = wilc_send_config_pkt(vif, WILC_SET_CFG, wid_list, index, wilc_get_vif_idx(vif)); - - if (result) - netdev_err(vif->ndev, "Failed to send scan parameters\n"); - -error: if (result) { - del_timer(&hif_drv->scan_timer); - handle_scan_done(vif, SCAN_EVENT_ABORTED); + netdev_err(vif->ndev, "Failed to send scan parameters\n"); + goto error; } - kfree(scan_info->ch_freq_list); - scan_info->ch_freq_list = NULL; - - kfree(scan_info->ies); - scan_info->ies = NULL; - kfree(scan_info->hidden_network.net_info); - scan_info->hidden_network.net_info = NULL; + hif_drv->usr_scan_req.scan_result = scan_result_fn; + hif_drv->usr_scan_req.arg = user_arg; + hif_drv->scan_timer_vif = vif; + mod_timer(&hif_drv->scan_timer, + jiffies + msecs_to_jiffies(WILC_HIF_SCAN_TIMEOUT_MS)); - kfree(hdn_ntwk_wid_val); +error: + if (search) { + kfree(search->ssid_info); + kfree(search_ssid_vals); + } - kfree(msg); + return result; } -static void handle_connect(struct work_struct *work) +static int wilc_send_connect_wid(struct wilc_vif *vif) { - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct connect_attr *conn_attr = &msg->body.con_info; int result = 0; - struct wid wid_list[8]; - u32 wid_cnt = 0, dummyval = 0; - u8 *cur_byte = NULL; - struct join_bss_param *bss_param; + struct wid wid_list[4]; + u32 wid_cnt = 0; struct host_if_drv *hif_drv = vif->hif_drv; - - if (msg->vif->hif_drv->usr_scan_req.scan_result) { - result = wilc_enqueue_work(msg); - if (result) - goto error; - - usleep_range(2 * 1000, 2 * 1000); - return; - } - - bss_param = conn_attr->params; - if (!bss_param) { - netdev_err(vif->ndev, "Required BSSID not found\n"); - result = -ENOENT; - goto error; - } - - if (conn_attr->bssid) { - hif_drv->usr_conn_req.bssid = kmemdup(conn_attr->bssid, 6, - GFP_KERNEL); - if (!hif_drv->usr_conn_req.bssid) { - result = -ENOMEM; - goto error; - } - } - - hif_drv->usr_conn_req.ssid_len = conn_attr->ssid_len; - if (conn_attr->ssid) { - hif_drv->usr_conn_req.ssid = kmalloc(conn_attr->ssid_len + 1, - GFP_KERNEL); - if (!hif_drv->usr_conn_req.ssid) { - result = -ENOMEM; - goto error; - } - memcpy(hif_drv->usr_conn_req.ssid, - conn_attr->ssid, - conn_attr->ssid_len); - hif_drv->usr_conn_req.ssid[conn_attr->ssid_len] = '\0'; - } - - hif_drv->usr_conn_req.ies_len = conn_attr->ies_len; - if (conn_attr->ies) { - hif_drv->usr_conn_req.ies = kmemdup(conn_attr->ies, - conn_attr->ies_len, - GFP_KERNEL); - if (!hif_drv->usr_conn_req.ies) { - result = -ENOMEM; - goto error; - } - } - - hif_drv->usr_conn_req.security = conn_attr->security; - hif_drv->usr_conn_req.auth_type = conn_attr->auth_type; - hif_drv->usr_conn_req.conn_result = conn_attr->result; - hif_drv->usr_conn_req.arg = conn_attr->arg; - - wid_list[wid_cnt].id = WID_SUCCESS_FRAME_COUNT; - wid_list[wid_cnt].type = WID_INT; - wid_list[wid_cnt].size = sizeof(u32); - wid_list[wid_cnt].val = (s8 *)(&(dummyval)); - wid_cnt++; - - wid_list[wid_cnt].id = WID_RECEIVED_FRAGMENT_COUNT; - wid_list[wid_cnt].type = WID_INT; - wid_list[wid_cnt].size = sizeof(u32); - wid_list[wid_cnt].val = (s8 *)(&(dummyval)); - wid_cnt++; - - wid_list[wid_cnt].id = WID_FAILED_COUNT; - wid_list[wid_cnt].type = WID_INT; - wid_list[wid_cnt].size = sizeof(u32); - wid_list[wid_cnt].val = (s8 *)(&(dummyval)); - wid_cnt++; + struct wilc_conn_info *conn_attr = &hif_drv->conn_info; + struct wilc_join_bss_param *bss_param = conn_attr->param; wid_list[wid_cnt].id = WID_INFO_ELEMENT_ASSOCIATE; wid_list[wid_cnt].type = WID_BIN_DATA; - wid_list[wid_cnt].val = hif_drv->usr_conn_req.ies; - wid_list[wid_cnt].size = hif_drv->usr_conn_req.ies_len; + wid_list[wid_cnt].val = conn_attr->req_ies; + wid_list[wid_cnt].size = conn_attr->req_ies_len; wid_cnt++; wid_list[wid_cnt].id = WID_11I_MODE; wid_list[wid_cnt].type = WID_CHAR; wid_list[wid_cnt].size = sizeof(char); - wid_list[wid_cnt].val = (s8 *)&hif_drv->usr_conn_req.security; + wid_list[wid_cnt].val = (s8 *)&conn_attr->security; wid_cnt++; wid_list[wid_cnt].id = WID_AUTH_TYPE; wid_list[wid_cnt].type = WID_CHAR; wid_list[wid_cnt].size = sizeof(char); - wid_list[wid_cnt].val = (s8 *)&hif_drv->usr_conn_req.auth_type; + wid_list[wid_cnt].val = (s8 *)&conn_attr->auth_type; wid_cnt++; wid_list[wid_cnt].id = WID_JOIN_REQ_EXTENDED; wid_list[wid_cnt].type = WID_STR; - wid_list[wid_cnt].size = 112; - wid_list[wid_cnt].val = kmalloc(wid_list[wid_cnt].size, GFP_KERNEL); - - if (!wid_list[wid_cnt].val) { - result = -EFAULT; - goto error; - } - - cur_byte = wid_list[wid_cnt].val; - - if (conn_attr->ssid) { - memcpy(cur_byte, conn_attr->ssid, conn_attr->ssid_len); - cur_byte[conn_attr->ssid_len] = '\0'; - } - cur_byte += MAX_SSID_LEN; - *(cur_byte++) = INFRASTRUCTURE; - - if (conn_attr->ch >= 1 && conn_attr->ch <= 14) { - *(cur_byte++) = conn_attr->ch; - } else { - netdev_err(vif->ndev, "Channel out of range\n"); - *(cur_byte++) = 0xFF; - } - *(cur_byte++) = (bss_param->cap_info) & 0xFF; - *(cur_byte++) = ((bss_param->cap_info) >> 8) & 0xFF; - - if (conn_attr->bssid) - memcpy(cur_byte, conn_attr->bssid, 6); - cur_byte += 6; - - if (conn_attr->bssid) - memcpy(cur_byte, conn_attr->bssid, 6); - cur_byte += 6; - - *(cur_byte++) = (bss_param->beacon_period) & 0xFF; - *(cur_byte++) = ((bss_param->beacon_period) >> 8) & 0xFF; - *(cur_byte++) = bss_param->dtim_period; - - memcpy(cur_byte, bss_param->supp_rates, MAX_RATES_SUPPORTED + 1); - cur_byte += (MAX_RATES_SUPPORTED + 1); - - *(cur_byte++) = bss_param->wmm_cap; - *(cur_byte++) = bss_param->uapsd_cap; - - *(cur_byte++) = bss_param->ht_capable; - hif_drv->usr_conn_req.ht_capable = bss_param->ht_capable; - - *(cur_byte++) = bss_param->rsn_found; - *(cur_byte++) = bss_param->rsn_grp_policy; - *(cur_byte++) = bss_param->mode_802_11i; - - memcpy(cur_byte, bss_param->rsn_pcip_policy, - sizeof(bss_param->rsn_pcip_policy)); - cur_byte += sizeof(bss_param->rsn_pcip_policy); - - memcpy(cur_byte, bss_param->rsn_auth_policy, - sizeof(bss_param->rsn_auth_policy)); - cur_byte += sizeof(bss_param->rsn_auth_policy); - - memcpy(cur_byte, bss_param->rsn_cap, sizeof(bss_param->rsn_cap)); - cur_byte += sizeof(bss_param->rsn_cap); - - *(cur_byte++) = REAL_JOIN_REQ; - *(cur_byte++) = bss_param->noa_enabled; - - if (bss_param->noa_enabled) { - *(cur_byte++) = (bss_param->tsf) & 0xFF; - *(cur_byte++) = ((bss_param->tsf) >> 8) & 0xFF; - *(cur_byte++) = ((bss_param->tsf) >> 16) & 0xFF; - *(cur_byte++) = ((bss_param->tsf) >> 24) & 0xFF; - - *(cur_byte++) = bss_param->opp_enabled; - *(cur_byte++) = bss_param->idx; - - if (bss_param->opp_enabled) - *(cur_byte++) = bss_param->ct_window; - - *(cur_byte++) = bss_param->cnt; - - memcpy(cur_byte, bss_param->duration, - sizeof(bss_param->duration)); - cur_byte += sizeof(bss_param->duration); - - memcpy(cur_byte, bss_param->interval, - sizeof(bss_param->interval)); - cur_byte += sizeof(bss_param->interval); - - memcpy(cur_byte, bss_param->start_time, - sizeof(bss_param->start_time)); - cur_byte += sizeof(bss_param->start_time); - } - - cur_byte = wid_list[wid_cnt].val; + wid_list[wid_cnt].size = sizeof(*bss_param); + wid_list[wid_cnt].val = (u8 *)bss_param; wid_cnt++; - result = wilc_send_config_pkt(vif, SET_CFG, wid_list, + result = wilc_send_config_pkt(vif, WILC_SET_CFG, wid_list, wid_cnt, wilc_get_vif_idx(vif)); if (result) { netdev_err(vif->ndev, "failed to send config packet\n"); - result = -EFAULT; goto error; } else { hif_drv->hif_state = HOST_IF_WAITING_CONN_RESP; } -error: - if (result) { - struct connect_info conn_info; - - del_timer(&hif_drv->connect_timer); - - memset(&conn_info, 0, sizeof(struct connect_info)); - - if (conn_attr->result) { - if (conn_attr->bssid) - memcpy(conn_info.bssid, conn_attr->bssid, 6); - - if (conn_attr->ies) { - conn_info.req_ies_len = conn_attr->ies_len; - conn_info.req_ies = kmalloc(conn_attr->ies_len, - GFP_KERNEL); - memcpy(conn_info.req_ies, - conn_attr->ies, - conn_attr->ies_len); - } - - conn_attr->result(CONN_DISCONN_EVENT_CONN_RESP, - &conn_info, MAC_STATUS_DISCONNECTED, - NULL, conn_attr->arg); - hif_drv->hif_state = HOST_IF_IDLE; - kfree(conn_info.req_ies); - conn_info.req_ies = NULL; - - } else { - netdev_err(vif->ndev, "Connect callback is NULL\n"); - } - } - - kfree(conn_attr->bssid); - conn_attr->bssid = NULL; + return 0; - kfree(conn_attr->ssid); - conn_attr->ssid = NULL; +error: - kfree(conn_attr->ies); - conn_attr->ies = NULL; + kfree(conn_attr->req_ies); + conn_attr->req_ies = NULL; - kfree(cur_byte); - kfree(msg); + return result; } static void handle_connect_timeout(struct work_struct *work) @@ -1075,7 +394,6 @@ static void handle_connect_timeout(struct work_struct *work) struct host_if_msg *msg = container_of(work, struct host_if_msg, work); struct wilc_vif *vif = msg->vif; int result; - struct connect_info info; struct wid wid; u16 dummy_reason_code = 0; struct host_if_drv *hif_drv = vif->hif_drv; @@ -1087,31 +405,11 @@ static void handle_connect_timeout(struct work_struct *work) hif_drv->hif_state = HOST_IF_IDLE; - memset(&info, 0, sizeof(struct connect_info)); - - if (hif_drv->usr_conn_req.conn_result) { - if (hif_drv->usr_conn_req.bssid) { - memcpy(info.bssid, - hif_drv->usr_conn_req.bssid, 6); - } - - if (hif_drv->usr_conn_req.ies) { - info.req_ies_len = hif_drv->usr_conn_req.ies_len; - info.req_ies = kmemdup(hif_drv->usr_conn_req.ies, - hif_drv->usr_conn_req.ies_len, - GFP_KERNEL); - if (!info.req_ies) - goto out; - } - - hif_drv->usr_conn_req.conn_result(CONN_DISCONN_EVENT_CONN_RESP, - &info, - MAC_STATUS_DISCONNECTED, - NULL, - hif_drv->usr_conn_req.arg); + if (hif_drv->conn_info.conn_result) { + hif_drv->conn_info.conn_result(CONN_DISCONN_EVENT_CONN_RESP, + WILC_MAC_STATUS_DISCONNECTED, + hif_drv->conn_info.arg); - kfree(info.req_ies); - info.req_ies = NULL; } else { netdev_err(vif->ndev, "%s: conn_result is NULL\n", __func__); } @@ -1121,186 +419,143 @@ static void handle_connect_timeout(struct work_struct *work) wid.val = (s8 *)&dummy_reason_code; wid.size = sizeof(char); - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, wilc_get_vif_idx(vif)); if (result) netdev_err(vif->ndev, "Failed to send disconnect\n"); - hif_drv->usr_conn_req.ssid_len = 0; - kfree(hif_drv->usr_conn_req.ssid); - hif_drv->usr_conn_req.ssid = NULL; - kfree(hif_drv->usr_conn_req.bssid); - hif_drv->usr_conn_req.bssid = NULL; - hif_drv->usr_conn_req.ies_len = 0; - kfree(hif_drv->usr_conn_req.ies); - hif_drv->usr_conn_req.ies = NULL; + hif_drv->conn_info.req_ies_len = 0; + kfree(hif_drv->conn_info.req_ies); + hif_drv->conn_info.req_ies = NULL; out: kfree(msg); } -static void host_int_fill_join_bss_param(struct join_bss_param *param, u8 *ies, - u16 *out_index, u8 *pcipher_tc, - u8 *auth_total_cnt, u32 tsf_lo, - u8 *rates_no) +void *wilc_parse_join_bss_param(struct cfg80211_bss *bss, + struct cfg80211_crypto_settings *crypto) { - u8 ext_rates_no; - u16 offset; - u8 pcipher_cnt; - u8 auth_cnt; - u8 i, j; - u16 index = *out_index; - - if (ies[index] == WLAN_EID_SUPP_RATES) { - *rates_no = ies[index + 1]; - param->supp_rates[0] = *rates_no; - index += 2; - - for (i = 0; i < *rates_no; i++) - param->supp_rates[i + 1] = ies[index + i]; - - index += *rates_no; - } else if (ies[index] == WLAN_EID_EXT_SUPP_RATES) { - ext_rates_no = ies[index + 1]; - if (ext_rates_no > (MAX_RATES_SUPPORTED - *rates_no)) - param->supp_rates[0] = MAX_RATES_SUPPORTED; - else - param->supp_rates[0] += ext_rates_no; - index += 2; - for (i = 0; i < (param->supp_rates[0] - *rates_no); i++) - param->supp_rates[*rates_no + i + 1] = ies[index + i]; - - index += ext_rates_no; - } else if (ies[index] == WLAN_EID_HT_CAPABILITY) { - param->ht_capable = true; - index += ies[index + 1] + 2; - } else if ((ies[index] == WLAN_EID_VENDOR_SPECIFIC) && - (ies[index + 2] == 0x00) && (ies[index + 3] == 0x50) && - (ies[index + 4] == 0xF2) && (ies[index + 5] == 0x02) && - ((ies[index + 6] == 0x00) || (ies[index + 6] == 0x01)) && - (ies[index + 7] == 0x01)) { - param->wmm_cap = true; - - if (ies[index + 8] & BIT(7)) - param->uapsd_cap = true; - index += ies[index + 1] + 2; - } else if ((ies[index] == WLAN_EID_VENDOR_SPECIFIC) && - (ies[index + 2] == 0x50) && (ies[index + 3] == 0x6f) && - (ies[index + 4] == 0x9a) && - (ies[index + 5] == 0x09) && (ies[index + 6] == 0x0c)) { - u16 p2p_cnt; - - param->tsf = tsf_lo; - param->noa_enabled = 1; - param->idx = ies[index + 9]; + struct wilc_join_bss_param *param; + struct ieee80211_p2p_noa_attr noa_attr; + u8 rates_len = 0; + const u8 *tim_elm, *ssid_elm, *rates_ie, *supp_rates_ie; + const u8 *ht_ie, *wpa_ie, *wmm_ie, *rsn_ie; + int ret; + const struct cfg80211_bss_ies *ies = rcu_dereference(bss->ies); - if (ies[index + 10] & BIT(7)) { - param->opp_enabled = 1; - param->ct_window = ies[index + 10]; - } else { - param->opp_enabled = 0; - } + param = kzalloc(sizeof(*param), GFP_KERNEL); + if (!param) + return NULL; - param->cnt = ies[index + 11]; - p2p_cnt = index + 12; + param->beacon_period = cpu_to_le16(bss->beacon_interval); + param->cap_info = cpu_to_le16(bss->capability); + param->bss_type = WILC_FW_BSS_TYPE_INFRA; + param->ch = ieee80211_frequency_to_channel(bss->channel->center_freq); + ether_addr_copy(param->bssid, bss->bssid); - memcpy(param->duration, ies + p2p_cnt, 4); - p2p_cnt += 4; + ssid_elm = cfg80211_find_ie(WLAN_EID_SSID, ies->data, ies->len); + if (ssid_elm) { + if (ssid_elm[1] <= IEEE80211_MAX_SSID_LEN) + memcpy(param->ssid, ssid_elm + 2, ssid_elm[1]); + } - memcpy(param->interval, ies + p2p_cnt, 4); - p2p_cnt += 4; + tim_elm = cfg80211_find_ie(WLAN_EID_TIM, ies->data, ies->len); + if (tim_elm && tim_elm[1] >= 2) + param->dtim_period = tim_elm[3]; - memcpy(param->start_time, ies + p2p_cnt, 4); + memset(param->p_suites, 0xFF, 3); + memset(param->akm_suites, 0xFF, 3); - index += ies[index + 1] + 2; - } else if ((ies[index] == WLAN_EID_RSN) || - ((ies[index] == WLAN_EID_VENDOR_SPECIFIC) && - (ies[index + 2] == 0x00) && - (ies[index + 3] == 0x50) && (ies[index + 4] == 0xF2) && - (ies[index + 5] == 0x01))) { - u16 rsn_idx = index; + rates_ie = cfg80211_find_ie(WLAN_EID_SUPP_RATES, ies->data, ies->len); + if (rates_ie) { + rates_len = rates_ie[1]; + param->supp_rates[0] = rates_len; + memcpy(¶m->supp_rates[1], rates_ie + 2, rates_len); + } - if (ies[rsn_idx] == WLAN_EID_RSN) { - param->mode_802_11i = 2; - } else { - if (param->mode_802_11i == 0) - param->mode_802_11i = 1; - rsn_idx += 4; - } + supp_rates_ie = cfg80211_find_ie(WLAN_EID_EXT_SUPP_RATES, ies->data, + ies->len); + if (supp_rates_ie) { + if (supp_rates_ie[1] > (WILC_MAX_RATES_SUPPORTED - rates_len)) + param->supp_rates[0] = WILC_MAX_RATES_SUPPORTED; + else + param->supp_rates[0] += supp_rates_ie[1]; - rsn_idx += 7; - param->rsn_grp_policy = ies[rsn_idx]; - rsn_idx++; - offset = ies[rsn_idx] * 4; - pcipher_cnt = (ies[rsn_idx] > 3) ? 3 : ies[rsn_idx]; - rsn_idx += 2; + memcpy(¶m->supp_rates[rates_len + 1], supp_rates_ie + 2, + (param->supp_rates[0] - rates_len)); + } - i = *pcipher_tc; - j = 0; - for (; i < (pcipher_cnt + *pcipher_tc) && i < 3; i++, j++) { - u8 *policy = ¶m->rsn_pcip_policy[i]; + ht_ie = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY, ies->data, ies->len); + if (ht_ie) + param->ht_capable = true; - *policy = ies[rsn_idx + ((j + 1) * 4) - 1]; + ret = cfg80211_get_p2p_attr(ies->data, ies->len, + IEEE80211_P2P_ATTR_ABSENCE_NOTICE, + (u8 *)&noa_attr, sizeof(noa_attr)); + if (ret > 0) { + param->tsf_lo = cpu_to_le32(ies->tsf); + param->noa_enabled = 1; + param->idx = noa_attr.index; + if (noa_attr.oppps_ctwindow & IEEE80211_P2P_OPPPS_ENABLE_BIT) { + param->opp_enabled = 1; + param->opp_en.ct_window = noa_attr.oppps_ctwindow; + param->opp_en.cnt = noa_attr.desc[0].count; + param->opp_en.duration = noa_attr.desc[0].duration; + param->opp_en.interval = noa_attr.desc[0].interval; + param->opp_en.start_time = noa_attr.desc[0].start_time; + } else { + param->opp_enabled = 0; + param->opp_dis.cnt = noa_attr.desc[0].count; + param->opp_dis.duration = noa_attr.desc[0].duration; + param->opp_dis.interval = noa_attr.desc[0].interval; + param->opp_dis.start_time = noa_attr.desc[0].start_time; } - - *pcipher_tc += pcipher_cnt; - rsn_idx += offset; - - offset = ies[rsn_idx] * 4; - - auth_cnt = (ies[rsn_idx] > 3) ? 3 : ies[rsn_idx]; - rsn_idx += 2; - i = *auth_total_cnt; - j = 0; - for (; i < (*auth_total_cnt + auth_cnt); i++, j++) { - u8 *policy = ¶m->rsn_auth_policy[i]; - - *policy = ies[rsn_idx + ((j + 1) * 4) - 1]; + } + wmm_ie = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT, + WLAN_OUI_TYPE_MICROSOFT_WMM, + ies->data, ies->len); + if (wmm_ie) { + struct ieee80211_wmm_param_ie *ie; + + ie = (struct ieee80211_wmm_param_ie *)wmm_ie; + if ((ie->oui_subtype == 0 || ie->oui_subtype == 1) && + ie->version == 1) { + param->wmm_cap = true; + if (ie->qos_info & BIT(7)) + param->uapsd_cap = true; } + } - *auth_total_cnt += auth_cnt; - rsn_idx += offset; - - if (ies[index] == WLAN_EID_RSN) { - param->rsn_cap[0] = ies[rsn_idx]; - param->rsn_cap[1] = ies[rsn_idx + 1]; - rsn_idx += 2; - } + wpa_ie = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT, + WLAN_OUI_TYPE_MICROSOFT_WPA, + ies->data, ies->len); + if (wpa_ie) { + param->mode_802_11i = 1; param->rsn_found = true; - index += ies[index + 1] + 2; - } else { - index += ies[index + 1] + 2; } - *out_index = index; -} + rsn_ie = cfg80211_find_ie(WLAN_EID_RSN, ies->data, ies->len); + if (rsn_ie) { + int offset = 8; -static void *host_int_parse_join_bss_param(struct network_info *info) -{ - struct join_bss_param *param; - u16 index = 0; - u8 rates_no = 0; - u8 pcipher_total_cnt = 0; - u8 auth_total_cnt = 0; + param->mode_802_11i = 2; + param->rsn_found = true; + //extract RSN capabilities + offset += (rsn_ie[offset] * 4) + 2; + offset += (rsn_ie[offset] * 4) + 2; + memcpy(param->rsn_cap, &rsn_ie[offset], 2); + } - param = kzalloc(sizeof(*param), GFP_KERNEL); - if (!param) - return NULL; + if (param->rsn_found) { + int i; - param->dtim_period = info->dtim_period; - param->beacon_period = info->beacon_period; - param->cap_info = info->cap_info; - memcpy(param->bssid, info->bssid, 6); - memcpy((u8 *)param->ssid, info->ssid, info->ssid_len + 1); - param->ssid_len = info->ssid_len; - memset(param->rsn_pcip_policy, 0xFF, 3); - memset(param->rsn_auth_policy, 0xFF, 3); - - while (index < info->ies_len) - host_int_fill_join_bss_param(param, info->ies, &index, - &pcipher_total_cnt, - &auth_total_cnt, info->tsf_lo, - &rates_no); + param->rsn_grp_policy = crypto->cipher_group & 0xFF; + for (i = 0; i < crypto->n_ciphers_pairwise && i < 3; i++) + param->p_suites[i] = crypto->ciphers_pairwise[i] & 0xFF; + + for (i = 0; i < crypto->n_akm_suites && i < 3; i++) + param->akm_suites[i] = crypto->akm_suites[i] & 0xFF; + } return (void *)param; } @@ -1308,69 +563,35 @@ static void *host_int_parse_join_bss_param(struct network_info *info) static void handle_rcvd_ntwrk_info(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct rcvd_net_info *rcvd_info = &msg->body.net_info; - u32 i; - bool found; - struct network_info *info = NULL; - void *params; - struct host_if_drv *hif_drv = vif->hif_drv; - struct user_scan_req *scan_req = &hif_drv->usr_scan_req; - - found = true; + struct wilc_rcvd_net_info *rcvd_info = &msg->body.net_info; + struct wilc_user_scan_req *scan_req = &msg->vif->hif_drv->usr_scan_req; + const u8 *ch_elm; + u8 *ies; + int ies_len; + size_t offset; - if (!scan_req->scan_result) + if (ieee80211_is_probe_resp(rcvd_info->mgmt->frame_control)) + offset = offsetof(struct ieee80211_mgmt, u.probe_resp.variable); + else if (ieee80211_is_beacon(rcvd_info->mgmt->frame_control)) + offset = offsetof(struct ieee80211_mgmt, u.beacon.variable); + else goto done; - wilc_parse_network_info(rcvd_info->buffer, &info); - if (!info || !scan_req->scan_result) { - netdev_err(vif->ndev, "%s: info or scan result NULL\n", - __func__); + ies = rcvd_info->mgmt->u.beacon.variable; + ies_len = rcvd_info->frame_len - offset; + if (ies_len <= 0) goto done; - } - - for (i = 0; i < scan_req->ch_cnt; i++) { - if (memcmp(scan_req->net_info[i].bssid, info->bssid, 6) == 0) { - if (info->rssi <= scan_req->net_info[i].rssi) { - goto done; - } else { - scan_req->net_info[i].rssi = info->rssi; - found = false; - break; - } - } - } - - if (found) { - if (scan_req->ch_cnt < MAX_NUM_SCANNED_NETWORKS) { - scan_req->net_info[scan_req->ch_cnt].rssi = info->rssi; - - memcpy(scan_req->net_info[scan_req->ch_cnt].bssid, - info->bssid, 6); - scan_req->ch_cnt++; + ch_elm = cfg80211_find_ie(WLAN_EID_DS_PARAMS, ies, ies_len); + if (ch_elm && ch_elm[1] > 0) + rcvd_info->ch = ch_elm[2]; - info->new_network = true; - params = host_int_parse_join_bss_param(info); - - scan_req->scan_result(SCAN_EVENT_NETWORK_FOUND, info, - scan_req->arg, params); - } - } else { - info->new_network = false; - scan_req->scan_result(SCAN_EVENT_NETWORK_FOUND, info, - scan_req->arg, NULL); - } + if (scan_req->scan_result) + scan_req->scan_result(SCAN_EVENT_NETWORK_FOUND, rcvd_info, + scan_req->arg); done: - kfree(rcvd_info->buffer); - rcvd_info->buffer = NULL; - - if (info) { - kfree(info->ies); - kfree(info); - } - + kfree(rcvd_info->mgmt); kfree(msg); } @@ -1387,7 +608,7 @@ static void host_int_get_assoc_res_info(struct wilc_vif *vif, wid.val = assoc_resp_info; wid.size = max_assoc_resp_info_len; - result = wilc_send_config_pkt(vif, GET_CFG, &wid, 1, + result = wilc_send_config_pkt(vif, WILC_GET_CFG, &wid, 1, wilc_get_vif_idx(vif)); if (result) { *rcvd_assoc_resp_info_len = 0; @@ -1398,33 +619,41 @@ static void host_int_get_assoc_res_info(struct wilc_vif *vif, *rcvd_assoc_resp_info_len = wid.size; } -static inline void host_int_free_user_conn_req(struct host_if_drv *hif_drv) +static s32 wilc_parse_assoc_resp_info(u8 *buffer, u32 buffer_len, + struct wilc_conn_info *ret_conn_info) { - hif_drv->usr_conn_req.ssid_len = 0; - kfree(hif_drv->usr_conn_req.ssid); - hif_drv->usr_conn_req.ssid = NULL; - kfree(hif_drv->usr_conn_req.bssid); - hif_drv->usr_conn_req.bssid = NULL; - hif_drv->usr_conn_req.ies_len = 0; - kfree(hif_drv->usr_conn_req.ies); - hif_drv->usr_conn_req.ies = NULL; + u8 *ies; + u16 ies_len; + struct assoc_resp *res = (struct assoc_resp *)buffer; + + ret_conn_info->status = le16_to_cpu(res->status_code); + if (ret_conn_info->status == WLAN_STATUS_SUCCESS) { + ies = &buffer[sizeof(*res)]; + ies_len = buffer_len - sizeof(*res); + + ret_conn_info->resp_ies = kmemdup(ies, ies_len, GFP_KERNEL); + if (!ret_conn_info->resp_ies) + return -ENOMEM; + + ret_conn_info->resp_ies_len = ies_len; + } + + return 0; } static inline void host_int_parse_assoc_resp_info(struct wilc_vif *vif, u8 mac_status) { - struct connect_info conn_info; struct host_if_drv *hif_drv = vif->hif_drv; + struct wilc_conn_info *conn_info = &hif_drv->conn_info; - memset(&conn_info, 0, sizeof(struct connect_info)); - - if (mac_status == MAC_STATUS_CONNECTED) { + if (mac_status == WILC_MAC_STATUS_CONNECTED) { u32 assoc_resp_info_len; - memset(hif_drv->assoc_resp, 0, MAX_ASSOC_RESP_FRAME_SIZE); + memset(hif_drv->assoc_resp, 0, WILC_MAX_ASSOC_RESP_FRAME_SIZE); host_int_get_assoc_res_info(vif, hif_drv->assoc_resp, - MAX_ASSOC_RESP_FRAME_SIZE, + WILC_MAX_ASSOC_RESP_FRAME_SIZE, &assoc_resp_info_len); if (assoc_resp_info_len != 0) { @@ -1432,7 +661,7 @@ static inline void host_int_parse_assoc_resp_info(struct wilc_vif *vif, err = wilc_parse_assoc_resp_info(hif_drv->assoc_resp, assoc_resp_info_len, - &conn_info); + conn_info); if (err) netdev_err(vif->ndev, "wilc_parse_assoc_resp_info() returned error %d\n", @@ -1440,31 +669,13 @@ static inline void host_int_parse_assoc_resp_info(struct wilc_vif *vif, } } - if (hif_drv->usr_conn_req.bssid) { - memcpy(conn_info.bssid, hif_drv->usr_conn_req.bssid, 6); - - if (mac_status == MAC_STATUS_CONNECTED && - conn_info.status == WLAN_STATUS_SUCCESS) { - memcpy(hif_drv->assoc_bssid, - hif_drv->usr_conn_req.bssid, ETH_ALEN); - } - } - - if (hif_drv->usr_conn_req.ies) { - conn_info.req_ies = kmemdup(hif_drv->usr_conn_req.ies, - hif_drv->usr_conn_req.ies_len, - GFP_KERNEL); - if (conn_info.req_ies) - conn_info.req_ies_len = hif_drv->usr_conn_req.ies_len; - } - del_timer(&hif_drv->connect_timer); - hif_drv->usr_conn_req.conn_result(CONN_DISCONN_EVENT_CONN_RESP, - &conn_info, mac_status, NULL, - hif_drv->usr_conn_req.arg); + conn_info->conn_result(CONN_DISCONN_EVENT_CONN_RESP, mac_status, + hif_drv->conn_info.arg); - if (mac_status == MAC_STATUS_CONNECTED && - conn_info.status == WLAN_STATUS_SUCCESS) { + if (mac_status == WILC_MAC_STATUS_CONNECTED && + conn_info->status == WLAN_STATUS_SUCCESS) { + ether_addr_copy(hif_drv->assoc_bssid, conn_info->bssid); wilc_set_power_mgmt(vif, 0, 0); hif_drv->hif_state = HOST_IF_CONNECTED; @@ -1476,44 +687,39 @@ static inline void host_int_parse_assoc_resp_info(struct wilc_vif *vif, hif_drv->hif_state = HOST_IF_IDLE; } - kfree(conn_info.resp_ies); - conn_info.resp_ies = NULL; + kfree(conn_info->resp_ies); + conn_info->resp_ies = NULL; + conn_info->resp_ies_len = 0; - kfree(conn_info.req_ies); - conn_info.req_ies = NULL; - host_int_free_user_conn_req(hif_drv); + kfree(conn_info->req_ies); + conn_info->req_ies = NULL; + conn_info->req_ies_len = 0; } static inline void host_int_handle_disconnect(struct wilc_vif *vif) { - struct disconnect_info disconn_info; struct host_if_drv *hif_drv = vif->hif_drv; - wilc_connect_result conn_result = hif_drv->usr_conn_req.conn_result; - - memset(&disconn_info, 0, sizeof(struct disconnect_info)); if (hif_drv->usr_scan_req.scan_result) { del_timer(&hif_drv->scan_timer); handle_scan_done(vif, SCAN_EVENT_ABORTED); } - disconn_info.reason = 0; - disconn_info.ie = NULL; - disconn_info.ie_len = 0; - - if (conn_result) { + if (hif_drv->conn_info.conn_result) { vif->obtaining_ip = false; wilc_set_power_mgmt(vif, 0, 0); - conn_result(CONN_DISCONN_EVENT_DISCONN_NOTIF, NULL, 0, - &disconn_info, hif_drv->usr_conn_req.arg); + hif_drv->conn_info.conn_result(CONN_DISCONN_EVENT_DISCONN_NOTIF, + 0, hif_drv->conn_info.arg); } else { netdev_err(vif->ndev, "%s: conn_result is NULL\n", __func__); } eth_zero_addr(hif_drv->assoc_bssid); - host_int_free_user_conn_req(hif_drv); + hif_drv->conn_info.req_ies_len = 0; + kfree(hif_drv->conn_info.req_ies); + hif_drv->conn_info.req_ies = NULL; hif_drv->hif_state = HOST_IF_IDLE; } @@ -1521,326 +727,40 @@ static void handle_rcvd_gnrl_async_info(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); struct wilc_vif *vif = msg->vif; - struct rcvd_async_info *rcvd_info = &msg->body.async_info; - u8 msg_type; - u8 mac_status; + struct wilc_rcvd_mac_info *mac_info = &msg->body.mac_info; struct host_if_drv *hif_drv = vif->hif_drv; - if (!rcvd_info->buffer) { - netdev_err(vif->ndev, "%s: buffer is NULL\n", __func__); - goto free_msg; - } - if (!hif_drv) { netdev_err(vif->ndev, "%s: hif driver is NULL\n", __func__); - goto free_rcvd_info; + goto free_msg; } - if (hif_drv->hif_state == HOST_IF_WAITING_CONN_RESP || - hif_drv->hif_state == HOST_IF_CONNECTED || - hif_drv->usr_scan_req.scan_result) { - if (!hif_drv->usr_conn_req.conn_result) { - netdev_err(vif->ndev, "%s: conn_result is NULL\n", - __func__); - goto free_rcvd_info; - } - - msg_type = rcvd_info->buffer[0]; - - if ('I' != msg_type) { - netdev_err(vif->ndev, "Received Message incorrect.\n"); - goto free_rcvd_info; - } + if (!hif_drv->conn_info.conn_result) { + netdev_err(vif->ndev, "%s: conn_result is NULL\n", __func__); + goto free_msg; + } - mac_status = rcvd_info->buffer[7]; - if (hif_drv->hif_state == HOST_IF_WAITING_CONN_RESP) { - host_int_parse_assoc_resp_info(vif, mac_status); - } else if ((mac_status == MAC_STATUS_DISCONNECTED) && - (hif_drv->hif_state == HOST_IF_CONNECTED)) { + if (hif_drv->hif_state == HOST_IF_WAITING_CONN_RESP) { + host_int_parse_assoc_resp_info(vif, mac_info->status); + } else if (mac_info->status == WILC_MAC_STATUS_DISCONNECTED) { + if (hif_drv->hif_state == HOST_IF_CONNECTED) { host_int_handle_disconnect(vif); - } else if ((mac_status == MAC_STATUS_DISCONNECTED) && - (hif_drv->usr_scan_req.scan_result)) { + } else if (hif_drv->usr_scan_req.scan_result) { del_timer(&hif_drv->scan_timer); - if (hif_drv->usr_scan_req.scan_result) - handle_scan_done(vif, SCAN_EVENT_ABORTED); + handle_scan_done(vif, SCAN_EVENT_ABORTED); } } -free_rcvd_info: - kfree(rcvd_info->buffer); - rcvd_info->buffer = NULL; - free_msg: kfree(msg); } -static int wilc_pmksa_key_copy(struct wilc_vif *vif, struct key_attr *hif_key) +int wilc_disconnect(struct wilc_vif *vif) { - int i; - int ret; - struct wid wid; - u8 *key_buf; - - key_buf = kmalloc((hif_key->attr.pmkid.numpmkid * PMKSA_KEY_LEN) + 1, - GFP_KERNEL); - if (!key_buf) - return -ENOMEM; - - key_buf[0] = hif_key->attr.pmkid.numpmkid; - - for (i = 0; i < hif_key->attr.pmkid.numpmkid; i++) { - memcpy(key_buf + ((PMKSA_KEY_LEN * i) + 1), - hif_key->attr.pmkid.pmkidlist[i].bssid, ETH_ALEN); - memcpy(key_buf + ((PMKSA_KEY_LEN * i) + ETH_ALEN + 1), - hif_key->attr.pmkid.pmkidlist[i].pmkid, PMKID_LEN); - } - - wid.id = WID_PMKID_INFO; - wid.type = WID_STR; - wid.val = (s8 *)key_buf; - wid.size = (hif_key->attr.pmkid.numpmkid * PMKSA_KEY_LEN) + 1; - - ret = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - - kfree(key_buf); - - return ret; -} - -static void handle_key(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct key_attr *hif_key = &msg->body.key_info; - int result = 0; - struct wid wid; - struct wid wid_list[5]; - u8 *key_buf; - struct host_if_drv *hif_drv = vif->hif_drv; - - switch (hif_key->type) { - case WEP: - - if (hif_key->action & ADDKEY_AP) { - wid_list[0].id = WID_11I_MODE; - wid_list[0].type = WID_CHAR; - wid_list[0].size = sizeof(char); - wid_list[0].val = (s8 *)&hif_key->attr.wep.mode; - - wid_list[1].id = WID_AUTH_TYPE; - wid_list[1].type = WID_CHAR; - wid_list[1].size = sizeof(char); - wid_list[1].val = (s8 *)&hif_key->attr.wep.auth_type; - - key_buf = kmalloc(hif_key->attr.wep.key_len + 2, - GFP_KERNEL); - if (!key_buf) { - result = -ENOMEM; - goto out_wep; - } - - key_buf[0] = hif_key->attr.wep.index; - key_buf[1] = hif_key->attr.wep.key_len; - - memcpy(&key_buf[2], hif_key->attr.wep.key, - hif_key->attr.wep.key_len); - - wid_list[2].id = WID_WEP_KEY_VALUE; - wid_list[2].type = WID_STR; - wid_list[2].size = hif_key->attr.wep.key_len + 2; - wid_list[2].val = (s8 *)key_buf; - - result = wilc_send_config_pkt(vif, SET_CFG, - wid_list, 3, - wilc_get_vif_idx(vif)); - kfree(key_buf); - } else if (hif_key->action & ADDKEY) { - key_buf = kmalloc(hif_key->attr.wep.key_len + 2, - GFP_KERNEL); - if (!key_buf) { - result = -ENOMEM; - goto out_wep; - } - key_buf[0] = hif_key->attr.wep.index; - memcpy(key_buf + 1, &hif_key->attr.wep.key_len, 1); - memcpy(key_buf + 2, hif_key->attr.wep.key, - hif_key->attr.wep.key_len); - - wid.id = WID_ADD_WEP_KEY; - wid.type = WID_STR; - wid.val = (s8 *)key_buf; - wid.size = hif_key->attr.wep.key_len + 2; - - result = wilc_send_config_pkt(vif, SET_CFG, - &wid, 1, - wilc_get_vif_idx(vif)); - kfree(key_buf); - } else if (hif_key->action & REMOVEKEY) { - wid.id = WID_REMOVE_WEP_KEY; - wid.type = WID_STR; - - wid.val = (s8 *)&hif_key->attr.wep.index; - wid.size = 1; - - result = wilc_send_config_pkt(vif, SET_CFG, - &wid, 1, - wilc_get_vif_idx(vif)); - } else if (hif_key->action & DEFAULTKEY) { - wid.id = WID_KEY_ID; - wid.type = WID_CHAR; - wid.val = (s8 *)&hif_key->attr.wep.index; - wid.size = sizeof(char); - - result = wilc_send_config_pkt(vif, SET_CFG, - &wid, 1, - wilc_get_vif_idx(vif)); - } -out_wep: - complete(&msg->work_comp); - break; - - case WPA_RX_GTK: - if (hif_key->action & ADDKEY_AP) { - key_buf = kzalloc(RX_MIC_KEY_MSG_LEN, GFP_KERNEL); - if (!key_buf) { - result = -ENOMEM; - goto out_wpa_rx_gtk; - } - - if (hif_key->attr.wpa.seq) - memcpy(key_buf + 6, hif_key->attr.wpa.seq, 8); - - memcpy(key_buf + 14, &hif_key->attr.wpa.index, 1); - memcpy(key_buf + 15, &hif_key->attr.wpa.key_len, 1); - memcpy(key_buf + 16, hif_key->attr.wpa.key, - hif_key->attr.wpa.key_len); - - wid_list[0].id = WID_11I_MODE; - wid_list[0].type = WID_CHAR; - wid_list[0].size = sizeof(char); - wid_list[0].val = (s8 *)&hif_key->attr.wpa.mode; - - wid_list[1].id = WID_ADD_RX_GTK; - wid_list[1].type = WID_STR; - wid_list[1].val = (s8 *)key_buf; - wid_list[1].size = RX_MIC_KEY_MSG_LEN; - - result = wilc_send_config_pkt(vif, SET_CFG, - wid_list, 2, - wilc_get_vif_idx(vif)); - - kfree(key_buf); - } else if (hif_key->action & ADDKEY) { - key_buf = kzalloc(RX_MIC_KEY_MSG_LEN, GFP_KERNEL); - if (!key_buf) { - result = -ENOMEM; - goto out_wpa_rx_gtk; - } - - if (hif_drv->hif_state == HOST_IF_CONNECTED) - memcpy(key_buf, hif_drv->assoc_bssid, ETH_ALEN); - else - netdev_err(vif->ndev, "Couldn't handle\n"); - - memcpy(key_buf + 6, hif_key->attr.wpa.seq, 8); - memcpy(key_buf + 14, &hif_key->attr.wpa.index, 1); - memcpy(key_buf + 15, &hif_key->attr.wpa.key_len, 1); - memcpy(key_buf + 16, hif_key->attr.wpa.key, - hif_key->attr.wpa.key_len); - - wid.id = WID_ADD_RX_GTK; - wid.type = WID_STR; - wid.val = (s8 *)key_buf; - wid.size = RX_MIC_KEY_MSG_LEN; - - result = wilc_send_config_pkt(vif, SET_CFG, - &wid, 1, - wilc_get_vif_idx(vif)); - - kfree(key_buf); - } -out_wpa_rx_gtk: - complete(&msg->work_comp); - break; - - case WPA_PTK: - if (hif_key->action & ADDKEY_AP) { - key_buf = kmalloc(PTK_KEY_MSG_LEN + 1, GFP_KERNEL); - if (!key_buf) { - result = -ENOMEM; - goto out_wpa_ptk; - } - - memcpy(key_buf, hif_key->attr.wpa.mac_addr, 6); - memcpy(key_buf + 6, &hif_key->attr.wpa.index, 1); - memcpy(key_buf + 7, &hif_key->attr.wpa.key_len, 1); - memcpy(key_buf + 8, hif_key->attr.wpa.key, - hif_key->attr.wpa.key_len); - - wid_list[0].id = WID_11I_MODE; - wid_list[0].type = WID_CHAR; - wid_list[0].size = sizeof(char); - wid_list[0].val = (s8 *)&hif_key->attr.wpa.mode; - - wid_list[1].id = WID_ADD_PTK; - wid_list[1].type = WID_STR; - wid_list[1].val = (s8 *)key_buf; - wid_list[1].size = PTK_KEY_MSG_LEN + 1; - - result = wilc_send_config_pkt(vif, SET_CFG, - wid_list, 2, - wilc_get_vif_idx(vif)); - kfree(key_buf); - } else if (hif_key->action & ADDKEY) { - key_buf = kmalloc(PTK_KEY_MSG_LEN, GFP_KERNEL); - if (!key_buf) { - result = -ENOMEM; - goto out_wpa_ptk; - } - - memcpy(key_buf, hif_key->attr.wpa.mac_addr, 6); - memcpy(key_buf + 6, &hif_key->attr.wpa.key_len, 1); - memcpy(key_buf + 7, hif_key->attr.wpa.key, - hif_key->attr.wpa.key_len); - - wid.id = WID_ADD_PTK; - wid.type = WID_STR; - wid.val = (s8 *)key_buf; - wid.size = PTK_KEY_MSG_LEN; - - result = wilc_send_config_pkt(vif, SET_CFG, - &wid, 1, - wilc_get_vif_idx(vif)); - kfree(key_buf); - } - -out_wpa_ptk: - complete(&msg->work_comp); - break; - - case PMKSA: - result = wilc_pmksa_key_copy(vif, hif_key); - /*free 'msg', this case it not a sync call*/ - kfree(msg); - break; - } - - if (result) - netdev_err(vif->ndev, "Failed to send key config packet\n"); - - /* free 'msg' data in caller sync call */ -} - -static void handle_disconnect(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; struct wid wid; struct host_if_drv *hif_drv = vif->hif_drv; - struct disconnect_info disconn_info; - struct user_scan_req *scan_req; - struct user_conn_req *conn_req; + struct wilc_user_scan_req *scan_req; + struct wilc_conn_info *conn_info; int result; u16 dummy_reason_code = 0; @@ -1852,35 +772,28 @@ static void handle_disconnect(struct work_struct *work) vif->obtaining_ip = false; wilc_set_power_mgmt(vif, 0, 0); - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, wilc_get_vif_idx(vif)); - if (result) { netdev_err(vif->ndev, "Failed to send dissconect\n"); - goto out; + return result; } - memset(&disconn_info, 0, sizeof(struct disconnect_info)); - - disconn_info.reason = 0; - disconn_info.ie = NULL; - disconn_info.ie_len = 0; scan_req = &hif_drv->usr_scan_req; - conn_req = &hif_drv->usr_conn_req; + conn_info = &hif_drv->conn_info; if (scan_req->scan_result) { del_timer(&hif_drv->scan_timer); - scan_req->scan_result(SCAN_EVENT_ABORTED, NULL, scan_req->arg, - NULL); + scan_req->scan_result(SCAN_EVENT_ABORTED, NULL, scan_req->arg); scan_req->scan_result = NULL; } - if (conn_req->conn_result) { + if (conn_info->conn_result) { if (hif_drv->hif_state == HOST_IF_WAITING_CONN_RESP) del_timer(&hif_drv->connect_timer); - conn_req->conn_result(CONN_DISCONN_EVENT_DISCONN_NOTIF, NULL, - 0, &disconn_info, conn_req->arg); + conn_info->conn_result(CONN_DISCONN_EVENT_DISCONN_NOTIF, 0, + conn_info->arg); } else { netdev_err(vif->ndev, "%s: conn_result is NULL\n", __func__); } @@ -1889,19 +802,11 @@ static void handle_disconnect(struct work_struct *work) eth_zero_addr(hif_drv->assoc_bssid); - conn_req->ssid_len = 0; - kfree(conn_req->ssid); - conn_req->ssid = NULL; - kfree(conn_req->bssid); - conn_req->bssid = NULL; - conn_req->ies_len = 0; - kfree(conn_req->ies); - conn_req->ies = NULL; - -out: + conn_info->req_ies_len = 0; + kfree(conn_info->req_ies); + conn_info->req_ies = NULL; - complete(&msg->work_comp); - /* free 'msg' in caller after receiving completion */ + return 0; } void wilc_resolve_disconnect_aberration(struct wilc_vif *vif) @@ -1910,37 +815,13 @@ void wilc_resolve_disconnect_aberration(struct wilc_vif *vif) return; if (vif->hif_drv->hif_state == HOST_IF_WAITING_CONN_RESP || vif->hif_drv->hif_state == HOST_IF_CONNECTING) - wilc_disconnect(vif, 1); -} - -static void handle_get_rssi(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - int result; - struct wid wid; - - wid.id = WID_RSSI; - wid.type = WID_CHAR; - wid.val = msg->body.data; - wid.size = sizeof(char); - - result = wilc_send_config_pkt(vif, GET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (result) - netdev_err(vif->ndev, "Failed to get RSSI value\n"); - - complete(&msg->work_comp); - /* free 'msg' data in caller */ + wilc_disconnect(vif); } -static void handle_get_statistics(struct work_struct *work) +int wilc_get_statistics(struct wilc_vif *vif, struct rf_info *stats) { - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; struct wid wid_list[5]; u32 wid_cnt = 0, result; - struct rf_info *stats = (struct rf_info *)msg->body.data; wid_list[wid_cnt].id = WID_LINKSPEED; wid_list[wid_cnt].type = WID_CHAR; @@ -1972,12 +853,14 @@ static void handle_get_statistics(struct work_struct *work) wid_list[wid_cnt].val = (s8 *)&stats->tx_fail_cnt; wid_cnt++; - result = wilc_send_config_pkt(vif, GET_CFG, wid_list, + result = wilc_send_config_pkt(vif, WILC_GET_CFG, wid_list, wid_cnt, wilc_get_vif_idx(vif)); - if (result) + if (result) { netdev_err(vif->ndev, "Failed to send scan parameters\n"); + return result; + } if (stats->link_speed > TCP_ACK_FILTER_LINK_SPEED_THRESH && stats->link_speed != DEFAULT_LINK_SPEED) @@ -1985,399 +868,97 @@ static void handle_get_statistics(struct work_struct *work) else if (stats->link_speed != DEFAULT_LINK_SPEED) wilc_enable_tcp_ack_filter(vif, false); - /* free 'msg' for async command, for sync caller will free it */ - if (msg->is_sync) - complete(&msg->work_comp); - else - kfree(msg); -} - -static void handle_get_inactive_time(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct sta_inactive_t *hif_sta_inactive = &msg->body.mac_info; - int result; - struct wid wid; - - wid.id = WID_SET_STA_MAC_INACTIVE_TIME; - wid.type = WID_STR; - wid.size = ETH_ALEN; - wid.val = kmalloc(wid.size, GFP_KERNEL); - if (!wid.val) - goto out; - - ether_addr_copy(wid.val, hif_sta_inactive->mac); - - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - kfree(wid.val); - - if (result) { - netdev_err(vif->ndev, "Failed to set inactive mac\n"); - goto out; - } - - wid.id = WID_GET_INACTIVE_TIME; - wid.type = WID_INT; - wid.val = (s8 *)&hif_sta_inactive->inactive_time; - wid.size = sizeof(u32); - - result = wilc_send_config_pkt(vif, GET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - - if (result) - netdev_err(vif->ndev, "Failed to get inactive time\n"); - -out: - /* free 'msg' data in caller */ - complete(&msg->work_comp); -} - -static void handle_add_beacon(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct beacon_attr *param = &msg->body.beacon_info; - int result; - struct wid wid; - u8 *cur_byte; - - wid.id = WID_ADD_BEACON; - wid.type = WID_BIN; - wid.size = param->head_len + param->tail_len + 16; - wid.val = kmalloc(wid.size, GFP_KERNEL); - if (!wid.val) - goto error; - - cur_byte = wid.val; - *cur_byte++ = (param->interval & 0xFF); - *cur_byte++ = ((param->interval >> 8) & 0xFF); - *cur_byte++ = ((param->interval >> 16) & 0xFF); - *cur_byte++ = ((param->interval >> 24) & 0xFF); - - *cur_byte++ = (param->dtim_period & 0xFF); - *cur_byte++ = ((param->dtim_period >> 8) & 0xFF); - *cur_byte++ = ((param->dtim_period >> 16) & 0xFF); - *cur_byte++ = ((param->dtim_period >> 24) & 0xFF); - - *cur_byte++ = (param->head_len & 0xFF); - *cur_byte++ = ((param->head_len >> 8) & 0xFF); - *cur_byte++ = ((param->head_len >> 16) & 0xFF); - *cur_byte++ = ((param->head_len >> 24) & 0xFF); - - memcpy(cur_byte, param->head, param->head_len); - cur_byte += param->head_len; - - *cur_byte++ = (param->tail_len & 0xFF); - *cur_byte++ = ((param->tail_len >> 8) & 0xFF); - *cur_byte++ = ((param->tail_len >> 16) & 0xFF); - *cur_byte++ = ((param->tail_len >> 24) & 0xFF); - - if (param->tail) - memcpy(cur_byte, param->tail, param->tail_len); - cur_byte += param->tail_len; - - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (result) - netdev_err(vif->ndev, "Failed to send add beacon\n"); - -error: - kfree(wid.val); - kfree(param->head); - kfree(param->tail); - kfree(msg); -} - -static void handle_del_beacon(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - int result; - struct wid wid; - u8 del_beacon = 0; - - wid.id = WID_DEL_BEACON; - wid.type = WID_CHAR; - wid.size = sizeof(char); - wid.val = &del_beacon; - - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (result) - netdev_err(vif->ndev, "Failed to send delete beacon\n"); - kfree(msg); -} - -static u32 wilc_hif_pack_sta_param(u8 *buff, struct add_sta_param *param) -{ - u8 *cur_byte; - - cur_byte = buff; - - memcpy(cur_byte, param->bssid, ETH_ALEN); - cur_byte += ETH_ALEN; - - *cur_byte++ = param->aid & 0xFF; - *cur_byte++ = (param->aid >> 8) & 0xFF; - - *cur_byte++ = param->rates_len; - if (param->rates_len > 0) - memcpy(cur_byte, param->rates, param->rates_len); - cur_byte += param->rates_len; - - *cur_byte++ = param->ht_supported; - memcpy(cur_byte, ¶m->ht_capa, sizeof(struct ieee80211_ht_cap)); - cur_byte += sizeof(struct ieee80211_ht_cap); - - *cur_byte++ = param->flags_mask & 0xFF; - *cur_byte++ = (param->flags_mask >> 8) & 0xFF; - - *cur_byte++ = param->flags_set & 0xFF; - *cur_byte++ = (param->flags_set >> 8) & 0xFF; - - return cur_byte - buff; + return result; } -static void handle_add_station(struct work_struct *work) +static void handle_get_statistics(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); struct wilc_vif *vif = msg->vif; - struct add_sta_param *param = &msg->body.add_sta_info; - int result; - struct wid wid; - u8 *cur_byte; - - wid.id = WID_ADD_STA; - wid.type = WID_BIN; - wid.size = WILC_ADD_STA_LENGTH + param->rates_len; - - wid.val = kmalloc(wid.size, GFP_KERNEL); - if (!wid.val) - goto error; - - cur_byte = wid.val; - cur_byte += wilc_hif_pack_sta_param(cur_byte, param); + struct rf_info *stats = (struct rf_info *)msg->body.data; - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (result != 0) - netdev_err(vif->ndev, "Failed to send add station\n"); + wilc_get_statistics(vif, stats); -error: - kfree(param->rates); - kfree(wid.val); kfree(msg); } -static void handle_del_all_sta(struct work_struct *work) +static void wilc_hif_pack_sta_param(u8 *cur_byte, const u8 *mac, + struct station_parameters *params) { - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct del_all_sta *param = &msg->body.del_all_sta_info; - int result; - struct wid wid; - u8 *curr_byte; - u8 i; - u8 zero_buff[6] = {0}; - - wid.id = WID_DEL_ALL_STA; - wid.type = WID_STR; - wid.size = (param->assoc_sta * ETH_ALEN) + 1; + ether_addr_copy(cur_byte, mac); + cur_byte += ETH_ALEN; - wid.val = kmalloc((param->assoc_sta * ETH_ALEN) + 1, GFP_KERNEL); - if (!wid.val) - goto error; + put_unaligned_le16(params->aid, cur_byte); + cur_byte += 2; - curr_byte = wid.val; + *cur_byte++ = params->supported_rates_len; + if (params->supported_rates_len > 0) + memcpy(cur_byte, params->supported_rates, + params->supported_rates_len); + cur_byte += params->supported_rates_len; - *(curr_byte++) = param->assoc_sta; - - for (i = 0; i < MAX_NUM_STA; i++) { - if (memcmp(param->del_all_sta[i], zero_buff, ETH_ALEN)) - memcpy(curr_byte, param->del_all_sta[i], ETH_ALEN); - else - continue; - - curr_byte += ETH_ALEN; + if (params->ht_capa) { + *cur_byte++ = true; + memcpy(cur_byte, ¶ms->ht_capa, + sizeof(struct ieee80211_ht_cap)); + } else { + *cur_byte++ = false; } + cur_byte += sizeof(struct ieee80211_ht_cap); - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (result) - netdev_err(vif->ndev, "Failed to send delete all station\n"); - -error: - kfree(wid.val); - - /* free 'msg' data in caller */ - complete(&msg->work_comp); -} - -static void handle_del_station(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct del_sta *param = &msg->body.del_sta_info; - int result; - struct wid wid; - - wid.id = WID_REMOVE_STA; - wid.type = WID_BIN; - wid.size = ETH_ALEN; - - wid.val = kmalloc(wid.size, GFP_KERNEL); - if (!wid.val) - goto error; - - ether_addr_copy(wid.val, param->mac_addr); - - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (result) - netdev_err(vif->ndev, "Failed to del station\n"); - -error: - kfree(wid.val); - kfree(msg); -} - -static void handle_edit_station(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct add_sta_param *param = &msg->body.edit_sta_info; - int result; - struct wid wid; - u8 *cur_byte; - - wid.id = WID_EDIT_STA; - wid.type = WID_BIN; - wid.size = WILC_ADD_STA_LENGTH + param->rates_len; - - wid.val = kmalloc(wid.size, GFP_KERNEL); - if (!wid.val) - goto error; - - cur_byte = wid.val; - cur_byte += wilc_hif_pack_sta_param(cur_byte, param); - - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (result) - netdev_err(vif->ndev, "Failed to send edit station\n"); - -error: - kfree(param->rates); - kfree(wid.val); - kfree(msg); + put_unaligned_le16(params->sta_flags_mask, cur_byte); + cur_byte += 2; + put_unaligned_le16(params->sta_flags_set, cur_byte); } static int handle_remain_on_chan(struct wilc_vif *vif, - struct remain_ch *hif_remain_ch) + struct wilc_remain_ch *hif_remain_ch) { int result; u8 remain_on_chan_flag; struct wid wid; struct host_if_drv *hif_drv = vif->hif_drv; - if (!hif_drv->remain_on_ch_pending) { - hif_drv->remain_on_ch.arg = hif_remain_ch->arg; - hif_drv->remain_on_ch.expired = hif_remain_ch->expired; - hif_drv->remain_on_ch.ready = hif_remain_ch->ready; - hif_drv->remain_on_ch.ch = hif_remain_ch->ch; - hif_drv->remain_on_ch.id = hif_remain_ch->id; - } else { - hif_remain_ch->ch = hif_drv->remain_on_ch.ch; - } + if (hif_drv->usr_scan_req.scan_result) + return -EBUSY; - if (hif_drv->usr_scan_req.scan_result) { - hif_drv->remain_on_ch_pending = 1; - result = -EBUSY; - goto error; - } - if (hif_drv->hif_state == HOST_IF_WAITING_CONN_RESP) { - result = -EBUSY; - goto error; - } + if (hif_drv->hif_state == HOST_IF_WAITING_CONN_RESP) + return -EBUSY; - if (vif->obtaining_ip || vif->connecting) { - result = -EBUSY; - goto error; - } + if (vif->obtaining_ip || vif->connecting) + return -EBUSY; remain_on_chan_flag = true; wid.id = WID_REMAIN_ON_CHAN; wid.type = WID_STR; wid.size = 2; wid.val = kmalloc(wid.size, GFP_KERNEL); - if (!wid.val) { - result = -ENOMEM; - goto error; - } + if (!wid.val) + return -ENOMEM; wid.val[0] = remain_on_chan_flag; wid.val[1] = (s8)hif_remain_ch->ch; - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, wilc_get_vif_idx(vif)); kfree(wid.val); - if (result != 0) - netdev_err(vif->ndev, "Failed to set remain on channel\n"); + if (result) + return -EBUSY; -error: + hif_drv->remain_on_ch.arg = hif_remain_ch->arg; + hif_drv->remain_on_ch.expired = hif_remain_ch->expired; + hif_drv->remain_on_ch.ch = hif_remain_ch->ch; + hif_drv->remain_on_ch.cookie = hif_remain_ch->cookie; hif_drv->remain_on_ch_timer_vif = vif; - mod_timer(&hif_drv->remain_on_ch_timer, - jiffies + msecs_to_jiffies(hif_remain_ch->duration)); - - if (hif_drv->remain_on_ch.ready) - hif_drv->remain_on_ch.ready(hif_drv->remain_on_ch.arg); - if (hif_drv->remain_on_ch_pending) - hif_drv->remain_on_ch_pending = 0; - - return result; -} - -static void handle_register_frame(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct reg_frame *hif_reg_frame = &msg->body.reg_frame; - int result; - struct wid wid; - u8 *cur_byte; - - wid.id = WID_REGISTER_FRAME; - wid.type = WID_STR; - wid.val = kmalloc(sizeof(u16) + 2, GFP_KERNEL); - if (!wid.val) - goto out; - - cur_byte = wid.val; - - *cur_byte++ = hif_reg_frame->reg; - *cur_byte++ = hif_reg_frame->reg_id; - memcpy(cur_byte, &hif_reg_frame->frame_type, sizeof(u16)); - - wid.size = sizeof(u16) + 2; - - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - kfree(wid.val); - if (result) - netdev_err(vif->ndev, "Failed to frame register\n"); - -out: - kfree(msg); + return 0; } static void handle_listen_state_expired(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); struct wilc_vif *vif = msg->vif; - struct remain_ch *hif_remain_ch = &msg->body.remain_on_ch; + struct wilc_remain_ch *hif_remain_ch = &msg->body.remain_on_ch; u8 remain_on_chan_flag; struct wid wid; int result; @@ -2395,9 +976,9 @@ static void handle_listen_state_expired(struct work_struct *work) goto free_msg; wid.val[0] = remain_on_chan_flag; - wid.val[1] = FALSE_FRMWR_CHANNEL; + wid.val[1] = WILC_FALSE_FRMWR_CHANNEL; - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, wilc_get_vif_idx(vif)); kfree(wid.val); if (result != 0) { @@ -2407,7 +988,7 @@ static void handle_listen_state_expired(struct work_struct *work) if (hif_drv->remain_on_ch.expired) { hif_drv->remain_on_ch.expired(hif_drv->remain_on_ch.arg, - hif_remain_ch->id); + hif_remain_ch->cookie); } } else { netdev_dbg(vif->ndev, "Not in listen state\n"); @@ -2431,7 +1012,7 @@ static void listen_timer_cb(struct timer_list *t) if (IS_ERR(msg)) return; - msg->body.remain_on_ch.id = vif->hif_drv->remain_on_ch.id; + msg->body.remain_on_ch.cookie = vif->hif_drv->remain_on_ch.cookie; result = wilc_enqueue_work(msg); if (result) { @@ -2440,116 +1021,43 @@ static void listen_timer_cb(struct timer_list *t) } } -static void handle_power_management(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - struct power_mgmt_param *pm_param = &msg->body.pwr_mgmt_info; - int result; - struct wid wid; - s8 power_mode; - - wid.id = WID_POWER_MANAGEMENT; - - if (pm_param->enabled) - power_mode = MIN_FAST_PS; - else - power_mode = NO_POWERSAVE; - - wid.val = &power_mode; - wid.size = sizeof(char); - - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (result) - netdev_err(vif->ndev, "Failed to send power management\n"); - kfree(msg); -} - static void handle_set_mcast_filter(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); struct wilc_vif *vif = msg->vif; - struct set_multicast *hif_set_mc = &msg->body.multicast_info; + struct wilc_set_multicast *set_mc = &msg->body.mc_info; int result; struct wid wid; u8 *cur_byte; wid.id = WID_SETUP_MULTICAST_FILTER; wid.type = WID_BIN; - wid.size = sizeof(struct set_multicast) + (hif_set_mc->cnt * ETH_ALEN); + wid.size = sizeof(struct wilc_set_multicast) + (set_mc->cnt * ETH_ALEN); wid.val = kmalloc(wid.size, GFP_KERNEL); if (!wid.val) goto error; cur_byte = wid.val; - *cur_byte++ = (hif_set_mc->enabled & 0xFF); - *cur_byte++ = 0; - *cur_byte++ = 0; - *cur_byte++ = 0; + put_unaligned_le32(set_mc->enabled, cur_byte); + cur_byte += 4; - *cur_byte++ = (hif_set_mc->cnt & 0xFF); - *cur_byte++ = ((hif_set_mc->cnt >> 8) & 0xFF); - *cur_byte++ = ((hif_set_mc->cnt >> 16) & 0xFF); - *cur_byte++ = ((hif_set_mc->cnt >> 24) & 0xFF); + put_unaligned_le32(set_mc->cnt, cur_byte); + cur_byte += 4; - if (hif_set_mc->cnt > 0 && hif_set_mc->mc_list) - memcpy(cur_byte, hif_set_mc->mc_list, - ((hif_set_mc->cnt) * ETH_ALEN)); + if (set_mc->cnt > 0 && set_mc->mc_list) + memcpy(cur_byte, set_mc->mc_list, set_mc->cnt * ETH_ALEN); - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, wilc_get_vif_idx(vif)); if (result) netdev_err(vif->ndev, "Failed to send setup multicast\n"); error: - kfree(hif_set_mc->mc_list); + kfree(set_mc->mc_list); kfree(wid.val); kfree(msg); } -static void handle_set_tx_pwr(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - u8 tx_pwr = msg->body.tx_power.tx_pwr; - int ret; - struct wid wid; - - wid.id = WID_TX_POWER; - wid.type = WID_CHAR; - wid.val = &tx_pwr; - wid.size = sizeof(char); - - ret = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (ret) - netdev_err(vif->ndev, "Failed to set TX PWR\n"); - kfree(msg); -} - -/* Note: 'msg' will be free after using data */ -static void handle_get_tx_pwr(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - u8 *tx_pwr = &msg->body.tx_power.tx_pwr; - int ret; - struct wid wid; - - wid.id = WID_TX_POWER; - wid.type = WID_CHAR; - wid.val = (s8 *)tx_pwr; - wid.size = sizeof(char); - - ret = wilc_send_config_pkt(vif, GET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - if (ret) - netdev_err(vif->ndev, "Failed to get TX PWR\n"); - - complete(&msg->work_comp); -} - static void handle_scan_timer(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); @@ -2558,14 +1066,6 @@ static void handle_scan_timer(struct work_struct *work) kfree(msg); } -static void handle_remain_on_chan_work(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - - handle_remain_on_chan(msg->vif, &msg->body.remain_on_ch); - kfree(msg); -} - static void handle_scan_complete(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); @@ -2578,8 +1078,6 @@ static void handle_scan_complete(struct work_struct *work) handle_scan_done(msg->vif, SCAN_EVENT_DONE); - if (msg->vif->hif_drv->remain_on_ch_pending) - handle_remain_on_chan(msg->vif, &msg->body.remain_on_ch); kfree(msg); } @@ -2618,145 +1116,107 @@ static void timer_connect_cb(struct timer_list *t) int wilc_remove_wep_key(struct wilc_vif *vif, u8 index) { + struct wid wid; int result; - struct host_if_msg *msg; - struct host_if_drv *hif_drv = vif->hif_drv; - - if (!hif_drv) { - result = -EFAULT; - netdev_err(vif->ndev, "%s: hif driver is NULL", __func__); - return result; - } - - msg = wilc_alloc_work(vif, handle_key, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); - msg->body.key_info.type = WEP; - msg->body.key_info.action = REMOVEKEY; - msg->body.key_info.attr.wep.index = index; + wid.id = WID_REMOVE_WEP_KEY; + wid.type = WID_STR; + wid.size = sizeof(char); + wid.val = &index; - result = wilc_enqueue_work(msg); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); if (result) - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - else - wait_for_completion(&msg->work_comp); - - kfree(msg); + netdev_err(vif->ndev, + "Failed to send remove wep key config packet\n"); return result; } int wilc_set_wep_default_keyid(struct wilc_vif *vif, u8 index) { + struct wid wid; int result; - struct host_if_msg *msg; - struct host_if_drv *hif_drv = vif->hif_drv; - - if (!hif_drv) { - result = -EFAULT; - netdev_err(vif->ndev, "%s: hif driver is NULL\n", __func__); - return result; - } - msg = wilc_alloc_work(vif, handle_key, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - msg->body.key_info.type = WEP; - msg->body.key_info.action = DEFAULTKEY; - msg->body.key_info.attr.wep.index = index; - - result = wilc_enqueue_work(msg); + wid.id = WID_KEY_ID; + wid.type = WID_CHAR; + wid.size = sizeof(char); + wid.val = &index; + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); if (result) - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - else - wait_for_completion(&msg->work_comp); + netdev_err(vif->ndev, + "Failed to send wep default key config packet\n"); - kfree(msg); return result; } int wilc_add_wep_key_bss_sta(struct wilc_vif *vif, const u8 *key, u8 len, u8 index) { + struct wid wid; int result; - struct host_if_msg *msg; - struct host_if_drv *hif_drv = vif->hif_drv; + struct wilc_wep_key *wep_key; - if (!hif_drv) { - netdev_err(vif->ndev, "%s: hif driver is NULL", __func__); - return -EFAULT; - } - - msg = wilc_alloc_work(vif, handle_key, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); + wid.id = WID_ADD_WEP_KEY; + wid.type = WID_STR; + wid.size = sizeof(*wep_key) + len; + wep_key = kzalloc(wid.size, GFP_KERNEL); + if (!wep_key) + return -ENOMEM; - msg->body.key_info.type = WEP; - msg->body.key_info.action = ADDKEY; - msg->body.key_info.attr.wep.key = kmemdup(key, len, GFP_KERNEL); - if (!msg->body.key_info.attr.wep.key) { - result = -ENOMEM; - goto free_msg; - } + wid.val = (u8 *)wep_key; - msg->body.key_info.attr.wep.key_len = len; - msg->body.key_info.attr.wep.index = index; + wep_key->index = index; + wep_key->key_len = len; + memcpy(wep_key->key, key, len); - result = wilc_enqueue_work(msg); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); if (result) - goto free_key; - - wait_for_completion(&msg->work_comp); - -free_key: - kfree(msg->body.key_info.attr.wep.key); + netdev_err(vif->ndev, + "Failed to add wep key config packet\n"); -free_msg: - kfree(msg); + kfree(wep_key); return result; } int wilc_add_wep_key_bss_ap(struct wilc_vif *vif, const u8 *key, u8 len, u8 index, u8 mode, enum authtype auth_type) { + struct wid wid_list[3]; int result; - struct host_if_msg *msg; - struct host_if_drv *hif_drv = vif->hif_drv; - - if (!hif_drv) { - netdev_err(vif->ndev, "%s: hif driver is NULL\n", __func__); - return -EFAULT; - } - - msg = wilc_alloc_work(vif, handle_key, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - msg->body.key_info.type = WEP; - msg->body.key_info.action = ADDKEY_AP; - msg->body.key_info.attr.wep.key = kmemdup(key, len, GFP_KERNEL); - if (!msg->body.key_info.attr.wep.key) { - result = -ENOMEM; - goto free_msg; - } + struct wilc_wep_key *wep_key; + + wid_list[0].id = WID_11I_MODE; + wid_list[0].type = WID_CHAR; + wid_list[0].size = sizeof(char); + wid_list[0].val = &mode; + + wid_list[1].id = WID_AUTH_TYPE; + wid_list[1].type = WID_CHAR; + wid_list[1].size = sizeof(char); + wid_list[1].val = (s8 *)&auth_type; + + wid_list[2].id = WID_WEP_KEY_VALUE; + wid_list[2].type = WID_STR; + wid_list[2].size = sizeof(*wep_key) + len; + wep_key = kzalloc(wid_list[2].size, GFP_KERNEL); + if (!wep_key) + return -ENOMEM; - msg->body.key_info.attr.wep.key_len = len; - msg->body.key_info.attr.wep.index = index; - msg->body.key_info.attr.wep.mode = mode; - msg->body.key_info.attr.wep.auth_type = auth_type; + wid_list[2].val = (u8 *)wep_key; - result = wilc_enqueue_work(msg); + wep_key->index = index; + wep_key->key_len = len; + memcpy(wep_key->key, key, len); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, wid_list, + ARRAY_SIZE(wid_list), + wilc_get_vif_idx(vif)); if (result) - goto free_key; - - wait_for_completion(&msg->work_comp); - -free_key: - kfree(msg->body.key_info.attr.wep.key); + netdev_err(vif->ndev, + "Failed to add wep ap key config packet\n"); -free_msg: - kfree(msg); + kfree(wep_key); return result; } @@ -2764,65 +1224,72 @@ int wilc_add_ptk(struct wilc_vif *vif, const u8 *ptk, u8 ptk_key_len, const u8 *mac_addr, const u8 *rx_mic, const u8 *tx_mic, u8 mode, u8 cipher_mode, u8 index) { - int result; - struct host_if_msg *msg; - struct host_if_drv *hif_drv = vif->hif_drv; - u8 key_len = ptk_key_len; - - if (!hif_drv) { - netdev_err(vif->ndev, "%s: hif driver is NULL", __func__); - return -EFAULT; - } + int result = 0; + u8 t_key_len = ptk_key_len + WILC_RX_MIC_KEY_LEN + WILC_TX_MIC_KEY_LEN; - if (rx_mic) - key_len += RX_MIC_KEY_LEN; + if (mode == WILC_AP_MODE) { + struct wid wid_list[2]; + struct wilc_ap_wpa_ptk *key_buf; - if (tx_mic) - key_len += TX_MIC_KEY_LEN; + wid_list[0].id = WID_11I_MODE; + wid_list[0].type = WID_CHAR; + wid_list[0].size = sizeof(char); + wid_list[0].val = (s8 *)&cipher_mode; - msg = wilc_alloc_work(vif, handle_key, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); + key_buf = kzalloc(sizeof(*key_buf) + t_key_len, GFP_KERNEL); + if (!key_buf) + return -ENOMEM; - msg->body.key_info.type = WPA_PTK; - if (mode == AP_MODE) { - msg->body.key_info.action = ADDKEY_AP; - msg->body.key_info.attr.wpa.index = index; - } - if (mode == STATION_MODE) - msg->body.key_info.action = ADDKEY; + ether_addr_copy(key_buf->mac_addr, mac_addr); + key_buf->index = index; + key_buf->key_len = t_key_len; + memcpy(&key_buf->key[0], ptk, ptk_key_len); + + if (rx_mic) + memcpy(&key_buf->key[ptk_key_len], rx_mic, + WILC_RX_MIC_KEY_LEN); + + if (tx_mic) + memcpy(&key_buf->key[ptk_key_len + WILC_RX_MIC_KEY_LEN], + tx_mic, WILC_TX_MIC_KEY_LEN); + + wid_list[1].id = WID_ADD_PTK; + wid_list[1].type = WID_STR; + wid_list[1].size = sizeof(*key_buf) + t_key_len; + wid_list[1].val = (u8 *)key_buf; + result = wilc_send_config_pkt(vif, WILC_SET_CFG, wid_list, + ARRAY_SIZE(wid_list), + wilc_get_vif_idx(vif)); + kfree(key_buf); + } else if (mode == WILC_STATION_MODE) { + struct wid wid; + struct wilc_sta_wpa_ptk *key_buf; - msg->body.key_info.attr.wpa.key = kmemdup(ptk, ptk_key_len, GFP_KERNEL); - if (!msg->body.key_info.attr.wpa.key) { - result = -ENOMEM; - goto free_msg; - } + key_buf = kzalloc(sizeof(*key_buf) + t_key_len, GFP_KERNEL); + if (!key_buf) + return -ENOMEM; - if (rx_mic) - memcpy(msg->body.key_info.attr.wpa.key + 16, rx_mic, - RX_MIC_KEY_LEN); + ether_addr_copy(key_buf->mac_addr, mac_addr); + key_buf->key_len = t_key_len; + memcpy(&key_buf->key[0], ptk, ptk_key_len); - if (tx_mic) - memcpy(msg->body.key_info.attr.wpa.key + 24, tx_mic, - TX_MIC_KEY_LEN); + if (rx_mic) + memcpy(&key_buf->key[ptk_key_len], rx_mic, + WILC_RX_MIC_KEY_LEN); - msg->body.key_info.attr.wpa.key_len = key_len; - msg->body.key_info.attr.wpa.mac_addr = mac_addr; - msg->body.key_info.attr.wpa.mode = cipher_mode; + if (tx_mic) + memcpy(&key_buf->key[ptk_key_len + WILC_RX_MIC_KEY_LEN], + tx_mic, WILC_TX_MIC_KEY_LEN); - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - goto free_key; + wid.id = WID_ADD_PTK; + wid.type = WID_STR; + wid.size = sizeof(*key_buf) + t_key_len; + wid.val = (s8 *)key_buf; + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + kfree(key_buf); } - wait_for_completion(&msg->work_comp); - -free_key: - kfree(msg->body.key_info.attr.wpa.key); - -free_msg: - kfree(msg); return result; } @@ -2831,108 +1298,75 @@ int wilc_add_rx_gtk(struct wilc_vif *vif, const u8 *rx_gtk, u8 gtk_key_len, const u8 *rx_mic, const u8 *tx_mic, u8 mode, u8 cipher_mode) { - int result; - struct host_if_msg *msg; - struct host_if_drv *hif_drv = vif->hif_drv; - u8 key_len = gtk_key_len; - - if (!hif_drv) { - netdev_err(vif->ndev, "%s: hif driver is NULL", __func__); - return -EFAULT; - } - - msg = wilc_alloc_work(vif, handle_key, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - if (rx_mic) - key_len += RX_MIC_KEY_LEN; - - if (tx_mic) - key_len += TX_MIC_KEY_LEN; - - if (key_rsc) { - msg->body.key_info.attr.wpa.seq = kmemdup(key_rsc, - key_rsc_len, - GFP_KERNEL); - if (!msg->body.key_info.attr.wpa.seq) { - result = -ENOMEM; - goto free_msg; - } - } + int result = 0; + struct wilc_gtk_key *gtk_key; + int t_key_len = gtk_key_len + WILC_RX_MIC_KEY_LEN + WILC_TX_MIC_KEY_LEN; - msg->body.key_info.type = WPA_RX_GTK; + gtk_key = kzalloc(sizeof(*gtk_key) + t_key_len, GFP_KERNEL); + if (!gtk_key) + return -ENOMEM; - if (mode == AP_MODE) { - msg->body.key_info.action = ADDKEY_AP; - msg->body.key_info.attr.wpa.mode = cipher_mode; - } - if (mode == STATION_MODE) - msg->body.key_info.action = ADDKEY; + /* fill bssid value only in station mode */ + if (mode == WILC_STATION_MODE && + vif->hif_drv->hif_state == HOST_IF_CONNECTED) + memcpy(gtk_key->mac_addr, vif->hif_drv->assoc_bssid, ETH_ALEN); - msg->body.key_info.attr.wpa.key = kmemdup(rx_gtk, key_len, GFP_KERNEL); - if (!msg->body.key_info.attr.wpa.key) { - result = -ENOMEM; - goto free_seq; - } + if (key_rsc) + memcpy(gtk_key->rsc, key_rsc, 8); + gtk_key->index = index; + gtk_key->key_len = t_key_len; + memcpy(>k_key->key[0], rx_gtk, gtk_key_len); if (rx_mic) - memcpy(msg->body.key_info.attr.wpa.key + 16, rx_mic, - RX_MIC_KEY_LEN); + memcpy(>k_key->key[gtk_key_len], rx_mic, WILC_RX_MIC_KEY_LEN); if (tx_mic) - memcpy(msg->body.key_info.attr.wpa.key + 24, tx_mic, - TX_MIC_KEY_LEN); + memcpy(>k_key->key[gtk_key_len + WILC_RX_MIC_KEY_LEN], + tx_mic, WILC_TX_MIC_KEY_LEN); - msg->body.key_info.attr.wpa.index = index; - msg->body.key_info.attr.wpa.key_len = key_len; - msg->body.key_info.attr.wpa.seq_len = key_rsc_len; + if (mode == WILC_AP_MODE) { + struct wid wid_list[2]; - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - goto free_key; - } + wid_list[0].id = WID_11I_MODE; + wid_list[0].type = WID_CHAR; + wid_list[0].size = sizeof(char); + wid_list[0].val = (s8 *)&cipher_mode; - wait_for_completion(&msg->work_comp); + wid_list[1].id = WID_ADD_RX_GTK; + wid_list[1].type = WID_STR; + wid_list[1].size = sizeof(*gtk_key) + t_key_len; + wid_list[1].val = (u8 *)gtk_key; -free_key: - kfree(msg->body.key_info.attr.wpa.key); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, wid_list, + ARRAY_SIZE(wid_list), + wilc_get_vif_idx(vif)); + } else if (mode == WILC_STATION_MODE) { + struct wid wid; -free_seq: - kfree(msg->body.key_info.attr.wpa.seq); + wid.id = WID_ADD_RX_GTK; + wid.type = WID_STR; + wid.size = sizeof(*gtk_key) + t_key_len; + wid.val = (u8 *)gtk_key; + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + } -free_msg: - kfree(msg); + kfree(gtk_key); return result; } -int wilc_set_pmkid_info(struct wilc_vif *vif, - struct host_if_pmkid_attr *pmkid) +int wilc_set_pmkid_info(struct wilc_vif *vif, struct wilc_pmkid_attr *pmkid) { + struct wid wid; int result; - struct host_if_msg *msg; - int i; - - msg = wilc_alloc_work(vif, handle_key, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - msg->body.key_info.type = PMKSA; - msg->body.key_info.action = ADDKEY; - for (i = 0; i < pmkid->numpmkid; i++) { - memcpy(msg->body.key_info.attr.pmkid.pmkidlist[i].bssid, - &pmkid->pmkidlist[i].bssid, ETH_ALEN); - memcpy(msg->body.key_info.attr.pmkid.pmkidlist[i].pmkid, - &pmkid->pmkidlist[i].pmkid, PMKID_LEN); - } + wid.id = WID_PMKID_INFO; + wid.type = WID_STR; + wid.size = (pmkid->numpmkid * sizeof(struct wilc_pmkid)) + 1; + wid.val = (u8 *)pmkid; - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); return result; } @@ -2940,274 +1374,183 @@ int wilc_set_pmkid_info(struct wilc_vif *vif, int wilc_get_mac_address(struct wilc_vif *vif, u8 *mac_addr) { int result; - struct host_if_msg *msg; - - msg = wilc_alloc_work(vif, handle_get_mac_address, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); + struct wid wid; - msg->body.get_mac_info.mac_addr = mac_addr; + wid.id = WID_MAC_ADDR; + wid.type = WID_STR; + wid.size = ETH_ALEN; + wid.val = mac_addr; - result = wilc_enqueue_work(msg); + result = wilc_send_config_pkt(vif, WILC_GET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); if (result) - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - else - wait_for_completion(&msg->work_comp); - - kfree(msg); + netdev_err(vif->ndev, "Failed to get mac address\n"); return result; } -int wilc_set_join_req(struct wilc_vif *vif, u8 *bssid, const u8 *ssid, - size_t ssid_len, const u8 *ies, size_t ies_len, - wilc_connect_result connect_result, void *user_arg, - u8 security, enum authtype auth_type, - u8 channel, void *join_params) +int wilc_set_join_req(struct wilc_vif *vif, u8 *bssid, const u8 *ies, + size_t ies_len) { int result; - struct host_if_msg *msg; struct host_if_drv *hif_drv = vif->hif_drv; + struct wilc_conn_info *conn_info = &hif_drv->conn_info; - if (!hif_drv || !connect_result) { - netdev_err(vif->ndev, - "%s: hif driver or connect result is NULL", - __func__); - return -EFAULT; - } - - if (!join_params) { - netdev_err(vif->ndev, "%s: joinparams is NULL\n", __func__); - return -EFAULT; - } - - msg = wilc_alloc_work(vif, handle_connect, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - msg->body.con_info.security = security; - msg->body.con_info.auth_type = auth_type; - msg->body.con_info.ch = channel; - msg->body.con_info.result = connect_result; - msg->body.con_info.arg = user_arg; - msg->body.con_info.params = join_params; - - if (bssid) { - msg->body.con_info.bssid = kmemdup(bssid, 6, GFP_KERNEL); - if (!msg->body.con_info.bssid) { - result = -ENOMEM; - goto free_msg; - } - } - - if (ssid) { - msg->body.con_info.ssid_len = ssid_len; - msg->body.con_info.ssid = kmemdup(ssid, ssid_len, GFP_KERNEL); - if (!msg->body.con_info.ssid) { - result = -ENOMEM; - goto free_bssid; - } - } + if (bssid) + ether_addr_copy(conn_info->bssid, bssid); if (ies) { - msg->body.con_info.ies_len = ies_len; - msg->body.con_info.ies = kmemdup(ies, ies_len, GFP_KERNEL); - if (!msg->body.con_info.ies) { + conn_info->req_ies_len = ies_len; + conn_info->req_ies = kmemdup(ies, ies_len, GFP_KERNEL); + if (!conn_info->req_ies) { result = -ENOMEM; - goto free_ssid; + return result; } } - if (hif_drv->hif_state < HOST_IF_CONNECTING) - hif_drv->hif_state = HOST_IF_CONNECTING; - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); + result = wilc_send_connect_wid(vif); + if (result) goto free_ies; - } hif_drv->connect_timer_vif = vif; mod_timer(&hif_drv->connect_timer, - jiffies + msecs_to_jiffies(HOST_IF_CONNECT_TIMEOUT)); + jiffies + msecs_to_jiffies(WILC_HIF_CONNECT_TIMEOUT_MS)); return 0; free_ies: - kfree(msg->body.con_info.ies); - -free_ssid: - kfree(msg->body.con_info.ssid); - -free_bssid: - kfree(msg->body.con_info.bssid); + kfree(conn_info->req_ies); -free_msg: - kfree(msg); - return result; -} - -int wilc_disconnect(struct wilc_vif *vif, u16 reason_code) -{ - int result; - struct host_if_msg *msg; - struct host_if_drv *hif_drv = vif->hif_drv; - - if (!hif_drv) { - netdev_err(vif->ndev, "%s: hif driver is NULL", __func__); - return -EFAULT; - } - - msg = wilc_alloc_work(vif, handle_disconnect, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - result = wilc_enqueue_work(msg); - if (result) - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - else - wait_for_completion(&msg->work_comp); - - kfree(msg); return result; } int wilc_set_mac_chnl_num(struct wilc_vif *vif, u8 channel) { + struct wid wid; int result; - struct host_if_msg *msg; - msg = wilc_alloc_work(vif, handle_set_channel, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - msg->body.channel_info.set_ch = channel; + wid.id = WID_CURRENT_CHANNEL; + wid.type = WID_CHAR; + wid.size = sizeof(char); + wid.val = &channel; - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result) + netdev_err(vif->ndev, "Failed to set channel\n"); return result; } int wilc_set_wfi_drv_handler(struct wilc_vif *vif, int index, u8 mode, - u8 ifc_id, bool is_sync) + u8 ifc_id) { + struct wid wid; + struct host_if_drv *hif_drv = vif->hif_drv; int result; - struct host_if_msg *msg; + struct wilc_drv_handler drv; - msg = wilc_alloc_work(vif, handle_set_wfi_drv_handler, is_sync); - if (IS_ERR(msg)) - return PTR_ERR(msg); + if (!hif_drv) + return -EFAULT; - msg->body.drv.handler = index; - msg->body.drv.mode = mode; - msg->body.drv.name = ifc_id; + wid.id = WID_SET_DRV_HANDLER; + wid.type = WID_STR; + wid.size = sizeof(drv); + wid.val = (u8 *)&drv; - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - return result; - } + drv.handler = cpu_to_le32(index); + drv.mode = (ifc_id | (mode << 1)); - if (is_sync) - wait_for_completion(&msg->work_comp); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + hif_drv->driver_handler_id); + if (result) + netdev_err(vif->ndev, "Failed to set driver handler\n"); return result; } int wilc_set_operation_mode(struct wilc_vif *vif, u32 mode) { + struct wid wid; + struct wilc_op_mode op_mode; int result; - struct host_if_msg *msg; - msg = wilc_alloc_work(vif, handle_set_operation_mode, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); + wid.id = WID_SET_OPERATION_MODE; + wid.type = WID_INT; + wid.size = sizeof(op_mode); + wid.val = (u8 *)&op_mode; - msg->body.mode.mode = mode; - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } + op_mode.mode = cpu_to_le32(mode); + + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result) + netdev_err(vif->ndev, "Failed to set operation mode\n"); return result; } -s32 wilc_get_inactive_time(struct wilc_vif *vif, const u8 *mac, - u32 *out_val) +s32 wilc_get_inactive_time(struct wilc_vif *vif, const u8 *mac, u32 *out_val) { + struct wid wid; s32 result; - struct host_if_msg *msg; - struct host_if_drv *hif_drv = vif->hif_drv; - - if (!hif_drv) { - netdev_err(vif->ndev, "%s: hif driver is NULL", __func__); - return -EFAULT; - } - msg = wilc_alloc_work(vif, handle_get_inactive_time, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); + wid.id = WID_SET_STA_MAC_INACTIVE_TIME; + wid.type = WID_STR; + wid.size = ETH_ALEN; + wid.val = kzalloc(wid.size, GFP_KERNEL); + if (!wid.val) + return -ENOMEM; - memcpy(msg->body.mac_info.mac, mac, ETH_ALEN); + ether_addr_copy(wid.val, mac); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + kfree(wid.val); + if (result) { + netdev_err(vif->ndev, "Failed to set inactive mac\n"); + return result; + } - result = wilc_enqueue_work(msg); + wid.id = WID_GET_INACTIVE_TIME; + wid.type = WID_INT; + wid.val = (s8 *)out_val; + wid.size = sizeof(u32); + result = wilc_send_config_pkt(vif, WILC_GET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); if (result) - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - else - wait_for_completion(&msg->work_comp); - - *out_val = msg->body.mac_info.inactive_time; - kfree(msg); + netdev_err(vif->ndev, "Failed to get inactive time\n"); return result; } int wilc_get_rssi(struct wilc_vif *vif, s8 *rssi_level) { + struct wid wid; int result; - struct host_if_msg *msg; if (!rssi_level) { netdev_err(vif->ndev, "%s: RSSI level is NULL\n", __func__); return -EFAULT; } - msg = wilc_alloc_work(vif, handle_get_rssi, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - msg->body.data = kzalloc(sizeof(s8), GFP_KERNEL); - if (!msg->body.data) { - kfree(msg); - return -ENOMEM; - } - - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - } else { - wait_for_completion(&msg->work_comp); - *rssi_level = *msg->body.data; - } - - kfree(msg->body.data); - kfree(msg); + wid.id = WID_RSSI; + wid.type = WID_CHAR; + wid.size = sizeof(char); + wid.val = rssi_level; + result = wilc_send_config_pkt(vif, WILC_GET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result) + netdev_err(vif->ndev, "Failed to get RSSI value\n"); return result; } -int -wilc_get_statistics(struct wilc_vif *vif, struct rf_info *stats, bool is_sync) +static int wilc_get_stats_async(struct wilc_vif *vif, struct rf_info *stats) { int result; struct host_if_msg *msg; - msg = wilc_alloc_work(vif, handle_get_statistics, is_sync); + msg = wilc_alloc_work(vif, handle_get_statistics, false); if (IS_ERR(msg)) return PTR_ERR(msg); @@ -3220,104 +1563,46 @@ wilc_get_statistics(struct wilc_vif *vif, struct rf_info *stats, bool is_sync) return result; } - if (is_sync) { - wait_for_completion(&msg->work_comp); - kfree(msg); - } - return result; } -int wilc_scan(struct wilc_vif *vif, u8 scan_source, u8 scan_type, - u8 *ch_freq_list, u8 ch_list_len, const u8 *ies, - size_t ies_len, wilc_scan_result scan_result, void *user_arg, - struct hidden_network *hidden_network) +int wilc_hif_set_cfg(struct wilc_vif *vif, struct cfg_param_attr *param) { + struct wid wid_list[4]; + int i = 0; int result; - struct host_if_msg *msg; - struct scan_attr *scan_info; - struct host_if_drv *hif_drv = vif->hif_drv; - if (!hif_drv || !scan_result) { - netdev_err(vif->ndev, "hif_drv or scan_result = NULL\n"); - return -EFAULT; - } - - msg = wilc_alloc_work(vif, handle_scan, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - scan_info = &msg->body.scan_info; - - if (hidden_network) { - scan_info->hidden_network.net_info = hidden_network->net_info; - scan_info->hidden_network.n_ssids = hidden_network->n_ssids; - } - - scan_info->src = scan_source; - scan_info->type = scan_type; - scan_info->result = scan_result; - scan_info->arg = user_arg; - - scan_info->ch_list_len = ch_list_len; - scan_info->ch_freq_list = kmemdup(ch_freq_list, - ch_list_len, - GFP_KERNEL); - if (!scan_info->ch_freq_list) { - result = -ENOMEM; - goto free_msg; + if (param->flag & WILC_CFG_PARAM_RETRY_SHORT) { + wid_list[i].id = WID_SHORT_RETRY_LIMIT; + wid_list[i].val = (s8 *)¶m->short_retry_limit; + wid_list[i].type = WID_SHORT; + wid_list[i].size = sizeof(u16); + i++; } - - scan_info->ies_len = ies_len; - scan_info->ies = kmemdup(ies, ies_len, GFP_KERNEL); - if (!scan_info->ies) { - result = -ENOMEM; - goto free_freq_list; + if (param->flag & WILC_CFG_PARAM_RETRY_LONG) { + wid_list[i].id = WID_LONG_RETRY_LIMIT; + wid_list[i].val = (s8 *)¶m->long_retry_limit; + wid_list[i].type = WID_SHORT; + wid_list[i].size = sizeof(u16); + i++; } - - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - goto free_ies; + if (param->flag & WILC_CFG_PARAM_FRAG_THRESHOLD) { + wid_list[i].id = WID_FRAG_THRESHOLD; + wid_list[i].val = (s8 *)¶m->frag_threshold; + wid_list[i].type = WID_SHORT; + wid_list[i].size = sizeof(u16); + i++; } - - hif_drv->scan_timer_vif = vif; - mod_timer(&hif_drv->scan_timer, - jiffies + msecs_to_jiffies(HOST_IF_SCAN_TIMEOUT)); - - return 0; - -free_ies: - kfree(scan_info->ies); - -free_freq_list: - kfree(scan_info->ch_freq_list); - -free_msg: - kfree(msg); - return result; -} - -int wilc_hif_set_cfg(struct wilc_vif *vif, - struct cfg_param_attr *cfg_param) -{ - struct host_if_msg *msg; - struct host_if_drv *hif_drv = vif->hif_drv; - int result; - - if (!hif_drv) { - netdev_err(vif->ndev, "%s: hif driver is NULL", __func__); - return -EFAULT; + if (param->flag & WILC_CFG_PARAM_RTS_THRESHOLD) { + wid_list[i].id = WID_RTS_THRESHOLD; + wid_list[i].val = (s8 *)¶m->rts_threshold; + wid_list[i].type = WID_SHORT; + wid_list[i].size = sizeof(u16); + i++; } - msg = wilc_alloc_work(vif, handle_cfg_param, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - msg->body.cfg_info = *cfg_param; - result = wilc_enqueue_work(msg); - if (result) - kfree(msg); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, wid_list, + i, wilc_get_vif_idx(vif)); return result; } @@ -3332,7 +1617,7 @@ static void get_periodic_rssi(struct timer_list *t) } if (vif->hif_drv->hif_state == HOST_IF_CONNECTED) - wilc_get_statistics(vif, &vif->periodic_stat, false); + wilc_get_stats_async(vif, &vif->periodic_stat); mod_timer(&vif->periodic_rssi, jiffies + msecs_to_jiffies(5000)); } @@ -3359,7 +1644,7 @@ int wilc_init(struct net_device *dev, struct host_if_drv **hif_drv_handler) vif->obtaining_ip = false; if (wilc->clients_count == 0) - mutex_init(&hif_deinit_lock); + mutex_init(&wilc->deinit_lock); timer_setup(&vif->periodic_rssi, get_periodic_rssi, 0); mod_timer(&vif->periodic_rssi, jiffies + msecs_to_jiffies(5000)); @@ -3368,20 +1653,10 @@ int wilc_init(struct net_device *dev, struct host_if_drv **hif_drv_handler) timer_setup(&hif_drv->connect_timer, timer_connect_cb, 0); timer_setup(&hif_drv->remain_on_ch_timer, listen_timer_cb, 0); - mutex_init(&hif_drv->cfg_values_lock); - mutex_lock(&hif_drv->cfg_values_lock); - hif_drv->hif_state = HOST_IF_IDLE; - hif_drv->cfg_values.site_survey_enabled = SITE_SURVEY_OFF; - hif_drv->cfg_values.scan_source = DEFAULT_SCAN; - hif_drv->cfg_values.active_scan_time = ACTIVE_SCAN_TIME; - hif_drv->cfg_values.passive_scan_time = PASSIVE_SCAN_TIME; - hif_drv->cfg_values.curr_tx_rate = AUTORATE; hif_drv->p2p_timeout = 0; - mutex_unlock(&hif_drv->cfg_values_lock); - wilc->clients_count++; return 0; @@ -3397,31 +1672,27 @@ int wilc_deinit(struct wilc_vif *vif) return -EFAULT; } - mutex_lock(&hif_deinit_lock); - - terminated_handle = hif_drv; + mutex_lock(&vif->wilc->deinit_lock); del_timer_sync(&hif_drv->scan_timer); del_timer_sync(&hif_drv->connect_timer); del_timer_sync(&vif->periodic_rssi); del_timer_sync(&hif_drv->remain_on_ch_timer); - wilc_set_wfi_drv_handler(vif, 0, 0, 0, true); + wilc_set_wfi_drv_handler(vif, 0, 0, 0); if (hif_drv->usr_scan_req.scan_result) { hif_drv->usr_scan_req.scan_result(SCAN_EVENT_ABORTED, NULL, - hif_drv->usr_scan_req.arg, - NULL); + hif_drv->usr_scan_req.arg); hif_drv->usr_scan_req.scan_result = NULL; } hif_drv->hif_state = HOST_IF_IDLE; kfree(hif_drv); - + vif->hif_drv = NULL; vif->wilc->clients_count--; - terminated_handle = NULL; - mutex_unlock(&hif_deinit_lock); + mutex_unlock(&vif->wilc->deinit_lock); return result; } @@ -3433,16 +1704,13 @@ void wilc_network_info_received(struct wilc *wilc, u8 *buffer, u32 length) struct host_if_drv *hif_drv; struct wilc_vif *vif; - id = buffer[length - 4]; - id |= (buffer[length - 3] << 8); - id |= (buffer[length - 2] << 16); - id |= (buffer[length - 1] << 24); + id = get_unaligned_le32(&buffer[length - 4]); vif = wilc_get_vif_from_idx(wilc, id); if (!vif) return; hif_drv = vif->hif_drv; - if (!hif_drv || hif_drv == terminated_handle) { + if (!hif_drv) { netdev_err(vif->ndev, "driver not init[%p]\n", hif_drv); return; } @@ -3451,9 +1719,12 @@ void wilc_network_info_received(struct wilc *wilc, u8 *buffer, u32 length) if (IS_ERR(msg)) return; - msg->body.net_info.len = length; - msg->body.net_info.buffer = kmemdup(buffer, length, GFP_KERNEL); - if (!msg->body.net_info.buffer) { + msg->body.net_info.frame_len = get_unaligned_le16(&buffer[6]) - 1; + msg->body.net_info.rssi = buffer[8]; + msg->body.net_info.mgmt = kmemdup(&buffer[9], + msg->body.net_info.frame_len, + GFP_KERNEL); + if (!msg->body.net_info.mgmt) { kfree(msg); return; } @@ -3461,7 +1732,7 @@ void wilc_network_info_received(struct wilc *wilc, u8 *buffer, u32 length) result = wilc_enqueue_work(msg); if (result) { netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg->body.net_info.buffer); + kfree(msg->body.net_info.mgmt); kfree(msg); } } @@ -3474,53 +1745,42 @@ void wilc_gnrl_async_info_received(struct wilc *wilc, u8 *buffer, u32 length) struct host_if_drv *hif_drv; struct wilc_vif *vif; - mutex_lock(&hif_deinit_lock); + mutex_lock(&wilc->deinit_lock); - id = buffer[length - 4]; - id |= (buffer[length - 3] << 8); - id |= (buffer[length - 2] << 16); - id |= (buffer[length - 1] << 24); + id = get_unaligned_le32(&buffer[length - 4]); vif = wilc_get_vif_from_idx(wilc, id); if (!vif) { - mutex_unlock(&hif_deinit_lock); + mutex_unlock(&wilc->deinit_lock); return; } hif_drv = vif->hif_drv; - if (!hif_drv || hif_drv == terminated_handle) { - mutex_unlock(&hif_deinit_lock); + if (!hif_drv) { + mutex_unlock(&wilc->deinit_lock); return; } - if (!hif_drv->usr_conn_req.conn_result) { + if (!hif_drv->conn_info.conn_result) { netdev_err(vif->ndev, "%s: conn_result is NULL\n", __func__); - mutex_unlock(&hif_deinit_lock); + mutex_unlock(&wilc->deinit_lock); return; } msg = wilc_alloc_work(vif, handle_rcvd_gnrl_async_info, false); if (IS_ERR(msg)) { - mutex_unlock(&hif_deinit_lock); - return; - } - - msg->body.async_info.len = length; - msg->body.async_info.buffer = kmemdup(buffer, length, GFP_KERNEL); - if (!msg->body.async_info.buffer) { - kfree(msg); - mutex_unlock(&hif_deinit_lock); + mutex_unlock(&wilc->deinit_lock); return; } + msg->body.mac_info.status = buffer[7]; result = wilc_enqueue_work(msg); if (result) { netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg->body.async_info.buffer); kfree(msg); } - mutex_unlock(&hif_deinit_lock); + mutex_unlock(&wilc->deinit_lock); } void wilc_scan_complete_received(struct wilc *wilc, u8 *buffer, u32 length) @@ -3530,16 +1790,13 @@ void wilc_scan_complete_received(struct wilc *wilc, u8 *buffer, u32 length) struct host_if_drv *hif_drv; struct wilc_vif *vif; - id = buffer[length - 4]; - id |= buffer[length - 3] << 8; - id |= buffer[length - 2] << 16; - id |= buffer[length - 1] << 24; + id = get_unaligned_le32(&buffer[length - 4]); vif = wilc_get_vif_from_idx(wilc, id); if (!vif) return; hif_drv = vif->hif_drv; - if (!hif_drv || hif_drv == terminated_handle) + if (!hif_drv) return; if (hif_drv->usr_scan_req.scan_result) { @@ -3558,36 +1815,28 @@ void wilc_scan_complete_received(struct wilc *wilc, u8 *buffer, u32 length) } } -int wilc_remain_on_channel(struct wilc_vif *vif, u32 session_id, +int wilc_remain_on_channel(struct wilc_vif *vif, u64 cookie, u32 duration, u16 chan, - wilc_remain_on_chan_expired expired, - wilc_remain_on_chan_ready ready, + void (*expired)(void *, u64), void *user_arg) { + struct wilc_remain_ch roc; int result; - struct host_if_msg *msg; - - msg = wilc_alloc_work(vif, handle_remain_on_chan_work, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); - msg->body.remain_on_ch.ch = chan; - msg->body.remain_on_ch.expired = expired; - msg->body.remain_on_ch.ready = ready; - msg->body.remain_on_ch.arg = user_arg; - msg->body.remain_on_ch.duration = duration; - msg->body.remain_on_ch.id = session_id; - - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } + roc.ch = chan; + roc.expired = expired; + roc.arg = user_arg; + roc.duration = duration; + roc.cookie = cookie; + result = handle_remain_on_chan(vif, &roc); + if (result) + netdev_err(vif->ndev, "%s: failed to set remain on channel\n", + __func__); return result; } -int wilc_listen_state_expired(struct wilc_vif *vif, u32 session_id) +int wilc_listen_state_expired(struct wilc_vif *vif, u64 cookie) { int result; struct host_if_msg *msg; @@ -3604,7 +1853,7 @@ int wilc_listen_state_expired(struct wilc_vif *vif, u32 session_id) if (IS_ERR(msg)) return PTR_ERR(msg); - msg->body.remain_on_ch.id = session_id; + msg->body.remain_on_ch.cookie = cookie; result = wilc_enqueue_work(msg); if (result) { @@ -3617,77 +1866,75 @@ int wilc_listen_state_expired(struct wilc_vif *vif, u32 session_id) void wilc_frame_register(struct wilc_vif *vif, u16 frame_type, bool reg) { + struct wid wid; int result; - struct host_if_msg *msg; + struct wilc_reg_frame reg_frame; - msg = wilc_alloc_work(vif, handle_register_frame, false); - if (IS_ERR(msg)) - return; + wid.id = WID_REGISTER_FRAME; + wid.type = WID_STR; + wid.size = sizeof(reg_frame); + wid.val = (u8 *)®_frame; + + memset(®_frame, 0x0, sizeof(reg_frame)); + reg_frame.reg = reg; switch (frame_type) { - case ACTION: - msg->body.reg_frame.reg_id = ACTION_FRM_IDX; + case IEEE80211_STYPE_ACTION: + reg_frame.reg_id = WILC_FW_ACTION_FRM_IDX; break; - case PROBE_REQ: - msg->body.reg_frame.reg_id = PROBE_REQ_IDX; + case IEEE80211_STYPE_PROBE_REQ: + reg_frame.reg_id = WILC_FW_PROBE_REQ_IDX; break; default: break; } - msg->body.reg_frame.frame_type = frame_type; - msg->body.reg_frame.reg = reg; - - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } + reg_frame.frame_type = cpu_to_le16(frame_type); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result) + netdev_err(vif->ndev, "Failed to frame register\n"); } int wilc_add_beacon(struct wilc_vif *vif, u32 interval, u32 dtim_period, - u32 head_len, u8 *head, u32 tail_len, u8 *tail) + struct cfg80211_beacon_data *params) { + struct wid wid; int result; - struct host_if_msg *msg; - struct beacon_attr *beacon_info; + u8 *cur_byte; - msg = wilc_alloc_work(vif, handle_add_beacon, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); + wid.id = WID_ADD_BEACON; + wid.type = WID_BIN; + wid.size = params->head_len + params->tail_len + 16; + wid.val = kzalloc(wid.size, GFP_KERNEL); + if (!wid.val) + return -ENOMEM; - beacon_info = &msg->body.beacon_info; - beacon_info->interval = interval; - beacon_info->dtim_period = dtim_period; - beacon_info->head_len = head_len; - beacon_info->head = kmemdup(head, head_len, GFP_KERNEL); - if (!beacon_info->head) { - result = -ENOMEM; - goto error; - } - beacon_info->tail_len = tail_len; + cur_byte = wid.val; + put_unaligned_le32(interval, cur_byte); + cur_byte += 4; + put_unaligned_le32(dtim_period, cur_byte); + cur_byte += 4; + put_unaligned_le32(params->head_len, cur_byte); + cur_byte += 4; - if (tail_len > 0) { - beacon_info->tail = kmemdup(tail, tail_len, GFP_KERNEL); - if (!beacon_info->tail) { - result = -ENOMEM; - goto error; - } - } else { - beacon_info->tail = NULL; - } + if (params->head_len > 0) + memcpy(cur_byte, params->head, params->head_len); + cur_byte += params->head_len; - result = wilc_enqueue_work(msg); + put_unaligned_le32(params->tail_len, cur_byte); + cur_byte += 4; + + if (params->tail_len > 0) + memcpy(cur_byte, params->tail, params->tail_len); + + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); if (result) - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); + netdev_err(vif->ndev, "Failed to send add beacon\n"); -error: - if (result) { - kfree(beacon_info->head); - kfree(beacon_info->tail); - kfree(msg); - } + kfree(wid.val); return result; } @@ -3695,174 +1942,162 @@ error: int wilc_del_beacon(struct wilc_vif *vif) { int result; - struct host_if_msg *msg; + struct wid wid; + u8 del_beacon = 0; - msg = wilc_alloc_work(vif, handle_del_beacon, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); + wid.id = WID_DEL_BEACON; + wid.type = WID_CHAR; + wid.size = sizeof(char); + wid.val = &del_beacon; - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result) + netdev_err(vif->ndev, "Failed to send delete beacon\n"); return result; } -int wilc_add_station(struct wilc_vif *vif, struct add_sta_param *sta_param) +int wilc_add_station(struct wilc_vif *vif, const u8 *mac, + struct station_parameters *params) { + struct wid wid; int result; - struct host_if_msg *msg; - struct add_sta_param *add_sta_info; + u8 *cur_byte; - msg = wilc_alloc_work(vif, handle_add_station, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); + wid.id = WID_ADD_STA; + wid.type = WID_BIN; + wid.size = WILC_ADD_STA_LENGTH + params->supported_rates_len; + wid.val = kmalloc(wid.size, GFP_KERNEL); + if (!wid.val) + return -ENOMEM; - add_sta_info = &msg->body.add_sta_info; - memcpy(add_sta_info, sta_param, sizeof(struct add_sta_param)); - if (add_sta_info->rates_len > 0) { - add_sta_info->rates = kmemdup(sta_param->rates, - add_sta_info->rates_len, - GFP_KERNEL); - if (!add_sta_info->rates) { - kfree(msg); - return -ENOMEM; - } - } + cur_byte = wid.val; + wilc_hif_pack_sta_param(cur_byte, mac, params); + + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result != 0) + netdev_err(vif->ndev, "Failed to send add station\n"); + + kfree(wid.val); - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(add_sta_info->rates); - kfree(msg); - } return result; } int wilc_del_station(struct wilc_vif *vif, const u8 *mac_addr) { + struct wid wid; int result; - struct host_if_msg *msg; - struct del_sta *del_sta_info; - msg = wilc_alloc_work(vif, handle_del_station, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - del_sta_info = &msg->body.del_sta_info; + wid.id = WID_REMOVE_STA; + wid.type = WID_BIN; + wid.size = ETH_ALEN; + wid.val = kzalloc(wid.size, GFP_KERNEL); + if (!wid.val) + return -ENOMEM; if (!mac_addr) - eth_broadcast_addr(del_sta_info->mac_addr); + eth_broadcast_addr(wid.val); else - memcpy(del_sta_info->mac_addr, mac_addr, ETH_ALEN); + ether_addr_copy(wid.val, mac_addr); + + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result) + netdev_err(vif->ndev, "Failed to del station\n"); + + kfree(wid.val); - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } return result; } int wilc_del_allstation(struct wilc_vif *vif, u8 mac_addr[][ETH_ALEN]) { + struct wid wid; int result; - struct host_if_msg *msg; - struct del_all_sta *del_all_sta_info; - u8 zero_addr[ETH_ALEN] = {0}; int i; u8 assoc_sta = 0; + struct wilc_del_all_sta del_sta; - msg = wilc_alloc_work(vif, handle_del_all_sta, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - del_all_sta_info = &msg->body.del_all_sta_info; - - for (i = 0; i < MAX_NUM_STA; i++) { - if (memcmp(mac_addr[i], zero_addr, ETH_ALEN)) { - memcpy(del_all_sta_info->del_all_sta[i], mac_addr[i], - ETH_ALEN); + memset(&del_sta, 0x0, sizeof(del_sta)); + for (i = 0; i < WILC_MAX_NUM_STA; i++) { + if (!is_zero_ether_addr(mac_addr[i])) { assoc_sta++; + ether_addr_copy(del_sta.mac[i], mac_addr[i]); } } - if (!assoc_sta) { - kfree(msg); + + if (!assoc_sta) return 0; - } - del_all_sta_info->assoc_sta = assoc_sta; - result = wilc_enqueue_work(msg); + del_sta.assoc_sta = assoc_sta; - if (result) - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - else - wait_for_completion(&msg->work_comp); + wid.id = WID_DEL_ALL_STA; + wid.type = WID_STR; + wid.size = (assoc_sta * ETH_ALEN) + 1; + wid.val = (u8 *)&del_sta; - kfree(msg); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result) + netdev_err(vif->ndev, "Failed to send delete all station\n"); return result; } -int wilc_edit_station(struct wilc_vif *vif, - struct add_sta_param *sta_param) +int wilc_edit_station(struct wilc_vif *vif, const u8 *mac, + struct station_parameters *params) { + struct wid wid; int result; - struct host_if_msg *msg; - struct add_sta_param *add_sta_info; + u8 *cur_byte; - msg = wilc_alloc_work(vif, handle_edit_station, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); + wid.id = WID_EDIT_STA; + wid.type = WID_BIN; + wid.size = WILC_ADD_STA_LENGTH + params->supported_rates_len; + wid.val = kmalloc(wid.size, GFP_KERNEL); + if (!wid.val) + return -ENOMEM; - add_sta_info = &msg->body.add_sta_info; - memcpy(add_sta_info, sta_param, sizeof(*add_sta_info)); - if (add_sta_info->rates_len > 0) { - add_sta_info->rates = kmemdup(sta_param->rates, - add_sta_info->rates_len, - GFP_KERNEL); - if (!add_sta_info->rates) { - kfree(msg); - return -ENOMEM; - } - } + cur_byte = wid.val; + wilc_hif_pack_sta_param(cur_byte, mac, params); - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(add_sta_info->rates); - kfree(msg); - } + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result) + netdev_err(vif->ndev, "Failed to send edit station\n"); + kfree(wid.val); return result; } int wilc_set_power_mgmt(struct wilc_vif *vif, bool enabled, u32 timeout) { + struct wid wid; int result; - struct host_if_msg *msg; + s8 power_mode; if (wilc_wlan_get_num_conn_ifcs(vif->wilc) == 2 && enabled) return 0; - msg = wilc_alloc_work(vif, handle_power_management, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); + if (enabled) + power_mode = WILC_FW_MIN_FAST_PS; + else + power_mode = WILC_FW_NO_POWERSAVE; - msg->body.pwr_mgmt_info.enabled = enabled; - msg->body.pwr_mgmt_info.timeout = timeout; + wid.id = WID_POWER_MANAGEMENT; + wid.val = &power_mode; + wid.size = sizeof(char); + result = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); + if (result) + netdev_err(vif->ndev, "Failed to send power management\n"); - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } return result; } -int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, u32 count, +int wilc_setup_multicast_filter(struct wilc_vif *vif, u32 enabled, u32 count, u8 *mc_list) { int result; @@ -3872,9 +2107,9 @@ int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, u32 count, if (IS_ERR(msg)) return PTR_ERR(msg); - msg->body.multicast_info.enabled = enabled; - msg->body.multicast_info.cnt = count; - msg->body.multicast_info.mc_list = mc_list; + msg->body.mc_info.enabled = enabled; + msg->body.mc_info.cnt = count; + msg->body.mc_info.mc_list = mc_list; result = wilc_enqueue_work(msg); if (result) { @@ -3887,19 +2122,15 @@ int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, u32 count, int wilc_set_tx_power(struct wilc_vif *vif, u8 tx_power) { int ret; - struct host_if_msg *msg; - - msg = wilc_alloc_work(vif, handle_set_tx_pwr, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); + struct wid wid; - msg->body.tx_power.tx_pwr = tx_power; + wid.id = WID_TX_POWER; + wid.type = WID_CHAR; + wid.val = &tx_power; + wid.size = sizeof(char); - ret = wilc_enqueue_work(msg); - if (ret) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } + ret = wilc_send_config_pkt(vif, WILC_SET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); return ret; } @@ -3907,21 +2138,15 @@ int wilc_set_tx_power(struct wilc_vif *vif, u8 tx_power) int wilc_get_tx_power(struct wilc_vif *vif, u8 *tx_power) { int ret; - struct host_if_msg *msg; + struct wid wid; - msg = wilc_alloc_work(vif, handle_get_tx_pwr, true); - if (IS_ERR(msg)) - return PTR_ERR(msg); + wid.id = WID_TX_POWER; + wid.type = WID_CHAR; + wid.val = tx_power; + wid.size = sizeof(char); - ret = wilc_enqueue_work(msg); - if (ret) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - } else { - wait_for_completion(&msg->work_comp); - *tx_power = msg->body.tx_power.tx_pwr; - } + ret = wilc_send_config_pkt(vif, WILC_GET_CFG, &wid, 1, + wilc_get_vif_idx(vif)); - /* free 'msg' after copying data */ - kfree(msg); return ret; } diff --git a/drivers/staging/wilc1000/host_interface.h b/drivers/staging/wilc1000/host_interface.h index 33fb7318734b..678e62312215 100644 --- a/drivers/staging/wilc1000/host_interface.h +++ b/drivers/staging/wilc1000/host_interface.h @@ -7,54 +7,39 @@ #ifndef HOST_INT_H #define HOST_INT_H #include <linux/ieee80211.h> -#include "coreconfigurator.h" - -#define IDLE_MODE 0x00 -#define AP_MODE 0x01 -#define STATION_MODE 0x02 -#define GO_MODE 0x03 -#define CLIENT_MODE 0x04 -#define ACTION 0xD0 -#define PROBE_REQ 0x40 -#define PROBE_RESP 0x50 - -#define ACTION_FRM_IDX 0 -#define PROBE_REQ_IDX 1 -#define MAX_NUM_STA 9 -#define ACTIVE_SCAN_TIME 10 -#define PASSIVE_SCAN_TIME 1200 -#define MIN_SCAN_TIME 10 -#define MAX_SCAN_TIME 1200 -#define DEFAULT_SCAN 0 -#define USER_SCAN BIT(0) -#define OBSS_PERIODIC_SCAN BIT(1) -#define OBSS_ONETIME_SCAN BIT(2) -#define GTK_RX_KEY_BUFF_LEN 24 -#define ADDKEY 0x1 -#define REMOVEKEY 0x2 -#define DEFAULTKEY 0x4 -#define ADDKEY_AP 0x8 -#define MAX_NUM_SCANNED_NETWORKS 100 -#define MAX_NUM_SCANNED_NETWORKS_SHADOW 130 -#define MAX_NUM_PROBED_SSID 10 -#define CHANNEL_SCAN_TIME 250 - -#define TX_MIC_KEY_LEN 8 -#define RX_MIC_KEY_LEN 8 -#define PTK_KEY_LEN 16 - -#define TX_MIC_KEY_MSG_LEN 26 -#define RX_MIC_KEY_MSG_LEN 48 -#define PTK_KEY_MSG_LEN 39 - -#define PMKSA_KEY_LEN 22 -#define ETH_ALEN 6 -#define PMKID_LEN 16 +#include "wilc_wlan_if.h" + +enum { + WILC_IDLE_MODE = 0x0, + WILC_AP_MODE = 0x1, + WILC_STATION_MODE = 0x2, + WILC_GO_MODE = 0x3, + WILC_CLIENT_MODE = 0x4 +}; + +#define WILC_MAX_NUM_STA 9 +#define WILC_MAX_NUM_SCANNED_CH 14 +#define WILC_MAX_NUM_PROBED_SSID 10 + +#define WILC_TX_MIC_KEY_LEN 8 +#define WILC_RX_MIC_KEY_LEN 8 + #define WILC_MAX_NUM_PMKIDS 16 #define WILC_ADD_STA_LENGTH 40 -#define NUM_CONCURRENT_IFC 2 -#define DRV_HANDLER_SIZE 5 -#define DRV_HANDLER_MASK 0x000000FF +#define WILC_NUM_CONCURRENT_IFC 2 + +enum { + WILC_SET_CFG = 0, + WILC_GET_CFG +}; + +#define WILC_MAX_ASSOC_RESP_FRAME_SIZE 256 + +struct assoc_resp { + __le16 capab_info; + __le16 status_code; + __le16 aid; +} __packed; struct rf_info { u8 link_speed; @@ -74,82 +59,29 @@ enum host_if_state { HOST_IF_FORCE_32BIT = 0xFFFFFFFF }; -struct host_if_pmkid { +struct wilc_pmkid { u8 bssid[ETH_ALEN]; - u8 pmkid[PMKID_LEN]; -}; + u8 pmkid[WLAN_PMKID_LEN]; +} __packed; -struct host_if_pmkid_attr { +struct wilc_pmkid_attr { u8 numpmkid; - struct host_if_pmkid pmkidlist[WILC_MAX_NUM_PMKIDS]; -}; - -enum current_tx_rate { - AUTORATE = 0, - MBPS_1 = 1, - MBPS_2 = 2, - MBPS_5_5 = 5, - MBPS_11 = 11, - MBPS_6 = 6, - MBPS_9 = 9, - MBPS_12 = 12, - MBPS_18 = 18, - MBPS_24 = 24, - MBPS_36 = 36, - MBPS_48 = 48, - MBPS_54 = 54 -}; + struct wilc_pmkid pmkidlist[WILC_MAX_NUM_PMKIDS]; +} __packed; struct cfg_param_attr { u32 flag; - u8 ht_enable; - u8 bss_type; - u8 auth_type; - u16 auth_timeout; - u8 power_mgmt_mode; u16 short_retry_limit; u16 long_retry_limit; u16 frag_threshold; u16 rts_threshold; - u16 preamble_type; - u8 short_slot_allowed; - u8 txop_prot_disabled; - u16 beacon_interval; - u16 dtim_period; - enum site_survey site_survey_enabled; - u16 site_survey_scan_time; - u8 scan_source; - u16 active_scan_time; - u16 passive_scan_time; - enum current_tx_rate curr_tx_rate; - }; enum cfg_param { - RETRY_SHORT = BIT(0), - RETRY_LONG = BIT(1), - FRAG_THRESHOLD = BIT(2), - RTS_THRESHOLD = BIT(3), - BSS_TYPE = BIT(4), - AUTH_TYPE = BIT(5), - AUTHEN_TIMEOUT = BIT(6), - POWER_MANAGEMENT = BIT(7), - PREAMBLE = BIT(8), - SHORT_SLOT_ALLOWED = BIT(9), - TXOP_PROT_DISABLE = BIT(10), - BEACON_INTERVAL = BIT(11), - DTIM_PERIOD = BIT(12), - SITE_SURVEY = BIT(13), - SITE_SURVEY_SCAN_TIME = BIT(14), - ACTIVE_SCANTIME = BIT(15), - PASSIVE_SCANTIME = BIT(16), - CURRENT_TX_RATE = BIT(17), - HT_ENABLE = BIT(18), -}; - -struct found_net_info { - u8 bssid[6]; - s8 rssi; + WILC_CFG_PARAM_RETRY_SHORT = BIT(0), + WILC_CFG_PARAM_RETRY_LONG = BIT(1), + WILC_CFG_PARAM_FRAG_THRESHOLD = BIT(2), + WILC_CFG_PARAM_RTS_THRESHOLD = BIT(3) }; enum scan_event { @@ -165,111 +97,75 @@ enum conn_event { CONN_DISCONN_EVENT_FORCE_32BIT = 0xFFFFFFFF }; -enum KEY_TYPE { - WEP, - WPA_RX_GTK, - WPA_PTK, - PMKSA, +enum { + WILC_HIF_SDIO = 0, + WILC_HIF_SPI = BIT(0) }; -typedef void (*wilc_scan_result)(enum scan_event, struct network_info *, - void *, void *); - -typedef void (*wilc_connect_result)(enum conn_event, - struct connect_info *, - u8, - struct disconnect_info *, - void *); - -typedef void (*wilc_remain_on_chan_expired)(void *, u32); -typedef void (*wilc_remain_on_chan_ready)(void *); +enum { + WILC_MAC_STATUS_INIT = -1, + WILC_MAC_STATUS_DISCONNECTED = 0, + WILC_MAC_STATUS_CONNECTED = 1 +}; -struct rcvd_net_info { - u8 *buffer; - u32 len; +struct wilc_rcvd_net_info { + s8 rssi; + u8 ch; + u16 frame_len; + struct ieee80211_mgmt *mgmt; }; -struct hidden_net_info { - u8 *ssid; +struct wilc_probe_ssid_info { u8 ssid_len; + u8 *ssid; }; -struct hidden_network { - struct hidden_net_info *net_info; +struct wilc_probe_ssid { + struct wilc_probe_ssid_info *ssid_info; u8 n_ssids; + u32 size; }; -struct user_scan_req { - wilc_scan_result scan_result; +struct wilc_user_scan_req { + void (*scan_result)(enum scan_event evt, + struct wilc_rcvd_net_info *info, void *priv); void *arg; u32 ch_cnt; - struct found_net_info net_info[MAX_NUM_SCANNED_NETWORKS]; }; -struct user_conn_req { - u8 *bssid; - u8 *ssid; +struct wilc_conn_info { + u8 bssid[ETH_ALEN]; u8 security; enum authtype auth_type; - size_t ssid_len; - u8 *ies; - size_t ies_len; - wilc_connect_result conn_result; - bool ht_capable; + u8 ch; + u8 *req_ies; + size_t req_ies_len; + u8 *resp_ies; + u16 resp_ies_len; + u16 status; + void (*conn_result)(enum conn_event evt, u8 status, void *priv_data); void *arg; + void *param; }; -struct drv_handler { - u32 handler; - u8 mode; - u8 name; -}; - -struct op_mode { - u32 mode; -}; - -struct get_mac_addr { - u8 *mac_addr; -}; - -struct ba_session_info { - u8 bssid[ETH_ALEN]; - u8 tid; - u16 buf_size; - u16 time_out; -}; - -struct remain_ch { +struct wilc_remain_ch { u16 ch; u32 duration; - wilc_remain_on_chan_expired expired; - wilc_remain_on_chan_ready ready; + void (*expired)(void *priv, u64 cookie); void *arg; - u32 id; -}; - -struct reg_frame { - bool reg; - u16 frame_type; - u8 reg_id; + u32 cookie; }; struct wilc; struct host_if_drv { - struct user_scan_req usr_scan_req; - struct user_conn_req usr_conn_req; - struct remain_ch remain_on_ch; - u8 remain_on_ch_pending; + struct wilc_user_scan_req usr_scan_req; + struct wilc_conn_info conn_info; + struct wilc_remain_ch remain_on_ch; u64 p2p_timeout; - u8 p2p_connect; enum host_if_state hif_state; u8 assoc_bssid[ETH_ALEN]; - struct cfg_param_attr cfg_values; - /*lock to protect concurrent setting of cfg params*/ - struct mutex cfg_values_lock; struct timer_list scan_timer; struct wilc_vif *scan_timer_vif; @@ -282,18 +178,7 @@ struct host_if_drv { bool ifc_up; int driver_handler_id; - u8 assoc_resp[MAX_ASSOC_RESP_FRAME_SIZE]; -}; - -struct add_sta_param { - u8 bssid[ETH_ALEN]; - u16 aid; - u8 rates_len; - const u8 *rates; - bool ht_supported; - struct ieee80211_ht_cap ht_capa; - u16 flags_mask; - u16 flags_set; + u8 assoc_resp[WILC_MAX_ASSOC_RESP_FRAME_SIZE]; }; struct wilc_vif; @@ -312,51 +197,51 @@ int wilc_add_rx_gtk(struct wilc_vif *vif, const u8 *rx_gtk, u8 gtk_key_len, u8 index, u32 key_rsc_len, const u8 *key_rsc, const u8 *rx_mic, const u8 *tx_mic, u8 mode, u8 cipher_mode); -int wilc_set_pmkid_info(struct wilc_vif *vif, - struct host_if_pmkid_attr *pmkid); +int wilc_set_pmkid_info(struct wilc_vif *vif, struct wilc_pmkid_attr *pmkid); int wilc_get_mac_address(struct wilc_vif *vif, u8 *mac_addr); -int wilc_set_join_req(struct wilc_vif *vif, u8 *bssid, const u8 *ssid, - size_t ssid_len, const u8 *ies, size_t ies_len, - wilc_connect_result connect_result, void *user_arg, - u8 security, enum authtype auth_type, - u8 channel, void *join_params); -int wilc_disconnect(struct wilc_vif *vif, u16 reason_code); +int wilc_set_join_req(struct wilc_vif *vif, u8 *bssid, const u8 *ies, + size_t ies_len); +int wilc_disconnect(struct wilc_vif *vif); int wilc_set_mac_chnl_num(struct wilc_vif *vif, u8 channel); int wilc_get_rssi(struct wilc_vif *vif, s8 *rssi_level); int wilc_scan(struct wilc_vif *vif, u8 scan_source, u8 scan_type, - u8 *ch_freq_list, u8 ch_list_len, const u8 *ies, - size_t ies_len, wilc_scan_result scan_result, void *user_arg, - struct hidden_network *hidden_network); + u8 *ch_freq_list, u8 ch_list_len, const u8 *ies, size_t ies_len, + void (*scan_result_fn)(enum scan_event, + struct wilc_rcvd_net_info *, void *), + void *user_arg, struct wilc_probe_ssid *search); int wilc_hif_set_cfg(struct wilc_vif *vif, struct cfg_param_attr *cfg_param); int wilc_init(struct net_device *dev, struct host_if_drv **hif_drv_handler); int wilc_deinit(struct wilc_vif *vif); int wilc_add_beacon(struct wilc_vif *vif, u32 interval, u32 dtim_period, - u32 head_len, u8 *head, u32 tail_len, u8 *tail); + struct cfg80211_beacon_data *params); int wilc_del_beacon(struct wilc_vif *vif); -int wilc_add_station(struct wilc_vif *vif, struct add_sta_param *sta_param); +int wilc_add_station(struct wilc_vif *vif, const u8 *mac, + struct station_parameters *params); int wilc_del_allstation(struct wilc_vif *vif, u8 mac_addr[][ETH_ALEN]); int wilc_del_station(struct wilc_vif *vif, const u8 *mac_addr); -int wilc_edit_station(struct wilc_vif *vif, - struct add_sta_param *sta_param); +int wilc_edit_station(struct wilc_vif *vif, const u8 *mac, + struct station_parameters *params); int wilc_set_power_mgmt(struct wilc_vif *vif, bool enabled, u32 timeout); -int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, u32 count, +int wilc_setup_multicast_filter(struct wilc_vif *vif, u32 enabled, u32 count, u8 *mc_list); -int wilc_remain_on_channel(struct wilc_vif *vif, u32 session_id, +int wilc_remain_on_channel(struct wilc_vif *vif, u64 cookie, u32 duration, u16 chan, - wilc_remain_on_chan_expired expired, - wilc_remain_on_chan_ready ready, + void (*expired)(void *, u64), void *user_arg); -int wilc_listen_state_expired(struct wilc_vif *vif, u32 session_id); +int wilc_listen_state_expired(struct wilc_vif *vif, u64 cookie); void wilc_frame_register(struct wilc_vif *vif, u16 frame_type, bool reg); int wilc_set_wfi_drv_handler(struct wilc_vif *vif, int index, u8 mode, - u8 ifc_id, bool is_sync); + u8 ifc_id); int wilc_set_operation_mode(struct wilc_vif *vif, u32 mode); -int wilc_get_statistics(struct wilc_vif *vif, struct rf_info *stats, - bool is_sync); +int wilc_get_statistics(struct wilc_vif *vif, struct rf_info *stats); void wilc_resolve_disconnect_aberration(struct wilc_vif *vif); int wilc_get_vif_idx(struct wilc_vif *vif); int wilc_set_tx_power(struct wilc_vif *vif, u8 tx_power); int wilc_get_tx_power(struct wilc_vif *vif, u8 *tx_power); - +void wilc_scan_complete_received(struct wilc *wilc, u8 *buffer, u32 length); +void wilc_network_info_received(struct wilc *wilc, u8 *buffer, u32 length); +void wilc_gnrl_async_info_received(struct wilc *wilc, u8 *buffer, u32 length); +void *wilc_parse_join_bss_param(struct cfg80211_bss *bss, + struct cfg80211_crypto_settings *crypto); #endif diff --git a/drivers/staging/wilc1000/linux_mon.c b/drivers/staging/wilc1000/wilc_mon.c index a63446818eac..9fe19a3e1dd4 100644 --- a/drivers/staging/wilc1000/linux_mon.c +++ b/drivers/staging/wilc1000/wilc_mon.c @@ -18,28 +18,20 @@ struct wilc_wfi_radiotap_cb_hdr { u16 tx_flags; } __packed; -static struct net_device *wilc_wfi_mon; /* global monitor netdev */ - -static u8 srcadd[6]; -static u8 bssid[6]; - -#define IEEE80211_RADIOTAP_F_TX_RTS 0x0004 /* used rts/cts handshake */ -#define IEEE80211_RADIOTAP_F_TX_FAIL 0x0001 /* failed due to excessive*/ - #define TX_RADIOTAP_PRESENT ((1 << IEEE80211_RADIOTAP_RATE) | \ (1 << IEEE80211_RADIOTAP_TX_FLAGS)) -void wilc_wfi_monitor_rx(u8 *buff, u32 size) +void wilc_wfi_monitor_rx(struct net_device *mon_dev, u8 *buff, u32 size) { u32 header, pkt_offset; struct sk_buff *skb = NULL; struct wilc_wfi_radiotap_hdr *hdr; struct wilc_wfi_radiotap_cb_hdr *cb_hdr; - if (!wilc_wfi_mon) + if (!mon_dev) return; - if (!netif_running(wilc_wfi_mon)) + if (!netif_running(mon_dev)) return; /* Get WILC header */ @@ -94,7 +86,7 @@ void wilc_wfi_monitor_rx(u8 *buff, u32 size) hdr->rate = 5; } - skb->dev = wilc_wfi_mon; + skb->dev = mon_dev; skb_reset_mac_header(skb); skb->ip_summed = CHECKSUM_UNNECESSARY; skb->pkt_type = PACKET_OTHERHOST; @@ -155,13 +147,13 @@ static netdev_tx_t wilc_wfi_mon_xmit(struct sk_buff *skb, struct wilc_wfi_mon_priv *mon_priv; struct sk_buff *skb2; struct wilc_wfi_radiotap_cb_hdr *cb_hdr; + u8 srcadd[ETH_ALEN]; + u8 bssid[ETH_ALEN]; - if (!wilc_wfi_mon) - return -EFAULT; - - mon_priv = netdev_priv(wilc_wfi_mon); + mon_priv = netdev_priv(dev); if (!mon_priv) return -EFAULT; + rtap_len = ieee80211_get_radiotap_len(skb->data); if (skb->len < rtap_len) return -1; @@ -187,7 +179,7 @@ static netdev_tx_t wilc_wfi_mon_xmit(struct sk_buff *skb, cb_hdr->rate = 5; cb_hdr->tx_flags = 0x0004; - skb2->dev = wilc_wfi_mon; + skb2->dev = dev; skb_reset_mac_header(skb2); skb2->ip_summed = CHECKSUM_UNNECESSARY; skb2->pkt_type = PACKET_OTHERHOST; @@ -200,8 +192,8 @@ static netdev_tx_t wilc_wfi_mon_xmit(struct sk_buff *skb, } skb->dev = mon_priv->real_ndev; - memcpy(srcadd, &skb->data[10], 6); - memcpy(bssid, &skb->data[16], 6); + ether_addr_copy(srcadd, &skb->data[10]); + ether_addr_copy(bssid, &skb->data[16]); /* * Identify if data or mgmt packet, if source address and bssid * fields are equal send it to mgmt frames handler @@ -223,51 +215,44 @@ static const struct net_device_ops wilc_wfi_netdev_ops = { }; -struct net_device *wilc_wfi_init_mon_interface(const char *name, +struct net_device *wilc_wfi_init_mon_interface(struct wilc *wl, + const char *name, struct net_device *real_dev) { struct wilc_wfi_mon_priv *priv; /*If monitor interface is already initialized, return it*/ - if (wilc_wfi_mon) - return wilc_wfi_mon; + if (wl->monitor_dev) + return wl->monitor_dev; - wilc_wfi_mon = alloc_etherdev(sizeof(struct wilc_wfi_mon_priv)); - if (!wilc_wfi_mon) + wl->monitor_dev = alloc_etherdev(sizeof(struct wilc_wfi_mon_priv)); + if (!wl->monitor_dev) return NULL; - wilc_wfi_mon->type = ARPHRD_IEEE80211_RADIOTAP; - strncpy(wilc_wfi_mon->name, name, IFNAMSIZ); - wilc_wfi_mon->name[IFNAMSIZ - 1] = 0; - wilc_wfi_mon->netdev_ops = &wilc_wfi_netdev_ops; - if (register_netdevice(wilc_wfi_mon)) { + wl->monitor_dev->type = ARPHRD_IEEE80211_RADIOTAP; + strncpy(wl->monitor_dev->name, name, IFNAMSIZ); + wl->monitor_dev->name[IFNAMSIZ - 1] = 0; + wl->monitor_dev->netdev_ops = &wilc_wfi_netdev_ops; + + if (register_netdevice(wl->monitor_dev)) { netdev_err(real_dev, "register_netdevice failed\n"); return NULL; } - priv = netdev_priv(wilc_wfi_mon); + priv = netdev_priv(wl->monitor_dev); if (!priv) return NULL; priv->real_ndev = real_dev; - return wilc_wfi_mon; + return wl->monitor_dev; } -void wilc_wfi_deinit_mon_interface(void) +void wilc_wfi_deinit_mon_interface(struct wilc *wl) { - bool rollback_lock = false; - - if (wilc_wfi_mon) { - if (rtnl_is_locked()) { - rtnl_unlock(); - rollback_lock = true; - } - unregister_netdev(wilc_wfi_mon); + if (!wl->monitor_dev) + return; - if (rollback_lock) { - rtnl_lock(); - rollback_lock = false; - } - wilc_wfi_mon = NULL; - } + unregister_netdev(wl->monitor_dev); + free_netdev(wl->monitor_dev); + wl->monitor_dev = NULL; } diff --git a/drivers/staging/wilc1000/linux_wlan.c b/drivers/staging/wilc1000/wilc_netdev.c index 76c901235e93..1787154ee088 100644 --- a/drivers/staging/wilc1000/linux_wlan.c +++ b/drivers/staging/wilc1000/wilc_netdev.c @@ -12,84 +12,7 @@ #include "wilc_wfi_cfgoperations.h" -static int dev_state_ev_handler(struct notifier_block *this, - unsigned long event, void *ptr) -{ - struct in_ifaddr *dev_iface = ptr; - struct wilc_priv *priv; - struct host_if_drv *hif_drv; - struct net_device *dev; - u8 *ip_addr_buf; - struct wilc_vif *vif; - u8 null_ip[4] = {0}; - char wlan_dev_name[5] = "wlan0"; - - if (!dev_iface || !dev_iface->ifa_dev || !dev_iface->ifa_dev->dev) - return NOTIFY_DONE; - - if (memcmp(dev_iface->ifa_label, "wlan0", 5) && - memcmp(dev_iface->ifa_label, "p2p0", 4)) - return NOTIFY_DONE; - - dev = (struct net_device *)dev_iface->ifa_dev->dev; - if (!dev->ieee80211_ptr || !dev->ieee80211_ptr->wiphy) - return NOTIFY_DONE; - - priv = wiphy_priv(dev->ieee80211_ptr->wiphy); - if (!priv) - return NOTIFY_DONE; - - hif_drv = (struct host_if_drv *)priv->hif_drv; - vif = netdev_priv(dev); - if (!vif || !hif_drv) - return NOTIFY_DONE; - - switch (event) { - case NETDEV_UP: - if (vif->iftype == STATION_MODE || vif->iftype == CLIENT_MODE) { - hif_drv->ifc_up = 1; - vif->obtaining_ip = false; - del_timer(&vif->during_ip_timer); - } - - if (vif->wilc->enable_ps) - wilc_set_power_mgmt(vif, 1, 0); - - netdev_dbg(dev, "[%s] Up IP\n", dev_iface->ifa_label); - - ip_addr_buf = (char *)&dev_iface->ifa_address; - netdev_dbg(dev, "IP add=%d:%d:%d:%d\n", - ip_addr_buf[0], ip_addr_buf[1], - ip_addr_buf[2], ip_addr_buf[3]); - - break; - - case NETDEV_DOWN: - if (vif->iftype == STATION_MODE || vif->iftype == CLIENT_MODE) { - hif_drv->ifc_up = 0; - vif->obtaining_ip = false; - } - - if (memcmp(dev_iface->ifa_label, wlan_dev_name, 5) == 0) - wilc_set_power_mgmt(vif, 0, 0); - - wilc_resolve_disconnect_aberration(vif); - - netdev_dbg(dev, "[%s] Down IP\n", dev_iface->ifa_label); - - ip_addr_buf = null_ip; - netdev_dbg(dev, "IP add=%d:%d:%d:%d\n", - ip_addr_buf[0], ip_addr_buf[1], - ip_addr_buf[2], ip_addr_buf[3]); - - break; - - default: - break; - } - - return NOTIFY_DONE; -} +#define WILC_MULTICAST_TABLE_SIZE 8 static irqreturn_t isr_uh_routine(int irq, void *user_data) { @@ -162,7 +85,7 @@ void wilc_mac_indicate(struct wilc *wilc) s8 status; wilc_wlan_cfg_get_val(wilc, WID_STATUS, &status, 1); - if (wilc->mac_status == MAC_STATUS_INIT) { + if (wilc->mac_status == WILC_MAC_STATUS_INIT) { wilc->mac_status = status; complete(&wilc->sync_event); } else { @@ -179,11 +102,11 @@ static struct net_device *get_if_handler(struct wilc *wilc, u8 *mac_header) bssid1 = mac_header + 4; for (i = 0; i < wilc->vif_num; i++) { - if (wilc->vif[i]->mode == STATION_MODE) + if (wilc->vif[i]->mode == WILC_STATION_MODE) if (ether_addr_equal_unaligned(bssid, wilc->vif[i]->bssid)) return wilc->vif[i]->ndev; - if (wilc->vif[i]->mode == AP_MODE) + if (wilc->vif[i]->mode == WILC_AP_MODE) if (ether_addr_equal_unaligned(bssid1, wilc->vif[i]->bssid)) return wilc->vif[i]->ndev; @@ -196,24 +119,27 @@ void wilc_wlan_set_bssid(struct net_device *wilc_netdev, u8 *bssid, u8 mode) { struct wilc_vif *vif = netdev_priv(wilc_netdev); - memcpy(vif->bssid, bssid, 6); + if (bssid) + ether_addr_copy(vif->bssid, bssid); + else + eth_zero_addr(vif->bssid); + vif->mode = mode; } int wilc_wlan_get_num_conn_ifcs(struct wilc *wilc) { u8 i = 0; - u8 null_bssid[6] = {0}; u8 ret_val = 0; for (i = 0; i < wilc->vif_num; i++) - if (memcmp(wilc->vif[i]->bssid, null_bssid, 6)) + if (!is_zero_ether_addr(wilc->vif[i]->bssid)) ret_val++; return ret_val; } -static int linux_wlan_txq_task(void *vp) +static int wilc_txq_task(void *vp) { int ret; u32 txq_count; @@ -235,12 +161,14 @@ static int linux_wlan_txq_task(void *vp) do { ret = wilc_wlan_handle_txq(dev, &txq_count); if (txq_count < FLOW_CONTROL_LOWER_THRESHOLD) { - if (netif_queue_stopped(wl->vif[0]->ndev)) + if (wl->vif[0]->mac_opened && + netif_queue_stopped(wl->vif[0]->ndev)) netif_wake_queue(wl->vif[0]->ndev); - if (netif_queue_stopped(wl->vif[1]->ndev)) + if (wl->vif[1]->mac_opened && + netif_queue_stopped(wl->vif[1]->ndev)) netif_wake_queue(wl->vif[1]->ndev); } - } while (ret == WILC_TX_ERR_NO_BUF && !wl->close); + } while (ret == -ENOBUFS && !wl->close); } return 0; } @@ -274,7 +202,7 @@ fail: return ret; } -static int linux_wlan_start_firmware(struct net_device *dev) +static int wilc_start_firmware(struct net_device *dev) { struct wilc_vif *vif = netdev_priv(dev); struct wilc *wilc = vif->wilc; @@ -315,204 +243,169 @@ static int wilc1000_firmware_download(struct net_device *dev) return 0; } -static int linux_wlan_init_test_config(struct net_device *dev, - struct wilc_vif *vif) +static int wilc_init_fw_config(struct net_device *dev, struct wilc_vif *vif) { - unsigned char c_val[64]; - struct wilc *wilc = vif->wilc; struct wilc_priv *priv; struct host_if_drv *hif_drv; + u8 b; + u16 hw; + u32 w; netdev_dbg(dev, "Start configuring Firmware\n"); priv = wiphy_priv(dev->ieee80211_ptr->wiphy); hif_drv = (struct host_if_drv *)priv->hif_drv; netdev_dbg(dev, "Host = %p\n", hif_drv); - wilc_get_chipid(wilc, false); - - *(int *)c_val = 1; - if (!wilc_wlan_cfg_set(vif, 1, WID_SET_DRV_HANDLER, c_val, 4, 0, 0)) - goto fail; - - c_val[0] = 0; - if (!wilc_wlan_cfg_set(vif, 0, WID_PC_TEST_MODE, c_val, 1, 0, 0)) - goto fail; - - c_val[0] = INFRASTRUCTURE; - if (!wilc_wlan_cfg_set(vif, 0, WID_BSS_TYPE, c_val, 1, 0, 0)) - goto fail; - - c_val[0] = AUTORATE; - if (!wilc_wlan_cfg_set(vif, 0, WID_CURRENT_TX_RATE, c_val, 1, 0, 0)) - goto fail; - - c_val[0] = G_MIXED_11B_2_MODE; - if (!wilc_wlan_cfg_set(vif, 0, WID_11G_OPERATING_MODE, c_val, 1, 0, - 0)) - goto fail; - - c_val[0] = 1; - if (!wilc_wlan_cfg_set(vif, 0, WID_CURRENT_CHANNEL, c_val, 1, 0, 0)) + w = vif->iftype; + cpu_to_le32s(&w); + if (!wilc_wlan_cfg_set(vif, 1, WID_SET_OPERATION_MODE, (u8 *)&w, 4, + 0, 0)) goto fail; - c_val[0] = G_SHORT_PREAMBLE; - if (!wilc_wlan_cfg_set(vif, 0, WID_PREAMBLE, c_val, 1, 0, 0)) + b = WILC_FW_BSS_TYPE_INFRA; + if (!wilc_wlan_cfg_set(vif, 0, WID_BSS_TYPE, &b, 1, 0, 0)) goto fail; - c_val[0] = AUTO_PROT; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_PROT_MECH, c_val, 1, 0, 0)) + b = WILC_FW_TX_RATE_AUTO; + if (!wilc_wlan_cfg_set(vif, 0, WID_CURRENT_TX_RATE, &b, 1, 0, 0)) goto fail; - c_val[0] = ACTIVE_SCAN; - if (!wilc_wlan_cfg_set(vif, 0, WID_SCAN_TYPE, c_val, 1, 0, 0)) + b = WILC_FW_OPER_MODE_G_MIXED_11B_2; + if (!wilc_wlan_cfg_set(vif, 0, WID_11G_OPERATING_MODE, &b, 1, 0, 0)) goto fail; - c_val[0] = SITE_SURVEY_OFF; - if (!wilc_wlan_cfg_set(vif, 0, WID_SITE_SURVEY, c_val, 1, 0, 0)) + b = WILC_FW_PREAMBLE_SHORT; + if (!wilc_wlan_cfg_set(vif, 0, WID_PREAMBLE, &b, 1, 0, 0)) goto fail; - *((int *)c_val) = 0xffff; - if (!wilc_wlan_cfg_set(vif, 0, WID_RTS_THRESHOLD, c_val, 2, 0, 0)) + b = WILC_FW_11N_PROT_AUTO; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_PROT_MECH, &b, 1, 0, 0)) goto fail; - *((int *)c_val) = 2346; - if (!wilc_wlan_cfg_set(vif, 0, WID_FRAG_THRESHOLD, c_val, 2, 0, 0)) + b = WILC_FW_ACTIVE_SCAN; + if (!wilc_wlan_cfg_set(vif, 0, WID_SCAN_TYPE, &b, 1, 0, 0)) goto fail; - c_val[0] = 0; - if (!wilc_wlan_cfg_set(vif, 0, WID_BCAST_SSID, c_val, 1, 0, 0)) + b = WILC_FW_SITE_SURVEY_OFF; + if (!wilc_wlan_cfg_set(vif, 0, WID_SITE_SURVEY, &b, 1, 0, 0)) goto fail; - c_val[0] = 1; - if (!wilc_wlan_cfg_set(vif, 0, WID_QOS_ENABLE, c_val, 1, 0, 0)) + hw = 0xffff; + cpu_to_le16s(&hw); + if (!wilc_wlan_cfg_set(vif, 0, WID_RTS_THRESHOLD, (u8 *)&hw, 2, 0, 0)) goto fail; - c_val[0] = NO_POWERSAVE; - if (!wilc_wlan_cfg_set(vif, 0, WID_POWER_MANAGEMENT, c_val, 1, 0, 0)) + hw = 2346; + cpu_to_le16s(&hw); + if (!wilc_wlan_cfg_set(vif, 0, WID_FRAG_THRESHOLD, (u8 *)&hw, 2, 0, 0)) goto fail; - c_val[0] = NO_SECURITY; /* NO_ENCRYPT, 0x79 */ - if (!wilc_wlan_cfg_set(vif, 0, WID_11I_MODE, c_val, 1, 0, 0)) + b = 0; + if (!wilc_wlan_cfg_set(vif, 0, WID_BCAST_SSID, &b, 1, 0, 0)) goto fail; - c_val[0] = OPEN_SYSTEM; - if (!wilc_wlan_cfg_set(vif, 0, WID_AUTH_TYPE, c_val, 1, 0, 0)) + b = 1; + if (!wilc_wlan_cfg_set(vif, 0, WID_QOS_ENABLE, &b, 1, 0, 0)) goto fail; - strcpy(c_val, "123456790abcdef1234567890"); - if (!wilc_wlan_cfg_set(vif, 0, WID_WEP_KEY_VALUE, c_val, - (strlen(c_val) + 1), 0, 0)) + b = WILC_FW_NO_POWERSAVE; + if (!wilc_wlan_cfg_set(vif, 0, WID_POWER_MANAGEMENT, &b, 1, 0, 0)) goto fail; - strcpy(c_val, "12345678"); - if (!wilc_wlan_cfg_set(vif, 0, WID_11I_PSK, c_val, (strlen(c_val)), 0, - 0)) - goto fail; - - strcpy(c_val, "password"); - if (!wilc_wlan_cfg_set(vif, 0, WID_1X_KEY, c_val, (strlen(c_val) + 1), - 0, 0)) + b = WILC_FW_SEC_NO; + if (!wilc_wlan_cfg_set(vif, 0, WID_11I_MODE, &b, 1, 0, 0)) goto fail; - c_val[0] = 192; - c_val[1] = 168; - c_val[2] = 1; - c_val[3] = 112; - if (!wilc_wlan_cfg_set(vif, 0, WID_1X_SERV_ADDR, c_val, 4, 0, 0)) + b = WILC_FW_AUTH_OPEN_SYSTEM; + if (!wilc_wlan_cfg_set(vif, 0, WID_AUTH_TYPE, &b, 1, 0, 0)) goto fail; - c_val[0] = 3; - if (!wilc_wlan_cfg_set(vif, 0, WID_LISTEN_INTERVAL, c_val, 1, 0, 0)) + b = 3; + if (!wilc_wlan_cfg_set(vif, 0, WID_LISTEN_INTERVAL, &b, 1, 0, 0)) goto fail; - c_val[0] = 3; - if (!wilc_wlan_cfg_set(vif, 0, WID_DTIM_PERIOD, c_val, 1, 0, 0)) + b = 3; + if (!wilc_wlan_cfg_set(vif, 0, WID_DTIM_PERIOD, &b, 1, 0, 0)) goto fail; - c_val[0] = NORMAL_ACK; - if (!wilc_wlan_cfg_set(vif, 0, WID_ACK_POLICY, c_val, 1, 0, 0)) + b = WILC_FW_ACK_POLICY_NORMAL; + if (!wilc_wlan_cfg_set(vif, 0, WID_ACK_POLICY, &b, 1, 0, 0)) goto fail; - c_val[0] = 0; - if (!wilc_wlan_cfg_set(vif, 0, WID_USER_CONTROL_ON_TX_POWER, c_val, 1, + b = 0; + if (!wilc_wlan_cfg_set(vif, 0, WID_USER_CONTROL_ON_TX_POWER, &b, 1, 0, 0)) goto fail; - c_val[0] = 48; - if (!wilc_wlan_cfg_set(vif, 0, WID_TX_POWER_LEVEL_11A, c_val, 1, 0, - 0)) + b = 48; + if (!wilc_wlan_cfg_set(vif, 0, WID_TX_POWER_LEVEL_11A, &b, 1, 0, 0)) goto fail; - c_val[0] = 28; - if (!wilc_wlan_cfg_set(vif, 0, WID_TX_POWER_LEVEL_11B, c_val, 1, 0, - 0)) + b = 28; + if (!wilc_wlan_cfg_set(vif, 0, WID_TX_POWER_LEVEL_11B, &b, 1, 0, 0)) goto fail; - *((int *)c_val) = 100; - if (!wilc_wlan_cfg_set(vif, 0, WID_BEACON_INTERVAL, c_val, 2, 0, 0)) + hw = 100; + cpu_to_le16s(&hw); + if (!wilc_wlan_cfg_set(vif, 0, WID_BEACON_INTERVAL, (u8 *)&hw, 2, 0, 0)) goto fail; - c_val[0] = REKEY_DISABLE; - if (!wilc_wlan_cfg_set(vif, 0, WID_REKEY_POLICY, c_val, 1, 0, 0)) + b = WILC_FW_REKEY_POLICY_DISABLE; + if (!wilc_wlan_cfg_set(vif, 0, WID_REKEY_POLICY, &b, 1, 0, 0)) goto fail; - *((int *)c_val) = 84600; - if (!wilc_wlan_cfg_set(vif, 0, WID_REKEY_PERIOD, c_val, 4, 0, 0)) + w = 84600; + cpu_to_le32s(&w); + if (!wilc_wlan_cfg_set(vif, 0, WID_REKEY_PERIOD, (u8 *)&w, 4, 0, 0)) goto fail; - *((int *)c_val) = 500; - if (!wilc_wlan_cfg_set(vif, 0, WID_REKEY_PACKET_COUNT, c_val, 4, 0, + w = 500; + cpu_to_le32s(&w); + if (!wilc_wlan_cfg_set(vif, 0, WID_REKEY_PACKET_COUNT, (u8 *)&w, 4, 0, 0)) goto fail; - c_val[0] = 1; - if (!wilc_wlan_cfg_set(vif, 0, WID_SHORT_SLOT_ALLOWED, c_val, 1, 0, + b = 1; + if (!wilc_wlan_cfg_set(vif, 0, WID_SHORT_SLOT_ALLOWED, &b, 1, 0, 0)) goto fail; - c_val[0] = G_SELF_CTS_PROT; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_ERP_PROT_TYPE, c_val, 1, 0, 0)) + b = WILC_FW_ERP_PROT_SELF_CTS; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_ERP_PROT_TYPE, &b, 1, 0, 0)) goto fail; - c_val[0] = 1; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_ENABLE, c_val, 1, 0, 0)) + b = 1; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_ENABLE, &b, 1, 0, 0)) goto fail; - c_val[0] = HT_MIXED_MODE; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_OPERATING_MODE, c_val, 1, 0, - 0)) + b = WILC_FW_11N_OP_MODE_HT_MIXED; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_OPERATING_MODE, &b, 1, 0, 0)) goto fail; - c_val[0] = 1; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_TXOP_PROT_DISABLE, c_val, 1, 0, - 0)) + b = 1; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_TXOP_PROT_DISABLE, &b, 1, 0, 0)) goto fail; - c_val[0] = DETECT_PROTECT_REPORT; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_OBSS_NONHT_DETECTION, c_val, 1, + b = WILC_FW_OBBS_NONHT_DETECT_PROTECT_REPORT; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_OBSS_NONHT_DETECTION, &b, 1, 0, 0)) goto fail; - c_val[0] = RTS_CTS_NONHT_PROT; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_HT_PROT_TYPE, c_val, 1, 0, 0)) + b = WILC_FW_HT_PROT_RTS_CTS_NONHT; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_HT_PROT_TYPE, &b, 1, 0, 0)) goto fail; - c_val[0] = 0; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_RIFS_PROT_ENABLE, c_val, 1, 0, + b = 0; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_RIFS_PROT_ENABLE, &b, 1, 0, 0)) goto fail; - c_val[0] = MIMO_MODE; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_SMPS_MODE, c_val, 1, 0, 0)) + b = 7; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_CURRENT_TX_MCS, &b, 1, 0, 0)) goto fail; - c_val[0] = 7; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_CURRENT_TX_MCS, c_val, 1, 0, - 0)) - goto fail; - - c_val[0] = 1; - if (!wilc_wlan_cfg_set(vif, 0, WID_11N_IMMEDIATE_BA_ENABLED, c_val, 1, + b = 1; + if (!wilc_wlan_cfg_set(vif, 0, WID_11N_IMMEDIATE_BA_ENABLED, &b, 1, 1, 1)) goto fail; @@ -529,6 +422,7 @@ static void wlan_deinit_locks(struct net_device *dev) mutex_destroy(&wilc->hif_cs); mutex_destroy(&wilc->rxq_cs); + mutex_destroy(&wilc->cfg_cmd_lock); mutex_destroy(&wilc->txq_add_to_head_cs); } @@ -590,6 +484,7 @@ static void wlan_init_locks(struct net_device *dev) mutex_init(&wl->hif_cs); mutex_init(&wl->rxq_cs); + mutex_init(&wl->cfg_cmd_lock); spin_lock_init(&wl->txq_spinlock); mutex_init(&wl->txq_add_to_head_cs); @@ -606,7 +501,7 @@ static int wlan_initialize_threads(struct net_device *dev) struct wilc_vif *vif = netdev_priv(dev); struct wilc *wilc = vif->wilc; - wilc->txq_thread = kthread_run(linux_wlan_txq_task, (void *)dev, + wilc->txq_thread = kthread_run(wilc_txq_task, (void *)dev, "K_TXQ_TASK"); if (IS_ERR(wilc->txq_thread)) { netdev_err(dev, "couldn't create TXQ thread\n"); @@ -624,7 +519,7 @@ static int wilc_wlan_initialize(struct net_device *dev, struct wilc_vif *vif) struct wilc *wl = vif->wilc; if (!wl->initialized) { - wl->mac_status = MAC_STATUS_INIT; + wl->mac_status = WILC_MAC_STATUS_INIT; wl->close = 0; wlan_init_locks(dev); @@ -664,7 +559,7 @@ static int wilc_wlan_initialize(struct net_device *dev, struct wilc_vif *vif) goto fail_irq_enable; } - ret = linux_wlan_start_firmware(dev); + ret = wilc_start_firmware(dev); if (ret < 0) { ret = -EIO; goto fail_irq_enable; @@ -680,7 +575,7 @@ static int wilc_wlan_initialize(struct net_device *dev, struct wilc_vif *vif) firmware_ver[size] = '\0'; netdev_dbg(dev, "Firmware Ver = %s\n", firmware_ver); } - ret = linux_wlan_init_test_config(dev, vif); + ret = wilc_init_fw_config(dev, vif); if (ret < 0) { netdev_err(dev, "Failed to configure firmware\n"); @@ -751,8 +646,7 @@ static int wilc_mac_open(struct net_device *ndev) for (i = 0; i < wl->vif_num; i++) { if (ndev == wl->vif[i]->ndev) { wilc_set_wfi_drv_handler(vif, wilc_get_vif_idx(vif), - vif->iftype, vif->ifc_id, - false); + vif->iftype, vif->ifc_id); wilc_set_operation_mode(vif, vif->iftype); break; } @@ -805,12 +699,12 @@ static void wilc_set_multicast_list(struct net_device *dev) if (dev->flags & IFF_ALLMULTI || dev->mc.count > WILC_MULTICAST_TABLE_SIZE) { - wilc_setup_multicast_filter(vif, false, 0, NULL); + wilc_setup_multicast_filter(vif, 0, 0, NULL); return; } if (dev->mc.count == 0) { - wilc_setup_multicast_filter(vif, true, 0, NULL); + wilc_setup_multicast_filter(vif, 1, 0, NULL); return; } @@ -827,11 +721,11 @@ static void wilc_set_multicast_list(struct net_device *dev) cur_mc += ETH_ALEN; } - if (wilc_setup_multicast_filter(vif, true, dev->mc.count, mc_list)) + if (wilc_setup_multicast_filter(vif, 1, dev->mc.count, mc_list)) kfree(mc_list); } -static void linux_wlan_tx_complete(void *priv, int status) +static void wilc_tx_complete(void *priv, int status) { struct tx_complete_data *pv_data = priv; @@ -845,9 +739,6 @@ netdev_tx_t wilc_mac_xmit(struct sk_buff *skb, struct net_device *ndev) struct wilc *wilc = vif->wilc; struct tx_complete_data *tx_data = NULL; int queue_count; - char *udp_buf; - struct iphdr *ih; - struct ethhdr *eth_h; if (skb->dev != ndev) { netdev_err(ndev, "Packet not destined to this device\n"); @@ -865,28 +756,18 @@ netdev_tx_t wilc_mac_xmit(struct sk_buff *skb, struct net_device *ndev) tx_data->size = skb->len; tx_data->skb = skb; - eth_h = (struct ethhdr *)(skb->data); - if (eth_h->h_proto == cpu_to_be16(0x8e88)) - netdev_dbg(ndev, "EAPOL transmitted\n"); - - ih = (struct iphdr *)(skb->data + sizeof(struct ethhdr)); - - udp_buf = (char *)ih + sizeof(struct iphdr); - if ((udp_buf[1] == 68 && udp_buf[3] == 67) || - (udp_buf[1] == 67 && udp_buf[3] == 68)) - netdev_dbg(ndev, "DHCP Message transmitted, type:%x %x %x\n", - udp_buf[248], udp_buf[249], udp_buf[250]); - vif->netstats.tx_packets++; vif->netstats.tx_bytes += tx_data->size; tx_data->bssid = wilc->vif[vif->idx]->bssid; queue_count = wilc_wlan_txq_add_net_pkt(ndev, (void *)tx_data, tx_data->buff, tx_data->size, - linux_wlan_tx_complete); + wilc_tx_complete); if (queue_count > FLOW_CONTROL_UPPER_THRESHOLD) { - netif_stop_queue(wilc->vif[0]->ndev); - netif_stop_queue(wilc->vif[1]->ndev); + if (wilc->vif[0]->mac_opened) + netif_stop_queue(wilc->vif[0]->ndev); + if (wilc->vif[1]->mac_opened) + netif_stop_queue(wilc->vif[1]->ndev); } return 0; @@ -894,31 +775,11 @@ netdev_tx_t wilc_mac_xmit(struct sk_buff *skb, struct net_device *ndev) static int wilc_mac_close(struct net_device *ndev) { - struct wilc_priv *priv; struct wilc_vif *vif = netdev_priv(ndev); - struct host_if_drv *hif_drv; - struct wilc *wl; - - if (!vif || !vif->ndev || !vif->ndev->ieee80211_ptr || - !vif->ndev->ieee80211_ptr->wiphy) - return 0; - - priv = wiphy_priv(vif->ndev->ieee80211_ptr->wiphy); - wl = vif->wilc; - - if (!priv) - return 0; - - hif_drv = (struct host_if_drv *)priv->hif_drv; + struct wilc *wl = vif->wilc; netdev_dbg(ndev, "Mac close\n"); - if (!wl) - return 0; - - if (!hif_drv) - return 0; - if (wl->open_ifcs > 0) wl->open_ifcs--; else @@ -934,7 +795,6 @@ static int wilc_mac_close(struct net_device *ndev) netdev_dbg(ndev, "Deinitializing wilc1000\n"); wl->close = 1; wilc_wlan_deinitialize(ndev); - wilc_wfi_deinit_mon_interface(); } vif->mac_opened = 0; @@ -942,7 +802,8 @@ static int wilc_mac_close(struct net_device *ndev) return 0; } -void wilc_frmw_to_linux(struct wilc *wilc, u8 *buff, u32 size, u32 pkt_offset) +void wilc_frmw_to_host(struct wilc *wilc, u8 *buff, u32 size, + u32 pkt_offset) { unsigned int frame_len = 0; int stats; @@ -990,7 +851,7 @@ void wilc_wfi_mgmt_rx(struct wilc *wilc, u8 *buff, u32 size) for (i = 0; i < wilc->vif_num; i++) { vif = netdev_priv(wilc->vif[i]->ndev); if (vif->monitor_flag) { - wilc_wfi_monitor_rx(buff, size); + wilc_wfi_monitor_rx(wilc->monitor_dev, buff, size); return; } } @@ -1001,6 +862,76 @@ void wilc_wfi_mgmt_rx(struct wilc *wilc, u8 *buff, u32 size) wilc_wfi_p2p_rx(wilc->vif[1]->ndev, buff, size); } +static const struct net_device_ops wilc_netdev_ops = { + .ndo_init = mac_init_fn, + .ndo_open = wilc_mac_open, + .ndo_stop = wilc_mac_close, + .ndo_start_xmit = wilc_mac_xmit, + .ndo_get_stats = mac_stats, + .ndo_set_rx_mode = wilc_set_multicast_list, +}; + +static int dev_state_ev_handler(struct notifier_block *this, + unsigned long event, void *ptr) +{ + struct in_ifaddr *dev_iface = ptr; + struct wilc_priv *priv; + struct host_if_drv *hif_drv; + struct net_device *dev; + struct wilc_vif *vif; + + if (!dev_iface || !dev_iface->ifa_dev || !dev_iface->ifa_dev->dev) + return NOTIFY_DONE; + + dev = (struct net_device *)dev_iface->ifa_dev->dev; + if (dev->netdev_ops != &wilc_netdev_ops) + return NOTIFY_DONE; + + if (!dev->ieee80211_ptr || !dev->ieee80211_ptr->wiphy) + return NOTIFY_DONE; + + priv = wiphy_priv(dev->ieee80211_ptr->wiphy); + if (!priv) + return NOTIFY_DONE; + + hif_drv = (struct host_if_drv *)priv->hif_drv; + vif = netdev_priv(dev); + if (!vif || !hif_drv) + return NOTIFY_DONE; + + switch (event) { + case NETDEV_UP: + if (vif->iftype == WILC_STATION_MODE || + vif->iftype == WILC_CLIENT_MODE) { + hif_drv->ifc_up = 1; + vif->obtaining_ip = false; + del_timer(&vif->during_ip_timer); + } + + if (vif->wilc->enable_ps) + wilc_set_power_mgmt(vif, 1, 0); + + break; + + case NETDEV_DOWN: + if (vif->iftype == WILC_STATION_MODE || + vif->iftype == WILC_CLIENT_MODE) { + hif_drv->ifc_up = 0; + vif->obtaining_ip = false; + wilc_set_power_mgmt(vif, 0, 0); + } + + wilc_resolve_disconnect_aberration(vif); + + break; + + default: + break; + } + + return NOTIFY_DONE; +} + static struct notifier_block g_dev_notifier = { .notifier_call = dev_state_ev_handler }; @@ -1020,19 +951,15 @@ void wilc_netdev_cleanup(struct wilc *wilc) wilc->firmware = NULL; } - if (wilc->vif[0]->ndev || wilc->vif[1]->ndev) { - for (i = 0; i < NUM_CONCURRENT_IFC; i++) - if (wilc->vif[i]->ndev) - if (wilc->vif[i]->mac_opened) - wilc_mac_close(wilc->vif[i]->ndev); - - for (i = 0; i < NUM_CONCURRENT_IFC; i++) { + for (i = 0; i < WILC_NUM_CONCURRENT_IFC; i++) { + if (wilc->vif[i] && wilc->vif[i]->ndev) { unregister_netdev(wilc->vif[i]->ndev); wilc_free_wiphy(wilc->vif[i]->ndev); free_netdev(wilc->vif[i]->ndev); } } + wilc_wfi_deinit_mon_interface(wilc); flush_workqueue(wilc->hif_workqueue); destroy_workqueue(wilc->hif_workqueue); wilc_wlan_cfg_deinit(wilc); @@ -1041,15 +968,6 @@ void wilc_netdev_cleanup(struct wilc *wilc) } EXPORT_SYMBOL_GPL(wilc_netdev_cleanup); -static const struct net_device_ops wilc_netdev_ops = { - .ndo_init = mac_init_fn, - .ndo_open = wilc_mac_open, - .ndo_stop = wilc_mac_close, - .ndo_start_xmit = wilc_mac_xmit, - .ndo_get_stats = mac_stats, - .ndo_set_rx_mode = wilc_set_multicast_list, -}; - int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, const struct wilc_hif_func *ops) { @@ -1070,7 +988,7 @@ int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, wl->io_type = io_type; wl->hif_func = ops; wl->enable_ps = true; - wl->chip_ps_state = CHIP_WAKEDUP; + wl->chip_ps_state = WILC_CHIP_WAKEDUP; INIT_LIST_HEAD(&wl->txq_head.list); INIT_LIST_HEAD(&wl->rxq_head.list); @@ -1082,7 +1000,7 @@ int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, register_inetaddr_notifier(&g_dev_notifier); - for (i = 0; i < NUM_CONCURRENT_IFC; i++) { + for (i = 0; i < WILC_NUM_CONCURRENT_IFC; i++) { struct wireless_dev *wdev; ndev = alloc_etherdev(sizeof(struct wilc_vif)); @@ -1104,8 +1022,8 @@ int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, vif->wilc = *wilc; vif->ndev = ndev; wl->vif[i] = vif; - wl->vif_num = i; - vif->idx = wl->vif_num; + wl->vif_num = i + 1; + vif->idx = i; ndev->netdev_ops = &wilc_netdev_ops; @@ -1130,7 +1048,7 @@ int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, if (ret) goto free_ndev; - vif->iftype = STATION_MODE; + vif->iftype = WILC_STATION_MODE; vif->mac_opened = 0; } @@ -1139,7 +1057,7 @@ int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, free_ndev: for (; i >= 0; i--) { if (wl->vif[i]) { - if (wl->vif[i]->iftype == STATION_MODE) + if (wl->vif[i]->iftype == WILC_STATION_MODE) unregister_netdev(wl->vif[i]->ndev); if (wl->vif[i]->ndev) { diff --git a/drivers/staging/wilc1000/wilc_sdio.c b/drivers/staging/wilc1000/wilc_sdio.c index ca351c950344..b789c57d7e80 100644 --- a/drivers/staging/wilc1000/wilc_sdio.c +++ b/drivers/staging/wilc1000/wilc_sdio.c @@ -30,11 +30,26 @@ struct wilc_sdio { int has_thrpt_enh3; }; -static const struct wilc_hif_func wilc_hif_sdio; +struct sdio_cmd52 { + u32 read_write: 1; + u32 function: 3; + u32 raw: 1; + u32 address: 17; + u32 data: 8; +}; + +struct sdio_cmd53 { + u32 read_write: 1; + u32 function: 3; + u32 block_mode: 1; + u32 increment: 1; + u32 address: 17; + u32 count: 9; + u8 *buffer; + u32 block_size; +}; -static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data); -static int sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data); -static int sdio_init(struct wilc *wilc, bool resume); +static const struct wilc_hif_func wilc_hif_sdio; static void wilc_sdio_interrupt(struct sdio_func *func) { @@ -102,8 +117,8 @@ static int wilc_sdio_cmd53(struct wilc *wilc, struct sdio_cmd53 *cmd) return ret; } -static int linux_sdio_probe(struct sdio_func *func, - const struct sdio_device_id *id) +static int wilc_sdio_probe(struct sdio_func *func, + const struct sdio_device_id *id) { struct wilc *wilc; int ret; @@ -125,7 +140,8 @@ static int linux_sdio_probe(struct sdio_func *func, } dev_dbg(&func->dev, "Initializing netdev\n"); - ret = wilc_netdev_init(&wilc, &func->dev, HIF_SDIO, &wilc_hif_sdio); + ret = wilc_netdev_init(&wilc, &func->dev, WILC_HIF_SDIO, + &wilc_hif_sdio); if (ret) { dev_err(&func->dev, "Couldn't initialize netdev\n"); kfree(sdio_priv); @@ -140,7 +156,7 @@ static int linux_sdio_probe(struct sdio_func *func, return 0; } -static void linux_sdio_remove(struct sdio_func *func) +static void wilc_sdio_remove(struct sdio_func *func) { struct wilc *wilc = sdio_get_drvdata(func); @@ -150,7 +166,7 @@ static void linux_sdio_remove(struct sdio_func *func) wilc_netdev_cleanup(wilc); } -static int sdio_reset(struct wilc *wilc) +static int wilc_sdio_reset(struct wilc *wilc) { struct sdio_cmd52 cmd; int ret; @@ -185,7 +201,7 @@ static int wilc_sdio_suspend(struct device *dev) chip_allow_sleep(wilc); } - ret = sdio_reset(wilc); + ret = wilc_sdio_reset(wilc); if (ret) { dev_err(&func->dev, "Fail reset sdio\n"); return ret; @@ -195,50 +211,6 @@ static int wilc_sdio_suspend(struct device *dev) return 0; } -static int wilc_sdio_resume(struct device *dev) -{ - struct sdio_func *func = dev_to_sdio_func(dev); - struct wilc *wilc = sdio_get_drvdata(func); - - dev_info(dev, "sdio resume\n"); - sdio_release_host(func); - chip_wakeup(wilc); - sdio_init(wilc, true); - - if (wilc->suspend_event) - host_wakeup_notify(wilc); - - chip_allow_sleep(wilc); - - return 0; -} - -static const struct of_device_id wilc_of_match[] = { - { .compatible = "microchip,wilc1000-sdio", }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, wilc_of_match); - -static const struct dev_pm_ops wilc_sdio_pm_ops = { - .suspend = wilc_sdio_suspend, - .resume = wilc_sdio_resume, -}; - -static struct sdio_driver wilc_sdio_driver = { - .name = SDIO_MODALIAS, - .id_table = wilc_sdio_ids, - .probe = linux_sdio_probe, - .remove = linux_sdio_remove, - .drv = { - .pm = &wilc_sdio_pm_ops, - .of_match_table = wilc_of_match, - } -}; -module_driver(wilc_sdio_driver, - sdio_register_driver, - sdio_unregister_driver); -MODULE_LICENSE("GPL"); - static int wilc_sdio_enable_interrupt(struct wilc *dev) { struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev); @@ -273,7 +245,7 @@ static void wilc_sdio_disable_interrupt(struct wilc *dev) * ********************************************/ -static int sdio_set_func0_csa_address(struct wilc *wilc, u32 adr) +static int wilc_sdio_set_func0_csa_address(struct wilc *wilc, u32 adr) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct sdio_cmd52 cmd; @@ -314,7 +286,7 @@ fail: return 0; } -static int sdio_set_func0_block_size(struct wilc *wilc, u32 block_size) +static int wilc_sdio_set_func0_block_size(struct wilc *wilc, u32 block_size) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct sdio_cmd52 cmd; @@ -350,7 +322,7 @@ fail: * ********************************************/ -static int sdio_set_func1_block_size(struct wilc *wilc, u32 block_size) +static int wilc_sdio_set_func1_block_size(struct wilc *wilc, u32 block_size) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct sdio_cmd52 cmd; @@ -384,7 +356,7 @@ fail: * Sdio interfaces * ********************************************/ -static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data) +static int wilc_sdio_write_reg(struct wilc *wilc, u32 addr, u32 data) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct wilc_sdio *sdio_priv = wilc->bus_data; @@ -412,7 +384,7 @@ static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data) /** * set the AHB address **/ - if (!sdio_set_func0_csa_address(wilc, addr)) + if (!wilc_sdio_set_func0_csa_address(wilc, addr)) goto fail; cmd.read_write = 1; @@ -438,7 +410,7 @@ fail: return 0; } -static int sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size) +static int wilc_sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct wilc_sdio *sdio_priv = wilc->bus_data; @@ -487,7 +459,7 @@ static int sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size) cmd.buffer = buf; cmd.block_size = block_size; if (addr > 0) { - if (!sdio_set_func0_csa_address(wilc, addr)) + if (!wilc_sdio_set_func0_csa_address(wilc, addr)) goto fail; } ret = wilc_sdio_cmd53(wilc, &cmd); @@ -510,7 +482,7 @@ static int sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size) cmd.block_size = block_size; if (addr > 0) { - if (!sdio_set_func0_csa_address(wilc, addr)) + if (!wilc_sdio_set_func0_csa_address(wilc, addr)) goto fail; } ret = wilc_sdio_cmd53(wilc, &cmd); @@ -528,7 +500,7 @@ fail: return 0; } -static int sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data) +static int wilc_sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct wilc_sdio *sdio_priv = wilc->bus_data; @@ -551,7 +523,7 @@ static int sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data) } else { struct sdio_cmd53 cmd; - if (!sdio_set_func0_csa_address(wilc, addr)) + if (!wilc_sdio_set_func0_csa_address(wilc, addr)) goto fail; cmd.read_write = 0; @@ -580,7 +552,7 @@ fail: return 0; } -static int sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) +static int wilc_sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct wilc_sdio *sdio_priv = wilc->bus_data; @@ -629,7 +601,7 @@ static int sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) cmd.buffer = buf; cmd.block_size = block_size; if (addr > 0) { - if (!sdio_set_func0_csa_address(wilc, addr)) + if (!wilc_sdio_set_func0_csa_address(wilc, addr)) goto fail; } ret = wilc_sdio_cmd53(wilc, &cmd); @@ -652,7 +624,7 @@ static int sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) cmd.block_size = block_size; if (addr > 0) { - if (!sdio_set_func0_csa_address(wilc, addr)) + if (!wilc_sdio_set_func0_csa_address(wilc, addr)) goto fail; } ret = wilc_sdio_cmd53(wilc, &cmd); @@ -676,12 +648,12 @@ fail: * ********************************************/ -static int sdio_deinit(struct wilc *wilc) +static int wilc_sdio_deinit(struct wilc *wilc) { return 1; } -static int sdio_init(struct wilc *wilc, bool resume) +static int wilc_sdio_init(struct wilc *wilc, bool resume) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct wilc_sdio *sdio_priv = wilc->bus_data; @@ -709,7 +681,7 @@ static int sdio_init(struct wilc *wilc, bool resume) /** * function 0 block size **/ - if (!sdio_set_func0_block_size(wilc, WILC_SDIO_BLOCK_SIZE)) { + if (!wilc_sdio_set_func0_block_size(wilc, WILC_SDIO_BLOCK_SIZE)) { dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n"); goto fail; } @@ -758,7 +730,7 @@ static int sdio_init(struct wilc *wilc, bool resume) /** * func 1 is ready, set func 1 block size **/ - if (!sdio_set_func1_block_size(wilc, WILC_SDIO_BLOCK_SIZE)) { + if (!wilc_sdio_set_func1_block_size(wilc, WILC_SDIO_BLOCK_SIZE)) { dev_err(&func->dev, "Fail set func 1 block size...\n"); goto fail; } @@ -781,7 +753,7 @@ static int sdio_init(struct wilc *wilc, bool resume) * make sure can read back chip id correctly **/ if (!resume) { - if (!sdio_read_reg(wilc, 0x1000, &chipid)) { + if (!wilc_sdio_read_reg(wilc, 0x1000, &chipid)) { dev_err(&func->dev, "Fail cmd read chip id...\n"); goto fail; } @@ -801,7 +773,7 @@ fail: return 0; } -static int sdio_read_size(struct wilc *wilc, u32 *size) +static int wilc_sdio_read_size(struct wilc *wilc, u32 *size) { u32 tmp; struct sdio_cmd52 cmd; @@ -826,14 +798,14 @@ static int sdio_read_size(struct wilc *wilc, u32 *size) return 1; } -static int sdio_read_int(struct wilc *wilc, u32 *int_status) +static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct wilc_sdio *sdio_priv = wilc->bus_data; u32 tmp; struct sdio_cmd52 cmd; - sdio_read_size(wilc, &tmp); + wilc_sdio_read_size(wilc, &tmp); /** * Read IRQ flags @@ -841,6 +813,7 @@ static int sdio_read_int(struct wilc *wilc, u32 *int_status) if (!sdio_priv->irq_gpio) { int i; + cmd.read_write = 0; cmd.function = 1; cmd.address = 0x04; cmd.data = 0; @@ -884,7 +857,7 @@ static int sdio_read_int(struct wilc *wilc, u32 *int_status) return 1; } -static int sdio_clear_int_ext(struct wilc *wilc, u32 val) +static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct wilc_sdio *sdio_priv = wilc->bus_data; @@ -1009,7 +982,7 @@ fail: return 0; } -static int sdio_sync_ext(struct wilc *wilc, int nint) +static int wilc_sdio_sync_ext(struct wilc *wilc, int nint) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct wilc_sdio *sdio_priv = wilc->bus_data; @@ -1030,13 +1003,13 @@ static int sdio_sync_ext(struct wilc *wilc, int nint) /** * Disable power sequencer **/ - if (!sdio_read_reg(wilc, WILC_MISC, ®)) { + if (!wilc_sdio_read_reg(wilc, WILC_MISC, ®)) { dev_err(&func->dev, "Failed read misc reg...\n"); return 0; } reg &= ~BIT(8); - if (!sdio_write_reg(wilc, WILC_MISC, reg)) { + if (!wilc_sdio_write_reg(wilc, WILC_MISC, reg)) { dev_err(&func->dev, "Failed write misc reg...\n"); return 0; } @@ -1048,14 +1021,14 @@ static int sdio_sync_ext(struct wilc *wilc, int nint) /** * interrupt pin mux select **/ - ret = sdio_read_reg(wilc, WILC_PIN_MUX_0, ®); + ret = wilc_sdio_read_reg(wilc, WILC_PIN_MUX_0, ®); if (!ret) { dev_err(&func->dev, "Failed read reg (%08x)...\n", WILC_PIN_MUX_0); return 0; } reg |= BIT(8); - ret = sdio_write_reg(wilc, WILC_PIN_MUX_0, reg); + ret = wilc_sdio_write_reg(wilc, WILC_PIN_MUX_0, reg); if (!ret) { dev_err(&func->dev, "Failed write reg (%08x)...\n", WILC_PIN_MUX_0); @@ -1065,7 +1038,7 @@ static int sdio_sync_ext(struct wilc *wilc, int nint) /** * interrupt enable **/ - ret = sdio_read_reg(wilc, WILC_INTR_ENABLE, ®); + ret = wilc_sdio_read_reg(wilc, WILC_INTR_ENABLE, ®); if (!ret) { dev_err(&func->dev, "Failed read reg (%08x)...\n", WILC_INTR_ENABLE); @@ -1074,14 +1047,14 @@ static int sdio_sync_ext(struct wilc *wilc, int nint) for (i = 0; (i < 5) && (nint > 0); i++, nint--) reg |= BIT((27 + i)); - ret = sdio_write_reg(wilc, WILC_INTR_ENABLE, reg); + ret = wilc_sdio_write_reg(wilc, WILC_INTR_ENABLE, reg); if (!ret) { dev_err(&func->dev, "Failed write reg (%08x)...\n", WILC_INTR_ENABLE); return 0; } if (nint) { - ret = sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®); + ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®); if (!ret) { dev_err(&func->dev, "Failed read reg (%08x)...\n", @@ -1092,7 +1065,7 @@ static int sdio_sync_ext(struct wilc *wilc, int nint) for (i = 0; (i < 3) && (nint > 0); i++, nint--) reg |= BIT(i); - ret = sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®); + ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®); if (!ret) { dev_err(&func->dev, "Failed write reg (%08x)...\n", @@ -1106,19 +1079,62 @@ static int sdio_sync_ext(struct wilc *wilc, int nint) /* Global sdio HIF function table */ static const struct wilc_hif_func wilc_hif_sdio = { - .hif_init = sdio_init, - .hif_deinit = sdio_deinit, - .hif_read_reg = sdio_read_reg, - .hif_write_reg = sdio_write_reg, - .hif_block_rx = sdio_read, - .hif_block_tx = sdio_write, - .hif_read_int = sdio_read_int, - .hif_clear_int_ext = sdio_clear_int_ext, - .hif_read_size = sdio_read_size, - .hif_block_tx_ext = sdio_write, - .hif_block_rx_ext = sdio_read, - .hif_sync_ext = sdio_sync_ext, + .hif_init = wilc_sdio_init, + .hif_deinit = wilc_sdio_deinit, + .hif_read_reg = wilc_sdio_read_reg, + .hif_write_reg = wilc_sdio_write_reg, + .hif_block_rx = wilc_sdio_read, + .hif_block_tx = wilc_sdio_write, + .hif_read_int = wilc_sdio_read_int, + .hif_clear_int_ext = wilc_sdio_clear_int_ext, + .hif_read_size = wilc_sdio_read_size, + .hif_block_tx_ext = wilc_sdio_write, + .hif_block_rx_ext = wilc_sdio_read, + .hif_sync_ext = wilc_sdio_sync_ext, .enable_interrupt = wilc_sdio_enable_interrupt, .disable_interrupt = wilc_sdio_disable_interrupt, }; +static int wilc_sdio_resume(struct device *dev) +{ + struct sdio_func *func = dev_to_sdio_func(dev); + struct wilc *wilc = sdio_get_drvdata(func); + + dev_info(dev, "sdio resume\n"); + sdio_release_host(func); + chip_wakeup(wilc); + wilc_sdio_init(wilc, true); + + if (wilc->suspend_event) + host_wakeup_notify(wilc); + + chip_allow_sleep(wilc); + + return 0; +} + +static const struct of_device_id wilc_of_match[] = { + { .compatible = "microchip,wilc1000-sdio", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, wilc_of_match); + +static const struct dev_pm_ops wilc_sdio_pm_ops = { + .suspend = wilc_sdio_suspend, + .resume = wilc_sdio_resume, +}; + +static struct sdio_driver wilc_sdio_driver = { + .name = SDIO_MODALIAS, + .id_table = wilc_sdio_ids, + .probe = wilc_sdio_probe, + .remove = wilc_sdio_remove, + .drv = { + .pm = &wilc_sdio_pm_ops, + .of_match_table = wilc_of_match, + } +}; +module_driver(wilc_sdio_driver, + sdio_register_driver, + sdio_unregister_driver); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/wilc1000/wilc_spi.c b/drivers/staging/wilc1000/wilc_spi.c index cef127b249fb..4a1be9e60d74 100644 --- a/drivers/staging/wilc1000/wilc_spi.c +++ b/drivers/staging/wilc1000/wilc_spi.c @@ -120,7 +120,7 @@ static int wilc_bus_probe(struct spi_device *spi) dev_err(&spi->dev, "failed to get the irq gpio\n"); } - ret = wilc_netdev_init(&wilc, NULL, HIF_SPI, &wilc_hif_spi); + ret = wilc_netdev_init(&wilc, NULL, WILC_HIF_SPI, &wilc_hif_spi); if (ret) { kfree(spi_priv); return ret; @@ -814,7 +814,7 @@ static int wilc_spi_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) * ********************************************/ -static int _wilc_spi_deinit(struct wilc *wilc) +static int wilc_spi_deinit(struct wilc *wilc) { /* * TODO: @@ -927,7 +927,8 @@ static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status) int ret; u32 tmp; u32 byte_cnt; - int happened, j; + bool unexpected_irq; + int j; u32 unknown_mask; u32 irq_flags; int k = IRG_FLAGS_OFFSET + 5; @@ -947,8 +948,6 @@ static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status) j = 0; do { - happened = 0; - wilc_spi_read_reg(wilc, 0x1a90, &irq_flags); tmp |= ((irq_flags >> 27) << IRG_FLAGS_OFFSET); @@ -959,15 +958,15 @@ static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status) unknown_mask = ~((1ul << spi_priv->nint) - 1); - if ((tmp >> IRG_FLAGS_OFFSET) & unknown_mask) { + unexpected_irq = (tmp >> IRG_FLAGS_OFFSET) & unknown_mask; + if (unexpected_irq) { dev_err(&spi->dev, "Unexpected interrupt(2):j=%d,tmp=%x,mask=%x\n", j, tmp, unknown_mask); - happened = 1; } j++; - } while (happened); + } while (unexpected_irq); *int_status = tmp; @@ -1123,7 +1122,7 @@ static int wilc_spi_sync_ext(struct wilc *wilc, int nint) /* Global spi HIF function table */ static const struct wilc_hif_func wilc_hif_spi = { .hif_init = wilc_spi_init, - .hif_deinit = _wilc_spi_deinit, + .hif_deinit = wilc_spi_deinit, .hif_read_reg = wilc_spi_read_reg, .hif_write_reg = wilc_spi_write_reg, .hif_block_rx = wilc_spi_read, diff --git a/drivers/staging/wilc1000/wilc_wfi_cfgoperations.c b/drivers/staging/wilc1000/wilc_wfi_cfgoperations.c index 4fbbbbd5a64b..5e7a4676324e 100644 --- a/drivers/staging/wilc1000/wilc_wfi_cfgoperations.c +++ b/drivers/staging/wilc1000/wilc_wfi_cfgoperations.c @@ -6,15 +6,6 @@ #include "wilc_wfi_cfgoperations.h" -#define NO_ENCRYPT 0 -#define ENCRYPT_ENABLED BIT(0) -#define WEP BIT(1) -#define WEP_EXTENDED BIT(2) -#define WPA BIT(3) -#define WPA2 BIT(4) -#define AES BIT(5) -#define TKIP BIT(6) - #define FRAME_TYPE_ID 0 #define ACTION_CAT_ID 24 #define ACTION_SUBTYPE_ID 25 @@ -36,18 +27,7 @@ #define GAS_INITIAL_REQ 0x0a #define GAS_INITIAL_RSP 0x0b -#define INVALID_CHANNEL 0 - -#define nl80211_SCAN_RESULT_EXPIRE (3 * HZ) -#define SCAN_RESULT_EXPIRE (40 * HZ) - -static const u32 cipher_suites[] = { - WLAN_CIPHER_SUITE_WEP40, - WLAN_CIPHER_SUITE_WEP104, - WLAN_CIPHER_SUITE_TKIP, - WLAN_CIPHER_SUITE_CCMP, - WLAN_CIPHER_SUITE_AES_CMAC, -}; +#define WILC_INVALID_CHANNEL 0 static const struct ieee80211_txrx_stypes wilc_wfi_cfg80211_mgmt_types[NUM_NL80211_IFTYPES] = { @@ -82,178 +62,15 @@ static const struct wiphy_wowlan_support wowlan_support = { .flags = WIPHY_WOWLAN_ANY }; -#define CHAN2G(_channel, _freq, _flags) { \ - .band = NL80211_BAND_2GHZ, \ - .center_freq = (_freq), \ - .hw_value = (_channel), \ - .flags = (_flags), \ - .max_antenna_gain = 0, \ - .max_power = 30, \ -} - -static struct ieee80211_channel ieee80211_2ghz_channels[] = { - CHAN2G(1, 2412, 0), - CHAN2G(2, 2417, 0), - CHAN2G(3, 2422, 0), - CHAN2G(4, 2427, 0), - CHAN2G(5, 2432, 0), - CHAN2G(6, 2437, 0), - CHAN2G(7, 2442, 0), - CHAN2G(8, 2447, 0), - CHAN2G(9, 2452, 0), - CHAN2G(10, 2457, 0), - CHAN2G(11, 2462, 0), - CHAN2G(12, 2467, 0), - CHAN2G(13, 2472, 0), - CHAN2G(14, 2484, 0), -}; - -#define RATETAB_ENT(_rate, _hw_value, _flags) { \ - .bitrate = (_rate), \ - .hw_value = (_hw_value), \ - .flags = (_flags), \ -} - -static struct ieee80211_rate ieee80211_bitrates[] = { - RATETAB_ENT(10, 0, 0), - RATETAB_ENT(20, 1, 0), - RATETAB_ENT(55, 2, 0), - RATETAB_ENT(110, 3, 0), - RATETAB_ENT(60, 9, 0), - RATETAB_ENT(90, 6, 0), - RATETAB_ENT(120, 7, 0), - RATETAB_ENT(180, 8, 0), - RATETAB_ENT(240, 9, 0), - RATETAB_ENT(360, 10, 0), - RATETAB_ENT(480, 11, 0), - RATETAB_ENT(540, 12, 0), -}; - -struct p2p_mgmt_data { +struct wilc_p2p_mgmt_data { int size; u8 *buff; }; -static u8 wlan_channel = INVALID_CHANNEL; -static u8 curr_channel; -static u8 p2p_oui[] = {0x50, 0x6f, 0x9A, 0x09}; -static u8 p2p_vendor_spec[] = {0xdd, 0x05, 0x00, 0x08, 0x40, 0x03}; - -static struct ieee80211_supported_band wilc_band_2ghz = { - .channels = ieee80211_2ghz_channels, - .n_channels = ARRAY_SIZE(ieee80211_2ghz_channels), - .bitrates = ieee80211_bitrates, - .n_bitrates = ARRAY_SIZE(ieee80211_bitrates), -}; - -#define AGING_TIME (9 * 1000) -#define DURING_IP_TIME_OUT 15000 - -static void clear_shadow_scan(struct wilc_priv *priv) -{ - int i; - - for (i = 0; i < priv->scanned_cnt; i++) { - kfree(priv->scanned_shadow[i].ies); - priv->scanned_shadow[i].ies = NULL; - - kfree(priv->scanned_shadow[i].join_params); - priv->scanned_shadow[i].join_params = NULL; - } - priv->scanned_cnt = 0; -} - -static u32 get_rssi_avg(struct network_info *network_info) -{ - u8 i; - int rssi_v = 0; - u8 num_rssi = (network_info->rssi_history.full) ? - NUM_RSSI : (network_info->rssi_history.index); - - for (i = 0; i < num_rssi; i++) - rssi_v += network_info->rssi_history.samples[i]; - - rssi_v /= num_rssi; - return rssi_v; -} - -static void refresh_scan(struct wilc_priv *priv, bool direct_scan) -{ - struct wiphy *wiphy = priv->dev->ieee80211_ptr->wiphy; - int i; - - for (i = 0; i < priv->scanned_cnt; i++) { - struct network_info *network_info; - s32 freq; - struct ieee80211_channel *channel; - int rssi; - struct cfg80211_bss *bss; - - network_info = &priv->scanned_shadow[i]; - - if (!memcmp("DIRECT-", network_info->ssid, 7) && !direct_scan) - continue; - - freq = ieee80211_channel_to_frequency((s32)network_info->ch, - NL80211_BAND_2GHZ); - channel = ieee80211_get_channel(wiphy, freq); - rssi = get_rssi_avg(network_info); - bss = cfg80211_inform_bss(wiphy, - channel, - CFG80211_BSS_FTYPE_UNKNOWN, - network_info->bssid, - network_info->tsf_hi, - network_info->cap_info, - network_info->beacon_period, - (const u8 *)network_info->ies, - (size_t)network_info->ies_len, - (s32)rssi * 100, - GFP_KERNEL); - cfg80211_put_bss(wiphy, bss); - } -} - -static void reset_shadow_found(struct wilc_priv *priv) -{ - int i; - - for (i = 0; i < priv->scanned_cnt; i++) - priv->scanned_shadow[i].found = 0; -} - -static void update_scan_time(struct wilc_priv *priv) -{ - int i; - - for (i = 0; i < priv->scanned_cnt; i++) - priv->scanned_shadow[i].time_scan = jiffies; -} - -static void remove_network_from_shadow(struct timer_list *t) -{ - struct wilc_priv *priv = from_timer(priv, t, aging_timer); - unsigned long now = jiffies; - int i, j; - - for (i = 0; i < priv->scanned_cnt; i++) { - if (!time_after(now, priv->scanned_shadow[i].time_scan + - (unsigned long)(SCAN_RESULT_EXPIRE))) - continue; - kfree(priv->scanned_shadow[i].ies); - priv->scanned_shadow[i].ies = NULL; - - kfree(priv->scanned_shadow[i].join_params); +static const u8 p2p_oui[] = {0x50, 0x6f, 0x9A, 0x09}; +static const u8 p2p_vendor_spec[] = {0xdd, 0x05, 0x00, 0x08, 0x40, 0x03}; - for (j = i; (j < priv->scanned_cnt - 1); j++) - priv->scanned_shadow[j] = priv->scanned_shadow[j + 1]; - - priv->scanned_cnt--; - } - - if (priv->scanned_cnt != 0) - mod_timer(&priv->aging_timer, - jiffies + msecs_to_jiffies(AGING_TIME)); -} +#define WILC_IP_TIMEOUT_MS 15000 static void clear_during_ip(struct timer_list *t) { @@ -262,151 +79,36 @@ static void clear_during_ip(struct timer_list *t) vif->obtaining_ip = false; } -static int is_network_in_shadow(struct network_info *nw_info, - struct wilc_priv *priv) -{ - int state = -1; - int i; - - if (priv->scanned_cnt == 0) { - mod_timer(&priv->aging_timer, - jiffies + msecs_to_jiffies(AGING_TIME)); - state = -1; - } else { - for (i = 0; i < priv->scanned_cnt; i++) { - if (memcmp(priv->scanned_shadow[i].bssid, - nw_info->bssid, 6) == 0) { - state = i; - break; - } - } - } - return state; -} - -static void add_network_to_shadow(struct network_info *nw_info, - struct wilc_priv *priv, void *join_params) -{ - int ap_found = is_network_in_shadow(nw_info, priv); - u32 ap_index = 0; - u8 rssi_index = 0; - struct network_info *shadow_nw_info; - - if (priv->scanned_cnt >= MAX_NUM_SCANNED_NETWORKS_SHADOW) - return; - - if (ap_found == -1) { - ap_index = priv->scanned_cnt; - priv->scanned_cnt++; - } else { - ap_index = ap_found; - } - shadow_nw_info = &priv->scanned_shadow[ap_index]; - rssi_index = shadow_nw_info->rssi_history.index; - shadow_nw_info->rssi_history.samples[rssi_index++] = nw_info->rssi; - if (rssi_index == NUM_RSSI) { - rssi_index = 0; - shadow_nw_info->rssi_history.full = true; - } - shadow_nw_info->rssi_history.index = rssi_index; - shadow_nw_info->rssi = nw_info->rssi; - shadow_nw_info->cap_info = nw_info->cap_info; - shadow_nw_info->ssid_len = nw_info->ssid_len; - memcpy(shadow_nw_info->ssid, nw_info->ssid, nw_info->ssid_len); - memcpy(shadow_nw_info->bssid, nw_info->bssid, ETH_ALEN); - shadow_nw_info->beacon_period = nw_info->beacon_period; - shadow_nw_info->dtim_period = nw_info->dtim_period; - shadow_nw_info->ch = nw_info->ch; - shadow_nw_info->tsf_hi = nw_info->tsf_hi; - if (ap_found != -1) - kfree(shadow_nw_info->ies); - shadow_nw_info->ies = kmemdup(nw_info->ies, nw_info->ies_len, - GFP_KERNEL); - if (shadow_nw_info->ies) - shadow_nw_info->ies_len = nw_info->ies_len; - else - shadow_nw_info->ies_len = 0; - shadow_nw_info->time_scan = jiffies; - shadow_nw_info->time_scan_cached = jiffies; - shadow_nw_info->found = 1; - if (ap_found != -1) - kfree(shadow_nw_info->join_params); - shadow_nw_info->join_params = join_params; -} - static void cfg_scan_result(enum scan_event scan_event, - struct network_info *network_info, - void *user_void, void *join_params) + struct wilc_rcvd_net_info *info, void *user_void) { - struct wilc_priv *priv; - struct wiphy *wiphy; - s32 freq; - struct ieee80211_channel *channel; - struct cfg80211_bss *bss = NULL; + struct wilc_priv *priv = user_void; - priv = user_void; if (!priv->cfg_scanning) return; if (scan_event == SCAN_EVENT_NETWORK_FOUND) { - wiphy = priv->dev->ieee80211_ptr->wiphy; - - if (!wiphy || !network_info) - return; + s32 freq; + struct ieee80211_channel *channel; + struct cfg80211_bss *bss; + struct wiphy *wiphy = priv->dev->ieee80211_ptr->wiphy; - if (wiphy->signal_type == CFG80211_SIGNAL_TYPE_UNSPEC && - (((s32)network_info->rssi * 100) < 0 || - ((s32)network_info->rssi * 100) > 100)) + if (!wiphy || !info) return; - freq = ieee80211_channel_to_frequency((s32)network_info->ch, + freq = ieee80211_channel_to_frequency((s32)info->ch, NL80211_BAND_2GHZ); channel = ieee80211_get_channel(wiphy, freq); - if (!channel) return; - if (network_info->new_network) { - if (priv->rcvd_ch_cnt >= MAX_NUM_SCANNED_NETWORKS) - return; - - priv->rcvd_ch_cnt++; - - add_network_to_shadow(network_info, priv, join_params); - - if (memcmp("DIRECT-", network_info->ssid, 7)) - return; - - bss = cfg80211_inform_bss(wiphy, - channel, - CFG80211_BSS_FTYPE_UNKNOWN, - network_info->bssid, - network_info->tsf_hi, - network_info->cap_info, - network_info->beacon_period, - (const u8 *)network_info->ies, - (size_t)network_info->ies_len, - (s32)network_info->rssi * 100, - GFP_KERNEL); + bss = cfg80211_inform_bss_frame(wiphy, channel, info->mgmt, + info->frame_len, + (s32)info->rssi * 100, + GFP_KERNEL); + if (!bss) cfg80211_put_bss(wiphy, bss); - } else { - u32 i; - - for (i = 0; i < priv->rcvd_ch_cnt; i++) { - if (memcmp(priv->scanned_shadow[i].bssid, - network_info->bssid, 6) == 0) - break; - } - - if (i >= priv->rcvd_ch_cnt) - return; - - priv->scanned_shadow[i].rssi = network_info->rssi; - priv->scanned_shadow[i].time_scan = jiffies; - } } else if (scan_event == SCAN_EVENT_DONE) { - refresh_scan(priv, false); - mutex_lock(&priv->scan_req_lock); if (priv->scan_req) { @@ -415,7 +117,6 @@ static void cfg_scan_result(enum scan_event scan_event, }; cfg80211_scan_done(priv->scan_req, &info); - priv->rcvd_ch_cnt = 0; priv->cfg_scanning = false; priv->scan_req = NULL; } @@ -428,9 +129,6 @@ static void cfg_scan_result(enum scan_event scan_event, .aborted = false, }; - update_scan_time(priv); - refresh_scan(priv, false); - cfg80211_scan_done(priv->scan_req, &info); priv->cfg_scanning = false; priv->scan_req = NULL; @@ -439,21 +137,7 @@ static void cfg_scan_result(enum scan_event scan_event, } } -static inline bool wilc_cfg_scan_time_expired(struct wilc_priv *priv, int i) -{ - unsigned long now = jiffies; - - if (time_after(now, priv->scanned_shadow[i].time_scan_cached + - (unsigned long)(nl80211_SCAN_RESULT_EXPIRE - (1 * HZ)))) - return true; - else - return false; -} - -static void cfg_connect_result(enum conn_event conn_disconn_evt, - struct connect_info *conn_info, - u8 mac_status, - struct disconnect_info *disconn_info, +static void cfg_connect_result(enum conn_event conn_disconn_evt, u8 mac_status, void *priv_data) { struct wilc_priv *priv = priv_data; @@ -461,49 +145,28 @@ static void cfg_connect_result(enum conn_event conn_disconn_evt, struct wilc_vif *vif = netdev_priv(dev); struct wilc *wl = vif->wilc; struct host_if_drv *wfi_drv = priv->hif_drv; - u8 null_bssid[ETH_ALEN] = {0}; + struct wilc_conn_info *conn_info = &wfi_drv->conn_info; vif->connecting = false; if (conn_disconn_evt == CONN_DISCONN_EVENT_CONN_RESP) { - u16 connect_status; - - connect_status = conn_info->status; + u16 connect_status = conn_info->status; - if (mac_status == MAC_STATUS_DISCONNECTED && - conn_info->status == WLAN_STATUS_SUCCESS) { + if (mac_status == WILC_MAC_STATUS_DISCONNECTED && + connect_status == WLAN_STATUS_SUCCESS) { connect_status = WLAN_STATUS_UNSPECIFIED_FAILURE; - wilc_wlan_set_bssid(priv->dev, null_bssid, - STATION_MODE); + wilc_wlan_set_bssid(priv->dev, NULL, WILC_STATION_MODE); - if (!wfi_drv->p2p_connect) - wlan_channel = INVALID_CHANNEL; + if (vif->iftype != WILC_CLIENT_MODE) + wl->sta_ch = WILC_INVALID_CHANNEL; netdev_err(dev, "Unspecified failure\n"); } - if (connect_status == WLAN_STATUS_SUCCESS) { - bool scan_refresh = false; - u32 i; - + if (connect_status == WLAN_STATUS_SUCCESS) memcpy(priv->associated_bss, conn_info->bssid, ETH_ALEN); - for (i = 0; i < priv->scanned_cnt; i++) { - if (memcmp(priv->scanned_shadow[i].bssid, - conn_info->bssid, - ETH_ALEN) == 0) { - if (wilc_cfg_scan_time_expired(priv, i)) - scan_refresh = true; - - break; - } - } - - if (scan_refresh) - refresh_scan(priv, true); - } - cfg80211_connect_result(dev, conn_info->bssid, conn_info->req_ies, conn_info->req_ies_len, @@ -511,23 +174,24 @@ static void cfg_connect_result(enum conn_event conn_disconn_evt, conn_info->resp_ies_len, connect_status, GFP_KERNEL); } else if (conn_disconn_evt == CONN_DISCONN_EVENT_DISCONN_NOTIF) { + u16 reason = 0; + vif->obtaining_ip = false; priv->p2p.local_random = 0x01; priv->p2p.recv_random = 0x00; priv->p2p.is_wilc_ie = false; eth_zero_addr(priv->associated_bss); - wilc_wlan_set_bssid(priv->dev, null_bssid, STATION_MODE); + wilc_wlan_set_bssid(priv->dev, NULL, WILC_STATION_MODE); + + if (vif->iftype != WILC_CLIENT_MODE) + wl->sta_ch = WILC_INVALID_CHANNEL; - if (!wfi_drv->p2p_connect) - wlan_channel = INVALID_CHANNEL; if (wfi_drv->ifc_up && dev == wl->vif[1]->ndev) - disconn_info->reason = 3; + reason = 3; else if (!wfi_drv->ifc_up && dev == wl->vif[1]->ndev) - disconn_info->reason = 1; + reason = 1; - cfg80211_disconnected(dev, disconn_info->reason, - disconn_info->ie, disconn_info->ie_len, - false, GFP_KERNEL); + cfg80211_disconnected(dev, reason, NULL, 0, false, GFP_KERNEL); } } @@ -541,7 +205,7 @@ static int set_channel(struct wiphy *wiphy, channelnum = ieee80211_frequency_to_channel(chandef->chan->center_freq); - curr_channel = channelnum; + vif->wilc->op_ch = channelnum; result = wilc_set_mac_chnl_num(vif, channelnum); if (result != 0) @@ -552,22 +216,23 @@ static int set_channel(struct wiphy *wiphy, static inline int wilc_wfi_cfg_alloc_fill_ssid(struct cfg80211_scan_request *request, - struct hidden_network *ntwk) + struct wilc_probe_ssid *search) { int i; int slot_id = 0; - ntwk->net_info = kcalloc(request->n_ssids, sizeof(*ntwk->net_info), - GFP_KERNEL); - if (!ntwk->net_info) + search->ssid_info = kcalloc(request->n_ssids, + sizeof(*search->ssid_info), GFP_KERNEL); + if (!search->ssid_info) goto out; - ntwk->n_ssids = request->n_ssids; + search->n_ssids = request->n_ssids; for (i = 0; i < request->n_ssids; i++) { if (request->ssids[i].ssid_len > 0) { - struct hidden_net_info *info = &ntwk->net_info[slot_id]; + struct wilc_probe_ssid_info *info; + info = &search->ssid_info[slot_id]; info->ssid = kmemdup(request->ssids[i].ssid, request->ssids[i].ssid_len, GFP_KERNEL); @@ -577,7 +242,7 @@ wilc_wfi_cfg_alloc_fill_ssid(struct cfg80211_scan_request *request, info->ssid_len = request->ssids[i].ssid_len; slot_id++; } else { - ntwk->n_ssids -= 1; + search->n_ssids -= 1; } } return 0; @@ -585,9 +250,9 @@ wilc_wfi_cfg_alloc_fill_ssid(struct cfg80211_scan_request *request, out_free: for (i = 0; i < slot_id; i++) - kfree(ntwk->net_info[i].ssid); + kfree(search->ssid_info[i].ssid); - kfree(ntwk->net_info); + kfree(search->ssid_info); out: return -ENOMEM; @@ -599,48 +264,48 @@ static int scan(struct wiphy *wiphy, struct cfg80211_scan_request *request) struct wilc_vif *vif = netdev_priv(priv->dev); u32 i; int ret = 0; - u8 scan_ch_list[MAX_NUM_SCANNED_NETWORKS]; - struct hidden_network hidden_ntwk; + u8 scan_ch_list[WILC_MAX_NUM_SCANNED_CH]; + struct wilc_probe_ssid probe_ssid; - priv->scan_req = request; - - priv->rcvd_ch_cnt = 0; - - reset_shadow_found(priv); + if (request->n_channels > WILC_MAX_NUM_SCANNED_CH) { + netdev_err(priv->dev, "Requested scanned channels over\n"); + return -EINVAL; + } + priv->scan_req = request; priv->cfg_scanning = true; - if (request->n_channels <= MAX_NUM_SCANNED_NETWORKS) { - for (i = 0; i < request->n_channels; i++) { - u16 freq = request->channels[i]->center_freq; + for (i = 0; i < request->n_channels; i++) { + u16 freq = request->channels[i]->center_freq; - scan_ch_list[i] = ieee80211_frequency_to_channel(freq); - } - - if (request->n_ssids >= 1) { - if (wilc_wfi_cfg_alloc_fill_ssid(request, - &hidden_ntwk)) - return -ENOMEM; + scan_ch_list[i] = ieee80211_frequency_to_channel(freq); + } - ret = wilc_scan(vif, USER_SCAN, ACTIVE_SCAN, - scan_ch_list, - request->n_channels, - (const u8 *)request->ie, - request->ie_len, cfg_scan_result, - (void *)priv, &hidden_ntwk); - } else { - ret = wilc_scan(vif, USER_SCAN, ACTIVE_SCAN, - scan_ch_list, - request->n_channels, - (const u8 *)request->ie, - request->ie_len, cfg_scan_result, - (void *)priv, NULL); + if (request->n_ssids >= 1) { + if (wilc_wfi_cfg_alloc_fill_ssid(request, &probe_ssid)) { + ret = -ENOMEM; + goto out; } + + ret = wilc_scan(vif, WILC_FW_USER_SCAN, + WILC_FW_ACTIVE_SCAN, scan_ch_list, + request->n_channels, + (const u8 *)request->ie, + request->ie_len, cfg_scan_result, + (void *)priv, &probe_ssid); } else { - netdev_err(priv->dev, "Requested scanned channels over\n"); + ret = wilc_scan(vif, WILC_FW_USER_SCAN, + WILC_FW_ACTIVE_SCAN, scan_ch_list, + request->n_channels, + (const u8 *)request->ie, + request->ie_len, cfg_scan_result, + (void *)priv, NULL); } - if (ret != 0) - ret = -EBUSY; +out: + if (ret) { + priv->scan_req = NULL; + priv->cfg_scanning = false; + } return ret; } @@ -651,61 +316,24 @@ static int connect(struct wiphy *wiphy, struct net_device *dev, struct wilc_priv *priv = wiphy_priv(wiphy); struct wilc_vif *vif = netdev_priv(priv->dev); struct host_if_drv *wfi_drv = priv->hif_drv; - struct network_info *nw_info; int ret; u32 i; - u32 sel_bssi_idx = UINT_MAX; - u8 security = NO_ENCRYPT; - enum authtype auth_type = ANY; + u8 security = WILC_FW_SEC_NO; + enum authtype auth_type = WILC_FW_AUTH_ANY; u32 cipher_group; + struct cfg80211_bss *bss; + void *join_params; + u8 ch; vif->connecting = true; - if (!(strncmp(sme->ssid, "DIRECT-", 7))) - wfi_drv->p2p_connect = 1; - else - wfi_drv->p2p_connect = 0; - - for (i = 0; i < priv->scanned_cnt; i++) { - if (sme->ssid_len == priv->scanned_shadow[i].ssid_len && - memcmp(priv->scanned_shadow[i].ssid, - sme->ssid, - sme->ssid_len) == 0) { - if (!sme->bssid) { - if (sel_bssi_idx == UINT_MAX || - priv->scanned_shadow[i].rssi > - priv->scanned_shadow[sel_bssi_idx].rssi) - sel_bssi_idx = i; - } else { - if (memcmp(priv->scanned_shadow[i].bssid, - sme->bssid, - ETH_ALEN) == 0) { - sel_bssi_idx = i; - break; - } - } - } - } - - if (sel_bssi_idx < priv->scanned_cnt) { - nw_info = &priv->scanned_shadow[sel_bssi_idx]; - } else { - ret = -ENOENT; - goto out_error; - } - - if (ether_addr_equal_unaligned(vif->bssid, nw_info->bssid)) { - ret = -EALREADY; - goto out_error; - } - memset(priv->wep_key, 0, sizeof(priv->wep_key)); memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len)); cipher_group = sme->crypto.cipher_group; - if (cipher_group != NO_ENCRYPT) { + if (cipher_group != 0) { if (cipher_group == WLAN_CIPHER_SUITE_WEP40) { - security = ENCRYPT_ENABLED | WEP; + security = WILC_FW_SEC_WEP; priv->wep_key_len[sme->key_idx] = sme->key_len; memcpy(priv->wep_key[sme->key_idx], sme->key, @@ -715,7 +343,7 @@ static int connect(struct wiphy *wiphy, struct net_device *dev, wilc_add_wep_key_bss_sta(vif, sme->key, sme->key_len, sme->key_idx); } else if (cipher_group == WLAN_CIPHER_SUITE_WEP104) { - security = ENCRYPT_ENABLED | WEP | WEP_EXTENDED; + security = WILC_FW_SEC_WEP_EXTENDED; priv->wep_key_len[sme->key_idx] = sme->key_len; memcpy(priv->wep_key[sme->key_idx], sme->key, @@ -726,14 +354,14 @@ static int connect(struct wiphy *wiphy, struct net_device *dev, sme->key_idx); } else if (sme->crypto.wpa_versions & NL80211_WPA_VERSION_2) { if (cipher_group == WLAN_CIPHER_SUITE_TKIP) - security = ENCRYPT_ENABLED | WPA2 | TKIP; + security = WILC_FW_SEC_WPA2_TKIP; else - security = ENCRYPT_ENABLED | WPA2 | AES; + security = WILC_FW_SEC_WPA2_AES; } else if (sme->crypto.wpa_versions & NL80211_WPA_VERSION_1) { if (cipher_group == WLAN_CIPHER_SUITE_TKIP) - security = ENCRYPT_ENABLED | WPA | TKIP; + security = WILC_FW_SEC_WPA_TKIP; else - security = ENCRYPT_ENABLED | WPA | AES; + security = WILC_FW_SEC_WPA_AES; } else { ret = -ENOTSUPP; netdev_err(dev, "%s: Unsupported cipher\n", @@ -748,19 +376,19 @@ static int connect(struct wiphy *wiphy, struct net_device *dev, u32 ciphers_pairwise = sme->crypto.ciphers_pairwise[i]; if (ciphers_pairwise == WLAN_CIPHER_SUITE_TKIP) - security = security | TKIP; + security |= WILC_FW_TKIP; else - security = security | AES; + security |= WILC_FW_AES; } } switch (sme->auth_type) { case NL80211_AUTHTYPE_OPEN_SYSTEM: - auth_type = OPEN_SYSTEM; + auth_type = WILC_FW_AUTH_OPEN_SYSTEM; break; case NL80211_AUTHTYPE_SHARED_KEY: - auth_type = SHARED_KEY; + auth_type = WILC_FW_AUTH_SHARED_KEY; break; default: @@ -769,32 +397,68 @@ static int connect(struct wiphy *wiphy, struct net_device *dev, if (sme->crypto.n_akm_suites) { if (sme->crypto.akm_suites[0] == WLAN_AKM_SUITE_8021X) - auth_type = IEEE8021; + auth_type = WILC_FW_AUTH_IEEE8021; } - curr_channel = nw_info->ch; + if (wfi_drv->usr_scan_req.scan_result) { + netdev_err(vif->ndev, "%s: Scan in progress\n", __func__); + ret = -EBUSY; + goto out_error; + } - if (!wfi_drv->p2p_connect) - wlan_channel = nw_info->ch; + bss = cfg80211_get_bss(wiphy, sme->channel, sme->bssid, sme->ssid, + sme->ssid_len, IEEE80211_BSS_TYPE_ANY, + IEEE80211_PRIVACY(sme->privacy)); + if (!bss) { + ret = -EINVAL; + goto out_error; + } - wilc_wlan_set_bssid(dev, nw_info->bssid, STATION_MODE); + if (ether_addr_equal_unaligned(vif->bssid, bss->bssid)) { + ret = -EALREADY; + goto out_put_bss; + } - ret = wilc_set_join_req(vif, nw_info->bssid, sme->ssid, - sme->ssid_len, sme->ie, sme->ie_len, - cfg_connect_result, (void *)priv, - security, auth_type, - nw_info->ch, - nw_info->join_params); - if (ret) { - u8 null_bssid[ETH_ALEN] = {0}; + join_params = wilc_parse_join_bss_param(bss, &sme->crypto); + if (!join_params) { + netdev_err(dev, "%s: failed to construct join param\n", + __func__); + ret = -EINVAL; + goto out_put_bss; + } + + ch = ieee80211_frequency_to_channel(bss->channel->center_freq); + vif->wilc->op_ch = ch; + if (vif->iftype != WILC_CLIENT_MODE) + vif->wilc->sta_ch = ch; + wilc_wlan_set_bssid(dev, bss->bssid, WILC_STATION_MODE); + + wfi_drv->conn_info.security = security; + wfi_drv->conn_info.auth_type = auth_type; + wfi_drv->conn_info.ch = ch; + wfi_drv->conn_info.conn_result = cfg_connect_result; + wfi_drv->conn_info.arg = priv; + wfi_drv->conn_info.param = join_params; + + ret = wilc_set_join_req(vif, bss->bssid, sme->ie, sme->ie_len); + if (ret) { netdev_err(dev, "wilc_set_join_req(): Error\n"); ret = -ENOENT; - wilc_wlan_set_bssid(dev, null_bssid, STATION_MODE); - goto out_error; - } + if (vif->iftype != WILC_CLIENT_MODE) + vif->wilc->sta_ch = WILC_INVALID_CHANNEL; + wilc_wlan_set_bssid(dev, NULL, WILC_STATION_MODE); + wfi_drv->conn_info.conn_result = NULL; + kfree(join_params); + goto out_put_bss; + } + kfree(join_params); + cfg80211_put_bss(wiphy, bss); return 0; +out_put_bss: + cfg80211_put_bss(wiphy, bss); + out_error: vif->connecting = false; return ret; @@ -806,9 +470,7 @@ static int disconnect(struct wiphy *wiphy, struct net_device *dev, struct wilc_priv *priv = wiphy_priv(wiphy); struct wilc_vif *vif = netdev_priv(priv->dev); struct wilc *wilc = vif->wilc; - struct host_if_drv *wfi_drv; int ret; - u8 null_bssid[ETH_ALEN] = {0}; vif->connecting = false; @@ -821,17 +483,16 @@ static int disconnect(struct wiphy *wiphy, struct net_device *dev, return 0; } - wfi_drv = (struct host_if_drv *)priv->hif_drv; - if (!wfi_drv->p2p_connect) - wlan_channel = INVALID_CHANNEL; - wilc_wlan_set_bssid(priv->dev, null_bssid, STATION_MODE); + if (vif->iftype != WILC_CLIENT_MODE) + wilc->sta_ch = WILC_INVALID_CHANNEL; + wilc_wlan_set_bssid(priv->dev, NULL, WILC_STATION_MODE); priv->p2p.local_random = 0x01; priv->p2p.recv_random = 0x00; priv->p2p.is_wilc_ie = false; - wfi_drv->p2p_timeout = 0; + priv->hif_drv->p2p_timeout = 0; - ret = wilc_disconnect(vif, reason_code); + ret = wilc_disconnect(vif); if (ret != 0) { netdev_err(priv->dev, "Error in disconnecting\n"); ret = -EINVAL; @@ -900,7 +561,7 @@ static int add_key(struct wiphy *wiphy, struct net_device *netdev, u8 key_index, struct wilc_priv *priv = wiphy_priv(wiphy); const u8 *rx_mic = NULL; const u8 *tx_mic = NULL; - u8 mode = NO_ENCRYPT; + u8 mode = WILC_FW_SEC_NO; u8 op_mode; struct wilc_vif *vif = netdev_priv(netdev); @@ -911,14 +572,14 @@ static int add_key(struct wiphy *wiphy, struct net_device *netdev, u8 key_index, wilc_wfi_cfg_copy_wep_info(priv, key_index, params); if (params->cipher == WLAN_CIPHER_SUITE_WEP40) - mode = ENCRYPT_ENABLED | WEP; + mode = WILC_FW_SEC_WEP; else - mode = ENCRYPT_ENABLED | WEP | WEP_EXTENDED; + mode = WILC_FW_SEC_WEP_EXTENDED; ret = wilc_add_wep_key_bss_ap(vif, params->key, params->key_len, key_index, mode, - OPEN_SYSTEM); + WILC_FW_AUTH_OPEN_SYSTEM); break; } if (memcmp(params->key, priv->wep_key[key_index], @@ -951,18 +612,18 @@ static int add_key(struct wiphy *wiphy, struct net_device *netdev, u8 key_index, if (!pairwise) { if (params->cipher == WLAN_CIPHER_SUITE_TKIP) - mode = ENCRYPT_ENABLED | WPA | TKIP; + mode = WILC_FW_SEC_WPA_TKIP; else - mode = ENCRYPT_ENABLED | WPA2 | AES; + mode = WILC_FW_SEC_WPA2_AES; priv->wilc_groupkey = mode; key = priv->wilc_gtk[key_index]; } else { if (params->cipher == WLAN_CIPHER_SUITE_TKIP) - mode = ENCRYPT_ENABLED | WPA | TKIP; + mode = WILC_FW_SEC_WPA_TKIP; else - mode = priv->wilc_groupkey | AES; + mode = priv->wilc_groupkey | WILC_FW_AES; key = priv->wilc_ptk[key_index]; } @@ -970,7 +631,7 @@ static int add_key(struct wiphy *wiphy, struct net_device *netdev, u8 key_index, if (ret) return -ENOMEM; - op_mode = AP_MODE; + op_mode = WILC_AP_MODE; } else { if (params->key_len > 16 && params->cipher == WLAN_CIPHER_SUITE_TKIP) { @@ -979,7 +640,7 @@ static int add_key(struct wiphy *wiphy, struct net_device *netdev, u8 key_index, keylen = params->key_len - 16; } - op_mode = STATION_MODE; + op_mode = WILC_STATION_MODE; } if (!pairwise) @@ -1088,7 +749,7 @@ static int get_station(struct wiphy *wiphy, struct net_device *dev, u32 associatedsta = ~0; u32 inactive_time = 0; - if (vif->iftype == AP_MODE || vif->iftype == GO_MODE) { + if (vif->iftype == WILC_AP_MODE || vif->iftype == WILC_GO_MODE) { for (i = 0; i < NUM_STA_ASSOCIATED; i++) { if (!(memcmp(mac, priv->assoc_stainfo.sta_associated_bss[i], @@ -1107,10 +768,10 @@ static int get_station(struct wiphy *wiphy, struct net_device *dev, wilc_get_inactive_time(vif, mac, &inactive_time); sinfo->inactive_time = 1000 * inactive_time; - } else if (vif->iftype == STATION_MODE) { + } else if (vif->iftype == WILC_STATION_MODE) { struct rf_info stats; - wilc_get_statistics(vif, &stats, true); + wilc_get_statistics(vif, &stats); sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL) | BIT_ULL(NL80211_STA_INFO_RX_PACKETS) | @@ -1149,21 +810,45 @@ static int set_wiphy_params(struct wiphy *wiphy, u32 changed) cfg_param_val.flag = 0; if (changed & WIPHY_PARAM_RETRY_SHORT) { - cfg_param_val.flag |= RETRY_SHORT; + netdev_dbg(vif->ndev, + "Setting WIPHY_PARAM_RETRY_SHORT %d\n", + wiphy->retry_short); + cfg_param_val.flag |= WILC_CFG_PARAM_RETRY_SHORT; cfg_param_val.short_retry_limit = wiphy->retry_short; } if (changed & WIPHY_PARAM_RETRY_LONG) { - cfg_param_val.flag |= RETRY_LONG; + netdev_dbg(vif->ndev, + "Setting WIPHY_PARAM_RETRY_LONG %d\n", + wiphy->retry_long); + cfg_param_val.flag |= WILC_CFG_PARAM_RETRY_LONG; cfg_param_val.long_retry_limit = wiphy->retry_long; } if (changed & WIPHY_PARAM_FRAG_THRESHOLD) { - cfg_param_val.flag |= FRAG_THRESHOLD; - cfg_param_val.frag_threshold = wiphy->frag_threshold; + if (wiphy->frag_threshold > 255 && + wiphy->frag_threshold < 7937) { + netdev_dbg(vif->ndev, + "Setting WIPHY_PARAM_FRAG_THRESHOLD %d\n", + wiphy->frag_threshold); + cfg_param_val.flag |= WILC_CFG_PARAM_FRAG_THRESHOLD; + cfg_param_val.frag_threshold = wiphy->frag_threshold; + } else { + netdev_err(vif->ndev, + "Fragmentation threshold out of range\n"); + return -EINVAL; + } } if (changed & WIPHY_PARAM_RTS_THRESHOLD) { - cfg_param_val.flag |= RTS_THRESHOLD; - cfg_param_val.rts_threshold = wiphy->rts_threshold; + if (wiphy->rts_threshold > 255) { + netdev_dbg(vif->ndev, + "Setting WIPHY_PARAM_RTS_THRESHOLD %d\n", + wiphy->rts_threshold); + cfg_param_val.flag |= WILC_CFG_PARAM_RTS_THRESHOLD; + cfg_param_val.rts_threshold = wiphy->rts_threshold; + } else { + netdev_err(vif->ndev, "RTS threshold out of range\n"); + return -EINVAL; + } } ret = wilc_hif_set_cfg(vif, &cfg_param_val); @@ -1193,7 +878,7 @@ static int set_pmksa(struct wiphy *wiphy, struct net_device *netdev, memcpy(priv->pmkid_list.pmkidlist[i].bssid, pmksa->bssid, ETH_ALEN); memcpy(priv->pmkid_list.pmkidlist[i].pmkid, pmksa->pmkid, - PMKID_LEN); + WLAN_PMKID_LEN); if (!(flag == PMKID_FOUND)) priv->pmkid_list.numpmkid++; } else { @@ -1218,7 +903,7 @@ static int del_pmksa(struct wiphy *wiphy, struct net_device *netdev, if (!memcmp(pmksa->bssid, priv->pmkid_list.pmkidlist[i].bssid, ETH_ALEN)) { memset(&priv->pmkid_list.pmkidlist[i], 0, - sizeof(struct host_if_pmkid)); + sizeof(struct wilc_pmkid)); break; } } @@ -1230,7 +915,7 @@ static int del_pmksa(struct wiphy *wiphy, struct net_device *netdev, ETH_ALEN); memcpy(priv->pmkid_list.pmkidlist[i].pmkid, priv->pmkid_list.pmkidlist[i + 1].pmkid, - PMKID_LEN); + WLAN_PMKID_LEN); } priv->pmkid_list.numpmkid--; } else { @@ -1244,13 +929,13 @@ static int flush_pmksa(struct wiphy *wiphy, struct net_device *netdev) { struct wilc_priv *priv = wiphy_priv(wiphy); - memset(&priv->pmkid_list, 0, sizeof(struct host_if_pmkid_attr)); + memset(&priv->pmkid_list, 0, sizeof(struct wilc_pmkid_attr)); return 0; } static inline void wilc_wfi_cfg_parse_ch_attr(u8 *buf, u8 ch_list_attr_idx, - u8 op_ch_attr_idx) + u8 op_ch_attr_idx, u8 sta_ch) { int i = 0; int j = 0; @@ -1261,7 +946,7 @@ static inline void wilc_wfi_cfg_parse_ch_attr(u8 *buf, u8 ch_list_attr_idx, for (i = ch_list_attr_idx + 3; i < limit; i++) { if (buf[i] == 0x51) { for (j = i + 2; j < ((i + 2) + buf[i + 1]); j++) - buf[j] = wlan_channel; + buf[j] = sta_ch; break; } } @@ -1269,11 +954,11 @@ static inline void wilc_wfi_cfg_parse_ch_attr(u8 *buf, u8 ch_list_attr_idx, if (op_ch_attr_idx) { buf[op_ch_attr_idx + 6] = 0x51; - buf[op_ch_attr_idx + 7] = wlan_channel; + buf[op_ch_attr_idx + 7] = sta_ch; } } -static void wilc_wfi_cfg_parse_rx_action(u8 *buf, u32 len) +static void wilc_wfi_cfg_parse_rx_action(u8 *buf, u32 len, u8 sta_ch) { u32 index = 0; u8 op_channel_attr_index = 0; @@ -1289,13 +974,13 @@ static void wilc_wfi_cfg_parse_rx_action(u8 *buf, u32 len) op_channel_attr_index = index; index += buf[index + 1] + 3; } - if (wlan_channel != INVALID_CHANNEL) + if (sta_ch != WILC_INVALID_CHANNEL) wilc_wfi_cfg_parse_ch_attr(buf, channel_list_attr_index, - op_channel_attr_index); + op_channel_attr_index, sta_ch); } static void wilc_wfi_cfg_parse_tx_action(u8 *buf, u32 len, bool oper_ch, - u8 iftype) + u8 iftype, u8 sta_ch) { u32 index = 0; u8 op_channel_attr_index = 0; @@ -1314,9 +999,9 @@ static void wilc_wfi_cfg_parse_tx_action(u8 *buf, u32 len, bool oper_ch, op_channel_attr_index = index; index += buf[index + 1] + 3; } - if (wlan_channel != INVALID_CHANNEL && oper_ch) + if (sta_ch != WILC_INVALID_CHANNEL && oper_ch) wilc_wfi_cfg_parse_ch_attr(buf, channel_list_attr_index, - op_channel_attr_index); + op_channel_attr_index, sta_ch); } static void wilc_wfi_cfg_parse_rx_vendor_spec(struct wilc_priv *priv, u8 *buff, @@ -1351,7 +1036,8 @@ static void wilc_wfi_cfg_parse_rx_vendor_spec(struct wilc_priv *priv, u8 *buff, if (buff[i] == P2PELEM_ATTR_ID && !(memcmp(p2p_oui, &buff[i + 2], 4))) { wilc_wfi_cfg_parse_rx_action(&buff[i + 6], - size - (i + 6)); + size - (i + 6), + vif->wilc->sta_ch); break; } } @@ -1362,6 +1048,8 @@ void wilc_wfi_p2p_rx(struct net_device *dev, u8 *buff, u32 size) { struct wilc_priv *priv = wiphy_priv(dev->ieee80211_ptr->wiphy); struct host_if_drv *wfi_drv = priv->hif_drv; + struct wilc_vif *vif = netdev_priv(dev); + struct wilc *wl = vif->wilc; u32 header, pkt_offset; s32 freq; __le16 fc; @@ -1382,7 +1070,7 @@ void wilc_wfi_p2p_rx(struct net_device *dev, u8 *buff, u32 size) return; } - freq = ieee80211_channel_to_frequency(curr_channel, NL80211_BAND_2GHZ); + freq = ieee80211_channel_to_frequency(wl->op_ch, NL80211_BAND_2GHZ); fc = ((struct ieee80211_hdr *)buff)->frame_control; if (!ieee80211_is_action(fc)) { @@ -1427,33 +1115,18 @@ void wilc_wfi_p2p_rx(struct net_device *dev, u8 *buff, u32 size) static void wilc_wfi_mgmt_tx_complete(void *priv, int status) { - struct p2p_mgmt_data *pv_data = priv; + struct wilc_p2p_mgmt_data *pv_data = priv; kfree(pv_data->buff); kfree(pv_data); } -static void wilc_wfi_remain_on_channel_ready(void *priv_data) -{ - struct wilc_priv *priv; - - priv = priv_data; - - priv->p2p_listen_state = true; - - cfg80211_ready_on_channel(priv->wdev, - priv->remain_on_ch_params.listen_cookie, - priv->remain_on_ch_params.listen_ch, - priv->remain_on_ch_params.listen_duration, - GFP_KERNEL); -} - -static void wilc_wfi_remain_on_channel_expired(void *data, u32 session_id) +static void wilc_wfi_remain_on_channel_expired(void *data, u64 cookie) { struct wilc_priv *priv = data; struct wilc_wfi_p2p_listen_params *params = &priv->remain_on_ch_params; - if (session_id != params->listen_session_id) + if (cookie != params->listen_cookie) return; priv->p2p_listen_state = false; @@ -1470,24 +1143,36 @@ static int remain_on_channel(struct wiphy *wiphy, int ret = 0; struct wilc_priv *priv = wiphy_priv(wiphy); struct wilc_vif *vif = netdev_priv(priv->dev); + u64 id; if (wdev->iftype == NL80211_IFTYPE_AP) { netdev_dbg(vif->ndev, "Required while in AP mode\n"); return ret; } - curr_channel = chan->hw_value; + id = ++priv->inc_roc_cookie; + if (id == 0) + id = ++priv->inc_roc_cookie; + + ret = wilc_remain_on_channel(vif, id, duration, chan->hw_value, + wilc_wfi_remain_on_channel_expired, + (void *)priv); + if (ret) + return ret; + + vif->wilc->op_ch = chan->hw_value; priv->remain_on_ch_params.listen_ch = chan; - priv->remain_on_ch_params.listen_cookie = *cookie; + priv->remain_on_ch_params.listen_cookie = id; + *cookie = id; + priv->p2p_listen_state = true; priv->remain_on_ch_params.listen_duration = duration; - priv->remain_on_ch_params.listen_session_id++; - return wilc_remain_on_channel(vif, - priv->remain_on_ch_params.listen_session_id, - duration, chan->hw_value, - wilc_wfi_remain_on_channel_expired, - wilc_wfi_remain_on_channel_ready, (void *)priv); + cfg80211_ready_on_channel(wdev, *cookie, chan, duration, GFP_KERNEL); + mod_timer(&vif->hif_drv->remain_on_ch_timer, + jiffies + msecs_to_jiffies(duration)); + + return ret; } static int cancel_remain_on_channel(struct wiphy *wiphy, @@ -1497,12 +1182,14 @@ static int cancel_remain_on_channel(struct wiphy *wiphy, struct wilc_priv *priv = wiphy_priv(wiphy); struct wilc_vif *vif = netdev_priv(priv->dev); - return wilc_listen_state_expired(vif, - priv->remain_on_ch_params.listen_session_id); + if (cookie != priv->remain_on_ch_params.listen_cookie) + return -ENOENT; + + return wilc_listen_state_expired(vif, cookie); } static void wilc_wfi_cfg_tx_vendor_spec(struct wilc_priv *priv, - struct p2p_mgmt_data *mgmt_tx, + struct wilc_p2p_mgmt_data *mgmt_tx, struct cfg80211_mgmt_tx_params *params, u8 iftype, u32 buf_len) { @@ -1510,6 +1197,7 @@ static void wilc_wfi_cfg_tx_vendor_spec(struct wilc_priv *priv, size_t len = params->len; u32 i; u8 subtype = buf[P2P_PUB_ACTION_SUBTYPE]; + struct wilc_vif *vif = netdev_priv(priv->dev); if (subtype == GO_NEG_REQ || subtype == GO_NEG_RSP) { if (priv->p2p.local_random == 1 && @@ -1534,7 +1222,8 @@ static void wilc_wfi_cfg_tx_vendor_spec(struct wilc_priv *priv, oper_ch = true; wilc_wfi_cfg_parse_tx_action(tx_buff, len - (i + 6), - oper_ch, iftype); + oper_ch, iftype, + vif->wilc->sta_ch); break; } @@ -1560,14 +1249,14 @@ static int mgmt_tx(struct wiphy *wiphy, const u8 *buf = params->buf; size_t len = params->len; const struct ieee80211_mgmt *mgmt; - struct p2p_mgmt_data *mgmt_tx; + struct wilc_p2p_mgmt_data *mgmt_tx; struct wilc_priv *priv = wiphy_priv(wiphy); struct host_if_drv *wfi_drv = priv->hif_drv; struct wilc_vif *vif = netdev_priv(wdev->netdev); u32 buf_len = len + sizeof(p2p_vendor_spec) + sizeof(priv->p2p.local_random); int ret = 0; - *cookie = (unsigned long)buf; + *cookie = prandom_u32(); priv->tx_cookie = *cookie; mgmt = (const struct ieee80211_mgmt *)buf; @@ -1592,7 +1281,7 @@ static int mgmt_tx(struct wiphy *wiphy, if (ieee80211_is_probe_resp(mgmt->frame_control)) { wilc_set_mac_chnl_num(vif, chan->hw_value); - curr_channel = chan->hw_value; + vif->wilc->op_ch = chan->hw_value; goto out_txq_add_pkt; } @@ -1603,7 +1292,7 @@ static int mgmt_tx(struct wiphy *wiphy, if (buf[ACTION_SUBTYPE_ID] != PUBLIC_ACT_VENDORSPEC || buf[P2P_PUB_ACTION_SUBTYPE] != GO_NEG_CONF) { wilc_set_mac_chnl_num(vif, chan->hw_value); - curr_channel = chan->hw_value; + vif->wilc->op_ch = chan->hw_value; } switch (buf[ACTION_SUBTYPE_ID]) { case GAS_INITIAL_REQ: @@ -1676,12 +1365,12 @@ void wilc_mgmt_frame_register(struct wiphy *wiphy, struct wireless_dev *wdev, return; switch (frame_type) { - case PROBE_REQ: + case IEEE80211_STYPE_PROBE_REQ: vif->frame_reg[0].type = frame_type; vif->frame_reg[0].reg = reg; break; - case ACTION: + case IEEE80211_STYPE_ACTION: vif->frame_reg[1].type = frame_type; vif->frame_reg[1].reg = reg; break; @@ -1706,13 +1395,16 @@ static int dump_station(struct wiphy *wiphy, struct net_device *dev, { struct wilc_priv *priv = wiphy_priv(wiphy); struct wilc_vif *vif = netdev_priv(priv->dev); + int ret; if (idx != 0) return -ENOENT; sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); - wilc_get_rssi(vif, &sinfo->signal); + ret = wilc_get_rssi(vif, &sinfo->signal); + if (ret) + return ret; memcpy(mac, priv->associated_bss, ETH_ALEN); return 0; @@ -1753,11 +1445,11 @@ static int change_virtual_intf(struct wiphy *wiphy, struct net_device *dev, dev->ieee80211_ptr->iftype = type; priv->wdev->iftype = type; vif->monitor_flag = 0; - vif->iftype = STATION_MODE; - wilc_set_operation_mode(vif, STATION_MODE); + vif->iftype = WILC_STATION_MODE; + wilc_set_operation_mode(vif, WILC_STATION_MODE); memset(priv->assoc_stainfo.sta_associated_bss, 0, - MAX_NUM_STA * ETH_ALEN); + WILC_MAX_NUM_STA * ETH_ALEN); wl->enable_ps = true; wilc_set_power_mgmt(vif, 1, 0); @@ -1768,8 +1460,8 @@ static int change_virtual_intf(struct wiphy *wiphy, struct net_device *dev, dev->ieee80211_ptr->iftype = type; priv->wdev->iftype = type; vif->monitor_flag = 0; - vif->iftype = CLIENT_MODE; - wilc_set_operation_mode(vif, STATION_MODE); + vif->iftype = WILC_CLIENT_MODE; + wilc_set_operation_mode(vif, WILC_STATION_MODE); wl->enable_ps = false; wilc_set_power_mgmt(vif, 0, 0); @@ -1779,12 +1471,12 @@ static int change_virtual_intf(struct wiphy *wiphy, struct net_device *dev, wl->enable_ps = false; dev->ieee80211_ptr->iftype = type; priv->wdev->iftype = type; - vif->iftype = AP_MODE; + vif->iftype = WILC_AP_MODE; if (wl->initialized) { wilc_set_wfi_drv_handler(vif, wilc_get_vif_idx(vif), - 0, vif->ifc_id, false); - wilc_set_operation_mode(vif, AP_MODE); + 0, vif->ifc_id); + wilc_set_operation_mode(vif, WILC_AP_MODE); wilc_set_power_mgmt(vif, 0, 0); } break; @@ -1792,11 +1484,11 @@ static int change_virtual_intf(struct wiphy *wiphy, struct net_device *dev, case NL80211_IFTYPE_P2P_GO: vif->obtaining_ip = true; mod_timer(&vif->during_ip_timer, - jiffies + msecs_to_jiffies(DURING_IP_TIME_OUT)); - wilc_set_operation_mode(vif, AP_MODE); + jiffies + msecs_to_jiffies(WILC_IP_TIMEOUT_MS)); + wilc_set_operation_mode(vif, WILC_AP_MODE); dev->ieee80211_ptr->iftype = type; priv->wdev->iftype = type; - vif->iftype = GO_MODE; + vif->iftype = WILC_GO_MODE; wl->enable_ps = false; wilc_set_power_mgmt(vif, 0, 0); @@ -1815,21 +1507,17 @@ static int start_ap(struct wiphy *wiphy, struct net_device *dev, { struct wilc_vif *vif = netdev_priv(dev); struct wilc *wl = vif->wilc; - struct cfg80211_beacon_data *beacon = &settings->beacon; int ret; ret = set_channel(wiphy, &settings->chandef); - if (ret != 0) netdev_err(dev, "Error in setting channel\n"); - wilc_wlan_set_bssid(dev, wl->vif[vif->idx]->src_addr, AP_MODE); + wilc_wlan_set_bssid(dev, wl->vif[vif->idx]->src_addr, WILC_AP_MODE); wilc_set_power_mgmt(vif, 0, 0); return wilc_add_beacon(vif, settings->beacon_interval, - settings->dtim_period, beacon->head_len, - (u8 *)beacon->head, beacon->tail_len, - (u8 *)beacon->tail); + settings->dtim_period, &settings->beacon); } static int change_beacon(struct wiphy *wiphy, struct net_device *dev, @@ -1838,9 +1526,7 @@ static int change_beacon(struct wiphy *wiphy, struct net_device *dev, struct wilc_priv *priv = wiphy_priv(wiphy); struct wilc_vif *vif = netdev_priv(priv->dev); - return wilc_add_beacon(vif, 0, 0, beacon->head_len, - (u8 *)beacon->head, beacon->tail_len, - (u8 *)beacon->tail); + return wilc_add_beacon(vif, 0, 0, beacon); } static int stop_ap(struct wiphy *wiphy, struct net_device *dev) @@ -1848,9 +1534,8 @@ static int stop_ap(struct wiphy *wiphy, struct net_device *dev) int ret; struct wilc_priv *priv = wiphy_priv(wiphy); struct wilc_vif *vif = netdev_priv(priv->dev); - u8 null_bssid[ETH_ALEN] = {0}; - wilc_wlan_set_bssid(dev, null_bssid, AP_MODE); + wilc_wlan_set_bssid(dev, NULL, WILC_AP_MODE); ret = wilc_del_beacon(vif); @@ -1865,28 +1550,13 @@ static int add_station(struct wiphy *wiphy, struct net_device *dev, { int ret = 0; struct wilc_priv *priv = wiphy_priv(wiphy); - struct add_sta_param sta_params = { {0} }; struct wilc_vif *vif = netdev_priv(dev); - if (vif->iftype == AP_MODE || vif->iftype == GO_MODE) { - memcpy(sta_params.bssid, mac, ETH_ALEN); + if (vif->iftype == WILC_AP_MODE || vif->iftype == WILC_GO_MODE) { memcpy(priv->assoc_stainfo.sta_associated_bss[params->aid], mac, ETH_ALEN); - sta_params.aid = params->aid; - sta_params.rates_len = params->supported_rates_len; - sta_params.rates = params->supported_rates; - - if (!params->ht_capa) { - sta_params.ht_supported = false; - } else { - sta_params.ht_supported = true; - sta_params.ht_capa = *params->ht_capa; - } - - sta_params.flags_mask = params->sta_flags_mask; - sta_params.flags_set = params->sta_flags_set; - ret = wilc_add_station(vif, &sta_params); + ret = wilc_add_station(vif, mac, params); if (ret) netdev_err(dev, "Host add station fail\n"); } @@ -1903,7 +1573,7 @@ static int del_station(struct wiphy *wiphy, struct net_device *dev, struct wilc_vif *vif = netdev_priv(dev); struct sta_info *info; - if (!(vif->iftype == AP_MODE || vif->iftype == GO_MODE)) + if (!(vif->iftype == WILC_AP_MODE || vif->iftype == WILC_GO_MODE)) return ret; info = &priv->assoc_stainfo; @@ -1921,26 +1591,10 @@ static int change_station(struct wiphy *wiphy, struct net_device *dev, const u8 *mac, struct station_parameters *params) { int ret = 0; - struct add_sta_param sta_params = { {0} }; struct wilc_vif *vif = netdev_priv(dev); - if (vif->iftype == AP_MODE || vif->iftype == GO_MODE) { - memcpy(sta_params.bssid, mac, ETH_ALEN); - sta_params.aid = params->aid; - sta_params.rates_len = params->supported_rates_len; - sta_params.rates = params->supported_rates; - - if (!params->ht_capa) { - sta_params.ht_supported = false; - } else { - sta_params.ht_supported = true; - sta_params.ht_capa = *params->ht_capa; - } - - sta_params.flags_mask = params->sta_flags_mask; - sta_params.flags_set = params->sta_flags_set; - - ret = wilc_edit_station(vif, &sta_params); + if (vif->iftype == WILC_AP_MODE || vif->iftype == WILC_GO_MODE) { + ret = wilc_edit_station(vif, mac, params); if (ret) netdev_err(dev, "Host edit station fail\n"); } @@ -1958,7 +1612,8 @@ static struct wireless_dev *add_virtual_intf(struct wiphy *wiphy, struct net_device *new_ifc; if (type == NL80211_IFTYPE_MONITOR) { - new_ifc = wilc_wfi_init_mon_interface(name, vif->ndev); + new_ifc = wilc_wfi_init_mon_interface(vif->wilc, name, + vif->ndev); if (new_ifc) { vif = netdev_priv(priv->wdev->netdev); vif->monitor_flag = 1; @@ -2095,14 +1750,6 @@ static struct wireless_dev *wilc_wfi_cfg_alloc(void) if (!wdev->wiphy) goto free_mem; - wilc_band_2ghz.ht_cap.ht_supported = 1; - wilc_band_2ghz.ht_cap.cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); - wilc_band_2ghz.ht_cap.mcs.rx_mask[0] = 0xff; - wilc_band_2ghz.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K; - wilc_band_2ghz.ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; - - wdev->wiphy->bands[NL80211_BAND_2GHZ] = &wilc_band_2ghz; - return wdev; free_mem: @@ -2126,15 +1773,33 @@ struct wireless_dev *wilc_create_wiphy(struct net_device *net, priv = wdev_priv(wdev); priv->wdev = wdev; - wdev->wiphy->max_scan_ssids = MAX_NUM_PROBED_SSID; + + memcpy(priv->bitrates, wilc_bitrates, sizeof(wilc_bitrates)); + memcpy(priv->channels, wilc_2ghz_channels, sizeof(wilc_2ghz_channels)); + priv->band.bitrates = priv->bitrates; + priv->band.n_bitrates = ARRAY_SIZE(priv->bitrates); + priv->band.channels = priv->channels; + priv->band.n_channels = ARRAY_SIZE(wilc_2ghz_channels); + + priv->band.ht_cap.ht_supported = 1; + priv->band.ht_cap.cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); + priv->band.ht_cap.mcs.rx_mask[0] = 0xff; + priv->band.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K; + priv->band.ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; + + wdev->wiphy->bands[NL80211_BAND_2GHZ] = &priv->band; + + wdev->wiphy->max_scan_ssids = WILC_MAX_NUM_PROBED_SSID; #ifdef CONFIG_PM wdev->wiphy->wowlan = &wowlan_support; #endif wdev->wiphy->max_num_pmkids = WILC_MAX_NUM_PMKIDS; wdev->wiphy->max_scan_ie_len = 1000; wdev->wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; - wdev->wiphy->cipher_suites = cipher_suites; - wdev->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites); + memcpy(priv->cipher_suites, wilc_cipher_suites, + sizeof(wilc_cipher_suites)); + wdev->wiphy->cipher_suites = priv->cipher_suites; + wdev->wiphy->n_cipher_suites = ARRAY_SIZE(wilc_cipher_suites); wdev->wiphy->mgmt_stypes = wilc_wfi_cfg80211_mgmt_types; wdev->wiphy->max_remain_on_channel_duration = 500; @@ -2166,7 +1831,6 @@ int wilc_init_host_int(struct net_device *net) struct wilc_priv *priv = wdev_priv(net->ieee80211_ptr); struct wilc_vif *vif = netdev_priv(priv->dev); - timer_setup(&priv->aging_timer, remove_network_from_shadow, 0); timer_setup(&vif->during_ip_timer, clear_during_ip, 0); priv->p2p_listen_state = false; @@ -2190,8 +1854,6 @@ void wilc_deinit_host_int(struct net_device *net) mutex_destroy(&priv->scan_req_lock); ret = wilc_deinit(vif); - del_timer_sync(&priv->aging_timer); - clear_shadow_scan(priv); del_timer_sync(&vif->during_ip_timer); if (ret) diff --git a/drivers/staging/wilc1000/wilc_wfi_cfgoperations.h b/drivers/staging/wilc1000/wilc_wfi_cfgoperations.h index 4812c8e2c79b..31dfa1f141f1 100644 --- a/drivers/staging/wilc1000/wilc_wfi_cfgoperations.h +++ b/drivers/staging/wilc1000/wilc_wfi_cfgoperations.h @@ -13,9 +13,10 @@ struct wireless_dev *wilc_create_wiphy(struct net_device *net, void wilc_free_wiphy(struct net_device *net); void wilc_deinit_host_int(struct net_device *net); int wilc_init_host_int(struct net_device *net); -void wilc_wfi_monitor_rx(u8 *buff, u32 size); -void wilc_wfi_deinit_mon_interface(void); -struct net_device *wilc_wfi_init_mon_interface(const char *name, +void wilc_wfi_monitor_rx(struct net_device *mon_dev, u8 *buff, u32 size); +void wilc_wfi_deinit_mon_interface(struct wilc *wl); +struct net_device *wilc_wfi_init_mon_interface(struct wilc *wl, + const char *name, struct net_device *real_dev); void wilc_mgmt_frame_register(struct wiphy *wiphy, struct wireless_dev *wdev, u16 frame_type, bool reg); diff --git a/drivers/staging/wilc1000/wilc_wfi_netdevice.h b/drivers/staging/wilc1000/wilc_wfi_netdevice.h index 4f05a16c778e..df00762487c0 100644 --- a/drivers/staging/wilc1000/wilc_wfi_netdevice.h +++ b/drivers/staging/wilc1000/wilc_wfi_netdevice.h @@ -22,7 +22,6 @@ #define FLOW_CONTROL_UPPER_THRESHOLD 256 #define WILC_MAX_NUM_PMKIDS 16 -#define PMKID_LEN 16 #define PMKID_FOUND 1 #define NUM_STA_ASSOCIATED 8 @@ -58,7 +57,7 @@ struct wilc_wfi_wep_key { }; struct sta_info { - u8 sta_associated_bss[MAX_NUM_STA][ETH_ALEN]; + u8 sta_associated_bss[WILC_MAX_NUM_STA][ETH_ALEN]; }; /*Parameters needed for host interface for remaining on channel*/ @@ -66,7 +65,6 @@ struct wilc_wfi_p2p_listen_params { struct ieee80211_channel *listen_ch; u32 listen_duration; u64 listen_cookie; - u32 listen_session_id; }; struct wilc_p2p_var { @@ -75,6 +73,61 @@ struct wilc_p2p_var { bool is_wilc_ie; }; +static const u32 wilc_cipher_suites[] = { + WLAN_CIPHER_SUITE_WEP40, + WLAN_CIPHER_SUITE_WEP104, + WLAN_CIPHER_SUITE_TKIP, + WLAN_CIPHER_SUITE_CCMP, + WLAN_CIPHER_SUITE_AES_CMAC +}; + +#define CHAN2G(_channel, _freq, _flags) { \ + .band = NL80211_BAND_2GHZ, \ + .center_freq = (_freq), \ + .hw_value = (_channel), \ + .flags = (_flags), \ + .max_antenna_gain = 0, \ + .max_power = 30, \ +} + +static const struct ieee80211_channel wilc_2ghz_channels[] = { + CHAN2G(1, 2412, 0), + CHAN2G(2, 2417, 0), + CHAN2G(3, 2422, 0), + CHAN2G(4, 2427, 0), + CHAN2G(5, 2432, 0), + CHAN2G(6, 2437, 0), + CHAN2G(7, 2442, 0), + CHAN2G(8, 2447, 0), + CHAN2G(9, 2452, 0), + CHAN2G(10, 2457, 0), + CHAN2G(11, 2462, 0), + CHAN2G(12, 2467, 0), + CHAN2G(13, 2472, 0), + CHAN2G(14, 2484, 0) +}; + +#define RATETAB_ENT(_rate, _hw_value, _flags) { \ + .bitrate = (_rate), \ + .hw_value = (_hw_value), \ + .flags = (_flags), \ +} + +static struct ieee80211_rate wilc_bitrates[] = { + RATETAB_ENT(10, 0, 0), + RATETAB_ENT(20, 1, 0), + RATETAB_ENT(55, 2, 0), + RATETAB_ENT(110, 3, 0), + RATETAB_ENT(60, 9, 0), + RATETAB_ENT(90, 6, 0), + RATETAB_ENT(120, 7, 0), + RATETAB_ENT(180, 8, 0), + RATETAB_ENT(240, 9, 0), + RATETAB_ENT(360, 10, 0), + RATETAB_ENT(480, 11, 0), + RATETAB_ENT(540, 12, 0) +}; + struct wilc_priv { struct wireless_dev *wdev; struct cfg80211_scan_request *scan_req; @@ -83,28 +136,31 @@ struct wilc_priv { u64 tx_cookie; bool cfg_scanning; - u32 rcvd_ch_cnt; u8 associated_bss[ETH_ALEN]; struct sta_info assoc_stainfo; struct sk_buff *skb; struct net_device *dev; struct host_if_drv *hif_drv; - struct host_if_pmkid_attr pmkid_list; + struct wilc_pmkid_attr pmkid_list; u8 wep_key[4][WLAN_KEY_LEN_WEP104]; u8 wep_key_len[4]; /* The real interface that the monitor is on */ struct net_device *real_ndev; - struct wilc_wfi_key *wilc_gtk[MAX_NUM_STA]; - struct wilc_wfi_key *wilc_ptk[MAX_NUM_STA]; + struct wilc_wfi_key *wilc_gtk[WILC_MAX_NUM_STA]; + struct wilc_wfi_key *wilc_ptk[WILC_MAX_NUM_STA]; u8 wilc_groupkey; /* mutexes */ struct mutex scan_req_lock; bool p2p_listen_state; - struct timer_list aging_timer; - struct network_info scanned_shadow[MAX_NUM_SCANNED_NETWORKS_SHADOW]; int scanned_cnt; struct wilc_p2p_var p2p; + + struct ieee80211_channel channels[ARRAY_SIZE(wilc_2ghz_channels)]; + struct ieee80211_rate bitrates[ARRAY_SIZE(wilc_bitrates)]; + struct ieee80211_supported_band band; + u32 cipher_suites[ARRAY_SIZE(wilc_cipher_suites)]; + u64 inc_roc_cookie; }; struct frame_reg { @@ -169,7 +225,7 @@ struct wilc { int dev_irq_num; int close; u8 vif_num; - struct wilc_vif *vif[NUM_CONCURRENT_IFC]; + struct wilc_vif *vif[WILC_NUM_CONCURRENT_IFC]; u8 open_ifcs; /*protect head of transmit queue*/ struct mutex txq_add_to_head_cs; @@ -188,10 +244,11 @@ struct wilc { struct task_struct *txq_thread; int quit; - int cfg_frame_in_use; + /* lock to protect issue of wid command to firmware */ + struct mutex cfg_cmd_lock; struct wilc_cfg_frame cfg_frame; u32 cfg_frame_offset; - int cfg_seq_no; + u8 cfg_seq_no; u8 *rx_buffer; u32 rx_buffer_offset; @@ -213,13 +270,18 @@ struct wilc { enum chip_ps_states chip_ps_state; struct wilc_cfg cfg; void *bus_data; + struct net_device *monitor_dev; + /* deinit lock */ + struct mutex deinit_lock; + u8 sta_ch; + u8 op_ch; }; struct wilc_wfi_mon_priv { struct net_device *real_ndev; }; -void wilc_frmw_to_linux(struct wilc *wilc, u8 *buff, u32 size, u32 pkt_offset); +void wilc_frmw_to_host(struct wilc *wilc, u8 *buff, u32 size, u32 pkt_offset); void wilc_mac_indicate(struct wilc *wilc); void wilc_netdev_cleanup(struct wilc *wilc); int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, diff --git a/drivers/staging/wilc1000/wilc_wlan.c b/drivers/staging/wilc1000/wilc_wlan.c index a48c906b2443..c2389695fe20 100644 --- a/drivers/staging/wilc1000/wilc_wlan.c +++ b/drivers/staging/wilc1000/wilc_wlan.c @@ -17,13 +17,13 @@ static inline bool is_wilc1000(u32 id) static inline void acquire_bus(struct wilc *wilc, enum bus_acquire acquire) { mutex_lock(&wilc->hif_cs); - if (acquire == ACQUIRE_AND_WAKEUP) + if (acquire == WILC_BUS_ACQUIRE_AND_WAKEUP) chip_wakeup(wilc); } static inline void release_bus(struct wilc *wilc, enum bus_release release) { - if (release == RELEASE_ALLOW_SLEEP) + if (release == WILC_BUS_RELEASE_ALLOW_SLEEP) chip_allow_sleep(wilc); mutex_unlock(&wilc->hif_cs); } @@ -274,7 +274,8 @@ static int wilc_wlan_txq_add_cfg_pkt(struct wilc_vif *vif, u8 *buffer, } int wilc_wlan_txq_add_net_pkt(struct net_device *dev, void *priv, u8 *buffer, - u32 buffer_size, wilc_tx_complete_func_t func) + u32 buffer_size, + void (*tx_complete_fn)(void *, int)) { struct txq_entry_t *tqe; struct wilc_vif *vif = netdev_priv(dev); @@ -292,7 +293,7 @@ int wilc_wlan_txq_add_net_pkt(struct net_device *dev, void *priv, u8 *buffer, tqe->type = WILC_NET_PKT; tqe->buffer = buffer; tqe->buffer_size = buffer_size; - tqe->tx_complete_func = func; + tqe->tx_complete_func = tx_complete_fn; tqe->priv = priv; tqe->ack_idx = NOT_TCP_ACK; @@ -303,7 +304,8 @@ int wilc_wlan_txq_add_net_pkt(struct net_device *dev, void *priv, u8 *buffer, } int wilc_wlan_txq_add_mgmt_pkt(struct net_device *dev, void *priv, u8 *buffer, - u32 buffer_size, wilc_tx_complete_func_t func) + u32 buffer_size, + void (*tx_complete_fn)(void *, int)) { struct txq_entry_t *tqe; struct wilc_vif *vif = netdev_priv(dev); @@ -321,7 +323,7 @@ int wilc_wlan_txq_add_mgmt_pkt(struct net_device *dev, void *priv, u8 *buffer, tqe->type = WILC_MGMT_PKT; tqe->buffer = buffer; tqe->buffer_size = buffer_size; - tqe->tx_complete_func = func; + tqe->tx_complete_func = tx_complete_fn; tqe->priv = priv; tqe->ack_idx = NOT_TCP_ACK; wilc_wlan_txq_add_to_tail(dev, tqe); @@ -399,7 +401,7 @@ void chip_wakeup(struct wilc *wilc) { u32 reg, clk_status_reg; - if ((wilc->io_type & 0x1) == HIF_SPI) { + if ((wilc->io_type & 0x1) == WILC_HIF_SPI) { do { wilc->hif_func->hif_read_reg(wilc, 1, ®); wilc->hif_func->hif_write_reg(wilc, 1, reg | BIT(1)); @@ -410,7 +412,7 @@ void chip_wakeup(struct wilc *wilc) wilc_get_chipid(wilc, true); } while (wilc_get_chipid(wilc, true) == 0); } while (wilc_get_chipid(wilc, true) == 0); - } else if ((wilc->io_type & 0x1) == HIF_SDIO) { + } else if ((wilc->io_type & 0x1) == WILC_HIF_SDIO) { wilc->hif_func->hif_write_reg(wilc, 0xfa, 1); usleep_range(200, 400); wilc->hif_func->hif_read_reg(wilc, 0xf0, ®); @@ -433,7 +435,7 @@ void chip_wakeup(struct wilc *wilc) } while ((clk_status_reg & 0x1) == 0); } - if (wilc->chip_ps_state == CHIP_SLEEPING_MANUAL) { + if (wilc->chip_ps_state == WILC_CHIP_SLEEPING_MANUAL) { if (wilc_get_chipid(wilc, false) < 0x1002b0) { u32 val32; @@ -446,37 +448,37 @@ void chip_wakeup(struct wilc *wilc) wilc->hif_func->hif_write_reg(wilc, 0x1e9c, val32); } } - wilc->chip_ps_state = CHIP_WAKEDUP; + wilc->chip_ps_state = WILC_CHIP_WAKEDUP; } EXPORT_SYMBOL_GPL(chip_wakeup); void wilc_chip_sleep_manually(struct wilc *wilc) { - if (wilc->chip_ps_state != CHIP_WAKEDUP) + if (wilc->chip_ps_state != WILC_CHIP_WAKEDUP) return; - acquire_bus(wilc, ACQUIRE_ONLY); + acquire_bus(wilc, WILC_BUS_ACQUIRE_ONLY); chip_allow_sleep(wilc); wilc->hif_func->hif_write_reg(wilc, 0x10a8, 1); - wilc->chip_ps_state = CHIP_SLEEPING_MANUAL; - release_bus(wilc, RELEASE_ONLY); + wilc->chip_ps_state = WILC_CHIP_SLEEPING_MANUAL; + release_bus(wilc, WILC_BUS_RELEASE_ONLY); } EXPORT_SYMBOL_GPL(wilc_chip_sleep_manually); void host_wakeup_notify(struct wilc *wilc) { - acquire_bus(wilc, ACQUIRE_ONLY); + acquire_bus(wilc, WILC_BUS_ACQUIRE_ONLY); wilc->hif_func->hif_write_reg(wilc, 0x10b0, 1); - release_bus(wilc, RELEASE_ONLY); + release_bus(wilc, WILC_BUS_RELEASE_ONLY); } EXPORT_SYMBOL_GPL(host_wakeup_notify); void host_sleep_notify(struct wilc *wilc) { - acquire_bus(wilc, ACQUIRE_ONLY); + acquire_bus(wilc, WILC_BUS_ACQUIRE_ONLY); wilc->hif_func->hif_write_reg(wilc, 0x10ac, 1); - release_bus(wilc, RELEASE_ONLY); + release_bus(wilc, WILC_BUS_RELEASE_ONLY); } EXPORT_SYMBOL_GPL(host_sleep_notify); @@ -521,7 +523,7 @@ int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count) if (vmm_sz & 0x3) vmm_sz = (vmm_sz + 4) & ~0x3; - if ((sum + vmm_sz) > LINUX_TX_SIZE) + if ((sum + vmm_sz) > WILC_TX_BUFF_SIZE) break; vmm_table[i] = vmm_sz / 4; @@ -541,7 +543,7 @@ int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count) goto out; vmm_table[i] = 0x0; - acquire_bus(wilc, ACQUIRE_AND_WAKEUP); + acquire_bus(wilc, WILC_BUS_ACQUIRE_AND_WAKEUP); counter = 0; func = wilc->hif_func; do { @@ -584,7 +586,7 @@ int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count) entries = ((reg >> 3) & 0x3f); break; } - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); } while (--timeout); if (timeout <= 0) { ret = func->hif_write_reg(wilc, WILC_HOST_VMM_CTL, 0x0); @@ -611,11 +613,11 @@ int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count) goto out_release_bus; if (entries == 0) { - ret = WILC_TX_ERR_NO_BUF; + ret = -ENOBUFS; goto out_release_bus; } - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); offset = 0; i = 0; @@ -667,7 +669,7 @@ int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count) kfree(tqe); } while (--entries); - acquire_bus(wilc, ACQUIRE_AND_WAKEUP); + acquire_bus(wilc, WILC_BUS_ACQUIRE_AND_WAKEUP); ret = func->hif_clear_int_ext(wilc, ENABLE_TX_VMM); if (!ret) @@ -676,7 +678,7 @@ int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count) ret = func->hif_block_tx_ext(wilc, 0, txb, offset); out_release_bus: - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); out: mutex_unlock(&wilc->txq_add_to_head_cs); @@ -715,9 +717,8 @@ static void wilc_wlan_handle_rx_buff(struct wilc *wilc, u8 *buffer, int size) } else { if (!is_cfg_packet) { if (pkt_len > 0) { - wilc_frmw_to_linux(wilc, buff_ptr, - pkt_len, - pkt_offset); + wilc_frmw_to_host(wilc, buff_ptr, + pkt_len, pkt_offset); } } else { struct wilc_cfg_rsp rsp; @@ -775,7 +776,7 @@ static void wilc_pllupdate_isr_ext(struct wilc *wilc, u32 int_stats) wilc->hif_func->hif_clear_int_ext(wilc, PLL_INT_CLR); - if (wilc->io_type == HIF_SDIO) + if (wilc->io_type == WILC_HIF_SDIO) mdelay(WILC_PLL_TO_SDIO); else mdelay(WILC_PLL_TO_SPI); @@ -809,7 +810,7 @@ static void wilc_wlan_handle_isr_ext(struct wilc *wilc, u32 int_status) if (size <= 0) return; - if (LINUX_RX_SIZE - offset < size) + if (WILC_RX_BUFF_SIZE - offset < size) offset = 0; buffer = &wilc->rx_buffer[offset]; @@ -835,7 +836,7 @@ void wilc_handle_isr(struct wilc *wilc) { u32 int_status; - acquire_bus(wilc, ACQUIRE_AND_WAKEUP); + acquire_bus(wilc, WILC_BUS_ACQUIRE_AND_WAKEUP); wilc->hif_func->hif_read_int(wilc, &int_status); if (int_status & PLL_INT_EXT) @@ -850,7 +851,7 @@ void wilc_handle_isr(struct wilc *wilc) if (!(int_status & (ALL_INT_EXT))) wilc_unknown_isr_ext(wilc); - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); } EXPORT_SYMBOL_GPL(wilc_handle_isr); @@ -874,7 +875,7 @@ int wilc_wlan_firmware_download(struct wilc *wilc, const u8 *buffer, memcpy(&size, &buffer[offset + 4], 4); le32_to_cpus(&addr); le32_to_cpus(&size); - acquire_bus(wilc, ACQUIRE_ONLY); + acquire_bus(wilc, WILC_BUS_ACQUIRE_ONLY); offset += 8; while (((int)size) && (offset < buffer_size)) { if (size <= blksz) @@ -892,7 +893,7 @@ int wilc_wlan_firmware_download(struct wilc *wilc, const u8 *buffer, offset += size2; size -= size2; } - release_bus(wilc, RELEASE_ONLY); + release_bus(wilc, WILC_BUS_RELEASE_ONLY); if (!ret) { ret = -EIO; @@ -913,20 +914,20 @@ int wilc_wlan_start(struct wilc *wilc) int ret; u32 chipid; - if (wilc->io_type == HIF_SDIO) { + if (wilc->io_type == WILC_HIF_SDIO) { reg = 0; reg |= BIT(3); - } else if (wilc->io_type == HIF_SPI) { + } else if (wilc->io_type == WILC_HIF_SPI) { reg = 1; } - acquire_bus(wilc, ACQUIRE_ONLY); + acquire_bus(wilc, WILC_BUS_ACQUIRE_ONLY); ret = wilc->hif_func->hif_write_reg(wilc, WILC_VMM_CORE_CFG, reg); if (!ret) { - release_bus(wilc, RELEASE_ONLY); + release_bus(wilc, WILC_BUS_RELEASE_ONLY); return -EIO; } reg = 0; - if (wilc->io_type == HIF_SDIO && wilc->dev_irq_num) + if (wilc->io_type == WILC_HIF_SDIO && wilc->dev_irq_num) reg |= WILC_HAVE_SDIO_IRQ_GPIO; #ifdef WILC_DISABLE_PMU @@ -954,7 +955,7 @@ int wilc_wlan_start(struct wilc *wilc) ret = wilc->hif_func->hif_write_reg(wilc, WILC_GP_REG_1, reg); if (!ret) { - release_bus(wilc, RELEASE_ONLY); + release_bus(wilc, WILC_BUS_RELEASE_ONLY); return -EIO; } @@ -962,7 +963,7 @@ int wilc_wlan_start(struct wilc *wilc) ret = wilc->hif_func->hif_read_reg(wilc, 0x1000, &chipid); if (!ret) { - release_bus(wilc, RELEASE_ONLY); + release_bus(wilc, WILC_BUS_RELEASE_ONLY); return -EIO; } @@ -976,7 +977,7 @@ int wilc_wlan_start(struct wilc *wilc) reg |= BIT(10); ret = wilc->hif_func->hif_write_reg(wilc, WILC_GLB_RESET_0, reg); wilc->hif_func->hif_read_reg(wilc, WILC_GLB_RESET_0, ®); - release_bus(wilc, RELEASE_ONLY); + release_bus(wilc, WILC_BUS_RELEASE_ONLY); return (ret < 0) ? ret : 0; } @@ -987,18 +988,18 @@ int wilc_wlan_stop(struct wilc *wilc) int ret; u8 timeout = 10; - acquire_bus(wilc, ACQUIRE_AND_WAKEUP); + acquire_bus(wilc, WILC_BUS_ACQUIRE_AND_WAKEUP); ret = wilc->hif_func->hif_read_reg(wilc, WILC_GLB_RESET_0, ®); if (!ret) { - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); return ret; } reg &= ~BIT(10); ret = wilc->hif_func->hif_write_reg(wilc, WILC_GLB_RESET_0, reg); if (!ret) { - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); return ret; } @@ -1006,7 +1007,7 @@ int wilc_wlan_stop(struct wilc *wilc) ret = wilc->hif_func->hif_read_reg(wilc, WILC_GLB_RESET_0, ®); if (!ret) { - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); return ret; } @@ -1021,7 +1022,7 @@ int wilc_wlan_stop(struct wilc *wilc) WILC_GLB_RESET_0, ®); if (!ret) { - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); return ret; } break; @@ -1036,7 +1037,7 @@ int wilc_wlan_stop(struct wilc *wilc) ret = wilc->hif_func->hif_write_reg(wilc, WILC_GLB_RESET_0, reg); - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); return ret; } @@ -1072,18 +1073,18 @@ void wilc_wlan_cleanup(struct net_device *dev) kfree(wilc->tx_buffer); wilc->tx_buffer = NULL; - acquire_bus(wilc, ACQUIRE_AND_WAKEUP); + acquire_bus(wilc, WILC_BUS_ACQUIRE_AND_WAKEUP); ret = wilc->hif_func->hif_read_reg(wilc, WILC_GP_REG_0, ®); if (!ret) - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); ret = wilc->hif_func->hif_write_reg(wilc, WILC_GP_REG_0, (reg | ABORT_INT)); if (!ret) - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); - release_bus(wilc, RELEASE_ALLOW_SLEEP); + release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP); wilc->hif_func->hif_deinit(NULL); } @@ -1092,24 +1093,19 @@ static int wilc_wlan_cfg_commit(struct wilc_vif *vif, int type, { struct wilc *wilc = vif->wilc; struct wilc_cfg_frame *cfg = &wilc->cfg_frame; - int total_len = wilc->cfg_frame_offset + 4 + DRIVER_HANDLER_SIZE; - int seq_no = wilc->cfg_seq_no % 256; - int driver_handler = (u32)drv_handler; + int t_len = wilc->cfg_frame_offset + sizeof(struct wilc_cfg_cmd_hdr); if (type == WILC_CFG_SET) - cfg->wid_header[0] = 'W'; + cfg->hdr.cmd_type = 'W'; else - cfg->wid_header[0] = 'Q'; - cfg->wid_header[1] = seq_no; - cfg->wid_header[2] = (u8)total_len; - cfg->wid_header[3] = (u8)(total_len >> 8); - cfg->wid_header[4] = (u8)driver_handler; - cfg->wid_header[5] = (u8)(driver_handler >> 8); - cfg->wid_header[6] = (u8)(driver_handler >> 16); - cfg->wid_header[7] = (u8)(driver_handler >> 24); - wilc->cfg_seq_no = seq_no; - - if (!wilc_wlan_txq_add_cfg_pkt(vif, &cfg->wid_header[0], total_len)) + cfg->hdr.cmd_type = 'Q'; + + cfg->hdr.seq_no = wilc->cfg_seq_no % 256; + cfg->hdr.total_len = cpu_to_le16(t_len); + cfg->hdr.driver_handler = cpu_to_le32(drv_handler); + wilc->cfg_seq_no = cfg->hdr.seq_no; + + if (!wilc_wlan_txq_add_cfg_pkt(vif, (u8 *)&cfg->hdr, t_len)) return -1; return 0; @@ -1122,8 +1118,7 @@ int wilc_wlan_cfg_set(struct wilc_vif *vif, int start, u16 wid, u8 *buffer, int ret_size; struct wilc *wilc = vif->wilc; - if (wilc->cfg_frame_in_use) - return 0; + mutex_lock(&wilc->cfg_cmd_lock); if (start) wilc->cfg_frame_offset = 0; @@ -1134,24 +1129,25 @@ int wilc_wlan_cfg_set(struct wilc_vif *vif, int start, u16 wid, u8 *buffer, offset += ret_size; wilc->cfg_frame_offset = offset; - if (!commit) + if (!commit) { + mutex_unlock(&wilc->cfg_cmd_lock); return ret_size; + } netdev_dbg(vif->ndev, "%s: seqno[%d]\n", __func__, wilc->cfg_seq_no); - wilc->cfg_frame_in_use = 1; if (wilc_wlan_cfg_commit(vif, WILC_CFG_SET, drv_handler)) ret_size = 0; if (!wait_for_completion_timeout(&wilc->cfg_event, - msecs_to_jiffies(CFG_PKTS_TIMEOUT))) { + WILC_CFG_PKTS_TIMEOUT)) { netdev_dbg(vif->ndev, "%s: Timed Out\n", __func__); ret_size = 0; } - wilc->cfg_frame_in_use = 0; wilc->cfg_frame_offset = 0; wilc->cfg_seq_no += 1; + mutex_unlock(&wilc->cfg_cmd_lock); return ret_size; } @@ -1163,8 +1159,7 @@ int wilc_wlan_cfg_get(struct wilc_vif *vif, int start, u16 wid, int commit, int ret_size; struct wilc *wilc = vif->wilc; - if (wilc->cfg_frame_in_use) - return 0; + mutex_lock(&wilc->cfg_cmd_lock); if (start) wilc->cfg_frame_offset = 0; @@ -1174,22 +1169,22 @@ int wilc_wlan_cfg_get(struct wilc_vif *vif, int start, u16 wid, int commit, offset += ret_size; wilc->cfg_frame_offset = offset; - if (!commit) + if (!commit) { + mutex_unlock(&wilc->cfg_cmd_lock); return ret_size; - - wilc->cfg_frame_in_use = 1; + } if (wilc_wlan_cfg_commit(vif, WILC_CFG_QUERY, drv_handler)) ret_size = 0; if (!wait_for_completion_timeout(&wilc->cfg_event, - msecs_to_jiffies(CFG_PKTS_TIMEOUT))) { + WILC_CFG_PKTS_TIMEOUT)) { netdev_dbg(vif->ndev, "%s: Timed Out\n", __func__); ret_size = 0; } - wilc->cfg_frame_in_use = 0; wilc->cfg_frame_offset = 0; wilc->cfg_seq_no += 1; + mutex_unlock(&wilc->cfg_cmd_lock); return ret_size; } @@ -1205,7 +1200,7 @@ int wilc_send_config_pkt(struct wilc_vif *vif, u8 mode, struct wid *wids, int i; int ret = 0; - if (mode == GET_CFG) { + if (mode == WILC_GET_CFG) { for (i = 0; i < count; i++) { if (!wilc_wlan_cfg_get(vif, !i, wids[i].id, @@ -1221,7 +1216,7 @@ int wilc_send_config_pkt(struct wilc_vif *vif, u8 mode, struct wid *wids, wids[i].val, wids[i].size); } - } else if (mode == SET_CFG) { + } else if (mode == WILC_SET_CFG) { for (i = 0; i < count; i++) { if (!wilc_wlan_cfg_set(vif, !i, wids[i].id, @@ -1245,7 +1240,7 @@ static u32 init_chip(struct net_device *dev) struct wilc_vif *vif = netdev_priv(dev); struct wilc *wilc = vif->wilc; - acquire_bus(wilc, ACQUIRE_ONLY); + acquire_bus(wilc, WILC_BUS_ACQUIRE_ONLY); chipid = wilc_get_chipid(wilc, true); @@ -1253,22 +1248,23 @@ static u32 init_chip(struct net_device *dev) ret = wilc->hif_func->hif_read_reg(wilc, 0x1118, ®); if (!ret) { netdev_err(dev, "fail read reg 0x1118\n"); - return ret; + goto release; } reg |= BIT(0); ret = wilc->hif_func->hif_write_reg(wilc, 0x1118, reg); if (!ret) { netdev_err(dev, "fail write reg 0x1118\n"); - return ret; + goto release; } ret = wilc->hif_func->hif_write_reg(wilc, 0xc0000, 0x71); if (!ret) { netdev_err(dev, "fail write reg 0xc0000\n"); - return ret; + goto release; } } - release_bus(wilc, RELEASE_ONLY); +release: + release_bus(wilc, WILC_BUS_RELEASE_ONLY); return ret; } @@ -1317,7 +1313,7 @@ int wilc_wlan_init(struct net_device *dev) } if (!wilc->tx_buffer) - wilc->tx_buffer = kmalloc(LINUX_TX_SIZE, GFP_KERNEL); + wilc->tx_buffer = kmalloc(WILC_TX_BUFF_SIZE, GFP_KERNEL); if (!wilc->tx_buffer) { ret = -ENOBUFS; @@ -1325,7 +1321,7 @@ int wilc_wlan_init(struct net_device *dev) } if (!wilc->rx_buffer) - wilc->rx_buffer = kmalloc(LINUX_RX_SIZE, GFP_KERNEL); + wilc->rx_buffer = kmalloc(WILC_RX_BUFF_SIZE, GFP_KERNEL); if (!wilc->rx_buffer) { ret = -ENOBUFS; diff --git a/drivers/staging/wilc1000/wilc_wlan.h b/drivers/staging/wilc1000/wilc_wlan.h index 27667131de1a..1a27f62589a2 100644 --- a/drivers/staging/wilc1000/wilc_wlan.h +++ b/drivers/staging/wilc1000/wilc_wlan.h @@ -14,7 +14,6 @@ * Mac eth header length * ********************************************/ -#define DRIVER_HANDLER_SIZE 4 #define MAX_MAC_HDR_LEN 26 /* QOS_MAC_HDR_LEN */ #define SUB_MSDU_HEADER_LENGTH 14 #define SNAP_HDR_LEN 8 @@ -132,8 +131,8 @@ #define WILC_PLL_TO_SPI 2 #define ABORT_INT BIT(31) -#define LINUX_RX_SIZE (96 * 1024) -#define LINUX_TX_SIZE (64 * 1024) +#define WILC_RX_BUFF_SIZE (96 * 1024) +#define WILC_TX_BUFF_SIZE (64 * 1024) #define MODALIAS "WILC_SPI" #define GPIO_NUM 0x44 @@ -197,7 +196,7 @@ #define ENABLE_RX_VMM (SEL_VMM_TBL1 | EN_VMM) #define ENABLE_TX_VMM (SEL_VMM_TBL0 | EN_VMM) /*time for expiring the completion of cfg packets*/ -#define CFG_PKTS_TIMEOUT 2000 +#define WILC_CFG_PKTS_TIMEOUT msecs_to_jiffies(2000) #define IS_MANAGMEMENT 0x100 #define IS_MANAGMEMENT_CALLBACK 0x080 @@ -249,16 +248,30 @@ struct wilc_hif_func { void (*disable_interrupt)(struct wilc *nic); }; -#define MAX_CFG_FRAME_SIZE 1468 +#define WILC_MAX_CFG_FRAME_SIZE 1468 + +struct tx_complete_data { + int size; + void *buff; + u8 *bssid; + struct sk_buff *skb; +}; + +struct wilc_cfg_cmd_hdr { + u8 cmd_type; + u8 seq_no; + __le16 total_len; + __le32 driver_handler; +}; struct wilc_cfg_frame { - u8 wid_header[8]; - u8 frame[MAX_CFG_FRAME_SIZE]; + struct wilc_cfg_cmd_hdr hdr; + u8 frame[WILC_MAX_CFG_FRAME_SIZE]; }; struct wilc_cfg_rsp { - int type; - u32 seq_no; + u8 type; + u8 seq_no; }; struct wilc; @@ -269,7 +282,8 @@ int wilc_wlan_firmware_download(struct wilc *wilc, const u8 *buffer, int wilc_wlan_start(struct wilc *wilc); int wilc_wlan_stop(struct wilc *wilc); int wilc_wlan_txq_add_net_pkt(struct net_device *dev, void *priv, u8 *buffer, - u32 buffer_size, wilc_tx_complete_func_t func); + u32 buffer_size, + void (*tx_complete_fn)(void *, int)); int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count); void wilc_handle_isr(struct wilc *wilc); void wilc_wlan_cleanup(struct net_device *dev); @@ -280,7 +294,7 @@ int wilc_wlan_cfg_get(struct wilc_vif *vif, int start, u16 wid, int commit, int wilc_wlan_cfg_get_val(struct wilc *wl, u16 wid, u8 *buffer, u32 buffer_size); int wilc_wlan_txq_add_mgmt_pkt(struct net_device *dev, void *priv, u8 *buffer, - u32 buffer_size, wilc_tx_complete_func_t func); + u32 buffer_size, void (*func)(void *, int)); void wilc_chip_sleep_manually(struct wilc *wilc); void wilc_enable_tcp_ack_filter(struct wilc_vif *vif, bool value); @@ -294,4 +308,6 @@ void chip_allow_sleep(struct wilc *wilc); void chip_wakeup(struct wilc *wilc); int wilc_send_config_pkt(struct wilc_vif *vif, u8 mode, struct wid *wids, u32 count, u32 drv); +int wilc_wlan_init(struct net_device *dev); +u32 wilc_get_chipid(struct wilc *wilc, bool update); #endif diff --git a/drivers/staging/wilc1000/wilc_wlan_cfg.c b/drivers/staging/wilc1000/wilc_wlan_cfg.c index faa001c75681..9dc5de4eb08d 100644 --- a/drivers/staging/wilc1000/wilc_wlan_cfg.c +++ b/drivers/staging/wilc1000/wilc_wlan_cfg.c @@ -7,7 +7,6 @@ #include "wilc_wlan_if.h" #include "wilc_wlan.h" #include "wilc_wlan_cfg.h" -#include "coreconfigurator.h" #include "wilc_wfi_netdevice.h" enum cfg_cmd_type { @@ -55,7 +54,7 @@ static int wilc_wlan_cfg_set_byte(u8 *frame, u32 offset, u16 id, u8 val8) { u8 *buf; - if ((offset + 4) >= MAX_CFG_FRAME_SIZE) + if ((offset + 4) >= WILC_MAX_CFG_FRAME_SIZE) return 0; buf = &frame[offset]; @@ -72,7 +71,7 @@ static int wilc_wlan_cfg_set_hword(u8 *frame, u32 offset, u16 id, u16 val16) { u8 *buf; - if ((offset + 5) >= MAX_CFG_FRAME_SIZE) + if ((offset + 5) >= WILC_MAX_CFG_FRAME_SIZE) return 0; buf = &frame[offset]; @@ -91,7 +90,7 @@ static int wilc_wlan_cfg_set_word(u8 *frame, u32 offset, u16 id, u32 val32) { u8 *buf; - if ((offset + 7) >= MAX_CFG_FRAME_SIZE) + if ((offset + 7) >= WILC_MAX_CFG_FRAME_SIZE) return 0; buf = &frame[offset]; @@ -113,7 +112,7 @@ static int wilc_wlan_cfg_set_str(u8 *frame, u32 offset, u16 id, u8 *str, { u8 *buf; - if ((offset + size + 4) >= MAX_CFG_FRAME_SIZE) + if ((offset + size + 4) >= WILC_MAX_CFG_FRAME_SIZE) return 0; buf = &frame[offset]; @@ -135,7 +134,7 @@ static int wilc_wlan_cfg_set_bin(u8 *frame, u32 offset, u16 id, u8 *b, u32 size) u32 i; u8 checksum = 0; - if ((offset + size + 5) >= MAX_CFG_FRAME_SIZE) + if ((offset + size + 5) >= WILC_MAX_CFG_FRAME_SIZE) return 0; buf = &frame[offset]; @@ -169,7 +168,7 @@ static void wilc_wlan_parse_response_frame(struct wilc *wl, u8 *info, int size) while (size > 0) { i = 0; - wid = info[0] | (info[1] << 8); + wid = get_unaligned_le16(info); switch (GET_WID_TYPE(wid)) { case WID_CHAR: @@ -188,12 +187,13 @@ static void wilc_wlan_parse_response_frame(struct wilc *wl, u8 *info, int size) case WID_SHORT: do { - if (wl->cfg.hw[i].id == WID_NIL) + struct wilc_cfg_hword *hw = &wl->cfg.hw[i]; + + if (hw->id == WID_NIL) break; - if (wl->cfg.hw[i].id == wid) { - wl->cfg.hw[i].val = (info[4] | - (info[5] << 8)); + if (hw->id == wid) { + hw->val = get_unaligned_le16(&info[4]); break; } i++; @@ -203,14 +203,13 @@ static void wilc_wlan_parse_response_frame(struct wilc *wl, u8 *info, int size) case WID_INT: do { - if (wl->cfg.w[i].id == WID_NIL) + struct wilc_cfg_word *w = &wl->cfg.w[i]; + + if (w->id == WID_NIL) break; - if (wl->cfg.w[i].id == wid) { - wl->cfg.w[i].val = (info[4] | - (info[5] << 8) | - (info[6] << 16) | - (info[7] << 24)); + if (w->id == wid) { + w->val = get_unaligned_le32(&info[4]); break; } i++; @@ -245,7 +244,7 @@ static void wilc_wlan_parse_info_frame(struct wilc *wl, u8 *info) { u32 wid, len; - wid = info[0] | (info[1] << 8); + wid = get_unaligned_le16(info); len = info[2]; @@ -310,7 +309,7 @@ int wilc_wlan_cfg_get_wid(u8 *frame, u32 offset, u16 id) { u8 *buf; - if ((offset + 2) >= MAX_CFG_FRAME_SIZE) + if ((offset + 2) >= WILC_MAX_CFG_FRAME_SIZE) return 0; buf = &frame[offset]; @@ -372,8 +371,7 @@ int wilc_wlan_cfg_get_wid_value(struct wilc *wl, u16 wid, u8 *buffer, break; if (id == wid) { - u32 size = (wl->cfg.s[i].str[0] | - (wl->cfg.s[i].str[1] << 8)); + u16 size = get_unaligned_le16(wl->cfg.s[i].str); if (buffer_size >= size) { memcpy(buffer, &wl->cfg.s[i].str[2], diff --git a/drivers/staging/wilc1000/wilc_wlan_if.h b/drivers/staging/wilc1000/wilc_wlan_if.h index ce2066b74287..b15de36e32e0 100644 --- a/drivers/staging/wilc1000/wilc_wlan_if.h +++ b/drivers/staging/wilc1000/wilc_wlan_if.h @@ -11,190 +11,177 @@ /******************************************** * - * Host Interface Defines - * - ********************************************/ - -#define HIF_SDIO (0) -#define HIF_SPI BIT(0) - -/******************************************** - * - * Wlan Interface Defines - * - ********************************************/ - -struct sdio_cmd52 { - u32 read_write: 1; - u32 function: 3; - u32 raw: 1; - u32 address: 17; - u32 data: 8; -}; - -struct sdio_cmd53 { - u32 read_write: 1; - u32 function: 3; - u32 block_mode: 1; - u32 increment: 1; - u32 address: 17; - u32 count: 9; - u8 *buffer; - u32 block_size; -}; - -#define MAC_STATUS_INIT -1 -#define MAC_STATUS_CONNECTED 1 -#define MAC_STATUS_DISCONNECTED 0 - -struct tx_complete_data { - int size; - void *buff; - u8 *bssid; - struct sk_buff *skb; -}; - -typedef void (*wilc_tx_complete_func_t)(void *, int); - -#define WILC_TX_ERR_NO_BUF (-2) - -/******************************************** - * * Wlan Configuration ID * ********************************************/ -#define WILC_MULTICAST_TABLE_SIZE 8 -#define MAX_SSID_LEN 33 -#define MAX_RATES_SUPPORTED 12 enum bss_types { - INFRASTRUCTURE = 0, - INDEPENDENT, - AP, + WILC_FW_BSS_TYPE_INFRA = 0, + WILC_FW_BSS_TYPE_INDEPENDENT, + WILC_FW_BSS_TYPE_AP, }; enum { - B_ONLY_MODE = 0, /* 1, 2 M, otherwise 5, 11 M */ - G_ONLY_MODE, /* 6,12,24 otherwise 9,18,36,48,54 */ - G_MIXED_11B_1_MODE, /* 1,2,5.5,11 otherwise all on */ - G_MIXED_11B_2_MODE, /* 1,2,5,11,6,12,24 otherwise all on */ + WILC_FW_OPER_MODE_B_ONLY = 0, /* 1, 2 M, otherwise 5, 11 M */ + WILC_FW_OPER_MODE_G_ONLY, /* 6,12,24 otherwise 9,18,36,48,54 */ + WILC_FW_OPER_MODE_G_MIXED_11B_1, /* 1,2,5.5,11 otherwise all on */ + WILC_FW_OPER_MODE_G_MIXED_11B_2, /* 1,2,5,11,6,12,24 otherwise all on */ }; enum { - G_SHORT_PREAMBLE = 0, /* Short Preamble */ - G_LONG_PREAMBLE = 1, /* Long Preamble */ - G_AUTO_PREAMBLE = 2, /* Auto Preamble Selection */ + WILC_FW_PREAMBLE_SHORT = 0, /* Short Preamble */ + WILC_FW_PREAMBLE_LONG = 1, /* Long Preamble */ + WILC_FW_PREAMBLE_AUTO = 2, /* Auto Preamble Selection */ }; enum { - PASSIVE_SCAN = 0, - ACTIVE_SCAN = 1, + WILC_FW_PASSIVE_SCAN = 0, + WILC_FW_ACTIVE_SCAN = 1, }; enum { - NO_POWERSAVE = 0, - MIN_FAST_PS = 1, - MAX_FAST_PS = 2, - MIN_PSPOLL_PS = 3, - MAX_PSPOLL_PS = 4 + WILC_FW_NO_POWERSAVE = 0, + WILC_FW_MIN_FAST_PS = 1, + WILC_FW_MAX_FAST_PS = 2, + WILC_FW_MIN_PSPOLL_PS = 3, + WILC_FW_MAX_PSPOLL_PS = 4 }; enum chip_ps_states { - CHIP_WAKEDUP = 0, - CHIP_SLEEPING_AUTO = 1, - CHIP_SLEEPING_MANUAL = 2 + WILC_CHIP_WAKEDUP = 0, + WILC_CHIP_SLEEPING_AUTO = 1, + WILC_CHIP_SLEEPING_MANUAL = 2 }; enum bus_acquire { - ACQUIRE_ONLY = 0, - ACQUIRE_AND_WAKEUP = 1, + WILC_BUS_ACQUIRE_ONLY = 0, + WILC_BUS_ACQUIRE_AND_WAKEUP = 1, }; enum bus_release { - RELEASE_ONLY = 0, - RELEASE_ALLOW_SLEEP = 1, + WILC_BUS_RELEASE_ONLY = 0, + WILC_BUS_RELEASE_ALLOW_SLEEP = 1, }; enum { - NO_SECURITY = 0, - WEP_40 = 0x3, - WEP_104 = 0x7, - WPA_AES = 0x29, - WPA_TKIP = 0x49, - WPA_AES_TKIP = 0x69, /* Aes or Tkip */ - WPA2_AES = 0x31, - WPA2_TKIP = 0x51, - WPA2_AES_TKIP = 0x71, /* Aes or Tkip */ + WILC_FW_NO_ENCRYPT = 0, + WILC_FW_ENCRYPT_ENABLED = BIT(0), + WILC_FW_WEP = BIT(1), + WILC_FW_WEP_EXTENDED = BIT(2), + WILC_FW_WPA = BIT(3), + WILC_FW_WPA2 = BIT(4), + WILC_FW_AES = BIT(5), + WILC_FW_TKIP = BIT(6) +}; + +enum { + WILC_FW_SEC_NO = WILC_FW_NO_ENCRYPT, + WILC_FW_SEC_WEP = WILC_FW_WEP | WILC_FW_ENCRYPT_ENABLED, + WILC_FW_SEC_WEP_EXTENDED = WILC_FW_WEP_EXTENDED | WILC_FW_SEC_WEP, + WILC_FW_SEC_WPA = WILC_FW_WPA | WILC_FW_ENCRYPT_ENABLED, + WILC_FW_SEC_WPA_AES = WILC_FW_AES | WILC_FW_SEC_WPA, + WILC_FW_SEC_WPA_TKIP = WILC_FW_TKIP | WILC_FW_SEC_WPA, + WILC_FW_SEC_WPA2 = WILC_FW_WPA2 | WILC_FW_ENCRYPT_ENABLED, + WILC_FW_SEC_WPA2_AES = WILC_FW_AES | WILC_FW_SEC_WPA2, + WILC_FW_SEC_WPA2_TKIP = WILC_FW_TKIP | WILC_FW_SEC_WPA2 }; enum authtype { - OPEN_SYSTEM = 1, - SHARED_KEY = 2, - ANY = 3, - IEEE8021 = 5 + WILC_FW_AUTH_OPEN_SYSTEM = 1, + WILC_FW_AUTH_SHARED_KEY = 2, + WILC_FW_AUTH_ANY = 3, + WILC_FW_AUTH_IEEE8021 = 5 }; enum site_survey { - SITE_SURVEY_1CH = 0, - SITE_SURVEY_ALL_CH = 1, - SITE_SURVEY_OFF = 2 + WILC_FW_SITE_SURVEY_1CH = 0, + WILC_FW_SITE_SURVEY_ALL_CH = 1, + WILC_FW_SITE_SURVEY_OFF = 2 +}; + +enum { + WILC_FW_ACK_POLICY_NORMAL = 0, + WILC_FW_ACK_NO_POLICY, }; enum { - NORMAL_ACK = 0, - NO_ACK, + WILC_FW_REKEY_POLICY_DISABLE = 1, + WILC_FW_REKEY_POLICY_TIME_BASE, + WILC_FW_REKEY_POLICY_PKT_BASE, + WILC_FW_REKEY_POLICY_TIME_PKT_BASE }; enum { - REKEY_DISABLE = 1, - REKEY_TIME_BASE, - REKEY_PKT_BASE, - REKEY_TIME_PKT_BASE + WILC_FW_FILTER_NO = 0x00, + WILC_FW_FILTER_AP_ONLY = 0x01, + WILC_FW_FILTER_STA_ONLY = 0x02 }; enum { - FILTER_NO = 0x00, - FILTER_AP_ONLY = 0x01, - FILTER_STA_ONLY = 0x02 + WILC_FW_11N_PROT_AUTO = 0, /* Auto */ + WILC_FW_11N_NO_PROT, /* Do not use any protection */ + WILC_FW_11N_PROT_ERP, /* Protect all ERP frame exchanges */ + WILC_FW_11N_PROT_HT, /* Protect all HT frame exchanges */ + WILC_FW_11N_PROT_GF /* Protect all GF frame exchanges */ }; enum { - AUTO_PROT = 0, /* Auto */ - NO_PROT, /* Do not use any protection */ - ERP_PROT, /* Protect all ERP frame exchanges */ - HT_PROT, /* Protect all HT frame exchanges */ - GF_PROT, /* Protect all GF frame exchanges */ + WILC_FW_ERP_PROT_SELF_CTS, + WILC_FW_ERP_PROT_RTS_CTS, }; enum { - G_SELF_CTS_PROT, - G_RTS_CTS_PROT, + WILC_FW_11N_OP_MODE_HT_MIXED = 1, + WILC_FW_11N_OP_MODE_HT_ONLY_20MHZ, + WILC_FW_11N_OP_MODE_HT_ONLY_20_40MHZ, }; enum { - HT_MIXED_MODE = 1, - HT_ONLY_20MHZ_MODE, - HT_ONLY_20_40MHZ_MODE, + WILC_FW_OBBS_NONHT_NO_DETECT = 0, + WILC_FW_OBBS_NONHT_DETECT_ONLY = 1, + WILC_FW_OBBS_NONHT_DETECT_PROTECT = 2, + WILC_FW_OBBS_NONHT_DETECT_PROTECT_REPORT = 3, }; enum { - NO_DETECT = 0, - DETECT_ONLY = 1, - DETECT_PROTECT = 2, - DETECT_PROTECT_REPORT = 3, + WILC_FW_HT_PROT_RTS_CTS_NONHT = 0, /* RTS-CTS at non-HT rate */ + WILC_FW_HT_PROT_FIRST_FRAME_NONHT, /* First frame at non-HT rate */ + WILC_FW_HT_PROT_LSIG_TXOP, /* LSIG TXOP Protection */ + WILC_FW_HT_PROT_FIRST_FRAME_MIXED, /* First frame at Mixed format */ }; enum { - RTS_CTS_NONHT_PROT = 0, /* RTS-CTS at non-HT rate */ - FIRST_FRAME_NONHT_PROT, /* First frame at non-HT rate */ - LSIG_TXOP_PROT, /* LSIG TXOP Protection */ - FIRST_FRAME_MIXED_PROT, /* First frame at Mixed format */ + WILC_FW_SMPS_MODE_STATIC = 1, + WILC_FW_SMPS_MODE_DYNAMIC = 2, + WILC_FW_SMPS_MODE_MIMO = 3, /* power save disable */ }; enum { - STATIC_MODE = 1, - DYNAMIC_MODE = 2, - MIMO_MODE = 3, /* power save disable */ + WILC_FW_TX_RATE_AUTO = 0, + WILC_FW_TX_RATE_MBPS_1 = 1, + WILC_FW_TX_RATE_MBPS_2 = 2, + WILC_FW_TX_RATE_MBPS_5_5 = 5, + WILC_FW_TX_RATE_MBPS_11 = 11, + WILC_FW_TX_RATE_MBPS_6 = 6, + WILC_FW_TX_RATE_MBPS_9 = 9, + WILC_FW_TX_RATE_MBPS_12 = 12, + WILC_FW_TX_RATE_MBPS_18 = 18, + WILC_FW_TX_RATE_MBPS_24 = 24, + WILC_FW_TX_RATE_MBPS_36 = 36, + WILC_FW_TX_RATE_MBPS_48 = 48, + WILC_FW_TX_RATE_MBPS_54 = 54 +}; + +enum { + WILC_FW_DEFAULT_SCAN = 0, + WILC_FW_USER_SCAN = BIT(0), + WILC_FW_OBSS_PERIODIC_SCAN = BIT(1), + WILC_FW_OBSS_ONETIME_SCAN = BIT(2) +}; + +enum { + WILC_FW_ACTION_FRM_IDX = 0, + WILC_FW_PROBE_REQ_IDX = 1 }; enum wid_type { @@ -667,7 +654,6 @@ enum { WID_TX_POWER_LEVEL_11N = 0x00B1, /* Custom Character WID list */ - WID_PC_TEST_MODE = 0x00C8, /* SCAN Complete notification WID*/ WID_SCAN_COMPLETE = 0x00C9, @@ -698,13 +684,8 @@ enum { WID_LONG_RETRY_LIMIT = 0x1003, WID_BEACON_INTERVAL = 0x1006, WID_MEMORY_ACCESS_16BIT = 0x1008, - WID_RX_SENSE = 0x100B, - WID_ACTIVE_SCAN_TIME = 0x100C, - WID_PASSIVE_SCAN_TIME = 0x100D, - WID_SITE_SURVEY_SCAN_TIME = 0x100E, WID_JOIN_START_TIMEOUT = 0x100F, - WID_AUTH_TIMEOUT = 0x1010, WID_ASOC_TIMEOUT = 0x1011, WID_11I_PROTOCOL_TIMEOUT = 0x1012, WID_EAPOL_RESPONSE_TIMEOUT = 0x1013, @@ -739,11 +720,8 @@ enum { WID_HW_RX_COUNT = 0x2015, WID_MEMORY_ADDRESS = 0x201E, WID_MEMORY_ACCESS_32BIT = 0x201F, - WID_RF_REG_VAL = 0x2021, /* NMAC Integer WID list */ - WID_11N_PHY_ACTIVE_REG_VAL = 0x2080, - /* Custom Integer WID list */ WID_GET_INACTIVE_TIME = 0x2084, WID_SET_OPERATION_MODE = 0X2086, @@ -764,7 +742,6 @@ enum { WID_SUPP_PASSWORD = 0x3011, WID_SITE_SURVEY_RESULTS = 0x3012, WID_RX_POWER_LEVEL = 0x3013, - WID_DEL_ALL_RX_BA = 0x3014, WID_SET_STA_MAC_INACTIVE_TIME = 0x3017, WID_ADD_WEP_KEY = 0x3019, WID_REMOVE_WEP_KEY = 0x301A, @@ -823,8 +800,4 @@ enum { WID_MAX = 0xFFFF }; -struct wilc; -int wilc_wlan_init(struct net_device *dev); -u32 wilc_get_chipid(struct wilc *wilc, bool update); - #endif diff --git a/drivers/staging/wlan-ng/Kconfig b/drivers/staging/wlan-ng/Kconfig index 426d4efbabc3..97238018b315 100644 --- a/drivers/staging/wlan-ng/Kconfig +++ b/drivers/staging/wlan-ng/Kconfig @@ -4,7 +4,7 @@ config PRISM2_USB select WIRELESS_EXT select WEXT_PRIV default n - ---help--- + help This is the wlan-ng prism 2.5/3 USB driver for a wide range of old USB wireless devices. diff --git a/drivers/staging/wlan-ng/cfg80211.c b/drivers/staging/wlan-ng/cfg80211.c index 47f2ee926a77..8a862f718d5c 100644 --- a/drivers/staging/wlan-ng/cfg80211.c +++ b/drivers/staging/wlan-ng/cfg80211.c @@ -70,7 +70,8 @@ static int prism2_result2err(int prism2_result) return err; } -static int prism2_domibset_uint32(struct wlandevice *wlandev, u32 did, u32 data) +static int prism2_domibset_uint32(struct wlandevice *wlandev, + u32 did, u32 data) { struct p80211msg_dot11req_mibset msg; struct p80211item_uint32 *mibitem = @@ -678,7 +679,8 @@ static const struct cfg80211_ops prism2_usb_cfg_ops = { }; /* Functions to create/free wiphy interface */ -static struct wiphy *wlan_create_wiphy(struct device *dev, struct wlandevice *wlandev) +static struct wiphy *wlan_create_wiphy(struct device *dev, + struct wlandevice *wlandev) { struct wiphy *wiphy; struct prism2_wiphy_private *priv; diff --git a/drivers/staging/wlan-ng/prism2fw.c b/drivers/staging/wlan-ng/prism2fw.c index f99626ca6bdc..94800c007162 100644 --- a/drivers/staging/wlan-ng/prism2fw.c +++ b/drivers/staging/wlan-ng/prism2fw.c @@ -406,7 +406,6 @@ static int crcimage(struct imgchunk *fchunk, unsigned int nfchunks, int i; int c; u32 crcstart; - u32 crcend; u32 cstart = 0; u32 cend; u8 *dest; @@ -416,7 +415,6 @@ static int crcimage(struct imgchunk *fchunk, unsigned int nfchunks, if (!s3crc[i].dowrite) continue; crcstart = s3crc[i].addr; - crcend = s3crc[i].addr + s3crc[i].len; /* Find chunk */ for (c = 0; c < nfchunks; c++) { cstart = fchunk[c].addr; @@ -558,10 +556,9 @@ static int mkimage(struct imgchunk *clist, unsigned int *ccnt) /* Allocate buffer space for chunks */ for (i = 0; i < *ccnt; i++) { clist[i].data = kzalloc(clist[i].len, GFP_KERNEL); - if (!clist[i].data) { - pr_err("failed to allocate image space, exitting.\n"); + if (!clist[i].data) return 1; - } + pr_debug("chunk[%d]: addr=0x%06x len=%d\n", i, clist[i].addr, clist[i].len); } diff --git a/drivers/staging/wlan-ng/prism2mib.c b/drivers/staging/wlan-ng/prism2mib.c index 5c0dad42f523..1eba5fa28d8f 100644 --- a/drivers/staging/wlan-ng/prism2mib.c +++ b/drivers/staging/wlan-ng/prism2mib.c @@ -133,12 +133,13 @@ static int prism2mib_excludeunencrypted(struct mibrec *mib, struct p80211msg_dot11req_mibset *msg, void *data); -static int prism2mib_fragmentationthreshold(struct mibrec *mib, - int isget, - struct wlandevice *wlandev, - struct hfa384x *hw, - struct p80211msg_dot11req_mibset *msg, - void *data); +static int +prism2mib_fragmentationthreshold(struct mibrec *mib, + int isget, + struct wlandevice *wlandev, + struct hfa384x *hw, + struct p80211msg_dot11req_mibset *msg, + void *data); static int prism2mib_priv(struct mibrec *mib, int isget, @@ -652,12 +653,13 @@ static int prism2mib_excludeunencrypted(struct mibrec *mib, * */ -static int prism2mib_fragmentationthreshold(struct mibrec *mib, - int isget, - struct wlandevice *wlandev, - struct hfa384x *hw, - struct p80211msg_dot11req_mibset *msg, - void *data) +static int +prism2mib_fragmentationthreshold(struct mibrec *mib, + int isget, + struct wlandevice *wlandev, + struct hfa384x *hw, + struct p80211msg_dot11req_mibset *msg, + void *data) { u32 *uint32 = data; diff --git a/drivers/staging/xgifb/Kconfig b/drivers/staging/xgifb/Kconfig deleted file mode 100644 index bb0ca5974ea0..000000000000 --- a/drivers/staging/xgifb/Kconfig +++ /dev/null @@ -1,11 +0,0 @@ -config FB_XGI - tristate "XGI display support" - depends on FB && PCI - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - help - This driver supports notebooks with XGI Z7,Z9,Z11 PCI chips. - Say Y if you have such a graphics card. - To compile this driver as a module, choose M here: the - module will be called xgifb.ko diff --git a/drivers/staging/xgifb/Makefile b/drivers/staging/xgifb/Makefile deleted file mode 100644 index 964a843c4521..000000000000 --- a/drivers/staging/xgifb/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -obj-$(CONFIG_FB_XGI) += xgifb.o - -xgifb-y := XGI_main_26.o vb_init.o vb_setmode.o - diff --git a/drivers/staging/xgifb/TODO b/drivers/staging/xgifb/TODO deleted file mode 100644 index 7eb99140a399..000000000000 --- a/drivers/staging/xgifb/TODO +++ /dev/null @@ -1,13 +0,0 @@ -This drivers still needs a lot of work. I can list all cleanups to do but it's -going to be long. So, I'm writing "cleanups" and not the list. - -Arnaud - -TODO: -- clean ups -- sort out dup ids with SiS driver -- remove useless/wrong/unused code... -- get rid of non-linux related stuff - -Please send patches to: -Arnaud Patard <arnaud.patard@rtp-net.org> diff --git a/drivers/staging/xgifb/XGI_main.h b/drivers/staging/xgifb/XGI_main.h deleted file mode 100644 index e19a8291cb2a..000000000000 --- a/drivers/staging/xgifb/XGI_main.h +++ /dev/null @@ -1,365 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _XGIFB_MAIN -#define _XGIFB_MAIN -/* ------------------- Constant Definitions ------------------------- */ -#include "XGIfb.h" -#include "vb_def.h" - -#define PCI_DEVICE_ID_XGI_42 0x042 -#define PCI_DEVICE_ID_XGI_27 0x027 - -static const struct pci_device_id xgifb_pci_table[] = { - {PCI_DEVICE(PCI_VENDOR_ID_XGI, PCI_DEVICE_ID_XGI_20)}, - {PCI_DEVICE(PCI_VENDOR_ID_XGI, PCI_DEVICE_ID_XGI_27)}, - {PCI_DEVICE(PCI_VENDOR_ID_XGI, PCI_DEVICE_ID_XGI_40)}, - {PCI_DEVICE(PCI_VENDOR_ID_XGI, PCI_DEVICE_ID_XGI_42)}, - {0} -}; - -MODULE_DEVICE_TABLE(pci, xgifb_pci_table); - -#define IND_XGI_SCRATCH_REG_CR30 0x30 /* CRs */ -#define IND_XGI_SCRATCH_REG_CR31 0x31 -#define IND_XGI_SCRATCH_REG_CR32 0x32 -#define IND_XGI_SCRATCH_REG_CR33 0x33 -#define IND_XGI_LCD_PANEL 0x36 -#define IND_XGI_SCRATCH_REG_CR37 0x37 - -#define XGI_DRAM_SIZE_MASK 0xF0 /*SR14 */ -#define XGI_DRAM_SIZE_1MB 0x00 -#define XGI_DRAM_SIZE_2MB 0x01 -#define XGI_DRAM_SIZE_4MB 0x02 -#define XGI_DRAM_SIZE_8MB 0x03 -#define XGI_DRAM_SIZE_16MB 0x04 -#define XGI_DRAM_SIZE_32MB 0x05 -#define XGI_DRAM_SIZE_64MB 0x06 -#define XGI_DRAM_SIZE_128MB 0x07 -#define XGI_DRAM_SIZE_256MB 0x08 - -/* ------------------- Global Variables ----------------------------- */ - -/* display status */ -static int XGIfb_crt1off; -static int XGIfb_forcecrt1 = -1; - -/* global flags */ -static int XGIfb_tvmode; -static int enable_dstn; -static int XGIfb_ypan = -1; - -/* TW: CRT2 type (for overriding autodetection) */ -static int XGIfb_crt2type = -1; -/* PR: Tv plug type (for overriding autodetection) */ -static int XGIfb_tvplug = -1; - -#define MD_XGI315 1 - -/* mode table */ -static const struct _XGIbios_mode { - u8 mode_no; - u16 vesa_mode_no_1; /* "XGI defined" VESA mode number */ - u16 vesa_mode_no_2; /* Real VESA mode numbers */ - u16 xres; - u16 yres; - u16 bpp; - u8 chipset; -} XGIbios_mode[] = { - { 0x56, 0x0000, 0x0000, 320, 240, 16, MD_XGI315 }, - { 0x5A, 0x0000, 0x0000, 320, 480, 8, MD_XGI315 }, - { 0x5B, 0x0000, 0x0000, 320, 480, 16, MD_XGI315 }, - { 0x2E, 0x0101, 0x0101, 640, 480, 8, MD_XGI315 }, - { 0x44, 0x0111, 0x0111, 640, 480, 16, MD_XGI315 }, - { 0x62, 0x013a, 0x0112, 640, 480, 32, MD_XGI315 }, - { 0x31, 0x0000, 0x0000, 720, 480, 8, MD_XGI315 }, - { 0x33, 0x0000, 0x0000, 720, 480, 16, MD_XGI315 }, - { 0x35, 0x0000, 0x0000, 720, 480, 32, MD_XGI315 }, - { 0x32, 0x0000, 0x0000, 720, 576, 8, MD_XGI315 }, - { 0x34, 0x0000, 0x0000, 720, 576, 16, MD_XGI315 }, - { 0x36, 0x0000, 0x0000, 720, 576, 32, MD_XGI315 }, - { 0x36, 0x0000, 0x0000, 720, 576, 32, MD_XGI315 }, - { 0x70, 0x0000, 0x0000, 800, 480, 8, MD_XGI315 }, - { 0x7a, 0x0000, 0x0000, 800, 480, 16, MD_XGI315 }, - { 0x76, 0x0000, 0x0000, 800, 480, 32, MD_XGI315 }, - { 0x30, 0x0103, 0x0103, 800, 600, 8, MD_XGI315 }, -#define DEFAULT_MODE 17 /* index for 800x600x16 */ - { 0x47, 0x0114, 0x0114, 800, 600, 16, MD_XGI315 }, - { 0x63, 0x013b, 0x0115, 800, 600, 32, MD_XGI315 }, - { 0x71, 0x0000, 0x0000, 1024, 576, 8, MD_XGI315 }, - { 0x74, 0x0000, 0x0000, 1024, 576, 16, MD_XGI315 }, - { 0x77, 0x0000, 0x0000, 1024, 576, 32, MD_XGI315 }, - { 0x77, 0x0000, 0x0000, 1024, 576, 32, MD_XGI315 }, - { 0x20, 0x0000, 0x0000, 1024, 600, 8, }, - { 0x21, 0x0000, 0x0000, 1024, 600, 16, }, - { 0x22, 0x0000, 0x0000, 1024, 600, 32, }, - { 0x38, 0x0105, 0x0105, 1024, 768, 8, MD_XGI315 }, - { 0x4A, 0x0117, 0x0117, 1024, 768, 16, MD_XGI315 }, - { 0x64, 0x013c, 0x0118, 1024, 768, 32, MD_XGI315 }, - { 0x64, 0x013c, 0x0118, 1024, 768, 32, MD_XGI315 }, - { 0x23, 0x0000, 0x0000, 1152, 768, 8, }, - { 0x24, 0x0000, 0x0000, 1152, 768, 16, }, - { 0x25, 0x0000, 0x0000, 1152, 768, 32, }, - { 0x79, 0x0000, 0x0000, 1280, 720, 8, MD_XGI315 }, - { 0x75, 0x0000, 0x0000, 1280, 720, 16, MD_XGI315 }, - { 0x78, 0x0000, 0x0000, 1280, 720, 32, MD_XGI315 }, - { 0x23, 0x0000, 0x0000, 1280, 768, 8, MD_XGI315 }, - { 0x24, 0x0000, 0x0000, 1280, 768, 16, MD_XGI315 }, - { 0x25, 0x0000, 0x0000, 1280, 768, 32, MD_XGI315 }, - { 0x7C, 0x0000, 0x0000, 1280, 960, 8, MD_XGI315 }, - { 0x7D, 0x0000, 0x0000, 1280, 960, 16, MD_XGI315 }, - { 0x7E, 0x0000, 0x0000, 1280, 960, 32, MD_XGI315 }, - { 0x3A, 0x0107, 0x0107, 1280, 1024, 8, MD_XGI315 }, - { 0x4D, 0x011a, 0x011a, 1280, 1024, 16, MD_XGI315 }, - { 0x65, 0x013d, 0x011b, 1280, 1024, 32, MD_XGI315 }, - { 0x26, 0x0000, 0x0000, 1400, 1050, 8, MD_XGI315 }, - { 0x27, 0x0000, 0x0000, 1400, 1050, 16, MD_XGI315 }, - { 0x28, 0x0000, 0x0000, 1400, 1050, 32, MD_XGI315 }, - { 0x3C, 0x0130, 0x011c, 1600, 1200, 8, MD_XGI315 }, - { 0x3D, 0x0131, 0x011e, 1600, 1200, 16, MD_XGI315 }, - { 0x66, 0x013e, 0x011f, 1600, 1200, 32, MD_XGI315 }, - { 0x68, 0x013f, 0x0000, 1920, 1440, 8, MD_XGI315 }, - { 0x69, 0x0140, 0x0000, 1920, 1440, 16, MD_XGI315 }, - { 0x6B, 0x0141, 0x0000, 1920, 1440, 32, MD_XGI315 }, - { 0x6c, 0x0000, 0x0000, 2048, 1536, 8, MD_XGI315 }, - { 0x6d, 0x0000, 0x0000, 2048, 1536, 16, MD_XGI315 }, - { 0x6e, 0x0000, 0x0000, 2048, 1536, 32, MD_XGI315 }, - { 0 }, -}; - -static const unsigned short XGI310paneltype[] = { - LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024, - LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960, - LCD_1152x768, LCD_1400x1050, LCD_1280x768, LCD_1600x1200, - LCD_1024x768, LCD_1024x768, LCD_1024x768}; - -static const struct _XGI_crt2type { - char name[10]; - int type_no; - int tvplug_no; -} XGI_crt2type[] = { - {"NONE", 0, -1}, - {"LCD", XGIFB_DISP_LCD, -1}, - {"TV", XGIFB_DISP_TV, -1}, - {"VGA", XGIFB_DISP_CRT, -1}, - {"SVIDEO", XGIFB_DISP_TV, TVPLUG_SVIDEO}, - {"COMPOSITE", XGIFB_DISP_TV, TVPLUG_COMPOSITE}, - {"SCART", XGIFB_DISP_TV, TVPLUG_SCART}, - {"none", 0, -1}, - {"lcd", XGIFB_DISP_LCD, -1}, - {"tv", XGIFB_DISP_TV, -1}, - {"vga", XGIFB_DISP_CRT, -1}, - {"svideo", XGIFB_DISP_TV, TVPLUG_SVIDEO}, - {"composite", XGIFB_DISP_TV, TVPLUG_COMPOSITE}, - {"scart", XGIFB_DISP_TV, TVPLUG_SCART}, - {"\0", -1, -1} -}; - -/* TV standard */ -static const struct _XGI_tvtype { - char name[6]; - int type_no; -} XGI_tvtype[] = { - {"PAL", 1}, - {"NTSC", 2}, - {"pal", 1}, - {"ntsc", 2}, - {"\0", -1} -}; - -static const struct _XGI_vrate { - u16 idx; - u16 xres; - u16 yres; - u16 refresh; -} XGIfb_vrate[] = { - {1, 640, 480, 60}, {2, 640, 480, 72}, - {3, 640, 480, 75}, {4, 640, 480, 85}, - - {5, 640, 480, 100}, {6, 640, 480, 120}, - {7, 640, 480, 160}, {8, 640, 480, 200}, - - {1, 720, 480, 60}, - {1, 720, 576, 58}, - {1, 800, 480, 60}, {2, 800, 480, 75}, {3, 800, 480, 85}, - {1, 800, 600, 60}, {2, 800, 600, 72}, {3, 800, 600, 75}, - {4, 800, 600, 85}, {5, 800, 600, 100}, - {6, 800, 600, 120}, {7, 800, 600, 160}, - - {1, 1024, 768, 60}, {2, 1024, 768, 70}, {3, 1024, 768, 75}, - {4, 1024, 768, 85}, {5, 1024, 768, 100}, {6, 1024, 768, 120}, - {1, 1024, 576, 60}, {2, 1024, 576, 75}, {3, 1024, 576, 85}, - {1, 1024, 600, 60}, - {1, 1152, 768, 60}, - {1, 1280, 720, 60}, {2, 1280, 720, 75}, {3, 1280, 720, 85}, - {1, 1280, 768, 60}, - {1, 1280, 1024, 60}, {2, 1280, 1024, 75}, {3, 1280, 1024, 85}, - {1, 1280, 960, 70}, - {1, 1400, 1050, 60}, - {1, 1600, 1200, 60}, {2, 1600, 1200, 65}, - {3, 1600, 1200, 70}, {4, 1600, 1200, 75}, - - {5, 1600, 1200, 85}, {6, 1600, 1200, 100}, - {7, 1600, 1200, 120}, - - {1, 1920, 1440, 60}, {2, 1920, 1440, 65}, - {3, 1920, 1440, 70}, {4, 1920, 1440, 75}, - - {5, 1920, 1440, 85}, {6, 1920, 1440, 100}, - {1, 2048, 1536, 60}, {2, 2048, 1536, 65}, - {3, 2048, 1536, 70}, {4, 2048, 1536, 75}, - - {5, 2048, 1536, 85}, - {0, 0, 0, 0} -}; - -static const struct _XGI_TV_filter { - u8 filter[9][4]; -} XGI_TV_filter[] = { - { { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_0 */ - {0x00, 0xE0, 0x10, 0x60}, - {0x00, 0xEE, 0x10, 0x44}, - {0x00, 0xF4, 0x10, 0x38}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xFC, 0xFB, 0x14, 0x2A}, - {0x00, 0x00, 0x10, 0x20}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_1 */ - {0x00, 0xE0, 0x10, 0x60}, - {0x00, 0xEE, 0x10, 0x44}, - {0x00, 0xF4, 0x10, 0x38}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xFC, 0xFB, 0x14, 0x2A}, - {0x00, 0x00, 0x10, 0x20}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_2 */ - {0xF5, 0xEE, 0x1B, 0x44}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xEB, 0x04, 0x25, 0x18}, - {0xF1, 0x05, 0x1F, 0x16}, - {0xF6, 0x06, 0x1A, 0x14}, - {0xFA, 0x06, 0x16, 0x14}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_3 */ - {0xF1, 0x04, 0x1F, 0x18}, - {0xEE, 0x0D, 0x22, 0x06}, - {0xF7, 0x06, 0x19, 0x14}, - {0xF4, 0x0B, 0x1C, 0x0A}, - {0xFA, 0x07, 0x16, 0x12}, - {0xF9, 0x0A, 0x17, 0x0C}, - {0x00, 0x07, 0x10, 0x12}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_4 */ - {0x00, 0xE0, 0x10, 0x60}, - {0x00, 0xEE, 0x10, 0x44}, - {0x00, 0xF4, 0x10, 0x38}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xFC, 0xFB, 0x14, 0x2A}, - {0x00, 0x00, 0x10, 0x20}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_5 */ - {0xF5, 0xEE, 0x1B, 0x44}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xEB, 0x04, 0x25, 0x18}, - {0xF1, 0x05, 0x1F, 0x16}, - {0xF6, 0x06, 0x1A, 0x14}, - {0xFA, 0x06, 0x16, 0x14}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_6 */ - {0xEB, 0x04, 0x25, 0x18}, - {0xE7, 0x0E, 0x29, 0x04}, - {0xEE, 0x0C, 0x22, 0x08}, - {0xF6, 0x0B, 0x1A, 0x0A}, - {0xF9, 0x0A, 0x17, 0x0C}, - {0xFC, 0x0A, 0x14, 0x0C}, - {0x00, 0x08, 0x10, 0x10}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* NTSCFilter_7 */ - {0xEC, 0x02, 0x24, 0x1C}, - {0xF2, 0x04, 0x1E, 0x18}, - {0xEB, 0x15, 0x25, 0xF6}, - {0xF4, 0x10, 0x1C, 0x00}, - {0xF8, 0x0F, 0x18, 0x02}, - {0x00, 0x04, 0x10, 0x18}, - {0x01, 0x06, 0x0F, 0x14}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_0 */ - {0x00, 0xE0, 0x10, 0x60}, - {0x00, 0xEE, 0x10, 0x44}, - {0x00, 0xF4, 0x10, 0x38}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xFC, 0xFB, 0x14, 0x2A}, - {0x00, 0x00, 0x10, 0x20}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_1 */ - {0x00, 0xE0, 0x10, 0x60}, - {0x00, 0xEE, 0x10, 0x44}, - {0x00, 0xF4, 0x10, 0x38}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xFC, 0xFB, 0x14, 0x2A}, - {0x00, 0x00, 0x10, 0x20}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_2 */ - {0xF5, 0xEE, 0x1B, 0x44}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xF1, 0xF7, 0x01, 0x32}, - {0xF5, 0xFB, 0x1B, 0x2A}, - {0xF9, 0xFF, 0x17, 0x22}, - {0xFB, 0x01, 0x15, 0x1E}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_3 */ - {0xF5, 0xFB, 0x1B, 0x2A}, - {0xEE, 0xFE, 0x22, 0x24}, - {0xF3, 0x00, 0x1D, 0x20}, - {0xF9, 0x03, 0x17, 0x1A}, - {0xFB, 0x02, 0x14, 0x1E}, - {0xFB, 0x04, 0x15, 0x18}, - {0x00, 0x06, 0x10, 0x14}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_4 */ - {0x00, 0xE0, 0x10, 0x60}, - {0x00, 0xEE, 0x10, 0x44}, - {0x00, 0xF4, 0x10, 0x38}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xFC, 0xFB, 0x14, 0x2A}, - {0x00, 0x00, 0x10, 0x20}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_5 */ - {0xF5, 0xEE, 0x1B, 0x44}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xF1, 0xF7, 0x1F, 0x32}, - {0xF5, 0xFB, 0x1B, 0x2A}, - {0xF9, 0xFF, 0x17, 0x22}, - {0xFB, 0x01, 0x15, 0x1E}, - {0x00, 0x04, 0x10, 0x18}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_6 */ - {0xF5, 0xEE, 0x1B, 0x2A}, - {0xEE, 0xFE, 0x22, 0x24}, - {0xF3, 0x00, 0x1D, 0x20}, - {0xF9, 0x03, 0x17, 0x1A}, - {0xFB, 0x02, 0x14, 0x1E}, - {0xFB, 0x04, 0x15, 0x18}, - {0x00, 0x06, 0x10, 0x14}, - {0xFF, 0xFF, 0xFF, 0xFF} } }, - { { {0x00, 0x00, 0x00, 0x40}, /* PALFilter_7 */ - {0xF5, 0xEE, 0x1B, 0x44}, - {0xF8, 0xF4, 0x18, 0x38}, - {0xFC, 0xFB, 0x14, 0x2A}, - {0xEB, 0x05, 0x25, 0x16}, - {0xF1, 0x05, 0x1F, 0x16}, - {0xFA, 0x07, 0x16, 0x12}, - {0x00, 0x07, 0x10, 0x12}, - {0xFF, 0xFF, 0xFF, 0xFF} } } -}; - -static int filter = -1; - -#endif diff --git a/drivers/staging/xgifb/XGI_main_26.c b/drivers/staging/xgifb/XGI_main_26.c deleted file mode 100644 index eca0b50f0df6..000000000000 --- a/drivers/staging/xgifb/XGI_main_26.c +++ /dev/null @@ -1,2083 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * XG20, XG21, XG40, XG42 frame buffer device - * for Linux kernels 2.5.x, 2.6.x - * Base on TW's sis fbdev code. - */ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include <linux/sizes.h> -#include <linux/module.h> -#include <linux/pci.h> - -#include "XGI_main.h" -#include "vb_init.h" -#include "vb_util.h" -#include "vb_setmode.h" - -#define Index_CR_GPIO_Reg1 0x48 -#define Index_CR_GPIO_Reg3 0x4a - -#define GPIOG_EN BIT(6) -#define GPIOG_READ BIT(1) - -static char *forcecrt2type; -static char *mode; -static int vesa = -1; -static unsigned int refresh_rate; - -/* -------------------- Macro definitions ---------------------------- */ - -#ifdef DEBUG -static void dumpVGAReg(struct xgifb_video_info *xgifb_info) -{ - struct vb_device_info *vb = &xgifb_info->dev_info; - u8 i, reg; - - xgifb_reg_set(vb->P3c4, 0x05, 0x86); - - for (i = 0; i < 0x4f; i++) { - reg = xgifb_reg_get(vb->P3c4, i); - pr_debug("o 3c4 %x\n", i); - pr_debug("i 3c5 => %x\n", reg); - } - - for (i = 0; i < 0xF0; i++) { - reg = xgifb_reg_get(vb->P3d4, i); - pr_debug("o 3d4 %x\n", i); - pr_debug("i 3d5 => %x\n", reg); - } -} -#else -static inline void dumpVGAReg(struct xgifb_video_info *xgifb_info) -{ -} -#endif - -/* --------------- Hardware Access Routines -------------------------- */ - -static int XGIfb_mode_rate_to_dclock(struct vb_device_info *XGI_Pr, - struct xgi_hw_device_info *HwDeviceExtension, - unsigned char modeno) -{ - unsigned short ModeNo = modeno; - unsigned short ModeIdIndex = 0, ClockIndex = 0; - unsigned short RefreshRateTableIndex = 0; - - InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr); - - XGI_SearchModeID(ModeNo, &ModeIdIndex); - - RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, - ModeIdIndex, XGI_Pr); - - ClockIndex = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; - - return XGI_VCLKData[ClockIndex].CLOCK * 1000; -} - -static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr, - struct xgi_hw_device_info *HwDeviceExtension, - unsigned char modeno, u32 *left_margin, - u32 *right_margin, u32 *upper_margin, - u32 *lower_margin, u32 *hsync_len, - u32 *vsync_len, u32 *sync, u32 *vmode) -{ - unsigned short ModeNo = modeno; - unsigned short ModeIdIndex, index = 0; - unsigned short RefreshRateTableIndex = 0; - - unsigned short VRE, VBE, VRS, VDE; - unsigned short HRE, HBE, HRS, HDE; - unsigned char sr_data, cr_data, cr_data2; - int B, C, D, F, temp, j; - - InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr); - if (!XGI_SearchModeID(ModeNo, &ModeIdIndex)) - return 0; - RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, - ModeIdIndex, XGI_Pr); - index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; - - sr_data = XGI_CRT1Table[index].CR[5]; - - HDE = XGI330_RefIndex[RefreshRateTableIndex].XRes >> 3; - - cr_data = XGI_CRT1Table[index].CR[3]; - - /* Horizontal retrace (=sync) start */ - HRS = (cr_data & 0xff) | ((unsigned short)(sr_data & 0xC0) << 2); - F = HRS - HDE - 3; - - sr_data = XGI_CRT1Table[index].CR[6]; - - cr_data = XGI_CRT1Table[index].CR[2]; - - cr_data2 = XGI_CRT1Table[index].CR[4]; - - /* Horizontal blank end */ - HBE = (cr_data & 0x1f) | ((unsigned short)(cr_data2 & 0x80) >> 2) - | ((unsigned short)(sr_data & 0x03) << 6); - - /* Horizontal retrace (=sync) end */ - HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3); - - temp = HBE - ((HDE - 1) & 255); - B = (temp > 0) ? temp : (temp + 256); - - temp = HRE - ((HDE + F + 3) & 63); - C = (temp > 0) ? temp : (temp + 64); - - D = B - F - C; - - *left_margin = D * 8; - *right_margin = F * 8; - *hsync_len = C * 8; - - sr_data = XGI_CRT1Table[index].CR[14]; - - cr_data2 = XGI_CRT1Table[index].CR[9]; - - VDE = XGI330_RefIndex[RefreshRateTableIndex].YRes; - - cr_data = XGI_CRT1Table[index].CR[10]; - - /* Vertical retrace (=sync) start */ - VRS = (cr_data & 0xff) | ((unsigned short)(cr_data2 & 0x04) << 6) - | ((unsigned short)(cr_data2 & 0x80) << 2) - | ((unsigned short)(sr_data & 0x08) << 7); - F = VRS + 1 - VDE; - - cr_data = XGI_CRT1Table[index].CR[13]; - - /* Vertical blank end */ - VBE = (cr_data & 0xff) | ((unsigned short)(sr_data & 0x10) << 4); - temp = VBE - ((VDE - 1) & 511); - B = (temp > 0) ? temp : (temp + 512); - - cr_data = XGI_CRT1Table[index].CR[11]; - - /* Vertical retrace (=sync) end */ - VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1); - temp = VRE - ((VDE + F - 1) & 31); - C = (temp > 0) ? temp : (temp + 32); - - D = B - F - C; - - *upper_margin = D; - *lower_margin = F; - *vsync_len = C; - - if (XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000) - *sync &= ~FB_SYNC_VERT_HIGH_ACT; - else - *sync |= FB_SYNC_VERT_HIGH_ACT; - - if (XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000) - *sync &= ~FB_SYNC_HOR_HIGH_ACT; - else - *sync |= FB_SYNC_HOR_HIGH_ACT; - - *vmode = FB_VMODE_NONINTERLACED; - if (XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080) { - *vmode = FB_VMODE_INTERLACED; - } else { - j = 0; - while (XGI330_EModeIDTable[j].Ext_ModeID != 0xff) { - if (XGI330_EModeIDTable[j].Ext_ModeID == - XGI330_RefIndex[RefreshRateTableIndex].ModeID) { - if (XGI330_EModeIDTable[j].Ext_ModeFlag & - DoubleScanMode) { - *vmode = FB_VMODE_DOUBLE; - } - break; - } - j++; - } - } - - return 1; -} - -void XGIRegInit(struct vb_device_info *XGI_Pr, unsigned long BaseAddr) -{ - XGI_Pr->P3c4 = BaseAddr + 0x14; - XGI_Pr->P3d4 = BaseAddr + 0x24; - XGI_Pr->P3c0 = BaseAddr + 0x10; - XGI_Pr->P3ce = BaseAddr + 0x1e; - XGI_Pr->P3c2 = BaseAddr + 0x12; - XGI_Pr->P3cc = BaseAddr + 0x1c; - XGI_Pr->P3ca = BaseAddr + 0x1a; - XGI_Pr->P3c6 = BaseAddr + 0x16; - XGI_Pr->P3c7 = BaseAddr + 0x17; - XGI_Pr->P3c8 = BaseAddr + 0x18; - XGI_Pr->P3c9 = BaseAddr + 0x19; - XGI_Pr->P3da = BaseAddr + 0x2A; - XGI_Pr->Part0Port = BaseAddr + XGI_CRT2_PORT_00; - /* Digital video interface registers (LCD) */ - XGI_Pr->Part1Port = BaseAddr + SIS_CRT2_PORT_04; - /* 301 TV Encoder registers */ - XGI_Pr->Part2Port = BaseAddr + SIS_CRT2_PORT_10; - /* 301 Macrovision registers */ - XGI_Pr->Part3Port = BaseAddr + SIS_CRT2_PORT_12; - /* 301 VGA2 (and LCD) registers */ - XGI_Pr->Part4Port = BaseAddr + SIS_CRT2_PORT_14; - /* 301 palette address port registers */ - XGI_Pr->Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2; -} - -/* ------------------ Internal helper routines ----------------- */ - -static int XGIfb_GetXG21DefaultLVDSModeIdx(struct xgifb_video_info *xgifb_info) -{ - int i = 0; - - while ((XGIbios_mode[i].mode_no != 0) && - (XGIbios_mode[i].xres <= xgifb_info->lvds_data.LVDSHDE)) { - if ((XGIbios_mode[i].xres == xgifb_info->lvds_data.LVDSHDE) && - (XGIbios_mode[i].yres == xgifb_info->lvds_data.LVDSVDE) && - (XGIbios_mode[i].bpp == 8)) { - return i; - } - i++; - } - - return -1; -} - -static void XGIfb_search_mode(struct xgifb_video_info *xgifb_info, - const char *name) -{ - unsigned int xres; - unsigned int yres; - unsigned int bpp; - int i; - - if (sscanf(name, "%ux%ux%u", &xres, &yres, &bpp) != 3) - goto invalid_mode; - - if (bpp == 24) - bpp = 32; /* That's for people who mix up color and fb depth. */ - - for (i = 0; XGIbios_mode[i].mode_no != 0; i++) - if (XGIbios_mode[i].xres == xres && - XGIbios_mode[i].yres == yres && - XGIbios_mode[i].bpp == bpp) { - xgifb_info->mode_idx = i; - return; - } -invalid_mode: - pr_info("Invalid mode '%s'\n", name); -} - -static void XGIfb_search_vesamode(struct xgifb_video_info *xgifb_info, - unsigned int vesamode) -{ - int i = 0; - - if (vesamode == 0) - goto invalid; - - vesamode &= 0x1dff; /* Clean VESA mode number from other flags */ - - while (XGIbios_mode[i].mode_no != 0) { - if ((XGIbios_mode[i].vesa_mode_no_1 == vesamode) || - (XGIbios_mode[i].vesa_mode_no_2 == vesamode)) { - xgifb_info->mode_idx = i; - return; - } - i++; - } - -invalid: - pr_info("Invalid VESA mode 0x%x'\n", vesamode); -} - -static int XGIfb_validate_mode(struct xgifb_video_info *xgifb_info, int myindex) -{ - u16 xres, yres; - struct xgi_hw_device_info *hw_info = &xgifb_info->hw_info; - unsigned long required_mem; - - if (xgifb_info->chip == XG21) { - if (xgifb_info->display2 == XGIFB_DISP_LCD) { - xres = xgifb_info->lvds_data.LVDSHDE; - yres = xgifb_info->lvds_data.LVDSVDE; - if (XGIbios_mode[myindex].xres > xres) - return -1; - if (XGIbios_mode[myindex].yres > yres) - return -1; - if ((XGIbios_mode[myindex].xres < xres) && - (XGIbios_mode[myindex].yres < yres)) { - if (XGIbios_mode[myindex].bpp > 8) - return -1; - } - } - goto check_memory; - } - - /* FIXME: for now, all is valid on XG27 */ - if (xgifb_info->chip == XG27) - goto check_memory; - - if (!(XGIbios_mode[myindex].chipset & MD_XGI315)) - return -1; - - switch (xgifb_info->display2) { - case XGIFB_DISP_LCD: - switch (hw_info->ulCRT2LCDType) { - case LCD_640x480: - xres = 640; - yres = 480; - break; - case LCD_800x600: - xres = 800; - yres = 600; - break; - case LCD_1024x600: - xres = 1024; - yres = 600; - break; - case LCD_1024x768: - xres = 1024; - yres = 768; - break; - case LCD_1152x768: - xres = 1152; - yres = 768; - break; - case LCD_1280x960: - xres = 1280; - yres = 960; - break; - case LCD_1280x768: - xres = 1280; - yres = 768; - break; - case LCD_1280x1024: - xres = 1280; - yres = 1024; - break; - case LCD_1400x1050: - xres = 1400; - yres = 1050; - break; - case LCD_1600x1200: - xres = 1600; - yres = 1200; - break; - default: - xres = 0; - yres = 0; - break; - } - if (XGIbios_mode[myindex].xres > xres) - return -1; - if (XGIbios_mode[myindex].yres > yres) - return -1; - if ((hw_info->ulExternalChip == 0x01) || /* LVDS */ - (hw_info->ulExternalChip == 0x05)) { /* LVDS+Chrontel */ - switch (XGIbios_mode[myindex].xres) { - case 512: - if (XGIbios_mode[myindex].yres != 512) - return -1; - if (hw_info->ulCRT2LCDType == LCD_1024x600) - return -1; - break; - case 640: - if ((XGIbios_mode[myindex].yres != 400) && - (XGIbios_mode[myindex].yres != 480)) - return -1; - break; - case 800: - if (XGIbios_mode[myindex].yres != 600) - return -1; - break; - case 1024: - if ((XGIbios_mode[myindex].yres != 600) && - (XGIbios_mode[myindex].yres != 768)) - return -1; - if ((XGIbios_mode[myindex].yres == 600) && - (hw_info->ulCRT2LCDType != LCD_1024x600)) - return -1; - break; - case 1152: - if ((XGIbios_mode[myindex].yres) != 768) - return -1; - if (hw_info->ulCRT2LCDType != LCD_1152x768) - return -1; - break; - case 1280: - if ((XGIbios_mode[myindex].yres != 768) && - (XGIbios_mode[myindex].yres != 1024)) - return -1; - if ((XGIbios_mode[myindex].yres == 768) && - (hw_info->ulCRT2LCDType != LCD_1280x768)) - return -1; - break; - case 1400: - if (XGIbios_mode[myindex].yres != 1050) - return -1; - break; - case 1600: - if (XGIbios_mode[myindex].yres != 1200) - return -1; - break; - default: - return -1; - } - } else { - switch (XGIbios_mode[myindex].xres) { - case 512: - if (XGIbios_mode[myindex].yres != 512) - return -1; - break; - case 640: - if ((XGIbios_mode[myindex].yres != 400) && - (XGIbios_mode[myindex].yres != 480)) - return -1; - break; - case 800: - if (XGIbios_mode[myindex].yres != 600) - return -1; - break; - case 1024: - if (XGIbios_mode[myindex].yres != 768) - return -1; - break; - case 1280: - if ((XGIbios_mode[myindex].yres != 960) && - (XGIbios_mode[myindex].yres != 1024)) - return -1; - if (XGIbios_mode[myindex].yres == 960) { - if (hw_info->ulCRT2LCDType == - LCD_1400x1050) - return -1; - } - break; - case 1400: - if (XGIbios_mode[myindex].yres != 1050) - return -1; - break; - case 1600: - if (XGIbios_mode[myindex].yres != 1200) - return -1; - break; - default: - return -1; - } - } - break; - case XGIFB_DISP_TV: - switch (XGIbios_mode[myindex].xres) { - case 512: - case 640: - case 800: - break; - case 720: - if (xgifb_info->TV_type == TVMODE_NTSC) { - if (XGIbios_mode[myindex].yres != 480) - return -1; - } else if (xgifb_info->TV_type == TVMODE_PAL) { - if (XGIbios_mode[myindex].yres != 576) - return -1; - } - /* LVDS/CHRONTEL does not support 720 */ - if (xgifb_info->hasVB == HASVB_LVDS_CHRONTEL || - xgifb_info->hasVB == HASVB_CHRONTEL) { - return -1; - } - break; - case 1024: - if (xgifb_info->TV_type == TVMODE_NTSC) { - if (XGIbios_mode[myindex].bpp == 32) - return -1; - } - break; - default: - return -1; - } - break; - case XGIFB_DISP_CRT: - if (XGIbios_mode[myindex].xres > 1280) - return -1; - break; - case XGIFB_DISP_NONE: - break; - } - -check_memory: - required_mem = XGIbios_mode[myindex].xres * XGIbios_mode[myindex].yres * - XGIbios_mode[myindex].bpp / 8; - if (required_mem > xgifb_info->video_size) - return -1; - return myindex; -} - -static void XGIfb_search_crt2type(const char *name) -{ - int i = 0; - - if (!name) - return; - - while (XGI_crt2type[i].type_no != -1) { - if (!strcmp(name, XGI_crt2type[i].name)) { - XGIfb_crt2type = XGI_crt2type[i].type_no; - XGIfb_tvplug = XGI_crt2type[i].tvplug_no; - break; - } - i++; - } - if (XGIfb_crt2type < 0) - pr_info("Invalid CRT2 type: %s\n", name); -} - -static u8 XGIfb_search_refresh_rate(struct xgifb_video_info *xgifb_info, - unsigned int rate) -{ - u16 xres, yres; - int i = 0; - - xres = XGIbios_mode[xgifb_info->mode_idx].xres; - yres = XGIbios_mode[xgifb_info->mode_idx].yres; - - xgifb_info->rate_idx = 0; - - while (XGIfb_vrate[i].idx != 0 && XGIfb_vrate[i].xres <= xres) { - /* Skip values with xres or yres less than specified */ - if ((XGIfb_vrate[i].yres != yres) || - (XGIfb_vrate[i].xres != xres)) { - i++; - continue; - } - if (XGIfb_vrate[i].refresh == rate) { - xgifb_info->rate_idx = XGIfb_vrate[i].idx; - break; - } else if (XGIfb_vrate[i].refresh > rate) { - if (XGIfb_vrate[i].refresh - rate <= 3) { - pr_debug("Adjusting rate from %d up to %d\n", - rate, XGIfb_vrate[i].refresh); - xgifb_info->rate_idx = XGIfb_vrate[i].idx; - xgifb_info->refresh_rate = - XGIfb_vrate[i].refresh; - } else if ((XGIfb_vrate[i].idx != 1) && - (rate - XGIfb_vrate[i - 1].refresh <= 2)) { - pr_debug("Adjusting rate from %d down to %d\n", - rate, XGIfb_vrate[i - 1].refresh); - xgifb_info->rate_idx = XGIfb_vrate[i - 1].idx; - xgifb_info->refresh_rate = - XGIfb_vrate[i - 1].refresh; - } - break; - } else if (rate - XGIfb_vrate[i].refresh <= 2) { - pr_debug("Adjusting rate from %d down to %d\n", - rate, XGIfb_vrate[i].refresh); - xgifb_info->rate_idx = XGIfb_vrate[i].idx; - break; - } - i++; - } - - if (xgifb_info->rate_idx > 0) - return xgifb_info->rate_idx; - pr_info("Unsupported rate %d for %dx%d\n", - rate, xres, yres); - return 0; -} - -static void XGIfb_search_tvstd(const char *name) -{ - int i = 0; - - if (!name) - return; - - while (XGI_tvtype[i].type_no != -1) { - if (!strcmp(name, XGI_tvtype[i].name)) { - XGIfb_tvmode = XGI_tvtype[i].type_no; - break; - } - i++; - } -} - -/* ----------- FBDev related routines for all series ----------- */ - -static void XGIfb_bpp_to_var(struct xgifb_video_info *xgifb_info, - struct fb_var_screeninfo *var) -{ - switch (var->bits_per_pixel) { - case 8: - var->red.offset = 0; - var->green.offset = 0; - var->blue.offset = 0; - var->red.length = 6; - var->green.length = 6; - var->blue.length = 6; - xgifb_info->video_cmap_len = 256; - break; - case 16: - var->red.offset = 11; - var->red.length = 5; - var->green.offset = 5; - var->green.length = 6; - var->blue.offset = 0; - var->blue.length = 5; - var->transp.offset = 0; - var->transp.length = 0; - xgifb_info->video_cmap_len = 16; - break; - case 32: - var->red.offset = 16; - var->red.length = 8; - var->green.offset = 8; - var->green.length = 8; - var->blue.offset = 0; - var->blue.length = 8; - var->transp.offset = 24; - var->transp.length = 8; - xgifb_info->video_cmap_len = 16; - break; - } -} - -/* --------------------- SetMode routines ------------------------- */ - -static void XGIfb_pre_setmode(struct xgifb_video_info *xgifb_info) -{ - struct vb_device_info *vb = &xgifb_info->dev_info; - u8 cr30 = 0, cr31 = 0; - - cr31 = xgifb_reg_get(vb->P3d4, 0x31); - cr31 &= ~0x60; - - switch (xgifb_info->display2) { - case XGIFB_DISP_CRT: - cr30 = SIS_VB_OUTPUT_CRT2 | SIS_SIMULTANEOUS_VIEW_ENABLE; - cr31 |= SIS_DRIVER_MODE; - break; - case XGIFB_DISP_LCD: - cr30 = SIS_VB_OUTPUT_LCD | SIS_SIMULTANEOUS_VIEW_ENABLE; - cr31 |= SIS_DRIVER_MODE; - break; - case XGIFB_DISP_TV: - if (xgifb_info->TV_type == TVMODE_HIVISION) - cr30 = SIS_VB_OUTPUT_HIVISION - | SIS_SIMULTANEOUS_VIEW_ENABLE; - else if (xgifb_info->TV_plug == TVPLUG_SVIDEO) - cr30 = SIS_VB_OUTPUT_SVIDEO - | SIS_SIMULTANEOUS_VIEW_ENABLE; - else if (xgifb_info->TV_plug == TVPLUG_COMPOSITE) - cr30 = SIS_VB_OUTPUT_COMPOSITE - | SIS_SIMULTANEOUS_VIEW_ENABLE; - else if (xgifb_info->TV_plug == TVPLUG_SCART) - cr30 = SIS_VB_OUTPUT_SCART - | SIS_SIMULTANEOUS_VIEW_ENABLE; - cr31 |= SIS_DRIVER_MODE; - - if (XGIfb_tvmode == 1 || xgifb_info->TV_type == TVMODE_PAL) - cr31 |= 0x01; - else - cr31 &= ~0x01; - break; - default: /* disable CRT2 */ - cr30 = 0x00; - cr31 |= (SIS_DRIVER_MODE | SIS_VB_OUTPUT_DISABLE); - } - - xgifb_reg_set(vb->P3d4, IND_XGI_SCRATCH_REG_CR30, cr30); - xgifb_reg_set(vb->P3d4, IND_XGI_SCRATCH_REG_CR31, cr31); - xgifb_reg_set(vb->P3d4, IND_XGI_SCRATCH_REG_CR33, - (xgifb_info->rate_idx & 0x0F)); -} - -static void XGIfb_post_setmode(struct xgifb_video_info *xgifb_info) -{ - struct vb_device_info *vb = &xgifb_info->dev_info; - u8 reg; - unsigned char doit = 1; - - if (xgifb_info->video_bpp == 8) { - /* - * We can't switch off CRT1 on LVDS/Chrontel - * in 8bpp Modes - */ - if ((xgifb_info->hasVB == HASVB_LVDS) || - (xgifb_info->hasVB == HASVB_LVDS_CHRONTEL)) { - doit = 0; - } - /* - * We can't switch off CRT1 on 301B-DH - * in 8bpp Modes if using LCD - */ - if (xgifb_info->display2 == XGIFB_DISP_LCD) - doit = 0; - } - - /* We can't switch off CRT1 if bridge is in slave mode */ - if (xgifb_info->hasVB != HASVB_NONE) { - reg = xgifb_reg_get(vb->Part1Port, 0x00); - - if ((reg & 0x50) == 0x10) - doit = 0; - - } else { - XGIfb_crt1off = 0; - } - - reg = xgifb_reg_get(vb->P3d4, 0x17); - if ((XGIfb_crt1off) && (doit)) - reg &= ~0x80; - else - reg |= 0x80; - xgifb_reg_set(vb->P3d4, 0x17, reg); - - xgifb_reg_and(vb->P3c4, IND_SIS_RAMDAC_CONTROL, ~0x04); - - if (xgifb_info->display2 == XGIFB_DISP_TV && - xgifb_info->hasVB == HASVB_301) { - reg = xgifb_reg_get(vb->Part4Port, 0x01); - - if (reg < 0xB0) { /* Set filter for XGI301 */ - int filter_tb; - - switch (xgifb_info->video_width) { - case 320: - filter_tb = (xgifb_info->TV_type == - TVMODE_NTSC) ? 4 : 12; - break; - case 640: - filter_tb = (xgifb_info->TV_type == - TVMODE_NTSC) ? 5 : 13; - break; - case 720: - filter_tb = (xgifb_info->TV_type == - TVMODE_NTSC) ? 6 : 14; - break; - case 800: - filter_tb = (xgifb_info->TV_type == - TVMODE_NTSC) ? 7 : 15; - break; - default: - filter_tb = 0; - filter = -1; - break; - } - xgifb_reg_or(vb->Part1Port, SIS_CRT2_WENABLE_315, 0x01); - - if (xgifb_info->TV_type == TVMODE_NTSC) { - xgifb_reg_and(vb->Part2Port, 0x3a, 0x1f); - - if (xgifb_info->TV_plug == TVPLUG_SVIDEO) { - xgifb_reg_and(vb->Part2Port, 0x30, 0xdf); - - } else if (xgifb_info->TV_plug - == TVPLUG_COMPOSITE) { - xgifb_reg_or(vb->Part2Port, 0x30, 0x20); - - switch (xgifb_info->video_width) { - case 640: - xgifb_reg_set(vb->Part2Port, - 0x35, - 0xEB); - xgifb_reg_set(vb->Part2Port, - 0x36, - 0x04); - xgifb_reg_set(vb->Part2Port, - 0x37, - 0x25); - xgifb_reg_set(vb->Part2Port, - 0x38, - 0x18); - break; - case 720: - xgifb_reg_set(vb->Part2Port, - 0x35, - 0xEE); - xgifb_reg_set(vb->Part2Port, - 0x36, - 0x0C); - xgifb_reg_set(vb->Part2Port, - 0x37, - 0x22); - xgifb_reg_set(vb->Part2Port, - 0x38, - 0x08); - break; - case 800: - xgifb_reg_set(vb->Part2Port, - 0x35, - 0xEB); - xgifb_reg_set(vb->Part2Port, - 0x36, - 0x15); - xgifb_reg_set(vb->Part2Port, - 0x37, - 0x25); - xgifb_reg_set(vb->Part2Port, - 0x38, - 0xF6); - break; - } - } - - } else if (xgifb_info->TV_type == TVMODE_PAL) { - xgifb_reg_and(vb->Part2Port, 0x3A, 0x1F); - - if (xgifb_info->TV_plug == TVPLUG_SVIDEO) { - xgifb_reg_and(vb->Part2Port, 0x30, 0xDF); - - } else if (xgifb_info->TV_plug - == TVPLUG_COMPOSITE) { - xgifb_reg_or(vb->Part2Port, 0x30, 0x20); - - switch (xgifb_info->video_width) { - case 640: - xgifb_reg_set(vb->Part2Port, - 0x35, - 0xF1); - xgifb_reg_set(vb->Part2Port, - 0x36, - 0xF7); - xgifb_reg_set(vb->Part2Port, - 0x37, - 0x1F); - xgifb_reg_set(vb->Part2Port, - 0x38, - 0x32); - break; - case 720: - xgifb_reg_set(vb->Part2Port, - 0x35, - 0xF3); - xgifb_reg_set(vb->Part2Port, - 0x36, - 0x00); - xgifb_reg_set(vb->Part2Port, - 0x37, - 0x1D); - xgifb_reg_set(vb->Part2Port, - 0x38, - 0x20); - break; - case 800: - xgifb_reg_set(vb->Part2Port, - 0x35, - 0xFC); - xgifb_reg_set(vb->Part2Port, - 0x36, - 0xFB); - xgifb_reg_set(vb->Part2Port, - 0x37, - 0x14); - xgifb_reg_set(vb->Part2Port, - 0x38, - 0x2A); - break; - } - } - } - - if ((filter >= 0) && (filter <= 7)) { - const u8 *f = XGI_TV_filter[filter_tb].filter[filter]; - - pr_debug("FilterTable[%d]-%d: %*ph\n", - filter_tb, filter, 4, f); - xgifb_reg_set(vb->Part2Port, 0x35, f[0]); - xgifb_reg_set(vb->Part2Port, 0x36, f[1]); - xgifb_reg_set(vb->Part2Port, 0x37, f[2]); - xgifb_reg_set(vb->Part2Port, 0x38, f[3]); - } - } - } -} - -static int XGIfb_do_set_var(struct fb_var_screeninfo *var, int isactive, - struct fb_info *info) -{ - struct xgifb_video_info *xgifb_info = info->par; - struct vb_device_info *vb = &xgifb_info->dev_info; - struct xgi_hw_device_info *hw_info = &xgifb_info->hw_info; - unsigned int htotal = var->left_margin + var->xres + var->right_margin - + var->hsync_len; - unsigned int vtotal = var->upper_margin + var->yres + var->lower_margin - + var->vsync_len; -#if defined(__BIG_ENDIAN) - u8 cr_data; -#endif - unsigned int drate = 0, hrate = 0; - int found_mode = 0; - int old_mode; - - info->var.xres_virtual = var->xres_virtual; - info->var.yres_virtual = var->yres_virtual; - info->var.bits_per_pixel = var->bits_per_pixel; - - if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) - vtotal <<= 1; - else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) - vtotal <<= 2; - - if (!htotal || !vtotal) { - pr_debug("Invalid 'var' information\n"); - return -EINVAL; - } pr_debug("var->pixclock=%d, htotal=%d, vtotal=%d\n", - var->pixclock, htotal, vtotal); - - if (var->pixclock) { - drate = 1000000000 / var->pixclock; - hrate = (drate * 1000) / htotal; - xgifb_info->refresh_rate = (unsigned int)(hrate * 2 - / vtotal); - } else { - xgifb_info->refresh_rate = 60; - } - - pr_debug("Change mode to %dx%dx%d-%dHz\n", - var->xres, var->yres, var->bits_per_pixel, - xgifb_info->refresh_rate); - - old_mode = xgifb_info->mode_idx; - xgifb_info->mode_idx = 0; - - while ((XGIbios_mode[xgifb_info->mode_idx].mode_no != 0) && - (XGIbios_mode[xgifb_info->mode_idx].xres <= var->xres)) { - if ((XGIbios_mode[xgifb_info->mode_idx].xres == var->xres) && - (XGIbios_mode[xgifb_info->mode_idx].yres == var->yres) && - (XGIbios_mode[xgifb_info->mode_idx].bpp - == var->bits_per_pixel)) { - found_mode = 1; - break; - } - xgifb_info->mode_idx++; - } - - if (found_mode) - xgifb_info->mode_idx = XGIfb_validate_mode(xgifb_info, - xgifb_info->mode_idx); - else - xgifb_info->mode_idx = -1; - - if (xgifb_info->mode_idx < 0) { - pr_err("Mode %dx%dx%d not supported\n", - var->xres, var->yres, var->bits_per_pixel); - xgifb_info->mode_idx = old_mode; - return -EINVAL; - } - - if (XGIfb_search_refresh_rate(xgifb_info, - xgifb_info->refresh_rate) == 0) { - xgifb_info->rate_idx = 1; - xgifb_info->refresh_rate = 60; - } - - if (isactive) { - XGIfb_pre_setmode(xgifb_info); - if (XGISetModeNew(xgifb_info, hw_info, - XGIbios_mode[xgifb_info->mode_idx].mode_no) - == 0) { - pr_err("Setting mode[0x%x] failed\n", - XGIbios_mode[xgifb_info->mode_idx].mode_no); - return -EINVAL; - } - info->fix.line_length = (info->var.xres_virtual - * info->var.bits_per_pixel) >> 6; - - xgifb_reg_set(vb->P3c4, IND_SIS_PASSWORD, SIS_PASSWORD); - - xgifb_reg_set(vb->P3d4, 0x13, (info->fix.line_length & 0x00ff)); - xgifb_reg_set(vb->P3c4, 0x0E, - (info->fix.line_length & 0xff00) >> 8); - - XGIfb_post_setmode(xgifb_info); - - pr_debug("Set new mode: %dx%dx%d-%d\n", - XGIbios_mode[xgifb_info->mode_idx].xres, - XGIbios_mode[xgifb_info->mode_idx].yres, - XGIbios_mode[xgifb_info->mode_idx].bpp, - xgifb_info->refresh_rate); - - xgifb_info->video_bpp = XGIbios_mode[xgifb_info->mode_idx].bpp; - xgifb_info->video_vwidth = info->var.xres_virtual; - xgifb_info->video_width = - XGIbios_mode[xgifb_info->mode_idx].xres; - xgifb_info->video_vheight = info->var.yres_virtual; - xgifb_info->video_height = - XGIbios_mode[xgifb_info->mode_idx].yres; - xgifb_info->org_x = 0; - xgifb_info->org_y = 0; - xgifb_info->video_linelength = info->var.xres_virtual - * (xgifb_info->video_bpp >> 3); - switch (xgifb_info->video_bpp) { - case 8: - xgifb_info->DstColor = 0x0000; - xgifb_info->XGI310_AccelDepth = 0x00000000; - xgifb_info->video_cmap_len = 256; -#if defined(__BIG_ENDIAN) - cr_data = xgifb_reg_get(vb->P3d4, 0x4D); - xgifb_reg_set(vb->P3d4, 0x4D, (cr_data & 0xE0)); -#endif - break; - case 16: - xgifb_info->DstColor = 0x8000; - xgifb_info->XGI310_AccelDepth = 0x00010000; -#if defined(__BIG_ENDIAN) - cr_data = xgifb_reg_get(vb->P3d4, 0x4D); - xgifb_reg_set(vb->P3d4, 0x4D, ((cr_data & 0xE0) | 0x0B)); -#endif - xgifb_info->video_cmap_len = 16; - break; - case 32: - xgifb_info->DstColor = 0xC000; - xgifb_info->XGI310_AccelDepth = 0x00020000; - xgifb_info->video_cmap_len = 16; -#if defined(__BIG_ENDIAN) - cr_data = xgifb_reg_get(vb->P3d4, 0x4D); - xgifb_reg_set(vb->P3d4, 0x4D, ((cr_data & 0xE0) | 0x15)); -#endif - break; - default: - xgifb_info->video_cmap_len = 16; - pr_err("Unsupported depth %d\n", - xgifb_info->video_bpp); - break; - } - } - XGIfb_bpp_to_var(xgifb_info, var); /* update ARGB info */ - - dumpVGAReg(xgifb_info); - return 0; -} - -static int XGIfb_pan_var(struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct xgifb_video_info *xgifb_info = info->par; - struct vb_device_info *vb = &xgifb_info->dev_info; - unsigned int base; - - base = var->yoffset * info->var.xres_virtual + var->xoffset; - - /* calculate base bpp dep. */ - switch (info->var.bits_per_pixel) { - case 16: - base >>= 1; - break; - case 32: - break; - case 8: - default: - base >>= 2; - break; - } - - xgifb_reg_set(vb->P3c4, IND_SIS_PASSWORD, SIS_PASSWORD); - - xgifb_reg_set(vb->P3d4, 0x0D, base & 0xFF); - xgifb_reg_set(vb->P3d4, 0x0C, (base >> 8) & 0xFF); - xgifb_reg_set(vb->P3c4, 0x0D, (base >> 16) & 0xFF); - xgifb_reg_set(vb->P3c4, 0x37, (base >> 24) & 0x03); - xgifb_reg_and_or(vb->P3c4, 0x37, 0xDF, (base >> 21) & 0x04); - - if (xgifb_info->display2 != XGIFB_DISP_NONE) { - xgifb_reg_or(vb->Part1Port, SIS_CRT2_WENABLE_315, 0x01); - xgifb_reg_set(vb->Part1Port, 0x06, (base & 0xFF)); - xgifb_reg_set(vb->Part1Port, 0x05, ((base >> 8) & 0xFF)); - xgifb_reg_set(vb->Part1Port, 0x04, ((base >> 16) & 0xFF)); - xgifb_reg_and_or(vb->Part1Port, 0x02, 0x7F, - ((base >> 24) & 0x01) << 7); - } - return 0; -} - -static int XGIfb_open(struct fb_info *info, int user) -{ - return 0; -} - -static int XGIfb_release(struct fb_info *info, int user) -{ - return 0; -} - -/* similar to sisfb_get_cmap_len */ -static int XGIfb_get_cmap_len(const struct fb_var_screeninfo *var) -{ - return (var->bits_per_pixel == 8) ? 256 : 16; -} - -static int XGIfb_setcolreg(unsigned int regno, unsigned int red, - unsigned int green, unsigned int blue, - unsigned int transp, struct fb_info *info) -{ - struct xgifb_video_info *xgifb_info = info->par; - struct vb_device_info *vb = &xgifb_info->dev_info; - - if (regno >= XGIfb_get_cmap_len(&info->var)) - return 1; - - switch (info->var.bits_per_pixel) { - case 8: - outb(regno, vb->P3c8); - outb((red >> 10), vb->P3c9); - outb((green >> 10), vb->P3c9); - outb((blue >> 10), vb->P3c9); - if (xgifb_info->display2 != XGIFB_DISP_NONE) { - outb(regno, vb->Part5Port); - outb((red >> 8), (vb->Part5Port + 1)); - outb((green >> 8), (vb->Part5Port + 1)); - outb((blue >> 8), (vb->Part5Port + 1)); - } - break; - case 16: - ((u32 *)(info->pseudo_palette))[regno] = ((red & 0xf800)) - | ((green & 0xfc00) >> 5) | ((blue & 0xf800) - >> 11); - break; - case 32: - red >>= 8; - green >>= 8; - blue >>= 8; - ((u32 *)(info->pseudo_palette))[regno] = (red << 16) | (green - << 8) | (blue); - break; - } - return 0; -} - -/* ----------- FBDev related routines for all series ---------- */ - -static int XGIfb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info) -{ - struct xgifb_video_info *xgifb_info = info->par; - - memset(fix, 0, sizeof(struct fb_fix_screeninfo)); - - strncpy(fix->id, "XGI", sizeof(fix->id) - 1); - - /* if register_framebuffer has been called, we must lock */ - if (atomic_read(&info->count)) - mutex_lock(&info->mm_lock); - - fix->smem_start = xgifb_info->video_base; - fix->smem_len = xgifb_info->video_size; - - /* if register_framebuffer has been called, we can unlock */ - if (atomic_read(&info->count)) - mutex_unlock(&info->mm_lock); - - fix->type = FB_TYPE_PACKED_PIXELS; - fix->type_aux = 0; - if (xgifb_info->video_bpp == 8) - fix->visual = FB_VISUAL_PSEUDOCOLOR; - else - fix->visual = FB_VISUAL_DIRECTCOLOR; - fix->xpanstep = 0; - if (XGIfb_ypan) - fix->ypanstep = 1; - fix->ywrapstep = 0; - fix->line_length = xgifb_info->video_linelength; - fix->mmio_start = xgifb_info->mmio_base; - fix->mmio_len = xgifb_info->mmio_size; - fix->accel = FB_ACCEL_SIS_XABRE; - - return 0; -} - -static int XGIfb_set_par(struct fb_info *info) -{ - int err; - - err = XGIfb_do_set_var(&info->var, 1, info); - if (err) - return err; - XGIfb_get_fix(&info->fix, -1, info); - return 0; -} - -static int XGIfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct xgifb_video_info *xgifb_info = info->par; - unsigned int htotal = var->left_margin + var->xres + var->right_margin - + var->hsync_len; - unsigned int vtotal = 0; - unsigned int drate = 0, hrate = 0; - int found_mode = 0; - int search_idx; - - if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) { - vtotal = var->upper_margin + var->yres + var->lower_margin - + var->vsync_len; - vtotal <<= 1; - } else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) { - vtotal = var->upper_margin + var->yres + var->lower_margin - + var->vsync_len; - vtotal <<= 2; - } else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) { - vtotal = var->upper_margin + (var->yres / 2) - + var->lower_margin + var->vsync_len; - } else - vtotal = var->upper_margin + var->yres + var->lower_margin - + var->vsync_len; - - if (!(htotal) || !(vtotal)) { - pr_debug("No valid timing data\n"); - return -EINVAL; - } - - if (var->pixclock && htotal && vtotal) { - drate = 1000000000 / var->pixclock; - hrate = (drate * 1000) / htotal; - xgifb_info->refresh_rate = - (unsigned int)(hrate * 2 / vtotal); - pr_debug( - "%s: pixclock = %d ,htotal=%d, vtotal=%d\n" - "%s: drate=%d, hrate=%d, refresh_rate=%d\n", - __func__, var->pixclock, htotal, vtotal, - __func__, drate, hrate, xgifb_info->refresh_rate); - } else { - xgifb_info->refresh_rate = 60; - } - - search_idx = 0; - while ((XGIbios_mode[search_idx].mode_no != 0) && - (XGIbios_mode[search_idx].xres <= var->xres)) { - if ((XGIbios_mode[search_idx].xres == var->xres) && - (XGIbios_mode[search_idx].yres == var->yres) && - (XGIbios_mode[search_idx].bpp == var->bits_per_pixel)) { - if (XGIfb_validate_mode(xgifb_info, search_idx) > 0) { - found_mode = 1; - break; - } - } - search_idx++; - } - - if (!found_mode) { - pr_err("%dx%dx%d is no valid mode\n", - var->xres, var->yres, var->bits_per_pixel); - search_idx = 0; - while (XGIbios_mode[search_idx].mode_no != 0) { - if ((var->xres <= XGIbios_mode[search_idx].xres) && - (var->yres <= XGIbios_mode[search_idx].yres) && - (var->bits_per_pixel == - XGIbios_mode[search_idx].bpp)) { - if (XGIfb_validate_mode(xgifb_info, - search_idx) > 0) { - found_mode = 1; - break; - } - } - search_idx++; - } - if (found_mode) { - var->xres = XGIbios_mode[search_idx].xres; - var->yres = XGIbios_mode[search_idx].yres; - pr_debug("Adapted to mode %dx%dx%d\n", - var->xres, var->yres, var->bits_per_pixel); - - } else { - pr_err("Failed to find similar mode to %dx%dx%d\n", - var->xres, var->yres, var->bits_per_pixel); - return -EINVAL; - } - } - - /* Adapt RGB settings */ - XGIfb_bpp_to_var(xgifb_info, var); - - if (!XGIfb_ypan) { - if (var->xres != var->xres_virtual) - var->xres_virtual = var->xres; - if (var->yres != var->yres_virtual) - var->yres_virtual = var->yres; - } - - /* Truncate offsets to maximum if too high */ - if (var->xoffset > var->xres_virtual - var->xres) - var->xoffset = var->xres_virtual - var->xres - 1; - - if (var->yoffset > var->yres_virtual - var->yres) - var->yoffset = var->yres_virtual - var->yres - 1; - - /* Set everything else to 0 */ - var->red.msb_right = 0; - var->green.msb_right = 0; - var->blue.msb_right = 0; - var->transp.offset = 0; - var->transp.length = 0; - var->transp.msb_right = 0; - - return 0; -} - -static int XGIfb_pan_display(struct fb_var_screeninfo *var, - struct fb_info *info) -{ - int err; - - if (var->xoffset > (info->var.xres_virtual - info->var.xres)) - return -EINVAL; - if (var->yoffset > (info->var.yres_virtual - info->var.yres)) - return -EINVAL; - - if (var->vmode & FB_VMODE_YWRAP) { - if (var->yoffset >= info->var.yres_virtual || var->xoffset) - return -EINVAL; - } else if (var->xoffset + info->var.xres > info->var.xres_virtual || - var->yoffset + info->var.yres > info->var.yres_virtual) { - return -EINVAL; - } - err = XGIfb_pan_var(var, info); - if (err < 0) - return err; - - info->var.xoffset = var->xoffset; - info->var.yoffset = var->yoffset; - if (var->vmode & FB_VMODE_YWRAP) - info->var.vmode |= FB_VMODE_YWRAP; - else - info->var.vmode &= ~FB_VMODE_YWRAP; - - return 0; -} - -static int XGIfb_blank(int blank, struct fb_info *info) -{ - struct xgifb_video_info *xgifb_info = info->par; - struct vb_device_info *vb = &xgifb_info->dev_info; - u8 reg; - - reg = xgifb_reg_get(vb->P3d4, 0x17); - - if (blank > 0) - reg &= 0x7f; - else - reg |= 0x80; - - xgifb_reg_set(vb->P3d4, 0x17, reg); - xgifb_reg_set(vb->P3c4, 0x00, 0x01); /* Synchronous Reset */ - xgifb_reg_set(vb->P3c4, 0x00, 0x03); /* End Reset */ - return 0; -} - -static struct fb_ops XGIfb_ops = { - .owner = THIS_MODULE, - .fb_open = XGIfb_open, - .fb_release = XGIfb_release, - .fb_check_var = XGIfb_check_var, - .fb_set_par = XGIfb_set_par, - .fb_setcolreg = XGIfb_setcolreg, - .fb_pan_display = XGIfb_pan_display, - .fb_blank = XGIfb_blank, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, -}; - -/* ---------------- Chip generation dependent routines ---------------- */ - -/* for XGI 315/550/650/740/330 */ - -static int XGIfb_get_dram_size(struct xgifb_video_info *xgifb_info) -{ - struct vb_device_info *vb = &xgifb_info->dev_info; - u8 ChannelNum, tmp; - u8 reg = 0; - - /* xorg driver sets 32MB * 1 channel */ - if (xgifb_info->chip == XG27) - xgifb_reg_set(vb->P3c4, IND_SIS_DRAM_SIZE, 0x51); - - reg = xgifb_reg_get(vb->P3c4, IND_SIS_DRAM_SIZE); - if (!reg) - return -1; - - switch ((reg & XGI_DRAM_SIZE_MASK) >> 4) { - case XGI_DRAM_SIZE_1MB: - xgifb_info->video_size = 0x100000; - break; - case XGI_DRAM_SIZE_2MB: - xgifb_info->video_size = 0x200000; - break; - case XGI_DRAM_SIZE_4MB: - xgifb_info->video_size = 0x400000; - break; - case XGI_DRAM_SIZE_8MB: - xgifb_info->video_size = 0x800000; - break; - case XGI_DRAM_SIZE_16MB: - xgifb_info->video_size = 0x1000000; - break; - case XGI_DRAM_SIZE_32MB: - xgifb_info->video_size = 0x2000000; - break; - case XGI_DRAM_SIZE_64MB: - xgifb_info->video_size = 0x4000000; - break; - case XGI_DRAM_SIZE_128MB: - xgifb_info->video_size = 0x8000000; - break; - case XGI_DRAM_SIZE_256MB: - xgifb_info->video_size = 0x10000000; - break; - default: - return -1; - } - - tmp = (reg & 0x0c) >> 2; - switch (xgifb_info->chip) { - case XG20: - case XG21: - case XG27: - ChannelNum = 1; - break; - - case XG42: - if (reg & 0x04) - ChannelNum = 2; - else - ChannelNum = 1; - break; - - case XG40: - default: - if (tmp == 2) - ChannelNum = 2; - else if (tmp == 3) - ChannelNum = 3; - else - ChannelNum = 1; - break; - } - - xgifb_info->video_size = xgifb_info->video_size * ChannelNum; - - pr_info("SR14=%x DramSzie %x ChannelNum %x\n", - reg, xgifb_info->video_size, ChannelNum); - return 0; -} - -static void XGIfb_detect_VB(struct xgifb_video_info *xgifb_info) -{ - struct vb_device_info *vb = &xgifb_info->dev_info; - u8 cr32, temp = 0; - - xgifb_info->TV_plug = 0; - xgifb_info->TV_type = 0; - - cr32 = xgifb_reg_get(vb->P3d4, IND_XGI_SCRATCH_REG_CR32); - - if ((cr32 & SIS_CRT1) && !XGIfb_crt1off) { - XGIfb_crt1off = 0; - } else { - if (cr32 & 0x5F) - XGIfb_crt1off = 1; - else - XGIfb_crt1off = 0; - } - - if (!xgifb_info->display2_force) { - if (cr32 & SIS_VB_TV) - xgifb_info->display2 = XGIFB_DISP_TV; - else if (cr32 & SIS_VB_LCD) - xgifb_info->display2 = XGIFB_DISP_LCD; - else if (cr32 & SIS_VB_CRT2) - xgifb_info->display2 = XGIFB_DISP_CRT; - else - xgifb_info->display2 = XGIFB_DISP_NONE; - } - - if (XGIfb_tvplug != -1) { - /* Override with option */ - xgifb_info->TV_plug = XGIfb_tvplug; - } else if (cr32 & SIS_VB_HIVISION) { - xgifb_info->TV_type = TVMODE_HIVISION; - xgifb_info->TV_plug = TVPLUG_SVIDEO; - } else if (cr32 & SIS_VB_SVIDEO) { - xgifb_info->TV_plug = TVPLUG_SVIDEO; - } else if (cr32 & SIS_VB_COMPOSITE) { - xgifb_info->TV_plug = TVPLUG_COMPOSITE; - } else if (cr32 & SIS_VB_SCART) { - xgifb_info->TV_plug = TVPLUG_SCART; - } - - if (xgifb_info->TV_type == 0) { - temp = xgifb_reg_get(vb->P3d4, 0x38); - if (temp & 0x10) - xgifb_info->TV_type = TVMODE_PAL; - else - xgifb_info->TV_type = TVMODE_NTSC; - } - - /* Copy forceCRT1 option to CRT1off if option is given */ - if (XGIfb_forcecrt1 != -1) { - if (XGIfb_forcecrt1) - XGIfb_crt1off = 0; - else - XGIfb_crt1off = 1; - } -} - -static bool XGIfb_has_VB(struct xgifb_video_info *xgifb_info) -{ - u8 vb_chipid; - - vb_chipid = xgifb_reg_get(xgifb_info->dev_info.Part4Port, 0x00); - switch (vb_chipid) { - case 0x01: - xgifb_info->hasVB = HASVB_301; - break; - case 0x02: - xgifb_info->hasVB = HASVB_302; - break; - default: - xgifb_info->hasVB = HASVB_NONE; - return false; - } - return true; -} - -static void XGIfb_get_VB_type(struct xgifb_video_info *xgifb_info) -{ - u8 reg; - - if (!XGIfb_has_VB(xgifb_info)) { - reg = xgifb_reg_get(xgifb_info->dev_info.P3d4, - IND_XGI_SCRATCH_REG_CR37); - switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) { - case SIS_EXTERNAL_CHIP_LVDS: - xgifb_info->hasVB = HASVB_LVDS; - break; - case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL: - xgifb_info->hasVB = HASVB_LVDS_CHRONTEL; - break; - default: - break; - } - } -} - -static int __init xgifb_optval(char *fullopt, int validx) -{ - unsigned long lres; - - if (kstrtoul(fullopt + validx, 0, &lres) < 0 || lres > INT_MAX) { - pr_err("Invalid value for option: %s\n", fullopt); - return 0; - } - return lres; -} - -static int __init XGIfb_setup(char *options) -{ - char *this_opt; - - if (!options || !*options) - return 0; - - pr_info("Options: %s\n", options); - - while ((this_opt = strsep(&options, ",")) != NULL) { - if (!*this_opt) - continue; - - if (!strncmp(this_opt, "mode:", 5)) { - mode = this_opt + 5; - } else if (!strncmp(this_opt, "vesa:", 5)) { - vesa = xgifb_optval(this_opt, 5); - } else if (!strncmp(this_opt, "vrate:", 6)) { - refresh_rate = xgifb_optval(this_opt, 6); - } else if (!strncmp(this_opt, "rate:", 5)) { - refresh_rate = xgifb_optval(this_opt, 5); - } else if (!strncmp(this_opt, "crt1off", 7)) { - XGIfb_crt1off = 1; - } else if (!strncmp(this_opt, "filter:", 7)) { - filter = xgifb_optval(this_opt, 7); - } else if (!strncmp(this_opt, "forcecrt2type:", 14)) { - XGIfb_search_crt2type(this_opt + 14); - } else if (!strncmp(this_opt, "forcecrt1:", 10)) { - XGIfb_forcecrt1 = xgifb_optval(this_opt, 10); - } else if (!strncmp(this_opt, "tvmode:", 7)) { - XGIfb_search_tvstd(this_opt + 7); - } else if (!strncmp(this_opt, "tvstandard:", 11)) { - XGIfb_search_tvstd(this_opt + 7); - } else if (!strncmp(this_opt, "dstn", 4)) { - enable_dstn = 1; - /* DSTN overrules forcecrt2type */ - XGIfb_crt2type = XGIFB_DISP_LCD; - } else if (!strncmp(this_opt, "noypan", 6)) { - XGIfb_ypan = 0; - } else { - mode = this_opt; - } - } - return 0; -} - -static int xgifb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) -{ - u8 reg, reg1; - u8 CR48, CR38; - int ret; - struct fb_info *fb_info; - struct xgifb_video_info *xgifb_info; - struct vb_device_info *vb; - struct xgi_hw_device_info *hw_info; - unsigned long video_size_max; - - fb_info = framebuffer_alloc(sizeof(*xgifb_info), &pdev->dev); - if (!fb_info) - return -ENOMEM; - - xgifb_info = fb_info->par; - vb = &xgifb_info->dev_info; - hw_info = &xgifb_info->hw_info; - xgifb_info->fb_info = fb_info; - xgifb_info->chip_id = pdev->device; - pci_read_config_byte(pdev, - PCI_REVISION_ID, - &xgifb_info->revision_id); - hw_info->jChipRevision = xgifb_info->revision_id; - - xgifb_info->pcibus = pdev->bus->number; - xgifb_info->pcislot = PCI_SLOT(pdev->devfn); - xgifb_info->pcifunc = PCI_FUNC(pdev->devfn); - xgifb_info->subsysvendor = pdev->subsystem_vendor; - xgifb_info->subsysdevice = pdev->subsystem_device; - - video_size_max = pci_resource_len(pdev, 0); - xgifb_info->video_base = pci_resource_start(pdev, 0); - xgifb_info->mmio_base = pci_resource_start(pdev, 1); - xgifb_info->mmio_size = pci_resource_len(pdev, 1); - xgifb_info->vga_base = pci_resource_start(pdev, 2) + 0x30; - dev_info(&pdev->dev, "Relocate IO address: %llx [%08lx]\n", - (u64)pci_resource_start(pdev, 2), - xgifb_info->vga_base); - - if (pci_enable_device(pdev)) { - ret = -EIO; - goto error; - } - - if (XGIfb_crt2type != -1) { - xgifb_info->display2 = XGIfb_crt2type; - xgifb_info->display2_force = true; - } - - XGIRegInit(vb, xgifb_info->vga_base); - - xgifb_reg_set(vb->P3c4, - IND_SIS_PASSWORD, SIS_PASSWORD); - reg1 = xgifb_reg_get(vb->P3c4, IND_SIS_PASSWORD); - - if (reg1 != 0xa1) { /* I/O error */ - dev_err(&pdev->dev, "I/O error\n"); - ret = -EIO; - goto error_disable; - } - - switch (xgifb_info->chip_id) { - case PCI_DEVICE_ID_XGI_20: - xgifb_reg_or(vb->P3d4, - Index_CR_GPIO_Reg3, GPIOG_EN); - CR48 = xgifb_reg_get(vb->P3d4, - Index_CR_GPIO_Reg1); - if (CR48 & GPIOG_READ) - xgifb_info->chip = XG21; - else - xgifb_info->chip = XG20; - break; - case PCI_DEVICE_ID_XGI_40: - xgifb_info->chip = XG40; - break; - case PCI_DEVICE_ID_XGI_42: - xgifb_info->chip = XG42; - break; - case PCI_DEVICE_ID_XGI_27: - xgifb_info->chip = XG27; - break; - default: - ret = -ENODEV; - goto error_disable; - } - - dev_info(&pdev->dev, "chipid = %x\n", xgifb_info->chip); - hw_info->jChipType = xgifb_info->chip; - - if (XGIfb_get_dram_size(xgifb_info)) { - xgifb_info->video_size = min_t(unsigned long, video_size_max, - SZ_16M); - } else if (xgifb_info->video_size > video_size_max) { - xgifb_info->video_size = video_size_max; - } - - /* Enable PCI_LINEAR_ADDRESSING and MMIO_ENABLE */ - xgifb_reg_or(vb->P3c4, - IND_SIS_PCI_ADDRESS_SET, - (SIS_PCI_ADDR_ENABLE | SIS_MEM_MAP_IO_ENABLE)); - /* Enable 2D accelerator engine */ - xgifb_reg_or(vb->P3c4, - IND_SIS_MODULE_ENABLE, SIS_ENABLE_2D); - - hw_info->ulVideoMemorySize = xgifb_info->video_size; - - if (!request_mem_region(xgifb_info->video_base, - xgifb_info->video_size, - "XGIfb FB")) { - dev_err(&pdev->dev, "Unable request memory size %x\n", - xgifb_info->video_size); - dev_err(&pdev->dev, - "Fatal error: Unable to reserve frame buffer memory. Is there another framebuffer driver active?\n"); - ret = -ENODEV; - goto error_disable; - } - - if (!request_mem_region(xgifb_info->mmio_base, - xgifb_info->mmio_size, - "XGIfb MMIO")) { - dev_err(&pdev->dev, - "Fatal error: Unable to reserve MMIO region\n"); - ret = -ENODEV; - goto error_0; - } - - xgifb_info->video_vbase = - ioremap_wc(xgifb_info->video_base, xgifb_info->video_size); - hw_info->pjVideoMemoryAddress = - ioremap_wc(xgifb_info->video_base, xgifb_info->video_size); - xgifb_info->mmio_vbase = ioremap(xgifb_info->mmio_base, - xgifb_info->mmio_size); - - dev_info(&pdev->dev, - "Framebuffer at 0x%llx, mapped to 0x%p, size %dk\n", - (u64)xgifb_info->video_base, - xgifb_info->video_vbase, - xgifb_info->video_size / 1024); - - dev_info(&pdev->dev, - "MMIO at 0x%llx, mapped to 0x%p, size %ldk\n", - (u64)xgifb_info->mmio_base, xgifb_info->mmio_vbase, - xgifb_info->mmio_size / 1024); - - pci_set_drvdata(pdev, xgifb_info); - if (!XGIInitNew(pdev)) - dev_err(&pdev->dev, "XGIInitNew() failed!\n"); - - xgifb_info->mtrr = -1; - - xgifb_info->hasVB = HASVB_NONE; - if ((xgifb_info->chip == XG20) || - (xgifb_info->chip == XG27)) { - xgifb_info->hasVB = HASVB_NONE; - } else if (xgifb_info->chip == XG21) { - CR38 = xgifb_reg_get(vb->P3d4, 0x38); - if ((CR38 & 0xE0) == 0xC0) - xgifb_info->display2 = XGIFB_DISP_LCD; - else if ((CR38 & 0xE0) == 0x60) - xgifb_info->hasVB = HASVB_CHRONTEL; - else - xgifb_info->hasVB = HASVB_NONE; - } else { - XGIfb_get_VB_type(xgifb_info); - } - - hw_info->ujVBChipID = VB_CHIP_UNKNOWN; - - hw_info->ulExternalChip = 0; - - switch (xgifb_info->hasVB) { - case HASVB_301: - reg = xgifb_reg_get(vb->Part4Port, 0x01); - if (reg >= 0xE0) { - hw_info->ujVBChipID = VB_CHIP_302LV; - dev_info(&pdev->dev, - "XGI302LV bridge detected (revision 0x%02x)\n", - reg); - } else if (reg >= 0xD0) { - hw_info->ujVBChipID = VB_CHIP_301LV; - dev_info(&pdev->dev, - "XGI301LV bridge detected (revision 0x%02x)\n", - reg); - } else { - hw_info->ujVBChipID = VB_CHIP_301; - dev_info(&pdev->dev, "XGI301 bridge detected\n"); - } - break; - case HASVB_302: - reg = xgifb_reg_get(vb->Part4Port, 0x01); - if (reg >= 0xE0) { - hw_info->ujVBChipID = VB_CHIP_302LV; - dev_info(&pdev->dev, - "XGI302LV bridge detected (revision 0x%02x)\n", - reg); - } else if (reg >= 0xD0) { - hw_info->ujVBChipID = VB_CHIP_301LV; - dev_info(&pdev->dev, - "XGI302LV bridge detected (revision 0x%02x)\n", - reg); - } else if (reg >= 0xB0) { - reg1 = xgifb_reg_get(vb->Part4Port, - 0x23); - - hw_info->ujVBChipID = VB_CHIP_302B; - - } else { - hw_info->ujVBChipID = VB_CHIP_302; - dev_info(&pdev->dev, "XGI302 bridge detected\n"); - } - break; - case HASVB_LVDS: - hw_info->ulExternalChip = 0x1; - dev_info(&pdev->dev, "LVDS transmitter detected\n"); - break; - case HASVB_TRUMPION: - hw_info->ulExternalChip = 0x2; - dev_info(&pdev->dev, "Trumpion Zurac LVDS scaler detected\n"); - break; - case HASVB_CHRONTEL: - hw_info->ulExternalChip = 0x4; - dev_info(&pdev->dev, "Chrontel TV encoder detected\n"); - break; - case HASVB_LVDS_CHRONTEL: - hw_info->ulExternalChip = 0x5; - dev_info(&pdev->dev, - "LVDS transmitter and Chrontel TV encoder detected\n"); - break; - default: - dev_info(&pdev->dev, "No or unknown bridge type detected\n"); - break; - } - - if (xgifb_info->hasVB != HASVB_NONE) - XGIfb_detect_VB(xgifb_info); - else if (xgifb_info->chip != XG21) - xgifb_info->display2 = XGIFB_DISP_NONE; - - if (xgifb_info->display2 == XGIFB_DISP_LCD) { - if (!enable_dstn) { - reg = xgifb_reg_get(vb->P3d4, - IND_XGI_LCD_PANEL); - reg &= 0x0f; - hw_info->ulCRT2LCDType = XGI310paneltype[reg]; - } - } - - xgifb_info->mode_idx = -1; - - if (mode) - XGIfb_search_mode(xgifb_info, mode); - else if (vesa != -1) - XGIfb_search_vesamode(xgifb_info, vesa); - - if (xgifb_info->mode_idx >= 0) - xgifb_info->mode_idx = - XGIfb_validate_mode(xgifb_info, xgifb_info->mode_idx); - - if (xgifb_info->mode_idx < 0) { - if (xgifb_info->display2 == XGIFB_DISP_LCD && - xgifb_info->chip == XG21) - xgifb_info->mode_idx = - XGIfb_GetXG21DefaultLVDSModeIdx(xgifb_info); - else - xgifb_info->mode_idx = DEFAULT_MODE; - } - - if (xgifb_info->mode_idx < 0) { - dev_err(&pdev->dev, "No supported video mode found\n"); - ret = -EINVAL; - goto error_1; - } - - /* set default refresh rate */ - xgifb_info->refresh_rate = refresh_rate; - if (xgifb_info->refresh_rate == 0) - xgifb_info->refresh_rate = 60; - if (XGIfb_search_refresh_rate(xgifb_info, xgifb_info->refresh_rate) == 0) { - xgifb_info->rate_idx = 1; - xgifb_info->refresh_rate = 60; - } - - xgifb_info->video_bpp = XGIbios_mode[xgifb_info->mode_idx].bpp; - xgifb_info->video_vwidth = - xgifb_info->video_width = - XGIbios_mode[xgifb_info->mode_idx].xres; - xgifb_info->video_vheight = - xgifb_info->video_height = - XGIbios_mode[xgifb_info->mode_idx].yres; - xgifb_info->org_x = 0; - xgifb_info->org_y = 0; - xgifb_info->video_linelength = - xgifb_info->video_width * - (xgifb_info->video_bpp >> 3); - switch (xgifb_info->video_bpp) { - case 8: - xgifb_info->DstColor = 0x0000; - xgifb_info->XGI310_AccelDepth = 0x00000000; - xgifb_info->video_cmap_len = 256; - break; - case 16: - xgifb_info->DstColor = 0x8000; - xgifb_info->XGI310_AccelDepth = 0x00010000; - xgifb_info->video_cmap_len = 16; - break; - case 32: - xgifb_info->DstColor = 0xC000; - xgifb_info->XGI310_AccelDepth = 0x00020000; - xgifb_info->video_cmap_len = 16; - break; - default: - xgifb_info->video_cmap_len = 16; - pr_info("Unsupported depth %d\n", - xgifb_info->video_bpp); - break; - } - - pr_info("Default mode is %dx%dx%d (%dHz)\n", - xgifb_info->video_width, xgifb_info->video_height, - xgifb_info->video_bpp, xgifb_info->refresh_rate); - - fb_info->var.red.length = 8; - fb_info->var.green.length = 8; - fb_info->var.blue.length = 8; - fb_info->var.activate = FB_ACTIVATE_NOW; - fb_info->var.height = -1; - fb_info->var.width = -1; - fb_info->var.vmode = FB_VMODE_NONINTERLACED; - fb_info->var.xres = xgifb_info->video_width; - fb_info->var.xres_virtual = xgifb_info->video_width; - fb_info->var.yres = xgifb_info->video_height; - fb_info->var.yres_virtual = xgifb_info->video_height; - fb_info->var.bits_per_pixel = xgifb_info->video_bpp; - - XGIfb_bpp_to_var(xgifb_info, &fb_info->var); - - fb_info->var.pixclock = (u32)(1000000000 / XGIfb_mode_rate_to_dclock - (vb, hw_info, - XGIbios_mode[xgifb_info->mode_idx].mode_no)); - - if (XGIfb_mode_rate_to_ddata(vb, hw_info, - XGIbios_mode[xgifb_info->mode_idx].mode_no, - &fb_info->var.left_margin, - &fb_info->var.right_margin, - &fb_info->var.upper_margin, - &fb_info->var.lower_margin, - &fb_info->var.hsync_len, - &fb_info->var.vsync_len, - &fb_info->var.sync, - &fb_info->var.vmode)) { - if ((fb_info->var.vmode & FB_VMODE_MASK) == - FB_VMODE_INTERLACED) { - fb_info->var.yres <<= 1; - fb_info->var.yres_virtual <<= 1; - } else if ((fb_info->var.vmode & FB_VMODE_MASK) == - FB_VMODE_DOUBLE) { - fb_info->var.pixclock >>= 1; - fb_info->var.yres >>= 1; - fb_info->var.yres_virtual >>= 1; - } - } - - fb_info->flags = FBINFO_FLAG_DEFAULT; - fb_info->screen_base = xgifb_info->video_vbase; - fb_info->fbops = &XGIfb_ops; - XGIfb_get_fix(&fb_info->fix, -1, fb_info); - fb_info->pseudo_palette = xgifb_info->pseudo_palette; - - fb_alloc_cmap(&fb_info->cmap, 256, 0); - - xgifb_info->mtrr = arch_phys_wc_add(xgifb_info->video_base, - xgifb_info->video_size); - - if (register_framebuffer(fb_info) < 0) { - ret = -EINVAL; - goto error_mtrr; - } - - dumpVGAReg(xgifb_info); - - return 0; - -error_mtrr: - arch_phys_wc_del(xgifb_info->mtrr); -error_1: - iounmap(xgifb_info->mmio_vbase); - iounmap(xgifb_info->video_vbase); - release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size); -error_0: - release_mem_region(xgifb_info->video_base, xgifb_info->video_size); -error_disable: - pci_disable_device(pdev); -error: - framebuffer_release(fb_info); - return ret; -} - -/* -------------------- PCI DEVICE HANDLING -------------------- */ - -static void xgifb_remove(struct pci_dev *pdev) -{ - struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev); - struct fb_info *fb_info = xgifb_info->fb_info; - - unregister_framebuffer(fb_info); - arch_phys_wc_del(xgifb_info->mtrr); - iounmap(xgifb_info->mmio_vbase); - iounmap(xgifb_info->video_vbase); - release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size); - release_mem_region(xgifb_info->video_base, xgifb_info->video_size); - pci_disable_device(pdev); - framebuffer_release(fb_info); -} - -static struct pci_driver xgifb_driver = { - .name = "xgifb", - .id_table = xgifb_pci_table, - .probe = xgifb_probe, - .remove = xgifb_remove -}; - -/* -------------------- MODULE -------------------- */ - -module_param(mode, charp, 0000); -MODULE_PARM_DESC(mode, - "Selects the desired default display mode in the format XxYxDepth (eg. 1024x768x16)."); - -module_param(forcecrt2type, charp, 0000); -MODULE_PARM_DESC(forcecrt2type, - "Force the second display output type. Possible values are NONE, LCD, TV, VGA, SVIDEO or COMPOSITE."); - -module_param(vesa, int, 0000); -MODULE_PARM_DESC(vesa, - "Selects the desired default display mode by VESA mode number (eg. 0x117)."); - -module_param(filter, int, 0000); -MODULE_PARM_DESC(filter, - "Selects TV flicker filter type (only for systems with a SiS301 video bridge). Possible values 0-7. Default: [no filter])."); - -static int __init xgifb_init(void) -{ - char *option = NULL; - - if (forcecrt2type) - XGIfb_search_crt2type(forcecrt2type); - if (fb_get_options("xgifb", &option)) - return -ENODEV; - XGIfb_setup(option); - - return pci_register_driver(&xgifb_driver); -} - -static void __exit xgifb_remove_module(void) -{ - pci_unregister_driver(&xgifb_driver); - pr_debug("Module unloaded\n"); -} - -MODULE_DESCRIPTION("Z7 Z9 Z9S Z11 framebuffer device driver"); -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("XGITECH , Others"); -module_init(xgifb_init); -module_exit(xgifb_remove_module); diff --git a/drivers/staging/xgifb/XGIfb.h b/drivers/staging/xgifb/XGIfb.h deleted file mode 100644 index 982c676c16c6..000000000000 --- a/drivers/staging/xgifb/XGIfb.h +++ /dev/null @@ -1,109 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _LINUX_XGIFB -#define _LINUX_XGIFB -#include "vgatypes.h" -#include "vb_struct.h" - -enum xgifb_display_type { - XGIFB_DISP_NONE = 0, - XGIFB_DISP_CRT, - XGIFB_DISP_LCD, - XGIFB_DISP_TV, -}; - -#define HASVB_NONE 0x00 -#define HASVB_301 0x01 -#define HASVB_LVDS 0x02 -#define HASVB_TRUMPION 0x04 -#define HASVB_LVDS_CHRONTEL 0x10 -#define HASVB_302 0x20 -#define HASVB_CHRONTEL 0x80 - -enum XGI_CHIP_TYPE { - XG40 = 32, - XG42, - XG20 = 48, - XG21, - XG27, -}; - -enum xgi_tvtype { - TVMODE_NTSC = 0, - TVMODE_PAL, - TVMODE_HIVISION, - TVTYPE_PALM, - TVTYPE_PALN, - TVTYPE_NTSCJ, - TVMODE_TOTAL -}; - -enum xgi_tv_plug { - TVPLUG_UNKNOWN = 0, - TVPLUG_COMPOSITE = 1, - TVPLUG_SVIDEO = 2, - TVPLUG_COMPOSITE_AND_SVIDEO = 3, - TVPLUG_SCART = 4, - TVPLUG_YPBPR_525i = 5, - TVPLUG_YPBPR_525P = 6, - TVPLUG_YPBPR_750P = 7, - TVPLUG_YPBPR_1080i = 8, - TVPLUG_TOTAL -}; - -struct xgifb_video_info { - struct fb_info *fb_info; - struct xgi_hw_device_info hw_info; - struct vb_device_info dev_info; - - int mode_idx; - int rate_idx; - - u32 pseudo_palette[17]; - - int chip_id; - unsigned int video_size; - phys_addr_t video_base; - void __iomem *video_vbase; - phys_addr_t mmio_base; - unsigned long mmio_size; - void __iomem *mmio_vbase; - unsigned long vga_base; - int mtrr; - - int video_bpp; - int video_cmap_len; - int video_width; - int video_height; - int video_vwidth; - int video_vheight; - int org_x; - int org_y; - int video_linelength; - unsigned int refresh_rate; - - enum xgifb_display_type display2; /* the second display output type */ - bool display2_force; - unsigned char hasVB; - unsigned char TV_type; - unsigned char TV_plug; - - struct XGI21_LVDSCapStruct lvds_data; - - enum XGI_CHIP_TYPE chip; - unsigned char revision_id; - - unsigned short DstColor; - unsigned long XGI310_AccelDepth; - unsigned long CommandReg; - - unsigned int pcibus; - unsigned int pcislot; - unsigned int pcifunc; - - unsigned short subsysvendor; - unsigned short subsysdevice; - - char reserved[236]; -}; - -#endif diff --git a/drivers/staging/xgifb/vb_def.h b/drivers/staging/xgifb/vb_def.h deleted file mode 100644 index 0311e2682d27..000000000000 --- a/drivers/staging/xgifb/vb_def.h +++ /dev/null @@ -1,257 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _VB_DEF_ -#define _VB_DEF_ -#include "../../video/fbdev/sis/initdef.h" - -#define VB_XGI301C 0x0020 /* for 301C */ - -#define SupportCRT2in301C 0x0100 /* for 301C */ -#define SetCHTVOverScan 0x8000 - -#define PanelResInfo 0x1F /* CR36 Panel Type/LCDResInfo */ -#define Panel_1024x768x75 0x22 -#define Panel_1280x1024x75 0x23 - -#define PanelRef60Hz 0x00 -#define PanelRef75Hz 0x20 - -#define YPbPr525iVCLK 0x03B -#define YPbPr525iVCLK_2 0x03A - -#define XGI_CRT2_PORT_00 (0x00 - 0x030) - -#define SupportAllCRT2 0x0078 -#define NoSupportTV 0x0070 -#define NoSupportHiVisionTV 0x0060 -#define NoSupportLCD 0x0058 - -/* -------------- SetMode Stack/Scratch */ -#define XGI_SetCRT2ToLCDA 0x0100 -#define SetCRT2ToDualEdge 0x8000 - -#define ReserveTVOption 0x0008 - -#define SetTVLowResolution 0x0400 -#define TVSimuMode 0x0800 -#define RPLLDIV2XO 0x1000 -#define NTSC1024x768 0x2000 -#define SetTVLockMode 0x4000 - -#define XGI_LCDVESATiming 0x0001 /* LCD Info/CR37 */ -#define XGI_EnableLVDSDDA 0x0002 -#define EnableScalingLCD 0x0008 -#define SetPWDEnable 0x0004 -#define SetLCDtoNonExpanding 0x0010 -#define SetLCDDualLink 0x0100 -#define SetLCDLowResolution 0x0200 - -/* LCD Capability shampoo */ -#define DefaultLCDCap 0x80ea -#define EnableLCD24bpp 0x0004 /* default */ -#define LCDPolarity 0x00c0 /* default: SyncNN */ -#define XGI_LCDDualLink 0x0100 -#define EnableSpectrum 0x0200 -#define PWDEnable 0x0400 -#define EnableVBCLKDRVLOW 0x4000 -#define EnablePLLSPLOW 0x8000 - -#define AVIDEOSense 0x01 /* CR32 */ -#define SVIDEOSense 0x02 -#define SCARTSense 0x04 -#define LCDSense 0x08 -#define Monitor2Sense 0x10 -#define Monitor1Sense 0x20 -#define HiTVSense 0x40 - -#define YPbPrSense 0x80 /* NEW SCRATCH */ - -#define TVSense 0xc7 - -#define YPbPrMode 0xe0 -#define YPbPrMode525i 0x00 -#define YPbPrMode525p 0x20 -#define YPbPrMode750p 0x40 -#define YPbPrMode1080i 0x60 - -#define ScalingLCD 0x08 - -#define SetYPbPr 0x04 - -/* ---------------------- VUMA Information */ -#define DisplayDeviceFromCMOS 0x10 - -/* ---------------------- HK Evnet Definition */ -#define XGI_ModeSwitchStatus 0xf0 -#define ActiveCRT1 0x10 -#define ActiveLCD 0x0020 -#define ActiveTV 0x40 -#define ActiveCRT2 0x80 - -#define ActiveAVideo 0x01 -#define ActiveSVideo 0x02 -#define ActiveSCART 0x04 -#define ActiveHiTV 0x08 -#define ActiveYPbPr 0x10 - -#define NTSC1024x768HT 1908 - -#define YPbPrTV525iHT 1716 /* YPbPr */ -#define YPbPrTV525iVT 525 -#define YPbPrTV525pHT 1716 -#define YPbPrTV525pVT 525 -#define YPbPrTV750pHT 1650 -#define YPbPrTV750pVT 750 - -#define VCLK25_175 0x00 -#define VCLK28_322 0x01 -#define VCLK31_5 0x02 -#define VCLK36 0x03 -#define VCLK43_163 0x05 -#define VCLK44_9 0x06 -#define VCLK49_5 0x07 -#define VCLK50 0x08 -#define VCLK52_406 0x09 -#define VCLK56_25 0x0A -#define VCLK68_179 0x0D -#define VCLK72_852 0x0E -#define VCLK75 0x0F -#define VCLK78_75 0x11 -#define VCLK79_411 0x12 -#define VCLK83_95 0x13 -#define VCLK86_6 0x15 -#define VCLK94_5 0x16 -#define VCLK113_309 0x1B -#define VCLK116_406 0x1C -#define VCLK135_5 0x1E -#define VCLK139_054 0x1F -#define VCLK157_5 0x20 -#define VCLK162 0x21 -#define VCLK175 0x22 -#define VCLK189 0x23 -#define VCLK202_5 0x25 -#define VCLK229_5 0x26 -#define VCLK234 0x27 -#define VCLK254_817 0x29 -#define VCLK266_952 0x2B -#define VCLK269_655 0x2C -#define VCLK277_015 0x2E -#define VCLK291_132 0x30 -#define VCLK291_766 0x31 -#define VCLK315_195 0x33 -#define VCLK323_586 0x34 -#define VCLK330_615 0x35 -#define VCLK340_477 0x37 -#define VCLK375_847 0x38 -#define VCLK388_631 0x39 -#define VCLK125_999 0x51 -#define VCLK148_5 0x52 -#define VCLK217_325 0x55 -#define XGI_YPbPr750pVCLK 0x57 - -#define VCLK39_77 0x40 -#define YPbPr525pVCLK 0x3A -#define NTSC1024VCLK 0x41 -#define VCLK35_2 0x49 /* ; 800x480 */ -#define VCLK122_61 0x4A -#define VCLK80_350 0x4B -#define VCLK107_385 0x4C - -#define RES320x200 0x00 -#define RES320x240 0x01 -#define RES400x300 0x02 -#define RES512x384 0x03 -#define RES640x400 0x04 -#define RES640x480x60 0x05 -#define RES640x480x72 0x06 -#define RES640x480x75 0x07 -#define RES640x480x85 0x08 -#define RES640x480x100 0x09 -#define RES640x480x120 0x0A -#define RES640x480x160 0x0B -#define RES640x480x200 0x0C -#define RES800x600x56 0x0D -#define RES800x600x60 0x0E -#define RES800x600x72 0x0F -#define RES800x600x75 0x10 -#define RES800x600x85 0x11 -#define RES800x600x100 0x12 -#define RES800x600x120 0x13 -#define RES800x600x160 0x14 -#define RES1024x768x43 0x15 -#define RES1024x768x60 0x16 -#define RES1024x768x70 0x17 -#define RES1024x768x75 0x18 -#define RES1024x768x85 0x19 -#define RES1024x768x100 0x1A -#define RES1024x768x120 0x1B -#define RES1280x1024x43 0x1C -#define RES1280x1024x60 0x1D -#define RES1280x1024x75 0x1E -#define RES1280x1024x85 0x1F -#define RES1600x1200x60 0x20 -#define RES1600x1200x65 0x21 -#define RES1600x1200x70 0x22 -#define RES1600x1200x75 0x23 -#define RES1600x1200x85 0x24 -#define RES1600x1200x100 0x25 -#define RES1600x1200x120 0x26 -#define RES1920x1440x60 0x27 -#define RES1920x1440x65 0x28 -#define RES1920x1440x70 0x29 -#define RES1920x1440x75 0x2A -#define RES1920x1440x85 0x2B -#define RES1920x1440x100 0x2C -#define RES2048x1536x60 0x2D -#define RES2048x1536x65 0x2E -#define RES2048x1536x70 0x2F -#define RES2048x1536x75 0x30 -#define RES2048x1536x85 0x31 -#define RES800x480x60 0x32 -#define RES800x480x75 0x33 -#define RES800x480x85 0x34 -#define RES1024x576x60 0x35 -#define RES1024x576x75 0x36 -#define RES1024x576x85 0x37 -#define RES1280x720x60 0x38 -#define RES1280x720x75 0x39 -#define RES1280x720x85 0x3A -#define RES1280x960x60 0x3B -#define RES720x480x60 0x3C -#define RES720x576x56 0x3D -#define RES856x480x79I 0x3E -#define RES856x480x60 0x3F -#define RES1280x768x60 0x40 -#define RES1400x1050x60 0x41 -#define RES1152x864x60 0x42 -#define RES1152x864x75 0x43 -#define RES1024x768x160 0x44 -#define RES1280x960x75 0x45 -#define RES1280x960x85 0x46 -#define RES1280x960x120 0x47 - -#define XG27_CR8F 0x0C -#define XG27_SR36 0x30 -#define XG27_SR40 0x04 -#define XG27_SR41 0x00 -#define XG40_CRCF 0x13 -#define XGI330_CRT2Data_1_2 0 -#define XGI330_CRT2Data_4_D 0 -#define XGI330_CRT2Data_4_E 0 -#define XGI330_CRT2Data_4_10 0x80 -#define XGI330_SR07 0x18 -#define XGI330_SR1F 0 -#define XGI330_SR23 0xf6 -#define XGI330_SR24 0x0d -#define XGI330_SR31 0xc0 -#define XGI330_SR32 0x11 -#define XGI330_SR33 0 - -extern const struct XGI_ExtStruct XGI330_EModeIDTable[]; -extern const struct XGI_Ext2Struct XGI330_RefIndex[]; -extern const struct XGI_CRT1TableStruct XGI_CRT1Table[]; -extern const struct XGI_ECLKDataStruct XGI340_ECLKData[]; -extern const struct SiS_VCLKData XGI_VCLKData[]; -extern const unsigned char XGI340_CR6B[][4]; -extern const unsigned char XGI340_AGPReg[]; - -#endif diff --git a/drivers/staging/xgifb/vb_init.c b/drivers/staging/xgifb/vb_init.c deleted file mode 100644 index ac1c815a3c5e..000000000000 --- a/drivers/staging/xgifb/vb_init.c +++ /dev/null @@ -1,1367 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include <linux/delay.h> -#include <linux/vmalloc.h> - -#include "XGIfb.h" -#include "vb_def.h" -#include "vb_util.h" -#include "vb_setmode.h" -#include "vb_init.h" -static const unsigned short XGINew_DDRDRAM_TYPE340[4][2] = { - { 16, 0x45}, - { 8, 0x35}, - { 4, 0x31}, - { 2, 0x21} }; - -static const unsigned short XGINew_DDRDRAM_TYPE20[12][2] = { - { 128, 0x5D}, - { 64, 0x59}, - { 64, 0x4D}, - { 32, 0x55}, - { 32, 0x49}, - { 32, 0x3D}, - { 16, 0x51}, - { 16, 0x45}, - { 16, 0x39}, - { 8, 0x41}, - { 8, 0x35}, - { 4, 0x31} }; - -#define XGIFB_ROM_SIZE 65536 - -static unsigned char -XGINew_GetXG20DRAMType(struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned char data, temp; - - if (HwDeviceExtension->jChipType < XG20) { - data = xgifb_reg_get(pVBInfo->P3c4, 0x39) & 0x02; - if (data == 0) - data = (xgifb_reg_get(pVBInfo->P3c4, 0x3A) & - 0x02) >> 1; - return data; - } else if (HwDeviceExtension->jChipType == XG27) { - temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B); - /* SR3B[7][3]MAA15 MAA11 (Power on Trapping) */ - if (((temp & 0x88) == 0x80) || ((temp & 0x88) == 0x08)) - data = 0; /* DDR */ - else - data = 1; /* DDRII */ - return data; - } else if (HwDeviceExtension->jChipType == XG21) { - /* Independent GPIO control */ - xgifb_reg_and(pVBInfo->P3d4, 0xB4, ~0x02); - usleep_range(800, 1800); - xgifb_reg_or(pVBInfo->P3d4, 0x4A, 0x80); /* Enable GPIOH read */ - /* GPIOF 0:DVI 1:DVO */ - data = xgifb_reg_get(pVBInfo->P3d4, 0x48); - /* - * HOTPLUG_SUPPORT - * for current XG20 & XG21, GPIOH is floating, driver will - * fix DDR temporarily - */ - /* DVI read GPIOH */ - data &= 0x01; /* 1=DDRII, 0=DDR */ - /* ~HOTPLUG_SUPPORT */ - xgifb_reg_or(pVBInfo->P3d4, 0xB4, 0x02); - return data; - } - data = xgifb_reg_get(pVBInfo->P3d4, 0x97) & 0x01; - - if (data == 1) - data++; - - return data; -} - -static void XGINew_DDR1x_MRS_340(unsigned long P3c4, - struct vb_device_info *pVBInfo) -{ - xgifb_reg_set(P3c4, 0x18, 0x01); - xgifb_reg_set(P3c4, 0x19, 0x20); - xgifb_reg_set(P3c4, 0x16, 0x00); - xgifb_reg_set(P3c4, 0x16, 0x80); - - usleep_range(3, 1003); - xgifb_reg_set(P3c4, 0x18, 0x00); - xgifb_reg_set(P3c4, 0x19, 0x20); - xgifb_reg_set(P3c4, 0x16, 0x00); - xgifb_reg_set(P3c4, 0x16, 0x80); - - usleep_range(60, 1060); - xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */ - xgifb_reg_set(P3c4, 0x19, 0x01); - xgifb_reg_set(P3c4, 0x16, 0x03); - xgifb_reg_set(P3c4, 0x16, 0x83); - usleep_range(1, 1001); - xgifb_reg_set(P3c4, 0x1B, 0x03); - usleep_range(500, 1500); - xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */ - xgifb_reg_set(P3c4, 0x19, 0x00); - xgifb_reg_set(P3c4, 0x16, 0x03); - xgifb_reg_set(P3c4, 0x16, 0x83); - xgifb_reg_set(P3c4, 0x1B, 0x00); -} - -static void XGINew_SetMemoryClock(struct vb_device_info *pVBInfo) -{ - xgifb_reg_set(pVBInfo->P3c4, - 0x28, - pVBInfo->MCLKData[pVBInfo->ram_type].SR28); - xgifb_reg_set(pVBInfo->P3c4, - 0x29, - pVBInfo->MCLKData[pVBInfo->ram_type].SR29); - xgifb_reg_set(pVBInfo->P3c4, - 0x2A, - pVBInfo->MCLKData[pVBInfo->ram_type].SR2A); - - xgifb_reg_set(pVBInfo->P3c4, - 0x2E, - XGI340_ECLKData[pVBInfo->ram_type].SR2E); - xgifb_reg_set(pVBInfo->P3c4, - 0x2F, - XGI340_ECLKData[pVBInfo->ram_type].SR2F); - xgifb_reg_set(pVBInfo->P3c4, - 0x30, - XGI340_ECLKData[pVBInfo->ram_type].SR30); -} - -static void XGINew_DDRII_Bootup_XG27( - struct xgi_hw_device_info *HwDeviceExtension, - unsigned long P3c4, struct vb_device_info *pVBInfo) -{ - unsigned long P3d4 = P3c4 + 0x10; - - pVBInfo->ram_type = XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo); - XGINew_SetMemoryClock(pVBInfo); - - /* Set Double Frequency */ - xgifb_reg_set(P3d4, 0x97, pVBInfo->XGINew_CR97); /* CR97 */ - - usleep_range(200, 1200); - - xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS2 */ - xgifb_reg_set(P3c4, 0x19, 0x80); /* Set SR19 */ - xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ - usleep_range(15, 1015); - xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ - usleep_range(15, 1015); - - xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS3 */ - xgifb_reg_set(P3c4, 0x19, 0xC0); /* Set SR19 */ - xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ - usleep_range(15, 1015); - xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ - usleep_range(15, 1015); - - xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS1 */ - xgifb_reg_set(P3c4, 0x19, 0x40); /* Set SR19 */ - xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ - usleep_range(30, 1030); - xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ - usleep_range(15, 1015); - - xgifb_reg_set(P3c4, 0x18, 0x42); /* Set SR18 */ /* MRS, DLL Enable */ - xgifb_reg_set(P3c4, 0x19, 0x0A); /* Set SR19 */ - xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */ - usleep_range(30, 1030); - xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */ - xgifb_reg_set(P3c4, 0x16, 0x80); /* Set SR16 */ - - xgifb_reg_set(P3c4, 0x1B, 0x04); /* Set SR1B */ - usleep_range(60, 1060); - xgifb_reg_set(P3c4, 0x1B, 0x00); /* Set SR1B */ - - xgifb_reg_set(P3c4, 0x18, 0x42); /* Set SR18 */ /* MRS, DLL Reset */ - xgifb_reg_set(P3c4, 0x19, 0x08); /* Set SR19 */ - xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */ - - usleep_range(30, 1030); - xgifb_reg_set(P3c4, 0x16, 0x83); /* Set SR16 */ - usleep_range(15, 1015); - - xgifb_reg_set(P3c4, 0x18, 0x80); /* Set SR18 */ /* MRS, ODT */ - xgifb_reg_set(P3c4, 0x19, 0x46); /* Set SR19 */ - xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ - usleep_range(30, 1030); - xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ - usleep_range(15, 1015); - - xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS */ - xgifb_reg_set(P3c4, 0x19, 0x40); /* Set SR19 */ - xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ - usleep_range(30, 1030); - xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ - usleep_range(15, 1015); - - /* Set SR1B refresh control 000:close; 010:open */ - xgifb_reg_set(P3c4, 0x1B, 0x04); - usleep_range(200, 1200); -} - -static void XGINew_DDR2_MRS_XG20(struct xgi_hw_device_info *HwDeviceExtension, - unsigned long P3c4, - struct vb_device_info *pVBInfo) -{ - unsigned long P3d4 = P3c4 + 0x10; - - pVBInfo->ram_type = XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo); - XGINew_SetMemoryClock(pVBInfo); - - xgifb_reg_set(P3d4, 0x97, 0x11); /* CR97 */ - - usleep_range(200, 1200); - xgifb_reg_set(P3c4, 0x18, 0x00); /* EMRS2 */ - xgifb_reg_set(P3c4, 0x19, 0x80); - xgifb_reg_set(P3c4, 0x16, 0x05); - xgifb_reg_set(P3c4, 0x16, 0x85); - - xgifb_reg_set(P3c4, 0x18, 0x00); /* EMRS3 */ - xgifb_reg_set(P3c4, 0x19, 0xC0); - xgifb_reg_set(P3c4, 0x16, 0x05); - xgifb_reg_set(P3c4, 0x16, 0x85); - - xgifb_reg_set(P3c4, 0x18, 0x00); /* EMRS1 */ - xgifb_reg_set(P3c4, 0x19, 0x40); - xgifb_reg_set(P3c4, 0x16, 0x05); - xgifb_reg_set(P3c4, 0x16, 0x85); - - xgifb_reg_set(P3c4, 0x18, 0x42); /* MRS1 */ - xgifb_reg_set(P3c4, 0x19, 0x02); - xgifb_reg_set(P3c4, 0x16, 0x05); - xgifb_reg_set(P3c4, 0x16, 0x85); - - usleep_range(15, 1015); - xgifb_reg_set(P3c4, 0x1B, 0x04); /* SR1B */ - usleep_range(30, 1030); - xgifb_reg_set(P3c4, 0x1B, 0x00); /* SR1B */ - usleep_range(100, 1100); - - xgifb_reg_set(P3c4, 0x18, 0x42); /* MRS1 */ - xgifb_reg_set(P3c4, 0x19, 0x00); - xgifb_reg_set(P3c4, 0x16, 0x05); - xgifb_reg_set(P3c4, 0x16, 0x85); - - usleep_range(200, 1200); -} - -static void XGINew_DDR1x_MRS_XG20(unsigned long P3c4, - struct vb_device_info *pVBInfo) -{ - xgifb_reg_set(P3c4, 0x18, 0x01); - xgifb_reg_set(P3c4, 0x19, 0x40); - xgifb_reg_set(P3c4, 0x16, 0x00); - xgifb_reg_set(P3c4, 0x16, 0x80); - usleep_range(60, 1060); - - xgifb_reg_set(P3c4, 0x18, 0x00); - xgifb_reg_set(P3c4, 0x19, 0x40); - xgifb_reg_set(P3c4, 0x16, 0x00); - xgifb_reg_set(P3c4, 0x16, 0x80); - usleep_range(60, 1060); - xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */ - xgifb_reg_set(P3c4, 0x19, 0x01); - xgifb_reg_set(P3c4, 0x16, 0x03); - xgifb_reg_set(P3c4, 0x16, 0x83); - usleep_range(1, 1001); - xgifb_reg_set(P3c4, 0x1B, 0x03); - usleep_range(500, 1500); - xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */ - xgifb_reg_set(P3c4, 0x19, 0x00); - xgifb_reg_set(P3c4, 0x16, 0x03); - xgifb_reg_set(P3c4, 0x16, 0x83); - xgifb_reg_set(P3c4, 0x1B, 0x00); -} - -static void XGINew_DDR1x_DefaultRegister( - struct xgi_hw_device_info *HwDeviceExtension, - unsigned long Port, struct vb_device_info *pVBInfo) -{ - unsigned long P3d4 = Port, P3c4 = Port - 0x10; - - if (HwDeviceExtension->jChipType >= XG20) { - XGINew_SetMemoryClock(pVBInfo); - xgifb_reg_set(P3d4, - 0x82, - pVBInfo->CR40[11][pVBInfo->ram_type]); /* CR82 */ - xgifb_reg_set(P3d4, - 0x85, - pVBInfo->CR40[12][pVBInfo->ram_type]); /* CR85 */ - xgifb_reg_set(P3d4, - 0x86, - pVBInfo->CR40[13][pVBInfo->ram_type]); /* CR86 */ - - xgifb_reg_set(P3d4, 0x98, 0x01); - xgifb_reg_set(P3d4, 0x9A, 0x02); - - XGINew_DDR1x_MRS_XG20(P3c4, pVBInfo); - } else { - XGINew_SetMemoryClock(pVBInfo); - - switch (HwDeviceExtension->jChipType) { - case XG42: - /* CR82 */ - xgifb_reg_set(P3d4, - 0x82, - pVBInfo->CR40[11][pVBInfo->ram_type]); - /* CR85 */ - xgifb_reg_set(P3d4, - 0x85, - pVBInfo->CR40[12][pVBInfo->ram_type]); - /* CR86 */ - xgifb_reg_set(P3d4, - 0x86, - pVBInfo->CR40[13][pVBInfo->ram_type]); - break; - default: - xgifb_reg_set(P3d4, 0x82, 0x88); - xgifb_reg_set(P3d4, 0x86, 0x00); - /* Insert read command for delay */ - xgifb_reg_get(P3d4, 0x86); - xgifb_reg_set(P3d4, 0x86, 0x88); - xgifb_reg_get(P3d4, 0x86); - xgifb_reg_set(P3d4, - 0x86, - pVBInfo->CR40[13][pVBInfo->ram_type]); - xgifb_reg_set(P3d4, 0x82, 0x77); - xgifb_reg_set(P3d4, 0x85, 0x00); - - /* Insert read command for delay */ - xgifb_reg_get(P3d4, 0x85); - xgifb_reg_set(P3d4, 0x85, 0x88); - - /* Insert read command for delay */ - xgifb_reg_get(P3d4, 0x85); - /* CR85 */ - xgifb_reg_set(P3d4, - 0x85, - pVBInfo->CR40[12][pVBInfo->ram_type]); - /* CR82 */ - xgifb_reg_set(P3d4, - 0x82, - pVBInfo->CR40[11][pVBInfo->ram_type]); - break; - } - - xgifb_reg_set(P3d4, 0x97, 0x00); - xgifb_reg_set(P3d4, 0x98, 0x01); - xgifb_reg_set(P3d4, 0x9A, 0x02); - XGINew_DDR1x_MRS_340(P3c4, pVBInfo); - } -} - -static void XGINew_DDR2_DefaultRegister( - struct xgi_hw_device_info *HwDeviceExtension, - unsigned long Port, struct vb_device_info *pVBInfo) -{ - unsigned long P3d4 = Port, P3c4 = Port - 0x10; - /* - * keep following setting sequence, each setting in - * the same reg insert idle - */ - xgifb_reg_set(P3d4, 0x82, 0x77); - xgifb_reg_set(P3d4, 0x86, 0x00); - xgifb_reg_get(P3d4, 0x86); /* Insert read command for delay */ - xgifb_reg_set(P3d4, 0x86, 0x88); - xgifb_reg_get(P3d4, 0x86); /* Insert read command for delay */ - /* CR86 */ - xgifb_reg_set(P3d4, 0x86, pVBInfo->CR40[13][pVBInfo->ram_type]); - xgifb_reg_set(P3d4, 0x82, 0x77); - xgifb_reg_set(P3d4, 0x85, 0x00); - xgifb_reg_get(P3d4, 0x85); /* Insert read command for delay */ - xgifb_reg_set(P3d4, 0x85, 0x88); - xgifb_reg_get(P3d4, 0x85); /* Insert read command for delay */ - xgifb_reg_set(P3d4, - 0x85, - pVBInfo->CR40[12][pVBInfo->ram_type]); /* CR85 */ - if (HwDeviceExtension->jChipType == XG27) - /* CR82 */ - xgifb_reg_set(P3d4, 0x82, pVBInfo->CR40[11][pVBInfo->ram_type]); - else - xgifb_reg_set(P3d4, 0x82, 0xA8); /* CR82 */ - - xgifb_reg_set(P3d4, 0x98, 0x01); - xgifb_reg_set(P3d4, 0x9A, 0x02); - if (HwDeviceExtension->jChipType == XG27) - XGINew_DDRII_Bootup_XG27(HwDeviceExtension, P3c4, pVBInfo); - else - XGINew_DDR2_MRS_XG20(HwDeviceExtension, P3c4, pVBInfo); -} - -static void XGI_SetDRAM_Helper(unsigned long P3d4, u8 seed, u8 temp2, u8 reg, - u8 shift_factor, u8 mask1, u8 mask2) -{ - u8 j; - - for (j = 0; j < 4; j++) { - temp2 |= (((seed >> (2 * j)) & 0x03) << shift_factor); - xgifb_reg_set(P3d4, reg, temp2); - xgifb_reg_get(P3d4, reg); - temp2 &= mask1; - temp2 += mask2; - } -} - -static void XGINew_SetDRAMDefaultRegister340( - struct xgi_hw_device_info *HwDeviceExtension, - unsigned long Port, struct vb_device_info *pVBInfo) -{ - unsigned char temp, temp1, temp2, temp3, j, k; - - unsigned long P3d4 = Port, P3c4 = Port - 0x10; - - xgifb_reg_set(P3d4, 0x6D, pVBInfo->CR40[8][pVBInfo->ram_type]); - xgifb_reg_set(P3d4, 0x68, pVBInfo->CR40[5][pVBInfo->ram_type]); - xgifb_reg_set(P3d4, 0x69, pVBInfo->CR40[6][pVBInfo->ram_type]); - xgifb_reg_set(P3d4, 0x6A, pVBInfo->CR40[7][pVBInfo->ram_type]); - - /* CR6B DQS fine tune delay */ - temp = 0xaa; - XGI_SetDRAM_Helper(P3d4, temp, 0, 0x6B, 2, 0xF0, 0x10); - - /* CR6E DQM fine tune delay */ - XGI_SetDRAM_Helper(P3d4, 0, 0, 0x6E, 2, 0xF0, 0x10); - - temp3 = 0; - for (k = 0; k < 4; k++) { - /* CR6E_D[1:0] select channel */ - xgifb_reg_and_or(P3d4, 0x6E, 0xFC, temp3); - XGI_SetDRAM_Helper(P3d4, 0, 0, 0x6F, 0, 0xF8, 0x08); - temp3 += 0x01; - } - - xgifb_reg_set(P3d4, - 0x80, - pVBInfo->CR40[9][pVBInfo->ram_type]); /* CR80 */ - xgifb_reg_set(P3d4, - 0x81, - pVBInfo->CR40[10][pVBInfo->ram_type]); /* CR81 */ - - temp2 = 0x80; - /* CR89 terminator type select */ - XGI_SetDRAM_Helper(P3d4, 0, temp2, 0x89, 0, 0xF0, 0x10); - - temp = 0; - temp1 = temp & 0x03; - temp2 |= temp1; - xgifb_reg_set(P3d4, 0x89, temp2); - - temp = pVBInfo->CR40[3][pVBInfo->ram_type]; - temp1 = temp & 0x0F; - temp2 = (temp >> 4) & 0x07; - temp3 = temp & 0x80; - xgifb_reg_set(P3d4, 0x45, temp1); /* CR45 */ - xgifb_reg_set(P3d4, 0x99, temp2); /* CR99 */ - xgifb_reg_or(P3d4, 0x40, temp3); /* CR40_D[7] */ - xgifb_reg_set(P3d4, - 0x41, - pVBInfo->CR40[0][pVBInfo->ram_type]); /* CR41 */ - - if (HwDeviceExtension->jChipType == XG27) - xgifb_reg_set(P3d4, 0x8F, XG27_CR8F); /* CR8F */ - - for (j = 0; j <= 6; j++) /* CR90 - CR96 */ - xgifb_reg_set(P3d4, (0x90 + j), - pVBInfo->CR40[14 + j][pVBInfo->ram_type]); - - for (j = 0; j <= 2; j++) /* CRC3 - CRC5 */ - xgifb_reg_set(P3d4, (0xC3 + j), - pVBInfo->CR40[21 + j][pVBInfo->ram_type]); - - for (j = 0; j < 2; j++) /* CR8A - CR8B */ - xgifb_reg_set(P3d4, (0x8A + j), - pVBInfo->CR40[1 + j][pVBInfo->ram_type]); - - if (HwDeviceExtension->jChipType == XG42) - xgifb_reg_set(P3d4, 0x8C, 0x87); - - xgifb_reg_set(P3d4, - 0x59, - pVBInfo->CR40[4][pVBInfo->ram_type]); /* CR59 */ - - xgifb_reg_set(P3d4, 0x83, 0x09); /* CR83 */ - xgifb_reg_set(P3d4, 0x87, 0x00); /* CR87 */ - xgifb_reg_set(P3d4, 0xCF, XG40_CRCF); /* CRCF */ - if (pVBInfo->ram_type) { - xgifb_reg_set(P3c4, 0x17, 0x80); /* SR17 DDRII */ - if (HwDeviceExtension->jChipType == XG27) - xgifb_reg_set(P3c4, 0x17, 0x02); /* SR17 DDRII */ - - } else { - xgifb_reg_set(P3c4, 0x17, 0x00); /* SR17 DDR */ - } - xgifb_reg_set(P3c4, 0x1A, 0x87); /* SR1A */ - - temp = XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo); - if (temp == 0) { - XGINew_DDR1x_DefaultRegister(HwDeviceExtension, P3d4, pVBInfo); - } else { - xgifb_reg_set(P3d4, 0xB0, 0x80); /* DDRII Dual frequency mode */ - XGINew_DDR2_DefaultRegister(HwDeviceExtension, P3d4, pVBInfo); - } - xgifb_reg_set(P3c4, 0x1B, 0x03); /* SR1B */ -} - -static unsigned short XGINew_SetDRAMSize20Reg( - unsigned short dram_size, - struct vb_device_info *pVBInfo) -{ - unsigned short data = 0, memsize = 0; - int RankSize; - unsigned char ChannelNo; - - RankSize = dram_size * pVBInfo->ram_bus / 8; - data = xgifb_reg_get(pVBInfo->P3c4, 0x13); - data &= 0x80; - - if (data == 0x80) - RankSize *= 2; - - data = 0; - - if (pVBInfo->ram_channel == 3) - ChannelNo = 4; - else - ChannelNo = pVBInfo->ram_channel; - - if (ChannelNo * RankSize <= 256) { - while ((RankSize >>= 1) > 0) - data += 0x10; - - memsize = data >> 4; - - /* Fix DRAM Sizing Error */ - xgifb_reg_set(pVBInfo->P3c4, - 0x14, - (xgifb_reg_get(pVBInfo->P3c4, 0x14) & 0x0F) | - (data & 0xF0)); - usleep_range(15, 1015); - } - return memsize; -} - -static int XGINew_ReadWriteRest(unsigned short StopAddr, - unsigned short StartAddr, - struct vb_device_info *pVBInfo) -{ - int i; - unsigned long Position = 0; - void __iomem *fbaddr = pVBInfo->FBAddr; - - writel(Position, fbaddr + Position); - - for (i = StartAddr; i <= StopAddr; i++) { - Position = 1 << i; - writel(Position, fbaddr + Position); - } - - /* Fix #1759 Memory Size error in Multi-Adapter. */ - usleep_range(500, 1500); - - Position = 0; - - if (readl(fbaddr + Position) != Position) - return 0; - - for (i = StartAddr; i <= StopAddr; i++) { - Position = 1 << i; - if (readl(fbaddr + Position) != Position) - return 0; - } - return 1; -} - -static unsigned char XGINew_CheckFrequence(struct vb_device_info *pVBInfo) -{ - unsigned char data; - - data = xgifb_reg_get(pVBInfo->P3d4, 0x97); - - if ((data & 0x10) == 0) { - data = xgifb_reg_get(pVBInfo->P3c4, 0x39); - return (data & 0x02) >> 1; - } - return data & 0x01; -} - -static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned char data; - - switch (HwDeviceExtension->jChipType) { - case XG20: - case XG21: - data = xgifb_reg_get(pVBInfo->P3d4, 0x97); - data = data & 0x01; - pVBInfo->ram_channel = 1; /* XG20 "JUST" one channel */ - - if (data == 0) { /* Single_32_16 */ - - if ((HwDeviceExtension->ulVideoMemorySize - 1) - > 0x1000000) { - pVBInfo->ram_bus = 32; /* 32 bits */ - /* 22bit + 2 rank + 32bit */ - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x52); - usleep_range(15, 1015); - - if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) - return; - - if ((HwDeviceExtension->ulVideoMemorySize - 1) > - 0x800000) { - /* 22bit + 1 rank + 32bit */ - xgifb_reg_set(pVBInfo->P3c4, - 0x13, - 0x31); - xgifb_reg_set(pVBInfo->P3c4, - 0x14, - 0x42); - usleep_range(15, 1015); - - if (XGINew_ReadWriteRest(23, - 23, - pVBInfo) == 1) - return; - } - } - - if ((HwDeviceExtension->ulVideoMemorySize - 1) > - 0x800000) { - pVBInfo->ram_bus = 16; /* 16 bits */ - /* 22bit + 2 rank + 16bit */ - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x41); - usleep_range(15, 1015); - - if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1) - return; - xgifb_reg_set(pVBInfo->P3c4, - 0x13, - 0x31); - usleep_range(15, 1015); - } - - } else { /* Dual_16_8 */ - if ((HwDeviceExtension->ulVideoMemorySize - 1) > - 0x800000) { - pVBInfo->ram_bus = 16; /* 16 bits */ - /* (0x31:12x8x2) 22bit + 2 rank */ - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1); - /* 0x41:16Mx16 bit */ - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x41); - usleep_range(15, 1015); - - if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1) - return; - - if ((HwDeviceExtension->ulVideoMemorySize - 1) > - 0x400000) { - /* (0x31:12x8x2) 22bit + 1 rank */ - xgifb_reg_set(pVBInfo->P3c4, - 0x13, - 0x31); - /* 0x31:8Mx16 bit */ - xgifb_reg_set(pVBInfo->P3c4, - 0x14, - 0x31); - usleep_range(15, 1015); - - if (XGINew_ReadWriteRest(22, - 22, - pVBInfo) == 1) - return; - } - } - - if ((HwDeviceExtension->ulVideoMemorySize - 1) > - 0x400000) { - pVBInfo->ram_bus = 8; /* 8 bits */ - /* (0x31:12x8x2) 22bit + 2 rank */ - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1); - /* 0x30:8Mx8 bit */ - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x30); - usleep_range(15, 1015); - - if (XGINew_ReadWriteRest(22, 21, pVBInfo) == 1) - return; - - /* (0x31:12x8x2) 22bit + 1 rank */ - xgifb_reg_set(pVBInfo->P3c4, - 0x13, - 0x31); - usleep_range(15, 1015); - } - } - break; - - case XG27: - pVBInfo->ram_bus = 16; /* 16 bits */ - pVBInfo->ram_channel = 1; /* Single channel */ - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x51); /* 32Mx16 bit */ - break; - case XG42: - /* - * XG42 SR14 D[3] Reserve - * D[2] = 1, Dual Channel - * = 0, Single Channel - * - * It's Different from Other XG40 Series. - */ - if (XGINew_CheckFrequence(pVBInfo) == 1) { /* DDRII, DDR2x */ - pVBInfo->ram_bus = 32; /* 32 bits */ - pVBInfo->ram_channel = 2; /* 2 Channel */ - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x44); - - if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) - return; - - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x34); - if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1) - return; - - pVBInfo->ram_channel = 1; /* Single Channel */ - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x40); - - if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1) - return; - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x30); - } else { /* DDR */ - pVBInfo->ram_bus = 64; /* 64 bits */ - pVBInfo->ram_channel = 1; /* 1 channels */ - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x52); - - if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) - return; - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x42); - } - - break; - - default: /* XG40 */ - - if (XGINew_CheckFrequence(pVBInfo) == 1) { /* DDRII */ - pVBInfo->ram_bus = 32; /* 32 bits */ - pVBInfo->ram_channel = 3; - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x4C); - - if (XGINew_ReadWriteRest(25, 23, pVBInfo) == 1) - return; - - pVBInfo->ram_channel = 2; /* 2 channels */ - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x48); - - if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) - return; - - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x3C); - - if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) { - pVBInfo->ram_channel = 3; /* 4 channels */ - } else { - pVBInfo->ram_channel = 2; /* 2 channels */ - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x38); - } - } else { /* DDR */ - pVBInfo->ram_bus = 64; /* 64 bits */ - pVBInfo->ram_channel = 2; /* 2 channels */ - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x5A); - - if (XGINew_ReadWriteRest(25, 24, pVBInfo) == 1) - return; - xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); - xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x4A); - } - break; - } -} - -static int XGINew_DDRSizing340(struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - u8 i, size; - unsigned short memsize, start_addr; - const unsigned short (*dram_table)[2]; - - xgifb_reg_set(pVBInfo->P3c4, 0x15, 0x00); /* noninterleaving */ - xgifb_reg_set(pVBInfo->P3c4, 0x1C, 0x00); /* nontiling */ - XGINew_CheckChannel(HwDeviceExtension, pVBInfo); - - if (HwDeviceExtension->jChipType >= XG20) { - dram_table = XGINew_DDRDRAM_TYPE20; - size = ARRAY_SIZE(XGINew_DDRDRAM_TYPE20); - start_addr = 5; - } else { - dram_table = XGINew_DDRDRAM_TYPE340; - size = ARRAY_SIZE(XGINew_DDRDRAM_TYPE340); - start_addr = 9; - } - - for (i = 0; i < size; i++) { - /* SetDRAMSizingType */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x13, 0x80, dram_table[i][1]); - usleep_range(50, 1050); /* should delay 50 ns */ - - memsize = XGINew_SetDRAMSize20Reg(dram_table[i][0], pVBInfo); - - if (memsize == 0) - continue; - - memsize += (pVBInfo->ram_channel - 2) + 20; - if ((HwDeviceExtension->ulVideoMemorySize - 1) < - (unsigned long)(1 << memsize)) - continue; - - if (XGINew_ReadWriteRest(memsize, start_addr, pVBInfo) == 1) - return 1; - } - return 0; -} - -static void XGINew_SetDRAMSize_340(struct xgifb_video_info *xgifb_info, - struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned short data; - - pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress; - - XGISetModeNew(xgifb_info, HwDeviceExtension, 0x2e); - - data = xgifb_reg_get(pVBInfo->P3c4, 0x21); - /* disable read cache */ - xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short)(data & 0xDF)); - XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo); - - XGINew_DDRSizing340(HwDeviceExtension, pVBInfo); - data = xgifb_reg_get(pVBInfo->P3c4, 0x21); - /* enable read cache */ - xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short)(data | 0x20)); -} - -static u8 *xgifb_copy_rom(struct pci_dev *dev, size_t *rom_size) -{ - void __iomem *rom_address; - u8 *rom_copy; - - rom_address = pci_map_rom(dev, rom_size); - if (!rom_address) - return NULL; - - rom_copy = vzalloc(XGIFB_ROM_SIZE); - if (!rom_copy) - goto done; - - *rom_size = min_t(size_t, *rom_size, XGIFB_ROM_SIZE); - memcpy_fromio(rom_copy, rom_address, *rom_size); - -done: - pci_unmap_rom(dev, rom_address); - return rom_copy; -} - -static bool xgifb_read_vbios(struct pci_dev *pdev) -{ - struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev); - u8 *vbios; - unsigned long i; - unsigned char j; - struct XGI21_LVDSCapStruct *lvds; - size_t vbios_size; - int entry; - - vbios = xgifb_copy_rom(pdev, &vbios_size); - if (!vbios) { - dev_err(&pdev->dev, "Video BIOS not available\n"); - return false; - } - if (vbios_size <= 0x65) - goto error; - /* - * The user can ignore the LVDS bit in the BIOS and force the display - * type. - */ - if (!(vbios[0x65] & 0x1) && - (!xgifb_info->display2_force || - xgifb_info->display2 != XGIFB_DISP_LCD)) { - vfree(vbios); - return false; - } - if (vbios_size <= 0x317) - goto error; - i = vbios[0x316] | (vbios[0x317] << 8); - if (vbios_size <= i - 1) - goto error; - j = vbios[i - 1]; - if (j == 0) - goto error; - if (j == 0xff) - j = 1; - - /* Read the LVDS table index scratch register set by the BIOS. */ - - entry = xgifb_reg_get(xgifb_info->dev_info.P3d4, 0x36); - if (entry >= j) - entry = 0; - i += entry * 25; - lvds = &xgifb_info->lvds_data; - if (vbios_size <= i + 24) - goto error; - lvds->LVDS_Capability = vbios[i] | (vbios[i + 1] << 8); - lvds->LVDSHT = vbios[i + 2] | (vbios[i + 3] << 8); - lvds->LVDSVT = vbios[i + 4] | (vbios[i + 5] << 8); - lvds->LVDSHDE = vbios[i + 6] | (vbios[i + 7] << 8); - lvds->LVDSVDE = vbios[i + 8] | (vbios[i + 9] << 8); - lvds->LVDSHFP = vbios[i + 10] | (vbios[i + 11] << 8); - lvds->LVDSVFP = vbios[i + 12] | (vbios[i + 13] << 8); - lvds->LVDSHSYNC = vbios[i + 14] | (vbios[i + 15] << 8); - lvds->LVDSVSYNC = vbios[i + 16] | (vbios[i + 17] << 8); - lvds->VCLKData1 = vbios[i + 18]; - lvds->VCLKData2 = vbios[i + 19]; - lvds->PSC_S1 = vbios[i + 20]; - lvds->PSC_S2 = vbios[i + 21]; - lvds->PSC_S3 = vbios[i + 22]; - lvds->PSC_S4 = vbios[i + 23]; - lvds->PSC_S5 = vbios[i + 24]; - vfree(vbios); - return true; -error: - dev_err(&pdev->dev, "Video BIOS corrupted\n"); - vfree(vbios); - return false; -} - -static void XGINew_ChkSenseStatus(struct vb_device_info *pVBInfo) -{ - unsigned short tempbx = 0, temp, tempcx, CR3CData; - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x32); - - if (temp & Monitor1Sense) - tempbx |= ActiveCRT1; - if (temp & LCDSense) - tempbx |= ActiveLCD; - if (temp & Monitor2Sense) - tempbx |= ActiveCRT2; - if (temp & TVSense) { - tempbx |= ActiveTV; - if (temp & AVIDEOSense) - tempbx |= (ActiveAVideo << 8); - if (temp & SVIDEOSense) - tempbx |= (ActiveSVideo << 8); - if (temp & SCARTSense) - tempbx |= (ActiveSCART << 8); - if (temp & HiTVSense) - tempbx |= (ActiveHiTV << 8); - if (temp & YPbPrSense) - tempbx |= (ActiveYPbPr << 8); - } - - tempcx = xgifb_reg_get(pVBInfo->P3d4, 0x3d); - tempcx |= (xgifb_reg_get(pVBInfo->P3d4, 0x3e) << 8); - - if (tempbx & tempcx) { - CR3CData = xgifb_reg_get(pVBInfo->P3d4, 0x3c); - if (!(CR3CData & DisplayDeviceFromCMOS)) - tempcx = 0x1FF0; - } else { - tempcx = 0x1FF0; - } - - tempbx &= tempcx; - xgifb_reg_set(pVBInfo->P3d4, 0x3d, (tempbx & 0x00FF)); - xgifb_reg_set(pVBInfo->P3d4, 0x3e, ((tempbx & 0xFF00) >> 8)); -} - -static void XGINew_SetModeScratch(struct vb_device_info *pVBInfo) -{ - unsigned short temp, tempcl = 0, tempch = 0, CR31Data, CR38Data; - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x3d); - temp |= xgifb_reg_get(pVBInfo->P3d4, 0x3e) << 8; - temp |= (xgifb_reg_get(pVBInfo->P3d4, 0x31) & (DriverMode >> 8)) << 8; - - if (pVBInfo->IF_DEF_CRT2Monitor == 1) { - if (temp & ActiveCRT2) - tempcl = SetCRT2ToRAMDAC; - } - - if (temp & ActiveLCD) { - tempcl |= SetCRT2ToLCD; - if (temp & DriverMode) { - if (temp & ActiveTV) { - tempch = SetToLCDA | EnableDualEdge; - temp ^= SetCRT2ToLCD; - - if ((temp >> 8) & ActiveAVideo) - tempcl |= SetCRT2ToAVIDEO; - if ((temp >> 8) & ActiveSVideo) - tempcl |= SetCRT2ToSVIDEO; - if ((temp >> 8) & ActiveSCART) - tempcl |= SetCRT2ToSCART; - - if (pVBInfo->IF_DEF_HiVision == 1) { - if ((temp >> 8) & ActiveHiTV) - tempcl |= SetCRT2ToHiVision; - } - - if (pVBInfo->IF_DEF_YPbPr == 1) { - if ((temp >> 8) & ActiveYPbPr) - tempch |= SetYPbPr; - } - } - } - } else { - if ((temp >> 8) & ActiveAVideo) - tempcl |= SetCRT2ToAVIDEO; - if ((temp >> 8) & ActiveSVideo) - tempcl |= SetCRT2ToSVIDEO; - if ((temp >> 8) & ActiveSCART) - tempcl |= SetCRT2ToSCART; - - if (pVBInfo->IF_DEF_HiVision == 1) { - if ((temp >> 8) & ActiveHiTV) - tempcl |= SetCRT2ToHiVision; - } - - if (pVBInfo->IF_DEF_YPbPr == 1) { - if ((temp >> 8) & ActiveYPbPr) - tempch |= SetYPbPr; - } - } - - tempcl |= SetSimuScanMode; - if ((!(temp & ActiveCRT1)) && ((temp & ActiveLCD) || - (temp & ActiveTV) || - (temp & ActiveCRT2))) - tempcl ^= (SetSimuScanMode | SwitchCRT2); - if ((temp & ActiveLCD) && (temp & ActiveTV)) - tempcl ^= (SetSimuScanMode | SwitchCRT2); - xgifb_reg_set(pVBInfo->P3d4, 0x30, tempcl); - - CR31Data = xgifb_reg_get(pVBInfo->P3d4, 0x31); - CR31Data &= ~(SetNotSimuMode >> 8); - if (!(temp & ActiveCRT1)) - CR31Data |= (SetNotSimuMode >> 8); - CR31Data &= ~(DisableCRT2Display >> 8); - if (!((temp & ActiveLCD) || (temp & ActiveTV) || (temp & ActiveCRT2))) - CR31Data |= (DisableCRT2Display >> 8); - xgifb_reg_set(pVBInfo->P3d4, 0x31, CR31Data); - - CR38Data = xgifb_reg_get(pVBInfo->P3d4, 0x38); - CR38Data &= ~SetYPbPr; - CR38Data |= tempch; - xgifb_reg_set(pVBInfo->P3d4, 0x38, CR38Data); -} - -static unsigned short XGINew_SenseLCD(struct xgi_hw_device_info - *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned short temp = HwDeviceExtension->ulCRT2LCDType; - - switch (HwDeviceExtension->ulCRT2LCDType) { - case LCD_640x480: - case LCD_1024x600: - case LCD_1152x864: - case LCD_1280x960: - case LCD_1152x768: - case LCD_1920x1440: - case LCD_2048x1536: - temp = 0; /* overwrite used ulCRT2LCDType */ - break; - case LCD_UNKNOWN: /* unknown lcd, do nothing */ - return 0; - } - xgifb_reg_and_or(pVBInfo->P3d4, 0x36, 0xF0, temp); - return 1; -} - -static void XGINew_GetXG21Sense(struct pci_dev *pdev, - struct vb_device_info *pVBInfo) -{ - struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev); - unsigned char Temp; - - if (xgifb_read_vbios(pdev)) { /* For XG21 LVDS */ - xgifb_reg_or(pVBInfo->P3d4, 0x32, LCDSense); - /* LVDS on chip */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, 0xC0); - } else { - /* Enable GPIOA/B read */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x4A, ~0x03, 0x03); - Temp = xgifb_reg_get(pVBInfo->P3d4, 0x48) & 0xC0; - if (Temp == 0xC0) { /* DVI & DVO GPIOA/B pull high */ - XGINew_SenseLCD(&xgifb_info->hw_info, pVBInfo); - xgifb_reg_or(pVBInfo->P3d4, 0x32, LCDSense); - /* Enable read GPIOF */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x4A, ~0x20, 0x20); - if (xgifb_reg_get(pVBInfo->P3d4, 0x48) & 0x04) - Temp = 0xA0; /* Only DVO on chip */ - else - Temp = 0x80; /* TMDS on chip */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, Temp); - /* Disable read GPIOF */ - xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~0x20); - } - } -} - -static void XGINew_GetXG27Sense(struct vb_device_info *pVBInfo) -{ - unsigned char Temp, bCR4A; - - bCR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A); - /* Enable GPIOA/B/C read */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x4A, ~0x07, 0x07); - Temp = xgifb_reg_get(pVBInfo->P3d4, 0x48) & 0x07; - xgifb_reg_set(pVBInfo->P3d4, 0x4A, bCR4A); - - if (Temp <= 0x02) { - /* LVDS setting */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, 0xC0); - xgifb_reg_set(pVBInfo->P3d4, 0x30, 0x21); - } else { - /* TMDS/DVO setting */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, 0xA0); - } - xgifb_reg_or(pVBInfo->P3d4, 0x32, LCDSense); -} - -static unsigned char GetXG21FPBits(struct vb_device_info *pVBInfo) -{ - unsigned char CR38, CR4A, temp; - - CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A); - /* enable GPIOE read */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x4A, ~0x10, 0x10); - CR38 = xgifb_reg_get(pVBInfo->P3d4, 0x38); - temp = 0; - if ((CR38 & 0xE0) > 0x80) { - temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); - temp &= 0x08; - temp >>= 3; - } - - xgifb_reg_set(pVBInfo->P3d4, 0x4A, CR4A); - - return temp; -} - -static unsigned char GetXG27FPBits(struct vb_device_info *pVBInfo) -{ - unsigned char CR4A, temp; - - CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A); - /* enable GPIOA/B/C read */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x4A, ~0x03, 0x03); - temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); - if (temp > 2) - temp = ((temp & 0x04) >> 1) | ((~temp) & 0x01); - - xgifb_reg_set(pVBInfo->P3d4, 0x4A, CR4A); - - return temp; -} - -static bool xgifb_bridge_is_on(struct vb_device_info *vb_info) -{ - u8 flag; - - flag = xgifb_reg_get(vb_info->Part4Port, 0x00); - return flag == 1 || flag == 2; -} - -unsigned char XGIInitNew(struct pci_dev *pdev) -{ - struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev); - struct xgi_hw_device_info *HwDeviceExtension = &xgifb_info->hw_info; - struct vb_device_info VBINF; - struct vb_device_info *pVBInfo = &VBINF; - unsigned char i, temp = 0, temp1; - - pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress; - - if (!pVBInfo->FBAddr) { - dev_dbg(&pdev->dev, "pVBInfo->FBAddr == 0\n"); - return 0; - } - - XGIRegInit(pVBInfo, xgifb_info->vga_base); - - outb(0x67, pVBInfo->P3c2); - - InitTo330Pointer(HwDeviceExtension->jChipType, pVBInfo); - - /* Openkey */ - xgifb_reg_set(pVBInfo->P3c4, 0x05, 0x86); - - /* GetXG21Sense (GPIO) */ - if (HwDeviceExtension->jChipType == XG21) - XGINew_GetXG21Sense(pdev, pVBInfo); - - if (HwDeviceExtension->jChipType == XG27) - XGINew_GetXG27Sense(pVBInfo); - - /* Reset Extended register */ - - for (i = 0x06; i < 0x20; i++) - xgifb_reg_set(pVBInfo->P3c4, i, 0); - - for (i = 0x21; i <= 0x27; i++) - xgifb_reg_set(pVBInfo->P3c4, i, 0); - - for (i = 0x31; i <= 0x3B; i++) - xgifb_reg_set(pVBInfo->P3c4, i, 0); - - /* Auto over driver for XG42 */ - if (HwDeviceExtension->jChipType == XG42) - xgifb_reg_set(pVBInfo->P3c4, 0x3B, 0xC0); - - for (i = 0x79; i <= 0x7C; i++) - xgifb_reg_set(pVBInfo->P3d4, i, 0); - - if (HwDeviceExtension->jChipType >= XG20) - xgifb_reg_set(pVBInfo->P3d4, 0x97, pVBInfo->XGINew_CR97); - - /* SetDefExt1Regs begin */ - xgifb_reg_set(pVBInfo->P3c4, 0x07, XGI330_SR07); - if (HwDeviceExtension->jChipType == XG27) { - xgifb_reg_set(pVBInfo->P3c4, 0x40, XG27_SR40); - xgifb_reg_set(pVBInfo->P3c4, 0x41, XG27_SR41); - } - xgifb_reg_set(pVBInfo->P3c4, 0x11, 0x0F); - xgifb_reg_set(pVBInfo->P3c4, 0x1F, XGI330_SR1F); - /* Frame buffer can read/write SR20 */ - xgifb_reg_set(pVBInfo->P3c4, 0x20, 0xA0); - /* H/W request for slow corner chip */ - xgifb_reg_set(pVBInfo->P3c4, 0x36, 0x70); - if (HwDeviceExtension->jChipType == XG27) - xgifb_reg_set(pVBInfo->P3c4, 0x36, XG27_SR36); - - if (HwDeviceExtension->jChipType < XG20) { - u32 Temp; - - /* Set AGP customize registers (in SetDefAGPRegs) Start */ - for (i = 0x47; i <= 0x4C; i++) - xgifb_reg_set(pVBInfo->P3d4, - i, - XGI340_AGPReg[i - 0x47]); - - for (i = 0x70; i <= 0x71; i++) - xgifb_reg_set(pVBInfo->P3d4, - i, - XGI340_AGPReg[6 + i - 0x70]); - - for (i = 0x74; i <= 0x77; i++) - xgifb_reg_set(pVBInfo->P3d4, - i, - XGI340_AGPReg[8 + i - 0x74]); - - pci_read_config_dword(pdev, 0x50, &Temp); - Temp >>= 20; - Temp &= 0xF; - - if (Temp == 1) - xgifb_reg_set(pVBInfo->P3d4, 0x48, 0x20); /* CR48 */ - } /* != XG20 */ - - /* Set PCI */ - xgifb_reg_set(pVBInfo->P3c4, 0x23, XGI330_SR23); - xgifb_reg_set(pVBInfo->P3c4, 0x24, XGI330_SR24); - xgifb_reg_set(pVBInfo->P3c4, 0x25, 0); - - if (HwDeviceExtension->jChipType < XG20) { - /* Set VB */ - XGI_UnLockCRT2(pVBInfo); - /* disable VideoCapture */ - xgifb_reg_and_or(pVBInfo->Part0Port, 0x3F, 0xEF, 0x00); - xgifb_reg_set(pVBInfo->Part1Port, 0x00, 0x00); - /* chk if BCLK>=100MHz */ - temp1 = xgifb_reg_get(pVBInfo->P3d4, 0x7B); - - xgifb_reg_set(pVBInfo->Part1Port, - 0x02, XGI330_CRT2Data_1_2); - - xgifb_reg_set(pVBInfo->Part1Port, 0x2E, 0x08); /* use VB */ - } /* != XG20 */ - - xgifb_reg_set(pVBInfo->P3c4, 0x27, 0x1F); - - if ((HwDeviceExtension->jChipType == XG42) && - XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo) != 0) { - /* Not DDR */ - xgifb_reg_set(pVBInfo->P3c4, - 0x31, - (XGI330_SR31 & 0x3F) | 0x40); - xgifb_reg_set(pVBInfo->P3c4, - 0x32, - (XGI330_SR32 & 0xFC) | 0x01); - } else { - xgifb_reg_set(pVBInfo->P3c4, 0x31, XGI330_SR31); - xgifb_reg_set(pVBInfo->P3c4, 0x32, XGI330_SR32); - } - xgifb_reg_set(pVBInfo->P3c4, 0x33, XGI330_SR33); - - if (HwDeviceExtension->jChipType < XG20) { - if (xgifb_bridge_is_on(pVBInfo)) { - xgifb_reg_set(pVBInfo->Part2Port, 0x00, 0x1C); - xgifb_reg_set(pVBInfo->Part4Port, - 0x0D, XGI330_CRT2Data_4_D); - xgifb_reg_set(pVBInfo->Part4Port, - 0x0E, XGI330_CRT2Data_4_E); - xgifb_reg_set(pVBInfo->Part4Port, - 0x10, XGI330_CRT2Data_4_10); - xgifb_reg_set(pVBInfo->Part4Port, 0x0F, 0x3F); - XGI_LockCRT2(pVBInfo); - } - } /* != XG20 */ - - XGI_SenseCRT1(pVBInfo); - - if (HwDeviceExtension->jChipType == XG21) { - xgifb_reg_and_or(pVBInfo->P3d4, - 0x32, - ~Monitor1Sense, - Monitor1Sense); /* Z9 default has CRT */ - temp = GetXG21FPBits(pVBInfo); - xgifb_reg_and_or(pVBInfo->P3d4, 0x37, ~0x01, temp); - } - if (HwDeviceExtension->jChipType == XG27) { - xgifb_reg_and_or(pVBInfo->P3d4, - 0x32, - ~Monitor1Sense, - Monitor1Sense); /* Z9 default has CRT */ - temp = GetXG27FPBits(pVBInfo); - xgifb_reg_and_or(pVBInfo->P3d4, 0x37, ~0x03, temp); - } - - pVBInfo->ram_type = XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo); - - XGINew_SetDRAMDefaultRegister340(HwDeviceExtension, - pVBInfo->P3d4, - pVBInfo); - - XGINew_SetDRAMSize_340(xgifb_info, HwDeviceExtension, pVBInfo); - - xgifb_reg_set(pVBInfo->P3c4, 0x22, 0xfa); - xgifb_reg_set(pVBInfo->P3c4, 0x21, 0xa3); - - XGINew_ChkSenseStatus(pVBInfo); - XGINew_SetModeScratch(pVBInfo); - - xgifb_reg_set(pVBInfo->P3d4, 0x8c, 0x87); - - return 1; -} /* end of init */ diff --git a/drivers/staging/xgifb/vb_init.h b/drivers/staging/xgifb/vb_init.h deleted file mode 100644 index 2f8a70133ebd..000000000000 --- a/drivers/staging/xgifb/vb_init.h +++ /dev/null @@ -1,6 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _VBINIT_ -#define _VBINIT_ -unsigned char XGIInitNew(struct pci_dev *pdev); -void XGIRegInit(struct vb_device_info *XGI_Pr, unsigned long BaseAddr); -#endif diff --git a/drivers/staging/xgifb/vb_setmode.c b/drivers/staging/xgifb/vb_setmode.c deleted file mode 100644 index 1fa0dc66406e..000000000000 --- a/drivers/staging/xgifb/vb_setmode.c +++ /dev/null @@ -1,5527 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include <linux/delay.h> -#include "XGIfb.h" - -#include "vb_def.h" -#include "vb_init.h" -#include "vb_util.h" -#include "vb_table.h" -#include "vb_setmode.h" - -#define IndexMask 0xff -#define TVCLKBASE_315_25 (TVCLKBASE_315 + 25) - -static const unsigned short XGINew_VGA_DAC[] = { - 0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15, - 0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F, - 0x00, 0x05, 0x08, 0x0B, 0x0E, 0x11, 0x14, 0x18, - 0x1C, 0x20, 0x24, 0x28, 0x2D, 0x32, 0x38, 0x3F, - 0x00, 0x10, 0x1F, 0x2F, 0x3F, 0x1F, 0x27, 0x2F, - 0x37, 0x3F, 0x2D, 0x31, 0x36, 0x3A, 0x3F, 0x00, - 0x07, 0x0E, 0x15, 0x1C, 0x0E, 0x11, 0x15, 0x18, - 0x1C, 0x14, 0x16, 0x18, 0x1A, 0x1C, 0x00, 0x04, - 0x08, 0x0C, 0x10, 0x08, 0x0A, 0x0C, 0x0E, 0x10, - 0x0B, 0x0C, 0x0D, 0x0F, 0x10}; - -void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo) -{ - pVBInfo->MCLKData = XGI340New_MCLKData; - - pVBInfo->LCDResInfo = 0; - pVBInfo->LCDTypeInfo = 0; - pVBInfo->LCDInfo = 0; - pVBInfo->VBInfo = 0; - pVBInfo->TVInfo = 0; - - pVBInfo->SR18 = XGI340_SR18; - pVBInfo->CR40 = XGI340_cr41; - - if (ChipType < XG20) - XGI_GetVBType(pVBInfo); - - /* 310 customization related */ - if ((pVBInfo->VBType & VB_SIS301LV) || (pVBInfo->VBType & VB_SIS302LV)) - pVBInfo->LCDCapList = XGI_LCDDLCapList; - else - pVBInfo->LCDCapList = XGI_LCDCapList; - - if (ChipType >= XG20) - pVBInfo->XGINew_CR97 = 0x10; - - if (ChipType == XG27) { - unsigned char temp; - - pVBInfo->MCLKData = XGI27New_MCLKData; - pVBInfo->CR40 = XGI27_cr41; - pVBInfo->XGINew_CR97 = 0xc1; - pVBInfo->SR18 = XG27_SR18; - - /* Z11m DDR */ - temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B); - /* SR3B[7][3]MAA15 MAA11 (Power on Trapping) */ - if (((temp & 0x88) == 0x80) || ((temp & 0x88) == 0x08)) - pVBInfo->XGINew_CR97 = 0x80; - } -} - -static void XGI_SetSeqRegs(struct vb_device_info *pVBInfo) -{ - unsigned char SRdata, i; - - xgifb_reg_set(pVBInfo->P3c4, 0x00, 0x03); /* Set SR0 */ - - for (i = 0; i < 4; i++) { - /* Get SR1,2,3,4 from file */ - /* SR1 is with screen off 0x20 */ - SRdata = XGI330_StandTable.SR[i]; - /* Set SR 1 2 3 4 */ - xgifb_reg_set(pVBInfo->P3c4, i + 1, SRdata); - } -} - -static void XGI_SetCRTCRegs(struct vb_device_info *pVBInfo) -{ - unsigned char CRTCdata; - unsigned short i; - - CRTCdata = xgifb_reg_get(pVBInfo->P3d4, 0x11); - CRTCdata &= 0x7f; - xgifb_reg_set(pVBInfo->P3d4, 0x11, CRTCdata); /* Unlock CRTC */ - - for (i = 0; i <= 0x18; i++) { - /* Get CRTC from file */ - CRTCdata = XGI330_StandTable.CRTC[i]; - xgifb_reg_set(pVBInfo->P3d4, i, CRTCdata); /* Set CRTC(3d4) */ - } -} - -static void XGI_SetATTRegs(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned char ARdata; - unsigned short i, modeflag; - - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - for (i = 0; i <= 0x13; i++) { - ARdata = XGI330_StandTable.ATTR[i]; - - if ((modeflag & Charx8Dot) && i == 0x13) { /* ifndef Dot9 */ - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { - ARdata = 0; - } else if ((pVBInfo->VBInfo & - (SetCRT2ToTV | SetCRT2ToLCD)) && - (pVBInfo->VBInfo & SetInSlaveMode)) { - ARdata = 0; - } - } - - inb(pVBInfo->P3da); /* reset 3da */ - outb(i, pVBInfo->P3c0); /* set index */ - outb(ARdata, pVBInfo->P3c0); /* set data */ - } - - inb(pVBInfo->P3da); /* reset 3da */ - outb(0x14, pVBInfo->P3c0); /* set index */ - outb(0x00, pVBInfo->P3c0); /* set data */ - inb(pVBInfo->P3da); /* Enable Attribute */ - outb(0x20, pVBInfo->P3c0); -} - -static void XGI_SetGRCRegs(struct vb_device_info *pVBInfo) -{ - unsigned char GRdata; - unsigned short i; - - for (i = 0; i <= 0x08; i++) { - /* Get GR from file */ - GRdata = XGI330_StandTable.GRC[i]; - xgifb_reg_set(pVBInfo->P3ce, i, GRdata); /* Set GR(3ce) */ - } - - if (pVBInfo->ModeType > ModeVGA) { - GRdata = xgifb_reg_get(pVBInfo->P3ce, 0x05); - GRdata &= 0xBF; /* 256 color disable */ - xgifb_reg_set(pVBInfo->P3ce, 0x05, GRdata); - } -} - -static void XGI_ClearExt1Regs(struct vb_device_info *pVBInfo) -{ - unsigned short i; - - for (i = 0x0A; i <= 0x0E; i++) - xgifb_reg_set(pVBInfo->P3c4, i, 0x00); /* Clear SR0A-SR0E */ -} - -static unsigned char XGI_SetDefaultVCLK(struct vb_device_info *pVBInfo) -{ - xgifb_reg_and_or(pVBInfo->P3c4, 0x31, ~0x30, 0x20); - xgifb_reg_set(pVBInfo->P3c4, 0x2B, XGI_VCLKData[0].SR2B); - xgifb_reg_set(pVBInfo->P3c4, 0x2C, XGI_VCLKData[0].SR2C); - - xgifb_reg_and_or(pVBInfo->P3c4, 0x31, ~0x30, 0x10); - xgifb_reg_set(pVBInfo->P3c4, 0x2B, XGI_VCLKData[1].SR2B); - xgifb_reg_set(pVBInfo->P3c4, 0x2C, XGI_VCLKData[1].SR2C); - - xgifb_reg_and(pVBInfo->P3c4, 0x31, ~0x30); - return 0; -} - -static unsigned char XGI_AjustCRT2Rate(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - unsigned short *i, - struct vb_device_info *pVBInfo) -{ - unsigned short tempax, tempbx, resinfo, modeflag, infoflag; - - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - tempbx = XGI330_RefIndex[RefreshRateTableIndex + (*i)].ModeID; - tempax = 0; - - if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) { - tempax |= SupportRAMDAC2; - - if (pVBInfo->VBType & VB_XGI301C) - tempax |= SupportCRT2in301C; - } - - /* 301b */ - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - tempax |= SupportLCD; - - if (pVBInfo->LCDResInfo != Panel_1280x1024 && - pVBInfo->LCDResInfo != Panel_1280x960 && - (pVBInfo->LCDInfo & LCDNonExpanding) && - resinfo >= 9) - return 0; - } - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { /* for HiTV */ - tempax |= SupportHiVision; - if ((pVBInfo->VBInfo & SetInSlaveMode) && - ((resinfo == 4) || - (resinfo == 3 && (pVBInfo->SetFlag & TVSimuMode)) || - (resinfo > 7))) - return 0; - } else if (pVBInfo->VBInfo & (SetCRT2ToAVIDEO | SetCRT2ToSVIDEO | - SetCRT2ToSCART | SetCRT2ToYPbPr525750 | - SetCRT2ToHiVision)) { - tempax |= SupportTV; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV | - VB_SIS302LV | VB_XGI301C)) - tempax |= SupportTV1024; - - if (!(pVBInfo->VBInfo & TVSetPAL) && - (modeflag & NoSupportSimuTV) && - (pVBInfo->VBInfo & SetInSlaveMode) && - !(pVBInfo->VBInfo & SetNotSimuMode)) - return 0; - } - - for (; XGI330_RefIndex[RefreshRateTableIndex + (*i)].ModeID == - tempbx; (*i)--) { - infoflag = XGI330_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag; - if (infoflag & tempax) - return 1; - - if ((*i) == 0) - break; - } - - for ((*i) = 0;; (*i)++) { - infoflag = XGI330_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag; - if (XGI330_RefIndex[RefreshRateTableIndex + (*i)].ModeID - != tempbx) { - return 0; - } - - if (infoflag & tempax) - return 1; - } - return 1; -} - -static void XGI_SetSync(unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short sync, temp; - - /* di+0x00 */ - sync = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8; - sync &= 0xC0; - temp = 0x2F; - temp |= sync; - outb(temp, pVBInfo->P3c2); /* Set Misc(3c2) */ -} - -static void XGI_SetCRT1Timing_H(struct vb_device_info *pVBInfo, - struct xgi_hw_device_info *HwDeviceExtension) -{ - unsigned char data, data1, pushax; - unsigned short i, j; - - /* unlock cr0-7 */ - data = xgifb_reg_get(pVBInfo->P3d4, 0x11); - data &= 0x7F; - xgifb_reg_set(pVBInfo->P3d4, 0x11, data); - - data = pVBInfo->TimingH.data[0]; - xgifb_reg_set(pVBInfo->P3d4, 0, data); - - for (i = 0x01; i <= 0x04; i++) { - data = pVBInfo->TimingH.data[i]; - xgifb_reg_set(pVBInfo->P3d4, (unsigned short)(i + 1), data); - } - - for (i = 0x05; i <= 0x06; i++) { - data = pVBInfo->TimingH.data[i]; - xgifb_reg_set(pVBInfo->P3c4, (unsigned short)(i + 6), data); - } - - j = xgifb_reg_get(pVBInfo->P3c4, 0x0e); - j &= 0x1F; - data = pVBInfo->TimingH.data[7]; - data &= 0xE0; - data |= j; - xgifb_reg_set(pVBInfo->P3c4, 0x0e, data); - - if (HwDeviceExtension->jChipType >= XG20) { - data = xgifb_reg_get(pVBInfo->P3d4, 0x04); - data = data - 1; - xgifb_reg_set(pVBInfo->P3d4, 0x04, data); - data = xgifb_reg_get(pVBInfo->P3d4, 0x05); - data1 = data; - data1 &= 0xE0; - data &= 0x1F; - if (data == 0) { - pushax = data; - data = xgifb_reg_get(pVBInfo->P3c4, 0x0c); - data &= 0xFB; - xgifb_reg_set(pVBInfo->P3c4, 0x0c, data); - data = pushax; - } - data = data - 1; - data |= data1; - xgifb_reg_set(pVBInfo->P3d4, 0x05, data); - data = xgifb_reg_get(pVBInfo->P3c4, 0x0e); - data >>= 5; - data = data + 3; - if (data > 7) - data = data - 7; - data <<= 5; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0e, ~0xE0, data); - } -} - -static void XGI_SetCRT1Timing_V(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned char data; - unsigned short i, j; - - for (i = 0x00; i <= 0x01; i++) { - data = pVBInfo->TimingV.data[i]; - xgifb_reg_set(pVBInfo->P3d4, (unsigned short)(i + 6), data); - } - - for (i = 0x02; i <= 0x03; i++) { - data = pVBInfo->TimingV.data[i]; - xgifb_reg_set(pVBInfo->P3d4, (unsigned short)(i + 0x0e), data); - } - - for (i = 0x04; i <= 0x05; i++) { - data = pVBInfo->TimingV.data[i]; - xgifb_reg_set(pVBInfo->P3d4, (unsigned short)(i + 0x11), data); - } - - j = xgifb_reg_get(pVBInfo->P3c4, 0x0a); - j &= 0xC0; - data = pVBInfo->TimingV.data[6]; - data &= 0x3F; - data |= j; - xgifb_reg_set(pVBInfo->P3c4, 0x0a, data); - - data = pVBInfo->TimingV.data[6]; - data &= 0x80; - data >>= 2; - - i = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - i &= DoubleScanMode; - if (i) - data |= 0x80; - - j = xgifb_reg_get(pVBInfo->P3d4, 0x09); - j &= 0x5F; - data |= j; - xgifb_reg_set(pVBInfo->P3d4, 0x09, data); -} - -static void XGI_SetCRT1CRTC(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo, - struct xgi_hw_device_info *HwDeviceExtension) -{ - unsigned char index, data; - unsigned short i; - - /* Get index */ - index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; - index = index & IndexMask; - - data = xgifb_reg_get(pVBInfo->P3d4, 0x11); - data &= 0x7F; - xgifb_reg_set(pVBInfo->P3d4, 0x11, data); /* Unlock CRTC */ - - for (i = 0; i < 8; i++) - pVBInfo->TimingH.data[i] - = XGI_CRT1Table[index].CR[i]; - - for (i = 0; i < 7; i++) - pVBInfo->TimingV.data[i] - = XGI_CRT1Table[index].CR[i + 8]; - - XGI_SetCRT1Timing_H(pVBInfo, HwDeviceExtension); - - XGI_SetCRT1Timing_V(ModeIdIndex, pVBInfo); - - if (pVBInfo->ModeType > 0x03) - xgifb_reg_set(pVBInfo->P3d4, 0x14, 0x4F); -} - -/* - * Function : XGI_SetXG21CRTC - * Input : Stand or enhance CRTC table - * Output : Fill CRT Hsync/Vsync to SR2E/SR2F/SR30/SR33/SR34/SR3F - * Description : Set LCD timing - */ -static void XGI_SetXG21CRTC(unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned char index, Tempax, Tempbx, Tempcx, Tempdx; - unsigned short Temp1, Temp2, Temp3; - - index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; - /* Tempax: CR4 HRS */ - Tempax = XGI_CRT1Table[index].CR[3]; - Tempcx = Tempax; /* Tempcx: HRS */ - /* SR2E[7:0]->HRS */ - xgifb_reg_set(pVBInfo->P3c4, 0x2E, Tempax); - - Tempdx = XGI_CRT1Table[index].CR[5]; /* SRB */ - Tempdx &= 0xC0; /* Tempdx[7:6]: SRB[7:6] */ - Temp1 = Tempdx; /* Temp1[7:6]: HRS[9:8] */ - Temp1 <<= 2; /* Temp1[9:8]: HRS[9:8] */ - Temp1 |= Tempax; /* Temp1[9:0]: HRS[9:0] */ - - Tempax = XGI_CRT1Table[index].CR[4]; /* CR5 HRE */ - Tempax &= 0x1F; /* Tempax[4:0]: HRE[4:0] */ - - Tempbx = XGI_CRT1Table[index].CR[6]; /* SRC */ - Tempbx &= 0x04; /* Tempbx[2]: HRE[5] */ - Tempbx <<= 3; /* Tempbx[5]: HRE[5] */ - Tempax |= Tempbx; /* Tempax[5:0]: HRE[5:0] */ - - Temp2 = Temp1 & 0x3C0; /* Temp2[9:6]: HRS[9:6] */ - Temp2 |= Tempax; /* Temp2[9:0]: HRE[9:0] */ - - Tempcx &= 0x3F; /* Tempcx[5:0]: HRS[5:0] */ - if (Tempax < Tempcx) /* HRE < HRS */ - Temp2 |= 0x40; /* Temp2 + 0x40 */ - - Temp2 &= 0xFF; - Tempax = (unsigned char)Temp2; /* Tempax: HRE[7:0] */ - Tempax <<= 2; /* Tempax[7:2]: HRE[5:0] */ - Tempdx >>= 6; /* Tempdx[7:6]->[1:0] HRS[9:8] */ - Tempax |= Tempdx; /* HRE[5:0]HRS[9:8] */ - /* SR2F D[7:2]->HRE, D[1:0]->HRS */ - xgifb_reg_set(pVBInfo->P3c4, 0x2F, Tempax); - xgifb_reg_and_or(pVBInfo->P3c4, 0x30, 0xE3, 00); - - /* CR10 VRS */ - Tempax = XGI_CRT1Table[index].CR[10]; - Tempbx = Tempax; /* Tempbx: VRS */ - Tempax &= 0x01; /* Tempax[0]: VRS[0] */ - xgifb_reg_or(pVBInfo->P3c4, 0x33, Tempax); /* SR33[0]->VRS[0] */ - /* CR7[2][7] VRE */ - Tempax = XGI_CRT1Table[index].CR[9]; - Tempcx = Tempbx >> 1; /* Tempcx[6:0]: VRS[7:1] */ - Tempdx = Tempax & 0x04; /* Tempdx[2]: CR7[2] */ - Tempdx <<= 5; /* Tempdx[7]: VRS[8] */ - Tempcx |= Tempdx; /* Tempcx[7:0]: VRS[8:1] */ - xgifb_reg_set(pVBInfo->P3c4, 0x34, Tempcx); /* SR34[8:1]->VRS */ - - Temp1 = Tempdx; /* Temp1[7]: Tempdx[7] */ - Temp1 <<= 1; /* Temp1[8]: VRS[8] */ - Temp1 |= Tempbx; /* Temp1[8:0]: VRS[8:0] */ - Tempax &= 0x80; - Temp2 = Tempax << 2; /* Temp2[9]: VRS[9] */ - Temp1 |= Temp2; /* Temp1[9:0]: VRS[9:0] */ - /* Tempax: SRA */ - Tempax = XGI_CRT1Table[index].CR[14]; - Tempax &= 0x08; /* Tempax[3]: VRS[3] */ - Temp2 = Tempax; - Temp2 <<= 7; /* Temp2[10]: VRS[10] */ - Temp1 |= Temp2; /* Temp1[10:0]: VRS[10:0] */ - - /* Tempax: CR11 VRE */ - Tempax = XGI_CRT1Table[index].CR[11]; - Tempax &= 0x0F; /* Tempax[3:0]: VRE[3:0] */ - /* Tempbx: SRA */ - Tempbx = XGI_CRT1Table[index].CR[14]; - Tempbx &= 0x20; /* Tempbx[5]: VRE[5] */ - Tempbx >>= 1; /* Tempbx[4]: VRE[4] */ - Tempax |= Tempbx; /* Tempax[4:0]: VRE[4:0] */ - Temp2 = Temp1 & 0x7E0; /* Temp2[10:5]: VRS[10:5] */ - Temp2 |= Tempax; /* Temp2[10:5]: VRE[10:5] */ - - Temp3 = Temp1 & 0x1F; /* Temp3[4:0]: VRS[4:0] */ - if (Tempax < Temp3) /* VRE < VRS */ - Temp2 |= 0x20; /* VRE + 0x20 */ - - Temp2 &= 0xFF; - Tempax = (unsigned char)Temp2; /* Tempax: VRE[7:0] */ - Tempax <<= 2; /* Tempax[7:0]; VRE[5:0]00 */ - Temp1 &= 0x600; /* Temp1[10:9]: VRS[10:9] */ - Temp1 >>= 9; /* Temp1[1:0]: VRS[10:9] */ - Tempbx = (unsigned char)Temp1; - Tempax |= Tempbx; /* Tempax[7:0]: VRE[5:0]VRS[10:9] */ - Tempax &= 0x7F; - /* SR3F D[7:2]->VRE D[1:0]->VRS */ - xgifb_reg_set(pVBInfo->P3c4, 0x3F, Tempax); -} - -static void XGI_SetXG27CRTC(unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short index, Tempax, Tempbx, Tempcx; - - index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; - /* Tempax: CR4 HRS */ - Tempax = XGI_CRT1Table[index].CR[3]; - Tempbx = Tempax; /* Tempbx: HRS[7:0] */ - /* SR2E[7:0]->HRS */ - xgifb_reg_set(pVBInfo->P3c4, 0x2E, Tempax); - - /* SR0B */ - Tempax = XGI_CRT1Table[index].CR[5]; - Tempax &= 0xC0; /* Tempax[7:6]: SR0B[7:6]: HRS[9:8] */ - Tempbx |= Tempax << 2; /* Tempbx: HRS[9:0] */ - - Tempax = XGI_CRT1Table[index].CR[4]; /* CR5 HRE */ - Tempax &= 0x1F; /* Tempax[4:0]: HRE[4:0] */ - Tempcx = Tempax; /* Tempcx: HRE[4:0] */ - - Tempax = XGI_CRT1Table[index].CR[6]; /* SRC */ - Tempax &= 0x04; /* Tempax[2]: HRE[5] */ - Tempax <<= 3; /* Tempax[5]: HRE[5] */ - Tempcx |= Tempax; /* Tempcx[5:0]: HRE[5:0] */ - - Tempbx = Tempbx & 0x3C0; /* Tempbx[9:6]: HRS[9:6] */ - Tempbx |= Tempcx; /* Tempbx: HRS[9:6]HRE[5:0] */ - - /* Tempax: CR4 HRS */ - Tempax = XGI_CRT1Table[index].CR[3]; - Tempax &= 0x3F; /* Tempax: HRS[5:0] */ - if (Tempcx <= Tempax) /* HRE[5:0] < HRS[5:0] */ - Tempbx += 0x40; /* Tempbx= Tempbx + 0x40 : HRE[9:0]*/ - - Tempax = XGI_CRT1Table[index].CR[5]; /* SR0B */ - Tempax &= 0xC0; /* Tempax[7:6]: SR0B[7:6]: HRS[9:8]*/ - Tempax >>= 6; /* Tempax[1:0]: HRS[9:8]*/ - Tempax |= (Tempbx << 2) & 0xFF; /* Tempax[7:2]: HRE[5:0] */ - /* SR2F [7:2][1:0]: HRE[5:0]HRS[9:8] */ - xgifb_reg_set(pVBInfo->P3c4, 0x2F, Tempax); - xgifb_reg_and_or(pVBInfo->P3c4, 0x30, 0xE3, 00); - - /* CR10 VRS */ - Tempax = XGI_CRT1Table[index].CR[10]; - /* SR34[7:0]->VRS[7:0] */ - xgifb_reg_set(pVBInfo->P3c4, 0x34, Tempax); - - Tempcx = Tempax; /* Tempcx <= VRS[7:0] */ - /* CR7[7][2] VRS[9][8] */ - Tempax = XGI_CRT1Table[index].CR[9]; - Tempbx = Tempax; /* Tempbx <= CR07[7:0] */ - Tempax = Tempax & 0x04; /* Tempax[2]: CR7[2]: VRS[8] */ - Tempax >>= 2; /* Tempax[0]: VRS[8] */ - /* SR35[0]: VRS[8] */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x35, ~0x01, Tempax); - Tempcx |= Tempax << 8; /* Tempcx <= VRS[8:0] */ - Tempcx |= (Tempbx & 0x80) << 2; /* Tempcx <= VRS[9:0] */ - /* Tempax: SR0A */ - Tempax = XGI_CRT1Table[index].CR[14]; - Tempax &= 0x08; /* SR0A[3] VRS[10] */ - Tempcx |= Tempax << 7; /* Tempcx <= VRS[10:0] */ - - /* Tempax: CR11 VRE */ - Tempax = XGI_CRT1Table[index].CR[11]; - Tempax &= 0x0F; /* Tempax[3:0]: VRE[3:0] */ - /* Tempbx: SR0A */ - Tempbx = XGI_CRT1Table[index].CR[14]; - Tempbx &= 0x20; /* Tempbx[5]: SR0A[5]: VRE[4] */ - Tempbx >>= 1; /* Tempbx[4]: VRE[4] */ - Tempax |= Tempbx; /* Tempax[4:0]: VRE[4:0] */ - Tempbx = Tempcx; /* Tempbx: VRS[10:0] */ - Tempbx &= 0x7E0; /* Tempbx[10:5]: VRS[10:5] */ - Tempbx |= Tempax; /* Tempbx: VRS[10:5]VRE[4:0] */ - - if (Tempbx <= Tempcx) /* VRE <= VRS */ - Tempbx |= 0x20; /* VRE + 0x20 */ - - /* Tempax: Tempax[7:0]; VRE[5:0]00 */ - Tempax = (Tempbx << 2) & 0xFF; - /* SR3F[7:2]:VRE[5:0] */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x3F, ~0xFC, Tempax); - Tempax = Tempcx >> 8; - /* SR35[2:0]:VRS[10:8] */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x35, ~0x07, Tempax); -} - -static void XGI_SetXG27FPBits(struct vb_device_info *pVBInfo) -{ - unsigned char temp; - - /* D[1:0] 01: 18bit, 00: dual 12, 10: single 24 */ - temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); - temp = (temp & 3) << 6; - /* SR06[7]0: dual 12/1: single 24 [6] 18bit Dither <= 0 h/w recommend */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0xc0, temp & 0x80); - /* SR09[7] enable FP output, SR09[6] 1: sigle 18bits, 0: 24bits */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x09, ~0xc0, temp | 0x80); -} - -static void xgifb_set_lcd(int chip_id, - struct vb_device_info *pVBInfo, - unsigned short RefreshRateTableIndex) -{ - unsigned short temp; - - xgifb_reg_set(pVBInfo->P3d4, 0x2E, 0x00); - xgifb_reg_set(pVBInfo->P3d4, 0x2F, 0x00); - xgifb_reg_set(pVBInfo->P3d4, 0x46, 0x00); - xgifb_reg_set(pVBInfo->P3d4, 0x47, 0x00); - - if (chip_id == XG27) { - temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); - if ((temp & 0x03) == 0) { /* dual 12 */ - xgifb_reg_set(pVBInfo->P3d4, 0x46, 0x13); - xgifb_reg_set(pVBInfo->P3d4, 0x47, 0x13); - } - } - - if (chip_id == XG27) { - XGI_SetXG27FPBits(pVBInfo); - } else { - temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); - if (temp & 0x01) { - /* 18 bits FP */ - xgifb_reg_or(pVBInfo->P3c4, 0x06, 0x40); - xgifb_reg_or(pVBInfo->P3c4, 0x09, 0x40); - } - } - - xgifb_reg_or(pVBInfo->P3c4, 0x1E, 0x01); /* Negative blank polarity */ - - xgifb_reg_and(pVBInfo->P3c4, 0x30, ~0x20); /* Hsync polarity */ - xgifb_reg_and(pVBInfo->P3c4, 0x35, ~0x80); /* Vsync polarity */ - - temp = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; - if (temp & 0x4000) { - /* Hsync polarity */ - xgifb_reg_or(pVBInfo->P3c4, 0x30, 0x20); - } - if (temp & 0x8000) { - /* Vsync polarity */ - xgifb_reg_or(pVBInfo->P3c4, 0x35, 0x80); - } -} - -/* - * Function : XGI_UpdateXG21CRTC - * Input : - * Output : CRT1 CRTC - * Description : Modify CRT1 Hsync/Vsync to fix LCD mode timing - */ -static void XGI_UpdateXG21CRTC(unsigned short ModeNo, - struct vb_device_info *pVBInfo, - unsigned short RefreshRateTableIndex) -{ - int index = -1; - - xgifb_reg_and(pVBInfo->P3d4, 0x11, 0x7F); /* Unlock CR0~7 */ - if (ModeNo == 0x2E && - (XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC == - RES640x480x60)) - index = 12; - else if (ModeNo == 0x2E && (XGI330_RefIndex[RefreshRateTableIndex]. - Ext_CRT1CRTC == RES640x480x72)) - index = 13; - else if (ModeNo == 0x2F) - index = 14; - else if (ModeNo == 0x50) - index = 15; - else if (ModeNo == 0x59) - index = 16; - - if (index != -1) { - xgifb_reg_set(pVBInfo->P3d4, 0x02, - XGI_UpdateCRT1Table[index].CR02); - xgifb_reg_set(pVBInfo->P3d4, 0x03, - XGI_UpdateCRT1Table[index].CR03); - xgifb_reg_set(pVBInfo->P3d4, 0x15, - XGI_UpdateCRT1Table[index].CR15); - xgifb_reg_set(pVBInfo->P3d4, 0x16, - XGI_UpdateCRT1Table[index].CR16); - } -} - -static void XGI_SetCRT1DE(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short resindex, tempax, tempbx, tempcx, temp, modeflag; - - unsigned char data; - - resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - tempax = XGI330_ModeResInfo[resindex].HTotal; - tempbx = XGI330_ModeResInfo[resindex].VTotal; - - if (modeflag & HalfDCLK) - tempax >>= 1; - - if (modeflag & HalfDCLK) - tempax <<= 1; - - temp = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; - - if (temp & InterlaceMode) - tempbx >>= 1; - - if (modeflag & DoubleScanMode) - tempbx <<= 1; - - tempcx = 8; - - tempax /= tempcx; - tempax -= 1; - tempbx -= 1; - tempcx = tempax; - temp = xgifb_reg_get(pVBInfo->P3d4, 0x11); - data = xgifb_reg_get(pVBInfo->P3d4, 0x11); - data &= 0x7F; - xgifb_reg_set(pVBInfo->P3d4, 0x11, data); /* Unlock CRTC */ - xgifb_reg_set(pVBInfo->P3d4, 0x01, (unsigned short)(tempcx & 0xff)); - xgifb_reg_and_or(pVBInfo->P3d4, 0x0b, ~0x0c, - (unsigned short)((tempcx & 0x0ff00) >> 10)); - xgifb_reg_set(pVBInfo->P3d4, 0x12, (unsigned short)(tempbx & 0xff)); - tempax = 0; - tempbx >>= 8; - - if (tempbx & 0x01) - tempax |= 0x02; - - if (tempbx & 0x02) - tempax |= 0x40; - - xgifb_reg_and_or(pVBInfo->P3d4, 0x07, ~0x42, tempax); - data = xgifb_reg_get(pVBInfo->P3d4, 0x07); - tempax = 0; - - if (tempbx & 0x04) - tempax |= 0x02; - - xgifb_reg_and_or(pVBInfo->P3d4, 0x0a, ~0x02, tempax); - xgifb_reg_set(pVBInfo->P3d4, 0x11, temp); -} - -static void XGI_SetCRT1Offset(unsigned short ModeNo, - unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned short temp, ah, al, temp2, i, DisplayUnit; - - /* GetOffset */ - temp = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeInfo; - temp >>= 8; - temp = XGI330_ScreenOffset[temp]; - - temp2 = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; - temp2 &= InterlaceMode; - - if (temp2) - temp <<= 1; - - temp2 = pVBInfo->ModeType - ModeEGA; - - switch (temp2) { - case 0: - temp2 = 1; - break; - case 1: - temp2 = 2; - break; - case 2: - temp2 = 4; - break; - case 3: - temp2 = 4; - break; - case 4: - temp2 = 6; - break; - case 5: - temp2 = 8; - break; - default: - break; - } - - if ((ModeNo >= 0x26) && (ModeNo <= 0x28)) - temp = temp * temp2 + temp2 / 2; - else - temp *= temp2; - - /* SetOffset */ - DisplayUnit = temp; - temp2 = temp; - temp >>= 8; /* ah */ - temp &= 0x0F; - i = xgifb_reg_get(pVBInfo->P3c4, 0x0E); - i &= 0xF0; - i |= temp; - xgifb_reg_set(pVBInfo->P3c4, 0x0E, i); - - temp = (unsigned char)temp2; - temp &= 0xFF; /* al */ - xgifb_reg_set(pVBInfo->P3d4, 0x13, temp); - - /* SetDisplayUnit */ - temp2 = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; - temp2 &= InterlaceMode; - if (temp2) - DisplayUnit >>= 1; - - DisplayUnit <<= 5; - ah = (DisplayUnit & 0xff00) >> 8; - al = DisplayUnit & 0x00ff; - if (al == 0) - ah += 1; - else - ah += 2; - - if (HwDeviceExtension->jChipType >= XG20) - if ((ModeNo == 0x4A) | (ModeNo == 0x49)) - ah -= 1; - - xgifb_reg_set(pVBInfo->P3c4, 0x10, ah); -} - -static unsigned short XGI_GetVCLK2Ptr(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short VCLKIndex, modeflag; - - /* si+Ext_ResInfo */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { /* 301b */ - if (pVBInfo->LCDResInfo != Panel_1024x768) - /* LCDXlat2VCLK */ - VCLKIndex = VCLK108_2_315 + 5; - else - VCLKIndex = VCLK65_315 + 2; /* LCDXlat1VCLK */ - } else if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - if (pVBInfo->SetFlag & RPLLDIV2XO) - VCLKIndex = TVCLKBASE_315_25 + HiTVVCLKDIV2; - else - VCLKIndex = TVCLKBASE_315_25 + HiTVVCLK; - - if (pVBInfo->SetFlag & TVSimuMode) { - if (modeflag & Charx8Dot) - VCLKIndex = TVCLKBASE_315_25 + HiTVSimuVCLK; - else - VCLKIndex = TVCLKBASE_315_25 + HiTVTextVCLK; - } - - /* 301lv */ - if (pVBInfo->VBType & VB_SIS301LV) { - if (pVBInfo->SetFlag & RPLLDIV2XO) - VCLKIndex = YPbPr525iVCLK_2; - else - VCLKIndex = YPbPr525iVCLK; - } - } else if (pVBInfo->VBInfo & SetCRT2ToTV) { - if (pVBInfo->SetFlag & RPLLDIV2XO) - VCLKIndex = TVCLKBASE_315_25 + TVVCLKDIV2; - else - VCLKIndex = TVCLKBASE_315_25 + TVVCLK; - } else { /* for CRT2 */ - /* di+Ext_CRTVCLK */ - VCLKIndex = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; - VCLKIndex &= IndexMask; - } - - return VCLKIndex; -} - -static void XGI_SetCRT1VCLK(unsigned short ModeIdIndex, - struct xgi_hw_device_info *HwDeviceExtension, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned char index, data; - unsigned short vclkindex; - - if ((pVBInfo->IF_DEF_LVDS == 0) && - (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV | - VB_SIS302LV | VB_XGI301C)) && - (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA)) { - vclkindex = XGI_GetVCLK2Ptr(ModeIdIndex, RefreshRateTableIndex, - pVBInfo); - data = xgifb_reg_get(pVBInfo->P3c4, 0x31) & 0xCF; - xgifb_reg_set(pVBInfo->P3c4, 0x31, data); - data = XGI_VBVCLKData[vclkindex].Part4_A; - xgifb_reg_set(pVBInfo->P3c4, 0x2B, data); - data = XGI_VBVCLKData[vclkindex].Part4_B; - xgifb_reg_set(pVBInfo->P3c4, 0x2C, data); - xgifb_reg_set(pVBInfo->P3c4, 0x2D, 0x01); - } else { - index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; - data = xgifb_reg_get(pVBInfo->P3c4, 0x31) & 0xCF; - xgifb_reg_set(pVBInfo->P3c4, 0x31, data); - xgifb_reg_set(pVBInfo->P3c4, 0x2B, XGI_VCLKData[index].SR2B); - xgifb_reg_set(pVBInfo->P3c4, 0x2C, XGI_VCLKData[index].SR2C); - xgifb_reg_set(pVBInfo->P3c4, 0x2D, 0x01); - } - - if (HwDeviceExtension->jChipType >= XG20) { - if (XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag & - HalfDCLK) { - data = xgifb_reg_get(pVBInfo->P3c4, 0x2B); - xgifb_reg_set(pVBInfo->P3c4, 0x2B, data); - data = xgifb_reg_get(pVBInfo->P3c4, 0x2C); - index = data; - index &= 0xE0; - data &= 0x1F; - data <<= 1; - data += 1; - data |= index; - xgifb_reg_set(pVBInfo->P3c4, 0x2C, data); - } - } -} - -static void XGI_SetXG21FPBits(struct vb_device_info *pVBInfo) -{ - unsigned char temp; - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); /* D[0] 1: 18bit */ - temp = (temp & 1) << 6; - /* SR06[6] 18bit Dither */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0x40, temp); - /* SR09[7] enable FP output, SR09[6] 1: sigle 18bits, 0: dual 12bits */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x09, ~0xc0, temp | 0x80); -} - -static void XGI_SetCRT1FIFO(struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned short data; - - data = xgifb_reg_get(pVBInfo->P3c4, 0x3D); - data &= 0xfe; - xgifb_reg_set(pVBInfo->P3c4, 0x3D, data); /* disable auto-threshold */ - - xgifb_reg_set(pVBInfo->P3c4, 0x08, 0x34); - data = xgifb_reg_get(pVBInfo->P3c4, 0x09); - data &= 0xC0; - xgifb_reg_set(pVBInfo->P3c4, 0x09, data | 0x30); - data = xgifb_reg_get(pVBInfo->P3c4, 0x3D); - data |= 0x01; - xgifb_reg_set(pVBInfo->P3c4, 0x3D, data); - - if (HwDeviceExtension->jChipType == XG21) - XGI_SetXG21FPBits(pVBInfo); /* Fix SR9[7:6] can't read back */ -} - -static void XGI_SetVCLKState(struct xgi_hw_device_info *HwDeviceExtension, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short data, data2 = 0; - short VCLK; - - unsigned char index; - - index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; - index &= IndexMask; - VCLK = XGI_VCLKData[index].CLOCK; - - data = xgifb_reg_get(pVBInfo->P3c4, 0x32); - data &= 0xf3; - if (VCLK >= 200) - data |= 0x0c; /* VCLK > 200 */ - - if (HwDeviceExtension->jChipType >= XG20) - data &= ~0x04; /* 2 pixel mode */ - - xgifb_reg_set(pVBInfo->P3c4, 0x32, data); - - if (HwDeviceExtension->jChipType < XG20) { - data = xgifb_reg_get(pVBInfo->P3c4, 0x1F); - data &= 0xE7; - if (VCLK < 200) - data |= 0x10; - xgifb_reg_set(pVBInfo->P3c4, 0x1F, data); - } - - data2 = 0x00; - - xgifb_reg_and_or(pVBInfo->P3c4, 0x07, 0xFC, data2); - if (HwDeviceExtension->jChipType >= XG27) - xgifb_reg_and_or(pVBInfo->P3c4, 0x40, 0xFC, data2 & 0x03); -} - -static void XGI_SetCRT1ModeRegs(struct xgi_hw_device_info *HwDeviceExtension, - unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short data, data2, data3, infoflag = 0, modeflag, resindex, - xres; - - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - infoflag = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; - - if (xgifb_reg_get(pVBInfo->P3d4, 0x31) & 0x01) - xgifb_reg_and_or(pVBInfo->P3c4, 0x1F, 0x3F, 0x00); - - data = infoflag; - data2 = 0; - data2 |= 0x02; - data3 = pVBInfo->ModeType - ModeVGA; - data3 <<= 2; - data2 |= data3; - data &= InterlaceMode; - - if (data) - data2 |= 0x20; - - xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0x3F, data2); - resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - xres = XGI330_ModeResInfo[resindex].HTotal; /* xres->ax */ - - data = 0x0000; - if (infoflag & InterlaceMode) { - if (xres == 1024) - data = 0x0035; - else if (xres == 1280) - data = 0x0048; - } - - xgifb_reg_and_or(pVBInfo->P3d4, 0x19, 0xFF, data); - xgifb_reg_and_or(pVBInfo->P3d4, 0x19, 0xFC, 0); - - if (modeflag & HalfDCLK) - xgifb_reg_and_or(pVBInfo->P3c4, 0x01, 0xF7, 0x08); - - data2 = 0; - - if (modeflag & LineCompareOff) - data2 |= 0x08; - - xgifb_reg_and_or(pVBInfo->P3c4, 0x0F, ~0x48, data2); - data = 0x60; - data = data ^ 0x60; - data = data ^ 0xA0; - xgifb_reg_and_or(pVBInfo->P3c4, 0x21, 0x1F, data); - - XGI_SetVCLKState(HwDeviceExtension, RefreshRateTableIndex, pVBInfo); - - data = xgifb_reg_get(pVBInfo->P3d4, 0x31); - - if (HwDeviceExtension->jChipType == XG27) { - if (data & 0x40) - data = 0x2c; - else - data = 0x6c; - xgifb_reg_set(pVBInfo->P3d4, 0x52, data); - xgifb_reg_or(pVBInfo->P3d4, 0x51, 0x10); - } else if (HwDeviceExtension->jChipType >= XG20) { - if (data & 0x40) - data = 0x33; - else - data = 0x73; - xgifb_reg_set(pVBInfo->P3d4, 0x52, data); - xgifb_reg_set(pVBInfo->P3d4, 0x51, 0x02); - } else { - if (data & 0x40) - data = 0x2c; - else - data = 0x6c; - xgifb_reg_set(pVBInfo->P3d4, 0x52, data); - } -} - -static void XGI_WriteDAC(unsigned short dl, - unsigned short ah, - unsigned short al, - unsigned short dh, - struct vb_device_info *pVBInfo) -{ - unsigned short bh, bl; - - bh = ah; - bl = al; - - if (dl != 0) { - swap(bh, dh); - if (dl == 1) - swap(bl, dh); - else - swap(bl, bh); - } - outb((unsigned short)dh, pVBInfo->P3c9); - outb((unsigned short)bh, pVBInfo->P3c9); - outb((unsigned short)bl, pVBInfo->P3c9); -} - -static void XGI_LoadDAC(struct vb_device_info *pVBInfo) -{ - unsigned short data, data2, i, k, m, n, o, si, di, bx, dl, al, ah, dh; - const unsigned short *table = XGINew_VGA_DAC; - - outb(0xFF, pVBInfo->P3c6); - outb(0x00, pVBInfo->P3c8); - - for (i = 0; i < 16; i++) { - data = table[i]; - - for (k = 0; k < 3; k++) { - data2 = 0; - - if (data & 0x01) - data2 = 0x2A; - - if (data & 0x02) - data2 += 0x15; - - outb(data2, pVBInfo->P3c9); - data >>= 2; - } - } - - for (i = 16; i < 32; i++) { - data = table[i]; - - for (k = 0; k < 3; k++) - outb(data, pVBInfo->P3c9); - } - - si = 32; - - for (m = 0; m < 9; m++) { - di = si; - bx = si + 0x04; - dl = 0; - - for (n = 0; n < 3; n++) { - for (o = 0; o < 5; o++) { - dh = table[si]; - ah = table[di]; - al = table[bx]; - si++; - XGI_WriteDAC(dl, ah, al, dh, pVBInfo); - } - - si -= 2; - - for (o = 0; o < 3; o++) { - dh = table[bx]; - ah = table[di]; - al = table[si]; - si--; - XGI_WriteDAC(dl, ah, al, dh, pVBInfo); - } - - dl++; - } - - si += 5; - } -} - -static void XGI_GetLVDSResInfo(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short resindex, xres, yres, modeflag; - - /* si+Ext_ResInfo */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - - /* si+Ext_ResInfo */ - resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - - xres = XGI330_ModeResInfo[resindex].HTotal; - yres = XGI330_ModeResInfo[resindex].VTotal; - - if (modeflag & HalfDCLK) - xres <<= 1; - - if (modeflag & DoubleScanMode) - yres <<= 1; - - if (xres == 720) - xres = 640; - - pVBInfo->VGAHDE = xres; - pVBInfo->HDE = xres; - pVBInfo->VGAVDE = yres; - pVBInfo->VDE = yres; -} - -static void const *XGI_GetLcdPtr(struct XGI330_LCDDataTablStruct const *table, - unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short i, tempdx, tempbx, modeflag; - - tempbx = 0; - - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - i = 0; - - while (table[i].PANELID != 0xff) { - tempdx = pVBInfo->LCDResInfo; - if (tempbx & 0x0080) { /* OEMUtil */ - tempbx &= ~0x0080; - tempdx = pVBInfo->LCDTypeInfo; - } - - if (pVBInfo->LCDInfo & EnableScalingLCD) - tempdx &= ~PanelResInfo; - - if (table[i].PANELID == tempdx) { - tempbx = table[i].MASK; - tempdx = pVBInfo->LCDInfo; - - if (modeflag & HalfDCLK) - tempdx |= SetLCDLowResolution; - - tempbx &= tempdx; - if (tempbx == table[i].CAP) - break; - } - i++; - } - - return table[i].DATAPTR; -} - -static struct SiS_TVData const *XGI_GetTVPtr( - unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short i, tempdx, tempal, modeflag; - - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - tempal = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; - tempal = tempal & 0x3f; - tempdx = pVBInfo->TVInfo; - - if (pVBInfo->VBInfo & SetInSlaveMode) - tempdx = tempdx | SetTVLockMode; - - if (modeflag & HalfDCLK) - tempdx = tempdx | SetTVLowResolution; - - i = 0; - - while (XGI_TVDataTable[i].MASK != 0xffff) { - if ((tempdx & XGI_TVDataTable[i].MASK) == - XGI_TVDataTable[i].CAP) - break; - i++; - } - - return &XGI_TVDataTable[i].DATAPTR[tempal]; -} - -static void XGI_GetLVDSData(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - struct SiS_LVDSData const *LCDPtr; - - if (!(pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA))) - return; - - LCDPtr = XGI_GetLcdPtr(XGI_EPLLCDDataPtr, ModeIdIndex, pVBInfo); - pVBInfo->VGAHT = LCDPtr->VGAHT; - pVBInfo->VGAVT = LCDPtr->VGAVT; - pVBInfo->HT = LCDPtr->LCDHT; - pVBInfo->VT = LCDPtr->LCDVT; - - if (pVBInfo->LCDInfo & (SetLCDtoNonExpanding | EnableScalingLCD)) - return; - - if ((pVBInfo->LCDResInfo == Panel_1024x768) || - (pVBInfo->LCDResInfo == Panel_1024x768x75)) { - pVBInfo->HDE = 1024; - pVBInfo->VDE = 768; - } else if ((pVBInfo->LCDResInfo == Panel_1280x1024) || - (pVBInfo->LCDResInfo == Panel_1280x1024x75)) { - pVBInfo->HDE = 1280; - pVBInfo->VDE = 1024; - } else if (pVBInfo->LCDResInfo == Panel_1400x1050) { - pVBInfo->HDE = 1400; - pVBInfo->VDE = 1050; - } else { - pVBInfo->HDE = 1600; - pVBInfo->VDE = 1200; - } -} - -static void XGI_ModCRT1Regs(unsigned short ModeIdIndex, - struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned short i; - struct XGI_LVDSCRT1HDataStruct const *LCDPtr = NULL; - struct XGI_LVDSCRT1VDataStruct const *LCDPtr1 = NULL; - - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - LCDPtr = XGI_GetLcdPtr(xgifb_epllcd_crt1_h, ModeIdIndex, - pVBInfo); - - for (i = 0; i < 8; i++) - pVBInfo->TimingH.data[i] = LCDPtr[0].Reg[i]; - } - - XGI_SetCRT1Timing_H(pVBInfo, HwDeviceExtension); - - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - LCDPtr1 = XGI_GetLcdPtr(xgifb_epllcd_crt1_v, ModeIdIndex, - pVBInfo); - for (i = 0; i < 7; i++) - pVBInfo->TimingV.data[i] = LCDPtr1[0].Reg[i]; - } - - XGI_SetCRT1Timing_V(ModeIdIndex, pVBInfo); -} - -static unsigned short XGI_GetLCDCapPtr(struct vb_device_info *pVBInfo) -{ - unsigned char tempal, tempah, tempbl, i; - - tempah = xgifb_reg_get(pVBInfo->P3d4, 0x36); - tempal = tempah & 0x0F; - tempah = tempah & 0xF0; - i = 0; - tempbl = pVBInfo->LCDCapList[i].LCD_ID; - - while (tempbl != 0xFF) { - if (tempbl & 0x80) { /* OEMUtil */ - tempal = tempah; - tempbl = tempbl & ~(0x80); - } - - if (tempal == tempbl) - break; - - i++; - - tempbl = pVBInfo->LCDCapList[i].LCD_ID; - } - - return i; -} - -static unsigned short XGI_GetLCDCapPtr1(struct vb_device_info *pVBInfo) -{ - unsigned short tempah, tempal, tempbl, i; - - tempal = pVBInfo->LCDResInfo; - tempah = pVBInfo->LCDTypeInfo; - - i = 0; - tempbl = pVBInfo->LCDCapList[i].LCD_ID; - - while (tempbl != 0xFF) { - if ((tempbl & 0x80) && (tempbl != 0x80)) { - tempal = tempah; - tempbl &= ~0x80; - } - - if (tempal == tempbl) - break; - - i++; - tempbl = pVBInfo->LCDCapList[i].LCD_ID; - } - - if (tempbl == 0xFF) { - pVBInfo->LCDResInfo = Panel_1024x768; - pVBInfo->LCDTypeInfo = 0; - i = 0; - } - - return i; -} - -static void XGI_GetLCDSync(unsigned short *HSyncWidth, - unsigned short *VSyncWidth, - struct vb_device_info *pVBInfo) -{ - unsigned short Index; - - Index = XGI_GetLCDCapPtr(pVBInfo); - *HSyncWidth = pVBInfo->LCDCapList[Index].LCD_HSyncWidth; - *VSyncWidth = pVBInfo->LCDCapList[Index].LCD_VSyncWidth; -} - -static void XGI_SetLVDSRegs(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short tempbx, tempax, tempcx, tempdx, push1, push2, modeflag; - unsigned long temp, temp1, temp2, temp3, push3; - struct XGI330_LCDDataDesStruct2 const *LCDPtr1 = NULL; - - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - LCDPtr1 = XGI_GetLcdPtr(XGI_EPLLCDDesDataPtr, ModeIdIndex, pVBInfo); - - XGI_GetLCDSync(&tempax, &tempbx, pVBInfo); - push1 = tempbx; - push2 = tempax; - - /* GetLCDResInfo */ - if ((pVBInfo->LCDResInfo == Panel_1024x768) || - (pVBInfo->LCDResInfo == Panel_1024x768x75)) { - tempax = 1024; - tempbx = 768; - } else if ((pVBInfo->LCDResInfo == Panel_1280x1024) || - (pVBInfo->LCDResInfo == Panel_1280x1024x75)) { - tempax = 1280; - tempbx = 1024; - } else if (pVBInfo->LCDResInfo == Panel_1400x1050) { - tempax = 1400; - tempbx = 1050; - } else { - tempax = 1600; - tempbx = 1200; - } - - if (pVBInfo->LCDInfo & SetLCDtoNonExpanding) { - pVBInfo->HDE = tempax; - pVBInfo->VDE = tempbx; - pVBInfo->VGAHDE = tempax; - pVBInfo->VGAVDE = tempbx; - } - - tempax = pVBInfo->HT; - - tempbx = LCDPtr1->LCDHDES; - - tempcx = pVBInfo->HDE; - tempbx = tempbx & 0x0fff; - tempcx += tempbx; - - if (tempcx >= tempax) - tempcx -= tempax; - - xgifb_reg_set(pVBInfo->Part1Port, 0x1A, tempbx & 0x07); - - tempcx >>= 3; - tempbx >>= 3; - - xgifb_reg_set(pVBInfo->Part1Port, 0x16, - (unsigned short)(tempbx & 0xff)); - xgifb_reg_set(pVBInfo->Part1Port, 0x17, - (unsigned short)(tempcx & 0xff)); - - tempax = pVBInfo->HT; - - tempbx = LCDPtr1->LCDHRS; - - tempcx = push2; - - if (pVBInfo->LCDInfo & EnableScalingLCD) - tempcx = LCDPtr1->LCDHSync; - - tempcx += tempbx; - - if (tempcx >= tempax) - tempcx -= tempax; - - tempax = tempbx & 0x07; - tempax >>= 5; - tempcx >>= 3; - tempbx >>= 3; - - tempcx &= 0x1f; - tempax |= tempcx; - - xgifb_reg_set(pVBInfo->Part1Port, 0x15, tempax); - xgifb_reg_set(pVBInfo->Part1Port, 0x14, - (unsigned short)(tempbx & 0xff)); - - tempax = pVBInfo->VT; - tempbx = LCDPtr1->LCDVDES; - tempcx = pVBInfo->VDE; - - tempbx = tempbx & 0x0fff; - tempcx += tempbx; - if (tempcx >= tempax) - tempcx -= tempax; - - xgifb_reg_set(pVBInfo->Part1Port, 0x1b, - (unsigned short)(tempbx & 0xff)); - xgifb_reg_set(pVBInfo->Part1Port, 0x1c, - (unsigned short)(tempcx & 0xff)); - - tempbx = (tempbx >> 8) & 0x07; - tempcx = (tempcx >> 8) & 0x07; - - xgifb_reg_set(pVBInfo->Part1Port, 0x1d, - (unsigned short)((tempcx << 3) | tempbx)); - - tempax = pVBInfo->VT; - tempbx = LCDPtr1->LCDVRS; - - tempcx = push1; - - if (pVBInfo->LCDInfo & EnableScalingLCD) - tempcx = LCDPtr1->LCDVSync; - - tempcx += tempbx; - if (tempcx >= tempax) - tempcx -= tempax; - - xgifb_reg_set(pVBInfo->Part1Port, 0x18, - (unsigned short)(tempbx & 0xff)); - xgifb_reg_and_or(pVBInfo->Part1Port, 0x19, ~0x0f, - (unsigned short)(tempcx & 0x0f)); - - tempax = ((tempbx >> 8) & 0x07) << 3; - - tempbx = pVBInfo->VGAVDE; - if (tempbx != pVBInfo->VDE) - tempax |= 0x40; - - if (pVBInfo->LCDInfo & XGI_EnableLVDSDDA) - tempax |= 0x40; - - xgifb_reg_and_or(pVBInfo->Part1Port, 0x1a, 0x07, tempax); - - tempbx = pVBInfo->VDE; - tempax = pVBInfo->VGAVDE; - - temp = tempax; /* 0430 ylshieh */ - temp1 = (temp << 18) / tempbx; - - tempdx = (unsigned short)((temp << 18) % tempbx); - - if (tempdx != 0) - temp1 += 1; - - temp2 = temp1; - push3 = temp2; - - xgifb_reg_set(pVBInfo->Part1Port, 0x37, (unsigned short)(temp2 & 0xff)); - xgifb_reg_set(pVBInfo->Part1Port, 0x36, (unsigned short)((temp2 >> 8) & 0xff)); - - tempbx = (unsigned short)(temp2 >> 16); - tempax = tempbx & 0x03; - - tempbx = pVBInfo->VGAVDE; - if (tempbx == pVBInfo->VDE) - tempax |= 0x04; - - xgifb_reg_set(pVBInfo->Part1Port, 0x35, tempax); - - if (pVBInfo->VBType & VB_XGI301C) { - temp2 = push3; - xgifb_reg_set(pVBInfo->Part4Port, - 0x3c, - (unsigned short)(temp2 & 0xff)); - xgifb_reg_set(pVBInfo->Part4Port, - 0x3b, - (unsigned short)((temp2 >> 8) & - 0xff)); - tempbx = (unsigned short)(temp2 >> 16); - xgifb_reg_and_or(pVBInfo->Part4Port, 0x3a, ~0xc0, - (unsigned short)((tempbx & 0xff) << 6)); - - tempcx = pVBInfo->VGAVDE; - if (tempcx == pVBInfo->VDE) - xgifb_reg_and_or(pVBInfo->Part4Port, 0x30, ~0x0c, 0x00); - else - xgifb_reg_and_or(pVBInfo->Part4Port, 0x30, ~0x0c, 0x08); - } - - tempcx = pVBInfo->VGAHDE; - tempbx = pVBInfo->HDE; - - temp1 = tempcx << 16; - - tempax = (unsigned short)(temp1 / tempbx); - - if ((tempbx & 0xffff) == (tempcx & 0xffff)) - tempax = 65535; - - temp3 = tempax; - temp1 = pVBInfo->VGAHDE << 16; - - temp1 /= temp3; - temp3 <<= 16; - temp1 -= 1; - - temp3 = (temp3 & 0xffff0000) + (temp1 & 0xffff); - - tempax = (unsigned short)(temp3 & 0xff); - xgifb_reg_set(pVBInfo->Part1Port, 0x1f, tempax); - - temp1 = pVBInfo->VGAVDE << 18; - temp1 = temp1 / push3; - tempbx = (unsigned short)(temp1 & 0xffff); - - if (pVBInfo->LCDResInfo == Panel_1024x768) - tempbx -= 1; - - tempax = ((tempbx >> 8) & 0xff) << 3; - tempax |= (unsigned short)((temp3 >> 8) & 0x07); - xgifb_reg_set(pVBInfo->Part1Port, 0x20, - (unsigned short)(tempax & 0xff)); - xgifb_reg_set(pVBInfo->Part1Port, 0x21, - (unsigned short)(tempbx & 0xff)); - - temp3 >>= 16; - - if (modeflag & HalfDCLK) - temp3 >>= 1; - - xgifb_reg_set(pVBInfo->Part1Port, 0x22, - (unsigned short)((temp3 >> 8) & 0xff)); - xgifb_reg_set(pVBInfo->Part1Port, 0x23, - (unsigned short)(temp3 & 0xff)); -} - -/* - * Function : XGI_GETLCDVCLKPtr - * Input : - * Output : al -> VCLK Index - * Description : - */ -static void XGI_GetLCDVCLKPtr(unsigned char *di_0, unsigned char *di_1, - struct vb_device_info *pVBInfo) -{ - unsigned short index; - - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - index = XGI_GetLCDCapPtr1(pVBInfo); - - if (pVBInfo->VBInfo & SetCRT2ToLCD) { /* LCDB */ - *di_0 = pVBInfo->LCDCapList[index].LCUCHAR_VCLKData1; - *di_1 = pVBInfo->LCDCapList[index].LCUCHAR_VCLKData2; - } else { /* LCDA */ - *di_0 = pVBInfo->LCDCapList[index].LCDA_VCLKData1; - *di_1 = pVBInfo->LCDCapList[index].LCDA_VCLKData2; - } - } -} - -static unsigned char XGI_GetVCLKPtr(unsigned short RefreshRateTableIndex, - unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short index, modeflag; - unsigned char tempal; - - /* si+Ext_ResInfo */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - if ((pVBInfo->SetFlag & ProgrammingCRT2) && - !(pVBInfo->LCDInfo & EnableScalingLCD)) { /* {LCDA/LCDB} */ - index = XGI_GetLCDCapPtr(pVBInfo); - tempal = pVBInfo->LCDCapList[index].LCD_VCLK; - - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) - return tempal; - - /* {TV} */ - if (pVBInfo->VBType & - (VB_SIS301B | - VB_SIS302B | - VB_SIS301LV | - VB_SIS302LV | - VB_XGI301C)) { - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - tempal = TVCLKBASE_315 + HiTVVCLKDIV2; - if (!(pVBInfo->TVInfo & RPLLDIV2XO)) - tempal = TVCLKBASE_315 + HiTVVCLK; - if (pVBInfo->TVInfo & TVSimuMode) { - tempal = TVCLKBASE_315 + HiTVSimuVCLK; - if (!(modeflag & Charx8Dot)) - tempal = TVCLKBASE_315 + - HiTVTextVCLK; - } - return tempal; - } - - if (pVBInfo->TVInfo & TVSetYPbPr750p) - return XGI_YPbPr750pVCLK; - - if (pVBInfo->TVInfo & TVSetYPbPr525p) - return YPbPr525pVCLK; - - tempal = NTSC1024VCLK; - - if (!(pVBInfo->TVInfo & NTSC1024x768)) { - tempal = TVCLKBASE_315 + TVVCLKDIV2; - if (!(pVBInfo->TVInfo & RPLLDIV2XO)) - tempal = TVCLKBASE_315 + TVVCLK; - } - - if (pVBInfo->VBInfo & SetCRT2ToTV) - return tempal; - } - } /* {End of VB} */ - - inb((pVBInfo->P3ca + 0x02)); - return XGI330_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; -} - -static void XGI_GetVCLKLen(unsigned char tempal, unsigned char *di_0, - unsigned char *di_1, struct vb_device_info *pVBInfo) -{ - if (pVBInfo->VBType & (VB_SIS301 | VB_SIS301B | VB_SIS302B - | VB_SIS301LV | VB_SIS302LV | VB_XGI301C)) { - if (!(pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) && - (pVBInfo->SetFlag & ProgrammingCRT2)) { - *di_0 = XGI_VBVCLKData[tempal].Part4_A; - *di_1 = XGI_VBVCLKData[tempal].Part4_B; - } - } else { - *di_0 = XGI_VCLKData[tempal].SR2B; - *di_1 = XGI_VCLKData[tempal].SR2C; - } -} - -static void XGI_SetCRT2ECLK(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned char di_0, di_1, tempal; - int i; - - tempal = XGI_GetVCLKPtr(RefreshRateTableIndex, ModeIdIndex, pVBInfo); - XGI_GetVCLKLen(tempal, &di_0, &di_1, pVBInfo); - XGI_GetLCDVCLKPtr(&di_0, &di_1, pVBInfo); - - for (i = 0; i < 4; i++) { - xgifb_reg_and_or(pVBInfo->P3d4, 0x31, ~0x30, - (unsigned short)(0x10 * i)); - if (!(pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) && - !(pVBInfo->VBInfo & SetInSlaveMode)) { - xgifb_reg_set(pVBInfo->P3c4, 0x2e, di_0); - xgifb_reg_set(pVBInfo->P3c4, 0x2f, di_1); - } else { - xgifb_reg_set(pVBInfo->P3c4, 0x2b, di_0); - xgifb_reg_set(pVBInfo->P3c4, 0x2c, di_1); - } - } -} - -static void XGI_UpdateModeInfo(struct vb_device_info *pVBInfo) -{ - unsigned short tempcl, tempch, temp, tempbl, tempax; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - tempcl = 0; - tempch = 0; - temp = xgifb_reg_get(pVBInfo->P3c4, 0x01); - - if (!(temp & 0x20)) { - temp = xgifb_reg_get(pVBInfo->P3d4, 0x17); - if (temp & 0x80) { - temp = xgifb_reg_get(pVBInfo->P3d4, 0x53); - if (!(temp & 0x40)) - tempcl |= ActiveCRT1; - } - } - - temp = xgifb_reg_get(pVBInfo->Part1Port, 0x2e); - temp &= 0x0f; - - if (!(temp == 0x08)) { - /* Check ChannelA */ - tempax = xgifb_reg_get(pVBInfo->Part1Port, 0x13); - if (tempax & 0x04) - tempcl = tempcl | ActiveLCD; - - temp &= 0x05; - - if (!(tempcl & ActiveLCD)) { - if (temp == 0x01) - tempcl |= ActiveCRT2; - } - - if (temp == 0x04) - tempcl |= ActiveLCD; - - if (temp == 0x05) { - temp = xgifb_reg_get(pVBInfo->Part2Port, 0x00); - - if (!(temp & 0x08)) - tempch |= ActiveAVideo; - - if (!(temp & 0x04)) - tempch |= ActiveSVideo; - - if (temp & 0x02) - tempch |= ActiveSCART; - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - if (temp & 0x01) - tempch |= ActiveHiTV; - } - - if (pVBInfo->VBInfo & SetCRT2ToYPbPr525750) { - temp = xgifb_reg_get( - pVBInfo->Part2Port, - 0x4d); - - if (temp & 0x10) - tempch |= ActiveYPbPr; - } - - if (tempch != 0) - tempcl |= ActiveTV; - } - } - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x3d); - if (tempcl & ActiveLCD) { - if ((pVBInfo->SetFlag & ReserveTVOption)) { - if (temp & ActiveTV) - tempcl |= ActiveTV; - } - } - temp = tempcl; - tempbl = ~XGI_ModeSwitchStatus; - xgifb_reg_and_or(pVBInfo->P3d4, 0x3d, tempbl, temp); - - if (!(pVBInfo->SetFlag & ReserveTVOption)) - xgifb_reg_set(pVBInfo->P3d4, 0x3e, tempch); - } -} - -void XGI_GetVBType(struct vb_device_info *pVBInfo) -{ - unsigned short flag, tempbx, tempah; - - tempbx = VB_SIS302B; - flag = xgifb_reg_get(pVBInfo->Part4Port, 0x00); - if (flag == 0x02) - goto finish; - - tempbx = VB_SIS301; - flag = xgifb_reg_get(pVBInfo->Part4Port, 0x01); - if (flag < 0xB0) - goto finish; - - tempbx = VB_SIS301B; - if (flag < 0xC0) - goto bigger_than_0xB0; - - tempbx = VB_XGI301C; - if (flag < 0xD0) - goto bigger_than_0xB0; - - tempbx = VB_SIS301LV; - if (flag < 0xE0) - goto bigger_than_0xB0; - - tempbx = VB_SIS302LV; - tempah = xgifb_reg_get(pVBInfo->Part4Port, 0x39); - if (tempah != 0xFF) - tempbx = VB_XGI301C; - -bigger_than_0xB0: - if (tempbx & (VB_SIS301B | VB_SIS302B)) { - flag = xgifb_reg_get(pVBInfo->Part4Port, 0x23); - if (!(flag & 0x02)) - tempbx = tempbx | VB_NoLCD; - } - -finish: - pVBInfo->VBType = tempbx; -} - -static void XGI_GetVBInfo(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short tempax, push, tempbx, temp, modeflag; - - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - pVBInfo->SetFlag = 0; - pVBInfo->ModeType = modeflag & ModeTypeMask; - tempbx = 0; - - if (!(pVBInfo->VBType & 0xFFFF)) - return; - - /* Check Display Device */ - temp = xgifb_reg_get(pVBInfo->P3d4, 0x30); - tempbx = tempbx | temp; - temp = xgifb_reg_get(pVBInfo->P3d4, 0x31); - push = temp; - push <<= 8; - tempax = temp << 8; - tempbx = tempbx | tempax; - temp = SetCRT2ToDualEdge | SetCRT2ToYPbPr525750 | XGI_SetCRT2ToLCDA - | SetInSlaveMode | DisableCRT2Display; - temp = 0xFFFF ^ temp; - tempbx &= temp; - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x38); - - if (pVBInfo->VBType & (VB_SIS302B | VB_SIS301LV | VB_SIS302LV | - VB_XGI301C)) { - if (temp & EnableDualEdge) { - tempbx |= SetCRT2ToDualEdge; - if (temp & SetToLCDA) - tempbx |= XGI_SetCRT2ToLCDA; - } - } - - if (pVBInfo->VBType & (VB_SIS301LV | VB_SIS302LV | VB_XGI301C)) { - if (temp & SetYPbPr) { - /* shampoo add for new scratch */ - temp = xgifb_reg_get(pVBInfo->P3d4, 0x35); - temp &= YPbPrMode; - tempbx |= SetCRT2ToHiVision; - - if (temp != YPbPrMode1080i) { - tempbx &= ~SetCRT2ToHiVision; - tempbx |= SetCRT2ToYPbPr525750; - } - } - } - - tempax = push; /* restore CR31 */ - - temp = 0x09FC; - - if (!(tempbx & temp)) { - tempax |= DisableCRT2Display; - tempbx = 0; - } - - if (!(pVBInfo->VBType & VB_NoLCD)) { - if (tempbx & XGI_SetCRT2ToLCDA) { - if (tempbx & SetSimuScanMode) - tempbx &= (~(SetCRT2ToLCD | SetCRT2ToRAMDAC | - SwitchCRT2)); - else - tempbx &= (~(SetCRT2ToLCD | SetCRT2ToRAMDAC | - SetCRT2ToTV | SwitchCRT2)); - } - } - - /* shampoo add */ - /* for driver abnormal */ - if (!(tempbx & (SwitchCRT2 | SetSimuScanMode))) { - if (tempbx & SetCRT2ToRAMDAC) { - tempbx &= (0xFF00 | SetCRT2ToRAMDAC | - SwitchCRT2 | SetSimuScanMode); - tempbx &= (0x00FF | (~SetCRT2ToYPbPr525750)); - } - } - - if (!(pVBInfo->VBType & VB_NoLCD)) { - if (tempbx & SetCRT2ToLCD) { - tempbx &= (0xFF00 | SetCRT2ToLCD | SwitchCRT2 | - SetSimuScanMode); - tempbx &= (0x00FF | (~SetCRT2ToYPbPr525750)); - } - } - - if (tempbx & SetCRT2ToSCART) { - tempbx &= (0xFF00 | SetCRT2ToSCART | SwitchCRT2 | - SetSimuScanMode); - tempbx &= (0x00FF | (~SetCRT2ToYPbPr525750)); - } - - if (tempbx & SetCRT2ToYPbPr525750) - tempbx &= (0xFF00 | SwitchCRT2 | SetSimuScanMode); - - if (tempbx & SetCRT2ToHiVision) - tempbx &= (0xFF00 | SetCRT2ToHiVision | SwitchCRT2 | - SetSimuScanMode); - - if (tempax & DisableCRT2Display) { /* Set Display Device Info */ - if (!(tempbx & (SwitchCRT2 | SetSimuScanMode))) - tempbx = DisableCRT2Display; - } - - if (!(tempbx & DisableCRT2Display)) { - if (!(tempbx & DriverMode) || !(modeflag & CRT2Mode)) { - if (!(tempbx & XGI_SetCRT2ToLCDA)) - tempbx |= (SetInSlaveMode | SetSimuScanMode); - } - - /* LCD+TV can't support in slave mode - * (Force LCDA+TV->LCDB) - */ - if ((tempbx & SetInSlaveMode) && (tempbx & XGI_SetCRT2ToLCDA)) { - tempbx ^= (SetCRT2ToLCD | XGI_SetCRT2ToLCDA | - SetCRT2ToDualEdge); - pVBInfo->SetFlag |= ReserveTVOption; - } - } - - pVBInfo->VBInfo = tempbx; -} - -static void XGI_GetTVInfo(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short tempbx = 0, resinfo = 0, modeflag, index1; - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - - tempbx = xgifb_reg_get(pVBInfo->P3d4, 0x35); - if (tempbx & TVSetPAL) { - tempbx &= (SetCHTVOverScan | - TVSetPALM | - TVSetPALN | - TVSetPAL); - if (tempbx & TVSetPALM) - /* set to NTSC if PAL-M */ - tempbx &= ~TVSetPAL; - } else { - tempbx &= (SetCHTVOverScan | - TVSetNTSCJ | - TVSetPAL); - } - - if (pVBInfo->VBInfo & SetCRT2ToSCART) - tempbx |= TVSetPAL; - - if (pVBInfo->VBInfo & SetCRT2ToYPbPr525750) { - index1 = xgifb_reg_get(pVBInfo->P3d4, 0x35); - index1 &= YPbPrMode; - - if (index1 == YPbPrMode525i) - tempbx |= TVSetYPbPr525i; - - if (index1 == YPbPrMode525p) - tempbx = tempbx | TVSetYPbPr525p; - if (index1 == YPbPrMode750p) - tempbx = tempbx | TVSetYPbPr750p; - } - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) - tempbx = tempbx | TVSetHiVision | TVSetPAL; - - if ((pVBInfo->VBInfo & SetInSlaveMode) && - (!(pVBInfo->VBInfo & SetNotSimuMode))) - tempbx |= TVSimuMode; - - if (!(tempbx & TVSetPAL) && (modeflag > 13) && (resinfo == 8)) { - /* NTSC 1024x768, */ - tempbx |= NTSC1024x768; - } - - tempbx |= RPLLDIV2XO; - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - if (pVBInfo->VBInfo & SetInSlaveMode) - tempbx &= (~RPLLDIV2XO); - } else if (tempbx & (TVSetYPbPr525p | TVSetYPbPr750p)) { - tempbx &= (~RPLLDIV2XO); - } else if (!(pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | - VB_SIS301LV | VB_SIS302LV | - VB_XGI301C))) { - if (tempbx & TVSimuMode) - tempbx &= (~RPLLDIV2XO); - } - } - pVBInfo->TVInfo = tempbx; -} - -static unsigned char XGI_GetLCDInfo(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short temp, tempax, tempbx, resinfo = 0, LCDIdIndex; - - pVBInfo->LCDResInfo = 0; - pVBInfo->LCDTypeInfo = 0; - pVBInfo->LCDInfo = 0; - - /* si+Ext_ResInfo */ - resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - temp = xgifb_reg_get(pVBInfo->P3d4, 0x36); /* Get LCD Res.Info */ - tempbx = temp & 0x0F; - - if (tempbx == 0) - tempbx = Panel_1024x768; /* default */ - - /* LCD75 */ - if ((tempbx == Panel_1024x768) || (tempbx == Panel_1280x1024)) { - if (pVBInfo->VBInfo & DriverMode) { - tempax = xgifb_reg_get(pVBInfo->P3d4, 0x33); - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) - tempax &= 0x0F; - else - tempax >>= 4; - - if ((resinfo == 6) || (resinfo == 9)) { - if (tempax >= 3) - tempbx |= PanelRef75Hz; - } else if ((resinfo == 7) || (resinfo == 8)) { - if (tempax >= 4) - tempbx |= PanelRef75Hz; - } - } - } - - pVBInfo->LCDResInfo = tempbx; - - /* End of LCD75 */ - - if (!(pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA))) - return 0; - - tempbx = 0; - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); - - temp &= (ScalingLCD | LCDNonExpanding | LCDSyncBit | SetPWDEnable); - - tempbx |= temp; - - LCDIdIndex = XGI_GetLCDCapPtr1(pVBInfo); - - tempax = pVBInfo->LCDCapList[LCDIdIndex].LCD_Capability; - - if (((pVBInfo->VBType & VB_SIS302LV) || - (pVBInfo->VBType & VB_XGI301C)) && (tempax & XGI_LCDDualLink)) - tempbx |= SetLCDDualLink; - - if ((pVBInfo->LCDResInfo == Panel_1400x1050) && - (pVBInfo->VBInfo & SetCRT2ToLCD) && (resinfo == 9) && - !(tempbx & EnableScalingLCD)) - /* - * set to center in 1280x1024 LCDB - * for Panel_1400x1050 - */ - tempbx |= SetLCDtoNonExpanding; - - if (pVBInfo->VBInfo & SetInSlaveMode) { - if (pVBInfo->VBInfo & SetNotSimuMode) - tempbx |= XGI_LCDVESATiming; - } else { - tempbx |= XGI_LCDVESATiming; - } - - pVBInfo->LCDInfo = tempbx; - - return 1; -} - -unsigned char XGI_SearchModeID(unsigned short ModeNo, - unsigned short *ModeIdIndex) -{ - for (*ModeIdIndex = 0;; (*ModeIdIndex)++) { - if (XGI330_EModeIDTable[*ModeIdIndex].Ext_ModeID == ModeNo) - break; - if (XGI330_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF) - return 0; - } - - return 1; -} - -static unsigned char XG21GPIODataTransfer(unsigned char ujDate) -{ - unsigned char ujRet = 0; - unsigned char i = 0; - - for (i = 0; i < 8; i++) { - ujRet <<= 1; - ujRet |= (ujDate >> i) & 1; - } - - return ujRet; -} - -/* - * output - * bl[5] : LVDS signal - * bl[1] : LVDS backlight - * bl[0] : LVDS VDD - */ -static unsigned char XGI_XG21GetPSCValue(struct vb_device_info *pVBInfo) -{ - unsigned char CR4A, temp; - - CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A); - xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~0x23); /* enable GPIO write */ - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); - - temp = XG21GPIODataTransfer(temp); - temp &= 0x23; - xgifb_reg_set(pVBInfo->P3d4, 0x4A, CR4A); - return temp; -} - -/* - * output - * bl[5] : LVDS signal - * bl[1] : LVDS backlight - * bl[0] : LVDS VDD - */ -static unsigned char XGI_XG27GetPSCValue(struct vb_device_info *pVBInfo) -{ - unsigned char CR4A, CRB4, temp; - - CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A); - xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~0x0C); /* enable GPIO write */ - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); - - temp &= 0x0C; - temp >>= 2; - xgifb_reg_set(pVBInfo->P3d4, 0x4A, CR4A); - CRB4 = xgifb_reg_get(pVBInfo->P3d4, 0xB4); - temp |= ((CRB4 & 0x04) << 3); - return temp; -} - -/* - * input - * bl[5] : 1;LVDS signal on - * bl[1] : 1;LVDS backlight on - * bl[0] : 1:LVDS VDD on - * bh: 100000b : clear bit 5, to set bit5 - * 000010b : clear bit 1, to set bit1 - * 000001b : clear bit 0, to set bit0 - */ -static void XGI_XG21BLSignalVDD(unsigned short tempbh, unsigned short tempbl, - struct vb_device_info *pVBInfo) -{ - unsigned char CR4A, temp; - - CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A); - tempbh &= 0x23; - tempbl &= 0x23; - xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~tempbh); /* enable GPIO write */ - - if (tempbh & 0x20) { - temp = (tempbl >> 4) & 0x02; - - /* CR B4[1] */ - xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~0x02, temp); - } - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x48); - - temp = XG21GPIODataTransfer(temp); - temp &= ~tempbh; - temp |= tempbl; - xgifb_reg_set(pVBInfo->P3d4, 0x48, temp); -} - -static void XGI_XG27BLSignalVDD(unsigned short tempbh, unsigned short tempbl, - struct vb_device_info *pVBInfo) -{ - unsigned char CR4A, temp; - unsigned short tempbh0, tempbl0; - - tempbh0 = tempbh; - tempbl0 = tempbl; - tempbh0 &= 0x20; - tempbl0 &= 0x20; - tempbh0 >>= 3; - tempbl0 >>= 3; - - if (tempbh & 0x20) { - temp = (tempbl >> 4) & 0x02; - - /* CR B4[1] */ - xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~0x02, temp); - } - xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~tempbh0, tempbl0); - - CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A); - tempbh &= 0x03; - tempbl &= 0x03; - tempbh <<= 2; - tempbl <<= 2; /* GPIOC,GPIOD */ - xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~tempbh); /* enable GPIO write */ - xgifb_reg_and_or(pVBInfo->P3d4, 0x48, ~tempbh, tempbl); -} - -static void XGI_DisplayOn(struct xgifb_video_info *xgifb_info, - struct xgi_hw_device_info *pXGIHWDE, - struct vb_device_info *pVBInfo) -{ - xgifb_reg_and_or(pVBInfo->P3c4, 0x01, 0xDF, 0x00); - if (pXGIHWDE->jChipType == XG21) { - if (pVBInfo->IF_DEF_LVDS == 1) { - if (!(XGI_XG21GetPSCValue(pVBInfo) & 0x1)) { - /* LVDS VDD on */ - XGI_XG21BLSignalVDD(0x01, 0x01, pVBInfo); - mdelay(xgifb_info->lvds_data.PSC_S2); - } - if (!(XGI_XG21GetPSCValue(pVBInfo) & 0x20)) - /* LVDS signal on */ - XGI_XG21BLSignalVDD(0x20, 0x20, pVBInfo); - mdelay(xgifb_info->lvds_data.PSC_S3); - /* LVDS backlight on */ - XGI_XG21BLSignalVDD(0x02, 0x02, pVBInfo); - } else { - /* DVO/DVI signal on */ - XGI_XG21BLSignalVDD(0x20, 0x20, pVBInfo); - } - } - - if (pXGIHWDE->jChipType == XG27) { - if (pVBInfo->IF_DEF_LVDS == 1) { - if (!(XGI_XG27GetPSCValue(pVBInfo) & 0x1)) { - /* LVDS VDD on */ - XGI_XG27BLSignalVDD(0x01, 0x01, pVBInfo); - mdelay(xgifb_info->lvds_data.PSC_S2); - } - if (!(XGI_XG27GetPSCValue(pVBInfo) & 0x20)) - /* LVDS signal on */ - XGI_XG27BLSignalVDD(0x20, 0x20, pVBInfo); - mdelay(xgifb_info->lvds_data.PSC_S3); - /* LVDS backlight on */ - XGI_XG27BLSignalVDD(0x02, 0x02, pVBInfo); - } else { - /* DVO/DVI signal on */ - XGI_XG27BLSignalVDD(0x20, 0x20, pVBInfo); - } - } -} - -void XGI_DisplayOff(struct xgifb_video_info *xgifb_info, - struct xgi_hw_device_info *pXGIHWDE, - struct vb_device_info *pVBInfo) -{ - if (pXGIHWDE->jChipType == XG21) { - if (pVBInfo->IF_DEF_LVDS == 1) { - /* LVDS backlight off */ - XGI_XG21BLSignalVDD(0x02, 0x00, pVBInfo); - mdelay(xgifb_info->lvds_data.PSC_S3); - } else { - /* DVO/DVI signal off */ - XGI_XG21BLSignalVDD(0x20, 0x00, pVBInfo); - } - } - - if (pXGIHWDE->jChipType == XG27) { - if ((XGI_XG27GetPSCValue(pVBInfo) & 0x2)) { - /* LVDS backlight off */ - XGI_XG27BLSignalVDD(0x02, 0x00, pVBInfo); - mdelay(xgifb_info->lvds_data.PSC_S3); - } - - if (pVBInfo->IF_DEF_LVDS == 0) { - /* DVO/DVI signal off */ - XGI_XG27BLSignalVDD(0x20, 0x00, pVBInfo); - } - } - - xgifb_reg_and_or(pVBInfo->P3c4, 0x01, 0xDF, 0x20); -} - -static void XGI_WaitDisply(struct vb_device_info *pVBInfo) -{ - while ((inb(pVBInfo->P3da) & 0x01)) - break; - - while (!(inb(pVBInfo->P3da) & 0x01)) - break; -} - -static void XGI_AutoThreshold(struct vb_device_info *pVBInfo) -{ - xgifb_reg_or(pVBInfo->Part1Port, 0x01, 0x40); -} - -static void XGI_SaveCRT2Info(unsigned short ModeNo, - struct vb_device_info *pVBInfo) -{ - unsigned short temp1, temp2; - - /* reserve CR34 for CRT1 Mode No */ - xgifb_reg_set(pVBInfo->P3d4, 0x34, ModeNo); - temp1 = (pVBInfo->VBInfo & SetInSlaveMode) >> 8; - temp2 = ~(SetInSlaveMode >> 8); - xgifb_reg_and_or(pVBInfo->P3d4, 0x31, temp2, temp1); -} - -static void XGI_GetCRT2ResInfo(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short xres, yres, modeflag, resindex; - - resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - xres = XGI330_ModeResInfo[resindex].HTotal; /* xres->ax */ - yres = XGI330_ModeResInfo[resindex].VTotal; /* yres->bx */ - /* si+St_ModeFlag */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - if (modeflag & HalfDCLK) - xres *= 2; - - if (modeflag & DoubleScanMode) - yres *= 2; - - if (!(pVBInfo->VBInfo & SetCRT2ToLCD)) - goto exit; - - if (pVBInfo->LCDResInfo == Panel_1600x1200) { - if (!(pVBInfo->LCDInfo & XGI_LCDVESATiming)) { - if (yres == 1024) - yres = 1056; - } - } - - if (pVBInfo->LCDResInfo == Panel_1280x1024) { - if (yres == 400) - yres = 405; - else if (yres == 350) - yres = 360; - - if (pVBInfo->LCDInfo & XGI_LCDVESATiming) { - if (yres == 360) - yres = 375; - } - } - - if (pVBInfo->LCDResInfo == Panel_1024x768) { - if (!(pVBInfo->LCDInfo & XGI_LCDVESATiming)) { - if (!(pVBInfo->LCDInfo & LCDNonExpanding)) { - if (yres == 350) - yres = 357; - else if (yres == 400) - yres = 420; - else if (yres == 480) - yres = 525; - } - } - } - - if (xres == 720) - xres = 640; - -exit: - pVBInfo->VGAHDE = xres; - pVBInfo->HDE = xres; - pVBInfo->VGAVDE = yres; - pVBInfo->VDE = yres; -} - -static unsigned char XGI_IsLCDDualLink(struct vb_device_info *pVBInfo) -{ - if ((pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) && - (pVBInfo->LCDInfo & SetLCDDualLink)) /* shampoo0129 */ - return 1; - - return 0; -} - -static void XGI_GetRAMDAC2DATA(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short tempax, tempbx, temp1, temp2, modeflag = 0, tempcx, - CRT1Index; - - pVBInfo->RVBHCMAX = 1; - pVBInfo->RVBHCFACT = 1; - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - CRT1Index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; - CRT1Index &= IndexMask; - temp1 = (unsigned short)XGI_CRT1Table[CRT1Index].CR[0]; - temp2 = (unsigned short)XGI_CRT1Table[CRT1Index].CR[5]; - tempax = (temp1 & 0xFF) | ((temp2 & 0x03) << 8); - tempbx = (unsigned short)XGI_CRT1Table[CRT1Index].CR[8]; - tempcx = (unsigned short)XGI_CRT1Table[CRT1Index].CR[14] << 8; - tempcx &= 0x0100; - tempcx <<= 2; - tempbx |= tempcx; - temp1 = (unsigned short)XGI_CRT1Table[CRT1Index].CR[9]; - - if (temp1 & 0x01) - tempbx |= 0x0100; - - if (temp1 & 0x20) - tempbx |= 0x0200; - tempax += 5; - - if (modeflag & Charx8Dot) - tempax *= 8; - else - tempax *= 9; - - pVBInfo->VGAHT = tempax; - pVBInfo->HT = tempax; - tempbx++; - pVBInfo->VGAVT = tempbx; - pVBInfo->VT = tempbx; -} - -static void XGI_GetCRT2Data(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short tempax = 0, tempbx = 0, modeflag, resinfo; - - struct SiS_LCDData const *LCDPtr = NULL; - - /* si+Ext_ResInfo */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - pVBInfo->NewFlickerMode = 0; - pVBInfo->RVBHRS = 50; - - if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) { - XGI_GetRAMDAC2DATA(ModeIdIndex, RefreshRateTableIndex, pVBInfo); - return; - } - - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - LCDPtr = XGI_GetLcdPtr(XGI_LCDDataTable, ModeIdIndex, - pVBInfo); - - pVBInfo->RVBHCMAX = LCDPtr->RVBHCMAX; - pVBInfo->RVBHCFACT = LCDPtr->RVBHCFACT; - pVBInfo->VGAHT = LCDPtr->VGAHT; - pVBInfo->VGAVT = LCDPtr->VGAVT; - pVBInfo->HT = LCDPtr->LCDHT; - pVBInfo->VT = LCDPtr->LCDVT; - - if (pVBInfo->LCDResInfo == Panel_1024x768) { - tempax = 1024; - tempbx = 768; - - if (!(pVBInfo->LCDInfo & XGI_LCDVESATiming)) { - if (pVBInfo->VGAVDE == 357) - tempbx = 527; - else if (pVBInfo->VGAVDE == 420) - tempbx = 620; - else if (pVBInfo->VGAVDE == 525) - tempbx = 775; - else if (pVBInfo->VGAVDE == 600) - tempbx = 775; - } - } else if (pVBInfo->LCDResInfo == Panel_1024x768x75) { - tempax = 1024; - tempbx = 768; - } else if (pVBInfo->LCDResInfo == Panel_1280x1024) { - tempax = 1280; - if (pVBInfo->VGAVDE == 360) - tempbx = 768; - else if (pVBInfo->VGAVDE == 375) - tempbx = 800; - else if (pVBInfo->VGAVDE == 405) - tempbx = 864; - else - tempbx = 1024; - } else if (pVBInfo->LCDResInfo == Panel_1280x1024x75) { - tempax = 1280; - tempbx = 1024; - } else if (pVBInfo->LCDResInfo == Panel_1280x960) { - tempax = 1280; - if (pVBInfo->VGAVDE == 350) - tempbx = 700; - else if (pVBInfo->VGAVDE == 400) - tempbx = 800; - else if (pVBInfo->VGAVDE == 1024) - tempbx = 960; - else - tempbx = 960; - } else if (pVBInfo->LCDResInfo == Panel_1400x1050) { - tempax = 1400; - tempbx = 1050; - - if (pVBInfo->VGAVDE == 1024) { - tempax = 1280; - tempbx = 1024; - } - } else if (pVBInfo->LCDResInfo == Panel_1600x1200) { - tempax = 1600; - tempbx = 1200; /* alan 10/14/2003 */ - if (!(pVBInfo->LCDInfo & XGI_LCDVESATiming)) { - if (pVBInfo->VGAVDE == 350) - tempbx = 875; - else if (pVBInfo->VGAVDE == 400) - tempbx = 1000; - } - } - - if (pVBInfo->LCDInfo & LCDNonExpanding) { - tempax = pVBInfo->VGAHDE; - tempbx = pVBInfo->VGAVDE; - } - - pVBInfo->HDE = tempax; - pVBInfo->VDE = tempbx; - return; - } - - if (pVBInfo->VBInfo & (SetCRT2ToTV)) { - struct SiS_TVData const *TVPtr; - - TVPtr = XGI_GetTVPtr(ModeIdIndex, RefreshRateTableIndex, - pVBInfo); - - pVBInfo->RVBHCMAX = TVPtr->RVBHCMAX; - pVBInfo->RVBHCFACT = TVPtr->RVBHCFACT; - pVBInfo->VGAHT = TVPtr->VGAHT; - pVBInfo->VGAVT = TVPtr->VGAVT; - pVBInfo->HDE = TVPtr->TVHDE; - pVBInfo->VDE = TVPtr->TVVDE; - pVBInfo->RVBHRS = TVPtr->RVBHRS; - pVBInfo->NewFlickerMode = TVPtr->FlickerMode; - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - if (resinfo == 0x08) - pVBInfo->NewFlickerMode = 0x40; - else if (resinfo == 0x09) - pVBInfo->NewFlickerMode = 0x40; - else if (resinfo == 0x12) - pVBInfo->NewFlickerMode = 0x40; - - if (pVBInfo->VGAVDE == 350) - pVBInfo->TVInfo |= TVSimuMode; - - tempax = ExtHiTVHT; - tempbx = ExtHiTVVT; - - if (pVBInfo->VBInfo & SetInSlaveMode) { - if (pVBInfo->TVInfo & TVSimuMode) { - tempax = StHiTVHT; - tempbx = StHiTVVT; - - if (!(modeflag & Charx8Dot)) { - tempax = StHiTextTVHT; - tempbx = StHiTextTVVT; - } - } - } - } else if (pVBInfo->VBInfo & SetCRT2ToYPbPr525750) { - if (pVBInfo->TVInfo & TVSetYPbPr750p) { - tempax = YPbPrTV750pHT; /* Ext750pTVHT */ - tempbx = YPbPrTV750pVT; /* Ext750pTVVT */ - } - - if (pVBInfo->TVInfo & TVSetYPbPr525p) { - tempax = YPbPrTV525pHT; /* Ext525pTVHT */ - tempbx = YPbPrTV525pVT; /* Ext525pTVVT */ - } else if (pVBInfo->TVInfo & TVSetYPbPr525i) { - tempax = YPbPrTV525iHT; /* Ext525iTVHT */ - tempbx = YPbPrTV525iVT; /* Ext525iTVVT */ - if (pVBInfo->TVInfo & NTSC1024x768) - tempax = NTSC1024x768HT; - } - } else { - tempax = PALHT; - tempbx = PALVT; - if (!(pVBInfo->TVInfo & TVSetPAL)) { - tempax = NTSCHT; - tempbx = NTSCVT; - if (pVBInfo->TVInfo & NTSC1024x768) - tempax = NTSC1024x768HT; - } - } - - pVBInfo->HT = tempax; - pVBInfo->VT = tempbx; - } -} - -static void XGI_SetCRT2VCLK(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned char di_0, di_1, tempal; - - tempal = XGI_GetVCLKPtr(RefreshRateTableIndex, ModeIdIndex, pVBInfo); - XGI_GetVCLKLen(tempal, &di_0, &di_1, pVBInfo); - XGI_GetLCDVCLKPtr(&di_0, &di_1, pVBInfo); - - if (pVBInfo->VBType & VB_SIS301) { /* shampoo 0129 */ - /* 301 */ - xgifb_reg_set(pVBInfo->Part4Port, 0x0A, 0x10); - xgifb_reg_set(pVBInfo->Part4Port, 0x0B, di_1); - xgifb_reg_set(pVBInfo->Part4Port, 0x0A, di_0); - } else { /* 301b/302b/301lv/302lv */ - xgifb_reg_set(pVBInfo->Part4Port, 0x0A, di_0); - xgifb_reg_set(pVBInfo->Part4Port, 0x0B, di_1); - } - - xgifb_reg_set(pVBInfo->Part4Port, 0x00, 0x12); - - if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) - xgifb_reg_or(pVBInfo->Part4Port, 0x12, 0x28); - else - xgifb_reg_or(pVBInfo->Part4Port, 0x12, 0x08); -} - -static unsigned short XGI_GetColorDepth(unsigned short ModeIdIndex) -{ - unsigned short ColorDepth[6] = { 1, 2, 4, 4, 6, 8 }; - short index; - unsigned short modeflag; - - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - index = (modeflag & ModeTypeMask) - ModeEGA; - - if (index < 0) - index = 0; - - return ColorDepth[index]; -} - -static unsigned short XGI_GetOffset(unsigned short ModeNo, - unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex) -{ - unsigned short temp, colordepth, modeinfo, index, infoflag, - ColorDepth[] = { 0x01, 0x02, 0x04 }; - - modeinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeInfo; - infoflag = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; - - index = (modeinfo >> 8) & 0xFF; - - temp = XGI330_ScreenOffset[index]; - - if (infoflag & InterlaceMode) - temp <<= 1; - - colordepth = XGI_GetColorDepth(ModeIdIndex); - - if ((ModeNo >= 0x7C) && (ModeNo <= 0x7E)) { - temp = ModeNo - 0x7C; - colordepth = ColorDepth[temp]; - temp = 0x6B; - if (infoflag & InterlaceMode) - temp <<= 1; - } - return temp * colordepth; -} - -static void XGI_SetCRT2Offset(unsigned short ModeNo, - unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short offset; - unsigned char temp; - - if (pVBInfo->VBInfo & SetInSlaveMode) - return; - - offset = XGI_GetOffset(ModeNo, ModeIdIndex, RefreshRateTableIndex); - temp = (unsigned char)(offset & 0xFF); - xgifb_reg_set(pVBInfo->Part1Port, 0x07, temp); - temp = (unsigned char)((offset & 0xFF00) >> 8); - xgifb_reg_set(pVBInfo->Part1Port, 0x09, temp); - temp = (unsigned char)(((offset >> 3) & 0xFF) + 1); - xgifb_reg_set(pVBInfo->Part1Port, 0x03, temp); -} - -static void XGI_SetCRT2FIFO(struct vb_device_info *pVBInfo) -{ - /* threshold high ,disable auto threshold */ - xgifb_reg_set(pVBInfo->Part1Port, 0x01, 0x3B); - /* threshold low default 04h */ - xgifb_reg_and_or(pVBInfo->Part1Port, 0x02, ~(0x3F), 0x04); -} - -static void XGI_PreSetGroup1(unsigned short ModeNo, unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - u8 tempcx; - - XGI_SetCRT2Offset(ModeNo, ModeIdIndex, RefreshRateTableIndex, pVBInfo); - XGI_SetCRT2FIFO(pVBInfo); - - for (tempcx = 4; tempcx < 7; tempcx++) - xgifb_reg_set(pVBInfo->Part1Port, tempcx, 0x0); - - xgifb_reg_set(pVBInfo->Part1Port, 0x50, 0x00); - xgifb_reg_set(pVBInfo->Part1Port, 0x02, 0x44); /* temp 0206 */ -} - -static void XGI_SetGroup1(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short temp = 0, tempax = 0, tempbx = 0, tempcx = 0, - pushbx = 0, CRT1Index, modeflag; - - CRT1Index = XGI330_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; - CRT1Index &= IndexMask; - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - /* bainy change table name */ - if (modeflag & HalfDCLK) { - /* BTVGA2HT 0x08,0x09 */ - temp = (pVBInfo->VGAHT / 2 - 1) & 0x0FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x08, temp); - temp = (((pVBInfo->VGAHT / 2 - 1) & 0xFF00) >> 8) << 4; - xgifb_reg_and_or(pVBInfo->Part1Port, 0x09, ~0x0F0, temp); - /* BTVGA2HDEE 0x0A,0x0C */ - temp = (pVBInfo->VGAHDE / 2 + 16) & 0x0FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp); - tempcx = ((pVBInfo->VGAHT - pVBInfo->VGAHDE) / 2) >> 2; - pushbx = pVBInfo->VGAHDE / 2 + 16; - tempcx >>= 1; - tempbx = pushbx + tempcx; /* bx BTVGA@HRS 0x0B,0x0C */ - tempcx += tempbx; - - if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) { - tempbx = XGI_CRT1Table[CRT1Index].CR[4]; - tempbx |= ((XGI_CRT1Table[CRT1Index].CR[14] & - 0xC0) << 2); - tempbx = (tempbx - 3) << 3; /* (VGAHRS-3)*8 */ - tempcx = XGI_CRT1Table[CRT1Index].CR[5]; - tempcx &= 0x1F; - temp = XGI_CRT1Table[CRT1Index].CR[15]; - temp = (temp & 0x04) << (5 - 2); /* VGAHRE D[5] */ - tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */ - } - - tempbx += 4; - tempcx += 4; - - if (tempcx > (pVBInfo->VGAHT / 2)) - tempcx = pVBInfo->VGAHT / 2; - - temp = tempbx & 0x00FF; - - xgifb_reg_set(pVBInfo->Part1Port, 0x0B, temp); - } else { - temp = (pVBInfo->VGAHT - 1) & 0x0FF; /* BTVGA2HT 0x08,0x09 */ - xgifb_reg_set(pVBInfo->Part1Port, 0x08, temp); - temp = (((pVBInfo->VGAHT - 1) & 0xFF00) >> 8) << 4; - xgifb_reg_and_or(pVBInfo->Part1Port, 0x09, ~0x0F0, temp); - /* BTVGA2HDEE 0x0A,0x0C */ - temp = (pVBInfo->VGAHDE + 16) & 0x0FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp); - tempcx = (pVBInfo->VGAHT - pVBInfo->VGAHDE) >> 2; /* cx */ - pushbx = pVBInfo->VGAHDE + 16; - tempcx >>= 1; - tempbx = pushbx + tempcx; /* bx BTVGA@HRS 0x0B,0x0C */ - tempcx += tempbx; - - if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) { - tempbx = XGI_CRT1Table[CRT1Index].CR[3]; - tempbx |= ((XGI_CRT1Table[CRT1Index].CR[5] & - 0xC0) << 2); - tempbx = (tempbx - 3) << 3; /* (VGAHRS-3)*8 */ - tempcx = XGI_CRT1Table[CRT1Index].CR[4]; - tempcx &= 0x1F; - temp = XGI_CRT1Table[CRT1Index].CR[6]; - temp = (temp & 0x04) << (5 - 2); /* VGAHRE D[5] */ - tempcx = ((tempcx | temp) - 3) << 3; /* (VGAHRE-3)*8 */ - tempbx += 16; - tempcx += 16; - } - - if (tempcx > pVBInfo->VGAHT) - tempcx = pVBInfo->VGAHT; - - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x0B, temp); - } - - tempax = (tempax & 0x00FF) | (tempbx & 0xFF00); - tempbx = pushbx; - tempbx = (tempbx & 0x00FF) | ((tempbx & 0xFF00) << 4); - tempax |= (tempbx & 0xFF00); - temp = (tempax & 0xFF00) >> 8; - xgifb_reg_set(pVBInfo->Part1Port, 0x0C, temp); - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x0D, temp); - tempcx = pVBInfo->VGAVT - 1; - temp = tempcx & 0x00FF; - - xgifb_reg_set(pVBInfo->Part1Port, 0x0E, temp); - tempbx = pVBInfo->VGAVDE - 1; - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x0F, temp); - temp = ((tempbx & 0xFF00) << 3) >> 8; - temp |= ((tempcx & 0xFF00) >> 8); - xgifb_reg_set(pVBInfo->Part1Port, 0x12, temp); - - /* BTVGA2VRS 0x10,0x11 */ - tempbx = (pVBInfo->VGAVT + pVBInfo->VGAVDE) >> 1; - /* BTVGA2VRE 0x11 */ - tempcx = ((pVBInfo->VGAVT - pVBInfo->VGAVDE) >> 4) + tempbx + 1; - - if (pVBInfo->VBInfo & SetCRT2ToRAMDAC) { - tempbx = XGI_CRT1Table[CRT1Index].CR[10]; - temp = XGI_CRT1Table[CRT1Index].CR[9]; - - if (temp & 0x04) - tempbx |= 0x0100; - - if (temp & 0x080) - tempbx |= 0x0200; - - temp = XGI_CRT1Table[CRT1Index].CR[14]; - - if (temp & 0x08) - tempbx |= 0x0400; - - temp = XGI_CRT1Table[CRT1Index].CR[11]; - tempcx = (tempcx & 0xFF00) | (temp & 0x00FF); - } - - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x10, temp); - temp = ((tempbx & 0xFF00) >> 8) << 4; - temp = (tempcx & 0x000F) | (temp); - xgifb_reg_set(pVBInfo->Part1Port, 0x11, temp); - tempax = 0; - - if (modeflag & DoubleScanMode) - tempax |= 0x80; - - if (modeflag & HalfDCLK) - tempax |= 0x40; - - xgifb_reg_and_or(pVBInfo->Part1Port, 0x2C, ~0x0C0, tempax); -} - -static unsigned short XGI_GetVGAHT2(struct vb_device_info *pVBInfo) -{ - unsigned long tempax, tempbx; - - tempbx = ((pVBInfo->VGAVT - pVBInfo->VGAVDE) * pVBInfo->RVBHCMAX) - & 0xFFFF; - tempax = (pVBInfo->VT - pVBInfo->VDE) * pVBInfo->RVBHCFACT; - tempax = (tempax * pVBInfo->HT) / tempbx; - - return (unsigned short)tempax; -} - -static void XGI_SetLockRegs(unsigned short ModeNo, unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short push1, push2, tempax, tempbx = 0, tempcx, temp, resinfo, - modeflag; - - /* si+Ext_ResInfo */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - resinfo = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - - if (!(pVBInfo->VBInfo & SetInSlaveMode)) - return; - - temp = 0xFF; /* set MAX HT */ - xgifb_reg_set(pVBInfo->Part1Port, 0x03, temp); - tempcx = 0x08; - - if (pVBInfo->VBType & (VB_SIS301LV | VB_SIS302LV | VB_XGI301C)) - modeflag |= Charx8Dot; - - tempax = pVBInfo->VGAHDE; /* 0x04 Horizontal Display End */ - - if (modeflag & HalfDCLK) - tempax >>= 1; - - tempax = (tempax / tempcx) - 1; - tempbx |= ((tempax & 0x00FF) << 8); - temp = tempax & 0x00FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x04, temp); - - temp = (tempbx & 0xFF00) >> 8; - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - if (!(pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C))) - temp += 2; - - if ((pVBInfo->VBInfo & SetCRT2ToHiVision) && - !(pVBInfo->VBType & VB_SIS301LV) && (resinfo == 7)) - temp -= 2; - } - - /* 0x05 Horizontal Display Start */ - xgifb_reg_set(pVBInfo->Part1Port, 0x05, temp); - /* 0x06 Horizontal Blank end */ - xgifb_reg_set(pVBInfo->Part1Port, 0x06, 0x03); - - if (!(pVBInfo->VBInfo & DisableCRT2Display)) { /* 030226 bainy */ - if (pVBInfo->VBInfo & SetCRT2ToTV) - tempax = pVBInfo->VGAHT; - else - tempax = XGI_GetVGAHT2(pVBInfo); - } - - if (tempax >= pVBInfo->VGAHT) - tempax = pVBInfo->VGAHT; - - if (modeflag & HalfDCLK) - tempax >>= 1; - - tempax = (tempax / tempcx) - 5; - tempcx = tempax; /* 20030401 0x07 horizontal Retrace Start */ - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - temp = (tempbx & 0x00FF) - 1; - if (!(modeflag & HalfDCLK)) { - temp -= 6; - if (pVBInfo->TVInfo & TVSimuMode) { - temp -= 4; - temp -= 10; - } - } - } else { - tempbx = (tempbx & 0xFF00) >> 8; - tempcx = (tempcx + tempbx) >> 1; - temp = (tempcx & 0x00FF) + 2; - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - temp -= 1; - if (!(modeflag & HalfDCLK)) { - if ((modeflag & Charx8Dot)) { - temp += 4; - if (pVBInfo->VGAHDE >= 800) - temp -= 6; - } - } - } else if (!(modeflag & HalfDCLK)) { - temp -= 4; - if (pVBInfo->LCDResInfo != Panel_1280x960 && - pVBInfo->VGAHDE >= 800) { - temp -= 7; - if (pVBInfo->VGAHDE >= 1280 && - pVBInfo->LCDResInfo != Panel_1280x960 && - (pVBInfo->LCDInfo & LCDNonExpanding)) - temp += 28; - } - } - } - - /* 0x07 Horizontal Retrace Start */ - xgifb_reg_set(pVBInfo->Part1Port, 0x07, temp); - /* 0x08 Horizontal Retrace End */ - xgifb_reg_set(pVBInfo->Part1Port, 0x08, 0); - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - if (pVBInfo->TVInfo & TVSimuMode) { - if (ModeNo == 0x50) { - if (pVBInfo->TVInfo == SetNTSCTV) { - xgifb_reg_set(pVBInfo->Part1Port, - 0x07, 0x30); - xgifb_reg_set(pVBInfo->Part1Port, - 0x08, 0x03); - } else { - xgifb_reg_set(pVBInfo->Part1Port, - 0x07, 0x2f); - xgifb_reg_set(pVBInfo->Part1Port, - 0x08, 0x02); - } - } - } - } - - xgifb_reg_set(pVBInfo->Part1Port, 0x18, 0x03); /* 0x18 SR0B */ - xgifb_reg_and_or(pVBInfo->Part1Port, 0x19, 0xF0, 0x00); - xgifb_reg_set(pVBInfo->Part1Port, 0x09, 0xFF); /* 0x09 Set Max VT */ - - tempbx = pVBInfo->VGAVT; - push1 = tempbx; - tempcx = 0x121; - tempbx = pVBInfo->VGAVDE; /* 0x0E Vertical Display End */ - - if (tempbx == 357) - tempbx = 350; - if (tempbx == 360) - tempbx = 350; - if (tempbx == 375) - tempbx = 350; - if (tempbx == 405) - tempbx = 400; - if (tempbx == 525) - tempbx = 480; - - push2 = tempbx; - - if (pVBInfo->VBInfo & SetCRT2ToLCD) { - if (pVBInfo->LCDResInfo == Panel_1024x768) { - if (!(pVBInfo->LCDInfo & XGI_LCDVESATiming)) { - if (tempbx == 350) - tempbx += 5; - if (tempbx == 480) - tempbx += 5; - } - } - } - tempbx--; - tempbx--; - temp = tempbx & 0x00FF; - /* 0x10 vertical Blank Start */ - xgifb_reg_set(pVBInfo->Part1Port, 0x10, temp); - tempbx = push2; - tempbx--; - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x0E, temp); - - if (tempbx & 0x0100) - tempcx |= 0x0002; - - tempax = 0x000B; - - if (modeflag & DoubleScanMode) - tempax |= 0x08000; - - if (tempbx & 0x0200) - tempcx |= 0x0040; - - temp = (tempax & 0xFF00) >> 8; - xgifb_reg_set(pVBInfo->Part1Port, 0x0B, temp); - - if (tempbx & 0x0400) - tempcx |= 0x0600; - - /* 0x11 Vertical Blank End */ - xgifb_reg_set(pVBInfo->Part1Port, 0x11, 0x00); - - tempax = push1; - tempax -= tempbx; /* 0x0C Vertical Retrace Start */ - tempax >>= 2; - push1 = tempax; /* push ax */ - - if (resinfo != 0x09) { - tempax <<= 1; - tempbx += tempax; - } - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - if ((pVBInfo->VBType & VB_SIS301LV) && - !(pVBInfo->TVInfo & TVSetHiVision)) { - if ((pVBInfo->TVInfo & TVSimuMode) && - (pVBInfo->TVInfo & TVSetPAL)) { - if (!(pVBInfo->VBType & VB_SIS301LV) || - !(pVBInfo->TVInfo & - (TVSetYPbPr525p | - TVSetYPbPr750p | - TVSetHiVision))) - tempbx += 40; - } - } else { - tempbx -= 10; - } - } else if (pVBInfo->TVInfo & TVSimuMode) { - if (pVBInfo->TVInfo & TVSetPAL) { - if (pVBInfo->VBType & VB_SIS301LV) { - if (!(pVBInfo->TVInfo & - (TVSetYPbPr525p | - TVSetYPbPr750p | - TVSetHiVision))) - tempbx += 40; - } else { - tempbx += 40; - } - } - } - tempax = push1; - tempax >>= 2; - tempax++; - tempax += tempbx; - push1 = tempax; /* push ax */ - - if ((pVBInfo->TVInfo & TVSetPAL)) { - if (tempbx <= 513) { - if (tempax >= 513) - tempbx = 513; - } - } - - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x0C, temp); - tempbx--; - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x10, temp); - - if (tempbx & 0x0100) - tempcx |= 0x0008; - - if (tempbx & 0x0200) - xgifb_reg_and_or(pVBInfo->Part1Port, 0x0B, 0x0FF, 0x20); - - tempbx++; - - if (tempbx & 0x0100) - tempcx |= 0x0004; - - if (tempbx & 0x0200) - tempcx |= 0x0080; - - if (tempbx & 0x0400) - tempcx |= 0x0C00; - - tempbx = push1; /* pop ax */ - temp = tempbx & 0x00FF; - temp &= 0x0F; - /* 0x0D vertical Retrace End */ - xgifb_reg_set(pVBInfo->Part1Port, 0x0D, temp); - - if (tempbx & 0x0010) - tempcx |= 0x2000; - - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp); /* 0x0A CR07 */ - temp = (tempcx & 0x0FF00) >> 8; - xgifb_reg_set(pVBInfo->Part1Port, 0x17, temp); /* 0x17 SR0A */ - tempax = modeflag; - temp = (tempax & 0xFF00) >> 8; - - temp = (temp >> 1) & 0x09; - - if (pVBInfo->VBType & (VB_SIS301LV | VB_SIS302LV | VB_XGI301C)) - temp |= 0x01; - - xgifb_reg_set(pVBInfo->Part1Port, 0x16, temp); /* 0x16 SR01 */ - xgifb_reg_set(pVBInfo->Part1Port, 0x0F, 0); /* 0x0F CR14 */ - xgifb_reg_set(pVBInfo->Part1Port, 0x12, 0); /* 0x12 CR17 */ - - if (pVBInfo->LCDInfo & LCDRGB18Bit) - temp = 0x80; - else - temp = 0x00; - - xgifb_reg_set(pVBInfo->Part1Port, 0x1A, temp); /* 0x1A SR0E */ -} - -static void XGI_SetGroup2(unsigned short ModeNo, unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short i, j, tempax, tempbx, tempcx, temp, push1, push2, - modeflag; - unsigned char const *TimingPoint; - - unsigned long longtemp, tempeax, tempebx, temp2, tempecx; - - /* si+Ext_ResInfo */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - tempax = 0; - - if (!(pVBInfo->VBInfo & SetCRT2ToAVIDEO)) - tempax |= 0x0800; - - if (!(pVBInfo->VBInfo & SetCRT2ToSVIDEO)) - tempax |= 0x0400; - - if (pVBInfo->VBInfo & SetCRT2ToSCART) - tempax |= 0x0200; - - if (!(pVBInfo->TVInfo & TVSetPAL)) - tempax |= 0x1000; - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) - tempax |= 0x0100; - - if (pVBInfo->TVInfo & (TVSetYPbPr525p | TVSetYPbPr750p)) - tempax &= 0xfe00; - - tempax = (tempax & 0xff00) >> 8; - - xgifb_reg_set(pVBInfo->Part2Port, 0x0, tempax); - TimingPoint = XGI330_NTSCTiming; - - if (pVBInfo->TVInfo & TVSetPAL) - TimingPoint = XGI330_PALTiming; - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - TimingPoint = XGI330_HiTVExtTiming; - - if (pVBInfo->VBInfo & SetInSlaveMode) - TimingPoint = XGI330_HiTVSt2Timing; - - if (pVBInfo->SetFlag & TVSimuMode) - TimingPoint = XGI330_HiTVSt1Timing; - - if (!(modeflag & Charx8Dot)) - TimingPoint = XGI330_HiTVTextTiming; - } - - if (pVBInfo->VBInfo & SetCRT2ToYPbPr525750) { - if (pVBInfo->TVInfo & TVSetYPbPr525i) - TimingPoint = XGI330_YPbPr525iTiming; - - if (pVBInfo->TVInfo & TVSetYPbPr525p) - TimingPoint = XGI330_YPbPr525pTiming; - - if (pVBInfo->TVInfo & TVSetYPbPr750p) - TimingPoint = XGI330_YPbPr750pTiming; - } - - for (i = 0x01, j = 0; i <= 0x2D; i++, j++) - xgifb_reg_set(pVBInfo->Part2Port, i, TimingPoint[j]); - - for (i = 0x39; i <= 0x45; i++, j++) - /* di->temp2[j] */ - xgifb_reg_set(pVBInfo->Part2Port, i, TimingPoint[j]); - - if (pVBInfo->VBInfo & SetCRT2ToTV) - xgifb_reg_and_or(pVBInfo->Part2Port, 0x3A, 0x1F, 0x00); - - temp = pVBInfo->NewFlickerMode; - temp &= 0x80; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x0A, 0xFF, temp); - - if (pVBInfo->TVInfo & TVSetPAL) - tempax = 520; - else - tempax = 440; - - if (pVBInfo->VDE <= tempax) { - tempax -= pVBInfo->VDE; - tempax >>= 2; - tempax = (tempax & 0x00FF) | ((tempax & 0x00FF) << 8); - push1 = tempax; - temp = (tempax & 0xFF00) >> 8; - temp += (unsigned short)TimingPoint[0]; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - if (pVBInfo->VBInfo & (SetCRT2ToAVIDEO - | SetCRT2ToSVIDEO | SetCRT2ToSCART - | SetCRT2ToYPbPr525750)) { - tempcx = pVBInfo->VGAHDE; - if (tempcx >= 1024) { - temp = 0x17; /* NTSC */ - if (pVBInfo->TVInfo & TVSetPAL) - temp = 0x19; /* PAL */ - } - } - } - - xgifb_reg_set(pVBInfo->Part2Port, 0x01, temp); - tempax = push1; - temp = (tempax & 0xFF00) >> 8; - temp += TimingPoint[1]; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - if ((pVBInfo->VBInfo & (SetCRT2ToAVIDEO - | SetCRT2ToSVIDEO | SetCRT2ToSCART - | SetCRT2ToYPbPr525750))) { - tempcx = pVBInfo->VGAHDE; - if (tempcx >= 1024) { - temp = 0x1D; /* NTSC */ - if (pVBInfo->TVInfo & TVSetPAL) - temp = 0x52; /* PAL */ - } - } - } - xgifb_reg_set(pVBInfo->Part2Port, 0x02, temp); - } - - /* 301b */ - tempcx = pVBInfo->HT; - - if (XGI_IsLCDDualLink(pVBInfo)) - tempcx >>= 1; - - tempcx -= 2; - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x1B, temp); - - temp = (tempcx & 0xFF00) >> 8; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x1D, ~0x0F, temp); - - tempcx = pVBInfo->HT >> 1; - push1 = tempcx; /* push cx */ - tempcx += 7; - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) - tempcx -= 4; - - temp = tempcx & 0x00FF; - temp <<= 4; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x22, 0x0F, temp); - - tempbx = TimingPoint[j] | ((TimingPoint[j + 1]) << 8); - tempbx += tempcx; - push2 = tempbx; - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x24, temp); - temp = (tempbx & 0xFF00) >> 8; - temp <<= 4; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x25, 0x0F, temp); - - tempbx = push2; - tempbx = tempbx + 8; - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - tempbx = tempbx - 4; - tempcx = tempbx; - } - - temp = (tempbx & 0x00FF) << 4; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x29, 0x0F, temp); - - j += 2; - tempcx += (TimingPoint[j] | ((TimingPoint[j + 1]) << 8)); - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x27, temp); - temp = ((tempcx & 0xFF00) >> 8) << 4; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x28, 0x0F, temp); - - tempcx += 8; - if (pVBInfo->VBInfo & SetCRT2ToHiVision) - tempcx -= 4; - - temp = tempcx & 0xFF; - temp <<= 4; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x2A, 0x0F, temp); - - tempcx = push1; /* pop cx */ - j += 2; - temp = TimingPoint[j] | ((TimingPoint[j + 1]) << 8); - tempcx -= temp; - temp = tempcx & 0x00FF; - temp <<= 4; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x2D, 0x0F, temp); - - tempcx -= 11; - - if (!(pVBInfo->VBInfo & SetCRT2ToTV)) { - tempax = XGI_GetVGAHT2(pVBInfo); - tempcx = tempax - 1; - } - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x2E, temp); - - tempbx = pVBInfo->VDE; - - if (pVBInfo->VGAVDE == 360) - tempbx = 746; - if (pVBInfo->VGAVDE == 375) - tempbx = 746; - if (pVBInfo->VGAVDE == 405) - tempbx = 853; - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - if (pVBInfo->VBType & - (VB_SIS301LV | VB_SIS302LV | VB_XGI301C)) { - if (!(pVBInfo->TVInfo & - (TVSetYPbPr525p | TVSetYPbPr750p))) - tempbx >>= 1; - } else { - tempbx >>= 1; - } - } - - tempbx -= 2; - temp = tempbx & 0x00FF; - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - if (pVBInfo->VBType & VB_SIS301LV) { - if (pVBInfo->TVInfo & TVSetHiVision) { - if (pVBInfo->VBInfo & SetInSlaveMode) { - if (ModeNo == 0x2f) - temp += 1; - } - } - } else if (pVBInfo->VBInfo & SetInSlaveMode) { - if (ModeNo == 0x2f) - temp += 1; - } - } - - xgifb_reg_set(pVBInfo->Part2Port, 0x2F, temp); - - temp = (tempcx & 0xFF00) >> 8; - temp |= ((tempbx & 0xFF00) >> 8) << 6; - - if (!(pVBInfo->VBInfo & SetCRT2ToHiVision)) { - if (pVBInfo->VBType & VB_SIS301LV) { - if (pVBInfo->TVInfo & TVSetHiVision) { - temp |= 0x10; - - if (!(pVBInfo->VBInfo & SetCRT2ToSVIDEO)) - temp |= 0x20; - } - } else { - temp |= 0x10; - if (!(pVBInfo->VBInfo & SetCRT2ToSVIDEO)) - temp |= 0x20; - } - } - - xgifb_reg_set(pVBInfo->Part2Port, 0x30, temp); - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { /* TV gatingno */ - tempbx = pVBInfo->VDE; - tempcx = tempbx - 2; - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - if (!(pVBInfo->TVInfo & (TVSetYPbPr525p - | TVSetYPbPr750p))) - tempbx >>= 1; - } - - if (pVBInfo->VBType & (VB_SIS302LV | VB_XGI301C)) { - temp = 0; - if (tempcx & 0x0400) - temp |= 0x20; - - if (tempbx & 0x0400) - temp |= 0x40; - - xgifb_reg_set(pVBInfo->Part4Port, 0x10, temp); - } - - temp = (((tempbx - 3) & 0x0300) >> 8) << 5; - xgifb_reg_set(pVBInfo->Part2Port, 0x46, temp); - temp = (tempbx - 3) & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x47, temp); - } - - tempbx = tempbx & 0x00FF; - - if (!(modeflag & HalfDCLK)) { - tempcx = pVBInfo->VGAHDE; - if (tempcx >= pVBInfo->HDE) { - tempbx |= 0x2000; - tempax &= 0x00FF; - } - } - - tempcx = 0x0101; - - if (pVBInfo->VBInfo & SetCRT2ToTV) { /* 301b */ - if (pVBInfo->VGAHDE >= 1024) { - tempcx = 0x1920; - if (pVBInfo->VGAHDE >= 1280) { - tempcx = 0x1420; - tempbx = tempbx & 0xDFFF; - } - } - } - - if (!(tempbx & 0x2000)) { - if (modeflag & HalfDCLK) - tempcx = (tempcx & 0xFF00) | ((tempcx & 0x00FF) << 1); - - push1 = tempbx; - tempeax = pVBInfo->VGAHDE; - tempebx = (tempcx & 0xFF00) >> 8; - longtemp = tempeax * tempebx; - tempecx = tempcx & 0x00FF; - longtemp = longtemp / tempecx; - - /* 301b */ - tempecx = 8 * 1024; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - tempecx = tempecx * 8; - } - - longtemp = longtemp * tempecx; - tempecx = pVBInfo->HDE; - temp2 = longtemp % tempecx; - tempeax = longtemp / tempecx; - if (temp2 != 0) - tempeax += 1; - - tempax = (unsigned short)tempeax; - - /* 301b */ - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - tempcx = ((tempax & 0xFF00) >> 5) >> 8; - } - /* end 301b */ - - tempbx = push1; - tempbx = (unsigned short)(((tempeax & 0x0000FF00) & 0x1F00) - | (tempbx & 0x00FF)); - tempax = (unsigned short)(((tempeax & 0x000000FF) << 8) - | (tempax & 0x00FF)); - temp = (tempax & 0xFF00) >> 8; - } else { - temp = (tempax & 0x00FF) >> 8; - } - - xgifb_reg_set(pVBInfo->Part2Port, 0x44, temp); - temp = (tempbx & 0xFF00) >> 8; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x45, ~0x03F, temp); - temp = tempcx & 0x00FF; - - if (tempbx & 0x2000) - temp = 0; - - if (!(pVBInfo->VBInfo & SetCRT2ToLCD)) - temp |= 0x18; - - xgifb_reg_and_or(pVBInfo->Part2Port, 0x46, ~0x1F, temp); - if (pVBInfo->TVInfo & TVSetPAL) { - tempbx = 0x0382; - tempcx = 0x007e; - } else { - tempbx = 0x0369; - tempcx = 0x0061; - } - - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x4b, temp); - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x4c, temp); - - temp = ((tempcx & 0xFF00) >> 8) & 0x03; - temp <<= 2; - temp |= ((tempbx & 0xFF00) >> 8) & 0x03; - - if (pVBInfo->VBInfo & SetCRT2ToYPbPr525750) { - temp |= 0x10; - - if (pVBInfo->TVInfo & TVSetYPbPr525p) - temp |= 0x20; - - if (pVBInfo->TVInfo & TVSetYPbPr750p) - temp |= 0x60; - } - - xgifb_reg_set(pVBInfo->Part2Port, 0x4d, temp); - temp = xgifb_reg_get(pVBInfo->Part2Port, 0x43); /* 301b change */ - xgifb_reg_set(pVBInfo->Part2Port, 0x43, (unsigned short)(temp - 3)); - - if (!(pVBInfo->TVInfo & (TVSetYPbPr525p | TVSetYPbPr750p))) { - if (pVBInfo->TVInfo & NTSC1024x768) { - TimingPoint = XGI_NTSC1024AdjTime; - for (i = 0x1c, j = 0; i <= 0x30; i++, j++) { - xgifb_reg_set(pVBInfo->Part2Port, i, - TimingPoint[j]); - } - xgifb_reg_set(pVBInfo->Part2Port, 0x43, 0x72); - } - } - - /* Modify for 301C PALM Support */ - if (pVBInfo->VBType & VB_XGI301C) { - if (pVBInfo->TVInfo & TVSetPALM) - xgifb_reg_and_or(pVBInfo->Part2Port, 0x4E, ~0x08, - 0x08); /* PALM Mode */ - } - - if (pVBInfo->TVInfo & TVSetPALM) { - tempax = xgifb_reg_get(pVBInfo->Part2Port, 0x01); - tempax--; - xgifb_reg_and(pVBInfo->Part2Port, 0x01, tempax); - - xgifb_reg_and(pVBInfo->Part2Port, 0x00, 0xEF); - } - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) { - if (!(pVBInfo->VBInfo & SetInSlaveMode)) - xgifb_reg_set(pVBInfo->Part2Port, 0x0B, 0x00); - } -} - -static void XGI_SetLCDRegs(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short pushbx, tempax, tempbx, tempcx, temp, tempah, - tempbh, tempch; - - struct XGI_LCDDesStruct const *LCDBDesPtr = NULL; - - /* si+Ext_ResInfo */ - if (!(pVBInfo->VBInfo & SetCRT2ToLCD)) - return; - - tempbx = pVBInfo->HDE; /* RHACTE=HDE-1 */ - - if (XGI_IsLCDDualLink(pVBInfo)) - tempbx >>= 1; - - tempbx -= 1; - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x2C, temp); - temp = (tempbx & 0xFF00) >> 8; - temp <<= 4; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x2B, 0x0F, temp); - temp = 0x01; - - xgifb_reg_set(pVBInfo->Part2Port, 0x0B, temp); - tempbx = pVBInfo->VDE; /* RTVACTEO=(VDE-1)&0xFF */ - tempbx--; - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x03, temp); - temp = ((tempbx & 0xFF00) >> 8) & 0x07; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x0C, ~0x07, temp); - - tempcx = pVBInfo->VT - 1; - temp = tempcx & 0x00FF; /* RVTVT=VT-1 */ - xgifb_reg_set(pVBInfo->Part2Port, 0x19, temp); - temp = (tempcx & 0xFF00) >> 8; - temp <<= 5; - xgifb_reg_set(pVBInfo->Part2Port, 0x1A, temp); - xgifb_reg_and_or(pVBInfo->Part2Port, 0x09, 0xF0, 0x00); - xgifb_reg_and_or(pVBInfo->Part2Port, 0x0A, 0xF0, 0x00); - xgifb_reg_and_or(pVBInfo->Part2Port, 0x17, 0xFB, 0x00); - xgifb_reg_and_or(pVBInfo->Part2Port, 0x18, 0xDF, 0x00); - - /* Customized LCDB Does not add */ - if ((pVBInfo->VBType & VB_SIS301LV) || (pVBInfo->VBType & VB_SIS302LV)) - LCDBDesPtr = XGI_GetLcdPtr(xgifb_lcddldes, ModeIdIndex, - pVBInfo); - else - LCDBDesPtr = XGI_GetLcdPtr(XGI_LCDDesDataTable, ModeIdIndex, - pVBInfo); - - tempah = pVBInfo->LCDResInfo; - tempah &= PanelResInfo; - - if ((tempah == Panel_1024x768) || (tempah == Panel_1024x768x75)) { - tempbx = 1024; - tempcx = 768; - } else if ((tempah == Panel_1280x1024) || - (tempah == Panel_1280x1024x75)) { - tempbx = 1280; - tempcx = 1024; - } else if (tempah == Panel_1400x1050) { - tempbx = 1400; - tempcx = 1050; - } else { - tempbx = 1600; - tempcx = 1200; - } - - if (pVBInfo->LCDInfo & EnableScalingLCD) { - tempbx = pVBInfo->HDE; - tempcx = pVBInfo->VDE; - } - - pushbx = tempbx; - tempax = pVBInfo->VT; - pVBInfo->LCDHDES = LCDBDesPtr->LCDHDES; - pVBInfo->LCDHRS = LCDBDesPtr->LCDHRS; - pVBInfo->LCDVDES = LCDBDesPtr->LCDVDES; - pVBInfo->LCDVRS = LCDBDesPtr->LCDVRS; - tempbx = pVBInfo->LCDVDES; - tempcx += tempbx; - - if (tempcx >= tempax) - tempcx -= tempax; /* lcdvdes */ - - temp = tempbx & 0x00FF; /* RVEQ1EQ=lcdvdes */ - xgifb_reg_set(pVBInfo->Part2Port, 0x05, temp); - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x06, temp); - tempch = ((tempcx & 0xFF00) >> 8) & 0x07; - tempbh = ((tempbx & 0xFF00) >> 8) & 0x07; - tempah = tempch; - tempah <<= 3; - tempah |= tempbh; - xgifb_reg_set(pVBInfo->Part2Port, 0x02, tempah); - - /* getlcdsync() */ - XGI_GetLCDSync(&tempax, &tempbx, pVBInfo); - tempcx = tempbx; - tempax = pVBInfo->VT; - tempbx = pVBInfo->LCDVRS; - - tempcx += tempbx; - if (tempcx >= tempax) - tempcx -= tempax; - - temp = tempbx & 0x00FF; /* RTVACTEE=lcdvrs */ - xgifb_reg_set(pVBInfo->Part2Port, 0x04, temp); - temp = (tempbx & 0xFF00) >> 8; - temp <<= 4; - temp |= (tempcx & 0x000F); - xgifb_reg_set(pVBInfo->Part2Port, 0x01, temp); - tempcx = pushbx; - tempax = pVBInfo->HT; - tempbx = pVBInfo->LCDHDES; - tempbx &= 0x0FFF; - - if (XGI_IsLCDDualLink(pVBInfo)) { - tempax >>= 1; - tempbx >>= 1; - tempcx >>= 1; - } - - if (pVBInfo->VBType & VB_SIS302LV) - tempbx += 1; - - if (pVBInfo->VBType & VB_XGI301C) /* tap4 */ - tempbx += 1; - - tempcx += tempbx; - - if (tempcx >= tempax) - tempcx -= tempax; - - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x1F, temp); /* RHBLKE=lcdhdes */ - temp = ((tempbx & 0xFF00) >> 8) << 4; - xgifb_reg_set(pVBInfo->Part2Port, 0x20, temp); - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part2Port, 0x23, temp); /* RHEQPLE=lcdhdee */ - temp = (tempcx & 0xFF00) >> 8; - xgifb_reg_set(pVBInfo->Part2Port, 0x25, temp); - - XGI_GetLCDSync(&tempax, &tempbx, pVBInfo); - tempcx = tempax; - tempax = pVBInfo->HT; - tempbx = pVBInfo->LCDHRS; - if (XGI_IsLCDDualLink(pVBInfo)) { - tempax >>= 1; - tempbx >>= 1; - tempcx >>= 1; - } - - if (pVBInfo->VBType & VB_SIS302LV) - tempbx += 1; - - tempcx += tempbx; - - if (tempcx >= tempax) - tempcx -= tempax; - - temp = tempbx & 0x00FF; /* RHBURSTS=lcdhrs */ - xgifb_reg_set(pVBInfo->Part2Port, 0x1C, temp); - - temp = (tempbx & 0xFF00) >> 8; - temp <<= 4; - xgifb_reg_and_or(pVBInfo->Part2Port, 0x1D, ~0x0F0, temp); - temp = tempcx & 0x00FF; /* RHSYEXP2S=lcdhre */ - xgifb_reg_set(pVBInfo->Part2Port, 0x21, temp); - - if (!(pVBInfo->LCDInfo & XGI_LCDVESATiming)) { - if (pVBInfo->VGAVDE == 525) { - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B - | VB_SIS301LV | VB_SIS302LV - | VB_XGI301C)) - temp = 0xC6; - else - temp = 0xC4; - - xgifb_reg_set(pVBInfo->Part2Port, 0x2f, temp); - xgifb_reg_set(pVBInfo->Part2Port, 0x30, 0xB3); - } - - if (pVBInfo->VGAVDE == 420) { - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B - | VB_SIS301LV | VB_SIS302LV - | VB_XGI301C)) - temp = 0x4F; - else - temp = 0x4E; - xgifb_reg_set(pVBInfo->Part2Port, 0x2f, temp); - } - } -} - -/* - * Function : XGI_GetTap4Ptr - * Input : - * Output : di -> Tap4 Reg. Setting Pointer - * Description : - */ -static struct XGI301C_Tap4TimingStruct const -*XGI_GetTap4Ptr(unsigned short tempcx, struct vb_device_info *pVBInfo) -{ - unsigned short tempax, tempbx, i; - struct XGI301C_Tap4TimingStruct const *Tap4TimingPtr; - - if (tempcx == 0) { - tempax = pVBInfo->VGAHDE; - tempbx = pVBInfo->HDE; - } else { - tempax = pVBInfo->VGAVDE; - tempbx = pVBInfo->VDE; - } - - if (tempax <= tempbx) - return &xgifb_tap4_timing[0]; - Tap4TimingPtr = xgifb_ntsc_525_tap4_timing; /* NTSC */ - - if (pVBInfo->TVInfo & TVSetPAL) - Tap4TimingPtr = PALTap4Timing; - - if (pVBInfo->VBInfo & SetCRT2ToYPbPr525750) { - if ((pVBInfo->TVInfo & TVSetYPbPr525i) || - (pVBInfo->TVInfo & TVSetYPbPr525p)) - Tap4TimingPtr = xgifb_ntsc_525_tap4_timing; - if (pVBInfo->TVInfo & TVSetYPbPr750p) - Tap4TimingPtr = YPbPr750pTap4Timing; - } - - if (pVBInfo->VBInfo & SetCRT2ToHiVision) - Tap4TimingPtr = xgifb_tap4_timing; - - i = 0; - while (Tap4TimingPtr[i].DE != 0xFFFF) { - if (Tap4TimingPtr[i].DE == tempax) - break; - i++; - } - return &Tap4TimingPtr[i]; -} - -static void XGI_SetTap4Regs(struct vb_device_info *pVBInfo) -{ - unsigned short i, j; - struct XGI301C_Tap4TimingStruct const *Tap4TimingPtr; - - if (!(pVBInfo->VBType & VB_XGI301C)) - return; - - Tap4TimingPtr = XGI_GetTap4Ptr(0, pVBInfo); /* Set Horizontal Scaling */ - for (i = 0x80, j = 0; i <= 0xBF; i++, j++) - xgifb_reg_set(pVBInfo->Part2Port, i, Tap4TimingPtr->Reg[j]); - - if ((pVBInfo->VBInfo & SetCRT2ToTV) && - !(pVBInfo->VBInfo & SetCRT2ToHiVision)) { - /* Set Vertical Scaling */ - Tap4TimingPtr = XGI_GetTap4Ptr(1, pVBInfo); - for (i = 0xC0, j = 0; i < 0xFF; i++, j++) - xgifb_reg_set(pVBInfo->Part2Port, - i, - Tap4TimingPtr->Reg[j]); - } - - if ((pVBInfo->VBInfo & SetCRT2ToTV) && - !(pVBInfo->VBInfo & SetCRT2ToHiVision)) - /* Enable V.Scaling */ - xgifb_reg_and_or(pVBInfo->Part2Port, 0x4E, ~0x14, 0x04); - else - /* Enable H.Scaling */ - xgifb_reg_and_or(pVBInfo->Part2Port, 0x4E, ~0x14, 0x10); -} - -static void XGI_SetGroup3(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short i; - unsigned char const *tempdi; - unsigned short modeflag; - - /* si+Ext_ResInfo */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - xgifb_reg_set(pVBInfo->Part3Port, 0x00, 0x00); - if (pVBInfo->TVInfo & TVSetPAL) { - xgifb_reg_set(pVBInfo->Part3Port, 0x13, 0xFA); - xgifb_reg_set(pVBInfo->Part3Port, 0x14, 0xC8); - } else { - xgifb_reg_set(pVBInfo->Part3Port, 0x13, 0xF5); - xgifb_reg_set(pVBInfo->Part3Port, 0x14, 0xB7); - } - - if (!(pVBInfo->VBInfo & SetCRT2ToTV)) - return; - - if (pVBInfo->TVInfo & TVSetPALM) { - xgifb_reg_set(pVBInfo->Part3Port, 0x13, 0xFA); - xgifb_reg_set(pVBInfo->Part3Port, 0x14, 0xC8); - xgifb_reg_set(pVBInfo->Part3Port, 0x3D, 0xA8); - } - - if ((pVBInfo->VBInfo & SetCRT2ToHiVision) || (pVBInfo->VBInfo - & SetCRT2ToYPbPr525750)) { - if (pVBInfo->TVInfo & TVSetYPbPr525i) - return; - - tempdi = XGI330_HiTVGroup3Data; - if (pVBInfo->SetFlag & TVSimuMode) { - tempdi = XGI330_HiTVGroup3Simu; - if (!(modeflag & Charx8Dot)) - tempdi = XGI330_HiTVGroup3Text; - } - - if (pVBInfo->TVInfo & TVSetYPbPr525p) - tempdi = XGI330_Ren525pGroup3; - - if (pVBInfo->TVInfo & TVSetYPbPr750p) - tempdi = XGI330_Ren750pGroup3; - - for (i = 0; i <= 0x3E; i++) - xgifb_reg_set(pVBInfo->Part3Port, i, tempdi[i]); - - if (pVBInfo->VBType & VB_XGI301C) { /* Marcovision */ - if (pVBInfo->TVInfo & TVSetYPbPr525p) - xgifb_reg_set(pVBInfo->Part3Port, 0x28, 0x3f); - } - } -} - -static void XGI_SetGroup4(unsigned short ModeIdIndex, - unsigned short RefreshRateTableIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short tempax, tempcx, tempbx, modeflag, temp, temp2; - - unsigned long tempebx, tempeax, templong; - - /* si+Ext_ResInfo */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - temp = pVBInfo->RVBHCFACT; - xgifb_reg_set(pVBInfo->Part4Port, 0x13, temp); - - tempbx = pVBInfo->RVBHCMAX; - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part4Port, 0x14, temp); - temp2 = ((tempbx & 0xFF00) >> 8) << 7; - tempcx = pVBInfo->VGAHT - 1; - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part4Port, 0x16, temp); - - temp = ((tempcx & 0xFF00) >> 8) << 3; - temp2 |= temp; - - tempcx = pVBInfo->VGAVT - 1; - if (!(pVBInfo->VBInfo & SetCRT2ToTV)) - tempcx -= 5; - - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part4Port, 0x17, temp); - temp = temp2 | ((tempcx & 0xFF00) >> 8); - xgifb_reg_set(pVBInfo->Part4Port, 0x15, temp); - xgifb_reg_or(pVBInfo->Part4Port, 0x0D, 0x08); - tempcx = pVBInfo->VBInfo; - tempbx = pVBInfo->VGAHDE; - - if (modeflag & HalfDCLK) - tempbx >>= 1; - - if (XGI_IsLCDDualLink(pVBInfo)) - tempbx >>= 1; - - if (tempcx & SetCRT2ToHiVision) { - temp = 0; - if (tempbx <= 1024) - temp = 0xA0; - if (tempbx == 1280) - temp = 0xC0; - } else if (tempcx & SetCRT2ToTV) { - temp = 0xA0; - if (tempbx <= 800) - temp = 0x80; - } else { - temp = 0x80; - if (pVBInfo->VBInfo & SetCRT2ToLCD) { - temp = 0; - if (tempbx > 800) - temp = 0x60; - } - } - - if (pVBInfo->TVInfo & (TVSetYPbPr525p | TVSetYPbPr750p)) { - temp = 0x00; - if (pVBInfo->VGAHDE == 1280) - temp = 0x40; - if (pVBInfo->VGAHDE == 1024) - temp = 0x20; - } - xgifb_reg_and_or(pVBInfo->Part4Port, 0x0E, ~0xEF, temp); - - tempebx = pVBInfo->VDE; - - tempcx = pVBInfo->RVBHRS; - temp = tempcx & 0x00FF; - xgifb_reg_set(pVBInfo->Part4Port, 0x18, temp); - - tempeax = pVBInfo->VGAVDE; - tempcx |= 0x04000; - - if (tempeax <= tempebx) { - tempcx = tempcx & (~0x4000); - tempeax = pVBInfo->VGAVDE; - } else { - tempeax -= tempebx; - } - - templong = (tempeax * 256 * 1024) % tempebx; - tempeax = (tempeax * 256 * 1024) / tempebx; - tempebx = tempeax; - - if (templong != 0) - tempebx++; - - temp = (unsigned short)(tempebx & 0x000000FF); - xgifb_reg_set(pVBInfo->Part4Port, 0x1B, temp); - - temp = (unsigned short)((tempebx & 0x0000FF00) >> 8); - xgifb_reg_set(pVBInfo->Part4Port, 0x1A, temp); - tempbx = (unsigned short)(tempebx >> 16); - temp = tempbx & 0x00FF; - temp <<= 4; - temp |= ((tempcx & 0xFF00) >> 8); - xgifb_reg_set(pVBInfo->Part4Port, 0x19, temp); - - /* 301b */ - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - temp = 0x0028; - xgifb_reg_set(pVBInfo->Part4Port, 0x1C, temp); - tempax = pVBInfo->VGAHDE; - if (modeflag & HalfDCLK) - tempax >>= 1; - - if (XGI_IsLCDDualLink(pVBInfo)) - tempax >>= 1; - - if (pVBInfo->VBInfo & SetCRT2ToLCD) { - if (tempax > 800) - tempax -= 800; - } else if (pVBInfo->VGAHDE > 800) { - if (pVBInfo->VGAHDE == 1024) - tempax = (tempax * 25 / 32) - 1; - else - tempax = (tempax * 20 / 32) - 1; - } - tempax -= 1; - - temp = (tempax & 0xFF00) >> 8; - temp = (temp & 0x0003) << 4; - xgifb_reg_set(pVBInfo->Part4Port, 0x1E, temp); - temp = tempax & 0x00FF; - xgifb_reg_set(pVBInfo->Part4Port, 0x1D, temp); - - if (pVBInfo->VBInfo & (SetCRT2ToTV | SetCRT2ToHiVision)) { - if (pVBInfo->VGAHDE > 800) - xgifb_reg_or(pVBInfo->Part4Port, 0x1E, 0x08); - } - temp = 0x0036; - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - if (!(pVBInfo->TVInfo & (NTSC1024x768 - | TVSetYPbPr525p | TVSetYPbPr750p - | TVSetHiVision))) { - temp |= 0x0001; - if ((pVBInfo->VBInfo & SetInSlaveMode) && - !(pVBInfo->TVInfo & TVSimuMode)) - temp &= (~0x0001); - } - } - - xgifb_reg_and_or(pVBInfo->Part4Port, 0x1F, 0x00C0, temp); - tempbx = pVBInfo->HT; - if (XGI_IsLCDDualLink(pVBInfo)) - tempbx >>= 1; - tempbx = (tempbx >> 1) - 2; - temp = ((tempbx & 0x0700) >> 8) << 3; - xgifb_reg_and_or(pVBInfo->Part4Port, 0x21, 0x00C0, temp); - temp = tempbx & 0x00FF; - xgifb_reg_set(pVBInfo->Part4Port, 0x22, temp); - } - /* end 301b */ - - XGI_SetCRT2VCLK(ModeIdIndex, RefreshRateTableIndex, pVBInfo); -} - -static void XGINew_EnableCRT2(struct vb_device_info *pVBInfo) -{ - xgifb_reg_and_or(pVBInfo->P3c4, 0x1E, 0xFF, 0x20); -} - -static void XGI_SetGroup5(struct vb_device_info *pVBInfo) -{ - if (pVBInfo->ModeType == ModeVGA) { - if (!(pVBInfo->VBInfo & (SetInSlaveMode | LoadDACFlag - | DisableCRT2Display))) { - XGINew_EnableCRT2(pVBInfo); - } - } -} - -static void XGI_DisableGatingCRT(struct vb_device_info *pVBInfo) -{ - xgifb_reg_and_or(pVBInfo->P3d4, 0x63, 0xBF, 0x00); -} - -static unsigned char XGI_XG21CheckLVDSMode(struct xgifb_video_info *xgifb_info, - unsigned short ModeNo, - unsigned short ModeIdIndex) -{ - unsigned short xres, yres, colordepth, modeflag, resindex; - - resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - xres = XGI330_ModeResInfo[resindex].HTotal; /* xres->ax */ - yres = XGI330_ModeResInfo[resindex].VTotal; /* yres->bx */ - /* si+St_ModeFlag */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - if (!(modeflag & Charx8Dot)) { - xres /= 9; - xres *= 8; - } - - if ((ModeNo > 0x13) && (modeflag & HalfDCLK)) - xres *= 2; - - if ((ModeNo > 0x13) && (modeflag & DoubleScanMode)) - yres *= 2; - - if (xres > xgifb_info->lvds_data.LVDSHDE) - return 0; - - if (yres > xgifb_info->lvds_data.LVDSVDE) - return 0; - - if (xres != xgifb_info->lvds_data.LVDSHDE || - yres != xgifb_info->lvds_data.LVDSVDE) { - colordepth = XGI_GetColorDepth(ModeIdIndex); - if (colordepth > 2) - return 0; - } - return 1; -} - -static void xgifb_set_lvds(struct xgifb_video_info *xgifb_info, - int chip_id, - unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned char temp, Miscdata; - unsigned short xres, yres, modeflag, resindex; - unsigned short LVDSHT, LVDSHBS, LVDSHRS, LVDSHRE, LVDSHBE; - unsigned short LVDSVT, LVDSVBS, LVDSVRS, LVDSVRE, LVDSVBE; - unsigned short value; - - temp = (unsigned char)((xgifb_info->lvds_data.LVDS_Capability & - (LCDPolarity << 8)) >> 8); - temp &= LCDPolarity; - Miscdata = inb(pVBInfo->P3cc); - - outb((Miscdata & 0x3F) | temp, pVBInfo->P3c2); - - temp = xgifb_info->lvds_data.LVDS_Capability & LCDPolarity; - /* SR35[7] FP VSync polarity */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x35, ~0x80, temp & 0x80); - /* SR30[5] FP HSync polarity */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x30, ~0x20, (temp & 0x40) >> 1); - - if (chip_id == XG27) - XGI_SetXG27FPBits(pVBInfo); - else - XGI_SetXG21FPBits(pVBInfo); - - resindex = XGI330_EModeIDTable[ModeIdIndex].Ext_RESINFO; - xres = XGI330_ModeResInfo[resindex].HTotal; /* xres->ax */ - yres = XGI330_ModeResInfo[resindex].VTotal; /* yres->bx */ - /* si+St_ModeFlag */ - modeflag = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag; - - if (!(modeflag & Charx8Dot)) - xres = xres * 8 / 9; - - LVDSHT = xgifb_info->lvds_data.LVDSHT; - - LVDSHBS = xres + (xgifb_info->lvds_data.LVDSHDE - xres) / 2; - - if (LVDSHBS > LVDSHT) - LVDSHBS -= LVDSHT; - - LVDSHRS = LVDSHBS + xgifb_info->lvds_data.LVDSHFP; - if (LVDSHRS > LVDSHT) - LVDSHRS -= LVDSHT; - - LVDSHRE = LVDSHRS + xgifb_info->lvds_data.LVDSHSYNC; - if (LVDSHRE > LVDSHT) - LVDSHRE -= LVDSHT; - - LVDSHBE = LVDSHBS + LVDSHT - xgifb_info->lvds_data.LVDSHDE; - - LVDSVT = xgifb_info->lvds_data.LVDSVT; - - LVDSVBS = yres + (xgifb_info->lvds_data.LVDSVDE - yres) / 2; - if (modeflag & DoubleScanMode) - LVDSVBS += yres / 2; - - if (LVDSVBS > LVDSVT) - LVDSVBS -= LVDSVT; - - LVDSVRS = LVDSVBS + xgifb_info->lvds_data.LVDSVFP; - if (LVDSVRS > LVDSVT) - LVDSVRS -= LVDSVT; - - LVDSVRE = LVDSVRS + xgifb_info->lvds_data.LVDSVSYNC; - if (LVDSVRE > LVDSVT) - LVDSVRE -= LVDSVT; - - LVDSVBE = LVDSVBS + LVDSVT - xgifb_info->lvds_data.LVDSVDE; - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x11); - xgifb_reg_set(pVBInfo->P3d4, 0x11, temp & 0x7f); /* Unlock CRTC */ - - if (!(modeflag & Charx8Dot)) - xgifb_reg_or(pVBInfo->P3c4, 0x1, 0x1); - - /* HT SR0B[1:0] CR00 */ - value = (LVDSHT >> 3) - 5; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0B, ~0x03, (value & 0x300) >> 8); - xgifb_reg_set(pVBInfo->P3d4, 0x0, (value & 0xFF)); - - /* HBS SR0B[5:4] CR02 */ - value = (LVDSHBS >> 3) - 1; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0B, ~0x30, (value & 0x300) >> 4); - xgifb_reg_set(pVBInfo->P3d4, 0x2, (value & 0xFF)); - - /* HBE SR0C[1:0] CR05[7] CR03[4:0] */ - value = (LVDSHBE >> 3) - 1; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0C, ~0x03, (value & 0xC0) >> 6); - xgifb_reg_and_or(pVBInfo->P3d4, 0x05, ~0x80, (value & 0x20) << 2); - xgifb_reg_and_or(pVBInfo->P3d4, 0x03, ~0x1F, value & 0x1F); - - /* HRS SR0B[7:6] CR04 */ - value = (LVDSHRS >> 3) + 2; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0B, ~0xC0, (value & 0x300) >> 2); - xgifb_reg_set(pVBInfo->P3d4, 0x4, (value & 0xFF)); - - /* Panel HRS SR2F[1:0] SR2E[7:0] */ - value--; - xgifb_reg_and_or(pVBInfo->P3c4, 0x2F, ~0x03, (value & 0x300) >> 8); - xgifb_reg_set(pVBInfo->P3c4, 0x2E, (value & 0xFF)); - - /* HRE SR0C[2] CR05[4:0] */ - value = (LVDSHRE >> 3) + 2; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0C, ~0x04, (value & 0x20) >> 3); - xgifb_reg_and_or(pVBInfo->P3d4, 0x05, ~0x1F, value & 0x1F); - - /* Panel HRE SR2F[7:2] */ - value--; - xgifb_reg_and_or(pVBInfo->P3c4, 0x2F, ~0xFC, value << 2); - - /* VT SR0A[0] CR07[5][0] CR06 */ - value = LVDSVT - 2; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0A, ~0x01, (value & 0x400) >> 10); - xgifb_reg_and_or(pVBInfo->P3d4, 0x07, ~0x20, (value & 0x200) >> 4); - xgifb_reg_and_or(pVBInfo->P3d4, 0x07, ~0x01, (value & 0x100) >> 8); - xgifb_reg_set(pVBInfo->P3d4, 0x06, (value & 0xFF)); - - /* VBS SR0A[2] CR09[5] CR07[3] CR15 */ - value = LVDSVBS - 1; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0A, ~0x04, (value & 0x400) >> 8); - xgifb_reg_and_or(pVBInfo->P3d4, 0x09, ~0x20, (value & 0x200) >> 4); - xgifb_reg_and_or(pVBInfo->P3d4, 0x07, ~0x08, (value & 0x100) >> 5); - xgifb_reg_set(pVBInfo->P3d4, 0x15, (value & 0xFF)); - - /* VBE SR0A[4] CR16 */ - value = LVDSVBE - 1; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0A, ~0x10, (value & 0x100) >> 4); - xgifb_reg_set(pVBInfo->P3d4, 0x16, (value & 0xFF)); - - /* VRS SR0A[3] CR7[7][2] CR10 */ - value = LVDSVRS - 1; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0A, ~0x08, (value & 0x400) >> 7); - xgifb_reg_and_or(pVBInfo->P3d4, 0x07, ~0x80, (value & 0x200) >> 2); - xgifb_reg_and_or(pVBInfo->P3d4, 0x07, ~0x04, (value & 0x100) >> 6); - xgifb_reg_set(pVBInfo->P3d4, 0x10, (value & 0xFF)); - - if (chip_id == XG27) { - /* Panel VRS SR35[2:0] SR34[7:0] */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x35, ~0x07, - (value & 0x700) >> 8); - xgifb_reg_set(pVBInfo->P3c4, 0x34, value & 0xFF); - } else { - /* Panel VRS SR3F[1:0] SR34[7:0] SR33[0] */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x3F, ~0x03, - (value & 0x600) >> 9); - xgifb_reg_set(pVBInfo->P3c4, 0x34, (value >> 1) & 0xFF); - xgifb_reg_and_or(pVBInfo->P3d4, 0x33, ~0x01, value & 0x01); - } - - /* VRE SR0A[5] CR11[3:0] */ - value = LVDSVRE - 1; - xgifb_reg_and_or(pVBInfo->P3c4, 0x0A, ~0x20, (value & 0x10) << 1); - xgifb_reg_and_or(pVBInfo->P3d4, 0x11, ~0x0F, value & 0x0F); - - /* Panel VRE SR3F[7:2] */ - if (chip_id == XG27) - xgifb_reg_and_or(pVBInfo->P3c4, 0x3F, ~0xFC, - (value << 2) & 0xFC); - else - /* SR3F[7] has to be 0, h/w bug */ - xgifb_reg_and_or(pVBInfo->P3c4, 0x3F, ~0xFC, - (value << 2) & 0x7C); - - for (temp = 0, value = 0; temp < 3; temp++) { - xgifb_reg_and_or(pVBInfo->P3c4, 0x31, ~0x30, value); - xgifb_reg_set(pVBInfo->P3c4, - 0x2B, xgifb_info->lvds_data.VCLKData1); - xgifb_reg_set(pVBInfo->P3c4, - 0x2C, xgifb_info->lvds_data.VCLKData2); - value += 0x10; - } - - if (!(modeflag & Charx8Dot)) { - inb(pVBInfo->P3da); /* reset 3da */ - outb(0x13, pVBInfo->P3c0); /* set index */ - /* set data, panning = 0, shift left 1 dot*/ - outb(0x00, pVBInfo->P3c0); - - inb(pVBInfo->P3da); /* Enable Attribute */ - outb(0x20, pVBInfo->P3c0); - - inb(pVBInfo->P3da); /* reset 3da */ - } -} - -/* - * Function : XGI_IsLCDON - * Input : - * Output : 0 : Skip PSC Control - * 1: Disable PSC - * Description : - */ -static unsigned char XGI_IsLCDON(struct vb_device_info *pVBInfo) -{ - unsigned short tempax; - - tempax = pVBInfo->VBInfo; - if (tempax & SetCRT2ToDualEdge) - return 0; - else if (tempax & (DisableCRT2Display | SwitchCRT2 | SetSimuScanMode)) - return 1; - - return 0; -} - -static void XGI_DisableBridge(struct xgifb_video_info *xgifb_info, - struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned short tempah = 0; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - tempah = 0x3F; - if (!(pVBInfo->VBInfo & - (DisableCRT2Display | SetSimuScanMode))) { - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { - if (pVBInfo->VBInfo & SetCRT2ToDualEdge) - tempah = 0x7F; /* Disable Channel A */ - } - } - - /* disable part4_1f */ - xgifb_reg_and(pVBInfo->Part4Port, 0x1F, tempah); - - if (pVBInfo->VBType & (VB_SIS302LV | VB_XGI301C)) { - if (((pVBInfo->VBInfo & - (SetCRT2ToLCD | XGI_SetCRT2ToLCDA))) || - (XGI_IsLCDON(pVBInfo))) - /* LVDS Driver power down */ - xgifb_reg_or(pVBInfo->Part4Port, 0x30, 0x80); - } - - if (pVBInfo->VBInfo & (DisableCRT2Display | XGI_SetCRT2ToLCDA | - SetSimuScanMode)) - XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo); - - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) - /* Power down */ - xgifb_reg_and(pVBInfo->Part1Port, 0x1e, 0xdf); - - /* disable TV as primary VGA swap */ - xgifb_reg_and(pVBInfo->P3c4, 0x32, 0xdf); - - if ((pVBInfo->VBInfo & (SetSimuScanMode | SetCRT2ToDualEdge))) - xgifb_reg_and(pVBInfo->Part2Port, 0x00, 0xdf); - - if ((pVBInfo->VBInfo & - (DisableCRT2Display | SetSimuScanMode)) || - (!(pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) && - (pVBInfo->VBInfo & - (SetCRT2ToRAMDAC | SetCRT2ToLCD | SetCRT2ToTV)))) - xgifb_reg_or(pVBInfo->Part1Port, 0x00, 0x80); - - if ((pVBInfo->VBInfo & - (DisableCRT2Display | SetSimuScanMode)) || - (!(pVBInfo->VBInfo & XGI_SetCRT2ToLCDA)) || - (pVBInfo->VBInfo & - (SetCRT2ToRAMDAC | SetCRT2ToLCD | SetCRT2ToTV))) { - /* save Part1 index 0 */ - tempah = xgifb_reg_get(pVBInfo->Part1Port, 0x00); - /* BTDAC = 1, avoid VB reset */ - xgifb_reg_or(pVBInfo->Part1Port, 0x00, 0x10); - /* disable CRT2 */ - xgifb_reg_and(pVBInfo->Part1Port, 0x1E, 0xDF); - /* restore Part1 index 0 */ - xgifb_reg_set(pVBInfo->Part1Port, 0x00, tempah); - } - } else { /* {301} */ - if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) { - xgifb_reg_or(pVBInfo->Part1Port, 0x00, 0x80); - /* Disable CRT2 */ - xgifb_reg_and(pVBInfo->Part1Port, 0x1E, 0xDF); - /* Disable TV asPrimary VGA swap */ - xgifb_reg_and(pVBInfo->P3c4, 0x32, 0xDF); - } - - if (pVBInfo->VBInfo & (DisableCRT2Display | XGI_SetCRT2ToLCDA - | SetSimuScanMode)) - XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo); - } -} - -/* - * Function : XGI_GetTVPtrIndex - * Input : - * Output : - * Description : bx 0 : ExtNTSC - * 1 : StNTSC - * 2 : ExtPAL - * 3 : StPAL - * 4 : ExtHiTV - * 5 : StHiTV - * 6 : Ext525i - * 7 : St525i - * 8 : Ext525p - * 9 : St525p - * A : Ext750p - * B : St750p - */ -static unsigned short XGI_GetTVPtrIndex(struct vb_device_info *pVBInfo) -{ - unsigned short tempbx = 0; - - if (pVBInfo->TVInfo & TVSetPAL) - tempbx = 2; - if (pVBInfo->TVInfo & TVSetHiVision) - tempbx = 4; - if (pVBInfo->TVInfo & TVSetYPbPr525i) - tempbx = 6; - if (pVBInfo->TVInfo & TVSetYPbPr525p) - tempbx = 8; - if (pVBInfo->TVInfo & TVSetYPbPr750p) - tempbx = 10; - if (pVBInfo->TVInfo & TVSimuMode) - tempbx++; - - return tempbx; -} - -/* - * Function : XGI_GetTVPtrIndex2 - * Input : - * Output : bx 0 : NTSC - * 1 : PAL - * 2 : PALM - * 3 : PALN - * 4 : NTSC1024x768 - * 5 : PAL-M 1024x768 - * 6-7: reserved - * cl 0 : YFilter1 - * 1 : YFilter2 - * ch 0 : 301A - * 1 : 301B/302B/301LV/302LV - * Description : - */ -static void XGI_GetTVPtrIndex2(unsigned short *tempbx, - unsigned char *tempcl, - unsigned char *tempch, - struct vb_device_info *pVBInfo) -{ - *tempbx = 0; - *tempcl = 0; - *tempch = 0; - - if (pVBInfo->TVInfo & TVSetPAL) - *tempbx = 1; - - if (pVBInfo->TVInfo & TVSetPALM) - *tempbx = 2; - - if (pVBInfo->TVInfo & TVSetPALN) - *tempbx = 3; - - if (pVBInfo->TVInfo & NTSC1024x768) { - *tempbx = 4; - if (pVBInfo->TVInfo & TVSetPALM) - *tempbx = 5; - } - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - if (!(pVBInfo->VBInfo & SetInSlaveMode) || (pVBInfo->TVInfo - & TVSimuMode)) { - *tempbx += 8; - *tempcl += 1; - } - } - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) - (*tempch)++; -} - -static void XGI_SetDelayComp(struct vb_device_info *pVBInfo) -{ - unsigned char tempah, tempbl, tempbh; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA - | SetCRT2ToTV | SetCRT2ToRAMDAC)) { - tempbh = 0; - tempbl = XGI301TVDelay; - - if (pVBInfo->VBInfo & SetCRT2ToDualEdge) - tempbl >>= 4; - if (pVBInfo->VBInfo & - (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - tempbh = XGI301LCDDelay; - - if (!(pVBInfo->VBInfo & XGI_SetCRT2ToLCDA)) - tempbl = tempbh; - } - - tempbl &= 0x0F; - tempbh &= 0xF0; - tempah = xgifb_reg_get(pVBInfo->Part1Port, 0x2D); - - if (pVBInfo->VBInfo & (SetCRT2ToRAMDAC | SetCRT2ToLCD - | SetCRT2ToTV)) { /* Channel B */ - tempah &= 0xF0; - tempah |= tempbl; - } - - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { - /* Channel A */ - tempah &= 0x0F; - tempah |= tempbh; - } - xgifb_reg_set(pVBInfo->Part1Port, 0x2D, tempah); - } - } -} - -static void XGI_SetLCDCap_A(unsigned short tempcx, - struct vb_device_info *pVBInfo) -{ - unsigned short temp; - - temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); - - if (temp & LCDRGB18Bit) { - xgifb_reg_and_or(pVBInfo->Part1Port, 0x19, 0x0F, - /* Enable Dither */ - (unsigned short)(0x20 | (tempcx & 0x00C0))); - xgifb_reg_and_or(pVBInfo->Part1Port, 0x1A, 0x7F, 0x80); - } else { - xgifb_reg_and_or(pVBInfo->Part1Port, 0x19, 0x0F, - (unsigned short)(0x30 | (tempcx & 0x00C0))); - xgifb_reg_and_or(pVBInfo->Part1Port, 0x1A, 0x7F, 0x00); - } -} - -/* - * Function : XGI_SetLCDCap_B - * Input : cx -> LCD Capability - * Output : - * Description : - */ -static void XGI_SetLCDCap_B(unsigned short tempcx, - struct vb_device_info *pVBInfo) -{ - if (tempcx & EnableLCD24bpp) { /* 24bits */ - xgifb_reg_and_or(pVBInfo->Part2Port, 0x1A, 0xE0, - (unsigned short)(((tempcx & 0x00ff) >> 6) | 0x0c)); - } else { - xgifb_reg_and_or(pVBInfo->Part2Port, 0x1A, 0xE0, - (unsigned short)(((tempcx & 0x00ff) >> 6) | 0x18)); - /* Enable Dither */ - } -} - -static void XGI_LongWait(struct vb_device_info *pVBInfo) -{ - unsigned short i; - - i = xgifb_reg_get(pVBInfo->P3c4, 0x1F); - - if (!(i & 0xC0)) { - for (i = 0; i < 0xFFFF; i++) { - if (!(inb(pVBInfo->P3da) & 0x08)) - break; - } - - for (i = 0; i < 0xFFFF; i++) { - if ((inb(pVBInfo->P3da) & 0x08)) - break; - } - } -} - -static void SetSpectrum(struct vb_device_info *pVBInfo) -{ - unsigned short index; - - index = XGI_GetLCDCapPtr(pVBInfo); - - /* disable down spectrum D[4] */ - xgifb_reg_and(pVBInfo->Part4Port, 0x30, 0x8F); - XGI_LongWait(pVBInfo); - xgifb_reg_or(pVBInfo->Part4Port, 0x30, 0x20); /* reset spectrum */ - XGI_LongWait(pVBInfo); - - xgifb_reg_set(pVBInfo->Part4Port, 0x31, - pVBInfo->LCDCapList[index].Spectrum_31); - xgifb_reg_set(pVBInfo->Part4Port, 0x32, - pVBInfo->LCDCapList[index].Spectrum_32); - xgifb_reg_set(pVBInfo->Part4Port, 0x33, - pVBInfo->LCDCapList[index].Spectrum_33); - xgifb_reg_set(pVBInfo->Part4Port, 0x34, - pVBInfo->LCDCapList[index].Spectrum_34); - XGI_LongWait(pVBInfo); - xgifb_reg_or(pVBInfo->Part4Port, 0x30, 0x40); /* enable spectrum */ -} - -static void XGI_SetLCDCap(struct vb_device_info *pVBInfo) -{ - unsigned short tempcx; - - tempcx = pVBInfo->LCDCapList[XGI_GetLCDCapPtr(pVBInfo)].LCD_Capability; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV | - VB_SIS302LV | VB_XGI301C)) { - if (pVBInfo->VBType & - (VB_SIS301LV | VB_SIS302LV | VB_XGI301C)) { - /* Set 301LV Capability */ - xgifb_reg_set(pVBInfo->Part4Port, 0x24, - (unsigned char)(tempcx & 0x1F)); - } - /* VB Driving */ - xgifb_reg_and_or(pVBInfo->Part4Port, 0x0D, - ~((EnableVBCLKDRVLOW | EnablePLLSPLOW) >> 8), - (unsigned short)((tempcx & (EnableVBCLKDRVLOW | - EnablePLLSPLOW)) >> 8)); - - if (pVBInfo->VBInfo & SetCRT2ToLCD) - XGI_SetLCDCap_B(tempcx, pVBInfo); - else if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) - XGI_SetLCDCap_A(tempcx, pVBInfo); - - if (pVBInfo->VBType & (VB_SIS302LV | VB_XGI301C)) { - if (tempcx & EnableSpectrum) - SetSpectrum(pVBInfo); - } - } else { - /* LVDS,CH7017 */ - XGI_SetLCDCap_A(tempcx, pVBInfo); - } -} - -/* - * Function : XGI_SetAntiFlicker - * Input : - * Output : - * Description : Set TV Customized Param. - */ -static void XGI_SetAntiFlicker(struct vb_device_info *pVBInfo) -{ - unsigned short tempbx; - - unsigned char tempah; - - if (pVBInfo->TVInfo & (TVSetYPbPr525p | TVSetYPbPr750p)) - return; - - tempbx = XGI_GetTVPtrIndex(pVBInfo); - tempbx &= 0xFE; - tempah = TVAntiFlickList[tempbx]; - tempah <<= 4; - - xgifb_reg_and_or(pVBInfo->Part2Port, 0x0A, 0x8F, tempah); -} - -static void XGI_SetEdgeEnhance(struct vb_device_info *pVBInfo) -{ - unsigned short tempbx; - - unsigned char tempah; - - tempbx = XGI_GetTVPtrIndex(pVBInfo); - tempbx &= 0xFE; - tempah = TVEdgeList[tempbx]; - tempah <<= 5; - - xgifb_reg_and_or(pVBInfo->Part2Port, 0x3A, 0x1F, tempah); -} - -static void XGI_SetPhaseIncr(struct vb_device_info *pVBInfo) -{ - unsigned short tempbx; - - unsigned char tempcl, tempch; - - unsigned long tempData; - - XGI_GetTVPtrIndex2(&tempbx, &tempcl, &tempch, pVBInfo); /* bx, cl, ch */ - tempData = TVPhaseList[tempbx]; - - xgifb_reg_set(pVBInfo->Part2Port, 0x31, (unsigned short)(tempData - & 0x000000FF)); - xgifb_reg_set(pVBInfo->Part2Port, 0x32, (unsigned short)((tempData - & 0x0000FF00) >> 8)); - xgifb_reg_set(pVBInfo->Part2Port, 0x33, (unsigned short)((tempData - & 0x00FF0000) >> 16)); - xgifb_reg_set(pVBInfo->Part2Port, 0x34, (unsigned short)((tempData - & 0xFF000000) >> 24)); -} - -static void XGI_SetYFilter(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short tempbx, index; - unsigned char const *filterPtr; - unsigned char tempcl, tempch, tempal; - - XGI_GetTVPtrIndex2(&tempbx, &tempcl, &tempch, pVBInfo); /* bx, cl, ch */ - - switch (tempbx) { - case 0x00: - case 0x04: - filterPtr = NTSCYFilter1; - break; - - case 0x01: - filterPtr = PALYFilter1; - break; - - case 0x02: - case 0x05: - case 0x0D: - case 0x03: - filterPtr = xgifb_palmn_yfilter1; - break; - - case 0x08: - case 0x0C: - case 0x0A: - case 0x0B: - case 0x09: - filterPtr = xgifb_yfilter2; - break; - - default: - return; - } - - tempal = XGI330_EModeIDTable[ModeIdIndex].VB_ExtTVYFilterIndex; - if (tempcl == 0) - index = tempal * 4; - else - index = tempal * 7; - - if ((tempcl == 0) && (tempch == 1)) { - xgifb_reg_set(pVBInfo->Part2Port, 0x35, 0); - xgifb_reg_set(pVBInfo->Part2Port, 0x36, 0); - xgifb_reg_set(pVBInfo->Part2Port, 0x37, 0); - xgifb_reg_set(pVBInfo->Part2Port, 0x38, filterPtr[index++]); - } else { - xgifb_reg_set(pVBInfo->Part2Port, 0x35, filterPtr[index++]); - xgifb_reg_set(pVBInfo->Part2Port, 0x36, filterPtr[index++]); - xgifb_reg_set(pVBInfo->Part2Port, 0x37, filterPtr[index++]); - xgifb_reg_set(pVBInfo->Part2Port, 0x38, filterPtr[index++]); - } - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - xgifb_reg_set(pVBInfo->Part2Port, 0x48, filterPtr[index++]); - xgifb_reg_set(pVBInfo->Part2Port, 0x49, filterPtr[index++]); - xgifb_reg_set(pVBInfo->Part2Port, 0x4A, filterPtr[index++]); - } -} - -/* - * Function : XGI_OEM310Setting - * Input : - * Output : - * Description : Customized Param. for 301 - */ -static void XGI_OEM310Setting(unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - XGI_SetDelayComp(pVBInfo); - - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) - XGI_SetLCDCap(pVBInfo); - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - XGI_SetPhaseIncr(pVBInfo); - XGI_SetYFilter(ModeIdIndex, pVBInfo); - XGI_SetAntiFlicker(pVBInfo); - - if (pVBInfo->VBType & VB_SIS301) - XGI_SetEdgeEnhance(pVBInfo); - } -} - -/* - * Function : XGI_SetCRT2ModeRegs - * Input : - * Output : - * Description : Origin code for crt2group - */ -static void XGI_SetCRT2ModeRegs(struct vb_device_info *pVBInfo) -{ - unsigned short tempbl; - short tempcl; - - unsigned char tempah; - - tempah = 0; - if (!(pVBInfo->VBInfo & DisableCRT2Display)) { - tempah = xgifb_reg_get(pVBInfo->Part1Port, 0x00); - tempah &= ~0x10; /* BTRAMDAC */ - tempah |= 0x40; /* BTRAM */ - - if (pVBInfo->VBInfo & (SetCRT2ToRAMDAC | SetCRT2ToTV - | SetCRT2ToLCD)) { - tempah = 0x40; /* BTDRAM */ - tempcl = pVBInfo->ModeType; - tempcl -= ModeVGA; - if (tempcl >= 0) { - /* BT Color */ - tempah = 0x008 >> tempcl; - if (tempah == 0) - tempah = 1; - tempah |= 0x040; - } - if (pVBInfo->VBInfo & SetInSlaveMode) - tempah ^= 0x50; /* BTDAC */ - } - } - - xgifb_reg_set(pVBInfo->Part1Port, 0x00, tempah); - tempah = 0x08; - tempbl = 0xf0; - - if (pVBInfo->VBInfo & DisableCRT2Display) - goto reg_and_or; - - tempah = 0x00; - tempbl = 0xff; - - if (!(pVBInfo->VBInfo & (SetCRT2ToRAMDAC | SetCRT2ToTV | - SetCRT2ToLCD | XGI_SetCRT2ToLCDA))) - goto reg_and_or; - - if ((pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) && - (!(pVBInfo->VBInfo & SetSimuScanMode))) { - tempbl &= 0xf7; - tempah |= 0x01; - goto reg_and_or; - } - - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { - tempbl &= 0xf7; - tempah |= 0x01; - } - - if (!(pVBInfo->VBInfo & (SetCRT2ToRAMDAC | SetCRT2ToTV | SetCRT2ToLCD))) - goto reg_and_or; - - tempbl &= 0xf8; - tempah = 0x01; - - if (!(pVBInfo->VBInfo & SetInSlaveMode)) - tempah |= 0x02; - - if (!(pVBInfo->VBInfo & SetCRT2ToRAMDAC)) { - tempah = tempah ^ 0x05; - if (!(pVBInfo->VBInfo & SetCRT2ToLCD)) - tempah = tempah ^ 0x01; - } - - if (!(pVBInfo->VBInfo & SetCRT2ToDualEdge)) - tempah |= 0x08; - -reg_and_or: - xgifb_reg_and_or(pVBInfo->Part1Port, 0x2e, tempbl, tempah); - - if (pVBInfo->VBInfo & (SetCRT2ToRAMDAC | SetCRT2ToTV | SetCRT2ToLCD - | XGI_SetCRT2ToLCDA)) { - tempah &= (~0x08); - if ((pVBInfo->ModeType == ModeVGA) && !(pVBInfo->VBInfo - & SetInSlaveMode)) { - tempah |= 0x010; - } - tempah |= 0x080; - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - tempah |= 0x020; - if (pVBInfo->VBInfo & DriverMode) - tempah = tempah ^ 0x20; - } - - xgifb_reg_and_or(pVBInfo->Part4Port, 0x0D, ~0x0BF, tempah); - tempah = 0; - - if (pVBInfo->LCDInfo & SetLCDDualLink) - tempah |= 0x40; - - if (pVBInfo->VBInfo & SetCRT2ToTV) { - if (pVBInfo->TVInfo & RPLLDIV2XO) - tempah |= 0x40; - } - - if ((pVBInfo->LCDResInfo == Panel_1280x1024) || - (pVBInfo->LCDResInfo == Panel_1280x1024x75)) - tempah |= 0x80; - - if (pVBInfo->LCDResInfo == Panel_1280x960) - tempah |= 0x80; - - xgifb_reg_set(pVBInfo->Part4Port, 0x0C, tempah); - } - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - tempah = 0; - tempbl = 0xfb; - - if (pVBInfo->VBInfo & SetCRT2ToDualEdge) { - tempbl = 0xff; - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) - tempah |= 0x04; /* shampoo 0129 */ - } - - xgifb_reg_and_or(pVBInfo->Part1Port, 0x13, tempbl, tempah); - tempah = 0x00; - tempbl = 0xcf; - if (!(pVBInfo->VBInfo & DisableCRT2Display)) { - if (pVBInfo->VBInfo & SetCRT2ToDualEdge) - tempah |= 0x30; - } - - xgifb_reg_and_or(pVBInfo->Part1Port, 0x2c, tempbl, tempah); - tempah = 0; - tempbl = 0x3f; - - if (!(pVBInfo->VBInfo & DisableCRT2Display)) { - if (pVBInfo->VBInfo & SetCRT2ToDualEdge) - tempah |= 0xc0; - } - xgifb_reg_and_or(pVBInfo->Part4Port, 0x21, tempbl, tempah); - } - - tempah = 0; - tempbl = 0x7f; - if (!(pVBInfo->VBInfo & XGI_SetCRT2ToLCDA)) { - tempbl = 0xff; - if (!(pVBInfo->VBInfo & SetCRT2ToDualEdge)) - tempah |= 0x80; - } - - xgifb_reg_and_or(pVBInfo->Part4Port, 0x23, tempbl, tempah); - - if (pVBInfo->VBType & (VB_SIS302LV | VB_XGI301C)) { - if (pVBInfo->LCDInfo & SetLCDDualLink) { - xgifb_reg_or(pVBInfo->Part4Port, 0x27, 0x20); - xgifb_reg_or(pVBInfo->Part4Port, 0x34, 0x10); - } - } -} - -void XGI_UnLockCRT2(struct vb_device_info *pVBInfo) -{ - xgifb_reg_and_or(pVBInfo->Part1Port, 0x2f, 0xFF, 0x01); -} - -void XGI_LockCRT2(struct vb_device_info *pVBInfo) -{ - xgifb_reg_and_or(pVBInfo->Part1Port, 0x2F, 0xFE, 0x00); -} - -unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE, - unsigned short ModeNo, - unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - static const u8 LCDARefreshIndex[] = { - 0x00, 0x00, 0x03, 0x01, 0x01, 0x01, 0x01, 0x00 }; - - unsigned short RefreshRateTableIndex, i, index, temp; - - index = xgifb_reg_get(pVBInfo->P3d4, 0x33); - index >>= pVBInfo->SelectCRT2Rate; - index &= 0x0F; - - if (pVBInfo->LCDInfo & LCDNonExpanding) - index = 0; - - if (index > 0) - index--; - - if (pVBInfo->SetFlag & ProgrammingCRT2) { - if (pVBInfo->VBInfo & (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) { - temp = LCDARefreshIndex[pVBInfo->LCDResInfo & 0x07]; - - if (index > temp) - index = temp; - } - } - - RefreshRateTableIndex = XGI330_EModeIDTable[ModeIdIndex].REFindex; - ModeNo = XGI330_RefIndex[RefreshRateTableIndex].ModeID; - if (pXGIHWDE->jChipType >= XG20) { /* for XG20, XG21, XG27 */ - if ((XGI330_RefIndex[RefreshRateTableIndex].XRes == 800) && - (XGI330_RefIndex[RefreshRateTableIndex].YRes == 600)) { - index++; - } - /* do the similar adjustment like XGISearchCRT1Rate() */ - if ((XGI330_RefIndex[RefreshRateTableIndex].XRes == 1024) && - (XGI330_RefIndex[RefreshRateTableIndex].YRes == 768)) { - index++; - } - if ((XGI330_RefIndex[RefreshRateTableIndex].XRes == 1280) && - (XGI330_RefIndex[RefreshRateTableIndex].YRes == 1024)) { - index++; - } - } - - i = 0; - do { - if (XGI330_RefIndex[RefreshRateTableIndex + i].ModeID != ModeNo) - break; - temp = XGI330_RefIndex[RefreshRateTableIndex + i].Ext_InfoFlag; - temp &= ModeTypeMask; - if (temp < pVBInfo->ModeType) - break; - i++; - index--; - - } while (index != 0xFFFF); - if (!(pVBInfo->VBInfo & SetCRT2ToRAMDAC)) { - if (pVBInfo->VBInfo & SetInSlaveMode) { - temp = XGI330_RefIndex[RefreshRateTableIndex + i - 1].Ext_InfoFlag; - if (temp & InterlaceMode) - i++; - } - } - i--; - if ((pVBInfo->SetFlag & ProgrammingCRT2)) { - temp = XGI_AjustCRT2Rate(ModeIdIndex, RefreshRateTableIndex, - &i, pVBInfo); - } - return RefreshRateTableIndex + i; -} - -static void XGI_SetLCDAGroup(unsigned short ModeNo, unsigned short ModeIdIndex, - struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned short RefreshRateTableIndex; - - pVBInfo->SetFlag |= ProgrammingCRT2; - RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, - ModeIdIndex, pVBInfo); - XGI_GetLVDSResInfo(ModeIdIndex, pVBInfo); - XGI_GetLVDSData(ModeIdIndex, pVBInfo); - XGI_ModCRT1Regs(ModeIdIndex, HwDeviceExtension, pVBInfo); - XGI_SetLVDSRegs(ModeIdIndex, pVBInfo); - XGI_SetCRT2ECLK(ModeIdIndex, RefreshRateTableIndex, pVBInfo); -} - -static unsigned char XGI_SetCRT2Group301(unsigned short ModeNo, - struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned short ModeIdIndex, RefreshRateTableIndex; - - pVBInfo->SetFlag |= ProgrammingCRT2; - XGI_SearchModeID(ModeNo, &ModeIdIndex); - pVBInfo->SelectCRT2Rate = 4; - RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, - ModeIdIndex, pVBInfo); - XGI_SaveCRT2Info(ModeNo, pVBInfo); - XGI_GetCRT2ResInfo(ModeIdIndex, pVBInfo); - XGI_GetCRT2Data(ModeIdIndex, RefreshRateTableIndex, pVBInfo); - XGI_PreSetGroup1(ModeNo, ModeIdIndex, RefreshRateTableIndex, pVBInfo); - XGI_SetGroup1(ModeIdIndex, RefreshRateTableIndex, pVBInfo); - XGI_SetLockRegs(ModeNo, ModeIdIndex, pVBInfo); - XGI_SetGroup2(ModeNo, ModeIdIndex, pVBInfo); - XGI_SetLCDRegs(ModeIdIndex, pVBInfo); - XGI_SetTap4Regs(pVBInfo); - XGI_SetGroup3(ModeIdIndex, pVBInfo); - XGI_SetGroup4(ModeIdIndex, RefreshRateTableIndex, pVBInfo); - XGI_SetCRT2VCLK(ModeIdIndex, RefreshRateTableIndex, pVBInfo); - XGI_SetGroup5(pVBInfo); - XGI_AutoThreshold(pVBInfo); - return 1; -} - -void XGI_SenseCRT1(struct vb_device_info *pVBInfo) -{ - unsigned char CRTCData[17] = { 0x5F, 0x4F, 0x50, 0x82, 0x55, 0x81, - 0x0B, 0x3E, 0xE9, 0x0B, 0xDF, 0xE7, 0x04, 0x00, 0x00, - 0x05, 0x00 }; - - unsigned char SR01 = 0, SR1F = 0, SR07 = 0, SR06 = 0; - - unsigned char CR17, CR63, SR31; - unsigned short temp; - - int i; - - xgifb_reg_set(pVBInfo->P3c4, 0x05, 0x86); - - /* to fix XG42 single LCD sense to CRT+LCD */ - xgifb_reg_set(pVBInfo->P3d4, 0x57, 0x4A); - xgifb_reg_set(pVBInfo->P3d4, 0x53, (xgifb_reg_get( - pVBInfo->P3d4, 0x53) | 0x02)); - - SR31 = xgifb_reg_get(pVBInfo->P3c4, 0x31); - CR63 = xgifb_reg_get(pVBInfo->P3d4, 0x63); - SR01 = xgifb_reg_get(pVBInfo->P3c4, 0x01); - - xgifb_reg_set(pVBInfo->P3c4, 0x01, (unsigned char)(SR01 & 0xDF)); - xgifb_reg_set(pVBInfo->P3d4, 0x63, (unsigned char)(CR63 & 0xBF)); - - CR17 = xgifb_reg_get(pVBInfo->P3d4, 0x17); - xgifb_reg_set(pVBInfo->P3d4, 0x17, (unsigned char)(CR17 | 0x80)); - - SR1F = xgifb_reg_get(pVBInfo->P3c4, 0x1F); - xgifb_reg_set(pVBInfo->P3c4, 0x1F, (unsigned char)(SR1F | 0x04)); - - SR07 = xgifb_reg_get(pVBInfo->P3c4, 0x07); - xgifb_reg_set(pVBInfo->P3c4, 0x07, (unsigned char)(SR07 & 0xFB)); - SR06 = xgifb_reg_get(pVBInfo->P3c4, 0x06); - xgifb_reg_set(pVBInfo->P3c4, 0x06, (unsigned char)(SR06 & 0xC3)); - - xgifb_reg_set(pVBInfo->P3d4, 0x11, 0x00); - - for (i = 0; i < 8; i++) - xgifb_reg_set(pVBInfo->P3d4, (unsigned short)i, CRTCData[i]); - - for (i = 8; i < 11; i++) - xgifb_reg_set(pVBInfo->P3d4, (unsigned short)(i + 8), - CRTCData[i]); - - for (i = 11; i < 13; i++) - xgifb_reg_set(pVBInfo->P3d4, (unsigned short)(i + 4), - CRTCData[i]); - - for (i = 13; i < 16; i++) - xgifb_reg_set(pVBInfo->P3c4, (unsigned short)(i - 3), - CRTCData[i]); - - xgifb_reg_set(pVBInfo->P3c4, 0x0E, (unsigned char)(CRTCData[16] - & 0xE0)); - - xgifb_reg_set(pVBInfo->P3c4, 0x31, 0x00); - xgifb_reg_set(pVBInfo->P3c4, 0x2B, 0x1B); - xgifb_reg_set(pVBInfo->P3c4, 0x2C, 0xE1); - - outb(0x00, pVBInfo->P3c8); - - for (i = 0; i < 256 * 3; i++) - outb(0x0F, (pVBInfo->P3c8 + 1)); /* DAC_TEST_PARMS */ - - mdelay(1); - - XGI_WaitDisply(pVBInfo); - temp = inb(pVBInfo->P3c2); - - if (temp & 0x10) - xgifb_reg_and_or(pVBInfo->P3d4, 0x32, 0xDF, 0x20); - else - xgifb_reg_and_or(pVBInfo->P3d4, 0x32, 0xDF, 0x00); - - /* avoid display something, set BLACK DAC if not restore DAC */ - outb(0x00, pVBInfo->P3c8); - - for (i = 0; i < 256 * 3; i++) - outb(0, (pVBInfo->P3c8 + 1)); - - xgifb_reg_set(pVBInfo->P3c4, 0x01, SR01); - xgifb_reg_set(pVBInfo->P3d4, 0x63, CR63); - xgifb_reg_set(pVBInfo->P3c4, 0x31, SR31); - - xgifb_reg_set(pVBInfo->P3d4, 0x53, (xgifb_reg_get( - pVBInfo->P3d4, 0x53) & 0xFD)); - xgifb_reg_set(pVBInfo->P3c4, 0x1F, (unsigned char)SR1F); -} - -static void XGI_EnableBridge(struct xgifb_video_info *xgifb_info, - struct xgi_hw_device_info *HwDeviceExtension, - struct vb_device_info *pVBInfo) -{ - unsigned short tempah; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - if (pVBInfo->VBInfo & SetCRT2ToDualEdge) - /* Power on */ - xgifb_reg_set(pVBInfo->Part1Port, 0x1E, 0x20); - - if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToTV | - SetCRT2ToRAMDAC)) { - tempah = xgifb_reg_get(pVBInfo->P3c4, 0x32); - tempah &= 0xDF; - if (pVBInfo->VBInfo & SetInSlaveMode) { - if (!(pVBInfo->VBInfo & SetCRT2ToRAMDAC)) - tempah |= 0x20; - } - xgifb_reg_set(pVBInfo->P3c4, 0x32, tempah); - xgifb_reg_or(pVBInfo->P3c4, 0x1E, 0x20); - - tempah = xgifb_reg_get(pVBInfo->Part1Port, 0x2E); - - if (!(tempah & 0x80)) - xgifb_reg_or(pVBInfo->Part1Port, 0x2E, 0x80); - xgifb_reg_and(pVBInfo->Part1Port, 0x00, 0x7F); - } - - if (!(pVBInfo->VBInfo & DisableCRT2Display)) { - xgifb_reg_and_or(pVBInfo->Part2Port, 0x00, ~0xE0, - 0x20); /* shampoo 0129 */ - if (pVBInfo->VBType & (VB_SIS302LV | VB_XGI301C)) { - if (pVBInfo->VBInfo & - (SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) - /* LVDS PLL power on */ - xgifb_reg_and(pVBInfo->Part4Port, 0x2A, - 0x7F); - /* LVDS Driver power on */ - xgifb_reg_and(pVBInfo->Part4Port, 0x30, 0x7F); - } - } - - tempah = 0x00; - - if (!(pVBInfo->VBInfo & DisableCRT2Display)) { - tempah = 0xc0; - - if (!(pVBInfo->VBInfo & SetSimuScanMode) && - (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) && - (pVBInfo->VBInfo & SetCRT2ToDualEdge)) { - tempah = tempah & 0x40; - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) - tempah = tempah ^ 0xC0; - } - } - - /* EnablePart4_1F */ - xgifb_reg_or(pVBInfo->Part4Port, 0x1F, tempah); - - XGI_DisableGatingCRT(pVBInfo); - XGI_DisplayOn(xgifb_info, HwDeviceExtension, pVBInfo); - } /* 301 */ - else { /* LVDS */ - if (pVBInfo->VBInfo & (SetCRT2ToTV | SetCRT2ToLCD - | XGI_SetCRT2ToLCDA)) - /* enable CRT2 */ - xgifb_reg_or(pVBInfo->Part1Port, 0x1E, 0x20); - - tempah = xgifb_reg_get(pVBInfo->Part1Port, 0x2E); - if (!(tempah & 0x80)) - xgifb_reg_or(pVBInfo->Part1Port, 0x2E, 0x80); - - xgifb_reg_and(pVBInfo->Part1Port, 0x00, 0x7F); - XGI_DisplayOn(xgifb_info, HwDeviceExtension, pVBInfo); - } /* End of VB */ -} - -static void XGI_SetCRT1Group(struct xgifb_video_info *xgifb_info, - struct xgi_hw_device_info *HwDeviceExtension, - unsigned short ModeNo, unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo) -{ - unsigned short RefreshRateTableIndex, temp; - - XGI_SetSeqRegs(pVBInfo); - outb(XGI330_StandTable.MISC, pVBInfo->P3c2); - XGI_SetCRTCRegs(pVBInfo); - XGI_SetATTRegs(ModeIdIndex, pVBInfo); - XGI_SetGRCRegs(pVBInfo); - XGI_ClearExt1Regs(pVBInfo); - - if (HwDeviceExtension->jChipType == XG27) { - if (pVBInfo->IF_DEF_LVDS == 0) - XGI_SetDefaultVCLK(pVBInfo); - } - - temp = ~ProgrammingCRT2; - pVBInfo->SetFlag &= temp; - pVBInfo->SelectCRT2Rate = 0; - - if (pVBInfo->VBType & (VB_SIS301B | VB_SIS302B | VB_SIS301LV - | VB_SIS302LV | VB_XGI301C)) { - if (pVBInfo->VBInfo & (SetSimuScanMode | XGI_SetCRT2ToLCDA - | SetInSlaveMode)) { - pVBInfo->SetFlag |= ProgrammingCRT2; - } - } - - RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, - ModeIdIndex, pVBInfo); - if (RefreshRateTableIndex != 0xFFFF) { - XGI_SetSync(RefreshRateTableIndex, pVBInfo); - XGI_SetCRT1CRTC(ModeIdIndex, RefreshRateTableIndex, - pVBInfo, HwDeviceExtension); - XGI_SetCRT1DE(ModeIdIndex, RefreshRateTableIndex, pVBInfo); - XGI_SetCRT1Offset(ModeNo, ModeIdIndex, RefreshRateTableIndex, - HwDeviceExtension, pVBInfo); - XGI_SetCRT1VCLK(ModeIdIndex, HwDeviceExtension, - RefreshRateTableIndex, pVBInfo); - } - - if (HwDeviceExtension->jChipType >= XG21) { - temp = xgifb_reg_get(pVBInfo->P3d4, 0x38); - if (temp & 0xA0) { - if (HwDeviceExtension->jChipType == XG27) - XGI_SetXG27CRTC(RefreshRateTableIndex, pVBInfo); - else - XGI_SetXG21CRTC(RefreshRateTableIndex, pVBInfo); - - XGI_UpdateXG21CRTC(ModeNo, pVBInfo, - RefreshRateTableIndex); - - xgifb_set_lcd(HwDeviceExtension->jChipType, - pVBInfo, RefreshRateTableIndex); - - if (pVBInfo->IF_DEF_LVDS == 1) - xgifb_set_lvds(xgifb_info, - HwDeviceExtension->jChipType, - ModeIdIndex, pVBInfo); - } - } - - pVBInfo->SetFlag &= (~ProgrammingCRT2); - XGI_SetCRT1FIFO(HwDeviceExtension, pVBInfo); - XGI_SetCRT1ModeRegs(HwDeviceExtension, ModeIdIndex, - RefreshRateTableIndex, pVBInfo); - XGI_LoadDAC(pVBInfo); -} - -unsigned char XGISetModeNew(struct xgifb_video_info *xgifb_info, - struct xgi_hw_device_info *HwDeviceExtension, - unsigned short ModeNo) -{ - unsigned short ModeIdIndex; - struct vb_device_info VBINF; - struct vb_device_info *pVBInfo = &VBINF; - - pVBInfo->IF_DEF_LVDS = 0; - - if (HwDeviceExtension->jChipType >= XG20) - pVBInfo->VBType = 0; /* set VBType default 0 */ - - XGIRegInit(pVBInfo, xgifb_info->vga_base); - - /* for x86 Linux, XG21 LVDS */ - if (HwDeviceExtension->jChipType == XG21) { - if ((xgifb_reg_get(pVBInfo->P3d4, 0x38) & 0xE0) == 0xC0) - pVBInfo->IF_DEF_LVDS = 1; - } - if (HwDeviceExtension->jChipType == XG27) { - if ((xgifb_reg_get(pVBInfo->P3d4, 0x38) & 0xE0) == 0xC0) { - if (xgifb_reg_get(pVBInfo->P3d4, 0x30) & 0x20) - pVBInfo->IF_DEF_LVDS = 1; - } - } - - InitTo330Pointer(HwDeviceExtension->jChipType, pVBInfo); - if (ModeNo & 0x80) - ModeNo = ModeNo & 0x7F; - xgifb_reg_set(pVBInfo->P3c4, 0x05, 0x86); - - if (HwDeviceExtension->jChipType < XG20) - XGI_UnLockCRT2(pVBInfo); - - XGI_SearchModeID(ModeNo, &ModeIdIndex); - - if (HwDeviceExtension->jChipType < XG20) { - XGI_GetVBInfo(ModeIdIndex, pVBInfo); - XGI_GetTVInfo(ModeIdIndex, pVBInfo); - XGI_GetLCDInfo(ModeIdIndex, pVBInfo); - XGI_DisableBridge(xgifb_info, HwDeviceExtension, pVBInfo); - - if (pVBInfo->VBInfo & (SetSimuScanMode | XGI_SetCRT2ToLCDA) || - !(pVBInfo->VBInfo & SwitchCRT2)) { - XGI_SetCRT1Group(xgifb_info, HwDeviceExtension, ModeNo, - ModeIdIndex, pVBInfo); - - if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA) { - XGI_SetLCDAGroup(ModeNo, ModeIdIndex, - HwDeviceExtension, pVBInfo); - } - } - - if (pVBInfo->VBInfo & (SetSimuScanMode | SwitchCRT2)) { - switch (HwDeviceExtension->ujVBChipID) { - case VB_CHIP_301: /* fall through */ - case VB_CHIP_302: - /* add for CRT2 */ - XGI_SetCRT2Group301(ModeNo, HwDeviceExtension, - pVBInfo); - break; - - default: - break; - } - } - - XGI_SetCRT2ModeRegs(pVBInfo); - XGI_OEM310Setting(ModeIdIndex, pVBInfo); /* 0212 */ - XGI_EnableBridge(xgifb_info, HwDeviceExtension, pVBInfo); - } /* !XG20 */ - else { - if (pVBInfo->IF_DEF_LVDS == 1) - if (!XGI_XG21CheckLVDSMode(xgifb_info, ModeNo, - ModeIdIndex)) - return 0; - - pVBInfo->ModeType = - XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag - & ModeTypeMask; - - pVBInfo->SetFlag = 0; - pVBInfo->VBInfo = DisableCRT2Display; - - XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo); - - XGI_SetCRT1Group(xgifb_info, HwDeviceExtension, ModeNo, - ModeIdIndex, pVBInfo); - - XGI_DisplayOn(xgifb_info, HwDeviceExtension, pVBInfo); - } - - XGI_UpdateModeInfo(pVBInfo); - - if (HwDeviceExtension->jChipType < XG20) - XGI_LockCRT2(pVBInfo); - - return 1; -} diff --git a/drivers/staging/xgifb/vb_setmode.h b/drivers/staging/xgifb/vb_setmode.h deleted file mode 100644 index 5904ed1f2686..000000000000 --- a/drivers/staging/xgifb/vb_setmode.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _VBSETMODE_ -#define _VBSETMODE_ - -void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo); -void XGI_UnLockCRT2(struct vb_device_info *pVBInfo); -void XGI_LockCRT2(struct vb_device_info *pVBInfo); -void XGI_DisplayOff(struct xgifb_video_info *xgifb_info, - struct xgi_hw_device_info *pXGIHWDE, - struct vb_device_info *pVBInfo); -void XGI_GetVBType(struct vb_device_info *pVBInfo); -void XGI_SenseCRT1(struct vb_device_info *pVBInfo); -unsigned char XGISetModeNew(struct xgifb_video_info *xgifb_info, - struct xgi_hw_device_info *HwDeviceExtension, - unsigned short ModeNo); - -unsigned char XGI_SearchModeID(unsigned short ModeNo, - unsigned short *ModeIdIndex); -unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE, - unsigned short ModeNo, - unsigned short ModeIdIndex, - struct vb_device_info *pVBInfo); - -#endif diff --git a/drivers/staging/xgifb/vb_struct.h b/drivers/staging/xgifb/vb_struct.h deleted file mode 100644 index e256f72f6d8a..000000000000 --- a/drivers/staging/xgifb/vb_struct.h +++ /dev/null @@ -1,165 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _VB_STRUCT_ -#define _VB_STRUCT_ -#include "../../video/fbdev/sis/vstruct.h" - -struct XGI_LVDSCRT1HDataStruct { - unsigned char Reg[8]; -}; - -struct XGI_LVDSCRT1VDataStruct { - unsigned char Reg[7]; -}; - -struct XGI_ExtStruct { - unsigned char Ext_ModeID; - unsigned short Ext_ModeFlag; - unsigned short Ext_ModeInfo; - unsigned char Ext_RESINFO; - unsigned char VB_ExtTVYFilterIndex; - unsigned char REFindex; -}; - -struct XGI_Ext2Struct { - unsigned short Ext_InfoFlag; - unsigned char Ext_CRT1CRTC; - unsigned char Ext_CRTVCLK; - unsigned char Ext_CRT2CRTC; - unsigned char Ext_CRT2CRTC2; - unsigned char ModeID; - unsigned short XRes; - unsigned short YRes; -}; - -struct XGI_ECLKDataStruct { - unsigned char SR2E, SR2F, SR30; - unsigned short CLOCK; -}; - -/*add for new UNIVGABIOS*/ -struct XGI_LCDDesStruct { - unsigned short LCDHDES; - unsigned short LCDHRS; - unsigned short LCDVDES; - unsigned short LCDVRS; -}; - -struct XGI330_LCDDataDesStruct2 { - unsigned short LCDHDES; - unsigned short LCDHRS; - unsigned short LCDVDES; - unsigned short LCDVRS; - unsigned short LCDHSync; - unsigned short LCDVSync; -}; - -struct XGI330_LCDDataTablStruct { - unsigned char PANELID; - unsigned short MASK; - unsigned short CAP; - void const *DATAPTR; -}; - -struct XGI330_TVDataTablStruct { - unsigned short MASK; - unsigned short CAP; - struct SiS_TVData const *DATAPTR; -}; - -struct XGI_TimingHStruct { - unsigned char data[8]; -}; - -struct XGI_TimingVStruct { - unsigned char data[7]; -}; - -struct XGI_XG21CRT1Struct { - unsigned char ModeID, CR02, CR03, CR15, CR16; -}; - -struct XGI330_LCDCapStruct { - unsigned char LCD_ID; - unsigned short LCD_Capability; - unsigned char LCD_HSyncWidth; - unsigned char LCD_VSyncWidth; - unsigned char LCD_VCLK; - unsigned char LCDA_VCLKData1; - unsigned char LCDA_VCLKData2; - unsigned char LCUCHAR_VCLKData1; - unsigned char LCUCHAR_VCLKData2; - unsigned char Spectrum_31; - unsigned char Spectrum_32; - unsigned char Spectrum_33; - unsigned char Spectrum_34; -}; - -struct XGI21_LVDSCapStruct { - unsigned short LVDS_Capability; - unsigned short LVDSHT; - unsigned short LVDSVT; - unsigned short LVDSHDE; - unsigned short LVDSVDE; - unsigned short LVDSHFP; - unsigned short LVDSVFP; - unsigned short LVDSHSYNC; - unsigned short LVDSVSYNC; - unsigned char VCLKData1; - unsigned char VCLKData2; - unsigned char PSC_S1; /* Duration between CPL on and signal on */ - unsigned char PSC_S2; /* Duration signal on and Vdd on */ - unsigned char PSC_S3; /* Duration between CPL off and signal off */ - unsigned char PSC_S4; /* Duration signal off and Vdd off */ - unsigned char PSC_S5; -}; - -struct XGI_CRT1TableStruct { - unsigned char CR[16]; -}; - -struct XGI301C_Tap4TimingStruct { - unsigned short DE; - unsigned char Reg[64]; /* C0-FF */ -}; - -struct vb_device_info { - unsigned long P3c4, P3d4, P3c0, P3ce, P3c2, P3cc; - unsigned long P3ca, P3c6, P3c7, P3c8, P3c9, P3da; - unsigned long Part0Port, Part1Port, Part2Port; - unsigned long Part3Port, Part4Port, Part5Port; - unsigned short RVBHCFACT, RVBHCMAX, RVBHRS; - unsigned short VGAVT, VGAHT, VGAVDE, VGAHDE; - unsigned short VT, HT, VDE, HDE; - unsigned short LCDHRS, LCDVRS, LCDHDES, LCDVDES; - - unsigned short ModeType; - unsigned short IF_DEF_LVDS; - unsigned short IF_DEF_CRT2Monitor; - unsigned short IF_DEF_YPbPr; - unsigned short IF_DEF_HiVision; - unsigned short LCDResInfo, LCDTypeInfo, VBType;/*301b*/ - unsigned short VBInfo, TVInfo, LCDInfo; - unsigned short SetFlag; - unsigned short NewFlickerMode; - unsigned short SelectCRT2Rate; - - void __iomem *FBAddr; - - unsigned char const *SR18; - unsigned char const (*CR40)[3]; - - struct SiS_MCLKData const *MCLKData; - - unsigned char XGINew_CR97; - - struct XGI330_LCDCapStruct const *LCDCapList; - - struct XGI_TimingHStruct TimingH; - struct XGI_TimingVStruct TimingV; - - int ram_type; - int ram_channel; - int ram_bus; -}; /* _struct vb_device_info */ - -#endif /* _VB_STRUCT_ */ diff --git a/drivers/staging/xgifb/vb_table.h b/drivers/staging/xgifb/vb_table.h deleted file mode 100644 index 42ecf7fe6766..000000000000 --- a/drivers/staging/xgifb/vb_table.h +++ /dev/null @@ -1,2513 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _VB_TABLE_ -#define _VB_TABLE_ -static const struct SiS_MCLKData XGI340New_MCLKData[] = { - {0x16, 0x01, 0x01, 166}, - {0x19, 0x02, 0x01, 124}, - {0x7C, 0x08, 0x01, 200}, -}; - -static const struct SiS_MCLKData XGI27New_MCLKData[] = { - {0x5c, 0x23, 0x01, 166}, - {0x19, 0x02, 0x01, 124}, - {0x7C, 0x08, 0x80, 200}, -}; - -const struct XGI_ECLKDataStruct XGI340_ECLKData[] = { - {0x5c, 0x23, 0x01, 166}, - {0x55, 0x84, 0x01, 123}, - {0x7C, 0x08, 0x01, 200}, -}; - -static const unsigned char XG27_SR18[3] = { - 0x32, 0x32, 0x42 /* SR18 */ -}; - -static const unsigned char XGI340_SR18[3] = { - 0x31, 0x42, 0x42 /* SR18 */ -}; - -static const unsigned char XGI340_cr41[24][3] = { - {0x20, 0x50, 0x60}, /* 0 CR41 */ - {0xc4, 0x40, 0x84}, /* 1 CR8A */ - {0xc4, 0x40, 0x84}, /* 2 CR8B */ - {0xb5, 0xa4, 0xa4}, - {0xf0, 0xf0, 0xf0}, - {0x90, 0x90, 0x24}, /* 5 CR68 */ - {0x77, 0x77, 0x44}, /* 6 CR69 */ - {0x77, 0x77, 0x44}, /* 7 CR6A */ - {0xff, 0xff, 0xff}, /* 8 CR6D */ - {0x55, 0x55, 0x55}, /* 9 CR80 */ - {0x00, 0x00, 0x00}, /* 10 CR81 */ - {0x88, 0xa8, 0x48}, /* 11 CR82 */ - {0x44, 0x44, 0x77}, /* 12 CR85 */ - {0x48, 0x48, 0x88}, /* 13 CR86 */ - {0x54, 0x54, 0x44}, /* 14 CR90 */ - {0x54, 0x54, 0x44}, /* 15 CR91 */ - {0x0a, 0x0a, 0x07}, /* 16 CR92 */ - {0x44, 0x44, 0x44}, /* 17 CR93 */ - {0x10, 0x10, 0x0A}, /* 18 CR94 */ - {0x11, 0x11, 0x0a}, /* 19 CR95 */ - {0x05, 0x05, 0x05}, /* 20 CR96 */ - {0xf0, 0xf0, 0xf0}, /* 21 CRC3 */ - {0x05, 0x00, 0x02}, /* 22 CRC4 */ - {0x00, 0x00, 0x00} /* 23 CRC5 */ -}; - -static const unsigned char XGI27_cr41[24][3] = { - {0x20, 0x40, 0x60}, /* 0 CR41 */ - {0xC4, 0x40, 0x84}, /* 1 CR8A */ - {0xC4, 0x40, 0x84}, /* 2 CR8B */ - {0xB3, 0x13, 0xa4}, /* 3 CR40[7], - * CR99[2:0], - * CR45[3:0] - */ - {0xf0, 0xf5, 0xf0}, /* 4 CR59 */ - {0x90, 0x90, 0x24}, /* 5 CR68 */ - {0x77, 0x67, 0x44}, /* 6 CR69 */ - {0x77, 0x77, 0x44}, /* 7 CR6A */ - {0xff, 0xff, 0xff}, /* 8 CR6D */ - {0x55, 0x55, 0x55}, /* 9 CR80 */ - {0x00, 0x00, 0x00}, /* 10 CR81 */ - {0x88, 0xcc, 0x48}, /* 11 CR82 */ - {0x44, 0x88, 0x77}, /* 12 CR85 */ - {0x48, 0x88, 0x88}, /* 13 CR86 */ - {0x54, 0x32, 0x44}, /* 14 CR90 */ - {0x54, 0x33, 0x44}, /* 15 CR91 */ - {0x0a, 0x07, 0x07}, /* 16 CR92 */ - {0x44, 0x63, 0x44}, /* 17 CR93 */ - {0x10, 0x14, 0x0A}, /* 18 CR94 */ - {0x11, 0x0B, 0x0C}, /* 19 CR95 */ - {0x05, 0x22, 0x05}, /* 20 CR96 */ - {0xf0, 0xf0, 0x00}, /* 21 CRC3 */ - {0x05, 0x00, 0x02}, /* 22 CRC4 */ - {0x00, 0x00, 0x00} /* 23 CRC5 */ -}; - -/* CR47,CR48,CR49,CR4A,CR4B,CR4C,CR70,CR71,CR74,CR75,CR76,CR77 */ -const unsigned char XGI340_AGPReg[12] = { - 0x28, 0x23, 0x00, 0x20, 0x00, 0x20, - 0x00, 0x05, 0xd0, 0x10, 0x10, 0x00 -}; - -const struct XGI_ExtStruct XGI330_EModeIDTable[] = { - {0x2e, 0x0a1b, 0x0306, 0x06, 0x05, 0x06}, - {0x2f, 0x0a1b, 0x0305, 0x05, 0x05, 0x05}, - {0x30, 0x2a1b, 0x0407, 0x07, 0x07, 0x0e}, - {0x31, 0x0a1b, 0x030d, 0x0d, 0x06, 0x3d}, - {0x32, 0x0a1b, 0x0a0e, 0x0e, 0x06, 0x3e}, - {0x33, 0x0a1d, 0x0a0d, 0x0d, 0x06, 0x3d}, - {0x34, 0x2a1d, 0x0a0e, 0x0e, 0x06, 0x3e}, - {0x35, 0x0a1f, 0x0a0d, 0x0d, 0x06, 0x3d}, - {0x36, 0x2a1f, 0x0a0e, 0x0e, 0x06, 0x3e}, - {0x38, 0x0a1b, 0x0508, 0x08, 0x00, 0x16}, - {0x3a, 0x0e3b, 0x0609, 0x09, 0x00, 0x1e}, - {0x3c, 0x0e3b, 0x070a, 0x0a, 0x00, 0x22}, /* mode 1600x1200 - * add CRT2MODE [2003/10/07] - */ - {0x3d, 0x0e7d, 0x070a, 0x0a, 0x00, 0x22}, /* mode 1600x1200 - * add CRT2MODE - */ - {0x40, 0x9a1c, 0x0000, 0x00, 0x04, 0x00}, - {0x41, 0x9a1d, 0x0000, 0x00, 0x04, 0x00}, - {0x43, 0x0a1c, 0x0306, 0x06, 0x05, 0x06}, - {0x44, 0x0a1d, 0x0306, 0x06, 0x05, 0x06}, - {0x46, 0x2a1c, 0x0407, 0x07, 0x07, 0x0e}, - {0x47, 0x2a1d, 0x0407, 0x07, 0x07, 0x0e}, - {0x49, 0x0a3c, 0x0508, 0x08, 0x00, 0x16}, - {0x4a, 0x0a3d, 0x0508, 0x08, 0x00, 0x16}, - {0x4c, 0x0e7c, 0x0609, 0x09, 0x00, 0x1e}, - {0x4d, 0x0e7d, 0x0609, 0x09, 0x00, 0x1e}, - {0x50, 0x9a1b, 0x0001, 0x01, 0x04, 0x02}, - {0x51, 0xba1b, 0x0103, 0x03, 0x07, 0x03}, - {0x52, 0x9a1b, 0x0204, 0x04, 0x00, 0x04}, - {0x56, 0x9a1d, 0x0001, 0x01, 0x04, 0x02}, - {0x57, 0xba1d, 0x0103, 0x03, 0x07, 0x03}, - {0x58, 0x9a1d, 0x0204, 0x04, 0x00, 0x04}, - {0x59, 0x9a1b, 0x0000, 0x00, 0x04, 0x00}, - {0x5A, 0x021b, 0x0014, 0x01, 0x04, 0x3f}, - {0x5B, 0x0a1d, 0x0014, 0x01, 0x04, 0x3f}, - {0x5d, 0x0a1d, 0x0305, 0x05, 0x07, 0x05}, - {0x62, 0x0a3f, 0x0306, 0x06, 0x05, 0x06}, - {0x63, 0x2a3f, 0x0407, 0x07, 0x07, 0x0e}, - {0x64, 0x0a7f, 0x0508, 0x08, 0x00, 0x16}, - {0x65, 0x0eff, 0x0609, 0x09, 0x00, 0x1e}, - {0x66, 0x0eff, 0x070a, 0x0a, 0x00, 0x22}, /* mode 1600x1200 - * add CRT2MODE - */ - {0x68, 0x067b, 0x080b, 0x0b, 0x00, 0x29}, - {0x69, 0x06fd, 0x080b, 0x0b, 0x00, 0x29}, - {0x6b, 0x07ff, 0x080b, 0x0b, 0x00, 0x29}, - {0x6c, 0x067b, 0x090c, 0x0c, 0x00, 0x2f}, - {0x6d, 0x06fd, 0x090c, 0x0c, 0x00, 0x2f}, - {0x6e, 0x07ff, 0x090c, 0x0c, 0x00, 0x2f}, - {0x70, 0x2a1b, 0x0410, 0x10, 0x07, 0x34}, - {0x71, 0x0a1b, 0x0511, 0x11, 0x00, 0x37}, - {0x74, 0x0a1d, 0x0511, 0x11, 0x00, 0x37}, - {0x75, 0x0a3d, 0x0612, 0x12, 0x00, 0x3a}, - {0x76, 0x2a1f, 0x0410, 0x10, 0x07, 0x34}, - {0x77, 0x0a1f, 0x0511, 0x11, 0x00, 0x37}, - {0x78, 0x0a3f, 0x0612, 0x12, 0x00, 0x3a}, - {0x79, 0x0a3b, 0x0612, 0x12, 0x00, 0x3a}, - {0x7a, 0x2a1d, 0x0410, 0x10, 0x07, 0x34}, - {0x7b, 0x0e3b, 0x060f, 0x0f, 0x00, 0x1d}, - {0x7c, 0x0e7d, 0x060f, 0x0f, 0x00, 0x1d}, - {0x7d, 0x0eff, 0x060f, 0x0f, 0x00, 0x1d}, - {0x20, 0x0e3b, 0x0D16, 0x16, 0x00, 0x43}, - {0x21, 0x0e7d, 0x0D16, 0x16, 0x00, 0x43}, - {0x22, 0x0eff, 0x0D16, 0x16, 0x00, 0x43}, - {0x23, 0x0e3b, 0x0614, 0x14, 0x00, 0x41}, - {0x24, 0x0e7d, 0x0614, 0x14, 0x00, 0x41}, - {0x25, 0x0eff, 0x0614, 0x14, 0x00, 0x41}, - {0x26, 0x063b, 0x0c15, 0x15, 0x00, 0x42}, - {0x27, 0x067d, 0x0c15, 0x15, 0x00, 0x42}, - {0x28, 0x06ff, 0x0c15, 0x15, 0x00, 0x42}, - {0xff, 0x0000, 0x0000, 0x00, 0x00, 0x00} -}; - -static const struct SiS_StandTable_S XGI330_StandTable = { -/* ExtVGATable */ - 0x00, 0x00, 0x00, 0x0000, - {0x21, 0x0f, 0x00, 0x0e}, /* 0x21 = 0x01 | (0x20 = screen off) */ - 0x23, - {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e, - 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xea, 0x8c, 0xdf, 0x28, 0x40, 0xe7, 0x04, 0xa3, - 0xff}, - {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, - 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, - 0x01, 0x00, 0x00, 0x00}, - {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, - 0xff} -}; - -static const struct XGI_XG21CRT1Struct XGI_UpdateCRT1Table[] = { - {0x01, 0x27, 0x91, 0x8f, 0xc0}, /* 00 */ - {0x03, 0x4f, 0x83, 0x8f, 0xc0}, /* 01 */ - {0x05, 0x27, 0x91, 0x8f, 0xc0}, /* 02 */ - {0x06, 0x4f, 0x83, 0x8f, 0xc0}, /* 03 */ - {0x07, 0x4f, 0x83, 0x8f, 0xc0}, /* 04 */ - {0x0d, 0x27, 0x91, 0x8f, 0xc0}, /* 05 */ - {0x0e, 0x4f, 0x83, 0x8f, 0xc0}, /* 06 */ - {0x0f, 0x4f, 0x83, 0x5d, 0xc0}, /* 07 */ - {0x10, 0x4f, 0x83, 0x5d, 0xc0}, /* 08 */ - {0x11, 0x4f, 0x83, 0xdf, 0x0c}, /* 09 */ - {0x12, 0x4f, 0x83, 0xdf, 0x0c}, /* 10 */ - {0x13, 0x4f, 0x83, 0x8f, 0xc0}, /* 11 */ - {0x2e, 0x4f, 0x83, 0xdf, 0x0c}, /* 12 */ - {0x2e, 0x4f, 0x87, 0xdf, 0xc0}, /* 13 */ - {0x2f, 0x4f, 0x83, 0x8f, 0xc0}, /* 14 */ - {0x50, 0x27, 0x91, 0xdf, 0x0c}, /* 15 */ - {0x59, 0x27, 0x91, 0x8f, 0xc0} /* 16 */ -}; - -const struct XGI_CRT1TableStruct XGI_CRT1Table[] = { - { {0x2d, 0x28, 0x90, 0x2c, 0x90, 0x00, 0x04, 0x00, - 0xbf, 0x1f, 0x9c, 0x8e, 0x96, 0xb9, 0x30} }, /* 0x0 */ - { {0x2d, 0x28, 0x90, 0x2c, 0x90, 0x00, 0x04, 0x00, - 0x0b, 0x3e, 0xe9, 0x8b, 0xe7, 0x04, 0x00} }, /* 0x1 */ - { {0x3D, 0x31, 0x81, 0x37, 0x1F, 0x00, 0x05, 0x00, - 0x72, 0xF0, 0x58, 0x8C, 0x57, 0x73, 0xA0} }, /* 0x2 */ - { {0x4F, 0x3F, 0x93, 0x45, 0x0D, 0x00, 0x01, 0x00, - 0x24, 0xF5, 0x02, 0x88, 0xFF, 0x25, 0x90} }, /* 0x3 */ - { {0x5F, 0x50, 0x82, 0x55, 0x81, 0x00, 0x05, 0x00, - 0xBF, 0x1F, 0x9C, 0x8E, 0x96, 0xB9, 0x30} }, /* 0x4 */ - { {0x5F, 0x50, 0x82, 0x55, 0x81, 0x00, 0x05, 0x00, - 0x0B, 0x3E, 0xE9, 0x8B, 0xE7, 0x04, 0x00} }, /* 0x5 */ - { {0x63, 0x50, 0x86, 0x56, 0x9B, 0x00, 0x01, 0x00, - 0x06, 0x3E, 0xE8, 0x8B, 0xE7, 0xFF, 0x10} }, /* 0x6 */ - { {0x64, 0x4F, 0x88, 0x55, 0x9D, 0x00, 0x01, 0x00, - 0xF2, 0x1F, 0xE0, 0x83, 0xDF, 0xF3, 0x10} }, /* 0x7 */ - { {0x63, 0x4F, 0x87, 0x5A, 0x81, 0x00, 0x05, 0x00, - 0xFB, 0x1F, 0xE0, 0x83, 0xDF, 0xFC, 0x10} }, /* 0x8 */ - { {0x65, 0x4F, 0x89, 0x58, 0x80, 0x00, 0x05, 0x60, - 0xFB, 0x1F, 0xE0, 0x83, 0xDF, 0xFC, 0x80} }, /* 0x9 */ - { {0x65, 0x4F, 0x89, 0x58, 0x80, 0x00, 0x05, 0x60, - 0x01, 0x3E, 0xE0, 0x83, 0xDF, 0x02, 0x80} }, /* 0xa */ - { {0x67, 0x4F, 0x8B, 0x58, 0x81, 0x00, 0x05, 0x60, - 0x0D, 0x3E, 0xE0, 0x83, 0xDF, 0x0E, 0x90} }, /* 0xb */ - { {0x65, 0x4F, 0x89, 0x57, 0x9F, 0x00, 0x01, 0x00, - 0xFB, 0x1F, 0xE6, 0x8A, 0xDF, 0xFC, 0x10} }, /* 0xc */ - /* 0D (800x600,56Hz) */ - { {0x7B, 0x63, 0x9F, 0x6A, 0x93, 0x00, 0x05, 0x00, - /* (VCLK 36.0MHz) */ - 0x6F, 0xF0, 0x58, 0x8A, 0x57, 0x70, 0xA0} }, - /* 0E (800x600,60Hz) */ - { {0x7F, 0x63, 0x83, 0x6C, 0x1C, 0x00, 0x06, 0x00, - /* (VCLK 40.0MHz) */ - 0x72, 0xF0, 0x58, 0x8C, 0x57, 0x73, 0xA0} }, - /* 0F (800x600,72Hz) */ - { {0x7D, 0x63, 0x81, 0x6E, 0x1D, 0x00, 0x06, 0x00, - /* (VCLK 50.0MHz) */ - 0x98, 0xF0, 0x7C, 0x82, 0x57, 0x99, 0x80} }, - /* 10 (800x600,75Hz) */ - { {0x7F, 0x63, 0x83, 0x69, 0x13, 0x00, 0x06, 0x00, - /* (VCLK 49.5MHz) */ - 0x6F, 0xF0, 0x58, 0x8B, 0x57, 0x70, 0xA0} }, - /* 11 (800x600,85Hz) */ - { {0x7E, 0x63, 0x82, 0x6B, 0x13, 0x00, 0x06, 0x00, - /* (VCLK 56.25MHz) */ - 0x75, 0xF0, 0x58, 0x8B, 0x57, 0x76, 0xA0} }, - /* 12 (800x600,100Hz) */ - { {0x81, 0x63, 0x85, 0x6D, 0x18, 0x00, 0x06, 0x60, - /* (VCLK 75.8MHz) */ - 0x7A, 0xF0, 0x58, 0x8B, 0x57, 0x7B, 0xA0} }, - /* 13 (800x600,120Hz) */ - { {0x83, 0x63, 0x87, 0x6E, 0x19, 0x00, 0x06, 0x60, - /* (VCLK 79.411MHz) */ - 0x81, 0xF0, 0x58, 0x8B, 0x57, 0x82, 0xA0} }, - /* 14 (800x600,160Hz) */ - { {0x85, 0x63, 0x89, 0x6F, 0x1A, 0x00, 0x06, 0x60, - /* (VCLK 105.822MHz) */ - 0x91, 0xF0, 0x58, 0x8B, 0x57, 0x92, 0xA0} }, - { {0x99, 0x7F, 0x9D, 0x84, 0x1A, 0x00, 0x02, 0x00, - 0x96, 0x1F, 0x7F, 0x83, 0x7F, 0x97, 0x10} }, /* 0x15 */ - { {0xA3, 0x7F, 0x87, 0x86, 0x97, 0x00, 0x02, 0x00, - 0x24, 0xF5, 0x02, 0x88, 0xFF, 0x25, 0x90} }, /* 0x16 */ - { {0xA1, 0x7F, 0x85, 0x86, 0x97, 0x00, 0x02, 0x00, - 0x24, 0xF5, 0x02, 0x88, 0xFF, 0x25, 0x90} }, /* 0x17 */ - { {0x9F, 0x7F, 0x83, 0x85, 0x91, 0x00, 0x02, 0x00, - 0x1E, 0xF5, 0x00, 0x83, 0xFF, 0x1F, 0x90} }, /* 0x18 */ - { {0xA7, 0x7F, 0x8B, 0x89, 0x95, 0x00, 0x02, 0x00, - 0x26, 0xF5, 0x00, 0x83, 0xFF, 0x27, 0x90} }, /* 0x19 */ - { {0xA9, 0x7F, 0x8D, 0x8C, 0x9A, 0x00, 0x02, 0x62, - 0x2C, 0xF5, 0x00, 0x83, 0xFF, 0x2D, 0x14} }, /* 0x1a */ - { {0xAB, 0x7F, 0x8F, 0x8D, 0x9B, 0x00, 0x02, 0x62, - 0x35, 0xF5, 0x00, 0x83, 0xFF, 0x36, 0x14} }, /* 0x1b */ - { {0xCF, 0x9F, 0x93, 0xB2, 0x01, 0x00, 0x03, 0x00, - 0x14, 0xBA, 0x00, 0x83, 0xFF, 0x15, 0x00} }, /* 0x1c */ - { {0xCE, 0x9F, 0x92, 0xA9, 0x17, 0x00, 0x07, 0x00, - 0x28, 0x5A, 0x00, 0x83, 0xFF, 0x29, 0x89} }, /* 0x1d */ - { {0xCE, 0x9F, 0x92, 0xA5, 0x17, 0x00, 0x07, 0x00, - 0x28, 0x5A, 0x00, 0x83, 0xFF, 0x29, 0x89} }, /* 0x1e */ - { {0xD3, 0x9F, 0x97, 0xAB, 0x1F, 0x00, 0x07, 0x00, - 0x2E, 0x5A, 0x00, 0x83, 0xFF, 0x2F, 0x89} }, /* 0x1f */ - { {0x09, 0xC7, 0x8D, 0xD3, 0x0B, 0x01, 0x04, 0x00, - 0xE0, 0x10, 0xB0, 0x83, 0xAF, 0xE1, 0x2F} }, /* 0x20 */ - { {0x09, 0xC7, 0x8D, 0xD3, 0x0B, 0x01, 0x04, 0x00, - 0xE0, 0x10, 0xB0, 0x83, 0xAF, 0xE1, 0x2F} }, /* 0x21 */ - { {0x09, 0xC7, 0x8D, 0xD3, 0x0B, 0x01, 0x04, 0x00, - 0xE0, 0x10, 0xB0, 0x83, 0xAF, 0xE1, 0x2F} }, /* 0x22 */ - { {0x09, 0xC7, 0x8D, 0xD3, 0x0B, 0x01, 0x04, 0x00, - 0xE0, 0x10, 0xB0, 0x83, 0xAF, 0xE1, 0x2F} }, /* 0x23 */ - { {0x09, 0xC7, 0x8D, 0xD3, 0x0B, 0x01, 0x04, 0x00, - 0xE0, 0x10, 0xB0, 0x83, 0xAF, 0xE1, 0x2F} }, /* 0x24 */ - { {0x09, 0xC7, 0x8D, 0xD3, 0x0B, 0x01, 0x04, 0x00, - 0xE0, 0x10, 0xB0, 0x83, 0xAF, 0xE1, 0x2F} }, /* 0x25 */ - { {0x09, 0xC7, 0x8D, 0xD3, 0x0B, 0x01, 0x04, 0x00, - 0xE0, 0x10, 0xB0, 0x83, 0xAF, 0xE1, 0x2F} }, /* 0x26 */ - { {0x40, 0xEF, 0x84, 0x03, 0x1D, 0x41, 0x01, 0x00, - 0xDA, 0x1F, 0xA0, 0x83, 0x9F, 0xDB, 0x1F} }, /* 0x27 */ - { {0x43, 0xEF, 0x87, 0x06, 0x00, 0x41, 0x05, 0x62, - 0xD4, 0x1F, 0xA0, 0x83, 0x9F, 0xD5, 0x9F} }, /* 0x28 */ - { {0x45, 0xEF, 0x89, 0x07, 0x01, 0x41, 0x05, 0x62, - 0xD9, 0x1F, 0xA0, 0x83, 0x9F, 0xDA, 0x9F} }, /* 0x29 */ - { {0x40, 0xEF, 0x84, 0x03, 0x1D, 0x41, 0x01, 0x00, - 0xDA, 0x1F, 0xA0, 0x83, 0x9F, 0xDB, 0x1F} }, /* 0x2a */ - { {0x40, 0xEF, 0x84, 0x03, 0x1D, 0x41, 0x01, 0x00, - 0xDA, 0x1F, 0xA0, 0x83, 0x9F, 0xDB, 0x1F} }, /* 0x2b */ - { {0x40, 0xEF, 0x84, 0x03, 0x1D, 0x41, 0x01, 0x00, - 0xDA, 0x1F, 0xA0, 0x83, 0x9F, 0xDB, 0x1F} }, /* 0x2c */ - { {0x59, 0xFF, 0x9D, 0x17, 0x13, 0x41, 0x05, 0x44, - 0x33, 0xBA, 0x00, 0x83, 0xFF, 0x34, 0x0F} }, /* 0x2d */ - { {0x5B, 0xFF, 0x9F, 0x18, 0x14, 0x41, 0x05, 0x44, - 0x38, 0xBA, 0x00, 0x83, 0xFF, 0x39, 0x0F} }, /* 0x2e */ - { {0x5B, 0xFF, 0x9F, 0x18, 0x14, 0x41, 0x05, 0x44, - 0x3D, 0xBA, 0x00, 0x83, 0xFF, 0x3E, 0x0F} }, /* 0x2f */ - { {0x5D, 0xFF, 0x81, 0x19, 0x95, 0x41, 0x05, 0x44, - 0x41, 0xBA, 0x00, 0x84, 0xFF, 0x42, 0x0F} }, /* 0x30 */ - { {0x55, 0xFF, 0x99, 0x0D, 0x0C, 0x41, 0x05, 0x00, - 0x3E, 0xBA, 0x00, 0x84, 0xFF, 0x3F, 0x0F} }, /* 0x31 */ - { {0x7F, 0x63, 0x83, 0x6C, 0x1C, 0x00, 0x06, 0x00, - 0x72, 0xBA, 0x27, 0x8B, 0xDF, 0x73, 0x80} }, /* 0x32 */ - { {0x7F, 0x63, 0x83, 0x69, 0x13, 0x00, 0x06, 0x00, - 0x6F, 0xBA, 0x26, 0x89, 0xDF, 0x6F, 0x80} }, /* 0x33 */ - { {0x7F, 0x63, 0x82, 0x6B, 0x13, 0x00, 0x06, 0x00, - 0x75, 0xBA, 0x29, 0x8C, 0xDF, 0x75, 0x80} }, /* 0x34 */ - { {0xA3, 0x7F, 0x87, 0x86, 0x97, 0x00, 0x02, 0x00, - 0x24, 0xF1, 0xAF, 0x85, 0x3F, 0x25, 0xB0} }, /* 0x35 */ - { {0x9F, 0x7F, 0x83, 0x85, 0x91, 0x00, 0x02, 0x00, - 0x1E, 0xF1, 0xAD, 0x81, 0x3F, 0x1F, 0xB0} }, /* 0x36 */ - { {0xA7, 0x7F, 0x88, 0x89, 0x15, 0x00, 0x02, 0x00, - 0x26, 0xF1, 0xB1, 0x85, 0x3F, 0x27, 0xB0} }, /* 0x37 */ - { {0xCE, 0x9F, 0x92, 0xA9, 0x17, 0x00, 0x07, 0x00, - 0x28, 0xC4, 0x7A, 0x8E, 0xCF, 0x29, 0xA1} }, /* 0x38 */ - { {0xCE, 0x9F, 0x92, 0xA5, 0x17, 0x00, 0x07, 0x00, - 0x28, 0xD4, 0x7A, 0x8E, 0xCF, 0x29, 0xA1} }, /* 0x39 */ - { {0xD3, 0x9F, 0x97, 0xAB, 0x1F, 0x00, 0x07, 0x00, - 0x2E, 0xD4, 0x7D, 0x81, 0xCF, 0x2F, 0xA1} }, /* 0x3a */ - { {0xDC, 0x9F, 0x00, 0xAB, 0x19, 0x00, 0x07, 0x00, - 0xE6, 0xEF, 0xC0, 0xC3, 0xBF, 0xE7, 0x90} }, /* 0x3b */ - { {0x6B, 0x59, 0x8F, 0x5E, 0x8C, 0x00, 0x05, 0x00, - 0x0B, 0x3E, 0xE9, 0x8B, 0xE7, 0x04, 0x00} }, /* 0x3c */ - { {0x7B, 0x63, 0x9F, 0x6A, 0x93, 0x00, 0x05, 0x00, - 0x6F, 0xF0, 0x58, 0x8A, 0x57, 0x70, 0xA0} }, /* 0x3d */ - { {0x86, 0x6A, 0x8a, 0x74, 0x06, 0x00, 0x02, 0x00, - 0x8c, 0x15, 0x4f, 0x83, 0xef, 0x8d, 0x30} }, /* 0x3e */ - { {0x81, 0x6A, 0x85, 0x70, 0x00, 0x00, 0x02, 0x00, - 0x0f, 0x3e, 0xeb, 0x8e, 0xdf, 0x10, 0x00} }, /* 0x3f */ - { {0xCE, 0x9F, 0x92, 0xA9, 0x17, 0x00, 0x07, 0x00, - 0x20, 0xF5, 0x03, 0x88, 0xFF, 0x21, 0x90} }, /* 0x40 */ - { {0xE6, 0xAE, 0x8A, 0xBD, 0x90, 0x00, 0x03, 0x00, - 0x3D, 0x10, 0x1A, 0x8D, 0x19, 0x3E, 0x2F} }, /* 0x41 */ - { {0xB9, 0x8F, 0x9D, 0x9B, 0x8A, 0x00, 0x06, 0x00, - 0x7D, 0xFF, 0x60, 0x83, 0x5F, 0x7E, 0x90} }, /* 0x42 */ - { {0xC3, 0x8F, 0x87, 0x9B, 0x0B, 0x00, 0x07, 0x00, - 0x82, 0xFF, 0x60, 0x83, 0x5F, 0x83, 0x90} }, /* 0x43 */ - { {0xAD, 0x7F, 0x91, 0x8E, 0x9C, 0x00, 0x02, 0x82, - 0x49, 0xF5, 0x00, 0x83, 0xFF, 0x4A, 0x90} }, /* 0x44 */ - { {0xCD, 0x9F, 0x91, 0xA7, 0x19, 0x00, 0x07, 0x60, - 0xE6, 0xFF, 0xC0, 0x83, 0xBF, 0xE7, 0x90} }, /* 0x45 */ - { {0xD3, 0x9F, 0x97, 0xAB, 0x1F, 0x00, 0x07, 0x60, - 0xF1, 0xFF, 0xC0, 0x83, 0xBF, 0xF2, 0x90} }, /* 0x46 */ - { {0xD7, 0x9F, 0x9B, 0xAC, 0x1E, 0x00, 0x07, 0x00, - 0x03, 0xDE, 0xC0, 0x84, 0xBF, 0x04, 0x90} } /* 0x47 */ -}; - -/*add for new UNIVGABIOS*/ -static const struct SiS_LCDData XGI_StLCD1024x768Data[] = { - {62, 25, 800, 546, 1344, 806}, - {32, 15, 930, 546, 1344, 806}, - {62, 25, 800, 546, 1344, 806}, /*chiawenfordot9->dot8*/ - {104, 45, 945, 496, 1344, 806}, - {62, 25, 800, 546, 1344, 806}, - {31, 18, 1008, 624, 1344, 806}, - {1, 1, 1344, 806, 1344, 806} -}; - -static const struct SiS_LCDData XGI_ExtLCD1024x768Data[] = { - {42, 25, 1536, 419, 1344, 806}, - {48, 25, 1536, 369, 1344, 806}, - {42, 25, 1536, 419, 1344, 806}, - {48, 25, 1536, 369, 1344, 806}, - {12, 5, 896, 500, 1344, 806}, - {42, 25, 1024, 625, 1344, 806}, - {1, 1, 1344, 806, 1344, 806}, - {12, 5, 896, 500, 1344, 806}, - {42, 25, 1024, 625, 1344, 806}, - {1, 1, 1344, 806, 1344, 806}, - {12, 5, 896, 500, 1344, 806}, - {42, 25, 1024, 625, 1344, 806}, - {1, 1, 1344, 806, 1344, 806} -}; - -static const struct SiS_LCDData XGI_CetLCD1024x768Data[] = { - {1, 1, 1344, 806, 1344, 806}, /* ; 00 (320x200,320x400, - * 640x200,640x400) - */ - {1, 1, 1344, 806, 1344, 806}, /* 01 (320x350,640x350) */ - {1, 1, 1344, 806, 1344, 806}, /* 02 (360x400,720x400) */ - {1, 1, 1344, 806, 1344, 806}, /* 03 (720x350) */ - {1, 1, 1344, 806, 1344, 806}, /* 04 (640x480x60Hz) */ - {1, 1, 1344, 806, 1344, 806}, /* 05 (800x600x60Hz) */ - {1, 1, 1344, 806, 1344, 806} /* 06 (1024x768x60Hz) */ -}; - -static const struct SiS_LCDData XGI_StLCD1280x1024Data[] = { - {22, 5, 800, 510, 1650, 1088}, - {22, 5, 800, 510, 1650, 1088}, - {176, 45, 900, 510, 1650, 1088}, - {176, 45, 900, 510, 1650, 1088}, - {22, 5, 800, 510, 1650, 1088}, - {13, 5, 1024, 675, 1560, 1152}, - {16, 9, 1266, 804, 1688, 1072}, - {1, 1, 1688, 1066, 1688, 1066} -}; - -static const struct SiS_LCDData XGI_ExtLCD1280x1024Data[] = { - {211, 60, 1024, 501, 1688, 1066}, - {211, 60, 1024, 508, 1688, 1066}, - {211, 60, 1024, 501, 1688, 1066}, - {211, 60, 1024, 508, 1688, 1066}, - {211, 60, 1024, 500, 1688, 1066}, - {211, 75, 1024, 625, 1688, 1066}, - {211, 120, 1280, 798, 1688, 1066}, - {1, 1, 1688, 1066, 1688, 1066} -}; - -static const struct SiS_LCDData XGI_CetLCD1280x1024Data[] = { - {1, 1, 1688, 1066, 1688, 1066}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {1, 1, 1688, 1066, 1688, 1066}, /* 01 (320x350,640x350) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 02 (360x400,720x400) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 03 (720x350) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 04 (640x480x60Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 05 (800x600x60Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 06 (1024x768x60Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 07 (1280x1024x60Hz) */ - {1, 1, 1688, 1066, 1688, 1066} /* 08 (1400x1050x60Hz) */ -}; - -static const struct SiS_LCDData xgifb_lcd_1400x1050[] = { - {211, 100, 2100, 408, 1688, 1066}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {211, 64, 1536, 358, 1688, 1066}, /* 01 (320x350,640x350) */ - {211, 100, 2100, 408, 1688, 1066}, /* 02 (360x400,720x400) */ - {211, 64, 1536, 358, 1688, 1066}, /* 03 (720x350) */ - {211, 48, 840, 488, 1688, 1066}, /* 04 (640x480x60Hz) */ - {211, 72, 1008, 609, 1688, 1066}, /* 05 (800x600x60Hz) */ - {211, 128, 1400, 776, 1688, 1066}, /* 06 (1024x768x60Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* 07 (1280x1024x60Hz - * w/o Scaling) - */ - {1, 1, 1688, 1066, 1688, 1066} /* 08 (1400x1050x60Hz) */ -}; - -static const struct SiS_LCDData XGI_ExtLCD1600x1200Data[] = { - {4, 1, 1620, 420, 2160, 1250}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {27, 7, 1920, 375, 2160, 1250}, /* 01 (320x350,640x350) */ - {4, 1, 1620, 420, 2160, 1250}, /* 02 (360x400,720x400)*/ - {27, 7, 1920, 375, 2160, 1250}, /* 03 (720x350) */ - {27, 4, 800, 500, 2160, 1250}, /* 04 (640x480x60Hz) */ - {4, 1, 1080, 625, 2160, 1250}, /* 05 (800x600x60Hz) */ - {5, 2, 1350, 800, 2160, 1250}, /* 06 (1024x768x60Hz) */ - {27, 16, 1500, 1064, 2160, 1250}, /* 07 (1280x1024x60Hz) */ - {9, 7, 1920, 1106, 2160, 1250}, /* 08 (1400x1050x60Hz) */ - {1, 1, 2160, 1250, 2160, 1250} /* 09 (1600x1200x60Hz) ;302lv */ -}; - -static const struct SiS_LCDData XGI_StLCD1600x1200Data[] = { - {27, 4, 800, 500, 2160, 1250}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {27, 4, 800, 500, 2160, 1250}, /* 01 (320x350,640x350) */ - {27, 4, 800, 500, 2160, 1250}, /* 02 (360x400,720x400) */ - {27, 4, 800, 500, 2160, 1250}, /* 03 (720x350) */ - {27, 4, 800, 500, 2160, 1250}, /* 04 (320x240,640x480) */ - {4, 1, 1080, 625, 2160, 1250}, /* 05 (400x300,800x600) */ - {5, 2, 1350, 800, 2160, 1250}, /* 06 (512x384,1024x768) */ - {135, 88, 1600, 1100, 2160, 1250}, /* 07 (1280x1024) */ - {1, 1, 1800, 1500, 2160, 1250}, /* 08 (1400x1050) */ - {1, 1, 2160, 1250, 2160, 1250} /* 09 (1600x1200) */ -}; - -#define XGI_CetLCD1400x1050Data XGI_CetLCD1280x1024Data - -static const struct SiS_LCDData XGI_NoScalingData[] = { - {1, 1, 800, 449, 800, 449}, - {1, 1, 800, 449, 800, 449}, - {1, 1, 900, 449, 900, 449}, - {1, 1, 900, 449, 900, 449}, - {1, 1, 800, 525, 800, 525}, - {1, 1, 1056, 628, 1056, 628}, - {1, 1, 1344, 806, 1344, 806}, - {1, 1, 1688, 1066, 1688, 1066} -}; - -static const struct SiS_LCDData XGI_ExtLCD1024x768x75Data[] = { - {42, 25, 1536, 419, 1344, 806}, /* ; 00 (320x200,320x400, - * 640x200,640x400) - */ - {48, 25, 1536, 369, 1344, 806}, /* ; 01 (320x350,640x350) */ - {42, 25, 1536, 419, 1344, 806}, /* ; 02 (360x400,720x400) */ - {48, 25, 1536, 369, 1344, 806}, /* ; 03 (720x350) */ - {8, 5, 1312, 500, 1312, 800}, /* ; 04 (640x480x75Hz) */ - {41, 25, 1024, 625, 1312, 800}, /* ; 05 (800x600x75Hz) */ - {1, 1, 1312, 800, 1312, 800} /* ; 06 (1024x768x75Hz) */ -}; - -static const struct SiS_LCDData XGI_CetLCD1024x768x75Data[] = { - {1, 1, 1312, 800, 1312, 800}, /* ; 00 (320x200,320x400, - * 640x200,640x400) - */ - {1, 1, 1312, 800, 1312, 800}, /* ; 01 (320x350,640x350) */ - {1, 1, 1312, 800, 1312, 800}, /* ; 02 (360x400,720x400) */ - {1, 1, 1312, 800, 1312, 800}, /* ; 03 (720x350) */ - {1, 1, 1312, 800, 1312, 800}, /* ; 04 (640x480x75Hz) */ - {1, 1, 1312, 800, 1312, 800}, /* ; 05 (800x600x75Hz) */ - {1, 1, 1312, 800, 1312, 800} /* ; 06 (1024x768x75Hz) */ -}; - -static const struct SiS_LCDData xgifb_lcd_1280x1024x75[] = { - {211, 60, 1024, 501, 1688, 1066}, /* ; 00 (320x200,320x400, - * 640x200,640x400) - */ - {211, 60, 1024, 508, 1688, 1066}, /* ; 01 (320x350,640x350) */ - {211, 60, 1024, 501, 1688, 1066}, /* ; 02 (360x400,720x400) */ - {211, 60, 1024, 508, 1688, 1066}, /* ; 03 (720x350) */ - {211, 45, 768, 498, 1688, 1066}, /* ; 04 (640x480x75Hz) */ - {211, 75, 1024, 625, 1688, 1066}, /* ; 05 (800x600x75Hz) */ - {211, 120, 1280, 798, 1688, 1066}, /* ; 06 (1024x768x75Hz) */ - {1, 1, 1688, 1066, 1688, 1066} /* ; 07 (1280x1024x75Hz) */ -}; - -#define XGI_CetLCD1280x1024x75Data XGI_CetLCD1280x1024Data - -static const struct SiS_LCDData XGI_NoScalingDatax75[] = { - {1, 1, 800, 449, 800, 449}, /* ; 00 (320x200, 320x400, - * 640x200, 640x400) - */ - {1, 1, 800, 449, 800, 449}, /* ; 01 (320x350, 640x350) */ - {1, 1, 900, 449, 900, 449}, /* ; 02 (360x400, 720x400) */ - {1, 1, 900, 449, 900, 449}, /* ; 03 (720x350) */ - {1, 1, 840, 500, 840, 500}, /* ; 04 (640x480x75Hz) */ - {1, 1, 1056, 625, 1056, 625}, /* ; 05 (800x600x75Hz) */ - {1, 1, 1312, 800, 1312, 800}, /* ; 06 (1024x768x75Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* ; 07 (1280x1024x75Hz) */ - {1, 1, 1688, 1066, 1688, 1066}, /* ; 08 (1400x1050x75Hz)*/ - {1, 1, 2160, 1250, 2160, 1250}, /* ; 09 (1600x1200x75Hz) */ - {1, 1, 1688, 806, 1688, 806} /* ; 0A (1280x768x75Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_ExtLCDDes1024x768Data[] = { - {9, 1057, 0, 771}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {9, 1057, 0, 771}, /* ; 01 (320x350,640x350) */ - {9, 1057, 0, 771}, /* ; 02 (360x400,720x400) */ - {9, 1057, 0, 771}, /* ; 03 (720x350) */ - {9, 1057, 0, 771}, /* ; 04 (640x480x60Hz) */ - {9, 1057, 0, 771}, /* ; 05 (800x600x60Hz) */ - {9, 1057, 805, 770} /* ; 06 (1024x768x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_StLCDDes1024x768Data[] = { - {9, 1057, 737, 703}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {9, 1057, 686, 651}, /* ; 01 (320x350,640x350) */ - {9, 1057, 737, 703}, /* ; 02 (360x400,720x400) */ - {9, 1057, 686, 651}, /* ; 03 (720x350) */ - {9, 1057, 776, 741}, /* ; 04 (640x480x60Hz) */ - {9, 1057, 0, 771}, /* ; 05 (800x600x60Hz) */ - {9, 1057, 805, 770} /* ; 06 (1024x768x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_CetLCDDes1024x768Data[] = { - {1152, 856, 622, 587}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {1152, 856, 597, 562}, /* ; 01 (320x350,640x350) */ - {1152, 856, 622, 587}, /* ; 02 (360x400,720x400) */ - {1152, 856, 597, 562}, /* ; 03 (720x350) */ - {1152, 856, 662, 627}, /* ; 04 (640x480x60Hz) */ - {1232, 936, 722, 687}, /* ; 05 (800x600x60Hz) */ - {0, 1048, 805, 770} /* ; 06 (1024x768x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_ExtLCDDLDes1280x1024Data[] = { - {18, 1346, 981, 940}, /* 00 (320x200,320x400,640x200,640x400) */ - {18, 1346, 926, 865}, /* 01 (320x350,640x350) */ - {18, 1346, 981, 940}, /* 02 (360x400,720x400) */ - {18, 1346, 926, 865}, /* 03 (720x350) */ - {18, 1346, 0, 1025}, /* 04 (640x480x60Hz) */ - {18, 1346, 0, 1025}, /* 05 (800x600x60Hz) */ - {18, 1346, 1065, 1024}, /* 06 (1024x768x60Hz) */ - {18, 1346, 1065, 1024} /* 07 (1280x1024x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_StLCDDLDes1280x1024Data[] = { - {18, 1346, 970, 907}, /* 00 (320x200,320x400,640x200,640x400) */ - {18, 1346, 917, 854}, /* 01 (320x350,640x350) */ - {18, 1346, 970, 907}, /* 02 (360x400,720x400) */ - {18, 1346, 917, 854}, /* 03 (720x350) */ - {18, 1346, 0, 1025}, /* 04 (640x480x60Hz) */ - {18, 1346, 0, 1025}, /* 05 (800x600x60Hz) */ - {18, 1346, 1065, 1024}, /* 06 (1024x768x60Hz) */ - {18, 1346, 1065, 1024} /* 07 (1280x1024x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_CetLCDDLDes1280x1024Data[] = { - {1368, 1008, 752, 711}, /* 00 (320x200,320x400,640x200,640x400) */ - {1368, 1008, 729, 688}, /* 01 (320x350,640x350) */ - {1368, 1008, 752, 711}, /* 02 (360x400,720x400) */ - {1368, 1008, 729, 688}, /* 03 (720x350) */ - {1368, 1008, 794, 753}, /* 04 (640x480x60Hz) */ - {1448, 1068, 854, 813}, /* 05 (800x600x60Hz) */ - {1560, 1200, 938, 897}, /* 06 (1024x768x60Hz) */ - {18, 1346, 1065, 1024} /* 07 (1280x1024x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_ExtLCDDes1280x1024Data[] = { - {9, 1337, 981, 940}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {9, 1337, 926, 884}, /* ; 01 (320x350,640x350) alan, 2003/09/30 */ - {9, 1337, 981, 940}, /* ; 02 (360x400,720x400) */ - {9, 1337, 926, 884}, /* ; 03 (720x350) alan, 2003/09/30 */ - {9, 1337, 0, 1025}, /* ; 04 (640x480x60Hz) */ - {9, 1337, 0, 1025}, /* ; 05 (800x600x60Hz) */ - {9, 1337, 1065, 1024}, /* ; 06 (1024x768x60Hz) */ - {9, 1337, 1065, 1024} /* ; 07 (1280x1024x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_StLCDDes1280x1024Data[] = { - {9, 1337, 970, 907}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {9, 1337, 917, 854}, /* ; 01 (320x350,640x350) */ - {9, 1337, 970, 907}, /* ; 02 (360x400,720x400) */ - {9, 1337, 917, 854}, /* ; 03 (720x350) */ - {9, 1337, 0, 1025}, /* ; 04 (640x480x60Hz) */ - {9, 1337, 0, 1025}, /* ; 05 (800x600x60Hz) */ - {9, 1337, 1065, 1024}, /* ; 06 (1024x768x60Hz) */ - {9, 1337, 1065, 1024} /* ; 07 (1280x1024x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_CetLCDDes1280x1024Data[] = { - {1368, 1008, 752, 711}, /* 00 (320x200,320x400,640x200,640x400) */ - {1368, 1008, 729, 688}, /* 01 (320x350,640x350) */ - {1368, 1008, 752, 711}, /* 02 (360x400,720x400) */ - {1368, 1008, 729, 688}, /* 03 (720x350) */ - {1368, 1008, 794, 753}, /* 04 (640x480x60Hz) */ - {1448, 1068, 854, 813}, /* 05 (800x600x60Hz) */ - {1560, 1200, 938, 897}, /* 06 (1024x768x60Hz) */ - {9, 1337, 1065, 1024} /* 07 (1280x1024x60Hz) */ -}; - -static const struct XGI_LCDDesStruct xgifb_lcddldes_1400x1050[] = { - {18, 1464, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */ - {18, 1464, 0, 1051}, /* 01 (320x350,640x350) */ - {18, 1464, 0, 1051}, /* 02 (360x400,720x400) */ - {18, 1464, 0, 1051}, /* 03 (720x350) */ - {18, 1464, 0, 1051}, /* 04 (640x480x60Hz) */ - {18, 1464, 0, 1051}, /* 05 (800x600x60Hz) */ - {18, 1464, 0, 1051}, /* 06 (1024x768x60Hz) */ - {1646, 1406, 1053, 1038}, /* 07 (1280x1024x60Hz) */ - {18, 1464, 0, 1051} /* 08 (1400x1050x60Hz) */ -}; - -static const struct XGI_LCDDesStruct xgifb_lcddes_1400x1050[] = { - {9, 1455, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */ - {9, 1455, 0, 1051}, /* 01 (320x350,640x350) */ - {9, 1455, 0, 1051}, /* 02 (360x400,720x400) */ - {9, 1455, 0, 1051}, /* 03 (720x350) */ - {9, 1455, 0, 1051}, /* 04 (640x480x60Hz) */ - {9, 1455, 0, 1051}, /* 05 (800x600x60Hz) */ - {9, 1455, 0, 1051}, /* 06 (1024x768x60Hz) */ - {1637, 1397, 1053, 1038}, /* 07 (1280x1024x60Hz) */ - {9, 1455, 0, 1051} /* 08 (1400x1050x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_CetLCDDes1400x1050Data[] = { - {1308, 1068, 781, 766}, /* 00 (320x200,320x400,640x200,640x400) */ - {1308, 1068, 781, 766}, /* 01 (320x350,640x350) */ - {1308, 1068, 781, 766}, /* 02 (360x400,720x400) */ - {1308, 1068, 781, 766}, /* 03 (720x350) */ - {1308, 1068, 781, 766}, /* 04 (640x480x60Hz) */ - {1388, 1148, 841, 826}, /* 05 (800x600x60Hz) */ - {1490, 1250, 925, 910}, /* 06 (1024x768x60Hz) */ - {1646, 1406, 1053, 1038}, /* 07 (1280x1024x60Hz) */ - {18, 1464, 0, 1051} /* 08 (1400x1050x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_CetLCDDes1400x1050Data2[] = { - {0, 1448, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */ - {0, 1448, 0, 1051}, /* 01 (320x350,640x350) */ - {0, 1448, 0, 1051}, /* 02 (360x400,720x400) */ - {0, 1448, 0, 1051}, /* 03 (720x350) */ - {0, 1448, 0, 1051} /* 04 (640x480x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_ExtLCDDLDes1600x1200Data[] = { - {18, 1682, 0, 1201}, /* 00 (320x200,320x400,640x200,640x400) */ - {18, 1682, 0, 1201}, /* 01 (320x350,640x350) */ - {18, 1682, 0, 1201}, /* 02 (360x400,720x400) */ - {18, 1682, 0, 1201}, /* 03 (720x350) */ - {18, 1682, 0, 1201}, /* 04 (640x480x60Hz) */ - {18, 1682, 0, 1201}, /* 05 (800x600x60Hz) */ - {18, 1682, 0, 1201}, /* 06 (1024x768x60Hz) */ - {18, 1682, 0, 1201}, /* 07 (1280x1024x60Hz) */ - {18, 1682, 0, 1201}, /* 08 (1400x1050x60Hz) */ - {18, 1682, 0, 1201} /* 09 (1600x1200x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_StLCDDLDes1600x1200Data[] = { - {18, 1682, 1150, 1101}, /* 00 (320x200,320x400,640x200,640x400) */ - {18, 1682, 1083, 1034}, /* 01 (320x350,640x350) */ - {18, 1682, 1150, 1101}, /* 02 (360x400,720x400) */ - {18, 1682, 1083, 1034}, /* 03 (720x350) */ - {18, 1682, 0, 1201}, /* 04 (640x480x60Hz) */ - {18, 1682, 0, 1201}, /* 05 (800x600x60Hz) */ - {18, 1682, 0, 1201}, /* 06 (1024x768x60Hz) */ - {18, 1682, 1232, 1183}, /* 07 (1280x1024x60Hz) */ - {18, 1682, 0, 1201}, /* 08 (1400x1050x60Hz) */ - {18, 1682, 0, 1201} /* 09 (1600x1200x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_ExtLCDDes1600x1200Data[] = { - {9, 1673, 0, 1201}, /* 00 (320x200,320x400,640x200,640x400) */ - {9, 1673, 0, 1201}, /* 01 (320x350,640x350) */ - {9, 1673, 0, 1201}, /* 02 (360x400,720x400) */ - {9, 1673, 0, 1201}, /* 03 (720x350) */ - {9, 1673, 0, 1201}, /* 04 (640x480x60Hz) */ - {9, 1673, 0, 1201}, /* 05 (800x600x60Hz) */ - {9, 1673, 0, 1201}, /* 06 (1024x768x60Hz) */ - {9, 1673, 0, 1201}, /* 07 (1280x1024x60Hz) */ - {9, 1673, 0, 1201}, /* 08 (1400x1050x60Hz) */ - {9, 1673, 0, 1201} /* 09 (1600x1200x60Hz) */ -}; - -static const struct XGI_LCDDesStruct XGI_StLCDDes1600x1200Data[] = { - {9, 1673, 1150, 1101}, /* 00 (320x200,320x400,640x200,640x400) */ - {9, 1673, 1083, 1034}, /* 01 (320x350,640x350) */ - {9, 1673, 1150, 1101}, /* 02 (360x400,720x400) */ - {9, 1673, 1083, 1034}, /* 03 (720x350) */ - {9, 1673, 0, 1201}, /* 04 (640x480x60Hz) */ - {9, 1673, 0, 1201}, /* 05 (800x600x60Hz) */ - {9, 1673, 0, 1201}, /* 06 (1024x768x60Hz) */ - {9, 1673, 1232, 1183}, /* 07 (1280x1024x60Hz) */ - {9, 1673, 0, 1201}, /* 08 (1400x1050x60Hz) */ - {9, 1673, 0, 1201} /* 09 (1600x1200x60Hz) */ -}; - -static const struct XGI330_LCDDataDesStruct2 XGI_NoScalingDesData[] = { - {9, 657, 448, 405, 96, 2}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {9, 657, 448, 355, 96, 2}, /* 01 (320x350,640x350) */ - {9, 657, 448, 405, 96, 2}, /* 02 (360x400,720x400) */ - {9, 657, 448, 355, 96, 2}, /* 03 (720x350) */ - {9, 657, 1, 483, 96, 2}, /* 04 (640x480x60Hz) */ - {9, 849, 627, 600, 128, 4}, /* 05 (800x600x60Hz) */ - {9, 1057, 805, 770, 0136, 6}, /* 06 (1024x768x60Hz) */ - {9, 1337, 0, 1025, 112, 3}, /* 07 (1280x1024x60Hz) */ - {9, 1457, 0, 1051, 112, 3}, /* 08 (1400x1050x60Hz)*/ - {9, 1673, 0, 1201, 192, 3}, /* 09 (1600x1200x60Hz) */ - {9, 1337, 0, 771, 112, 6} /* 0A (1280x768x60Hz) */ -}; - -/* ;;1024x768x75Hz */ -static const struct XGI_LCDDesStruct xgifb_lcddes_1024x768x75[] = { - {9, 1049, 0, 769}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {9, 1049, 0, 769}, /* ; 01 (320x350,640x350) */ - {9, 1049, 0, 769}, /* ; 02 (360x400,720x400) */ - {9, 1049, 0, 769}, /* ; 03 (720x350) */ - {9, 1049, 0, 769}, /* ; 04 (640x480x75Hz) */ - {9, 1049, 0, 769}, /* ; 05 (800x600x75Hz) */ - {9, 1049, 0, 769} /* ; 06 (1024x768x75Hz) */ -}; - -/* ;;1024x768x75Hz */ -static const struct XGI_LCDDesStruct XGI_CetLCDDes1024x768x75Data[] = { - {1152, 856, 622, 587}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {1152, 856, 597, 562}, /* ; 01 (320x350,640x350) */ - {1192, 896, 622, 587}, /* ; 02 (360x400,720x400) */ - {1192, 896, 597, 562}, /* ; 03 (720x350) */ - {1129, 857, 656, 625}, /* ; 04 (640x480x75Hz) */ - {1209, 937, 716, 685}, /* ; 05 (800x600x75Hz) */ - {9, 1049, 0, 769} /* ; 06 (1024x768x75Hz) */ -}; - -/* ;;1280x1024x75Hz */ -static const struct XGI_LCDDesStruct xgifb_lcddldes_1280x1024x75[] = { - {18, 1314, 0, 1025}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {18, 1314, 0, 1025}, /* ; 01 (320x350,640x350) */ - {18, 1314, 0, 1025}, /* ; 02 (360x400,720x400) */ - {18, 1314, 0, 1025}, /* ; 03 (720x350) */ - {18, 1314, 0, 1025}, /* ; 04 (640x480x60Hz) */ - {18, 1314, 0, 1025}, /* ; 05 (800x600x60Hz) */ - {18, 1314, 0, 1025}, /* ; 06 (1024x768x60Hz) */ - {18, 1314, 0, 1025} /* ; 07 (1280x1024x60Hz) */ -}; - -/* 1280x1024x75Hz */ -static const struct XGI_LCDDesStruct XGI_CetLCDDLDes1280x1024x75Data[] = { - {1368, 1008, 752, 711}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {1368, 1008, 729, 688}, /* ; 01 (320x350,640x350) */ - {1408, 1048, 752, 711}, /* ; 02 (360x400,720x400) */ - {1408, 1048, 729, 688}, /* ; 03 (720x350) */ - {1377, 985, 794, 753}, /* ; 04 (640x480x75Hz) */ - {1457, 1065, 854, 813}, /* ; 05 (800x600x75Hz) */ - {1569, 1177, 938, 897}, /* ; 06 (1024x768x75Hz) */ - {18, 1314, 0, 1025} /* ; 07 (1280x1024x75Hz) */ -}; - -/* ;;1280x1024x75Hz */ -static const struct XGI_LCDDesStruct xgifb_lcddes_1280x1024x75[] = { - {9, 1305, 0, 1025}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {9, 1305, 0, 1025}, /* ; 01 (320x350,640x350) */ - {9, 1305, 0, 1025}, /* ; 02 (360x400,720x400) */ - {9, 1305, 0, 1025}, /* ; 03 (720x350) */ - {9, 1305, 0, 1025}, /* ; 04 (640x480x60Hz) */ - {9, 1305, 0, 1025}, /* ; 05 (800x600x60Hz) */ - {9, 1305, 0, 1025}, /* ; 06 (1024x768x60Hz) */ - {9, 1305, 0, 1025} /* ; 07 (1280x1024x60Hz) */ -}; - -/* 1280x1024x75Hz */ -static const struct XGI_LCDDesStruct XGI_CetLCDDes1280x1024x75Data[] = { - {1368, 1008, 752, 711}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {1368, 1008, 729, 688}, /* ; 01 (320x350,640x350) */ - {1408, 1048, 752, 711}, /* ; 02 (360x400,720x400) */ - {1408, 1048, 729, 688}, /* ; 03 (720x350) */ - {1377, 985, 794, 753}, /* ; 04 (640x480x75Hz) */ - {1457, 1065, 854, 813}, /* ; 05 (800x600x75Hz) */ - {1569, 1177, 938, 897}, /* ; 06 (1024x768x75Hz) */ - {9, 1305, 0, 1025} /* ; 07 (1280x1024x75Hz) */ -}; - -/* Scaling LCD 75Hz */ -static const struct XGI330_LCDDataDesStruct2 XGI_NoScalingDesDatax75[] = { - {9, 657, 448, 405, 96, 2}, /* ; 00 (320x200,320x400, - * 640x200,640x400) - */ - {9, 657, 448, 355, 96, 2}, /* ; 01 (320x350,640x350) */ - {9, 738, 448, 405, 108, 2}, /* ; 02 (360x400,720x400) */ - {9, 738, 448, 355, 108, 2}, /* ; 03 (720x350) */ - {9, 665, 0, 481, 64, 3}, /* ; 04 (640x480x75Hz) */ - {9, 825, 0, 601, 80, 3}, /* ; 05 (800x600x75Hz) */ - {9, 1049, 0, 769, 96, 3}, /* ; 06 (1024x768x75Hz) */ - {9, 1305, 0, 1025, 144, 3}, /* ; 07 (1280x1024x75Hz) */ - {9, 1457, 0, 1051, 112, 3}, /* ; 08 (1400x1050x60Hz)*/ - {9, 1673, 0, 1201, 192, 3}, /* ; 09 (1600x1200x75Hz) */ - {9, 1337, 0, 771, 112, 6} /* ; 0A (1280x768x60Hz) */ -}; - -static const struct SiS_TVData XGI_StPALData[] = { - {1, 1, 864, 525, 1270, 400, 100, 0, 760}, - {1, 1, 864, 525, 1270, 350, 100, 0, 760}, - {1, 1, 864, 525, 1270, 400, 0, 0, 720}, - {1, 1, 864, 525, 1270, 350, 0, 0, 720}, - {1, 1, 864, 525, 1270, 480, 50, 0, 760}, - {1, 1, 864, 525, 1270, 600, 50, 0, 0} -}; - -static const struct SiS_TVData XGI_ExtPALData[] = { - {2, 1, 1080, 463, 1270, 500, 50, 0, 50}, - {15, 7, 1152, 413, 1270, 500, 50, 0, 50}, - {2, 1, 1080, 463, 1270, 500, 50, 0, 50}, - {15, 7, 1152, 413, 1270, 500, 50, 0, 50}, - {2, 1, 900, 543, 1270, 500, 0, 0, 50}, - {4, 3, 1080, 663, 1270, 500, 438, 0, 438}, - {1, 1, 1125, 831, 1270, 500, 686, 0, 686}, /*301b*/ - {3, 2, 1080, 619, 1270, 540, 438, 0, 438} -}; - -static const struct SiS_TVData XGI_StNTSCData[] = { - {1, 1, 858, 525, 1270, 400, 50, 0, 760}, - {1, 1, 858, 525, 1270, 350, 50, 0, 640}, - {1, 1, 858, 525, 1270, 400, 0, 0, 720}, - {1, 1, 858, 525, 1270, 350, 0, 0, 720}, - {1, 1, 858, 525, 1270, 480, 0, 0, 760} -}; - -static const struct SiS_TVData XGI_ExtNTSCData[] = { - {9, 5, 1001, 453, 1270, 420, 171, 0, 171}, - {12, 5, 858, 403, 1270, 420, 171, 0, 171}, - {9, 5, 1001, 453, 1270, 420, 171, 0, 171}, - {12, 5, 858, 403, 1270, 420, 171, 0, 171}, - {143, 80, 836, 523, 1270, 420, 224, 0, 0}, - {143, 120, 1008, 643, 1270, 420, 0, 1, 0}, - {1, 1, 1120, 821, 1516, 420, 0, 1, 0}, /*301b*/ - {2, 1, 858, 503, 1584, 480, 0, 1, 0}, - {3, 2, 1001, 533, 1270, 420, 0, 0, 0} -}; - -static const struct SiS_TVData XGI_St1HiTVData[] = { - {1, 1, 892, 563, 690, 800, 0, 0, 0}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {1, 1, 892, 563, 690, 700, 0, 0, 0}, /* 01 (320x350,640x350) */ - {1, 1, 1000, 563, 785, 800, 0, 0, 0}, /* 02 (360x400,720x400) */ - {1, 1, 1000, 563, 785, 700, 0, 0, 0}, /* 03 (720x350) */ - {1, 1, 892, 563, 690, 960, 0, 0, 0}, /* 04 (320x240,640x480) */ - {8, 5, 1050, 683, 1648, 960, 0x150, 1, 0} /* 05 (400x300,800x600) */ -}; - -static const struct SiS_TVData XGI_St2HiTVData[] = { - {3, 1, 840, 483, 1648, 960, 0x032, 0, 0}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {1, 1, 892, 563, 690, 700, 0, 0, 0}, /* 01 (320x350,640x350) */ - {3, 1, 840, 483, 1648, 960, 0x032, 0, 0}, /* 02 (360x400,720x400) */ - {1, 1, 1000, 563, 785, 700, 0, 0, 0}, /* 03 (720x350) */ - {5, 2, 840, 563, 1648, 960, 0x08D, 1, 0}, /* 04 (320x240,640x480) */ - {8, 5, 1050, 683, 1648, 960, 0x17C, 1, 0} /* 05 (400x300,800x600) */ -}; - -static const struct SiS_TVData XGI_ExtHiTVData[] = { - {6, 1, 840, 563, 1632, 960, 0, 0, 0}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {3, 1, 960, 563, 1632, 960, 0, 0, 0}, /* 01 (320x350,640x350) */ - {3, 1, 840, 483, 1632, 960, 0, 0, 0}, /* 02 (360x400,720x400) */ - {3, 1, 960, 563, 1632, 960, 0, 0, 0}, /* 03 (720x350) */ - {5, 1, 840, 563, 1648, 960, 0x166, 1, 0}, /* 04 (320x240,640x480) */ - {16, 5, 1050, 683, 1648, 960, 0x143, 1, 0}, /* 05 (400x300,800x600) */ - {25, 12, 1260, 851, 1648, 960, 0x032, 0, 0}, /* 06 (512x384,1024x768)*/ - {5, 4, 1575, 1124, 1648, 960, 0x128, 0, 0}, /* 07 (1280x1024) */ - {4, 1, 1050, 563, 1548, 960, 0x143, 1, 0}, /* 08 (800x480) */ - {5, 2, 1400, 659, 1648, 960, 0x032, 0, 0}, /* 09 (1024x576) */ - {8, 5, 1750, 803, 1648, 960, 0x128, 0, 0} /* 0A (1280x720) */ -}; - -static const struct SiS_TVData XGI_ExtYPbPr525iData[] = { - { 9, 5, 1001, 453, 1270, 420, 171, 0, 171}, - { 12, 5, 858, 403, 1270, 420, 171, 0, 171}, - { 9, 5, 1001, 453, 1270, 420, 171, 0, 171}, - { 12, 5, 858, 403, 1270, 420, 171, 0, 171}, - {143, 80, 836, 523, 1250, 420, 224, 0, 0}, - {143, 120, 1008, 643, 1250, 420, 0, 1, 0}, - { 1, 1, 1120, 821, 1516, 420, 0, 1, 0}, /*301b*/ - { 2, 1, 858, 503, 1584, 480, 0, 1, 0}, - { 3, 2, 1001, 533, 1250, 420, 0, 0, 0} -}; - -static const struct SiS_TVData XGI_StYPbPr525iData[] = { - {1, 1, 858, 525, 1270, 400, 50, 0, 760}, - {1, 1, 858, 525, 1270, 350, 50, 0, 640}, - {1, 1, 858, 525, 1270, 400, 0, 0, 720}, - {1, 1, 858, 525, 1270, 350, 0, 0, 720}, - {1, 1, 858, 525, 1270, 480, 0, 0, 760}, -}; - -static const struct SiS_TVData XGI_ExtYPbPr525pData[] = { - { 9, 5, 1001, 453, 1270, 420, 171, 0, 171}, - { 12, 5, 858, 403, 1270, 420, 171, 0, 171}, - { 9, 5, 1001, 453, 1270, 420, 171, 0, 171}, - { 12, 5, 858, 403, 1270, 420, 171, 0, 171}, - {143, 80, 836, 523, 1270, 420, 224, 0, 0}, - {143, 120, 1008, 643, 1270, 420, 0, 1, 0}, - { 1, 1, 1120, 821, 1516, 420, 0, 1, 0}, /*301b*/ - { 2, 1, 858, 503, 1584, 480, 0, 1, 0}, - { 3, 2, 1001, 533, 1270, 420, 0, 0, 0} -}; - -static const struct SiS_TVData XGI_StYPbPr525pData[] = { - {1, 1, 1716, 525, 1270, 400, 50, 0, 760}, - {1, 1, 1716, 525, 1270, 350, 50, 0, 640}, - {1, 1, 1716, 525, 1270, 400, 0, 0, 720}, - {1, 1, 1716, 525, 1270, 350, 0, 0, 720}, - {1, 1, 1716, 525, 1270, 480, 0, 0, 760}, -}; - -static const struct SiS_TVData XGI_ExtYPbPr750pData[] = { - { 3, 1, 935, 470, 1130, 680, 50, 0, 0}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {24, 7, 935, 420, 1130, 680, 50, 0, 0}, /* 01 (320x350,640x350) */ - { 3, 1, 935, 470, 1130, 680, 50, 0, 0}, /* 02 (360x400,720x400) */ - {24, 7, 935, 420, 1130, 680, 50, 0, 0}, /* 03 (720x350) */ - { 2, 1, 1100, 590, 1130, 640, 50, 0, 0}, /* 04 (320x240,640x480) */ - { 3, 2, 1210, 690, 1130, 660, 50, 0, 0}, /* 05 (400x300,800x600) */ - { 1, 1, 1375, 878, 1130, 640, 638, 0, 0}, /* 06 (1024x768) */ - { 2, 1, 858, 503, 1130, 480, 0, 1, 0}, /* 07 (720x480) */ - { 5, 4, 1815, 570, 1130, 660, 50, 0, 0}, - { 5, 3, 1100, 686, 1130, 640, 50, 1, 0}, - {10, 9, 1320, 830, 1130, 640, 50, 0, 0} -}; - -static const struct SiS_TVData XGI_StYPbPr750pData[] = { - {1, 1, 1650, 750, 1280, 400, 50, 0, 760}, - {1, 1, 1650, 750, 1280, 350, 50, 0, 640}, - {1, 1, 1650, 750, 1280, 400, 0, 0, 720}, - {1, 1, 1650, 750, 1280, 350, 0, 0, 720}, - {1, 1, 1650, 750, 1280, 480, 0, 0, 760}, -}; - -static const unsigned char XGI330_NTSCTiming[] = { - 0x17, 0x1d, 0x03, 0x09, 0x05, 0x06, 0x0c, 0x0c, - 0x94, 0x49, 0x01, 0x0a, 0x06, 0x0d, 0x04, 0x0a, - 0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x1b, - 0x0c, 0x50, 0x00, 0x97, 0x00, 0xda, 0x4a, 0x17, - 0x7d, 0x05, 0x4b, 0x00, 0x00, 0xe2, 0x00, 0x02, - 0x03, 0x0a, 0x65, 0x9d, 0x08, 0x92, 0x8f, 0x40, - 0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x50, - 0x00, 0x40, 0x44, 0x00, 0xdb, 0x02, 0x3b, 0x00 -}; - -static const unsigned char XGI330_PALTiming[] = { - 0x21, 0x5A, 0x35, 0x6e, 0x04, 0x38, 0x3d, 0x70, - 0x94, 0x49, 0x01, 0x12, 0x06, 0x3e, 0x35, 0x6d, - 0x06, 0x14, 0x3e, 0x35, 0x6d, 0x00, 0x45, 0x2b, - 0x70, 0x50, 0x00, 0x9b, 0x00, 0xd9, 0x5d, 0x17, - 0x7d, 0x05, 0x45, 0x00, 0x00, 0xe8, 0x00, 0x02, - 0x0d, 0x00, 0x68, 0xb0, 0x0b, 0x92, 0x8f, 0x40, - 0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x63, - 0x00, 0x40, 0x3e, 0x00, 0xe1, 0x02, 0x28, 0x00 -}; - -static const unsigned char XGI330_HiTVExtTiming[] = { - 0x2D, 0x60, 0x2C, 0x5F, 0x08, 0x31, 0x3A, 0x64, - 0x28, 0x02, 0x01, 0x3D, 0x06, 0x3E, 0x35, 0x6D, - 0x06, 0x14, 0x3E, 0x35, 0x6D, 0x00, 0xC5, 0x3F, - 0x64, 0x90, 0x33, 0x8C, 0x18, 0x36, 0x3E, 0x13, - 0x2A, 0xDE, 0x2A, 0x44, 0x40, 0x2A, 0x44, 0x40, - 0x8E, 0x8E, 0x82, 0x07, 0x0B, - 0x92, 0x0F, 0x40, 0x60, 0x80, 0x14, 0x90, 0x8C, - 0x60, 0x14, 0x3D, 0x63, 0x4F, - 0x27, 0x00, 0xfc, 0xff, 0x6a, 0x00 -}; - -static const unsigned char XGI330_HiTVSt1Timing[] = { - 0x32, 0x65, 0x2C, 0x5F, 0x08, 0x31, 0x3A, 0x65, - 0x28, 0x02, 0x01, 0x3D, 0x06, 0x3E, 0x35, 0x6D, - 0x06, 0x14, 0x3E, 0x35, 0x6D, 0x00, 0xC5, 0x3F, - 0x65, 0x90, 0x7B, 0xA8, 0x03, 0xF0, 0x87, 0x03, - 0x11, 0x15, 0x11, 0xCF, 0x10, 0x11, 0xCF, 0x10, - 0x35, 0x35, 0x3B, 0x69, 0x1D, - 0x92, 0x0F, 0x40, 0x60, 0x80, 0x14, 0x90, 0x8C, - 0x60, 0x04, 0x86, 0xAF, 0x5D, - 0x0E, 0x00, 0xfc, 0xff, 0x2d, 0x00 -}; - -static const unsigned char XGI330_HiTVSt2Timing[] = { - 0x32, 0x65, 0x2C, 0x5F, 0x08, 0x31, 0x3A, 0x64, - 0x28, 0x02, 0x01, 0x3D, 0x06, 0x3E, 0x35, 0x6D, - 0x06, 0x14, 0x3E, 0x35, 0x6D, 0x00, 0xC5, 0x3F, - 0x64, 0x90, 0x33, 0x8C, 0x18, 0x36, 0x3E, 0x13, - 0x2A, 0xDE, 0x2A, 0x44, 0x40, 0x2A, 0x44, 0x40, - 0x8E, 0x8E, 0x82, 0x07, 0x0B, - 0x92, 0x0F, 0x40, 0x60, 0x80, 0x14, 0x90, 0x8C, - 0x60, 0x14, 0x3D, 0x63, 0x4F, - 0x27, 0x00, 0xFC, 0xff, 0x6a, 0x00 -}; - -static const unsigned char XGI330_HiTVTextTiming[] = { - 0x32, 0x65, 0x2C, 0x5F, 0x08, 0x31, 0x3A, 0x65, - 0x28, 0x02, 0x01, 0x3D, 0x06, 0x3E, 0x35, 0x6D, - 0x06, 0x14, 0x3E, 0x35, 0x6D, 0x00, 0xC5, 0x3F, - 0x65, 0x90, 0xE7, 0xBC, 0x03, 0x0C, 0x97, 0x03, - 0x14, 0x78, 0x14, 0x08, 0x20, 0x14, 0x08, 0x20, - 0xC8, 0xC8, 0x3B, 0xD2, 0x26, - 0x92, 0x0F, 0x40, 0x60, 0x80, 0x14, 0x90, 0x8C, - 0x60, 0x04, 0x96, 0x72, 0x5C, - 0x11, 0x00, 0xFC, 0xFF, 0x32, 0x00 -}; - -static const unsigned char XGI330_YPbPr750pTiming[] = { - 0x30, 0x1d, 0xe8, 0x09, 0x09, 0xed, 0x0c, 0x0c, - 0x98, 0x0a, 0x01, 0x0c, 0x06, 0x0d, 0x04, 0x0a, - 0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x3f, - 0xed, 0x50, 0x70, 0x9f, 0x16, 0x59, 0x60, 0x13, - 0x27, 0x0b, 0x27, 0xfc, 0x30, 0x27, 0x1c, 0xb0, - 0x4b, 0x4b, 0x6f, 0x2f, 0x63, - 0x92, 0x0F, 0x40, 0x60, 0x80, 0x14, 0x90, 0x8C, - 0x60, 0x14, 0x73, 0x00, 0x40, - 0x11, 0x00, 0xfc, 0xff, 0x32, 0x00 -}; - -static const unsigned char XGI330_YPbPr525pTiming[] = { - 0x3E, 0x11, 0x06, 0x09, 0x0b, 0x0c, 0x0c, 0x0c, - 0x98, 0x0a, 0x01, 0x0d, 0x06, 0x0d, 0x04, 0x0a, - 0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x3f, - 0x0c, 0x50, 0xb2, 0x9f, 0x16, 0x59, 0x4f, 0x13, - 0xad, 0x11, 0xad, 0x1d, 0x40, 0x8a, 0x3d, 0xb8, - 0x51, 0x5e, 0x60, 0x49, 0x7d, - 0x92, 0x0F, 0x40, 0x60, 0x80, 0x14, 0x90, 0x8C, - 0x60, 0x14, 0x4B, 0x43, 0x41, - 0x11, 0x00, 0xFC, 0xFF, 0x32, 0x00 -}; - -static const unsigned char XGI330_YPbPr525iTiming[] = { - 0x1B, 0x21, 0x03, 0x09, 0x05, 0x06, 0x0C, 0x0C, - 0x94, 0x49, 0x01, 0x0A, 0x06, 0x0D, 0x04, 0x0A, - 0x06, 0x14, 0x0D, 0x04, 0x0A, 0x00, 0x85, 0x1B, - 0x0C, 0x50, 0x00, 0x97, 0x00, 0xDA, 0x4A, 0x17, - 0x7D, 0x05, 0x4B, 0x00, 0x00, 0xE2, 0x00, 0x02, - 0x03, 0x0A, 0x65, 0x9D, 0x08, - 0x92, 0x8F, 0x40, 0x60, 0x80, 0x14, 0x90, 0x8C, - 0x60, 0x14, 0x4B, 0x00, 0x40, - 0x44, 0x00, 0xDB, 0x02, 0x3B, 0x00 -}; - -static const unsigned char XGI330_HiTVGroup3Data[] = { - 0x00, 0x1A, 0x22, 0x63, 0x62, 0x22, 0x08, 0x5F, - 0x05, 0x21, 0xB2, 0xB2, 0x55, 0x77, 0x2A, 0xA6, - 0x25, 0x2F, 0x47, 0xFA, 0xC8, 0xFF, 0x8E, 0x20, - 0x8C, 0x6E, 0x60, 0x2E, 0x58, 0x48, 0x72, 0x44, - 0x56, 0x36, 0x4F, 0x6E, 0x3F, 0x80, 0x00, 0x80, - 0x4F, 0x7F, 0x03, 0xA8, 0x7D, 0x20, 0x1A, 0xA9, - 0x14, 0x05, 0x03, 0x7E, 0x64, 0x31, 0x14, 0x75, - 0x18, 0x05, 0x18, 0x05, 0x4C, 0xA8, 0x01 -}; - -static const unsigned char XGI330_HiTVGroup3Simu[] = { - 0x00, 0x1A, 0x22, 0x63, 0x62, 0x22, 0x08, 0x95, - 0xDB, 0x20, 0xB8, 0xB8, 0x55, 0x47, 0x2A, 0xA6, - 0x25, 0x2F, 0x47, 0xFA, 0xC8, 0xFF, 0x8E, 0x20, - 0x8C, 0x6E, 0x60, 0x15, 0x26, 0xD3, 0xE4, 0x11, - 0x56, 0x36, 0x4F, 0x6E, 0x3F, 0x80, 0x00, 0x80, - 0x67, 0x36, 0x01, 0x47, 0x0E, 0x10, 0xBE, 0xB4, - 0x01, 0x05, 0x03, 0x7E, 0x65, 0x31, 0x14, 0x75, - 0x18, 0x05, 0x18, 0x05, 0x4C, 0xA8, 0x01 -}; - -static const unsigned char XGI330_HiTVGroup3Text[] = { - 0x00, 0x1A, 0x22, 0x63, 0x62, 0x22, 0x08, 0xA7, - 0xF5, 0x20, 0xCE, 0xCE, 0x55, 0x47, 0x2A, 0xA6, - 0x25, 0x2F, 0x47, 0xFA, 0xC8, 0xFF, 0x8E, 0x20, - 0x8C, 0x6E, 0x60, 0x18, 0x2C, 0x0C, 0x20, 0x22, - 0x56, 0x36, 0x4F, 0x6E, 0x3F, 0x80, 0x00, 0x80, - 0x93, 0x3C, 0x01, 0x50, 0x2F, 0x10, 0xF4, 0xCA, - 0x01, 0x05, 0x03, 0x7E, 0x65, 0x31, 0x14, 0x75, - 0x18, 0x05, 0x18, 0x05, 0x4C, 0xA8, 0x01 -}; - -static const unsigned char XGI330_Ren525pGroup3[] = { - 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13, - 0xB1, 0x41, 0x62, 0x62, 0xFF, 0xF4, 0x45, 0xa6, - 0x25, 0x2F, 0x67, 0xF6, 0xbf, 0xFF, 0x8E, 0x20, - 0xAC, 0xDA, 0x60, 0xFe, 0x6A, 0x9A, 0x06, 0x10, - 0xd1, 0x04, 0x18, 0x0a, 0xFF, 0x80, 0x00, 0x80, - 0x3c, 0x77, 0x00, 0xEF, 0xE0, 0x10, 0xB0, 0xE0, - 0x10, 0x4F, 0x0F, 0x0F, 0x05, 0x0F, 0x08, 0x6E, - 0x1a, 0x1F, 0x25, 0x2a, 0x4C, 0xAA, 0x01 -}; - -static const unsigned char XGI330_Ren750pGroup3[] = { - 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a, - 0x54, 0x41, 0xE7, 0xE7, 0xFF, 0xF4, 0x45, 0xa6, - 0x25, 0x2F, 0x67, 0xF6, 0xbf, 0xFF, 0x8E, 0x20, - 0xAC, 0x6A, 0x60, 0x2b, 0x52, 0xCD, 0x61, 0x10, - 0x51, 0x04, 0x18, 0x0a, 0x1F, 0x80, 0x00, 0x80, - 0xFF, 0xA4, 0x04, 0x2B, 0x94, 0x21, 0x72, 0x94, - 0x26, 0x05, 0x01, 0x0F, 0xed, 0x0F, 0x0A, 0x64, - 0x18, 0x1D, 0x23, 0x28, 0x4C, 0xAA, 0x01 -}; - -static const struct SiS_LVDSData XGI_LVDS1024x768Data_1[] = { - { 960, 438, 1344, 806}, /* 00 (320x200,320x400,640x200,640x400) */ - { 960, 388, 1344, 806}, /* 01 (320x350,640x350) */ - {1040, 438, 1344, 806}, /* 02 (360x400,720x400) */ - {1040, 388, 1344, 806}, /* 03 (720x350) */ - { 960, 518, 1344, 806}, /* 04 (320x240,640x480) */ - {1120, 638, 1344, 806}, /* 05 (400x300,800x600) */ - {1344, 806, 1344, 806} /* 06 (512x384,1024x768) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1024x768Data_2[] = { - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {1344, 806, 1344, 806}, - {800, 449, 1280, 801}, - {800, 525, 1280, 813} -}; - -static const struct SiS_LVDSData XGI_LVDS1280x1024Data_1[] = { - {1048, 442, 1688, 1066}, - {1048, 392, 1688, 1066}, - {1048, 442, 1688, 1066}, - {1048, 392, 1688, 1066}, - {1048, 522, 1688, 1066}, - {1208, 642, 1688, 1066}, - {1432, 810, 1688, 1066}, - {1688, 1066, 1688, 1066} -}; - -#define XGI_LVDS1280x1024Data_2 XGI_LVDS1024x768Data_2 - -static const struct SiS_LVDSData XGI_LVDS1400x1050Data_1[] = { - {928, 416, 1688, 1066}, - {928, 366, 1688, 1066}, - {928, 416, 1688, 1066}, - {928, 366, 1688, 1066}, - {928, 496, 1688, 1066}, - {1088, 616, 1688, 1066}, - {1312, 784, 1688, 1066}, - {1568, 1040, 1688, 1066}, - {1688, 1066, 1688, 1066} -}; - -static const struct SiS_LVDSData XGI_LVDS1400x1050Data_2[] = { - {1688, 1066, 1688, 1066}, - {1688, 1066, 1688, 1066}, - {1688, 1066, 1688, 1066}, - {1688, 1066, 1688, 1066}, - {1688, 1066, 1688, 1066}, - {1688, 1066, 1688, 1066}, - {1688, 1066, 1688, 1066}, - {1688, 1066, 1688, 1066}, - {1688, 1066, 1688, 1066} -}; - -/* ;;[ycchen] 12/05/02 LCDHTxLCDVT=2048x1320 */ -static const struct SiS_LVDSData XGI_LVDS1600x1200Data_1[] = { - {1088, 520, 2048, 1320}, /* 00 (320x200,320x400,640x200,640x400) */ - {1088, 470, 2048, 1320}, /* 01 (320x350,640x350) */ - {1088, 520, 2048, 1320}, /* 02 (360x400,720x400) */ - {1088, 470, 2048, 1320}, /* 03 (720x350) */ - {1088, 600, 2048, 1320}, /* 04 (320x240,640x480) */ - {1248, 720, 2048, 1320}, /* 05 (400x300,800x600) */ - {1472, 888, 2048, 1320}, /* 06 (512x384,1024x768) */ - {1728, 1144, 2048, 1320}, /* 07 (640x512,1280x1024) */ - {1848, 1170, 2048, 1320}, /* 08 (1400x1050) */ - {2048, 1320, 2048, 1320} /* 09 (1600x1200) */ -}; - -static const struct SiS_LVDSData XGI_LVDSNoScalingData[] = { - { 800, 449, 800, 449}, /* 00 (320x200,320x400,640x200,640x400) */ - { 800, 449, 800, 449}, /* 01 (320x350,640x350) */ - { 800, 449, 800, 449}, /* 02 (360x400,720x400) */ - { 800, 449, 800, 449}, /* 03 (720x350) */ - { 800, 525, 800, 525}, /* 04 (640x480x60Hz) */ - {1056, 628, 1056, 628}, /* 05 (800x600x60Hz) */ - {1344, 806, 1344, 806}, /* 06 (1024x768x60Hz) */ - {1688, 1066, 1688, 1066}, /* 07 (1280x1024x60Hz) */ - {1688, 1066, 1688, 1066}, /* 08 (1400x1050x60Hz) */ - {2160, 1250, 2160, 1250}, /* 09 (1600x1200x60Hz) */ - {1688, 806, 1688, 806} /* 0A (1280x768x60Hz) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1024x768Data_1x75[] = { - { 960, 438, 1312, 800}, /* 00 (320x200,320x400,640x200,640x400) */ - { 960, 388, 1312, 800}, /* 01 (320x350,640x350) */ - {1040, 438, 1312, 800}, /* 02 (360x400,720x400) */ - {1040, 388, 1312, 800}, /* 03 (720x350) */ - { 928, 512, 1312, 800}, /* 04 (320x240,640x480) */ - {1088, 632, 1312, 800}, /* 05 (400x300,800x600) */ - {1312, 800, 1312, 800}, /* 06 (512x384,1024x768) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1024x768Data_2x75[] = { - {1312, 800, 1312, 800}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {1312, 800, 1312, 800}, /* ; 01 (320x350,640x350) */ - {1312, 800, 1312, 800}, /* ; 02 (360x400,720x400) */ - {1312, 800, 1312, 800}, /* ; 03 (720x350) */ - {1312, 800, 1312, 800}, /* ; 04 (320x240,640x480) */ - {1312, 800, 1312, 800}, /* ; 05 (400x300,800x600) */ - {1312, 800, 1312, 800}, /* ; 06 (512x384,1024x768) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1280x1024Data_1x75[] = { - {1048, 442, 1688, 1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */ - {1048, 392, 1688, 1066 }, /* ; 01 (320x350,640x350) */ - {1128, 442, 1688, 1066 }, /* ; 02 (360x400,720x400) */ - {1128, 392, 1688, 1066 }, /* ; 03 (720x350) */ - {1048, 522, 1688, 1066 }, /* ; 04 (320x240,640x480) */ - {1208, 642, 1688, 1066 }, /* ; 05 (400x300,800x600) */ - {1432, 810, 1688, 1066 }, /* ; 06 (512x384,1024x768) */ - {1688, 1066, 1688, 1066 }, /* ; 06; 07 (640x512,1280x1024) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1280x1024Data_2x75[] = { - {1688, 1066, 1688, 1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */ - {1688, 1066, 1688, 1066 }, /* ; 01 (320x350,640x350) */ - {1688, 1066, 1688, 1066 }, /* ; 02 (360x400,720x400) */ - {1688, 1066, 1688, 1066 }, /* ; 03 (720x350) */ - {1688, 1066, 1688, 1066 }, /* ; 04 (320x240,640x480) */ - {1688, 1066, 1688, 1066 }, /* ; 05 (400x300,800x600) */ - {1688, 1066, 1688, 1066 }, /* ; 06 (512x384,1024x768) */ - {1688, 1066, 1688, 1066 }, /* ; 06; 07 (640x512,1280x1024) */ -}; - -static const struct SiS_LVDSData XGI_LVDSNoScalingDatax75[] = { - { 800, 449, 800, 449}, /* ; 00 (320x200,320x400,640x200,640x400) */ - { 800, 449, 800, 449}, /* ; 01 (320x350,640x350) */ - { 900, 449, 900, 449}, /* ; 02 (360x400,720x400) */ - { 900, 449, 900, 449}, /* ; 03 (720x350) */ - { 800, 500, 800, 500}, /* ; 04 (640x480x75Hz) */ - {1056, 625, 1056, 625}, /* ; 05 (800x600x75Hz) */ - {1312, 800, 1312, 800}, /* ; 06 (1024x768x75Hz) */ - {1688, 1066, 1688, 1066}, /* ; 07 (1280x1024x75Hz) */ - {1688, 1066, 1688, 1066}, /* ; 08 (1400x1050x75Hz) - * ;;[ycchen] 12/19/02 - */ - {2160, 1250, 2160, 1250}, /* ; 09 (1600x1200x75Hz) */ - {1688, 806, 1688, 806}, /* ; 0A (1280x768x75Hz) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1024x768Des_1[] = { - {0, 1048, 0, 771}, /* 00 (320x200,320x400,640x200,640x400) */ - {0, 1048, 0, 771}, /* 01 (320x350,640x350) */ - {0, 1048, 0, 771}, /* 02 (360x400,720x400) */ - {0, 1048, 0, 771}, /* 03 (720x350) */ - {0, 1048, 0, 771}, /* 04 (640x480x60Hz) */ - {0, 1048, 0, 771}, /* 05 (800x600x60Hz) */ - {0, 1048, 805, 770} /* 06 (1024x768x60Hz) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1024x768Des_2[] = { - {1142, 856, 622, 587}, /* 00 (320x200,320x400,640x200,640x400) */ - {1142, 856, 597, 562}, /* 01 (320x350,640x350) */ - {1142, 856, 622, 587}, /* 02 (360x400,720x400) */ - {1142, 856, 597, 562}, /* 03 (720x350) */ - {1142, 1048, 722, 687}, /* 04 (640x480x60Hz) */ - {1232, 936, 722, 687}, /* 05 (800x600x60Hz) */ - { 0, 1048, 805, 771} /* 06 (1024x768x60Hz) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1024x768Des_3[] = { - {320, 24, 622, 587}, /* 00 (320x200,320x400,640x200,640x400) */ - {320, 24, 597, 562}, /* 01 (320x350,640x350) */ - {320, 24, 622, 587}, /* 02 (360x400,720x400) */ - {320, 24, 597, 562}, /* 03 (720x350) */ - {320, 24, 722, 687} /* 04 (640x480x60Hz) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1280x1024Des_1[] = { - {0, 1328, 0, 1025}, /* 00 (320x200,320x400,640x200,640x400) */ - {0, 1328, 0, 1025}, /* 01 (320x350,640x350) */ - {0, 1328, 0, 1025}, /* 02 (360x400,720x400) */ - {0, 1328, 0, 1025}, /* 03 (720x350) */ - {0, 1328, 0, 1025}, /* 04 (640x480x60Hz) */ - {0, 1328, 0, 1025}, /* 05 (800x600x60Hz) */ - {0, 1328, 0, 1025}, /* 06 (1024x768x60Hz) */ - {0, 1328, 1065, 1024} /* 07 (1280x1024x60Hz) */ -}; - - /* The Display setting for DE Mode Panel */ -static const struct SiS_LVDSData XGI_LVDS1280x1024Des_2[] = { - {1368, 1008, 752, 711}, /* 00 (320x200,320x400,640x200,640x400) */ - {1368, 1008, 729, 688}, /* 01 (320x350,640x350) */ - {1408, 1048, 752, 711}, /* 02 (360x400,720x400) */ - {1408, 1048, 729, 688}, /* 03 (720x350) */ - {1368, 1008, 794, 753}, /* 04 (640x480x60Hz) */ - {1448, 1068, 854, 813}, /* 05 (800x600x60Hz) */ - {1560, 1200, 938, 897}, /* 06 (1024x768x60Hz) */ - {0000, 1328, 0, 1025} /* 07 (1280x1024x60Hz) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1400x1050Des_1[] = { - {0, 1448, 0, 1051}, /* 00 (320x200,320x400,640x200,640x400) */ - {0, 1448, 0, 1051}, /* 01 (320x350,640x350) */ - {0, 1448, 0, 1051}, /* 02 (360x400,720x400) */ - {0, 1448, 0, 1051}, /* 03 (720x350) */ - {0, 1448, 0, 1051}, /* 04 (640x480x60Hz) */ - {0, 1448, 0, 1051}, /* 05 (800x600x60Hz) */ - {0, 1448, 0, 1051}, /* 06 (1024x768x60Hz) */ - {0, 1448, 0, 1051}, /* 07 (1280x1024x60Hz) */ - {0, 1448, 0, 1051} /* 08 (1400x1050x60Hz) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1400x1050Des_2[] = { - {1308, 1068, 781, 766}, /* 00 (320x200,320x400,640x200,640x400) */ - {1308, 1068, 781, 766}, /* 01 (320x350,640x350) */ - {1308, 1068, 781, 766}, /* 02 (360x400,720x400) */ - {1308, 1068, 781, 766}, /* 03 (720x350) */ - {1308, 1068, 781, 766}, /* 04 (640x480x60Hz) */ - {1388, 1148, 841, 826}, /* 05 (800x600x60Hz) */ - {1490, 1250, 925, 910}, /* 06 (1024x768x60Hz) */ - {1608, 1368, 1053, 1038}, /* 07 (1280x1024x60Hz) */ - { 0, 1448, 0, 1051} /* 08 (1400x1050x60Hz) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1600x1200Des_1[] = { - {0, 1664, 0, 1201}, /* 00 (320x200,320x400,640x200,640x400) */ - {0, 1664, 0, 1201}, /* 01 (320x350,640x350) */ - {0, 1664, 0, 1201}, /* 02 (360x400,720x400) */ - {0, 1664, 0, 1201}, /* 03 (720x350) */ - {0, 1664, 0, 1201}, /* 04 (640x480x60Hz) */ - {0, 1664, 0, 1201}, /* 05 (800x600x60Hz) */ - {0, 1664, 0, 1201}, /* 06 (1024x768x60Hz) */ - {0, 1664, 0, 1201}, /* 07 (1280x1024x60Hz) */ - {0, 1664, 0, 1201}, /* 08 (1400x1050x60Hz) */ - {0, 1664, 0, 1201} /* 09 (1600x1200x60Hz) */ -}; - -static const struct XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesData[] = { - {0, 648, 448, 405, 96, 2}, /* 00 (320x200,320x400, - * 640x200,640x400) - */ - {0, 648, 448, 355, 96, 2}, /* 01 (320x350,640x350) */ - {0, 648, 448, 405, 96, 2}, /* 02 (360x400,720x400) */ - {0, 648, 448, 355, 96, 2}, /* 03 (720x350) */ - {0, 648, 1, 483, 96, 2}, /* 04 (640x480x60Hz) */ - {0, 840, 627, 600, 128, 4}, /* 05 (800x600x60Hz) */ - {0, 1048, 805, 770, 136, 6}, /* 06 (1024x768x60Hz) */ - {0, 1328, 0, 1025, 112, 3}, /* 07 (1280x1024x60Hz) */ - {0, 1438, 0, 1051, 112, 3}, /* 08 (1400x1050x60Hz)*/ - {0, 1664, 0, 1201, 192, 3}, /* 09 (1600x1200x60Hz) */ - {0, 1328, 0, 0771, 112, 6} /* 0A (1280x768x60Hz) */ -}; - -/* ; 1024x768 Full-screen */ -static const struct SiS_LVDSData XGI_LVDS1024x768Des_1x75[] = { - {0, 1040, 0, 769}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {0, 1040, 0, 769}, /* ; 01 (320x350,640x350) */ - {0, 1040, 0, 769}, /* ; 02 (360x400,720x400) */ - {0, 1040, 0, 769}, /* ; 03 (720x350) */ - {0, 1040, 0, 769}, /* ; 04 (640x480x75Hz) */ - {0, 1040, 0, 769}, /* ; 05 (800x600x75Hz) */ - {0, 1040, 0, 769} /* ; 06 (1024x768x75Hz) */ -}; - -/* ; 1024x768 center-screen (Enh. Mode) */ -static const struct SiS_LVDSData XGI_LVDS1024x768Des_2x75[] = { - {1142, 856, 622, 587}, /* 00 (320x200,320x400,640x200,640x400) */ - {1142, 856, 597, 562}, /* 01 (320x350,640x350) */ - {1142, 856, 622, 587}, /* 02 (360x400,720x400) */ - {1142, 856, 597, 562}, /* 03 (720x350) */ - {1142, 1048, 722, 687}, /* 04 (640x480x60Hz) */ - {1232, 936, 722, 687}, /* 05 (800x600x60Hz) */ - { 0, 1048, 805, 771} /* 06 (1024x768x60Hz) */ -}; - -/* ; 1024x768 center-screen (St.Mode) */ -static const struct SiS_LVDSData XGI_LVDS1024x768Des_3x75[] = { - {320, 24, 622, 587}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {320, 24, 597, 562}, /* ; 01 (320x350,640x350) */ - {320, 24, 622, 587}, /* ; 02 (360x400,720x400) */ - {320, 24, 597, 562}, /* ; 03 (720x350) */ - {320, 24, 722, 687} /* ; 04 (640x480x60Hz) */ -}; - -static const struct SiS_LVDSData XGI_LVDS1280x1024Des_1x75[] = { - {0, 1296, 0, 1025}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {0, 1296, 0, 1025}, /* ; 01 (320x350,640x350) */ - {0, 1296, 0, 1025}, /* ; 02 (360x400,720x400) */ - {0, 1296, 0, 1025}, /* ; 03 (720x350) */ - {0, 1296, 0, 1025}, /* ; 04 (640x480x75Hz) */ - {0, 1296, 0, 1025}, /* ; 05 (800x600x75Hz) */ - {0, 1296, 0, 1025}, /* ; 06 (1024x768x75Hz) */ - {0, 1296, 0, 1025} /* ; 07 (1280x1024x75Hz) */ -}; - -/* The Display setting for DE Mode Panel */ -/* Set DE as default */ -static const struct SiS_LVDSData XGI_LVDS1280x1024Des_2x75[] = { - {1368, 976, 752, 711}, /* ; 00 (320x200,320x400,640x200,640x400) */ - {1368, 976, 729, 688}, /* ; 01 (320x350,640x350) */ - {1408, 976, 752, 711}, /* ; 02 (360x400,720x400) */ - {1408, 976, 729, 688}, /* ; 03 (720x350) */ - {1368, 976, 794, 753}, /* ; 04 (640x480x75Hz) */ - {1448, 1036, 854, 813}, /* ; 05 (800x600x75Hz) */ - {1560, 1168, 938, 897}, /* ; 06 (1024x768x75Hz) */ - { 0, 1296, 0, 1025} /* ; 07 (1280x1024x75Hz) */ -}; - -/* Scaling LCD 75Hz */ -static const struct XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesDatax75[] = { - {0, 648, 448, 405, 96, 2}, /* ; 00 (320x200,320x400, - * 640x200,640x400) - */ - {0, 648, 448, 355, 96, 2}, /* ; 01 (320x350,640x350) */ - {0, 729, 448, 405, 108, 2}, /* ; 02 (360x400,720x400) */ - {0, 729, 448, 355, 108, 2}, /* ; 03 (720x350) */ - {0, 656, 0, 481, 64, 3}, /* ; 04 (640x480x75Hz) */ - {0, 816, 0, 601, 80, 3}, /* ; 05 (800x600x75Hz) */ - {0, 1040, 0, 769, 96, 3}, /* ; 06 (1024x768x75Hz) */ - {0, 1296, 0, 1025, 144, 3}, /* ; 07 (1280x1024x75Hz) */ - {0, 1448, 0, 1051, 112, 3}, /* ; 08 (1400x1050x75Hz) */ - {0, 1664, 0, 1201, 192, 3}, /* ; 09 (1600x1200x75Hz) */ - {0, 1328, 0, 771, 112, 6} /* ; 0A (1280x768x75Hz) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_H[] = { - { {0x4B, 0x27, 0x8F, 0x32, 0x1B, 0x00, 0x45, 0x00} }, /* 00 (320x) */ - { {0x4B, 0x27, 0x8F, 0x2B, 0x03, 0x00, 0x44, 0x00} }, /* 01 (360x) */ - { {0x55, 0x31, 0x99, 0x46, 0x1D, 0x00, 0x55, 0x00} }, /* 02 (400x) */ - { {0x63, 0x3F, 0x87, 0x4A, 0x93, 0x00, 0x01, 0x00} }, /* 03 (512x) */ - { {0x73, 0x4F, 0x97, 0x55, 0x86, 0x00, 0x05, 0x00} }, /* 04 (640x) */ - { {0x73, 0x4F, 0x97, 0x55, 0x86, 0x00, 0x05, 0x00} }, /* 05 (720x) */ - { {0x87, 0x63, 0x8B, 0x69, 0x1A, 0x00, 0x26, 0x00} }, /* 06 (800x) */ - { {0xA3, 0x7F, 0x87, 0x86, 0x97, 0x00, 0x02, 0x00} } /* 07 (1024x) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_H[] = { - { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00 } }, /* 00 (320x) */ - { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00 } }, /* 01 (360x) */ - { {0x60, 0x31, 0x84, 0x3A, 0x88, 0x00, 0x01, 0x00 } }, /* 02 (400x) */ - { {0x6E, 0x3F, 0x92, 0x48, 0x96, 0x00, 0x01, 0x00 } }, /* 03 (512x) */ - { {0x7E, 0x4F, 0x82, 0x58, 0x06, 0x00, 0x06, 0x00 } }, /* 04 (640x) */ - { {0x7E, 0x4F, 0x82, 0x58, 0x06, 0x00, 0x06, 0x00 } }, /* 05 (720x) */ - { {0x92, 0x63, 0x96, 0x6C, 0x1A, 0x00, 0x06, 0x00 } }, /* 06 (800x) */ - { {0xAE, 0x7F, 0x92, 0x88, 0x96, 0x00, 0x02, 0x00 } }, /* 07 (1024x) */ - { {0xCE, 0x9F, 0x92, 0xA8, 0x16, 0x00, 0x07, 0x00 } } /* 08 (1280x) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_H[] = { - { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} }, /* 00 (320x) */ - { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} }, /* 01 (360x) */ - { {0x63, 0x31, 0x87, 0x3D, 0x8E, 0x00, 0x01, 0x00} }, /* 02 (400x) */ - { {0x63, 0x3F, 0x87, 0x45, 0x96, 0x00, 0x01, 0x00} }, /* 03 (512x) */ - { {0xA3, 0x4F, 0x87, 0x6E, 0x9F, 0x00, 0x06, 0x00} }, /* 04 (640x) */ - { {0xA3, 0x4F, 0x87, 0x6E, 0x9F, 0x00, 0x06, 0x00} }, /* 05 (720x) */ - { {0xA3, 0x63, 0x87, 0x78, 0x89, 0x00, 0x02, 0x00} }, /* 06 (800x) */ - { {0xA3, 0x7F, 0x87, 0x86, 0x97, 0x00, 0x02, 0x00} } /* 07 (1024x) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_H[] = { - { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} }, /* 00 (320x) */ - { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} }, /* 01 (360x) */ - { {0x7E, 0x40, 0x84, 0x49, 0x91, 0x00, 0x01, 0x00} }, /* 02 (400x) */ - { {0x7E, 0x47, 0x93, 0x50, 0x9E, 0x00, 0x01, 0x00} }, /* 03 (512x) */ - { {0xCE, 0x77, 0x8A, 0x80, 0x8E, 0x00, 0x02, 0x00} }, /* 04 (640x) */ - { {0xCE, 0x77, 0x8A, 0x80, 0x8E, 0x00, 0x02, 0x00} }, /* 05 (720x) */ - { {0xCE, 0x81, 0x94, 0x8A, 0x98, 0x00, 0x02, 0x00} }, /* 06 (800x) */ - { {0xCE, 0x8F, 0x82, 0x98, 0x06, 0x00, 0x07, 0x00} }, /* 07 (1024x) */ - { {0xCE, 0x9F, 0x92, 0xA8, 0x16, 0x00, 0x07, 0x00} } /* 08 (1280x) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_1_H[] = { - { {0x47, 0x27, 0x8B, 0x2C, 0x1A, 0x00, 0x05, 0x00} }, /* 00 (320x) */ - { {0x47, 0x27, 0x8B, 0x30, 0x1E, 0x00, 0x05, 0x00} }, /* 01 (360x) */ - { {0x51, 0x31, 0x95, 0x36, 0x04, 0x00, 0x01, 0x00} }, /* 02 (400x) */ - { {0x5F, 0x3F, 0x83, 0x44, 0x92, 0x00, 0x01, 0x00} }, /* 03 (512x) */ - { {0x6F, 0x4F, 0x93, 0x54, 0x82, 0x00, 0x05, 0x00} }, /* 04 (640x) */ - { {0x6F, 0x4F, 0x93, 0x54, 0x82, 0x00, 0x05, 0x00} }, /* 05 (720x) */ - { {0x83, 0x63, 0x87, 0x68, 0x16, 0x00, 0x06, 0x00} }, /* 06 (800x) */ - { {0x9F, 0x7F, 0x83, 0x84, 0x92, 0x00, 0x02, 0x00} }, /* 07 (1024x) */ - { {0xBF, 0x9F, 0x83, 0xA4, 0x12, 0x00, 0x07, 0x00} }, /* 08 (1280x) */ - { {0xCE, 0xAE, 0x92, 0xB3, 0x01, 0x00, 0x03, 0x00} } /* 09 (1400x) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_2_H[] = { - { {0x76, 0x3F, 0x83, 0x45, 0x8C, 0x00, 0x41, 0x00} }, /* 00 (320x) */ - { {0x76, 0x3F, 0x83, 0x45, 0x8C, 0x00, 0x41, 0x00} }, /* 01 (360x) */ - { {0x76, 0x31, 0x9A, 0x48, 0x9F, 0x00, 0x41, 0x00} }, /* 02 (400x) */ - { {0x76, 0x3F, 0x9A, 0x4F, 0x96, 0x00, 0x41, 0x00} }, /* 03 (512x) */ - { {0xCE, 0x7E, 0x82, 0x87, 0x9E, 0x00, 0x02, 0x00} }, /* 04 (640x) */ - { {0xCE, 0x7E, 0x82, 0x87, 0x9E, 0x00, 0x02, 0x00} }, /* 05 (720x) */ - { {0xCE, 0x63, 0x92, 0x96, 0x04, 0x00, 0x07, 0x00} }, /* 06 (800x) */ - { {0xCE, 0x7F, 0x92, 0xA4, 0x12, 0x00, 0x07, 0x00} }, /* 07 (1024x) */ - { {0xCE, 0x9F, 0x92, 0xB4, 0x02, 0x00, 0x03, 0x00} }, /* 08 (1280x) */ - { {0xCE, 0xAE, 0x92, 0xBC, 0x0A, 0x00, 0x03, 0x00} } /* 09 (1400x) */ -}; - -/* ;302lv channelA [ycchen] 12/05/02 LCDHT=2048 */ -/* ; CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11600x1200_1_H[] = { - { {0x5B, 0x27, 0x9F, 0x32, 0x0A, 0x00, 0x01, 0x00} }, /* 00 (320x) */ - { {0x5B, 0x27, 0x9F, 0x32, 0x0A, 0x00, 0x01, 0x00} }, /* 01 (360x) */ - { {0x65, 0x31, 0x89, 0x3C, 0x94, 0x00, 0x01, 0x00} }, /* 02 (400x) */ - { {0x73, 0x3F, 0x97, 0x4A, 0x82, 0x00, 0x05, 0x00} }, /* 03 (512x) */ - { {0x83, 0x4F, 0x87, 0x51, 0x09, 0x00, 0x06, 0x00} }, /* 04 (640x) */ - { {0x83, 0x4F, 0x87, 0x51, 0x09, 0x00, 0x06, 0x00} }, /* 05 (720x) */ - { {0x97, 0x63, 0x9B, 0x65, 0x1D, 0x00, 0x06, 0xF0} }, /* 06 (800x) */ - { {0xB3, 0x7F, 0x97, 0x81, 0x99, 0x00, 0x02, 0x00} }, /* 07 (1024x) */ - { {0xD3, 0x9F, 0x97, 0xA1, 0x19, 0x00, 0x07, 0x00} }, /* 08 (1280x) */ - { {0xE2, 0xAE, 0x86, 0xB9, 0x91, 0x00, 0x03, 0x00} }, /* 09 (1400x) */ - { {0xFB, 0xC7, 0x9F, 0xC9, 0x81, 0x00, 0x07, 0x00} } /* 0A (1600x) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_V[] = { - { {0x97, 0x1F, 0x60, 0x87, 0x5D, 0x83, 0x10} }, /* 00 (x350) */ - { {0xB4, 0x1F, 0x92, 0x89, 0x8F, 0xB5, 0x30} }, /* 01 (x400) */ - { {0x04, 0x3E, 0xE2, 0x89, 0xDF, 0x05, 0x00} }, /* 02 (x480) */ - { {0x7C, 0xF0, 0x5A, 0x8F, 0x57, 0x7D, 0xA0} }, /* 03 (x600) */ - { {0x24, 0xF5, 0x02, 0x88, 0xFF, 0x25, 0x90} } /* 04 (x768) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_V[] = { - { {0x24, 0xBB, 0x31, 0x87, 0x5D, 0x25, 0x30} }, /* 00 (x350) */ - { {0x24, 0xBB, 0x4A, 0x80, 0x8F, 0x25, 0x30} }, /* 01 (x400) */ - { {0x24, 0xBB, 0x72, 0x88, 0xDF, 0x25, 0x30} }, /* 02 (x480) */ - { {0x24, 0xF1, 0xAE, 0x84, 0x57, 0x25, 0xB0} }, /* 03 (x600) */ - { {0x24, 0xF5, 0x02, 0x88, 0xFF, 0x25, 0x90} } /* 04 (x768) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_V[] = { - { {0x86, 0x1F, 0x5E, 0x82, 0x5D, 0x87, 0x00} }, /* 00 (x350) */ - { {0xB8, 0x1F, 0x90, 0x84, 0x8F, 0xB9, 0x30} }, /* 01 (x400) */ - { {0x08, 0x3E, 0xE0, 0x84, 0xDF, 0x09, 0x00} }, /* 02 (x480) */ - { {0x80, 0xF0, 0x58, 0x8C, 0x57, 0x81, 0xA0} }, /* 03 (x600) */ - { {0x28, 0xF5, 0x00, 0x84, 0xFF, 0x29, 0x90} }, /* 04 (x768) */ - { {0x28, 0x5A, 0x13, 0x87, 0xFF, 0x29, 0xA9} } /* 05 (x1024) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_V[] = { - { {0x28, 0xD2, 0xAF, 0x83, 0xAE, 0xD8, 0xA1} }, /* 00 (x350) */ - { {0x28, 0xD2, 0xC8, 0x8C, 0xC7, 0xF2, 0x81} }, /* 01 (x400) */ - { {0x28, 0xD2, 0xF0, 0x84, 0xEF, 0x1A, 0xB1} }, /* 02 (x480) */ - { {0x28, 0xDE, 0x2C, 0x8F, 0x2B, 0x56, 0x91} }, /* 03 (x600) */ - { {0x28, 0xDE, 0x80, 0x83, 0x7F, 0xAA, 0x91} }, /* 04 (x768) */ - { {0x28, 0x5A, 0x13, 0x87, 0xFF, 0x29, 0xA9} } /* 05 (x1024) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_1_V[] = { - { {0x6C, 0x1F, 0x60, 0x84, 0x5D, 0x6D, 0x10} }, /* 00 (x350) */ - { {0x9E, 0x1F, 0x93, 0x86, 0x8F, 0x9F, 0x30} }, /* 01 (x400) */ - { {0xEE, 0x1F, 0xE2, 0x86, 0xDF, 0xEF, 0x10} }, /* 02 (x480) */ - { {0x66, 0xF0, 0x5A, 0x8e, 0x57, 0x67, 0xA0} }, /* 03 (x600) */ - { {0x0E, 0xF5, 0x02, 0x86, 0xFF, 0x0F, 0x90} }, /* 04 (x768) */ - { {0x0E, 0x5A, 0x02, 0x86, 0xFF, 0x0F, 0x89} }, /* 05 (x1024) */ - { {0x28, 0x10, 0x1A, 0x80, 0x19, 0x29, 0x0F} } /* 06 (x1050) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_2_V[] = { - { {0x28, 0x92, 0xB6, 0x83, 0xB5, 0xCF, 0x81} }, /* 00 (x350) */ - { {0x28, 0x92, 0xD5, 0x82, 0xD4, 0xEE, 0x81} }, /* 01 (x400) */ - { {0x28, 0x92, 0xFD, 0x8A, 0xFC, 0x16, 0xB1} }, /* 02 (x480) */ - { {0x28, 0xD4, 0x39, 0x86, 0x57, 0x29, 0x81} }, /* 03 (x600) */ - { {0x28, 0xD4, 0x8D, 0x9A, 0xFF, 0x29, 0xA1} }, /* 04 (x768) */ - { {0x28, 0x5A, 0x0D, 0x9A, 0xFF, 0x29, 0xA9} }, /* 05 (x1024) */ - { {0x28, 0x10, 0x1A, 0x87, 0x19, 0x29, 0x8F} } /* 06 (x1050) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11600x1200_1_V[] = { - { {0xd4, 0x1F, 0x81, 0x84, 0x5D, 0xd5, 0x10} }, /* 00 (x350) */ - { {0x06, 0x3e, 0xb3, 0x86, 0x8F, 0x07, 0x20} }, /* 01 (x400) */ - { {0x56, 0xba, 0x03, 0x86, 0xDF, 0x57, 0x00} }, /* 02 (x480) */ - { {0xce, 0xF0, 0x7b, 0x8e, 0x57, 0xcf, 0xa0} }, /* 03 (x600) */ - { {0x76, 0xF5, 0x23, 0x86, 0xFF, 0x77, 0x90} }, /* 04 (x768) */ - { {0x76, 0x5A, 0x23, 0x86, 0xFF, 0x77, 0x89} }, /* 05 (x1024) */ - { {0x90, 0x10, 0x1A, 0x8E, 0x19, 0x91, 0x2F} }, /* 06 (x1050) */ - { {0x26, 0x11, 0xd3, 0x86, 0xaF, 0x27, 0x3f} } /* 07 (x1200) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_Hx75[] = { - { {0x4B, 0x27, 0x8F, 0x32, 0x1B, 0x00, 0x45, 0x00} },/* ; 00 (320x) */ - { {0x4B, 0x27, 0x8F, 0x2B, 0x03, 0x00, 0x44, 0x00} },/* ; 01 (360x) */ - { {0x55, 0x31, 0x99, 0x46, 0x1D, 0x00, 0x55, 0x00} },/* ; 02 (400x) */ - { {0x63, 0x3F, 0x87, 0x4A, 0x93, 0x00, 0x01, 0x00} },/* ; 03 (512x) */ - { {0x6F, 0x4F, 0x93, 0x54, 0x80, 0x00, 0x05, 0x00} },/* ; 04 (640x) */ - { {0x6F, 0x4F, 0x93, 0x54, 0x80, 0x00, 0x05, 0x00} },/* ; 05 (720x) */ - { {0x83, 0x63, 0x87, 0x68, 0x14, 0x00, 0x26, 0x00} },/* ; 06 (800x) */ - { {0x9F, 0x7F, 0x83, 0x85, 0x91, 0x00, 0x02, 0x00} } /* ; 07 (1024x) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_Vx75[] = { - { {0x97, 0x1F, 0x60, 0x87, 0x5D, 0x83, 0x10} },/* ; 00 (x350) */ - { {0xB4, 0x1F, 0x92, 0x89, 0x8F, 0xB5, 0x30} },/* ; 01 (x400) */ - { {0xFE, 0x1F, 0xE0, 0x84, 0xDF, 0xFF, 0x10} },/* ; 02 (x480) */ - { {0x76, 0xF0, 0x58, 0x8C, 0x57, 0x77, 0xA0} },/* ; 03 (x600) */ - { {0x1E, 0xF5, 0x00, 0x83, 0xFF, 0x1F, 0x90} } /* ; 04 (x768) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_Hx75[] = { - { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} },/* ; 00 (320x) */ - { {0x63, 0x27, 0x87, 0x3B, 0x8C, 0x00, 0x01, 0x00} },/* ; 01 (360x) */ - { {0x63, 0x31, 0x87, 0x3D, 0x8E, 0x00, 0x01, 0x00} },/* ; 02 (400x) */ - { {0x63, 0x3F, 0x87, 0x45, 0x96, 0x00, 0x01, 0x00} },/* ; 03 (512x) */ - { {0xA3, 0x4F, 0x87, 0x6E, 0x9F, 0x00, 0x06, 0x00} },/* ; 04 (640x) */ - { {0xA3, 0x4F, 0x87, 0x6E, 0x9F, 0x00, 0x06, 0x00} },/* ; 05 (720x) */ - { {0xA3, 0x63, 0x87, 0x78, 0x89, 0x00, 0x02, 0x00} },/* ; 06 (800x) */ - { {0xA3, 0x7F, 0x87, 0x86, 0x97, 0x00, 0x02, 0x00} } /* ; 07 (1024x) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_Vx75[] = { - { {0x24, 0xBB, 0x31, 0x87, 0x5D, 0x25, 0x30} },/* ; 00 (x350) */ - { {0x24, 0xBB, 0x4A, 0x80, 0x8F, 0x25, 0x30} },/* ; 01 (x400) */ - { {0x24, 0xBB, 0x72, 0x88, 0xDF, 0x25, 0x30} },/* ; 02 (x480) */ - { {0x24, 0xF1, 0xAE, 0x84, 0x57, 0x25, 0xB0} },/* ; 03 (x600) */ - { {0x24, 0xF5, 0x02, 0x88, 0xFF, 0x25, 0x90} } /* ; 04 (x768) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_Hx75[] = { - { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00} },/* ; 00 (320x) */ - { {0x56, 0x27, 0x9A, 0x30, 0x1E, 0x00, 0x05, 0x00} },/* ; 01 (360x) */ - { {0x60, 0x31, 0x84, 0x3A, 0x88, 0x00, 0x01, 0x00} },/* ; 02 (400x) */ - { {0x6E, 0x3F, 0x92, 0x48, 0x96, 0x00, 0x01, 0x00} },/* ; 03 (512x) */ - { {0x7E, 0x4F, 0x82, 0x54, 0x06, 0x00, 0x06, 0x00} },/* ; 04 (640x) */ - { {0x7E, 0x4F, 0x82, 0x54, 0x06, 0x00, 0x06, 0x00} },/* ; 05 (720x) */ - { {0x92, 0x63, 0x96, 0x68, 0x1A, 0x00, 0x06, 0x00} },/* ; 06 (800x) */ - { {0xAE, 0x7F, 0x92, 0x84, 0x96, 0x00, 0x02, 0x00} },/* ; 07 (1024x) */ - { {0xCE, 0x9F, 0x92, 0xA5, 0x17, 0x00, 0x07, 0x00} } /* ; 08 (1280x) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_Vx75[] = { - { {0x86, 0xD1, 0xBC, 0x80, 0xBB, 0xE5, 0x00} },/* ; 00 (x350) */ - { {0xB8, 0x1F, 0x90, 0x84, 0x8F, 0xB9, 0x30} },/* ; 01 (x400) */ - { {0x08, 0x3E, 0xE0, 0x84, 0xDF, 0x09, 0x00} },/* ; 02 (x480) */ - { {0x80, 0xF0, 0x58, 0x8C, 0x57, 0x81, 0xA0} },/* ; 03 (x600) */ - { {0x28, 0xF5, 0x00, 0x84, 0xFF, 0x29, 0x90} },/* ; 04 (x768) */ - { {0x28, 0x5A, 0x13, 0x87, 0xFF, 0x29, 0xA9} } /* ; 05 (x1024) */ -}; - -/* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ -static const struct XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_Hx75[] = { - { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} },/* ; 00 (320x) */ - { {0x7E, 0x3B, 0x9A, 0x44, 0x12, 0x00, 0x01, 0x00} },/* ; 01 (360x) */ - { {0x7E, 0x40, 0x84, 0x49, 0x91, 0x00, 0x01, 0x00} },/* ; 02 (400x) */ - { {0x7E, 0x47, 0x93, 0x50, 0x9E, 0x00, 0x01, 0x00} },/* ; 03 (512x) */ - { {0xCE, 0x77, 0x8A, 0x80, 0x8E, 0x00, 0x02, 0x00} },/* ; 04 (640x) */ - { {0xCE, 0x77, 0x8A, 0x80, 0x8E, 0x00, 0x02, 0x00} },/* ; 05 (720x) */ - { {0xCE, 0x81, 0x94, 0x8A, 0x98, 0x00, 0x02, 0x00} },/* ; 06 (800x) */ - { {0xCE, 0x8F, 0x82, 0x98, 0x06, 0x00, 0x07, 0x00} },/* ; 07 (1024x) */ - { {0xCE, 0x9F, 0x92, 0xA8, 0x16, 0x00, 0x07, 0x00} } /* ; 08 (1280x) */ -}; - -/* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ -static const struct XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_Vx75[] = { - { {0x28, 0xD2, 0xAF, 0x83, 0xAE, 0xD8, 0xA1} },/* ; 00 (x350) */ - { {0x28, 0xD2, 0xC8, 0x8C, 0xC7, 0xF2, 0x81} },/* ; 01 (x400) */ - { {0x28, 0xD2, 0xF0, 0x84, 0xEF, 0x1A, 0xB1} },/* ; 02 (x480) */ - { {0x28, 0xDE, 0x2C, 0x8F, 0x2B, 0x56, 0x91} },/* ; 03 (x600) */ - { {0x28, 0xDE, 0x80, 0x83, 0x7F, 0xAA, 0x91} },/* ; 04 (x768) */ - { {0x28, 0x5A, 0x13, 0x87, 0xFF, 0x29, 0xA9} } /* ; 05 (x1024) */ -}; - -/*add for new UNIVGABIOS*/ -static const struct XGI330_LCDDataTablStruct XGI_LCDDataTable[] = { - {Panel_1024x768, 0x0019, 0x0001, XGI_ExtLCD1024x768Data }, - {Panel_1024x768, 0x0019, 0x0000, XGI_StLCD1024x768Data }, - {Panel_1024x768, 0x0018, 0x0010, XGI_CetLCD1024x768Data }, - {Panel_1280x1024, 0x0019, 0x0001, XGI_ExtLCD1280x1024Data }, - {Panel_1280x1024, 0x0019, 0x0000, XGI_StLCD1280x1024Data }, - {Panel_1280x1024, 0x0018, 0x0010, XGI_CetLCD1280x1024Data }, - {Panel_1400x1050, 0x0019, 0x0001, xgifb_lcd_1400x1050 }, - {Panel_1400x1050, 0x0019, 0x0000, xgifb_lcd_1400x1050 }, - {Panel_1400x1050, 0x0018, 0x0010, XGI_CetLCD1400x1050Data }, - {Panel_1600x1200, 0x0019, 0x0001, XGI_ExtLCD1600x1200Data }, - {Panel_1600x1200, 0x0019, 0x0000, XGI_StLCD1600x1200Data }, - {PanelRef60Hz, 0x0008, 0x0008, XGI_NoScalingData }, - {Panel_1024x768x75, 0x0019, 0x0001, XGI_ExtLCD1024x768x75Data }, - {Panel_1024x768x75, 0x0019, 0x0000, XGI_ExtLCD1024x768x75Data }, - {Panel_1024x768x75, 0x0018, 0x0010, XGI_CetLCD1024x768x75Data }, - {Panel_1280x1024x75, 0x0019, 0x0001, xgifb_lcd_1280x1024x75 }, - {Panel_1280x1024x75, 0x0019, 0x0000, xgifb_lcd_1280x1024x75 }, - {Panel_1280x1024x75, 0x0018, 0x0010, XGI_CetLCD1280x1024x75Data }, - {PanelRef75Hz, 0x0008, 0x0008, XGI_NoScalingDatax75 }, - {0xFF, 0x0000, 0x0000, NULL } /* End of table */ -}; - -static const struct XGI330_LCDDataTablStruct XGI_LCDDesDataTable[] = { - {Panel_1024x768, 0x0019, 0x0001, XGI_ExtLCDDes1024x768Data }, - {Panel_1024x768, 0x0019, 0x0000, XGI_StLCDDes1024x768Data }, - {Panel_1024x768, 0x0018, 0x0010, XGI_CetLCDDes1024x768Data }, - {Panel_1280x1024, 0x0019, 0x0001, XGI_ExtLCDDes1280x1024Data }, - {Panel_1280x1024, 0x0019, 0x0000, XGI_StLCDDes1280x1024Data }, - {Panel_1280x1024, 0x0018, 0x0010, XGI_CetLCDDes1280x1024Data }, - {Panel_1400x1050, 0x0019, 0x0001, xgifb_lcddes_1400x1050 }, - {Panel_1400x1050, 0x0019, 0x0000, xgifb_lcddes_1400x1050 }, - {Panel_1400x1050, 0x0418, 0x0010, XGI_CetLCDDes1400x1050Data }, - {Panel_1400x1050, 0x0418, 0x0410, XGI_CetLCDDes1400x1050Data2 }, - {Panel_1600x1200, 0x0019, 0x0001, XGI_ExtLCDDes1600x1200Data }, - {Panel_1600x1200, 0x0019, 0x0000, XGI_StLCDDes1600x1200Data }, - {PanelRef60Hz, 0x0008, 0x0008, XGI_NoScalingDesData }, - {Panel_1024x768x75, 0x0019, 0x0001, xgifb_lcddes_1024x768x75 }, - {Panel_1024x768x75, 0x0019, 0x0000, xgifb_lcddes_1024x768x75 }, - {Panel_1024x768x75, 0x0018, 0x0010, XGI_CetLCDDes1024x768x75Data }, - {Panel_1280x1024x75, 0x0019, 0x0001, xgifb_lcddes_1280x1024x75 }, - {Panel_1280x1024x75, 0x0019, 0x0000, xgifb_lcddes_1280x1024x75 }, - {Panel_1280x1024x75, 0x0018, 0x0010, XGI_CetLCDDes1280x1024x75Data }, - {PanelRef75Hz, 0x0008, 0x0008, XGI_NoScalingDesDatax75 }, - {0xFF, 0x0000, 0x0000, NULL } -}; - -static const struct XGI330_LCDDataTablStruct xgifb_lcddldes[] = { - {Panel_1024x768, 0x0019, 0x0001, XGI_ExtLCDDes1024x768Data }, - {Panel_1024x768, 0x0019, 0x0000, XGI_StLCDDes1024x768Data }, - {Panel_1024x768, 0x0018, 0x0010, XGI_CetLCDDes1024x768Data }, - {Panel_1280x1024, 0x0019, 0x0001, XGI_ExtLCDDLDes1280x1024Data }, - {Panel_1280x1024, 0x0019, 0x0000, XGI_StLCDDLDes1280x1024Data }, - {Panel_1280x1024, 0x0018, 0x0010, XGI_CetLCDDLDes1280x1024Data }, - {Panel_1400x1050, 0x0019, 0x0001, xgifb_lcddldes_1400x1050 }, - {Panel_1400x1050, 0x0019, 0x0000, xgifb_lcddldes_1400x1050 }, - {Panel_1400x1050, 0x0418, 0x0010, XGI_CetLCDDes1400x1050Data }, - {Panel_1400x1050, 0x0418, 0x0410, XGI_CetLCDDes1400x1050Data2 }, - {Panel_1600x1200, 0x0019, 0x0001, XGI_ExtLCDDLDes1600x1200Data }, - {Panel_1600x1200, 0x0019, 0x0000, XGI_StLCDDLDes1600x1200Data }, - {PanelRef60Hz, 0x0008, 0x0008, XGI_NoScalingDesData }, - {Panel_1024x768x75, 0x0019, 0x0001, xgifb_lcddes_1024x768x75 }, - {Panel_1024x768x75, 0x0019, 0x0000, xgifb_lcddes_1024x768x75 }, - {Panel_1024x768x75, 0x0018, 0x0010, XGI_CetLCDDes1024x768x75Data }, - {Panel_1280x1024x75, 0x0019, 0x0001, xgifb_lcddldes_1280x1024x75 }, - {Panel_1280x1024x75, 0x0019, 0x0000, xgifb_lcddldes_1280x1024x75 }, - {Panel_1280x1024x75, 0x0018, 0x0010, XGI_CetLCDDLDes1280x1024x75Data }, - {PanelRef75Hz, 0x0008, 0x0008, XGI_NoScalingDesDatax75 }, - {0xFF, 0x0000, 0x0000, NULL } -}; - -static const struct XGI330_LCDDataTablStruct xgifb_epllcd_crt1_h[] = { - {Panel_1024x768, 0x0018, 0x0000, XGI_LVDSCRT11024x768_1_H }, - {Panel_1024x768, 0x0018, 0x0010, XGI_LVDSCRT11024x768_2_H }, - {Panel_1280x1024, 0x0018, 0x0000, XGI_LVDSCRT11280x1024_1_H }, - {Panel_1280x1024, 0x0018, 0x0010, XGI_LVDSCRT11280x1024_2_H }, - {Panel_1400x1050, 0x0018, 0x0000, XGI_LVDSCRT11400x1050_1_H }, - {Panel_1400x1050, 0x0018, 0x0010, XGI_LVDSCRT11400x1050_2_H }, - {Panel_1600x1200, 0x0018, 0x0000, XGI_LVDSCRT11600x1200_1_H }, - {Panel_1024x768x75, 0x0018, 0x0000, XGI_LVDSCRT11024x768_1_Hx75 }, - {Panel_1024x768x75, 0x0018, 0x0010, XGI_LVDSCRT11024x768_2_Hx75 }, - {Panel_1280x1024x75, 0x0018, 0x0000, XGI_LVDSCRT11280x1024_1_Hx75 }, - {Panel_1280x1024x75, 0x0018, 0x0010, XGI_LVDSCRT11280x1024_2_Hx75 }, - {0xFF, 0x0000, 0x0000, NULL } -}; - -static const struct XGI330_LCDDataTablStruct xgifb_epllcd_crt1_v[] = { - {Panel_1024x768, 0x0018, 0x0000, XGI_LVDSCRT11024x768_1_V }, - {Panel_1024x768, 0x0018, 0x0010, XGI_LVDSCRT11024x768_2_V }, - {Panel_1280x1024, 0x0018, 0x0000, XGI_LVDSCRT11280x1024_1_V }, - {Panel_1280x1024, 0x0018, 0x0010, XGI_LVDSCRT11280x1024_2_V }, - {Panel_1400x1050, 0x0018, 0x0000, XGI_LVDSCRT11400x1050_1_V }, - {Panel_1400x1050, 0x0018, 0x0010, XGI_LVDSCRT11400x1050_2_V }, - {Panel_1600x1200, 0x0018, 0x0000, XGI_LVDSCRT11600x1200_1_V }, - {Panel_1024x768x75, 0x0018, 0x0000, XGI_LVDSCRT11024x768_1_Vx75 }, - {Panel_1024x768x75, 0x0018, 0x0010, XGI_LVDSCRT11024x768_2_Vx75 }, - {Panel_1280x1024x75, 0x0018, 0x0000, XGI_LVDSCRT11280x1024_1_Vx75 }, - {Panel_1280x1024x75, 0x0018, 0x0010, XGI_LVDSCRT11280x1024_2_Vx75 }, - {0xFF, 0x0000, 0x0000, NULL } -}; - -static const struct XGI330_LCDDataTablStruct XGI_EPLLCDDataPtr[] = { - {Panel_1024x768, 0x0018, 0x0000, XGI_LVDS1024x768Data_1 }, - {Panel_1024x768, 0x0018, 0x0010, XGI_LVDS1024x768Data_2 }, - {Panel_1280x1024, 0x0018, 0x0000, XGI_LVDS1280x1024Data_1 }, - {Panel_1280x1024, 0x0018, 0x0010, XGI_LVDS1280x1024Data_2 }, - {Panel_1400x1050, 0x0018, 0x0000, XGI_LVDS1400x1050Data_1 }, - {Panel_1400x1050, 0x0018, 0x0010, XGI_LVDS1400x1050Data_2 }, - {Panel_1600x1200, 0x0018, 0x0000, XGI_LVDS1600x1200Data_1 }, - {PanelRef60Hz, 0x0008, 0x0008, XGI_LVDSNoScalingData }, - {Panel_1024x768x75, 0x0018, 0x0000, XGI_LVDS1024x768Data_1x75 }, - {Panel_1024x768x75, 0x0018, 0x0010, XGI_LVDS1024x768Data_2x75 }, - {Panel_1280x1024x75, 0x0018, 0x0000, XGI_LVDS1280x1024Data_1x75 }, - {Panel_1280x1024x75, 0x0018, 0x0010, XGI_LVDS1280x1024Data_2x75 }, - {PanelRef75Hz, 0x0008, 0x0008, XGI_LVDSNoScalingDatax75 }, - {0xFF, 0x0000, 0x0000, NULL } -}; - -static const struct XGI330_LCDDataTablStruct XGI_EPLLCDDesDataPtr[] = { - {Panel_1024x768, 0x0018, 0x0000, XGI_LVDS1024x768Des_1 }, - {Panel_1024x768, 0x0618, 0x0410, XGI_LVDS1024x768Des_3 }, - {Panel_1024x768, 0x0018, 0x0010, XGI_LVDS1024x768Des_2 }, - {Panel_1280x1024, 0x0018, 0x0000, XGI_LVDS1280x1024Des_1 }, - {Panel_1280x1024, 0x0018, 0x0010, XGI_LVDS1280x1024Des_2 }, - {Panel_1400x1050, 0x0018, 0x0000, XGI_LVDS1400x1050Des_1 }, - {Panel_1400x1050, 0x0018, 0x0010, XGI_LVDS1400x1050Des_2 }, - {Panel_1600x1200, 0x0018, 0x0000, XGI_LVDS1600x1200Des_1 }, - {PanelRef60Hz, 0x0008, 0x0008, XGI_LVDSNoScalingDesData }, - {Panel_1024x768x75, 0x0018, 0x0000, XGI_LVDS1024x768Des_1x75 }, - {Panel_1024x768x75, 0x0618, 0x0410, XGI_LVDS1024x768Des_3x75 }, - {Panel_1024x768x75, 0x0018, 0x0010, XGI_LVDS1024x768Des_2x75 }, - {Panel_1280x1024x75, 0x0018, 0x0000, XGI_LVDS1280x1024Des_1x75 }, - {Panel_1280x1024x75, 0x0018, 0x0010, XGI_LVDS1280x1024Des_2x75 }, - {PanelRef75Hz, 0x0008, 0x0008, XGI_LVDSNoScalingDesDatax75 }, - {0xFF, 0x0000, 0x0000, NULL } -}; - -static const struct XGI330_TVDataTablStruct XGI_TVDataTable[] = { - {0x09E1, 0x0001, XGI_ExtPALData}, - {0x09E1, 0x0000, XGI_ExtNTSCData}, - {0x09E1, 0x0801, XGI_StPALData}, - {0x09E1, 0x0800, XGI_StNTSCData}, - {0x49E0, 0x0100, XGI_ExtHiTVData}, - {0x49E0, 0x4100, XGI_St2HiTVData}, - {0x49E0, 0x4900, XGI_St1HiTVData}, - {0x09E0, 0x0020, XGI_ExtYPbPr525iData}, - {0x09E0, 0x0040, XGI_ExtYPbPr525pData}, - {0x09E0, 0x0080, XGI_ExtYPbPr750pData}, - {0x09E0, 0x0820, XGI_StYPbPr525iData}, - {0x09E0, 0x0840, XGI_StYPbPr525pData}, - {0x09E0, 0x0880, XGI_StYPbPr750pData}, - {0xffff, 0x0000, XGI_ExtNTSCData}, -}; - -/* Dual link only */ -static const struct XGI330_LCDCapStruct XGI_LCDDLCapList[] = { -/* LCDCap1024x768 */ - {Panel_1024x768, DefaultLCDCap, 0x88, 0x06, VCLK65_315, - 0x6C, 0xC3, 0x35, 0x62, - 0x0A, 0xC0, 0x28, 0x10}, -/* LCDCap1280x1024 */ - {Panel_1280x1024, XGI_LCDDualLink + DefaultLCDCap, - 0x70, 0x03, VCLK108_2_315, - 0x70, 0x44, 0xF8, 0x2F, - 0x0A, 0xC0, 0x30, 0x10}, -/* LCDCap1400x1050 */ - {Panel_1400x1050, XGI_LCDDualLink + DefaultLCDCap, - 0x70, 0x03, VCLK108_2_315, - 0x70, 0x44, 0xF8, 0x2F, - 0x0A, 0xC0, 0x30, 0x10}, -/* LCDCap1600x1200 */ - {Panel_1600x1200, XGI_LCDDualLink + DefaultLCDCap, - 0xC0, 0x03, VCLK162, - 0x43, 0x22, 0x70, 0x24, - 0x0A, 0xC0, 0x30, 0x10}, -/* LCDCap1024x768x75 */ - {Panel_1024x768x75, DefaultLCDCap, 0x60, 0, VCLK78_75, - 0x2B, 0x61, 0x2B, 0x61, - 0x0A, 0xC0, 0x28, 0x10}, -/* LCDCap1280x1024x75 */ - {Panel_1280x1024x75, XGI_LCDDualLink + DefaultLCDCap, - 0x90, 0x03, VCLK135_5, - 0x54, 0x42, 0x4A, 0x61, - 0x0A, 0xC0, 0x30, 0x10}, -/* LCDCapDefault */ - {0xFF, DefaultLCDCap, 0x88, 0x06, VCLK65_315, - 0x6C, 0xC3, 0x35, 0x62, - 0x0A, 0xC0, 0x28, 0x10} -}; - -static const struct XGI330_LCDCapStruct XGI_LCDCapList[] = { -/* LCDCap1024x768 */ - {Panel_1024x768, DefaultLCDCap, 0x88, 0x06, VCLK65_315, - 0x6C, 0xC3, 0x35, 0x62, - 0x0A, 0xC0, 0x28, 0x10}, -/* LCDCap1280x1024 */ - {Panel_1280x1024, DefaultLCDCap, - 0x70, 0x03, VCLK108_2_315, - 0x70, 0x44, 0xF8, 0x2F, - 0x0A, 0xC0, 0x30, 0x10}, -/* LCDCap1400x1050 */ - {Panel_1400x1050, DefaultLCDCap, - 0x70, 0x03, VCLK108_2_315, - 0x70, 0x44, 0xF8, 0x2F, - 0x0A, 0xC0, 0x30, 0x10}, -/* LCDCap1600x1200 */ - {Panel_1600x1200, DefaultLCDCap, - 0xC0, 0x03, VCLK162, - 0x5A, 0x23, 0x5A, 0x23, - 0x0A, 0xC0, 0x30, 0x10}, -/* LCDCap1024x768x75 */ - {Panel_1024x768x75, DefaultLCDCap, 0x60, 0, VCLK78_75, - 0x2B, 0x61, 0x2B, 0x61, - 0x0A, 0xC0, 0x28, 0x10}, -/* LCDCap1280x1024x75 */ - {Panel_1280x1024x75, DefaultLCDCap, - 0x90, 0x03, VCLK135_5, - 0x54, 0x42, 0x4A, 0x61, - 0x0A, 0xC0, 0x30, 0x10}, -/* LCDCapDefault */ - {0xFF, DefaultLCDCap, 0x88, 0x06, VCLK65_315, - 0x6C, 0xC3, 0x35, 0x62, - 0x0A, 0xC0, 0x28, 0x10} -}; - -const struct XGI_Ext2Struct XGI330_RefIndex[] = { - {Mode32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175, - 0x00, 0x10, 0x59, 320, 200},/* 00 */ - {Mode32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175, - 0x00, 0x10, 0x00, 320, 400},/* 01 */ - {Mode32Bpp + SupportAllCRT2 + SyncNN, RES320x240, VCLK25_175, - 0x04, 0x20, 0x50, 320, 240},/* 02 */ - {Mode32Bpp + SupportAllCRT2 + SyncPP, RES400x300, VCLK40, - 0x05, 0x32, 0x51, 400, 300},/* 03 */ - {Mode32Bpp + NoSupportTV + SyncNN + SupportTV1024, RES512x384, - VCLK65_315, 0x06, 0x43, 0x52, 512, 384},/* 04 */ - {Mode32Bpp + SupportAllCRT2 + SyncPN, RES640x400, VCLK25_175, - 0x00, 0x14, 0x2f, 640, 400},/* 05 */ - {Mode32Bpp + SupportAllCRT2 + SyncNN, RES640x480x60, VCLK25_175, - 0x04, 0x24, 0x2e, 640, 480},/* 06 640x480x60Hz (LCD 640x480x60z) */ - {Mode32Bpp + NoSupportHiVisionTV + SyncNN, RES640x480x72, VCLK31_5, - 0x04, 0x24, 0x2e, 640, 480},/* 07 640x480x72Hz (LCD 640x480x70Hz) */ - {Mode32Bpp + NoSupportHiVisionTV + SyncNN, RES640x480x75, VCLK31_5, - 0x47, 0x24, 0x2e, 640, 480},/* 08 640x480x75Hz (LCD 640x480x75Hz) */ - {Mode32Bpp + SupportRAMDAC2 + SyncNN, RES640x480x85, VCLK36, - 0x8A, 0x24, 0x2e, 640, 480},/* 09 640x480x85Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPN, RES640x480x100, VCLK43_163, - 0x00, 0x24, 0x2e, 640, 480},/* 0a 640x480x100Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPN, RES640x480x120, VCLK52_406, - 0x00, 0x24, 0x2e, 640, 480},/* 0b 640x480x120Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPN, RES640x480x160, VCLK72_852, - 0x00, 0x24, 0x2e, 640, 480},/* 0c 640x480x160Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncNN, RES640x480x200, VCLK86_6, - 0x00, 0x24, 0x2e, 640, 480},/* 0d 640x480x200Hz */ - {Mode32Bpp + NoSupportLCD + SyncPP, RES800x600x56, VCLK36, - 0x05, 0x36, 0x6a, 800, 600},/* 0e 800x600x56Hz */ - {Mode32Bpp + NoSupportTV + SyncPP, RES800x600x60, VCLK40, - 0x05, 0x36, 0x6a, 800, 600},/* 0f 800x600x60Hz (LCD 800x600x60Hz) */ - {Mode32Bpp + NoSupportHiVisionTV + SyncPP, RES800x600x72, VCLK50, - 0x48, 0x36, 0x6a, 800, 600},/* 10 800x600x72Hz (LCD 800x600x70Hz) */ - {Mode32Bpp + NoSupportHiVisionTV + SyncPP, RES800x600x75, VCLK49_5, - 0x8B, 0x36, 0x6a, 800, 600},/* 11 800x600x75Hz (LCD 800x600x75Hz) */ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES800x600x85, VCLK56_25, - 0x00, 0x36, 0x6a, 800, 600},/* 12 800x600x85Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPN, RES800x600x100, VCLK68_179, - 0x00, 0x36, 0x6a, 800, 600},/* 13 800x600x100Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPN, RES800x600x120, VCLK83_95, - 0x00, 0x36, 0x6a, 800, 600},/* 14 800x600x120Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPN, RES800x600x160, VCLK116_406, - 0x00, 0x36, 0x6a, 800, 600},/* 15 800x600x160Hz */ - {Mode32Bpp + InterlaceMode + SyncPP, RES1024x768x43, VCLK44_9, - 0x00, 0x47, 0x37, 1024, 768},/* 16 1024x768x43Hz */ - /* 17 1024x768x60Hz (LCD 1024x768x60Hz) */ - {Mode32Bpp + NoSupportTV + SyncNN + SupportTV1024, RES1024x768x60, - VCLK65_315, 0x06, 0x47, 0x37, 1024, 768}, - {Mode32Bpp + NoSupportHiVisionTV + SyncNN, RES1024x768x70, VCLK75, - 0x49, 0x47, 0x37, 1024, 768},/* 18 1024x768x70Hz (LCD 1024x768x70Hz) */ - {Mode32Bpp + NoSupportHiVisionTV + SyncPP, RES1024x768x75, VCLK78_75, - 0x00, 0x47, 0x37, 1024, 768},/* 19 1024x768x75Hz (LCD 1024x768x75Hz) */ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES1024x768x85, VCLK94_5, - 0x8C, 0x47, 0x37, 1024, 768},/* 1a 1024x768x85Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPN, RES1024x768x100, VCLK113_309, - 0x00, 0x47, 0x37, 1024, 768},/* 1b 1024x768x100Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPN, RES1024x768x120, VCLK139_054, - 0x00, 0x47, 0x37, 1024, 768},/* 1c 1024x768x120Hz */ - {Mode32Bpp + SupportLCD + SyncPP, RES1280x960x60, VCLK108_2_315, - 0x08, 0x58, 0x7b, 1280, 960},/* 1d 1280x960x60Hz */ - {Mode32Bpp + InterlaceMode + SyncPP, RES1280x1024x43, VCLK78_75, - 0x00, 0x58, 0x3a, 1280, 1024},/* 1e 1280x1024x43Hz */ - {Mode32Bpp + NoSupportTV + SyncPP, RES1280x1024x60, VCLK108_2_315, - 0x07, 0x58, 0x3a, 1280, 1024},/*1f 1280x1024x60Hz (LCD 1280x1024x60Hz)*/ - {Mode32Bpp + NoSupportTV + SyncPP, RES1280x1024x75, VCLK135_5, - 0x00, 0x58, 0x3a, 1280, 1024},/*20 1280x1024x75Hz (LCD 1280x1024x75Hz)*/ - {Mode32Bpp + SyncPP, RES1280x1024x85, VCLK157_5, - 0x00, 0x58, 0x3a, 1280, 1024},/* 21 1280x1024x85Hz */ - /* 22 1600x1200x60Hz */ - {Mode32Bpp + SupportLCD + SyncPP + SupportCRT2in301C, - RES1600x1200x60, VCLK162, 0x09, 0x7A, 0x3c, 1600, 1200}, - {Mode32Bpp + SyncPP + SupportCRT2in301C, RES1600x1200x65, VCLK175, - 0x00, 0x69, 0x3c, 1600, 1200},/* 23 1600x1200x65Hz */ - {Mode32Bpp + SyncPP + SupportCRT2in301C, RES1600x1200x70, VCLK189, - 0x00, 0x69, 0x3c, 1600, 1200},/* 24 1600x1200x70Hz */ - {Mode32Bpp + SyncPP + SupportCRT2in301C, RES1600x1200x75, VCLK202_5, - 0x00, 0x69, 0x3c, 1600, 1200},/* 25 1600x1200x75Hz */ - {Mode32Bpp + SyncPP, RES1600x1200x85, VCLK229_5, - 0x00, 0x69, 0x3c, 1600, 1200},/* 26 1600x1200x85Hz */ - {Mode32Bpp + SyncPP, RES1600x1200x100, VCLK269_655, - 0x00, 0x69, 0x3c, 1600, 1200},/* 27 1600x1200x100Hz */ - {Mode32Bpp + SyncPP, RES1600x1200x120, VCLK323_586, - 0x00, 0x69, 0x3c, 1600, 1200},/* 28 1600x1200x120Hz */ - {Mode32Bpp + SupportLCD + SyncNP, RES1920x1440x60, VCLK234, - 0x00, 0x00, 0x68, 1920, 1440},/* 29 1920x1440x60Hz */ - {Mode32Bpp + SyncPN, RES1920x1440x65, VCLK254_817, - 0x00, 0x00, 0x68, 1920, 1440},/* 2a 1920x1440x65Hz */ - {Mode32Bpp + SyncPN, RES1920x1440x70, VCLK277_015, - 0x00, 0x00, 0x68, 1920, 1440},/* 2b 1920x1440x70Hz */ - {Mode32Bpp + SyncPN, RES1920x1440x75, VCLK291_132, - 0x00, 0x00, 0x68, 1920, 1440},/* 2c 1920x1440x75Hz */ - {Mode32Bpp + SyncPN, RES1920x1440x85, VCLK330_615, - 0x00, 0x00, 0x68, 1920, 1440},/* 2d 1920x1440x85Hz */ - {Mode16Bpp + SyncPN, RES1920x1440x100, VCLK388_631, - 0x00, 0x00, 0x68, 1920, 1440},/* 2e 1920x1440x100Hz */ - {Mode32Bpp + SupportLCD + SyncPN, RES2048x1536x60, VCLK266_952, - 0x00, 0x00, 0x6c, 2048, 1536},/* 2f 2048x1536x60Hz */ - {Mode32Bpp + SyncPN, RES2048x1536x65, VCLK291_766, - 0x00, 0x00, 0x6c, 2048, 1536},/* 30 2048x1536x65Hz */ - {Mode32Bpp + SyncPN, RES2048x1536x70, VCLK315_195, - 0x00, 0x00, 0x6c, 2048, 1536},/* 31 2048x1536x70Hz */ - {Mode32Bpp + SyncPN, RES2048x1536x75, VCLK340_477, - 0x00, 0x00, 0x6c, 2048, 1536},/* 32 2048x1536x75Hz */ - {Mode16Bpp + SyncPN, RES2048x1536x85, VCLK375_847, - 0x00, 0x00, 0x6c, 2048, 1536},/* 33 2048x1536x85Hz */ - {Mode32Bpp + SupportHiVision + SupportRAMDAC2 + - SyncPP + SupportYPbPr750p, RES800x480x60, VCLK39_77, - 0x08, 0x00, 0x70, 800, 480},/* 34 800x480x60Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES800x480x75, VCLK49_5, - 0x08, 0x00, 0x70, 800, 480},/* 35 800x480x75Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES800x480x85, VCLK56_25, - 0x08, 0x00, 0x70, 800, 480},/* 36 800x480x85Hz */ - {Mode32Bpp + SupportHiVision + SupportRAMDAC2 + - SyncPP + SupportYPbPr750p, RES1024x576x60, VCLK65_315, - 0x09, 0x00, 0x71, 1024, 576},/* 37 1024x576x60Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES1024x576x75, VCLK78_75, - 0x09, 0x00, 0x71, 1024, 576},/* 38 1024x576x75Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES1024x576x85, VCLK94_5, - 0x09, 0x00, 0x71, 1024, 576},/* 39 1024x576x85Hz */ - {Mode32Bpp + SupportHiVision + SupportRAMDAC2 + - SyncPP + SupportYPbPr750p, RES1280x720x60, VCLK108_2_315, - 0x0A, 0x00, 0x75, 1280, 720},/* 3a 1280x720x60Hz*/ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES1280x720x75, VCLK135_5, - 0x0A, 0x00, 0x75, 1280, 720},/* 3b 1280x720x75Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES1280x720x85, VCLK157_5, - 0x0A, 0x00, 0x75, 1280, 720},/* 3c 1280x720x85Hz */ - {Mode32Bpp + SupportTV + SyncNN, RES720x480x60, VCLK28_322, - 0x06, 0x00, 0x31, 720, 480},/* 3d 720x480x60Hz */ - {Mode32Bpp + SupportTV + SyncPP, RES720x576x56, VCLK36, - 0x06, 0x00, 0x32, 720, 576},/* 3e 720x576x56Hz */ - {Mode32Bpp + InterlaceMode + NoSupportLCD + SyncPP, RES856x480x79I, - VCLK35_2, 0x00, 0x00, 0x00, 856, 480},/* 3f 856x480x79I */ - {Mode32Bpp + NoSupportLCD + SyncNN, RES856x480x60, VCLK35_2, - 0x00, 0x00, 0x00, 856, 480},/* 40 856x480x60Hz */ - {Mode32Bpp + NoSupportHiVisionTV + SyncPP, RES1280x768x60, - VCLK79_411, 0x08, 0x48, 0x23, 1280, 768},/* 41 1280x768x60Hz */ - {Mode32Bpp + NoSupportHiVisionTV + SyncPP, RES1400x1050x60, - VCLK122_61, 0x08, 0x69, 0x26, 1400, 1050},/* 42 1400x1050x60Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES1152x864x60, VCLK80_350, - 0x37, 0x00, 0x20, 1152, 864},/* 43 1152x864x60Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPP, RES1152x864x75, VCLK107_385, - 0x37, 0x00, 0x20, 1152, 864},/* 44 1152x864x75Hz */ - {Mode32Bpp + SupportLCD + SupportRAMDAC2 + SyncPP, RES1280x960x75, - VCLK125_999, 0x3A, 0x88, 0x7b, 1280, 960},/* 45 1280x960x75Hz */ - {Mode32Bpp + SupportLCD + SupportRAMDAC2 + SyncPP, RES1280x960x85, - VCLK148_5, 0x0A, 0x88, 0x7b, 1280, 960},/* 46 1280x960x85Hz */ - {Mode32Bpp + SupportLCD + SupportRAMDAC2 + SyncPP, RES1280x960x120, - VCLK217_325, 0x3A, 0x88, 0x7b, 1280, 960},/* 47 1280x960x120Hz */ - {Mode32Bpp + SupportRAMDAC2 + SyncPN, RES1024x768x160, VCLK139_054, - 0x30, 0x47, 0x37, 1024, 768},/* 48 1024x768x160Hz */ -}; - -static const unsigned char XGI330_ScreenOffset[] = { - 0x14, 0x19, 0x20, 0x28, 0x32, 0x40, - 0x50, 0x64, 0x78, 0x80, 0x2d, 0x35, - 0x57, 0x48 -}; - -static const struct SiS_ModeResInfo_S XGI330_ModeResInfo[] = { - { 320, 200, 8, 8}, - { 320, 240, 8, 8}, - { 320, 400, 8, 8}, - { 400, 300, 8, 8}, - { 512, 384, 8, 8}, - { 640, 400, 8, 16}, - { 640, 480, 8, 16}, - { 800, 600, 8, 16}, - {1024, 768, 8, 16}, - {1280, 1024, 8, 16}, - {1600, 1200, 8, 16}, - {1920, 1440, 8, 16}, - {2048, 1536, 8, 16}, - { 720, 480, 8, 16}, - { 720, 576, 8, 16}, - {1280, 960, 8, 16}, - { 800, 480, 8, 16}, - {1024, 576, 8, 16}, - {1280, 720, 8, 16}, - { 856, 480, 8, 16}, - {1280, 768, 8, 16}, - {1400, 1050, 8, 16}, - {1152, 864, 8, 16} -}; - -const struct SiS_VCLKData XGI_VCLKData[] = { - /* SR2B,SR2C,SR2D */ - {0x1B, 0xE1, 25}, /* 00 (25.175MHz) */ - {0x4E, 0xE4, 28}, /* 01 (28.322MHz) */ - {0x57, 0xE4, 31}, /* 02 (31.500MHz) */ - {0xC3, 0xC8, 36}, /* 03 (36.000MHz) */ - {0x42, 0xE2, 40}, /* 04 (40.000MHz) */ - {0xFE, 0xCD, 43}, /* 05 (43.163MHz) */ - {0x5D, 0xC4, 44}, /* 06 (44.900MHz) */ - {0x52, 0xE2, 49}, /* 07 (49.500MHz) */ - {0x53, 0xE2, 50}, /* 08 (50.000MHz) */ - {0x74, 0x67, 52}, /* 09 (52.406MHz) */ - {0x6D, 0x66, 56}, /* 0A (56.250MHz) */ - {0x6C, 0xC3, 65}, /* 0B (65.000MHz) */ - {0x46, 0x44, 67}, /* 0C (67.765MHz) */ - {0xB1, 0x46, 68}, /* 0D (68.179MHz) */ - {0xD3, 0x4A, 72}, /* 0E (72.852MHz) */ - {0x29, 0x61, 75}, /* 0F (75.000MHz) */ - {0x6E, 0x46, 76}, /* 10 (75.800MHz) */ - {0x2B, 0x61, 78}, /* 11 (78.750MHz) */ - {0x31, 0x42, 79}, /* 12 (79.411MHz) */ - {0xAB, 0x44, 83}, /* 13 (83.950MHz) */ - {0x46, 0x25, 84}, /* 14 (84.800MHz) */ - {0x78, 0x29, 86}, /* 15 (86.600MHz) */ - {0x62, 0x44, 94}, /* 16 (94.500MHz) */ - {0x2B, 0x41, 104}, /* 17 (104.998MHz) */ - {0x3A, 0x23, 105}, /* 18 (105.882MHz) */ - {0x70, 0x44, 108}, /* 19 (107.862MHz) */ - {0x3C, 0x23, 109}, /* 1A (109.175MHz) */ - {0x5E, 0x43, 113}, /* 1B (113.309MHz) */ - {0xBC, 0x44, 116}, /* 1C (116.406MHz) */ - {0xE0, 0x46, 132}, /* 1D (132.258MHz) */ - {0x54, 0x42, 135}, /* 1E (135.500MHz) */ - {0x9C, 0x22, 139}, /* 1F (139.275MHz) */ - {0x41, 0x22, 157}, /* 20 (157.500MHz) */ - {0x70, 0x24, 162}, /* 21 (161.793MHz) */ - {0x30, 0x21, 175}, /* 22 (175.000MHz) */ - {0x4E, 0x22, 189}, /* 23 (188.520MHz) */ - {0xDE, 0x26, 194}, /* 24 (194.400MHz) */ - {0x62, 0x06, 202}, /* 25 (202.500MHz) */ - {0x3F, 0x03, 229}, /* 26 (229.500MHz) */ - {0xB8, 0x06, 234}, /* 27 (233.178MHz) */ - {0x34, 0x02, 253}, /* 28 (252.699MHz) */ - {0x58, 0x04, 255}, /* 29 (254.817MHz) */ - {0x24, 0x01, 265}, /* 2A (265.728MHz) */ - {0x9B, 0x02, 267}, /* 2B (266.952MHz) */ - {0x70, 0x05, 270}, /* 2C (269.65567MHz) */ - {0x25, 0x01, 272}, /* 2D (272.04199MHz) */ - {0x9C, 0x02, 277}, /* 2E (277.015MHz) */ - {0x27, 0x01, 286}, /* 2F (286.359985MHz) */ - {0xB3, 0x04, 291}, /* 30 (291.13266MHz) */ - {0xBC, 0x05, 292}, /* 31 (291.766MHz) */ - {0xF6, 0x0A, 310}, /* 32 (309.789459MHz) */ - {0x95, 0x01, 315}, /* 33 (315.195MHz) */ - {0xF0, 0x09, 324}, /* 34 (323.586792MHz) */ - {0xFE, 0x0A, 331}, /* 35 (330.615631MHz) */ - {0xF3, 0x09, 332}, /* 36 (332.177612MHz) */ - {0x5E, 0x03, 340}, /* 37 (340.477MHz) */ - {0xE8, 0x07, 376}, /* 38 (375.847504MHz) */ - {0xDE, 0x06, 389}, /* 39 (388.631439MHz) */ - {0x52, 0x2A, 54}, /* 3A (54.000MHz) */ - {0x52, 0x6A, 27}, /* 3B (27.000MHz) */ - {0x62, 0x24, 70}, /* 3C (70.874991MHz) */ - {0x62, 0x64, 70}, /* 3D (70.1048912MHz) */ - {0xA8, 0x4C, 30}, /* 3E (30.1048912MHz) */ - {0x20, 0x26, 33}, /* 3F (33.7499957MHz) */ - {0x31, 0xc2, 39}, /* 40 (39.77MHz) */ - {0x11, 0x21, 30}, /* 41 (30MHz) }// NTSC 1024X768 */ - {0x2E, 0x48, 25}, /* 42 (25.175MHz) }// ScaleLCD */ - {0x24, 0x46, 25}, /* 43 (25.175MHz) */ - {0x26, 0x64, 28}, /* 44 (28.322MHz) */ - {0x37, 0x64, 40}, /* 45 (40.000MHz) */ - {0xA1, 0x42, 108}, /* 46 (95.000MHz) }// QVGA */ - {0x37, 0x61, 100}, /* 47 (100.00MHz) */ - {0x78, 0x27, 108}, /* 48 (108.200MHz) */ - {0xBF, 0xC8, 35}, /* 49 (35.2MHz) */ - {0x66, 0x43, 123}, /* 4A (122.61Mhz) */ - {0x2C, 0x61, 80}, /* 4B (80.350Mhz) */ - {0x3B, 0x61, 108}, /* 4C (107.385Mhz) */ - {0x69, 0x61, 191}, /* 4D (190.96MHz ) */ - {0x4F, 0x22, 192}, /* 4E (192.069MHz) */ - {0x28, 0x26, 322}, /* 4F (322.273MHz) */ - {0x5C, 0x6B, 27}, /* 50 (27.74HMz) */ - {0x57, 0x24, 126}, /* 51 (125.999MHz) */ - {0x5C, 0x42, 148}, /* 52 (148.5MHz) */ - {0x42, 0x61, 120}, /* 53 (120.839MHz) */ - {0x62, 0x61, 178}, /* 54 (178.992MHz) */ - {0x59, 0x22, 217}, /* 55 (217.325MHz) */ - {0x29, 0x01, 300}, /* 56 (299.505Mhz) */ - {0x52, 0x63, 74}, /* 57 (74.25MHz) */ - {0xFF, 0x00, 0} /* End mark */ -}; - -static const struct SiS_VBVCLKData XGI_VBVCLKData[] = { - {0x1B, 0xE1, 25}, /* 00 (25.175MHz) */ - {0x4E, 0xE4, 28}, /* 01 (28.322MHz) */ - {0x57, 0xE4, 31}, /* 02 (31.500MHz) */ - {0xC3, 0xC8, 36}, /* 03 (36.000MHz) */ - {0x42, 0x47, 40}, /* 04 (40.000MHz) */ - {0xFE, 0xCD, 43}, /* 05 (43.163MHz) */ - {0x5D, 0xC4, 44}, /* 06 (44.900MHz) */ - {0x52, 0x47, 49}, /* 07 (49.500MHz) */ - {0x53, 0x47, 50}, /* 08 (50.000MHz) */ - {0x74, 0x67, 52}, /* 09 (52.406MHz) */ - {0x6D, 0x66, 56}, /* 0A (56.250MHz) */ - {0x35, 0x62, 65}, /* 0B (65.000MHz) */ - {0x46, 0x44, 67}, /* 0C (67.765MHz) */ - {0xB1, 0x46, 68}, /* 0D (68.179MHz) */ - {0xD3, 0x4A, 72}, /* 0E (72.852MHz) */ - {0x29, 0x61, 75}, /* 0F (75.000MHz) */ - {0x6D, 0x46, 75}, /* 10 (75.800MHz) */ - {0x41, 0x43, 78}, /* 11 (78.750MHz) */ - {0x31, 0x42, 79}, /* 12 (79.411MHz) */ - {0xAB, 0x44, 83}, /* 13 (83.950MHz) */ - {0x46, 0x25, 84}, /* 14 (84.800MHz) */ - {0x78, 0x29, 86}, /* 15 (86.600MHz) */ - {0x62, 0x44, 94}, /* 16 (94.500MHz) */ - {0x2B, 0x22, 104}, /* 17 (104.998MHz) */ - {0x49, 0x24, 105}, /* 18 (105.882MHz) */ - {0xF8, 0x2F, 108}, /* 19 (108.279MHz) */ - {0x3C, 0x23, 109}, /* 1A (109.175MHz) */ - {0x5E, 0x43, 113}, /* 1B (113.309MHz) */ - {0xBC, 0x44, 116}, /* 1C (116.406MHz) */ - {0xE0, 0x46, 132}, /* 1D (132.258MHz) */ - {0xD4, 0x28, 135}, /* 1E (135.220MHz) */ - {0xEA, 0x2A, 139}, /* 1F (139.275MHz) */ - {0x41, 0x22, 157}, /* 20 (157.500MHz) */ - {0x70, 0x24, 162}, /* 21 (161.793MHz) */ - {0x30, 0x21, 175}, /* 22 (175.000MHz) */ - {0x4E, 0x22, 189}, /* 23 (188.520MHz) */ - {0xDE, 0x26, 194}, /* 24 (194.400MHz) */ - {0x70, 0x07, 202}, /* 25 (202.500MHz) */ - {0x3F, 0x03, 229}, /* 26 (229.500MHz) */ - {0xB8, 0x06, 234}, /* 27 (233.178MHz) */ - {0x34, 0x02, 253}, /* 28 (252.699997 MHz) */ - {0x58, 0x04, 255}, /* 29 (254.817MHz) */ - {0x24, 0x01, 265}, /* 2A (265.728MHz) */ - {0x9B, 0x02, 267}, /* 2B (266.952MHz) */ - {0x70, 0x05, 270}, /* 2C (269.65567 MHz) */ - {0x25, 0x01, 272}, /* 2D (272.041992 MHz) */ - {0x9C, 0x02, 277}, /* 2E (277.015MHz) */ - {0x27, 0x01, 286}, /* 2F (286.359985 MHz) */ - {0x3C, 0x02, 291}, /* 30 (291.132660 MHz) */ - {0xEF, 0x0A, 292}, /* 31 (291.766MHz) */ - {0xF6, 0x0A, 310}, /* 32 (309.789459 MHz) */ - {0x95, 0x01, 315}, /* 33 (315.195MHz) */ - {0xF0, 0x09, 324}, /* 34 (323.586792 MHz) */ - {0xFE, 0x0A, 331}, /* 35 (330.615631 MHz) */ - {0xF3, 0x09, 332}, /* 36 (332.177612 MHz) */ - {0xEA, 0x08, 340}, /* 37 (340.477MHz) */ - {0xE8, 0x07, 376}, /* 38 (375.847504 MHz) */ - {0xDE, 0x06, 389}, /* 39 (388.631439 MHz) */ - {0x52, 0x2A, 54}, /* 3A (54.000MHz) */ - {0x52, 0x6A, 27}, /* 3B (27.000MHz) */ - {0x62, 0x24, 70}, /* 3C (70.874991MHz) */ - {0x62, 0x64, 70}, /* 3D (70.1048912MHz) */ - {0xA8, 0x4C, 30}, /* 3E (30.1048912MHz) */ - {0x20, 0x26, 33}, /* 3F (33.7499957MHz) */ - {0x31, 0xc2, 39}, /* 40 (39.77MHz) */ - {0x11, 0x21, 30}, /* 41 (30MHz) }// NTSC 1024X768 */ - {0x2E, 0x48, 25}, /* 42 (25.175MHz) }// ScaleLCD */ - {0x24, 0x46, 25}, /* 43 (25.175MHz) */ - {0x26, 0x64, 28}, /* 44 (28.322MHz) */ - {0x37, 0x64, 40}, /* 45 (40.000MHz) */ - {0xA1, 0x42, 108}, /* 46 (95.000MHz) }// QVGA */ - {0x37, 0x61, 100}, /* 47 (100.00MHz) */ - {0x78, 0x27, 108}, /* 48 (108.200MHz) */ - {0xBF, 0xC8, 35 }, /* 49 (35.2MHz) */ - {0x66, 0x43, 123}, /* 4A (122.61Mhz) */ - {0x2C, 0x61, 80 }, /* 4B (80.350Mhz) */ - {0x3B, 0x61, 108}, /* 4C (107.385Mhz) */ - {0x69, 0x61, 191}, /* 4D (190.96MHz ) */ - {0x4F, 0x22, 192}, /* 4E (192.069MHz) */ - {0x28, 0x26, 322}, /* 4F (322.273MHz) */ - {0x5C, 0x6B, 27}, /* 50 (27.74HMz) */ - {0x57, 0x24, 126}, /* 51 (125.999MHz) */ - {0x5C, 0x42, 148}, /* 52 (148.5MHz) */ - {0x42, 0x61, 120}, /* 53 (120.839MHz) */ - {0x62, 0x61, 178}, /* 54 (178.992MHz) */ - {0x59, 0x22, 217}, /* 55 (217.325MHz) */ - {0x29, 0x01, 300}, /* 56 (299.505Mhz) */ - {0x52, 0x63, 74}, /* 57 (74.25MHz) */ - {0xFF, 0x00, 0} /* End mark */ -}; - -#define XGI301TVDelay 0x22 -#define XGI301LCDDelay 0x12 - -static const unsigned char TVAntiFlickList[] = {/* NTSCAntiFlicker */ - 0x04, /* ; 0 Adaptive */ - 0x00, /* ; 1 new anti-flicker ? */ - - 0x04, /* ; 0 Adaptive */ - 0x08, /* ; 1 new anti-flicker ? */ - - 0x04, /* ; 0 ? */ - 0x00 /* ; 1 new anti-flicker ? */ -}; - -static const unsigned char TVEdgeList[] = { - 0x00, /* ; 0 NTSC No Edge enhance */ - 0x04, /* ; 1 NTSC Adaptive Edge enhance */ - 0x00, /* ; 0 PAL No Edge enhance */ - 0x04, /* ; 1 PAL Adaptive Edge enhance */ - 0x00, /* ; 0 HiTV */ - 0x00 /* ; 1 HiTV */ -}; - -static const unsigned long TVPhaseList[] = { - 0x08BAED21, /* ; 0 NTSC phase */ - 0x00E3052A, /* ; 1 PAL phase */ - 0x9B2EE421, /* ; 2 PAL-M phase */ - 0xBA3EF421, /* ; 3 PAL-N phase */ - 0xA7A28B1E, /* ; 4 NTSC 1024x768 */ - 0xE00A831E, /* ; 5 PAL-M 1024x768 */ - 0x00000000, /* ; 6 reserved */ - 0x00000000, /* ; 7 reserved */ - 0xD67BF021, /* ; 8 NTSC phase */ - 0xE986092A, /* ; 9 PAL phase */ - 0xA4EFE621, /* ; A PAL-M phase */ - 0x4694F621, /* ; B PAL-N phase */ - 0x8BDE711C, /* ; C NTSC 1024x768 */ - 0xE00A831E /* ; D PAL-M 1024x768 */ -}; - -static const unsigned char NTSCYFilter1[] = { - 0x00, 0xF4, 0x10, 0x38, /* 0 : 320x text mode */ - 0x00, 0xF4, 0x10, 0x38, /* 1 : 360x text mode */ - 0xEB, 0x04, 0x25, 0x18, /* 2 : 640x text mode */ - 0xF1, 0x04, 0x1F, 0x18, /* 3 : 720x text mode */ - 0x00, 0xF4, 0x10, 0x38, /* 4 : 320x gra. mode */ - 0xEB, 0x04, 0x25, 0x18, /* 5 : 640x gra. mode */ - 0xEB, 0x15, 0x25, 0xF6 /* 6 : 800x gra. mode */ -}; - -static const unsigned char PALYFilter1[] = { - 0x00, 0xF4, 0x10, 0x38, /* 0 : 320x text mode */ - 0x00, 0xF4, 0x10, 0x38, /* 1 : 360x text mode */ - 0xF1, 0xF7, 0x1F, 0x32, /* 2 : 640x text mode */ - 0xF3, 0x00, 0x1D, 0x20, /* 3 : 720x text mode */ - 0x00, 0xF4, 0x10, 0x38, /* 4 : 320x gra. mode */ - 0xF1, 0xF7, 0x1F, 0x32, /* 5 : 640x gra. mode */ - 0xFC, 0xFB, 0x14, 0x2A /* 6 : 800x gra. mode */ -}; - -static const unsigned char xgifb_palmn_yfilter1[] = { - 0x00, 0xF4, 0x10, 0x38, /* 0 : 320x text mode */ - 0x00, 0xF4, 0x10, 0x38, /* 1 : 360x text mode */ - 0xEB, 0x04, 0x10, 0x18, /* 2 : 640x text mode */ - 0xF7, 0x06, 0x19, 0x14, /* 3 : 720x text mode */ - 0x00, 0xF4, 0x10, 0x38, /* 4 : 320x gra. mode */ - 0xEB, 0x04, 0x25, 0x18, /* 5 : 640x gra. mode */ - 0xEB, 0x15, 0x25, 0xF6, /* 6 : 800x gra. mode */ - 0xFF, 0xFF, 0xFF, 0xFF /* End of Table */ -}; - -static const unsigned char xgifb_yfilter2[] = { - 0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46, /* 0 : 320x text mode */ - 0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C, /* 1 : 360x text mode */ - 0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46, /* 2 : 640x text mode */ - 0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C, /* 3 : 720x text mode */ - 0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46, /* 4 : 320x gra. mode */ - 0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46, /* 5 : 640x gra. mode */ - 0x01, 0x01, 0xFC, 0xF8, 0x08, 0x26, 0x38, /* 6 : 800x gra. mode */ - 0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28 /* 7 : 1024xgra. mode */ -}; - -static const unsigned char XGI_NTSC1024AdjTime[] = { - 0xa7, 0x07, 0xf2, 0x6e, 0x17, 0x8b, 0x73, 0x53, - 0x13, 0x40, 0x34, 0xF4, 0x63, 0xBB, 0xCC, 0x7A, - 0x58, 0xe4, 0x73, 0xd0, 0x13 -}; - -static const struct XGI301C_Tap4TimingStruct xgifb_tap4_timing[] = { - {0, { - 0x00, 0x20, 0x00, 0x00, 0x7F, 0x20, 0x02, 0x7F, /* ; C0-C7 */ - 0x7D, 0x20, 0x04, 0x7F, 0x7D, 0x1F, 0x06, 0x7E, /* ; C8-CF */ - 0x7C, 0x1D, 0x09, 0x7E, 0x7C, 0x1B, 0x0B, 0x7E, /* ; D0-D7 */ - 0x7C, 0x19, 0x0E, 0x7D, 0x7C, 0x17, 0x11, 0x7C, /* ; D8-DF */ - 0x7C, 0x14, 0x14, 0x7C, 0x7C, 0x11, 0x17, 0x7C, /* ; E0-E7 */ - 0x7D, 0x0E, 0x19, 0x7C, 0x7E, 0x0B, 0x1B, 0x7C, /* ; EA-EF */ - 0x7E, 0x09, 0x1D, 0x7C, 0x7F, 0x06, 0x1F, 0x7C, /* ; F0-F7 */ - 0x7F, 0x04, 0x20, 0x7D, 0x00, 0x02, 0x20, 0x7E /* ; F8-FF */ - } - } -}; - -static const struct XGI301C_Tap4TimingStruct PALTap4Timing[] = { - {600, { - 0x05, 0x19, 0x05, 0x7D, 0x03, 0x19, 0x06, 0x7E, /* ; C0-C7 */ - 0x02, 0x19, 0x08, 0x7D, 0x01, 0x18, 0x0A, 0x7D, /* ; C8-CF */ - 0x00, 0x18, 0x0C, 0x7C, 0x7F, 0x17, 0x0E, 0x7C, /* ; D0-D7 */ - 0x7E, 0x16, 0x0F, 0x7D, 0x7E, 0x14, 0x11, 0x7D, /* ; D8-DF */ - 0x7D, 0x13, 0x13, 0x7D, 0x7D, 0x11, 0x14, 0x7E, /* ; E0-E7 */ - 0x7D, 0x0F, 0x16, 0x7E, 0x7D, 0x0E, 0x17, 0x7E, /* ; EA-EF */ - 0x7D, 0x0C, 0x18, 0x7F, 0x7D, 0x0A, 0x18, 0x01, /* ; F0-F7 */ - 0x7D, 0x08, 0x19, 0x02, 0x7D, 0x06, 0x19, 0x04 /* ; F8-FF */ - } - }, - {768, { - 0x08, 0x12, 0x08, 0x7E, 0x07, 0x12, 0x09, 0x7E, /* ; C0-C7 */ - 0x06, 0x12, 0x0A, 0x7E, 0x05, 0x11, 0x0B, 0x7F, /* ; C8-CF */ - 0x04, 0x11, 0x0C, 0x7F, 0x03, 0x11, 0x0C, 0x00, /* ; D0-D7 */ - 0x03, 0x10, 0x0D, 0x00, 0x02, 0x0F, 0x0E, 0x01, /* ; D8-DF */ - 0x01, 0x0F, 0x0F, 0x01, 0x01, 0x0E, 0x0F, 0x02, /* ; E0-E7 */ - 0x00, 0x0D, 0x10, 0x03, 0x7F, 0x0C, 0x11, 0x04, /* ; EA-EF */ - 0x7F, 0x0C, 0x11, 0x04, 0x7F, 0x0B, 0x11, 0x05, /* ; F0-F7 */ - 0x7E, 0x0A, 0x12, 0x06, 0x7E, 0x09, 0x12, 0x07 /* ; F8-FF */ - } - }, - {0xFFFF, { - 0x04, 0x1A, 0x04, 0x7E, 0x02, 0x1B, 0x05, 0x7E, /* ; C0-C7 */ - 0x01, 0x1A, 0x07, 0x7E, 0x00, 0x1A, 0x09, 0x7D, /* ; C8-CF */ - 0x7F, 0x19, 0x0B, 0x7D, 0x7E, 0x18, 0x0D, 0x7D, /* ; D0-D7 */ - 0x7D, 0x17, 0x10, 0x7C, 0x7D, 0x15, 0x12, 0x7C, /* ; D8-DF */ - 0x7C, 0x14, 0x14, 0x7C, 0x7C, 0x12, 0x15, 0x7D, /* ; E0-E7 */ - 0x7C, 0x10, 0x17, 0x7D, 0x7C, 0x0D, 0x18, 0x7F, /* ; EA-EF */ - 0x7D, 0x0B, 0x19, 0x7F, 0x7D, 0x09, 0x1A, 0x00, /* ; F0-F7 */ - 0x7D, 0x07, 0x1A, 0x02, 0x7E, 0x05, 0x1B, 0x02 /* ; F8-FF */ - } - } -}; - -static const struct XGI301C_Tap4TimingStruct xgifb_ntsc_525_tap4_timing[] = { - {480, { - 0x04, 0x1A, 0x04, 0x7E, 0x03, 0x1A, 0x06, 0x7D, /* ; C0-C7 */ - 0x01, 0x1A, 0x08, 0x7D, 0x00, 0x19, 0x0A, 0x7D, /* ; C8-CF */ - 0x7F, 0x19, 0x0C, 0x7C, 0x7E, 0x18, 0x0E, 0x7C, /* ; D0-D7 */ - 0x7E, 0x17, 0x10, 0x7B, 0x7D, 0x15, 0x12, 0x7C, /* ; D8-DF */ - 0x7D, 0x13, 0x13, 0x7D, 0x7C, 0x12, 0x15, 0x7D, /* ; E0-E7 */ - 0x7C, 0x10, 0x17, 0x7D, 0x7C, 0x0E, 0x18, 0x7E, /* ; EA-EF */ - 0x7D, 0x0C, 0x19, 0x7E, 0x7D, 0x0A, 0x19, 0x00, /* ; F0-F7 */ - 0x7D, 0x08, 0x1A, 0x01, 0x7E, 0x06, 0x1A, 0x02 /* ; F8-FF */ - } - }, - {600, { - 0x07, 0x14, 0x07, 0x7E, 0x06, 0x14, 0x09, 0x7D, /* ; C0-C7 */ - 0x05, 0x14, 0x0A, 0x7D, 0x04, 0x13, 0x0B, 0x7E, /* ; C8-CF */ - 0x03, 0x13, 0x0C, 0x7E, 0x02, 0x12, 0x0D, 0x7F, /* ; D0-D7 */ - 0x01, 0x12, 0x0E, 0x7F, 0x01, 0x11, 0x0F, 0x7F, /* ; D8-DF */ - 0x01, 0x10, 0x10, 0x00, 0x7F, 0x0F, 0x11, 0x01, /* ; E0-E7 */ - 0x7F, 0x0E, 0x12, 0x01, 0x7E, 0x0D, 0x12, 0x03, /* ; EA-EF */ - 0x7E, 0x0C, 0x13, 0x03, 0x7E, 0x0B, 0x13, 0x04, /* ; F0-F7 */ - 0x7E, 0x0A, 0x14, 0x04, 0x7D, 0x09, 0x14, 0x06 /* ; F8-FF */ - } - }, - {0xFFFF, { - 0x09, 0x0F, 0x09, 0x7F, 0x08, 0x0F, 0x09, 0x00, /* ; C0-C7 */ - 0x07, 0x0F, 0x0A, 0x00, 0x06, 0x0F, 0x0A, 0x01, /* ; C8-CF */ - 0x06, 0x0E, 0x0B, 0x01, 0x05, 0x0E, 0x0B, 0x02, /* ; D0-D7 */ - 0x04, 0x0E, 0x0C, 0x02, 0x04, 0x0D, 0x0C, 0x03, /* ; D8-DF */ - 0x03, 0x0D, 0x0D, 0x03, 0x02, 0x0C, 0x0D, 0x05, /* ; E0-E7 */ - 0x02, 0x0C, 0x0E, 0x04, 0x01, 0x0B, 0x0E, 0x06, /* ; EA-EF */ - 0x01, 0x0B, 0x0E, 0x06, 0x00, 0x0A, 0x0F, 0x07, /* ; F0-F7 */ - 0x00, 0x0A, 0x0F, 0x07, 0x00, 0x09, 0x0F, 0x08 /* ; F8-FF */ - } - } -}; - -static const struct XGI301C_Tap4TimingStruct YPbPr750pTap4Timing[] = { - {0xFFFF, { - 0x05, 0x19, 0x05, 0x7D, 0x03, 0x19, 0x06, 0x7E, /* ; C0-C7 */ - 0x02, 0x19, 0x08, 0x7D, 0x01, 0x18, 0x0A, 0x7D, /* ; C8-CF */ - 0x00, 0x18, 0x0C, 0x7C, 0x7F, 0x17, 0x0E, 0x7C, /* ; D0-D7 */ - 0x7E, 0x16, 0x0F, 0x7D, 0x7E, 0x14, 0x11, 0x7D, /* ; D8-DF */ - 0x7D, 0x13, 0x13, 0x7D, 0x7D, 0x11, 0x14, 0x7E, /* ; E0-E7 */ - 0x7D, 0x0F, 0x16, 0x7E, 0x7D, 0x0E, 0x17, 0x7E, /* ; EA-EF */ - 0x7D, 0x0C, 0x18, 0x7F, 0x7D, 0x0A, 0x18, 0x01, /* ; F0-F7 */ - 0x7D, 0x08, 0x19, 0x02, 0x7D, 0x06, 0x19, 0x04 /* F8-FF */ - } - } -}; -#endif diff --git a/drivers/staging/xgifb/vb_util.h b/drivers/staging/xgifb/vb_util.h deleted file mode 100644 index 0f6d5aac04f6..000000000000 --- a/drivers/staging/xgifb/vb_util.h +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _VBUTIL_ -#define _VBUTIL_ -static inline void xgifb_reg_set(unsigned long port, u8 index, u8 data) -{ - outb(index, port); - outb(data, port + 1); -} - -static inline u8 xgifb_reg_get(unsigned long port, u8 index) -{ - outb(index, port); - return inb(port + 1); -} - -static inline void xgifb_reg_and_or(unsigned long port, u8 index, - unsigned int data_and, unsigned int data_or) -{ - u8 temp; - - temp = xgifb_reg_get(port, index); - temp = (u8)((temp & data_and) | data_or); - xgifb_reg_set(port, index, temp); -} - -static inline void xgifb_reg_and(unsigned long port, u8 index, - unsigned int data_and) -{ - u8 temp; - - temp = xgifb_reg_get(port, index); - temp = (u8)(temp & data_and); - xgifb_reg_set(port, index, temp); -} - -static inline void xgifb_reg_or(unsigned long port, u8 index, - unsigned int data_or) -{ - u8 temp; - - temp = xgifb_reg_get(port, index); - temp |= data_or; - xgifb_reg_set(port, index, temp); -} -#endif - diff --git a/drivers/staging/xgifb/vgatypes.h b/drivers/staging/xgifb/vgatypes.h deleted file mode 100644 index 22919f2368d5..000000000000 --- a/drivers/staging/xgifb/vgatypes.h +++ /dev/null @@ -1,51 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _VGATYPES_ -#define _VGATYPES_ - -#include <linux/fb.h> /* for struct fb_var_screeninfo for sis.h */ -#include "../../video/fbdev/sis/vgatypes.h" -#include "../../video/fbdev/sis/sis.h" /* for LCD_TYPE */ - -enum XGI_VB_CHIP_TYPE { - VB_CHIP_Legacy = 0, - VB_CHIP_301, - VB_CHIP_301B, - VB_CHIP_301LV, - VB_CHIP_302, - VB_CHIP_302B, - VB_CHIP_302LV, - VB_CHIP_301C, - VB_CHIP_302ELV, - VB_CHIP_UNKNOWN, /* other video bridge or no video bridge */ - MAX_VB_CHIP -}; - -struct xgi_hw_device_info { - unsigned long ulExternalChip; /* NO VB or other video bridge*/ - /* if ujVBChipID = VB_CHIP_UNKNOWN, */ - - void __iomem *pjVideoMemoryAddress;/* base virtual memory address */ - /* of Linear VGA memory */ - - unsigned long ulVideoMemorySize; /* size, in bytes, of the - * memory on the board - */ - - unsigned char jChipType; /* Used to Identify Graphics Chip */ - /* defined in the data structure type */ - /* "XGI_CHIP_TYPE" */ - - unsigned char jChipRevision; /* Used to Identify Graphics - * Chip Revision - */ - - unsigned char ujVBChipID; /* the ID of video bridge */ - /* defined in the data structure type */ - /* "XGI_VB_CHIP_TYPE" */ - - unsigned long ulCRT2LCDType; /* defined in the data structure type */ -}; - -/* Additional IOCTL for communication xgifb <> X driver */ -/* If changing this, xgifb.h must also be changed (for xgifb) */ -#endif |