aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/thermal/samsung/exynos_tmu.h
diff options
context:
space:
mode:
authorBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>2014-11-13 16:01:07 +0100
committerEduardo Valentin <edubezval@gmail.com>2014-11-20 10:53:04 -0400
commit2516593e4ef0230b184e8ce4dd3de6caed5e6131 (patch)
treebf446355e133928b7eb8324a2480bf9199f1cd55 /drivers/thermal/samsung/exynos_tmu.h
parentthermal: exynos: replace tmu_pmin check by Exynos5440 one (diff)
downloadlinux-dev-2516593e4ef0230b184e8ce4dd3de6caed5e6131.tar.xz
linux-dev-2516593e4ef0230b184e8ce4dd3de6caed5e6131.zip
thermal: exynos: simplify HW_TRIP level setting
Simplify HW_TRIP level setting in exynos_tmu_initialize() (don't pretend that the current code is hardware and configuration independent and just do SoC type check explicitly). Then remove no longer needed reg->threshold_[th2,th3_l0_shift] abstractions (only assigned for Exynos5440 in exynos5440_tmu_registers) and EXYNOS_MAX_TRIGGER_PER_REG define. There should be no functional changes caused by this patch. Cc: Amit Daniel Kachhap <amit.daniel@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'drivers/thermal/samsung/exynos_tmu.h')
-rw-r--r--drivers/thermal/samsung/exynos_tmu.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index e8510aaceb05..ebe39b433da4 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -80,8 +80,6 @@ enum soc_type {
* @tmu_cur_temp: register containing the current temperature of the TMU.
* @threshold_th0: Register containing first set of rising levels.
* @threshold_th1: Register containing second set of rising levels.
- * @threshold_th2: Register containing third set of rising levels.
- * @threshold_th3_l0_shift: shift bits of level0 threshold temperature.
* @tmu_inten: register containing the different threshold interrupt
enable bits.
* @inten_rise0_shift: shift bits of rising 0 interrupt bits.
@@ -100,8 +98,6 @@ struct exynos_tmu_registers {
u32 threshold_th0;
u32 threshold_th1;
- u32 threshold_th2;
- u32 threshold_th3_l0_shift;
u32 tmu_inten;
u32 inten_rise0_shift;