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| author |   Chanwoo Choi <cw00.choi@samsung.com> | 2014-09-03 12:09:02 +0900 |
|---|---|---|
| committer |   Eduardo Valentin <edubezval@gmail.com> | 2014-11-02 23:02:48 -0400 |
| commit | 56c64da7aa31c7e0422ec54e5d0ed60a98f28712 (patch) | |
| tree | 3fe7e394a6cc7e9832a7933da1ab60ddf632b033 /drivers/thermal/samsung/exynos_tmu.h | |
| parent | thermal: samsung: Exynos5260 and Exynos5420 should not use TRIM_RELOAD flag (diff) | |
| download | linux-dev-56c64da7aa31c7e0422ec54e5d0ed60a98f28712.tar.xz linux-dev-56c64da7aa31c7e0422ec54e5d0ed60a98f28712.zip | |
thermal: exynos: Add support for many TRIMINFO_CTRL registers
This patch support many TRIMINFO_CTRL registers if specific Exynos SoC
has one more TRIMINFO_CTRL registers. Also this patch uses proper 'RELOAD'
shift/mask bit operation to set RELOAD feature instead of static value.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Reviewed-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'drivers/thermal/samsung/exynos_tmu.h')
| -rw-r--r-- | drivers/thermal/samsung/exynos_tmu.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h index d503f35e3cd9..f67203bfd83c 100644 --- a/drivers/thermal/samsung/exynos_tmu.h +++ b/drivers/thermal/samsung/exynos_tmu.h @@ -78,6 +78,7 @@ enum soc_type { * slightly across different exynos SOC's. * @triminfo_data: register containing 2 pont trimming data * @triminfo_ctrl: trim info controller register. + * @triminfo_ctrl_count: the number of trim info controller register. * @tmu_ctrl: TMU main controller register. * @test_mux_addr_shift: shift bits of test mux address. * @therm_trip_mode_shift: shift bits of tripping mode in tmu_ctrl register. @@ -112,8 +113,8 @@ enum soc_type { struct exynos_tmu_registers { u32 triminfo_data; - u32 triminfo_ctrl; - u32 triminfo_ctrl1; + u32 triminfo_ctrl[MAX_TRIMINFO_CTRL_REG]; + u32 triminfo_ctrl_count; u32 tmu_ctrl; u32 test_mux_addr_shift; @@ -200,6 +201,7 @@ struct exynos_tmu_registers { * @second_point_trim: temp value of the second point trimming * @default_temp_offset: default temperature offset in case of no trimming * @test_mux; information if SoC supports test MUX + * @triminfo_reload: reload value to read TRIMINFO register * @cal_type: calibration type for temperature * @freq_clip_table: Table representing frequency reduction percentage. * @freq_tab_count: Count of the above table as frequency reduction may @@ -230,6 +232,7 @@ struct exynos_tmu_platform_data { u8 second_point_trim; u8 default_temp_offset; u8 test_mux; + u8 triminfo_reload[MAX_TRIMINFO_CTRL_REG]; enum calibration_type cal_type; enum soc_type type; |