diff options
| author |   Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2014-07-31 19:10:59 +0200 |
|---|---|---|
| committer |   Eduardo Valentin <edubezval@gmail.com> | 2014-11-02 23:02:47 -0400 |
| commit | e841971628fa355358ea6c5b0595eed0a6202595 (patch) | |
| tree | a5542c5aff18c0afec278c20dd8c45cbc146553e /drivers/thermal/samsung/exynos_tmu_data.h | |
| parent | Linux 3.18-rc2 (diff) | |
| download | linux-dev-e841971628fa355358ea6c5b0595eed0a6202595.tar.xz linux-dev-e841971628fa355358ea6c5b0595eed0a6202595.zip | |
thermal: exynos: remove unused struct exynos_tmu_registers entries
Remove unused / write-only entries from struct exynos_tmu_registers.
Then remove unused defines while at it.
We don't keep the unused/untested features in the kernel just
in case that some future hardware might need it. Such code has
a real maintainance cost (all other code changes have to take
the dead code into account) and usually makes future changes
more difficult, not easier (i.e. recent additions of Exynos5420
SoC and Exynos5260 SoC thermal support has not made use of any
of the driver's currently unused/untested features, moreover
the recently added code is more complex than needed because of
the existing dead code). Also all removed dead code is still
accessible in the kernel git repository and can be easily
brought back if/when needed.
There should be no functional changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'drivers/thermal/samsung/exynos_tmu_data.h')
| -rw-r--r-- | drivers/thermal/samsung/exynos_tmu_data.h | 29 |
1 files changed, 1 insertions, 28 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h index f0979e598491..9337c5a36167 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.h +++ b/drivers/thermal/samsung/exynos_tmu_data.h @@ -42,20 +42,8 @@ /* Exynos4210 specific registers */ #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP 0x44 #define EXYNOS4210_TMU_REG_TRIG_LEVEL0 0x50 -#define EXYNOS4210_TMU_REG_TRIG_LEVEL1 0x54 -#define EXYNOS4210_TMU_REG_TRIG_LEVEL2 0x58 -#define EXYNOS4210_TMU_REG_TRIG_LEVEL3 0x5C -#define EXYNOS4210_TMU_REG_PAST_TEMP0 0x60 -#define EXYNOS4210_TMU_REG_PAST_TEMP1 0x64 -#define EXYNOS4210_TMU_REG_PAST_TEMP2 0x68 -#define EXYNOS4210_TMU_REG_PAST_TEMP3 0x6C - -#define EXYNOS4210_TMU_TRIG_LEVEL0_MASK 0x1 -#define EXYNOS4210_TMU_TRIG_LEVEL1_MASK 0x10 -#define EXYNOS4210_TMU_TRIG_LEVEL2_MASK 0x100 -#define EXYNOS4210_TMU_TRIG_LEVEL3_MASK 0x1000 + #define EXYNOS4210_TMU_TRIG_LEVEL_MASK 0x1111 -#define EXYNOS4210_TMU_INTCLEAR_VAL 0x1111 /* Exynos5250 and Exynos4412 specific registers */ #define EXYNOS_TMU_TRIMINFO_CON 0x14 @@ -63,14 +51,11 @@ #define EXYNOS_THD_TEMP_FALL 0x54 #define EXYNOS_EMUL_CON 0x80 -#define EXYNOS_TRIMINFO_RELOAD_SHIFT 1 #define EXYNOS_TRIMINFO_25_SHIFT 0 #define EXYNOS_TRIMINFO_85_SHIFT 8 #define EXYNOS_TMU_RISE_INT_MASK 0x111 #define EXYNOS_TMU_RISE_INT_SHIFT 0 #define EXYNOS_TMU_FALL_INT_MASK 0x111 -#define EXYNOS_TMU_CLEAR_RISE_INT 0x111 -#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12) #define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12 #define EXYNOS5420_TMU_CLEAR_FALL_INT_SHIFT 16 #define EXYNOS5440_TMU_CLEAR_FALL_INT_SHIFT 4 @@ -85,9 +70,6 @@ #define EXYNOS_TMU_INTEN_RISE2_SHIFT 8 #define EXYNOS_TMU_INTEN_RISE3_SHIFT 12 #define EXYNOS_TMU_INTEN_FALL0_SHIFT 16 -#define EXYNOS_TMU_INTEN_FALL1_SHIFT 20 -#define EXYNOS_TMU_INTEN_FALL2_SHIFT 24 -#define EXYNOS_TMU_INTEN_FALL3_SHIFT 28 #define EXYNOS_EMUL_TIME 0x57F0 #define EXYNOS_EMUL_TIME_MASK 0xffff @@ -122,13 +104,11 @@ #define EXYNOS5440_TMU_S0_7_TH0 0x110 #define EXYNOS5440_TMU_S0_7_TH1 0x130 #define EXYNOS5440_TMU_S0_7_TH2 0x150 -#define EXYNOS5440_TMU_S0_7_EVTEN 0x1F0 #define EXYNOS5440_TMU_S0_7_IRQEN 0x210 #define EXYNOS5440_TMU_S0_7_IRQ 0x230 /* exynos5440 common registers */ #define EXYNOS5440_TMU_IRQ_STATUS 0x000 #define EXYNOS5440_TMU_PMIN 0x004 -#define EXYNOS5440_TMU_TEMP 0x008 #define EXYNOS5440_TMU_RISE_INT_MASK 0xf #define EXYNOS5440_TMU_RISE_INT_SHIFT 0 @@ -138,13 +118,6 @@ #define EXYNOS5440_TMU_INTEN_RISE2_SHIFT 2 #define EXYNOS5440_TMU_INTEN_RISE3_SHIFT 3 #define EXYNOS5440_TMU_INTEN_FALL0_SHIFT 4 -#define EXYNOS5440_TMU_INTEN_FALL1_SHIFT 5 -#define EXYNOS5440_TMU_INTEN_FALL2_SHIFT 6 -#define EXYNOS5440_TMU_INTEN_FALL3_SHIFT 7 -#define EXYNOS5440_TMU_TH_RISE0_SHIFT 0 -#define EXYNOS5440_TMU_TH_RISE1_SHIFT 8 -#define EXYNOS5440_TMU_TH_RISE2_SHIFT 16 -#define EXYNOS5440_TMU_TH_RISE3_SHIFT 24 #define EXYNOS5440_TMU_TH_RISE4_SHIFT 24 #define EXYNOS5440_EFUSE_SWAP_OFFSET 8 |