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authorErwan Le Ray <erwan.leray@st.com>2019-05-21 17:45:41 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-05-24 09:58:28 +0200
commitc8a9d043947b4acb19a65f7fac2bd0893e581cd5 (patch)
treed68ac84946862b6595755cfe306502fd653292e5 /drivers/tty/serial/stm32-usart.h
parenttty: max310x: Split uart characters insertion loop (diff)
downloadlinux-dev-c8a9d043947b4acb19a65f7fac2bd0893e581cd5.tar.xz
linux-dev-c8a9d043947b4acb19a65f7fac2bd0893e581cd5.zip
serial: stm32: fix word length configuration
STM32 supports either: - 8 and 9 bits word length (including parity bit) for stm32f4 compatible devices - 7, 8 and 9 bits word length (including parity bit) for stm32f7 and stm32h7 compatible devices. As a consequence STM32 supports the following termios configurations: - CS7 with parity bit, and CS8 (with or without parity bit) for stm32f4 compatible devices. - CS6 with parity bit, CS7 and CS8 (with or without parity bit) for stm32f7 and stm32h7 compatible devices. This patch is fixing word length by configuring correctly the SoC with supported configurations. Fixes: ada8618ff3bf ("serial: stm32: adding support for stm32f7") Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/stm32-usart.h')
-rw-r--r--drivers/tty/serial/stm32-usart.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 6f294e280ea3..a70aa5006ab9 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -151,8 +151,7 @@ struct stm32_usart_info stm32h7_info = {
#define USART_CR1_PS BIT(9)
#define USART_CR1_PCE BIT(10)
#define USART_CR1_WAKE BIT(11)
-#define USART_CR1_M BIT(12)
-#define USART_CR1_M0 BIT(12) /* F7 */
+#define USART_CR1_M0 BIT(12) /* F7 (CR1_M for F4) */
#define USART_CR1_MME BIT(13) /* F7 */
#define USART_CR1_CMIE BIT(14) /* F7 */
#define USART_CR1_OVER8 BIT(15)