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| author |   Yasir-Khan <yasir_khan@mentor.com> | 2017-01-23 13:26:08 +0100 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-01-25 11:08:30 +0100 |
| commit | 5935a2b3a57c03d7e6fea967ef0b926f82fc995e (patch) | |
| tree | d74704e4c815abe54c7cb0ce3312b2fbc8e376b8 /drivers/tty/serial | |
| parent | serial: 8250_omap: Remove rx_dma_broken flag (diff) | |
| download | linux-dev-5935a2b3a57c03d7e6fea967ef0b926f82fc995e.tar.xz linux-dev-5935a2b3a57c03d7e6fea967ef0b926f82fc995e.zip | |
serial: xuartps: Enable uart loopback mode
This patch adds xilinx uart loopback support by modifying the
cdns_uart_set_mctrl function to handle the switch to loopback mode.
After this patch, the loopback mode can be enabled/disabled by
setting/clearing the TIOCM_LOOP modem bit via TIOCMBIS/TIOCMBIC
ioctls respectively.
Signed-off-by: Yasir-Khan <yasir_khan@mentor.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial')
| -rw-r--r-- | drivers/tty/serial/xilinx_uartps.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c index dd4c02fa4820..ad77d0ed0c46 100644 --- a/drivers/tty/serial/xilinx_uartps.c +++ b/drivers/tty/serial/xilinx_uartps.c @@ -93,6 +93,7 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255"); #define CDNS_UART_MR_CLKSEL 0x00000001 /* Pre-scalar selection */ #define CDNS_UART_MR_CHMODE_L_LOOP 0x00000200 /* Local loop back mode */ #define CDNS_UART_MR_CHMODE_NORM 0x00000000 /* Normal mode */ +#define CDNS_UART_MR_CHMODE_MASK 0x00000300 /* Mask for mode bits */ #define CDNS_UART_MR_STOPMODE_2_BIT 0x00000080 /* 2 stop bits */ #define CDNS_UART_MR_STOPMODE_1_BIT 0x00000000 /* 1 stop bit */ @@ -998,17 +999,25 @@ static unsigned int cdns_uart_get_mctrl(struct uart_port *port) static void cdns_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) { u32 val; + u32 mode_reg; val = readl(port->membase + CDNS_UART_MODEMCR); + mode_reg = readl(port->membase + CDNS_UART_MR); val &= ~(CDNS_UART_MODEMCR_RTS | CDNS_UART_MODEMCR_DTR); + mode_reg &= ~CDNS_UART_MR_CHMODE_MASK; if (mctrl & TIOCM_RTS) val |= CDNS_UART_MODEMCR_RTS; if (mctrl & TIOCM_DTR) val |= CDNS_UART_MODEMCR_DTR; + if (mctrl & TIOCM_LOOP) + mode_reg |= CDNS_UART_MR_CHMODE_L_LOOP; + else + mode_reg |= CDNS_UART_MR_CHMODE_NORM; writel(val, port->membase + CDNS_UART_MODEMCR); + writel(mode_reg, port->membase + CDNS_UART_MR); } #ifdef CONFIG_CONSOLE_POLL |