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author | 2020-10-01 14:17:11 -0700 | |
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committer | 2020-10-03 16:30:56 +0200 | |
commit | 80a5ce116fc084e8a25d5a936617699e2931b611 (patch) | |
tree | 20b77a33768ba881e9d9522171b8481263edcb97 /drivers/usb/cdns3/cdns3-imx.c | |
parent | perf/x86/intel: Fix Ice Lake event constraint table (diff) | |
download | linux-dev-80a5ce116fc084e8a25d5a936617699e2931b611.tar.xz linux-dev-80a5ce116fc084e8a25d5a936617699e2931b611.zip |
perf/x86/intel: Check perf metrics feature for each CPU
It might be possible that different CPUs have different CPU metrics on a
platform. In this case, writing the GLOBAL_CTRL_EN_PERF_METRICS bit to
the GLOBAL_CTRL register of a CPU, which doesn't support the TopDown
perf metrics feature, causes MSR access error.
Current TopDown perf metrics feature is enumerated using the boot CPU's
PERF_CAPABILITIES MSR. The MSR only indicates the boot CPU supports this
feature.
Check the PERF_CAPABILITIES MSR for each CPU. If any CPU doesn't support
the perf metrics feature, disable the feature globally.
Fixes: 59a854e2f3b9 ("perf/x86/intel: Support TopDown metrics on Ice Lake")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20201001211711.25708-1-kan.liang@linux.intel.com
Diffstat (limited to 'drivers/usb/cdns3/cdns3-imx.c')
0 files changed, 0 insertions, 0 deletions