diff options
| author |   Udipto Goswami <quic_ugoswami@quicinc.com> | 2022-02-07 09:55:58 +0530 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-02-08 12:33:59 +0100 |
| commit | 117b4e96c7f362eb6459543883fc07f77662472c (patch) | |
| tree | 8ee8f6700ddd00b7a7feeb08906465f3c6e968a1 /drivers/usb/core | |
| parent | usb: gadget: f_uac2: Define specific wTerminalType (diff) | |
| download | linux-dev-117b4e96c7f362eb6459543883fc07f77662472c.tar.xz linux-dev-117b4e96c7f362eb6459543883fc07f77662472c.zip | |
usb: dwc3: gadget: Prevent core from processing stale TRBs
With CPU re-ordering on write instructions, there might
be a chance that the HWO is set before the TRB is updated
with the new mapped buffer address.
And in the case where core is processing a list of TRBs
it is possible that it fetched the TRBs when the HWO is set
but before the buffer address is updated.
Prevent this by adding a memory barrier before the HWO
is updated to ensure that the core always process the
updated TRBs.
Fixes: f6bafc6a1c9d ("usb: dwc3: convert TRBs into bitshifts")
Cc: stable <stable@vger.kernel.org>
Reviewed-by: Pavankumar Kondeti <quic_pkondeti@quicinc.com>
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
Link: https://lore.kernel.org/r/1644207958-18287-1-git-send-email-quic_ugoswami@quicinc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/core')
0 files changed, 0 insertions, 0 deletions