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authorDinh Nguyen <dinguyen@altera.com>2014-02-04 15:19:40 -0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-02-07 14:34:38 -0800
commit93571adbb132c47d4d3a8e42d47276862f9635a2 (patch)
tree6f93b404e8dafb076dd5ab2a96beab98e74bf6c4 /drivers/usb/dwc2/core_intr.c
parentehci-platform: Add support for controllers with big-endian regs / descriptors (diff)
downloadlinux-dev-93571adbb132c47d4d3a8e42d47276862f9635a2.tar.xz
linux-dev-93571adbb132c47d4d3a8e42d47276862f9635a2.zip
usb: dwc2: handle the Host Port Interrupt when it occurs in device mode
According to the spec for the DWC2 controller, when the PRTINT interrupt fires, the application must clear the appropriate status bit in the Host Port Control and Status register to clear this bit. When disconnecting an A-cable when the dwc2 host driver, the PRTINT fires, but only the GINTSTS_PRTINT status is cleared, no action is done with the HPRT0 register. The HPRT0_ENACHG bit in the HPRT0 must also be poked to correctly clear the GINTSTS_PRTINT interrupt. I am seeing this behavoir on v2.93 of the DWC2 IP. When I disconnect an OTG A-cable adapter, the PRTINT interrupt fires when the DWC2 is in device mode and is never cleared. This patch adds the function to read the HPRT0 register when the PRTINT fires and the dwc2 IP has already transitioned to device mode. This function is only clearing the HPRT0_ENACHG bit for now, but can be modified to handle more. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> [ paulz: modified patch to preserve HPRT0_ENA bit ] Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/dwc2/core_intr.c')
-rw-r--r--drivers/usb/dwc2/core_intr.c25
1 files changed, 22 insertions, 3 deletions
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index 8205799e6db3..c93918b70d03 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -72,6 +72,26 @@ static const char *dwc2_op_state_str(struct dwc2_hsotg *hsotg)
}
/**
+ * dwc2_handle_usb_port_intr - handles OTG PRTINT interrupts.
+ * When the PRTINT interrupt fires, there are certain status bits in the Host
+ * Port that needs to get cleared.
+ *
+ * @hsotg: Programming view of DWC_otg controller
+ */
+static void dwc2_handle_usb_port_intr(struct dwc2_hsotg *hsotg)
+{
+ u32 hprt0 = readl(hsotg->regs + HPRT0);
+
+ if (hprt0 & HPRT0_ENACHG) {
+ hprt0 &= ~HPRT0_ENA;
+ writel(hprt0, hsotg->regs + HPRT0);
+ }
+
+ /* Clear interrupt */
+ writel(GINTSTS_PRTINT, hsotg->regs + GINTSTS);
+}
+
+/**
* dwc2_handle_mode_mismatch_intr() - Logs a mode mismatch warning message
*
* @hsotg: Programming view of DWC_otg controller
@@ -479,9 +499,8 @@ irqreturn_t dwc2_handle_common_intr(int irq, void *dev)
if (dwc2_is_device_mode(hsotg)) {
dev_dbg(hsotg->dev,
" --Port interrupt received in Device mode--\n");
- gintsts = GINTSTS_PRTINT;
- writel(gintsts, hsotg->regs + GINTSTS);
- retval = 1;
+ dwc2_handle_usb_port_intr(hsotg);
+ retval = IRQ_HANDLED;
}
}