diff options
| author |   Timur Tabi <timur@freescale.com> | 2012-05-10 16:57:28 -0500 |
|---|---|---|
| committer |   Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2012-05-13 13:08:56 +0000 |
| commit | 5e7b911f9a3e582635801675b7fe935b16cd4af5 (patch) | |
| tree | 5ff0b6bf83310af0f4516836291d911960f2cf5a /drivers/video/fsl-diu-fb.c | |
| parent | video: exynos mipi dsi: support reverse panel type (diff) | |
| download | linux-dev-5e7b911f9a3e582635801675b7fe935b16cd4af5.tar.xz linux-dev-5e7b911f9a3e582635801675b7fe935b16cd4af5.zip | |
drivers/video: fsl-diu-fb: don't initialize the THRESHOLDS registers
The THRESHOLDS register configures thresholds for two interrupts, but
these interrupts are not used in the DIU driver. An early version of the
driver may have used the "lines before vsync" interrupt, which requires
the LS_BF_VS of THRESHOLDS to be initialized.
Unfortunately, the initialization of this register does not do a
read-modify-write to set only LS_BF_VS. On the MPC8610, the value
written is correct. On other chips, like the P1022, the value overwrites
some reserved bits. This results in a performance drop on the P1022.
Since the default value is acceptable as-is on all SOCs, we should just
avoid touching this register.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Diffstat (limited to 'drivers/video/fsl-diu-fb.c')
| -rw-r--r-- | drivers/video/fsl-diu-fb.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c index 6af3f16754f0..458c00664ade 100644 --- a/drivers/video/fsl-diu-fb.c +++ b/drivers/video/fsl-diu-fb.c @@ -834,7 +834,6 @@ static void update_lcdc(struct fb_info *info) diu_ops.set_pixel_clock(var->pixclock); out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */ - out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */ out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */ out_be32(&hw->plut, 0x01F5F666); |