diff options
| author |   Jani Nikula <jani.nikula@intel.com> | 2021-10-14 18:00:58 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2021-10-19 11:30:27 +0300 |
| commit | 02ed47aa6cc697fc34053c011fe72984a86273cb (patch) | |
| tree | 9eb30970a257f9dd451b7c49b8a9d97426153c16 /drivers | |
| parent | drm/dp: add helpers to read link training delays (diff) | |
| download | linux-dev-02ed47aa6cc697fc34053c011fe72984a86273cb.tar.xz linux-dev-02ed47aa6cc697fc34053c011fe72984a86273cb.zip | |
drm/dp: reuse the 8b/10b link training delay helpers
Reuse the 8b/10b link training delay helpers. Functionally this skips
the check for invalid values for DPCD 1.4 and later at clock recovery
delay (as it's a fixed delay and bypasses the rd_interval) but the same
value will be checked and invalid values reported at channel
equalization.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014150059.28957-2-jani.nikula@intel.com
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/drm_dp_helper.c | 30 |
1 files changed, 10 insertions, 20 deletions
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index c5d15ac62733..3b46eb31c74b 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -270,35 +270,25 @@ EXPORT_SYMBOL(drm_dp_read_channel_eq_delay); void drm_dp_link_train_clock_recovery_delay(const struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { - unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & - DP_TRAINING_AUX_RD_MASK; + u8 rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & + DP_TRAINING_AUX_RD_MASK; + int delay_us; - if (rd_interval > 4) - drm_dbg_kms(aux->drm_dev, "%s: AUX interval %lu, out of range (max 4)\n", - aux->name, rd_interval); - - if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) - rd_interval = 100; + if (dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) + delay_us = 100; else - rd_interval *= 4 * USEC_PER_MSEC; + delay_us = __8b10b_clock_recovery_delay_us(aux, rd_interval); - usleep_range(rd_interval, rd_interval * 2); + usleep_range(delay_us, delay_us * 2); } EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); static void __drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, - unsigned long rd_interval) + u8 rd_interval) { - if (rd_interval > 4) - drm_dbg_kms(aux->drm_dev, "%s: AUX interval %lu, out of range (max 4)\n", - aux->name, rd_interval); - - if (rd_interval == 0) - rd_interval = 400; - else - rd_interval *= 4 * USEC_PER_MSEC; + int delay_us = __8b10b_channel_eq_delay_us(aux, rd_interval); - usleep_range(rd_interval, rd_interval * 2); + usleep_range(delay_us, delay_us * 2); } void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, |