diff options
| author |   Florian Fainelli <f.fainelli@gmail.com> | 2015-03-23 15:09:52 -0700 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2015-03-23 22:10:42 -0400 |
| commit | 0d017e2193ad285d7d0aac429c4c73945729de73 (patch) | |
| tree | 6d794c993600a01405459fe4e160b647897fdf33 /drivers | |
| parent | net: bcmgenet: propagate errors from bcmgenet_power_down (diff) | |
| download | linux-dev-0d017e2193ad285d7d0aac429c4c73945729de73.tar.xz linux-dev-0d017e2193ad285d7d0aac429c4c73945729de73.zip | |
net: bcmgenet: update bcmgenet_ephy_power_up to clear CK25_DIS bit
The CK25_DIS bit controls whether a 25Mhz clock is fed to the GPHY or
not, in preparation for powering down the integrated GPHY when relevant,
make sure we clear that bit.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/ethernet/broadcom/genet/bcmgenet.h | 1 | ||||
| -rw-r--r-- | drivers/net/ethernet/broadcom/genet/bcmmii.c | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.h b/drivers/net/ethernet/broadcom/genet/bcmgenet.h index 1ea838946318..a27ef777cc81 100644 --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.h +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.h @@ -354,6 +354,7 @@ struct bcmgenet_mib_counters { #define EXT_GPHY_CTRL 0x1C #define EXT_CFG_IDDQ_BIAS (1 << 0) #define EXT_CFG_PWR_DOWN (1 << 1) +#define EXT_CK25_DIS (1 << 4) #define EXT_GPHY_RESET (1 << 5) /* DMA rings size */ diff --git a/drivers/net/ethernet/broadcom/genet/bcmmii.c b/drivers/net/ethernet/broadcom/genet/bcmmii.c index 446889cc3c6a..f7d9d2753141 100644 --- a/drivers/net/ethernet/broadcom/genet/bcmmii.c +++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c @@ -178,7 +178,7 @@ static void bcmgenet_ephy_power_up(struct net_device *dev) return; reg = bcmgenet_ext_readl(priv, EXT_GPHY_CTRL); - reg &= ~(EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN); + reg &= ~(EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN | EXT_CK25_DIS); reg |= EXT_GPHY_RESET; bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL); mdelay(2); |