diff options
| author |   Ben Goz <ben.goz@amd.com> | 2017-12-08 23:09:02 -0500 |
|---|---|---|
| committer |   Oded Gabbay <oded.gabbay@gmail.com> | 2017-12-08 23:09:02 -0500 |
| commit | 413e85d5d38f9b000561b6b9adf4182803b50af0 (patch) | |
| tree | f931d687add363fa10dceb9794e1cd2e3101be6f /drivers | |
| parent | drm/amdkfd: Fixup incorrect info in the CZ CRAT table (diff) | |
| download | linux-dev-413e85d5d38f9b000561b6b9adf4182803b50af0.tar.xz linux-dev-413e85d5d38f9b000561b6b9adf4182803b50af0.zip | |
drm/amdkfd: Add AQL Queue Memory flag on topology
This is needed for enabling a user-mode workaround for an AQL queue
wrapping HW bug on Tonga.
Signed-off-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c index 80bc71d2c76a..e7daf2cf8000 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c @@ -455,6 +455,10 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr, HSA_CAP_WATCH_POINTS_TOTALBITS_MASK); } + if (dev->gpu->device_info->asic_family == CHIP_TONGA) + dev->node_props.capability |= + HSA_CAP_AQL_QUEUE_DOUBLE_MAP; + sysfs_show_32bit_prop(buffer, "max_engine_clk_fcompute", dev->node_props.max_engine_clk_fcompute); diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.h b/drivers/gpu/drm/amd/amdkfd/kfd_topology.h index b9f3142f4ad4..53fca1f45401 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.h @@ -45,6 +45,7 @@ #define HSA_CAP_DOORBELL_TYPE_PRE_1_0 0x0 #define HSA_CAP_DOORBELL_TYPE_1_0 0x1 +#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000 struct kfd_node_properties { uint32_t cpu_cores_count; |