diff options
| author |   Huazhong Tan <tanhuazhong@huawei.com> | 2019-04-06 15:43:31 +0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2019-04-08 15:30:49 -0700 |
| commit | 4f765d3e5213da43a5f410ea62445f9591bfa4dc (patch) | |
| tree | 23199b130b61f3cdc1bc7d8ce95dfd29275a4d65 /drivers | |
| parent | net: hns3: ignore lower-level new coming reset (diff) | |
| download | linux-dev-4f765d3e5213da43a5f410ea62445f9591bfa4dc.tar.xz linux-dev-4f765d3e5213da43a5f410ea62445f9591bfa4dc.zip | |
net: hns3: do not request reset when hardware resetting
When hardware reset does not finish, the driver should not
request a new reset, otherwise the ongoing hardware reset
will get problem.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 6e8fa2e0b5ea..1c93da2bcb4b 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -32,6 +32,7 @@ static int hclge_set_mac_mtu(struct hclge_dev *hdev, int new_mps); static int hclge_init_vlan_config(struct hclge_dev *hdev); static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev); +static bool hclge_get_hw_reset_stat(struct hnae3_handle *handle); static int hclge_set_umv_space(struct hclge_dev *hdev, u16 space_size, u16 *allocated_size, bool is_alloc); @@ -2714,9 +2715,18 @@ int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id) static void hclge_do_reset(struct hclge_dev *hdev) { + struct hnae3_handle *handle = &hdev->vport[0].nic; struct pci_dev *pdev = hdev->pdev; u32 val; + if (hclge_get_hw_reset_stat(handle)) { + dev_info(&pdev->dev, "Hardware reset not finish\n"); + dev_info(&pdev->dev, "func_rst_reg:0x%x, global_rst_reg:0x%x\n", + hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING), + hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG)); + return; + } + switch (hdev->reset_type) { case HNAE3_GLOBAL_RESET: val = hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG); |