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authorVinod Koul <vkoul@kernel.org>2019-01-21 14:43:18 +0530
committerDavid S. Miller <davem@davemloft.net>2019-01-22 19:37:59 -0800
commit5ecdd77c61c8fe1d75ded538701e5e854963c890 (patch)
tree948f2d8360d9d326b0295108ba3154ae31d986c7 /drivers
parentnet: phy: at803x: Disable phy delay for RGMII mode (diff)
downloadlinux-dev-5ecdd77c61c8fe1d75ded538701e5e854963c890.tar.xz
linux-dev-5ecdd77c61c8fe1d75ded538701e5e854963c890.zip
net: dsa: qca8k: disable delay for RGMII mode
In RGMII mode we should not have any delay in port MAC, so disable the delay. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/dsa/qca8k.c16
1 files changed, 4 insertions, 12 deletions
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 7e97e620bd44..a4b6cda38016 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -420,7 +420,7 @@ qca8k_mib_init(struct qca8k_priv *priv)
static int
qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode)
{
- u32 reg;
+ u32 reg, val;
switch (port) {
case 0:
@@ -439,17 +439,9 @@ qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode)
*/
switch (mode) {
case PHY_INTERFACE_MODE_RGMII:
- qca8k_write(priv, reg,
- QCA8K_PORT_PAD_RGMII_EN |
- QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |
- QCA8K_PORT_PAD_RGMII_RX_DELAY(3));
-
- /* According to the datasheet, RGMII delay is enabled through
- * PORT5_PAD_CTRL for all ports, rather than individual port
- * registers
- */
- qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
- QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
+ /* RGMII mode means no delay so don't enable the delay */
+ val = QCA8K_PORT_PAD_RGMII_EN;
+ qca8k_write(priv, reg, val);
break;
case PHY_INTERFACE_MODE_SGMII:
qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN);