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authorStephen Boyd <sboyd@kernel.org>2019-06-24 18:17:28 -0700
committerStephen Boyd <sboyd@kernel.org>2019-06-24 18:17:28 -0700
commitb2f874d27b62816fd170a554e4fe1d15e541fa1d (patch)
tree482e523f9774437f076b7147c21bbb2182e93ed0 /drivers
parentLinux 5.2-rc1 (diff)
parentdt-bindings: clk: Convert Allwinner CCU to a schema (diff)
Merge tag 'sunxi-clk-for-5.3-201906210814' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver updates from Maxime Ripard: - A few patches to fix two minor bugs - Introduce a schema for our device tree bindings * tag 'sunxi-clk-for-5.3-201906210814' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: dt-bindings: clk: Convert Allwinner CCU to a schema clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register clk-sunxi: fix a missing-check bug in sunxi_divs_clk_setup()
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c2
-rw-r--r--drivers/clk/sunxi/clk-sunxi.c2
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c
index 27554eaf6929..8d05d4f1f8a1 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c
@@ -104,7 +104,7 @@ static SUNXI_CCU_GATE(r_apb2_i2c_clk, "r-apb2-i2c", "r-apb2",
static SUNXI_CCU_GATE(r_apb1_ir_clk, "r-apb1-ir", "r-apb1",
0x1cc, BIT(0), 0);
static SUNXI_CCU_GATE(r_apb1_w1_clk, "r-apb1-w1", "r-apb1",
- 0x1cc, BIT(0), 0);
+ 0x1ec, BIT(0), 0);
/* Information of IR(RX) mod clock is gathered from BSP source code */
static const char * const r_mod0_default_parents[] = { "osc32k", "osc24M" };
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index f5b1c0067365..830bfb7f5e6b 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -989,6 +989,8 @@ static struct clk ** __init sunxi_divs_clk_setup(struct device_node *node,
if (endp) {
derived_name = kstrndup(clk_name, endp - clk_name,
GFP_KERNEL);
+ if (!derived_name)
+ return NULL;
factors.name = derived_name;
} else {
factors.name = clk_name;