diff options
| author |   Matthew Auld <matthew.auld@intel.com> | 2019-11-19 15:01:54 +0000 |
|---|---|---|
| committer |   Rodrigo Vivi <rodrigo.vivi@intel.com> | 2019-11-19 12:43:27 -0800 |
| commit | d43e24533dc225e3db06e5a5da26fb339a48a277 (patch) | |
| tree | 789eef053af0725f872e8206c7e1c860cdd1839f /drivers | |
| parent | drm/i915: Protect request peeking with RCU (diff) | |
| download | linux-dev-d43e24533dc225e3db06e5a5da26fb339a48a277.tar.xz linux-dev-d43e24533dc225e3db06e5a5da26fb339a48a277.zip | |
drm/i915: make pool objects read-only
For our current users we don't expect pool objects to be writable from
the gpu.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Fixes: 4f7af1948abc ("drm/i915: Support ro ppgtt mapped cmdparser shadow buffers")
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191119150154.18249-1-matthew.auld@intel.com
(cherry picked from commit d18580b08b92ec4105eb0ede2d676e8b1f5a66c3)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_engine_pool.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pool.c b/drivers/gpu/drm/i915/gt/intel_engine_pool.c index 4cd54c569911..379a91780bd4 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_pool.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_pool.c @@ -103,6 +103,8 @@ node_create(struct intel_engine_pool *pool, size_t sz) return ERR_CAST(obj); } + i915_gem_object_set_readonly(obj); + node->obj = obj; return node; } |