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authorYang Shi <yang.shi@linaro.org>2015-11-16 14:35:35 -0800
committerDavid S. Miller <davem@davemloft.net>2015-11-17 14:44:39 -0500
commitec0738db8d7a9bd6653d9f9d81b201a519144d63 (patch)
treeab7bd5c2ac7e695b3c463ee4fb21a816be409d50 /drivers
parentmacvlan: fix leak in macvlan_handle_frame (diff)
downloadlinux-dev-ec0738db8d7a9bd6653d9f9d81b201a519144d63.tar.xz
linux-dev-ec0738db8d7a9bd6653d9f9d81b201a519144d63.zip
arm64: bpf: make BPF prologue and epilogue align with ARM64 AAPCS
Save and restore FP/LR in BPF prog prologue and epilogue, save SP to FP in prologue in order to get the correct stack backtrace. However, ARM64 JIT used FP (x29) as eBPF fp register, FP is subjected to change during function call so it may cause the BPF prog stack base address change too. Use x25 to replace FP as BPF stack base register (fp). Since x25 is callee saved register, so it will keep intact during function call. It is initialized in BPF prog prologue when BPF prog is started to run everytime. Save and restore x25/x26 in BPF prologue and epilogue to keep them intact for the outside of BPF. Actually, x26 is unnecessary, but SP requires 16 bytes alignment. So, the BPF stack layout looks like: high original A64_SP => 0:+-----+ BPF prologue |FP/LR| current A64_FP => -16:+-----+ | ... | callee saved registers +-----+ | | x25/x26 BPF fp register => -80:+-----+ | | | ... | BPF prog stack | | | | current A64_SP => +-----+ | | | ... | Function call stack | | +-----+ low CC: Zi Shen Lim <zlim.lnx@gmail.com> CC: Xi Wang <xi.wang@gmail.com> Signed-off-by: Yang Shi <yang.shi@linaro.org> Acked-by: Zi Shen Lim <zlim.lnx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
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