diff options
| author |   Aviad Yehezkel <aviadye@mellanox.com> | 2018-02-11 17:12:44 +0200 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@mellanox.com> | 2018-03-06 22:06:08 -0800 |
| commit | ef927a9c168722c4ab5e40838d7fe6b63f978763 (patch) | |
| tree | d3acca527234a3fe9daac20cdc02850d8f28c73e /drivers | |
| parent | net/mlx5: Fixed compilation issue when CONFIG_MLX5_ACCEL is disabled (diff) | |
| download | linux-dev-ef927a9c168722c4ab5e40838d7fe6b63f978763.tar.xz linux-dev-ef927a9c168722c4ab5e40838d7fe6b63f978763.zip | |
net/mlx5e: Wait for FPGA command responses with a timeout
Generally, FPGA IPSec commands must always complete.
We want to wait for one minute for them to complete gracefully also
when killing a process.
Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c index 35d0e33381ca..95f9c5a8619b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c @@ -39,6 +39,7 @@ #include "fpga/core.h" #define SBU_QP_QUEUE_SIZE 8 +#define MLX5_FPGA_IPSEC_CMD_TIMEOUT_MSEC (60 * 1000) enum mlx5_ipsec_response_syndrome { MLX5_IPSEC_RESPONSE_SUCCESS = 0, @@ -217,12 +218,14 @@ void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev, int mlx5_fpga_ipsec_sa_cmd_wait(void *ctx) { struct mlx5_ipsec_command_context *context = ctx; + unsigned long timeout = + msecs_to_jiffies(MLX5_FPGA_IPSEC_CMD_TIMEOUT_MSEC); int res; - res = wait_for_completion_killable(&context->complete); - if (res) { + res = wait_for_completion_timeout(&context->complete, timeout); + if (!res) { mlx5_fpga_warn(context->dev, "Failure waiting for IPSec command response\n"); - return -EINTR; + return -ETIMEDOUT; } if (context->status == MLX5_FPGA_IPSEC_SACMD_COMPLETE) |