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| author |   Maciej W. Rozycki <macro@linux-mips.org> | 2014-09-25 11:06:55 +0100 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2014-09-28 17:22:10 -0400 |
| commit | b98dfaf2b0a3e72fa5967dafb4f246442584a780 (patch) | |
| tree | 4cc04f9085d0b1863dd6cf27e9fdc95d8b5d28cd /firmware | |
| parent | defxx: DEFEA's Burst Holdoff register initialization fix (diff) | |
| download | linux-dev-b98dfaf2b0a3e72fa5967dafb4f246442584a780.tar.xz linux-dev-b98dfaf2b0a3e72fa5967dafb4f246442584a780.zip | |
defxx: DEFEA's ESIC port I/O decoding cleanup
Use the slot-specific I/O range for decoding accesses to PDQ ASIC
registers (IOCS0) and the discrete Burst Holdoff register (IOCS1) as per
the "HD64981F EISA Slave Interface Controller (ESIC)" datasheet. Use
disjoint decode ranges now that the assignment of chip selects is known.
Update the span of the port I/O resource requested accordingly.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'firmware')
0 files changed, 0 insertions, 0 deletions