diff options
| author |   Bob Moore <robert.moore@intel.com> | 2005-10-21 00:00:00 -0400 |
|---|---|---|
| committer |   Len Brown <len.brown@intel.com> | 2005-12-10 00:22:54 -0500 |
| commit | 0897831bb54eb36fd9e2a22da7f0f64be1b20d09 (patch) | |
| tree | 8d77687ce8ebcfb62d6012d2d3c44f6a904b3c15 /include/acpi/acmacros.h | |
| parent | [ACPI] ACPICA 20050930 (diff) | |
| download | linux-dev-0897831bb54eb36fd9e2a22da7f0f64be1b20d09.tar.xz linux-dev-0897831bb54eb36fd9e2a22da7f0f64be1b20d09.zip | |
[ACPI] ACPICA 20051021
Implemented support for the EM64T and other x86_64
processors. This essentially entails recognizing
that these processors support non-aligned memory
transfers. Previously, all 64-bit processors were assumed
to lack hardware support for non-aligned transfers.
Completed conversion of the Resource Manager to nearly
full table-driven operation. Specifically, the resource
conversion code (convert AML to internal format and the
reverse) and the debug code to dump internal resource
descriptors are fully table-driven, reducing code and data
size and improving maintainability.
The OSL interfaces for Acquire and Release Lock now use a
64-bit flag word on 64-bit processors instead of a fixed
32-bit word. (Alexey Starikovskiy)
Implemented support within the resource conversion code
for the Type-Specific byte within the various ACPI 3.0
*WordSpace macros.
Fixed some issues within the resource conversion code for
the type-specific flags for both Memory and I/O address
resource descriptors. For Memory, implemented support
for the MTP and TTP flags. For I/O, split the TRS and TTP
flags into two separate fields.
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'include/acpi/acmacros.h')
| -rw-r--r-- | include/acpi/acmacros.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/acpi/acmacros.h b/include/acpi/acmacros.h index 258cfe5e2aac..e42222c3d34c 100644 --- a/include/acpi/acmacros.h +++ b/include/acpi/acmacros.h @@ -202,7 +202,7 @@ #define ACPI_BUFFER_INDEX(buf_len,buf_offset,byte_gran) (buf_offset) -#ifdef ACPI_MISALIGNED_TRANSFERS +#ifndef ACPI_MISALIGNMENT_NOT_SUPPORTED /* The hardware supports unaligned transfers, just do the little-endian move */ @@ -563,11 +563,11 @@ return (_s); }) #define return_UINT8(s) ACPI_DO_WHILE0 ({ \ register u8 _s = (u8) (s); \ - acpi_ut_value_exit (ACPI_DEBUG_PARAMETERS, _s); \ + acpi_ut_value_exit (ACPI_DEBUG_PARAMETERS, (acpi_integer) _s); \ return (_s); }) #define return_UINT32(s) ACPI_DO_WHILE0 ({ \ register u32 _s = (u32) (s); \ - acpi_ut_value_exit (ACPI_DEBUG_PARAMETERS, _s); \ + acpi_ut_value_exit (ACPI_DEBUG_PARAMETERS, (acpi_integer) _s); \ return (_s); }) #else /* Use original less-safe macros */ |