diff options
| author |   Catalin Marinas <catalin.marinas@arm.com> | 2007-05-08 22:53:44 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-08 22:55:57 +0100 |
| commit | 56163fcf194fb688fcf3cefa9b90c5ad41f74059 (patch) | |
| tree | 35b26ce5d0c40fa153ea87610987983f12642a67 /include/asm-arm/system.h | |
| parent | [ARM] armv7: Add ARMv7 cacheid macros (diff) | |
| download | linux-dev-56163fcf194fb688fcf3cefa9b90c5ad41f74059.tar.xz linux-dev-56163fcf194fb688fcf3cefa9b90c5ad41f74059.zip | |
[ARM] armv7: add dedicated ARMv7 barrier instructions
Starting with ARMv7, there are dedicated instruction for the ISB, DSB
and DMB barriers and there is no need to execute them as CP15
operations.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/system.h')
| -rw-r--r-- | include/asm-arm/system.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index c57555c37098..41dd49151dae 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -158,7 +158,11 @@ extern unsigned int user_debug; #define vectors_high() (0) #endif -#if defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ >= 6 +#if __LINUX_ARM_ARCH__ >= 7 +#define isb() __asm__ __volatile__ ("isb" : : : "memory") +#define dsb() __asm__ __volatile__ ("dsb" : : : "memory") +#define dmb() __asm__ __volatile__ ("dmb" : : : "memory") +#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6 #define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ : : "r" (0) : "memory") #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |