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authorAdrian Bunk <bunk@stusta.de>2007-07-31 00:38:19 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-31 15:39:39 -0700
commit99eb8a550dbccc0e1f6c7e866fe421810e0585f6 (patch)
tree130c6e3338a0655ba74355eba83afab9261e1ed0 /include/asm-arm26/assembler.h
parentAdd CTL_PROC back (diff)
downloadlinux-dev-99eb8a550dbccc0e1f6c7e866fe421810e0585f6.tar.xz
linux-dev-99eb8a550dbccc0e1f6c7e866fe421810e0585f6.zip
Remove the arm26 port
The arm26 port has been in a state where it was far from even compiling for quite some time. Ian Molton agreed with the removal. Signed-off-by: Adrian Bunk <bunk@stusta.de> Cc: Ian Molton <spyro@f2s.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-arm26/assembler.h')
-rw-r--r--include/asm-arm26/assembler.h106
1 files changed, 0 insertions, 106 deletions
diff --git a/include/asm-arm26/assembler.h b/include/asm-arm26/assembler.h
deleted file mode 100644
index bb507a9a4a55..000000000000
--- a/include/asm-arm26/assembler.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * linux/include/asm-arm26/assembler.h
- *
- * This file contains arm architecture specific defines
- * for the different processors.
- *
- * Do not include any C declarations in this file - it is included by
- * assembler source.
- */
-#ifndef __ASSEMBLY__
-#error "Only include this from assembly code"
-#endif
-
-/*
- * Endian independent macros for shifting bytes within registers.
- */
-#define pull lsr
-#define push lsl
-#define byte(x) (x*8)
-
-#ifdef __STDC__
-#define LOADREGS(cond, base, reglist...)\
- ldm##cond base,reglist^
-
-#define RETINSTR(instr, regs...)\
- instr##s regs
-#else
-#define LOADREGS(cond, base, reglist...)\
- ldm/**/cond base,reglist^
-
-#define RETINSTR(instr, regs...)\
- instr/**/s regs
-#endif
-
-#define MODENOP\
- mov r0, r0
-
-#define MODE(savereg,tmpreg,mode) \
- mov savereg, pc; \
- bic tmpreg, savereg, $0x0c000003; \
- orr tmpreg, tmpreg, $mode; \
- teqp tmpreg, $0
-
-#define RESTOREMODE(savereg) \
- teqp savereg, $0
-
-#define SAVEIRQS(tmpreg)
-
-#define RESTOREIRQS(tmpreg)
-
-#define DISABLEIRQS(tmpreg)\
- teqp pc, $0x08000003
-
-#define ENABLEIRQS(tmpreg)\
- teqp pc, $0x00000003
-
-#define USERMODE(tmpreg)\
- teqp pc, $0x00000000;\
- mov r0, r0
-
-#define SVCMODE(tmpreg)\
- teqp pc, $0x00000003;\
- mov r0, r0
-
-
-/*
- * Save the current IRQ state and disable IRQs
- * Note that this macro assumes FIQs are enabled, and
- * that the processor is in SVC mode.
- */
- .macro save_and_disable_irqs, oldcpsr, temp
- mov \oldcpsr, pc
- orr \temp, \oldcpsr, #0x08000000
- teqp \temp, #0
- .endm
-
-/*
- * Restore interrupt state previously stored in
- * a register
- * ** Actually do nothing on Arc - hope that the caller uses a MOVS PC soon
- * after!
- */
- .macro restore_irqs, oldcpsr
- @ This be restore_irqs
- .endm
-
-/*
- * These two are used to save LR/restore PC over a user-based access.
- * The old 26-bit architecture requires that we save lr (R14)
- */
- .macro save_lr
- str lr, [sp, #-4]!
- .endm
-
- .macro restore_pc
- ldmfd sp!, {pc}^
- .endm
-
-#define USER(x...) \
-9999: x; \
- .section __ex_table,"a"; \
- .align 3; \
- .long 9999b,9001f; \
- .previous
-
-