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| author |   Zhenyu Ye <yezhenyu2@huawei.com> | 2020-07-15 15:19:43 +0800 |
|---|---|---|
| committer |   Catalin Marinas <catalin.marinas@arm.com> | 2020-07-15 15:57:30 +0100 |
| commit | b620ba54547cd0f98e35c1be102eec2cc25fda5d (patch) | |
| tree | 5057a6279d2dd70d506c1297dcc279a9e651ce65 /include/asm-generic/git:/ssh:/git@git.zx2c4.com | |
| parent | arm64: tlb: don't set the ttl value in flush_tlb_page_nosync (diff) | |
| download | linux-dev-b620ba54547cd0f98e35c1be102eec2cc25fda5d.tar.xz linux-dev-b620ba54547cd0f98e35c1be102eec2cc25fda5d.zip | |
arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature
ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
range of input addresses. This patch detect this feature.
Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
Link: https://lore.kernel.org/r/20200715071945.897-2-yezhenyu2@huawei.com
[catalin.marinas@arm.com: some renaming for consistency]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'include/asm-generic/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions