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authorVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>2005-10-30 14:59:38 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2005-10-30 17:37:12 -0800
commit30037f66ce63b6b7ca1fbfb06605b831f4a60df6 (patch)
tree48645e204613332df510b42f56655d06d9200a33 /include/asm-i386
parent[PATCH] fixup bogus e820 entry with mem= (diff)
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[PATCH] x86: when L3 is present show its size in /proc/cpuinfo
The code that prints the cache size assumes that L3 always lives in chipset and is shared across CPUs. Which is not really true. I think all the cachesizes reported by cpuid are in the processor itself. The attached patch changes the code to reflect that. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386')
0 files changed, 0 insertions, 0 deletions