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| author |   Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-25 08:49:25 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-25 08:49:25 -0800 |
| commit | 7d14f145f839b5d0d221ea209b4998f93267e2ec (patch) | |
| tree | 669d09ad53c9de9ef2e6cef06d256a811d509d65 /include/asm-ia64/numa.h | |
| parent | Merge master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild (diff) | |
| parent | [IA64] New IA64 core/thread detection patch (diff) | |
| download | linux-dev-7d14f145f839b5d0d221ea209b4998f93267e2ec.tar.xz linux-dev-7d14f145f839b5d0d221ea209b4998f93267e2ec.zip | |
Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] New IA64 core/thread detection patch
[IA64] Increase max node count on SN platforms
[IA64] Increase max node count on SN platforms
[IA64] Increase max node count on SN platforms
[IA64] Increase max node count on SN platforms
[IA64] Tollhouse HP: IA64 arch changes
[IA64] cleanup dig_irq_init
[IA64] MCA recovery: kernel context recovery table
IA64: Use early_parm to handle mvec_name and nomca
[IA64] move patchlist and machvec into init section
[IA64] add init declaration - nolwsys
[IA64] add init declaration - gate page functions
[IA64] add init declaration to memory initialization functions
[IA64] add init declaration to cpu initialization functions
[IA64] add __init declaration to mca functions
[IA64] Ignore disabled Local SAPIC Affinity Structure in SRAT
[IA64] sn_check_intr: use ia64_get_irr()
[IA64] fix ia64 is_hugepage_only_range
Diffstat (limited to 'include/asm-ia64/numa.h')
| -rw-r--r-- | include/asm-ia64/numa.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-ia64/numa.h b/include/asm-ia64/numa.h index 3ae128fe0823..dae6aeb7b119 100644 --- a/include/asm-ia64/numa.h +++ b/include/asm-ia64/numa.h @@ -23,7 +23,7 @@ #include <asm/mmzone.h> -extern u8 cpu_to_node_map[NR_CPUS] __cacheline_aligned; +extern u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned; extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned; /* Stuff below this line could be architecture independent */ |