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| author |   Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-09-10 14:43:37 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-09-10 14:43:37 -0700 |
| commit | 897ee77bfba12b83752027427a41009961458ee6 (patch) | |
| tree | 2caf21fd61ab29d5e5ac37e45ff70b55ceeff9c9 /include/asm-mips/mach-ocelot/mach-gt64120.h | |
| parent | Merge branch 'i2c-for-linus' of git://jdelvare.pck.nerim.net/jdelvare-2.6 (diff) | |
| parent | [MIPS] Ocelot: remove remaining bits (diff) | |
| download | linux-dev-897ee77bfba12b83752027427a41009961458ee6.tar.xz linux-dev-897ee77bfba12b83752027427a41009961458ee6.zip | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Ocelot: remove remaining bits
[MIPS] TLB: Fix instruction bitmasks
[MIPS] R10000: Fix wrong test in dma-default.c
[MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.
[MIPS] Sibyte: Remove broken dependency on EXPERIMENTAL from SIBYTE_SB1xxx_SOC.
[MIPS] Kconfig: whitespace cleanup.
[MIPS] PCI: Set need_domain_info if controller domain index is non-zero.
[MIPS] BCM1480: Fix computation of interrupt mask address register.
[MIPS] i8259: Add disable method.
[MIPS] tty: add the new ioctls and definitions.
Diffstat (limited to 'include/asm-mips/mach-ocelot/mach-gt64120.h')
| -rw-r--r-- | include/asm-mips/mach-ocelot/mach-gt64120.h | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/include/asm-mips/mach-ocelot/mach-gt64120.h b/include/asm-mips/mach-ocelot/mach-gt64120.h deleted file mode 100644 index a62ecb53c751..000000000000 --- a/include/asm-mips/mach-ocelot/mach-gt64120.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright 2001 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H -#define _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H - -/* - * PCI address allocation - */ -#define GT_PCI_MEM_BASE (0x22000000UL) -#define GT_PCI_MEM_SIZE GT_DEF_PCI0_MEM0_SIZE -#define GT_PCI_IO_BASE (0x20000000UL) -#define GT_PCI_IO_SIZE GT_DEF_PCI0_IO_SIZE - -extern unsigned long gt64120_base; - -#define GT64120_BASE (gt64120_base) - -/* - * GT timer irq - */ -#define GT_TIMER 6 - -#endif /* _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H */ |