diff options
| author |   Glauber de Oliveira Costa <gcosta@redhat.com> | 2008-01-30 13:31:31 +0100 |
|---|---|---|
| committer |   Ingo Molnar <mingo@elte.hu> | 2008-01-30 13:31:31 +0100 |
| commit | 7818a1e0294debee02d5135e17b89f28b8871887 (patch) | |
| tree | 251473910cddc3c2889407cde8f6f962dc14e88f /include/asm-x86/processor.h | |
| parent | x86: unify tss_struct (diff) | |
| download | linux-dev-7818a1e0294debee02d5135e17b89f28b8871887.tar.xz linux-dev-7818a1e0294debee02d5135e17b89f28b8871887.zip | |
x86: provide 64-bit with a load_sp0 function.
Paravirt guests need to inform the underlying hypervisor whenever the sp0
tss field changes. i386 already has such a function, and we use it for
x86_64 too. There's an unnecessary (for 64-bit) msr handling part in the original
version, and it is placed around an ifdef. Making no more sense in
processor_32.h, it is moved to the common header
Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/processor.h')
| -rw-r--r-- | include/asm-x86/processor.h | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h index cede9ad3dc6e..b1ea52156362 100644 --- a/include/asm-x86/processor.h +++ b/include/asm-x86/processor.h @@ -193,8 +193,22 @@ static inline void native_set_iopl_mask(unsigned mask) #endif } +static inline void native_load_sp0(struct tss_struct *tss, + struct thread_struct *thread) +{ + tss->x86_tss.sp0 = thread->sp0; +#ifdef CONFIG_X86_32 + /* Only happens when SEP is enabled, no need to test "SEP"arately */ + if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) { + tss->x86_tss.ss1 = thread->sysenter_cs; + wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); + } +#endif +} -#ifndef CONFIG_PARAVIRT +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else #define __cpuid native_cpuid #define paravirt_enabled() 0 @@ -206,6 +220,12 @@ static inline void native_set_iopl_mask(unsigned mask) #define set_debugreg(value, register) \ native_set_debugreg(register, value) +static inline void load_sp0(struct tss_struct *tss, + struct thread_struct *thread) +{ + native_load_sp0(tss, thread); +} + #define set_iopl_mask native_set_iopl_mask #endif /* CONFIG_PARAVIRT */ |