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| author |   Ravikiran G Thirumalai <kiran@scalex86.org> | 2006-01-11 22:46:15 +0100 |
|---|---|---|
| committer |   Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-11 19:05:01 -0800 |
| commit | 5fd63b308569060ffa40af52ed122d9734111bff (patch) | |
| tree | 746c2701ec42374b1ec389a6af0d438c9105a9d7 /include/asm-x86_64/cache.h | |
| parent | [PATCH] x86_64: Make sure BITS_PER_ATOMIC is defined in asm-generic/atomic.h (diff) | |
| download | linux-dev-5fd63b308569060ffa40af52ed122d9734111bff.tar.xz linux-dev-5fd63b308569060ffa40af52ed122d9734111bff.zip | |
[PATCH] x86_64: Inclusion of ScaleMP vSMP architecture patches - vsmp_align
vSMP specific alignment patch to
1. Define INTERNODE_CACHE_SHIFT for vSMP
2. Use this for alignment of critical structures
3. Use INTERNODE_CACHE_SHIFT for ARCH_MIN_TASKALIGN,
and let the slab align task_struct allocations to the internode cacheline size
4. Introduce and use ARCH_MIN_MMSTRUCT_ALIGN for mm_struct slab allocations.
Signed-off-by: Ravikiran Thirumalai <kiran@scalemp.com>
Signed-off-by: Shai Fultheim <shai@scalemp.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-x86_64/cache.h')
| -rw-r--r-- | include/asm-x86_64/cache.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/asm-x86_64/cache.h b/include/asm-x86_64/cache.h index b4a2401de77b..263f0a211ed7 100644 --- a/include/asm-x86_64/cache.h +++ b/include/asm-x86_64/cache.h @@ -10,4 +10,16 @@ #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) +#ifdef CONFIG_X86_VSMP + +/* vSMP Internode cacheline shift */ +#define INTERNODE_CACHE_SHIFT (12) +#ifdef CONFIG_SMP +#define __cacheline_aligned_in_smp \ + __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \ + __attribute__((__section__(".data.page_aligned"))) +#endif + +#endif + #endif |