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| author |   Len Brown <len.brown@intel.com> | 2005-07-30 01:55:32 -0400 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2005-07-30 01:55:32 -0400 |
| commit | adbedd34244e2b054557002817f979a9b004a405 (patch) | |
| tree | 78e4a524e84f8b3e23ae8b49ac689048584e4668 /include/asm-x86_64/ipi.h | |
| parent | /home/lenb/src/to-linus branch 'acpi-2.6.12' (diff) | |
| parent | [PATCH] agp: restore APBASE after setting APSIZE (diff) | |
| download | linux-dev-adbedd34244e2b054557002817f979a9b004a405.tar.xz linux-dev-adbedd34244e2b054557002817f979a9b004a405.zip | |
merge 2.6.13-rc4 with ACPI's to-linus tree
Diffstat (limited to 'include/asm-x86_64/ipi.h')
| -rw-r--r-- | include/asm-x86_64/ipi.h | 45 |
1 files changed, 21 insertions, 24 deletions
diff --git a/include/asm-x86_64/ipi.h b/include/asm-x86_64/ipi.h index d1841847ed89..5e166b9d3bde 100644 --- a/include/asm-x86_64/ipi.h +++ b/include/asm-x86_64/ipi.h @@ -82,30 +82,27 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector) */ local_irq_save(flags); - for (query_cpu = 0; query_cpu < NR_CPUS; ++query_cpu) { - if (cpu_isset(query_cpu, mask)) { - - /* - * Wait for idle. - */ - apic_wait_icr_idle(); - - /* - * prepare target chip field - */ - cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]); - apic_write_around(APIC_ICR2, cfg); - - /* - * program the ICR - */ - cfg = __prepare_ICR(0, vector, APIC_DEST_PHYSICAL); - - /* - * Send the IPI. The write to APIC_ICR fires this off. - */ - apic_write_around(APIC_ICR, cfg); - } + for_each_cpu_mask(query_cpu, mask) { + /* + * Wait for idle. + */ + apic_wait_icr_idle(); + + /* + * prepare target chip field + */ + cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]); + apic_write_around(APIC_ICR2, cfg); + + /* + * program the ICR + */ + cfg = __prepare_ICR(0, vector, APIC_DEST_PHYSICAL); + + /* + * Send the IPI. The write to APIC_ICR fires this off. + */ + apic_write_around(APIC_ICR, cfg); } local_irq_restore(flags); } |