diff options
| author |   Andreas Gruenbacher <agruenba@redhat.com> | 2022-08-05 18:37:03 +0200 |
|---|---|---|
| committer | Andreas Gruenbacher <agruenba@redhat.com> | 2022-08-05 18:37:03 +0200 |
| commit | 446279168e030fd0ed68e2bba336bef8bb3da352 (patch) | |
| tree | 0944d4dc64b07f74a6cf73d2ce803a789f8d786d /include/drm/drm_cache.h | |
| parent | gfs2: Minor gfs2_glock_nq_m cleanup (diff) | |
| parent | gfs2: List traversal in do_promote is safe (diff) | |
Merge part of branch 'for-next.instantiate' into for-next
Diffstat (limited to 'include/drm/drm_cache.h')
| -rw-r--r-- | include/drm/drm_cache.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h index 22deb216b59c..08e0e3ffad13 100644 --- a/include/drm/drm_cache.h +++ b/include/drm/drm_cache.h @@ -67,6 +67,14 @@ static inline bool drm_arch_can_wc_memory(void) * optimization entirely for ARM and arm64. */ return false; +#elif defined(CONFIG_LOONGARCH) + /* + * LoongArch maintains cache coherency in hardware, but its WUC attribute + * (Weak-ordered UnCached, which is similar to WC) is out of the scope of + * cache coherency machanism. This means WUC can only used for write-only + * memory regions. + */ + return false; #else return true; #endif |