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authorDaniel Vetter <daniel.vetter@ffwll.ch>2021-03-26 15:52:01 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2021-03-26 15:53:21 +0100
commit2cbcb78c9ee5520c8d836c7ff57d1b60ebe8e9b7 (patch)
tree99d79eecc71a17ccb53205b28bfbe395dba91e43 /include/drm
parentMerge tag 'drm-intel-next-2021-03-16' of git://anongit.freedesktop.org/drm/drm-intel into drm-next (diff)
parentdrm/amdkfd: Bump KFD API version (diff)
downloadlinux-dev-2cbcb78c9ee5520c8d836c7ff57d1b60ebe8e9b7.tar.xz
linux-dev-2cbcb78c9ee5520c8d836c7ff57d1b60ebe8e9b7.zip
Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.13-2021-03-23: amdgpu: - Debugfs cleanup - Various cleanups and spelling fixes - Flexible array cleanups - Initial AMD Freesync HDMI - Display fixes - 10bpc dithering improvements - Display ASSR support - Clean up and unify powerplay and swsmu interfaces - Vangogh fixes - Add SMU gfx busy queues for RV/PCO - PCIE DPM fixes - S0ix fixes - GPU metrics data fixes - DCN secure display support - Backlight type override - Add initial support for Aldebaran - RAS fixes - Prime fixes for A+A systems - Reset fixes - Initial resource cursor support - Drop legacy IO BAR requirements - Various power fixes amdkfd: - MMU notifier fixes - APU fixes radeon: - Debugfs cleanups - Flexible array cleanups UAPI: - amdgpu: Add a new INFO ioctl interface to query video capabilities rather than hardcoding them in userspace. This allows us to provide fine grained asic capabilities (e.g., if a particular part is bandwidth limited, we can limit the capabilities). Proposed userspace: https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps - amdkfd: bump the driver version. There was a problem with reporting some RAS features on older versions of the driver. Proposed userspace: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/7cdd63475c36bb9f49bb960f90f9a8cdb7e80a21 Danvet: A bunch of conflicts all over, but it seems to compile ... I did put the call to dc_allow_idle_optimizations() on a single line since it looked a bit too jarring to be left alone. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210324040147.1990338-1-alexander.deucher@amd.com
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/amd_asic_type.h15
1 files changed, 8 insertions, 7 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h
index cde3c8c9f20c..336e36506910 100644
--- a/include/drm/amd_asic_type.h
+++ b/include/drm/amd_asic_type.h
@@ -51,13 +51,14 @@ enum amd_asic_type {
CHIP_RAVEN, /* 22 */
CHIP_ARCTURUS, /* 23 */
CHIP_RENOIR, /* 24 */
- CHIP_NAVI10, /* 25 */
- CHIP_NAVI14, /* 26 */
- CHIP_NAVI12, /* 27 */
- CHIP_SIENNA_CICHLID, /* 28 */
- CHIP_NAVY_FLOUNDER, /* 29 */
- CHIP_VANGOGH, /* 30 */
- CHIP_DIMGREY_CAVEFISH, /* 31 */
+ CHIP_ALDEBARAN, /* 25 */
+ CHIP_NAVI10, /* 26 */
+ CHIP_NAVI14, /* 27 */
+ CHIP_NAVI12, /* 28 */
+ CHIP_SIENNA_CICHLID, /* 29 */
+ CHIP_NAVY_FLOUNDER, /* 30 */
+ CHIP_VANGOGH, /* 31 */
+ CHIP_DIMGREY_CAVEFISH, /* 32 */
CHIP_LAST,
};