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| author |   Xiaojie Yuan <xiaojie.yuan@amd.com> | 2018-12-17 18:00:26 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-07-18 14:17:58 -0500 |
| commit | 87dbad02d2254b741c71ce859c451fb1ae6f5340 (patch) | |
| tree | 05a73a79c8d7378d946113fbf944db21e59afdae /include/drm | |
| parent | drm/amd/display: init res_pool dccg_ref, dchub_ref with xtalin_freq (diff) | |
| download | linux-dev-87dbad02d2254b741c71ce859c451fb1ae6f5340.tar.xz linux-dev-87dbad02d2254b741c71ce859c451fb1ae6f5340.zip | |
drm/amdgpu: add navi14 asic type
Add CHIP_NAVI14 to the list of asic types.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm')
| -rw-r--r-- | include/drm/amd_asic_type.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h index bcc2bcf32886..0c4766af04af 100644 --- a/include/drm/amd_asic_type.h +++ b/include/drm/amd_asic_type.h @@ -50,6 +50,7 @@ enum amd_asic_type { CHIP_VEGA20, CHIP_RAVEN, CHIP_NAVI10, + CHIP_NAVI14, CHIP_LAST, }; |