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author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-06-20 11:02:29 +0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-06-20 11:02:29 +0800 |
commit | 9705596d08ac87c18aee32cc97f2783b7d14624e (patch) | |
tree | 34ac05e4e29db94c8c7aeaa89966a9de39c7bbcd /include/dt-bindings/clock/sun50i-a64-ccu.h | |
parent | Merge tag 'ntb-4.12-bugfixes' of git://github.com/jonmason/ntb (diff) | |
parent | Merge tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes (diff) | |
download | linux-dev-9705596d08ac87c18aee32cc97f2783b7d14624e.tar.xz linux-dev-9705596d08ac87c18aee32cc97f2783b7d14624e.zip |
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Stephen Boyd:
"One build fix for an Amlogic clk driver and a handful of Allwinner clk
driver fixes for some DT bindings and a randconfig build error that
all came in this merge window"
* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks
clk: sunxi-ng: sun5i: Fix ahb_bist_clk definition
clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM
clk: meson: gxbb: fix build error without RESET_CONTROLLER
clk: sunxi-ng: v3s: Fix usb otg device reset bit
clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset
Diffstat (limited to 'include/dt-bindings/clock/sun50i-a64-ccu.h')
-rw-r--r-- | include/dt-bindings/clock/sun50i-a64-ccu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h index 370c0a0473fc..d66432c6e675 100644 --- a/include/dt-bindings/clock/sun50i-a64-ccu.h +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h @@ -43,6 +43,8 @@ #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ #define _DT_BINDINGS_CLK_SUN50I_A64_H_ +#define CLK_PLL_PERIPH0 11 + #define CLK_BUS_MIPI_DSI 28 #define CLK_BUS_CE 29 #define CLK_BUS_DMA 30 |