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| author |   Jernej Skrabec <jernej.skrabec@siol.net> | 2018-06-25 14:02:43 +0200 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@bootlin.com> | 2018-06-27 19:06:56 +0200 |
| commit | d18e85349f6a65baa69b8ee397efb93e4ca31909 (patch) | |
| tree | 19d64f26dff3d4eb0db12e7ed9c42e7dc427b3f1 /include/dt-bindings/clock/sun8i-r40-ccu.h | |
| parent | clk: sunxi-ng: r40: Allow setting parent rate to display related clocks (diff) | |
| download | linux-dev-d18e85349f6a65baa69b8ee397efb93e4ca31909.tar.xz linux-dev-d18e85349f6a65baa69b8ee397efb93e4ca31909.zip | |
clk: sunxi-ng: r40: Export video PLLs
Video PLLs need to be referenced in R40 DT as possible HDMI PHY parent.
Export them.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'include/dt-bindings/clock/sun8i-r40-ccu.h')
| -rw-r--r-- | include/dt-bindings/clock/sun8i-r40-ccu.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/sun8i-r40-ccu.h b/include/dt-bindings/clock/sun8i-r40-ccu.h index 4fa5f69fc297..f9e15a235626 100644 --- a/include/dt-bindings/clock/sun8i-r40-ccu.h +++ b/include/dt-bindings/clock/sun8i-r40-ccu.h @@ -43,6 +43,10 @@ #ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_ #define _DT_BINDINGS_CLK_SUN8I_R40_H_ +#define CLK_PLL_VIDEO0 7 + +#define CLK_PLL_VIDEO1 16 + #define CLK_CPU 24 #define CLK_BUS_MIPI_DSI 29 |